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Fix MoE routing and TMA checks for PR 3812#3953

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danielhanchen wants to merge 25 commits into
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fix/pr3812-moe-kernels
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Fix MoE routing and TMA checks for PR 3812#3953
danielhanchen wants to merge 25 commits into
mainfrom
fix/pr3812-moe-kernels

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Summary

  • Fix Qwen3 MoE routing indices for top_k>1 by using flattened selected experts for gather indices
  • Make grouped_gemm TMA support device aware and restore block size clamps for non autotune paths

Testing

  • python temp/moe_train_bench.py (Qwen3 MoE native/grouped_mm/unsloth_triton)

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Summary of Changes

Hello @danielhanchen, I'm Gemini Code Assist1! I'm currently reviewing this pull request and will post my feedback shortly. In the meantime, here's a summary to help you and other reviewers quickly get up to speed!

This pull request significantly enhances the performance and robustness of Mixture of Experts (MoE) models, particularly for Qwen3 and GLM4 architectures. It introduces an intelligent caching mechanism for Triton kernel autotuning, refines MoE routing logic, and improves TMA support within grouped GEMM operations. Furthermore, it streamlines the integration of LoRA with MoE models by automating the detection and targeting of expert parameters, and includes a critical fix for vLLM compatibility in GRPO trainers.

Highlights

  • MoE Routing Fix for Qwen3: Corrected Qwen3 Mixture of Experts (MoE) routing indices for top_k > 1 by flattening selected experts to generate accurate gather indices for grouped GEMM operations. This ensures proper token distribution to experts.
  • Device-Aware TMA Support and Block Size Clamping: Enhanced grouped_gemm to dynamically check for TMA (Tensor Memory Accelerator) support based on the current CUDA device's capability. Additionally, block size clamping for non-autotune paths has been restored to prevent potential issues.
  • MoE Kernel Autotuning Cache: Introduced a new caching system for MoE kernel autotuning configurations. This system stores optimized kernel settings to disk, preventing redundant autotuning runs and speeding up model loading and initialization.
  • GLM-4.7 Flash MoE Optimization: Added a new FastGLM47Model to provide optimized support for GLM-4.7 Flash (GLM4 MoE Lite) models, leveraging grouped GEMM for improved MoE layer throughput.
  • MoE LoRA Target Parameter Detection: Implemented utility functions (is_moe_model, get_moe_target_parameters) to automatically detect MoE models and identify their expert layers (e.g., gate_up_proj, down_proj) for targeted LoRA application.
  • GRPO vLLM top_k Fix: Addressed an issue in GRPO vLLM where top_k values of 0 could cause errors during SamplingParams creation, ensuring top_k is correctly set to -1 when appropriate for vLLM.

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Code Review

This pull request introduces several significant improvements and fixes related to Mixture-of-Experts (MoE) models. Key changes include fixing the MoE routing for Qwen3, making Tensor Memory Access (TMA) checks device-aware, and adding an autotuning cache system for MoE Triton kernels to improve performance by avoiding repeated tuning. The PR also adds automatic LoRA support for MoE expert layers, which simplifies fine-tuning for users. Furthermore, it introduces optimized implementations for GLM-4.7 MoE and a Triton-specific path for Qwen3 MoE. There are also some compatibility fixes for reinforcement learning trainers. Overall, the changes are well-implemented and enhance both performance and user experience. I've found one minor issue with a duplicated line of code.


return config_fwd, config_bwd_dx, config_bwd_dw

return config_fwd, config_bwd_dx, config_bwd_dw

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medium

This return statement is a duplicate of the one on line 371 and is unreachable. It can be safely removed to clean up the code.

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Reviewed commit: b4ee9a4f37

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Comment on lines +69 to +72
_SUPPORTS_TMA = {}

def supports_tma():
# Check if triton.set_allocator is available (Triton 3.0+)
_HAS_SET_ALLOCATOR = hasattr(triton, "set_allocator")

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P2 Badge Restore _FUSED_MUL_WARN guard for fuse_mul_post

_FUSED_MUL_WARN is no longer initialized at module scope, but grouped_gemm_forward still does global _FUSED_MUL_WARN and reads it when fuse_mul_post is True. That path now raises NameError before any kernel launches, so any inference call that enables fused-mul will crash. Reintroduce the module-level flag (e.g., _FUSED_MUL_WARN = False) or guard the access.

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Comment on lines +86 to +88
config_key = (num_experts, hidden_dim, intermediate_dim, top_k, str(dtype))

if config_key not in _moe_kernel_configs or force_autotune:

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P2 Badge Include device capability in MoE kernel config cache key

get_moe_kernel_configs caches configs by (num_experts, hidden_dim, intermediate_dim, top_k, dtype) only, but get_or_autotune_moe_kernels is device-capability specific. In a mixed-GPU or device-switching process, this cache can reuse an H100 TMA config on an A100 (or vice versa), leading to unsupported TMA paths and runtime failures. Add device index/capability to config_key to keep configs device-safe.

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@Datta0

Datta0 commented Feb 11, 2026

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Closing this as it was handled via #3812

@Datta0 Datta0 closed this Feb 11, 2026
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3 participants