From 5d087cc9962283ea651102af3ebfe05aed0c769b Mon Sep 17 00:00:00 2001 From: dpsarmie Date: Tue, 17 Jun 2025 09:14:47 -0500 Subject: [PATCH 1/4] Add .gitmodules --- .gitmodules | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.gitmodules b/.gitmodules index ab72b60a64..1f7dcd6533 100644 --- a/.gitmodules +++ b/.gitmodules @@ -1,7 +1,7 @@ [submodule "FV3"] path = FV3 - url = https://github.com/NOAA-EMC/fv3atm - branch = develop + url = https://github.com/dpsarmie/fv3atm + branch = unit_test_concept_v2 [submodule "WW3"] path = WW3 url = https://github.com/NOAA-EMC/WW3 From b030827ec1d077802d6a383912e23fd80822edb4 Mon Sep 17 00:00:00 2001 From: dpsarmie Date: Tue, 17 Jun 2025 09:23:33 -0500 Subject: [PATCH 2/4] Add FV3 branch changes --- FV3 | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/FV3 b/FV3 index 357ff49191..6b20114a1e 160000 --- a/FV3 +++ b/FV3 @@ -1 +1 @@ -Subproject commit 357ff491910e1078fc6428d433fdc3484754c049 +Subproject commit 6b20114a1e95e8e95b43c7223d5695152557ce6d From 38893625b4c752491665452f6730f65907ccbbe1 Mon Sep 17 00:00:00 2001 From: dpsarmie Date: Tue, 17 Jun 2025 12:01:41 -0500 Subject: [PATCH 3/4] Add test_changes.list --- tests/test_changes.list | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/tests/test_changes.list b/tests/test_changes.list index d8abcd6e7d..e69de29bb2 100644 --- a/tests/test_changes.list +++ b/tests/test_changes.list @@ -1,20 +0,0 @@ -cpld_control_gefs intel -cpld_restart_gefs intel -cpld_dcp_gefs intel -cpld_control_noaero_p8_agrid intel -control_p8.v2.sfc intel -control_p8_rrtmgp intel -control_p8_mynn intel -merra2_thompson intel -control_p8_faster intel -control_diag_debug intel -gnv1_c96_no_nest_debug intel -gnv1_nested intel -atm_ds2s_docn_pcice intel -atmwav_control_noaero_p8 intel -atmaero_control_p8 intel -atmaero_control_p8_rad intel -atmaero_control_p8_rad_micro intel -control_c48 gnu -control_diag_debug gnu -gnv1_c96_no_nest_debug gnu From 9f19bb22ce4b1e72108f388cb33365e3d4c2342e Mon Sep 17 00:00:00 2001 From: dpsarmie Date: Mon, 7 Jul 2025 16:12:54 -0500 Subject: [PATCH 4/4] Revert test_changes --- tests/test_changes.list | 179 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 179 insertions(+) diff --git a/tests/test_changes.list b/tests/test_changes.list index e69de29bb2..aa0c5cbb6d 100644 --- a/tests/test_changes.list +++ b/tests/test_changes.list @@ -0,0 +1,179 @@ +cpld_control_p8_mixedmode intel +cpld_control_gfsv17 intel +cpld_control_gfsv17_iau intel +cpld_restart_gfsv17 intel +cpld_mpi_gfsv17 intel +cpld_control_gfsv17_nowav_iau intel +cpld_restart_gfsv17_nowav_iau intel +cpld_control_sfs intel +cpld_debug_gfsv17 intel +cpld_control_p8 intel +cpld_control_p8.v2.sfc intel +cpld_restart_p8 intel +cpld_control_qr_p8 intel +cpld_restart_qr_p8 intel +cpld_2threads_p8 intel +cpld_decomp_p8 intel +cpld_mpi_p8 intel +cpld_control_ciceC_p8 intel +cpld_control_c192_p8 intel +cpld_restart_c192_p8 intel +cpld_control_p8_lnd intel +cpld_restart_p8_lnd intel +cpld_s2sa_p8 intel +cpld_control_noaero_p8 intel +cpld_control_nowave_noaero_p8 intel +cpld_debug_p8 intel +cpld_debug_noaero_p8 intel +cpld_control_noaero_p8_agrid intel +cpld_control_p8_faster intel +cpld_control_pdlib_p8 intel +cpld_restart_pdlib_p8 intel +cpld_mpi_pdlib_p8 intel +cpld_control_c48_5deg intel +cpld_warmstart_c48_5deg intel +cpld_restart_c48_5deg intel +cpld_debug_pdlib_p8 intel +control_flake intel +control_CubedSphereGrid intel +control_CubedSphereGrid_parallel intel +control_latlon intel +control_wrtGauss_netcdf_parallel intel +control_c48 intel +control_c48.v2.sfc intel +control_c48_lnd_iau intel +control_c192 intel +control_c384 intel +control_c384gdas intel +control_stochy intel +control_stochy_restart intel +control_lndp intel +control_iovr4 intel +control_iovr5 intel +control_p8 intel +control_p8.v2.sfc intel +control_p8_ugwpv1 intel +control_restart_p8 intel +control_noqr_p8 intel +control_restart_noqr_p8 intel +control_decomp_p8 intel +control_2threads_p8 intel +control_p8_lndp intel +control_p8_rrtmgp intel +control_p8_mynn intel +merra2_thompson intel +regional_control intel +regional_restart intel +regional_decomp intel +regional_2threads intel +regional_noquilt intel +regional_netcdf_parallel intel +regional_2dwrtdecomp intel +regional_wofs intel +rap_control intel +regional_spp_sppt_shum_skeb intel +rap_decomp intel +rap_2threads intel +rap_restart intel +rap_sfcdiff intel +rap_sfcdiff_decomp intel +rap_sfcdiff_restart intel +hrrr_control intel +hrrr_control_decomp intel +hrrr_control_2threads intel +hrrr_control_restart intel +rrfs_v1beta intel +rrfs_v1nssl intel +rrfs_v1nssl_nohailnoccn intel +control_csawmg intel +control_ras intel +control_wam intel +control_p8_faster intel +regional_control_faster intel +control_CubedSphereGrid_debug intel +control_wrtGauss_netcdf_parallel_debug intel +control_stochy_debug intel +control_lndp_debug intel +control_csawmg_debug intel +control_ras_debug intel +control_diag_debug intel +control_debug_p8 intel +regional_debug intel +rap_control_debug intel +hrrr_control_debug intel +hrrr_gf_debug intel +hrrr_c3_debug intel +rap_unified_drag_suite_debug intel +rap_diag_debug intel +rap_cires_ugwp_debug intel +rap_unified_ugwp_debug intel +rap_lndp_debug intel +rap_progcld_thompson_debug intel +rap_noah_debug intel +rap_sfcdiff_debug intel +rap_noah_sfcdiff_cires_ugwp_debug intel +rrfs_v1beta_debug intel +rap_clm_lake_debug intel +rap_flake_debug intel +gnv1_c96_no_nest_debug intel +control_wam_debug intel +regional_spp_sppt_shum_skeb_dyn32_phy32 intel +rap_control_dyn32_phy32 intel +hrrr_control_dyn32_phy32 intel +rap_2threads_dyn32_phy32 intel +hrrr_control_2threads_dyn32_phy32 intel +hrrr_control_decomp_dyn32_phy32 intel +rap_restart_dyn32_phy32 intel +hrrr_control_restart_dyn32_phy32 intel +conus13km_control intel +conus13km_2threads intel +conus13km_restart_mismatch intel +rap_control_dyn64_phy32 intel +rap_control_debug_dyn32_phy32 intel +hrrr_control_debug_dyn32_phy32 intel +conus13km_debug intel +conus13km_debug_qr intel +conus13km_debug_2threads intel +conus13km_radar_tten_debug intel +rap_control_dyn64_phy32_debug intel +hafs_regional_atm intel +hafs_regional_atm_thompson_gfdlsf intel +hafs_regional_atm_ocn intel +hafs_regional_atm_wav intel +hafs_regional_1nest_atm intel +hafs_regional_telescopic_2nests_atm intel +hafs_global_1nest_atm intel +hafs_global_multiple_4nests_atm intel +hafs_regional_specified_moving_1nest_atm intel +hafs_regional_storm_following_1nest_atm intel +hafs_regional_storm_following_1nest_atm_ocn intel +hafs_global_storm_following_1nest_atm intel +gnv1_nested intel +hafs_regional_storm_following_1nest_atm_ocn_debug intel +hafs_regional_storm_following_1nest_atm_ocn_wav intel +hafs_regional_storm_following_1nest_atm_ocn_wav_inline intel +hafs_regional_storm_following_1nest_atm_ocn_wav_mom6 intel +hafs_regional_docn intel +hafs_regional_docn_oisst intel +hafs_regional_datm_cdeps intel +datm_cdeps_control_cfsr intel +datm_cdeps_restart_cfsr intel +datm_cdeps_control_gefs intel +datm_cdeps_iau_gefs intel +datm_cdeps_stochy_gefs intel +datm_cdeps_ciceC_cfsr intel +datm_cdeps_bulk_cfsr intel +datm_cdeps_bulk_gefs intel +datm_cdeps_mx025_cfsr intel +datm_cdeps_mx025_gefs intel +datm_cdeps_multiple_files_cfsr intel +datm_cdeps_3072x1536_cfsr intel +datm_cdeps_gfs intel +datm_cdeps_debug_cfsr intel +datm_cdeps_control_cfsr_faster intel +datm_cdeps_lnd_gswp3 intel +datm_cdeps_lnd_era5 intel +datm_cdeps_lnd_era5_rst intel +datm_cdeps_lm4_gswp3 intel +datm_cdeps_lm4_gswp3_rst intel +atm_ds2s_docn_pcice intel