diff --git a/.pre-commit-config.yaml b/.pre-commit-config.yaml
index 690f1c282a0a..473c53c89c1c 100644
--- a/.pre-commit-config.yaml
+++ b/.pre-commit-config.yaml
@@ -21,7 +21,7 @@ repos:
     rev: v0.7.1
     hooks:
       - id: ruff
-        files: '(^python|^third_party/proton|^third_party/amd)/.*'
+        files: '(^python|^third_party/proton|^third_party/amd|^third_party/nvidia)/.*'
         args: ["--fix", "--exit-non-zero-on-fix"]
         exclude: |
           (?x)(
diff --git a/third_party/nvidia/backend/compiler.py b/third_party/nvidia/backend/compiler.py
index a1b5fc31ef80..960334744384 100644
--- a/third_party/nvidia/backend/compiler.py
+++ b/third_party/nvidia/backend/compiler.py
@@ -232,7 +232,7 @@ def make_ttgir(mod, metadata, opt, capability):
         # Set up Diagnostic
         if os.environ.get("MLIR_ENABLE_REMARK", "0") == "1":
             srcMgr = llvm.source_mgr()
-            diag = ir.source_mgr_diag(srcMgr, mod.context)
+            _ = ir.source_mgr_diag(srcMgr, mod.context)
             mod.context.printOpOnDiagnostic(True)
         # TTIR -> TTGIR
         pm = ir.pass_manager(mod.context)
@@ -286,7 +286,7 @@ def make_llir(src, metadata, options, capability):
         # Set up Diagnostic
         if os.environ.get("MLIR_ENABLE_REMARK", "0") == "1":
             srcMgr = llvm.source_mgr()
-            diag = ir.source_mgr_diag(srcMgr, mod.context)
+            _ = ir.source_mgr_diag(srcMgr, mod.context)
             mod.context.printOpOnDiagnostic(True)
         passes.ttgpuir.add_combine_tensor_select_and_if(pm)
         passes.convert.add_scf_to_cf(pm)
@@ -306,7 +306,7 @@ def make_llir(src, metadata, options, capability):
         llvm.init_targets()
         context = llvm.context()
         if os.environ.get("TRITON_ENABLE_ASAN", "0") == "1":
-            raise ASANError(
+            raise RuntimeError(
                 "Address Sanitizer Error: Address sanitizer is currently only supporteedd on the AMD backend")
         llvm_mod = llvm.to_module(mod, context)
         proc = 'sm_90a' if capability == 90 else f'sm_{capability}'