diff --git a/src/cmd/asm/internal/asm/testdata/riscv_hello.s b/src/cmd/asm/internal/asm/testdata/riscv_hello.s
index e253c7477df2f4..2c221d5c008c8b 100644
--- a/src/cmd/asm/internal/asm/testdata/riscv_hello.s
+++ b/src/cmd/asm/internal/asm/testdata/riscv_hello.s
@@ -17,5 +17,5 @@ TEXT _rt0_riscv_linux(SB),0,$8
 	// TODO: Add SEQZ support directly
 	SLTIU	A0, $1, A0
 	MOV	$SYS_EXIT_GROUP, A7
-	SCALL
+	ECALL
 	RET
diff --git a/src/cmd/asm/internal/asm/testdata/riscvenc.s b/src/cmd/asm/internal/asm/testdata/riscvenc.s
index 1998d04a53ffa0..5613cfe0896d22 100644
--- a/src/cmd/asm/internal/asm/testdata/riscvenc.s
+++ b/src/cmd/asm/internal/asm/testdata/riscvenc.s
@@ -57,6 +57,7 @@ start:
 
 	RET					// 67800000
 
+	ECALL					// 73000000
 	SCALL					// 73000000
 	RDCYCLE	T0				// f32200c0
 	RDTIME	T0				// f32210c0
diff --git a/src/cmd/compile/internal/riscv/prog.go b/src/cmd/compile/internal/riscv/prog.go
index caae1be0f15275..d6029d50fed5fd 100644
--- a/src/cmd/compile/internal/riscv/prog.go
+++ b/src/cmd/compile/internal/riscv/prog.go
@@ -45,7 +45,7 @@ var progmap = map[obj.As]obj.ProgInfo{
 	riscv.ASD:    {Flags: gc.LeftRead | gc.RightWrite | gc.Move},
 	riscv.AMOV:   {Flags: gc.LeftRead | gc.RightWrite | gc.Move},
 	riscv.ASEQZ:  {Flags: gc.LeftRead | gc.RightWrite},
-	riscv.ASCALL: {Flags: gc.OK},
+	riscv.AECALL: {Flags: gc.OK},
 
 	// RISCV conditional branches
 	riscv.ABEQ:  {Flags: gc.Cjmp | gc.LeftRead | gc.RegRead},
diff --git a/src/cmd/compile/internal/riscv/ssa.go b/src/cmd/compile/internal/riscv/ssa.go
index 0ce29090eb4432..1b9ac65b9d0fed 100644
--- a/src/cmd/compile/internal/riscv/ssa.go
+++ b/src/cmd/compile/internal/riscv/ssa.go
@@ -224,7 +224,7 @@ func ssaGenValue(s *gc.SSAGenState, v *ssa.Value) {
 		p.To.Type = obj.TYPE_REG
 		p.To.Reg = riscv.REG_A7
 		// SCALL
-		p = gc.Prog(riscv.ASCALL)
+		p = gc.Prog(riscv.AECALL)
 	default:
 		v.Fatalf("Unhandled op %v", v.Op)
 	}
diff --git a/src/cmd/internal/obj/riscv/asm.go b/src/cmd/internal/obj/riscv/asm.go
index 7dfe6f3abde272..2d57ae72b8ab83 100644
--- a/src/cmd/internal/obj/riscv/asm.go
+++ b/src/cmd/internal/obj/riscv/asm.go
@@ -183,7 +183,12 @@ func progedit(ctxt *obj.Link, p *obj.Prog) {
 	case AJALR:
 		lowerjalr(p)
 
-	case ASCALL, ARDCYCLE, ARDTIME, ARDINSTRET:
+	case AECALL, ASCALL, ARDCYCLE, ARDTIME, ARDINSTRET:
+		// SCALL is the old name for ECALL.
+		if p.As == ASCALL {
+			p.As = AECALL
+		}
+
 		i, ok := encode(p.As)
 		if !ok {
 			panic("progedit: tried to rewrite nonexistent instruction")
@@ -590,7 +595,7 @@ func asmout(p *obj.Prog) uint32 {
 		AMULH, AMULHU, AMULHSU, AMULW, ADIV, ADIVU, AREM, AREMU, ADIVW,
 		ADIVUW, AREMW, AREMUW:
 		return instr_r(p)
-	case AADDI, ASLLI, AXORI, ASRLI, ASRAI, AORI, AANDI, AJALR, ASCALL,
+	case AADDI, ASLLI, AXORI, ASRLI, ASRAI, AORI, AANDI, AJALR, AECALL,
 		ARDCYCLE, ARDTIME, ARDINSTRET, ALB, ALH, ALW, ALD, ALBU, ALHU,
 		ALWU, ASLTI, ASLTIU:
 		return instr_i(p)