From 30f5fc2f1a7a03ce0f272a21d3adb5668939db55 Mon Sep 17 00:00:00 2001 From: Timothee Cour Date: Thu, 26 Aug 2021 21:31:25 -0700 Subject: [PATCH] add comments from @varriount regarding ARM, refs https://github.com/nim-lang/RFCs/issues/411#issuecomment-906866822 --- lib/std/cputicks.nim | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/lib/std/cputicks.nim b/lib/std/cputicks.nim index 0349629ef417e..c18d30f79443f 100644 --- a/lib/std/cputicks.nim +++ b/lib/std/cputicks.nim @@ -7,6 +7,23 @@ Future work: * convert ticks to time; see some approaches here: https://quick-bench.com/q/WcbqUWBCoNBJvCP4n8h3kYfZDXU * provide feature detection to test whether the CPU supports it (on linux, via /proc/cpuinfo) +## js +* we use `window.performance.now()` + +## nodejs +* we use `process.hrtime.bigint()` + +## ARM +* The ARMv8-A architecture[1] manual explicitly states that two reads to the PMCCNTR_EL0 register may return the same value[1a]. + There is also the CNTVCT_EL0[1b] register, however it's unclear whether that register is even monotonic (it's implied, but not stated explicitly). + The ARMv8-M architecture[2] has the CYCCNT register, however all that's mentioned is that it is an "optional free-running 32-bit cycle counter"[2a]. + +## references +[1] https://documentation-service.arm.com/static/611fa684674a052ae36c7c91 +[1a] See [1], PDF page 2852 +[2] https://documentation-service.arm.com/static/60e6f8573d73a34b640e0cee +[2a] See [2]. PDF page 367 + ## further links * https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-32-ia-64-benchmark-code-execution-paper.pdf * https://gist.github.com/savanovich/f07eda9dba9300eb9ccf