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Merge pull request #547 from vacantron/jit/arch-test
jit: Add architecture test
2 parents 464da33 + 9f13082 commit acad7c0

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15 files changed

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15 files changed

+254
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‎.ci/common.sh‎

Lines changed: 14 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2,12 +2,19 @@
22
check_platform()
33
{
44
MACHINE_TYPE=`uname -m`
5-
if [ ${MACHINE_TYPE} != 'x86_64' ]; then
6-
exit 1
7-
fi
8-
95
OS_TYPE=`uname -s`
10-
if [ ${OS_TYPE} != 'Linux' ]; then
11-
exit 1
12-
fi
6+
7+
case "${MACHINE_TYPE}/${OS_TYPE}" in
8+
x86_64/Linux | aarch64/Linux)
9+
;;
10+
Arm64/Darwin)
11+
echo "Apple Silicon is not supported yet"
12+
exit 1
13+
;;
14+
*)
15+
echo "Unsupported platform: ${MACHINE_TYPE}/${OS_TYPE}"
16+
exit 1
17+
;;
18+
esac
19+
1320
}

‎.ci/riscv-tests.sh‎

Lines changed: 15 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -17,12 +17,22 @@ make distclean
1717
# necessary. We need to investigate why full 4 GiB memory access is required
1818
# for this purpose, although the emulator can run all selected benchmarks with
1919
# much smaller memory mapping regions.
20-
make ENABLE_EXT_M=1 ENABLE_EXT_A=1 ENABLE_EXT_F=1 ENABLE_EXT_C=1 \
20+
make ENABLE_ARCH_TEST=1 ENABLE_EXT_M=1 ENABLE_EXT_A=1 ENABLE_EXT_F=1 ENABLE_EXT_C=1 \
2121
ENABLE_Zicsr=1 ENABLE_Zifencei=1 ENABLE_FULL4G=1 $PARALLEL
22-
make arch-test RISCV_DEVICE=IMAFCZicsrZifencei $PARALLEL || exit 1
23-
make arch-test RISCV_DEVICE=FCZicsr $PARALLEL || exit 1
24-
make arch-test RISCV_DEVICE=IMZbaZbbZbcZbs $PARALLEL || exit 1
22+
make arch-test RISCV_DEVICE=IMAFCZicsrZifencei hw_data_misaligned_support=1 $PARALLEL || exit 1
23+
make arch-test RISCV_DEVICE=FCZicsr hw_data_misaligned_support=1 $PARALLEL || exit 1
24+
make arch-test RISCV_DEVICE=IMZbaZbbZbcZbs hw_data_misaligned_support=1 $PARALLEL || exit 1
2525

26+
# Rebuild with RV32E
2627
make distclean
27-
make ENABLE_RV32E=1 ENABLE_FULL4G=1 $PARALLEL
28+
make ENABLE_ARCH_TEST=1 ENABLE_RV32E=1 ENABLE_FULL4G=1 $PARALLEL
2829
make arch-test RISCV_DEVICE=E $PARALLEL || exit 1
30+
31+
# Rebuild with JIT
32+
# Do not run the architecture test with "Zicsr" extension. It ignores
33+
# the hardware misalignment (hw_data_misaligned_support) option.
34+
make distclean
35+
make ENABLE_ARCH_TEST=1 ENABLE_JIT=1 ENABLE_T2C=0 \
36+
ENABLE_EXT_M=1 ENABLE_EXT_A=1 ENABLE_EXT_F=1 ENABLE_EXT_C=1 \
37+
ENABLE_Zicsr=1 ENABLE_Zifencei=1 ENABLE_FULL4G=1 $PARALLEL
38+
make arch-test RISCV_DEVICE=IMC hw_data_misaligned_support=0 $PARALLEL || exit 1

‎.ci/riscv-toolchain-install.sh‎

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,12 @@ mkdir -p toolchain
1111
if [[ "$#" == "0" ]] || [[ "$1" != "riscv-collab" ]]; then
1212
GCC_VER=14.2.0-3
1313
TOOLCHAIN_REPO=https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
14-
TOOLCHAIN_URL=${TOOLCHAIN_REPO}/releases/download/v${GCC_VER}/xpack-riscv-none-elf-gcc-${GCC_VER}-linux-x64.tar.gz
14+
15+
if [[ ${MACHINE_TYPE} == "x86_64" ]]; then
16+
TOOLCHAIN_URL=${TOOLCHAIN_REPO}/releases/download/v${GCC_VER}/xpack-riscv-none-elf-gcc-${GCC_VER}-linux-x64.tar.gz
17+
elif [[ ${MACHINE_TYPE} == "aarch64" ]]; then
18+
TOOLCHAIN_URL=${TOOLCHAIN_REPO}/releases/download/v${GCC_VER}/xpack-riscv-none-elf-gcc-${GCC_VER}-linux-arm64.tar.gz
19+
fi
1520
else
1621
UBUNTU_VER=`lsb_release -r | cut -f2`
1722
GCC_VER=2025.01.20

‎.github/workflows/build-artifact.yml‎

Lines changed: 0 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,6 @@ jobs:
110110
sudo apt-get update -q -y
111111
sudo apt-get upgrade -q -y
112112
sudo apt-get install -q -y gcc-multilib g++-multilib
113-
sudo apt-get install -q -y opam build-essential libgmp-dev z3 pkg-config zlib1g-dev
114113
.ci/riscv-toolchain-install.sh
115114
echo "$PWD/toolchain/bin" >> $GITHUB_PATH
116115
- name: Build binaries
@@ -120,19 +119,6 @@ jobs:
120119
mv build/sha1sum-linux-x86-softfp /tmp
121120
mv build/sha1sum-riscv32 /tmp
122121
mv build/linux-x86-softfp build/riscv32 /tmp/rv32emu-prebuilt
123-
- name: Build Sail model
124-
run: |
125-
cd /tmp
126-
opam init -y --disable-sandboxing
127-
opam switch create ocaml-base-compiler.4.06.1
128-
opam install sail -y
129-
eval $(opam config env)
130-
git clone https://github.com/riscv/sail-riscv.git
131-
cd sail-riscv
132-
git checkout 9547a30bf84572c458476591b569a95f5232c1c7
133-
ARCH=RV32 make -j
134-
mkdir -p /tmp/rv32emu-prebuilt/sail_cSim
135-
mv c_emulator/riscv_sim_RV32 /tmp/rv32emu-prebuilt/sail_cSim
136122
- name: Create tarball
137123
run: |
138124
cd /tmp

‎.github/workflows/main.yml‎

Lines changed: 9 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -233,6 +233,12 @@ jobs:
233233
.ci/boot-linux.sh
234234
make ENABLE_SYSTEM=1 clean
235235
if: ${{ always() }}
236+
- name: Architecture test
237+
env:
238+
CC: ${{ steps.install_cc.outputs.cc }}
239+
run: |
240+
.ci/riscv-tests.sh
241+
if: ${{ always() }}
236242

237243
host-arm64:
238244
needs: [detect-code-related-file-changes]
@@ -254,7 +260,7 @@ jobs:
254260
install: |
255261
apt-get update -q -y
256262
apt-get dist-upgrade -q -y
257-
apt-get install -q -y make git clang libsdl2-dev libsdl2-mixer-dev lsb-release wget software-properties-common gnupg bc
263+
apt-get install -q -y make git clang python3 python3-pip build-essential libsdl2-dev libsdl2-mixer-dev lsb-release wget software-properties-common gnupg bc
258264
git config --global --add safe.directory ${{ github.workspace }}
259265
git config --global --add safe.directory ${{ github.workspace }}/src/softfloat
260266
git config --global --add safe.directory ${{ github.workspace }}/src/mini-gdbstub
@@ -269,6 +275,8 @@ jobs:
269275
make ENABLE_JIT=1 clean && make ENABLE_EXT_A=0 ENABLE_JIT=1 check -j$(nproc)
270276
make ENABLE_JIT=1 clean && make ENABLE_EXT_F=0 ENABLE_JIT=1 check -j$(nproc)
271277
make ENABLE_JIT=1 clean && make ENABLE_EXT_C=0 ENABLE_JIT=1 check -j$(nproc)
278+
.ci/riscv-toolchain-install.sh && export PATH=$PWD/toolchain/bin:$PATH
279+
.ci/riscv-tests.sh
272280
273281
coding-style:
274282
needs: [detect-code-related-file-changes]
@@ -305,21 +313,6 @@ jobs:
305313
run: |
306314
make ENABLE_JIT=1 distclean && scan-build-18 -v -o ~/scan-build --status-bugs --use-cc=clang-18 --force-analyze-debug-code --show-description -analyzer-config stable-report-filename=true -enable-checker valist,nullability make ENABLE_EXT_F=0 ENABLE_SDL=0 ENABLE_JIT=1
307315
308-
compliance-test:
309-
needs: [detect-code-related-file-changes]
310-
if: needs.detect-code-related-file-changes.outputs.has_code_related_changes == 'true'
311-
runs-on: ubuntu-latest
312-
steps:
313-
- uses: actions/checkout@v4
314-
- name: install-dependencies
315-
run: |
316-
.ci/riscv-toolchain-install.sh
317-
shell: bash
318-
- name: architectural test
319-
run: |
320-
.ci/riscv-tests.sh
321-
shell: bash
322-
323316
# https://docs.docker.com/build/ci/github-actions/multi-platform/
324317
docker-hub-build-and-publish:
325318
needs: [detect-code-related-file-changes]

‎Makefile‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,9 @@ CFLAGS += -DMEM_SIZE=0x$(REAL_MEM_SIZE) -DDTB_SIZE=0x$(REAL_DTB_SIZE) -DINITRD_S
6464
endif
6565
endif
6666

67+
ENABLE_ARCH_TEST ?= 0
68+
$(call set-feature, ARCH_TEST)
69+
6770
# Enable link-time optimization (LTO)
6871
ENABLE_LTO ?= 1
6972
ifeq ($(call has, LTO), 1)

‎mk/artifact.mk‎

Lines changed: 28 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -39,9 +39,12 @@ SHELL_HACK := $(shell mkdir -p $(BIN_DIR)/linux-x86-softfp $(BIN_DIR)/riscv32 $(
3939
ifeq ($(call has, PREBUILT), 1)
4040
ifeq ($(call has, SYSTEM), 1)
4141
LATEST_RELEASE := $(shell wget -q https://api.github.com/repos/sysprog21/rv32emu-prebuilt/releases -O- | grep '"tag_name"' | grep "Linux-Image" | head -n 1 | sed -E 's/.*"tag_name": "([^"]+)".*/\1/')
42+
else ifeq ($(call has, ARCH_TEST), 1)
43+
LATEST_RELEASE := $(shell wget -q https://api.github.com/repos/sysprog21/rv32emu-prebuilt/releases -O- | grep '"tag_name"' | grep "sail" | head -n 1 | sed -E 's/.*"tag_name": "([^"]+)".*/\1/')
4244
else
4345
LATEST_RELEASE := $(shell wget -q https://api.github.com/repos/sysprog21/rv32emu-prebuilt/releases -O- | grep '"tag_name"' | grep "ELF" | head -n 1 | sed -E 's/.*"tag_name": "([^"]+)".*/\1/')
4446
endif
47+
PREBUILT_BLOB_URL = https://github.com/sysprog21/rv32emu-prebuilt/releases/download/$(LATEST_RELEASE)
4548
else
4649
# Since rv32emu only supports the dynamic binary translation of integer instruction in tiered compilation currently,
4750
# we disable the hardware floating-point and the related SIMD operation of x86.
@@ -67,6 +70,14 @@ ifeq ($(call has, SYSTEM), 1)
6770
))
6871

6972
$(Q)$(eval RV32EMU_PREBUILT_TARBALL := rv32emu-linux-image-prebuilt.tar.gz)
73+
else ifeq ($(call has, ARCH_TEST), 1)
74+
$(Q)$(eval PREBUILT_SAIL_FILENAME := $(shell cat $(BIN_DIR)/rv32emu-prebuilt-sail-$(HOST_PLATFORM).sha | awk '{ print $$2 };'))
75+
76+
$(Q)$(eval $(foreach FILE,$(PREBUILT_SAIL_FILENAME), \
77+
$(call verify,$(shell grep -w $(FILE) $(BIN_DIR)/rv32emu-prebuilt-sail-$(HOST_PLATFORM).sha | awk '{ print $$1 };'),$(BIN_DIR)/$(FILE),RES) \
78+
))
79+
80+
$(Q)$(eval RV32EMU_PREBUILT_TARBALL := rv32emu-prebuilt-sail-$(HOST_PLATFORM))
7081
else
7182
$(Q)$(eval PREBUILT_X86_FILENAME := $(shell cat $(BIN_DIR)/sha1sum-linux-x86-softfp | awk '{ print $$2 };'))
7283
$(Q)$(eval PREBUILT_RV32_FILENAME := $(shell cat $(BIN_DIR)/sha1sum-riscv32 | awk '{ print $$2 };'))
@@ -81,12 +92,21 @@ else
8192
$(Q)$(eval RV32EMU_PREBUILT_TARBALL := rv32emu-prebuilt.tar.gz)
8293
endif
8394

95+
ifeq ($(call has, ARCH_TEST), 1)
8496
$(Q)if [ "$(RES)" = "1" ]; then \
85-
$(PRINTF) "\n$(YELLOW)SHA-1 verification fails! Re-fetching prebuilt binaries from \"rv32emu-prebuilt\" ...\n$(NO_COLOR)"; \
86-
wget -q --show-progress https://github.com/sysprog21/rv32emu-prebuilt/releases/download/$(LATEST_RELEASE)/$(RV32EMU_PREBUILT_TARBALL) -O- | tar -C build --strip-components=1 -xz; \
97+
$(PRINTF) "\n$(YELLOW)SHA-1 verification failed! Re-fetching prebuilt binaries from \"rv32emu-prebuilt\" ...\n$(NO_COLOR)"; \
98+
wget -q --show-progress $(PREBUILT_BLOB_URL)/$(RV32EMU_PREBUILT_TARBALL) -O build/$(RV32EMU_PREBUILT_TARBALL);\
8799
else \
88100
$(call notice, [OK]); \
89101
fi
102+
else
103+
$(Q)if [ "$(RES)" = "1" ]; then \
104+
$(PRINTF) "\n$(YELLOW)SHA-1 verification failed! Re-fetching prebuilt binaries from \"rv32emu-prebuilt\" ...\n$(NO_COLOR)"; \
105+
wget -q --show-progress $(PREBUILT_BLOB_URL)/$(RV32EMU_PREBUILT_TARBALL) -O- | tar -C build --strip-components=1 -xz; \
106+
else \
107+
$(call notice, [OK]); \
108+
fi
109+
endif
90110
else
91111
ifeq ($(call has, SYSTEM), 1)
92112
$(Q)(cd $(BIN_DIR) && $(SHA1SUM) linux-image/Image >> sha1sum-linux-image)
@@ -127,13 +147,15 @@ endif
127147

128148
fetch-checksum:
129149
ifeq ($(call has, PREBUILT), 1)
130-
$(Q)$(PRINTF) "Fetching SHA-1 of prebuilt binaries ... "
150+
$(Q)$(PRINTF) "Fetching SHA-1 of prebuilt binaries ...\n"
131151
ifeq ($(call has, SYSTEM), 1)
132-
$(Q)wget -q -O $(BIN_DIR)/sha1sum-linux-image https://github.com/sysprog21/rv32emu-prebuilt/releases/download/$(LATEST_RELEASE)/sha1sum-linux-image
152+
$(Q)wget -q -O $(BIN_DIR)/sha1sum-linux-image $(PREBUILT_BLOB_URL)/sha1sum-linux-image
133153
$(Q)$(call notice, [OK])
154+
else ifeq ($(call has, ARCH_TEST), 1)
155+
$(Q)wget -q -O $(BIN_DIR)/rv32emu-prebuilt-sail-$(HOST_PLATFORM).sha $(PREBUILT_BLOB_URL)/rv32emu-prebuilt-sail-$(HOST_PLATFORM).sha
134156
else
135-
$(Q)wget -q -O $(BIN_DIR)/sha1sum-linux-x86-softfp https://github.com/sysprog21/rv32emu-prebuilt/releases/download/$(LATEST_RELEASE)/sha1sum-linux-x86-softfp
136-
$(Q)wget -q -O $(BIN_DIR)/sha1sum-riscv32 https://github.com/sysprog21/rv32emu-prebuilt/releases/download/$(LATEST_RELEASE)/sha1sum-riscv32
157+
$(Q)wget -q -O $(BIN_DIR)/sha1sum-linux-x86-softfp $(PREBUILT_BLOB_URL)/sha1sum-linux-x86-softfp
158+
$(Q)wget -q -O $(BIN_DIR)/sha1sum-riscv32 $(PREBUILT_BLOB_URL)/sha1sum-riscv32
137159
$(Q)$(call notice, [OK])
138160
endif
139161
endif

‎mk/common.mk‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,15 @@ else
55
PRINTF = env printf
66
endif
77

8+
UNAME_M := $(shell uname -m)
9+
ifeq ($(UNAME_M),x86_64)
10+
HOST_PLATFORM := x86
11+
else ifeq ($(UNAME_M),aarch64)
12+
HOST_PLATFORM := aarch64
13+
else
14+
$(error Unsupported platform.)
15+
endif
16+
817
# Control the build verbosity
918
# 'make V=1' equals to 'make VERBOSE=1'
1019
ifeq ("$(origin V)", "command line")

‎mk/riscv-arch-test.mk‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,9 @@ ifeq ($(CROSS_COMPILE),)
2020
$(error GNU Toolchain for RISC-V is required to build architecture tests. Please check package installation)
2121
endif
2222
git submodule update --init $(dir $(ARCH_TEST_DIR))
23-
$(Q)cp $(OUT)/sail_cSim/riscv_sim_RV32 tests/arch-test-target/sail_cSim/riscv_sim_RV32
24-
$(Q)python3 -B $(RISCV_TARGET)/setup.py --riscv_device=$(RISCV_DEVICE)
23+
$(Q)cp $(OUT)/rv32emu-prebuilt-sail-$(HOST_PLATFORM) tests/arch-test-target/sail_cSim/riscv_sim_RV32
24+
$(Q)chmod +x tests/arch-test-target/sail_cSim/riscv_sim_RV32
25+
$(Q)python3 -B $(RISCV_TARGET)/setup.py --riscv_device=$(RISCV_DEVICE) --hw_data_misaligned_support=$(hw_data_misaligned_support)
2526
$(Q)riscof run --work-dir=$(WORK) \
2627
--config=$(RISCV_TARGET)/config.ini \
2728
--suite=$(ARCH_TEST_SUITE) \

‎src/emulate.c‎

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -955,7 +955,10 @@ static block_t *block_find_or_translate(riscv_t *rv)
955955
return next_blk;
956956
}
957957

958-
#if RV32_HAS(JIT)
958+
/* We disable profiler to make sure every guest instructions be translated by
959+
* JIT compiler in architecture test.
960+
*/
961+
#if RV32_HAS(JIT) && !RV32_HAS(ARCH_TEST)
959962
static bool runtime_profiler(riscv_t *rv, block_t *block)
960963
{
961964
/* Based on our observations, a significant number of true hotspots are
@@ -1105,7 +1108,11 @@ void rv_step(void *arg)
11051108
prev = NULL;
11061109
continue;
11071110
} /* check if the execution path is potential hotspot */
1108-
if (block->translatable && runtime_profiler(rv, block)) {
1111+
if (block->translatable
1112+
#if !RV32_HAS(ARCH_TEST)
1113+
&& runtime_profiler(rv, block)
1114+
#endif
1115+
) {
11091116
jit_translate(rv, block);
11101117
((exec_block_func_t) state->buf)(
11111118
rv, (uintptr_t) (state->buf + block->offset));

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