diff --git a/sw/bootloader/bootloader.c b/sw/bootloader/bootloader.c index e968e05d2..131f3a1a7 100644 --- a/sw/bootloader/bootloader.c +++ b/sw/bootloader/bootloader.c @@ -1,7 +1,7 @@ // ================================================================================ // // The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 // // Copyright (c) NEORV32 contributors. // -// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved. // +// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. // // Licensed under the BSD-3-Clause license, see LICENSE for details. // // SPDX-License-Identifier: BSD-3-Clause // // ================================================================================ // diff --git a/sw/lib/include/neorv32_aux.h b/sw/lib/include/neorv32_aux.h index 2913560f0..89aafd8ce 100644 --- a/sw/lib/include/neorv32_aux.h +++ b/sw/lib/include/neorv32_aux.h @@ -9,7 +9,6 @@ /** * @file neorv32_aux.h * @brief General auxiliary functions header file. - * @see https://stnolting.github.io/neorv32/sw/files.html */ #ifndef neorv32_aux_h @@ -51,7 +50,7 @@ uint64_t neorv32_aux_hexstr2uint64(char *buffer, unsigned int length); uint32_t neorv32_aux_xorshift32(void); void neorv32_aux_itoa(char *buffer, uint32_t num, uint32_t base); void neorv32_aux_print_hw_config(void); -void neorv32_aux_print_hw_version(void); +void neorv32_aux_print_hw_version(uint32_t impid); void neorv32_aux_print_about(void); void neorv32_aux_print_logo(void); void neorv32_aux_print_license(void); diff --git a/sw/lib/source/neorv32_aux.c b/sw/lib/source/neorv32_aux.c index 424230bd1..ab98fb5ad 100644 --- a/sw/lib/source/neorv32_aux.c +++ b/sw/lib/source/neorv32_aux.c @@ -9,7 +9,6 @@ /** * @file neorv32_aux.c * @brief General auxiliary functions source file. - * @see https://stnolting.github.io/neorv32/sw/files.html */ #include @@ -302,7 +301,7 @@ void neorv32_aux_print_hw_config(void) { neorv32_cpu_csr_read(CSR_MIMPID)); // hardware version neorv32_uart0_printf(" (v"); - neorv32_aux_print_hw_version(); + neorv32_aux_print_hw_version(neorv32_cpu_csr_read(CSR_MIMPID)); neorv32_uart0_printf(")\n"); // CPU architecture and endianness @@ -535,9 +534,12 @@ void neorv32_aux_print_hw_config(void) { /**********************************************************************//** - * Print the processor version in human-readable format via UART0. + * Print processor version in human-readable format via UART0. + * + * @param[in] impid BCD-coded implementation ID (aka the version), + * typically from the mimpid CSR. **************************************************************************/ -void neorv32_aux_print_hw_version(void) { +void neorv32_aux_print_hw_version(uint32_t impid) { uint32_t i; char tmp, cnt; @@ -545,7 +547,7 @@ void neorv32_aux_print_hw_version(void) { if (neorv32_uart0_available() != 0) { // cannot output anything if UART0 is not implemented for (i=0; i<4; i++) { - tmp = (char)(neorv32_cpu_csr_read(CSR_MIMPID) >> (24 - 8*i)); + tmp = (char)(impid >> (24 - 8*i)); // serial division cnt = 0;