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Merge pull request #396 from stnolting/hdl_reworks
[rtl] minor edits and cleanups
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CHANGELOG.md

+1
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@ mimpid = 0x01040312 => 01.04.03.12 => Version 01.04.03.12 => v1.4.3.12
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| Date (*dd.mm.yyyy*) | Version | Comment |
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|:-------------------:|:-------:|:--------|
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| 24.08.2022 | 1.7.5.7 | minor rtl cleanups [#396](https://github.com/stnolting/neorv32/pull/396) |
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| 20.08.2022 | 1.7.5.6 | :sparkles: update software framework to GCC 12.1.0 (new prebuilt toolchains available!) [#391](https://github.com/stnolting/neorv32/pull/391) |
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| 18.08.2022 | 1.7.5.5 | :lock: add **TRNG** read data protection; [#389](https://github.com/stnolting/neorv32/pull/389) |
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| 18.08.2022 | 1.7.5.4 | minor rtl cleanup in **PWM** module; [#388](https://github.com/stnolting/neorv32/pull/388) |

rtl/core/neorv32_cpu_control.vhd

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Original file line numberDiff line numberDiff line change
@@ -2564,18 +2564,17 @@ begin
25642564

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-- Debug Control --------------------------------------------------------------------------
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-- -------------------------------------------------------------------------------------------
2567-
ocd_en:
2568-
if (CPU_EXTENSION_RISCV_DEBUG = true) generate
2569-
debug_control: process(rstn_i, clk_i)
2570-
begin
2571-
if (rstn_i = '0') then
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debug_ctrl.state <= DEBUG_OFFLINE;
2573-
debug_ctrl.ext_halt_req <= '0';
2574-
elsif rising_edge(clk_i) then
2575-
-- external halt request (from Debug Module) --
2576-
debug_ctrl.ext_halt_req <= db_halt_req_i;
2577-
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-- state machine --
2567+
debug_control: process(rstn_i, clk_i)
2568+
begin
2569+
if (rstn_i = '0') then
2570+
debug_ctrl.state <= DEBUG_OFFLINE;
2571+
debug_ctrl.ext_halt_req <= '0';
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elsif rising_edge(clk_i) then
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-- external halt request (from Debug Module) --
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debug_ctrl.ext_halt_req <= db_halt_req_i;
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-- state machine --
2577+
if (CPU_EXTENSION_RISCV_DEBUG = true) then
25792578
case debug_ctrl.state is
25802579

25812580
when DEBUG_OFFLINE => -- not in debug mode, waiting for entering request
@@ -2605,9 +2604,11 @@ begin
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debug_ctrl.state <= DEBUG_OFFLINE;
26062605

26072606
end case;
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else -- debug mode not implemented
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debug_ctrl.state <= DEBUG_OFFLINE;
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end if;
2609-
end process debug_control;
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end generate; --/ocd_en
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end if;
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end process debug_control;
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26122613
-- CPU is *in* debug mode --
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debug_ctrl.running <= '1' when ((debug_ctrl.state = DEBUG_ONLINE) or (debug_ctrl.state = DEBUG_EXIT)) and (CPU_EXTENSION_RISCV_DEBUG = true) else '0';

rtl/core/neorv32_cpu_cp_shifter.vhd

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Original file line numberDiff line numberDiff line change
@@ -70,7 +70,6 @@ architecture neorv32_cpu_cp_shifter_rtl of neorv32_cpu_cp_shifter is
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done : std_ulogic;
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cnt : std_ulogic_vector(index_size_f(data_width_c)-1 downto 0);
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sreg : std_ulogic_vector(data_width_c-1 downto 0);
73-
res : std_ulogic_vector(data_width_c-1 downto 0);
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end record;
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signal shifter : shifter_t;
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rtl/core/neorv32_fifo.vhd

+8-1
Original file line numberDiff line numberDiff line change
@@ -163,7 +163,14 @@ begin
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-- "asynchronous" read --
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fifo_read_async:
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if (FIFO_RSYNC = false) generate
166-
rdata_o <= fifo.buf when (FIFO_DEPTH = 1) else fifo.data(to_integer(unsigned(fifo.r_pnt(fifo.r_pnt'left-1 downto 0))));
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fifo_read: process(fifo)
167+
begin
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if (FIFO_DEPTH = 1) then
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rdata_o <= fifo.buf;
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else
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rdata_o <= fifo.data(to_integer(unsigned(fifo.r_pnt(fifo.r_pnt'left-1 downto 0))));
172+
end if;
173+
end process fifo_read;
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end generate;
168175

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-- synchronous read --

rtl/core/neorv32_package.vhd

+29-1
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ package neorv32_package is
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-- Architecture Constants (do not modify!) ------------------------------------------------
6464
-- -------------------------------------------------------------------------------------------
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constant data_width_c : natural := 32; -- native data path width - do not change!
66-
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01070506"; -- NEORV32 version - no touchy!
66+
constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01070507"; -- NEORV32 version - no touchy!
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constant archid_c : natural := 19; -- official RISC-V architecture ID - hands off!
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-- Check if we're inside the Matrix -------------------------------------------------------
@@ -111,6 +111,7 @@ package neorv32_package is
111111
function xor_reduce_f(a : std_ulogic_vector) return std_ulogic;
112112
function to_hexchar_f(input : std_ulogic_vector(3 downto 0)) return character;
113113
function to_hstring32_f(input : std_ulogic_vector(31 downto 0)) return string;
114+
function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector;
114115
function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector;
115116
function is_power_of_two_f(input : natural) return boolean;
116117
function bswap32_f(input : std_ulogic_vector) return std_ulogic_vector;
@@ -2396,6 +2397,33 @@ package body neorv32_package is
23962397
return res_v;
23972398
end function to_hstring32_f;
23982399

2400+
-- Function: Convert hex char to 4-bit std_ulogic_vector ----------------------------------
2401+
-- -------------------------------------------------------------------------------------------
2402+
function hexchar_to_stdulogicvector_f(input : character) return std_ulogic_vector is
2403+
variable res_v : std_ulogic_vector(3 downto 0);
2404+
begin
2405+
case input is
2406+
when '0' => res_v := x"0";
2407+
when '1' => res_v := x"1";
2408+
when '2' => res_v := x"2";
2409+
when '3' => res_v := x"3";
2410+
when '4' => res_v := x"4";
2411+
when '5' => res_v := x"5";
2412+
when '6' => res_v := x"6";
2413+
when '7' => res_v := x"7";
2414+
when '8' => res_v := x"8";
2415+
when '9' => res_v := x"9";
2416+
when 'a' | 'A' => res_v := x"a";
2417+
when 'b' | 'B' => res_v := x"b";
2418+
when 'c' | 'C' => res_v := x"c";
2419+
when 'd' | 'D' => res_v := x"d";
2420+
when 'e' | 'E' => res_v := x"e";
2421+
when 'f' | 'F' => res_v := x"f";
2422+
when others => res_v := x"0";
2423+
end case;
2424+
return res_v;
2425+
end function hexchar_to_stdulogicvector_f;
2426+
23992427
-- Function: Bit reversal -----------------------------------------------------------------
24002428
-- -------------------------------------------------------------------------------------------
24012429
function bit_rev_f(input : std_ulogic_vector) return std_ulogic_vector is

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