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[control] minor logic optimization
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rtl/core/neorv32_cpu_control.vhd

+1-3
Original file line numberDiff line numberDiff line change
@@ -816,9 +816,7 @@ begin
816816
(trap_ctrl.exc_buf(exc_saccess_c) = '1') or (trap_ctrl.exc_buf(exc_laccess_c) = '1') or -- access exception
817817
(trap_ctrl.exc_buf(exc_salign_c) = '1') or (trap_ctrl.exc_buf(exc_lalign_c) = '1') or -- alignment exception
818818
(trap_ctrl.exc_buf(exc_illegal_c) = '1') then -- illegal instruction exception
819-
if (RISCV_ISA_Zaamo and (opcode(2) = opcode_amo_c(2))) or (opcode(5) = '0') then -- atomic operation / normal load
820-
ctrl_nxt.rf_wb_en <= '1'; -- allow write-back to register file (won't happen in case of exception)
821-
end if;
819+
ctrl_nxt.rf_wb_en <= not ctrl.lsu_rw; -- write-back to register file if read operation (won't happen in case of exception)
822820
exe_engine_nxt.state <= EX_DISPATCH;
823821
end if;
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