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Revert "Remove limb_width32 and limb_width64 features"
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This reverts commit c754f03.
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osiewicz committed Sep 11, 2023
1 parent 16e04ce commit 89a2741
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Showing 5 changed files with 73 additions and 75 deletions.
36 changes: 36 additions & 0 deletions build.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
use std::env;
use std::process::Command;
use std::str::{self, FromStr};

fn main() {
println!("cargo:rerun-if-changed=build.rs");

// Decide ideal limb width for arithmetic in the float parser. Refer to
// src/lexical/math.rs for where this has an effect.
let target_arch = env::var("CARGO_CFG_TARGET_ARCH").unwrap();
match target_arch.as_str() {
"aarch64" | "mips64" | "powerpc64" | "x86_64" => {
println!("cargo:rustc-cfg=limb_width_64");
}
_ => {
println!("cargo:rustc-cfg=limb_width_32");
}
}

let minor = match rustc_minor_version() {
Some(minor) => minor,
None => return,
};
}

fn rustc_minor_version() -> Option<u32> {
let rustc = env::var_os("RUSTC")?;
let output = Command::new(rustc).arg("--version").output().ok()?;
let version = str::from_utf8(&output.stdout).ok()?;
let mut pieces = version.split('.');
if pieces.next() != Some("rustc 1") {
return None;
}
let next = pieces.next()?;
u32::from_str(next).ok()
}
86 changes: 25 additions & 61 deletions src/lexical/math.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@
//! buffers, so for a `vec![0, 1, 2, 3]`, `3` is the most significant limb,
//! and `0` is the least significant limb.

use super::large_powers;
use super::num::*;
use super::small_powers::*;
use alloc::vec::Vec;
Expand Down Expand Up @@ -35,58 +36,31 @@ use core::{cmp, iter, mem};
// requiring software emulation.
// sparc64 (`UMUL` only supported double-word arguments).

#[doc(hidden)]
pub trait LimbConfig {
type Limb: 'static;
type Wide: 'static;
const POW5_LIMB: &'static [Self::Limb];
const POW10_LIMB: &'static [Self::Limb];
const LARGE_POWERS: &'static [&'static [Self::Limb]];
}

// 32-BIT LIMB
#[doc(hidden)]
pub struct LimbConfig32;

impl LimbConfig for LimbConfig32 {
type Limb = u32;
type Wide = u64;
const POW5_LIMB: &'static [Self::Limb] = &POW5_32;
const POW10_LIMB: &'static [Self::Limb] = &POW10_32;
const LARGE_POWERS: &'static [&'static [Self::Limb]] = &super::large_powers32::POW5;
}
#[cfg(limb_width_32)]
pub type Limb = u32;

#[cfg(limb_width_32)]
pub const POW5_LIMB: &[Limb] = &POW5_32;

#[cfg(limb_width_32)]
pub const POW10_LIMB: &[Limb] = &POW10_32;

#[cfg(limb_width_32)]
type Wide = u64;

// 64-BIT LIMB
#[doc(hidden)]
pub struct LimbConfig64;
impl LimbConfig for LimbConfig64 {
type Limb = u64;
type Wide = u128;
const POW5_LIMB: &'static [Self::Limb] = &POW5_64;
const POW10_LIMB: &'static [Self::Limb] = &POW10_64;
const LARGE_POWERS: &'static [&'static [Self::Limb]] = &super::large_powers64::POW5;
}
#[cfg(limb_width_64)]
pub type Limb = u64;

#[cfg(limb_width_64)]
pub const POW5_LIMB: &[Limb] = &POW5_64;

#[cfg(limb_width_64)]
pub const POW10_LIMB: &[Limb] = &POW10_64;

#[cfg(any(
target_arch = "aarch64",
target_arch = "mips64",
target_arch = "powerpc64",
target_arch = "x86_64"
))]
type PlatformLimbConfig = LimbConfig64;
#[cfg(not(any(
target_arch = "aarch64",
target_arch = "mips64",
target_arch = "powerpc64",
target_arch = "x86_64"
)))]
type PlatformLimbConfig = LimbConfig32;

pub type Limb = <PlatformLimbConfig as LimbConfig>::Limb;
type Wide = <PlatformLimbConfig as LimbConfig>::Wide;
pub const POW5_LIMB: &[Limb] = PlatformLimbConfig::POW5_LIMB;
pub const POW10_LIMB: &[Limb] = PlatformLimbConfig::POW10_LIMB;
const LARGE_POWERS: &'static [&'static [Limb]] = PlatformLimbConfig::LARGE_POWERS;
#[cfg(limb_width_64)]
type Wide = u128;

/// Cast to limb type.
#[inline]
Expand All @@ -105,24 +79,14 @@ fn as_wide<T: Integer>(t: T) -> Wide {

/// Split u64 into limbs, in little-endian order.
#[inline]
#[cfg(not(any(
target_arch = "aarch64",
target_arch = "mips64",
target_arch = "powerpc64",
target_arch = "x86_64"
)))]
#[cfg(limb_width_32)]
fn split_u64(x: u64) -> [Limb; 2] {
[as_limb(x), as_limb(x >> 32)]
}

/// Split u64 into limbs, in little-endian order.
#[inline]
#[cfg(any(
target_arch = "aarch64",
target_arch = "mips64",
target_arch = "powerpc64",
target_arch = "x86_64"
))]
#[cfg(limb_width_64)]
fn split_u64(x: u64) -> [Limb; 1] {
[as_limb(x)]
}
Expand Down Expand Up @@ -427,7 +391,7 @@ mod small {
use super::large::KARATSUBA_CUTOFF;

let small_powers = POW5_LIMB;
let large_powers = LARGE_POWERS;
let large_powers = large_powers::POW5;

if n == 0 {
// No exponent, just return.
Expand Down
9 changes: 7 additions & 2 deletions src/lexical/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -20,14 +20,19 @@ mod digit;
mod errors;
pub(crate) mod exponent;
pub(crate) mod float;
mod large_powers32;
mod large_powers64;
mod large_powers;
pub(crate) mod math;
pub(crate) mod num;
pub(crate) mod parse;
pub(crate) mod rounding;
mod shift;
mod small_powers;

#[cfg(limb_width_32)]
mod large_powers32;

#[cfg(limb_width_64)]
mod large_powers64;

// API
pub use self::parse::{parse_concise_float, parse_truncated_float};
3 changes: 3 additions & 0 deletions src/lexical/small_powers.rs
Original file line number Diff line number Diff line change
Expand Up @@ -3,16 +3,19 @@
//! Pre-computed small powers.

// 32 BIT
#[cfg(limb_width_32)]
pub(crate) const POW5_32: [u32; 14] = [
1, 5, 25, 125, 625, 3125, 15625, 78125, 390625, 1953125, 9765625, 48828125, 244140625,
1220703125,
];

#[cfg(limb_width_32)]
pub(crate) const POW10_32: [u32; 10] = [
1, 10, 100, 1000, 10000, 100000, 1000000, 10000000, 100000000, 1000000000,
];

// 64 BIT
#[cfg(limb_width_64)]
pub(crate) const POW5_64: [u64; 28] = [
1,
5,
Expand Down
14 changes: 2 additions & 12 deletions tests/lexical/math.rs
Original file line number Diff line number Diff line change
Expand Up @@ -18,22 +18,12 @@ impl Math for Bigint {
}
}

#[cfg(not(any(
target_arch = "aarch64",
target_arch = "mips64",
target_arch = "powerpc64",
target_arch = "x86_64"
)))]
#[cfg(limb_width_32)]
pub(crate) fn from_u32(x: &[u32]) -> Vec<Limb> {
x.iter().cloned().collect()
}

#[cfg(any(
target_arch = "aarch64",
target_arch = "mips64",
target_arch = "powerpc64",
target_arch = "x86_64"
))]
#[cfg(limb_width_64)]
pub(crate) fn from_u32(x: &[u32]) -> Vec<Limb> {
let mut v = Vec::<Limb>::default();
for xi in x.chunks(2) {
Expand Down

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