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carlescufihenrikbrixandersen
carlescufi
authored and
henrikbrixandersen
committed
boards: nordic: nRF54L15DK: Add basic support for the L05 and L10 ICs
The nRF54L05 and nRF54L10 are identical to the nRF54L15 except for their memory sizes. Add support for emulating those ICs on the nRF54L15DK. This commit only adds support for the main application core. Support for the FLPR core may be added later. Signed-off-by: Carles Cufi <[email protected]>
1 parent 1b84958 commit 2147577

21 files changed

+403
-41
lines changed

‎boards/nordic/nrf54l15dk/Kconfig.defconfig

+4-2
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,14 @@
11
# Copyright (c) 2024 Nordic Semiconductor ASA
22
# SPDX-License-Identifier: Apache-2.0
33

4-
if BOARD_NRF54L15DK_NRF54L15_CPUAPP
4+
if BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \
5+
BOARD_NRF54L15DK_NRF54L15_CPUAPP
56

67
config BT_CTLR
78
default BT
89

910
config ROM_START_OFFSET
1011
default 0x800 if BOOTLOADER_MCUBOOT
1112

12-
endif # BOARD_NRF54L15DK_NRF54L15_CPUAPP
13+
endif # BOARD_NRF54L15DK_NRF54L05_CPUAPP || BOARD_NRF54L15DK_NRF54L10_CPUAPP || \
14+
# BOARD_NRF54L15DK_NRF54L15_CPUAPP

‎boards/nordic/nrf54l15dk/Kconfig.nrf54l15dk

+2
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,8 @@
22
# SPDX-License-Identifier: Apache-2.0
33

44
config BOARD_NRF54L15DK
5+
select SOC_NRF54L05_CPUAPP if BOARD_NRF54L15DK_NRF54L05_CPUAPP
6+
select SOC_NRF54L10_CPUAPP if BOARD_NRF54L15DK_NRF54L10_CPUAPP
57
select SOC_NRF54L15_CPUAPP if BOARD_NRF54L15DK_NRF54L15_CPUAPP
68
select SOC_NRF54L15_CPUFLPR if BOARD_NRF54L15DK_NRF54L15_CPUFLPR || \
79
BOARD_NRF54L15DK_NRF54L15_CPUFLPR_XIP

‎boards/nordic/nrf54l15dk/board.cmake

+4-2
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@@ -1,9 +1,11 @@
11
# Copyright (c) 2024 Nordic Semiconductor ASA
22
# SPDX-License-Identifier: Apache-2.0
33

4-
if(CONFIG_SOC_NRF54L15_CPUAPP)
4+
if(CONFIG_SOC_NRF54L05_CPUAPP OR CONFIG_SOC_NRF54L10_CPUAPP OR
5+
CONFIG_SOC_NRF54L15_CPUAPP)
56
board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
6-
elseif(CONFIG_SOC_NRF54L15_CPUFLPR)
7+
elseif(CONFIG_SOC_NRF54L05_CPUFLPR OR CONFIG_SOC_NRF54L10_CPUFLPR OR
8+
CONFIG_SOC_NRF54L15_CPUFLPR)
79
board_runner_args(jlink "--speed=4000")
810
endif()
911

‎boards/nordic/nrf54l15dk/board.yml

+2
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,8 @@ board:
33
full_name: nRF54L15 DK
44
vendor: nordic
55
socs:
6+
- name: nrf54l05
7+
- name: nrf54l10
68
- name: nrf54l15
79
variants:
810
- name: xip

‎boards/nordic/nrf54l15dk/nrf54l15dk_common.dtsi

+1-1
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
* SPDX-License-Identifier: Apache-2.0
55
*/
66

7-
#include "nrf54l15dk_nrf54l15-pinctrl.dtsi"
7+
#include "nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi"
88

99
/ {
1010
leds {

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.dts

+63
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,63 @@
1+
/*
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* Copyright (c) 2024 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/dts-v1/;
8+
9+
#include <nordic/nrf54l05_cpuapp.dtsi>
10+
#include "nrf54l_05_10_15_cpuapp_common.dtsi"
11+
12+
/ {
13+
compatible = "nordic,nrf54l15dk_nrf54l05-cpuapp";
14+
model = "Nordic nRF54L15 DK nRF54L05 Application MCU";
15+
16+
chosen {
17+
zephyr,code-partition = &slot0_partition;
18+
zephyr,sram = &cpuapp_sram;
19+
};
20+
};
21+
22+
/* FLPR not supported yet, give all SRAM and RRAM to the APP core */
23+
&cpuapp_sram {
24+
reg = <0x20000000 DT_SIZE_K(96)>;
25+
ranges = <0x0 0x20000000 DT_SIZE_K(96)>;
26+
};
27+
28+
&cpuapp_rram {
29+
reg = <0x0 DT_SIZE_K(500)>;
30+
};
31+
32+
/* These partition sizes assume no FLPR area in RRAM */
33+
&cpuapp_rram {
34+
partitions {
35+
compatible = "fixed-partitions";
36+
#address-cells = <1>;
37+
#size-cells = <1>;
38+
boot_partition: partition@0 {
39+
label = "mcuboot";
40+
reg = <0x0 DT_SIZE_K(64)>;
41+
};
42+
slot0_partition: partition@10000 {
43+
label = "image-0";
44+
reg = <0x10000 DT_SIZE_K(100)>;
45+
};
46+
slot0_ns_partition: partition@29000 {
47+
label = "image-0-nonsecure";
48+
reg = <0x29000 DT_SIZE_K(100)>;
49+
};
50+
slot1_partition: partition@42000 {
51+
label = "image-1";
52+
reg = <0x42000 DT_SIZE_K(100)>;
53+
};
54+
slot1_ns_partition: partition@5b000 {
55+
label = "image-1-nonsecure";
56+
reg = <0x5b000 DT_SIZE_K(100)>;
57+
};
58+
storage_partition: partition@74000 {
59+
label = "storage";
60+
reg = <0x74000 DT_SIZE_K(36)>;
61+
};
62+
};
63+
};

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp.yaml

+24
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
# Copyright (c) 2024 Nordic Semiconductor ASA
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
identifier: nrf54l15dk/nrf54l05/cpuapp
5+
name: nRF54L15-DK-nRF54L05-Application
6+
type: mcu
7+
arch: arm
8+
toolchain:
9+
- gnuarmemb
10+
- xtools
11+
- zephyr
12+
sysbuild: true
13+
ram: 96
14+
flash: 100
15+
supported:
16+
- adc
17+
- counter
18+
- gpio
19+
- i2c
20+
- pwm
21+
- retained_mem
22+
- spi
23+
- watchdog
24+
- i2s

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l05_cpuapp_defconfig

+29
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
# Copyright (c) 2024 Nordic Semiconductor ASA
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
# Enable UART driver
5+
CONFIG_SERIAL=y
6+
7+
# Enable console
8+
CONFIG_CONSOLE=y
9+
CONFIG_UART_CONSOLE=y
10+
11+
# Enable GPIO
12+
CONFIG_GPIO=y
13+
14+
# Enable MPU
15+
CONFIG_ARM_MPU=y
16+
17+
# Enable hardware stack protection
18+
CONFIG_HW_STACK_PROTECTION=y
19+
20+
# MPU-based null-pointer dereferencing detection cannot
21+
# be applied as the (0x0 - 0x400) is unmapped for this target.
22+
CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
23+
24+
# Enable Cache
25+
CONFIG_CACHE_MANAGEMENT=y
26+
CONFIG_EXTERNAL_CACHE=y
27+
28+
# Start SYSCOUNTER on driver init
29+
CONFIG_NRF_GRTC_START_SYSCOUNTER=y

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.dts

+63
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,63 @@
1+
/*
2+
* Copyright (c) 2024 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/dts-v1/;
8+
9+
#include <nordic/nrf54l10_cpuapp.dtsi>
10+
#include "nrf54l_05_10_15_cpuapp_common.dtsi"
11+
12+
/ {
13+
compatible = "nordic,nrf54l15dk_nrf54l10-cpuapp";
14+
model = "Nordic nRF54L15 DK nRF54L10 Application MCU";
15+
16+
chosen {
17+
zephyr,code-partition = &slot0_partition;
18+
zephyr,sram = &cpuapp_sram;
19+
};
20+
};
21+
22+
/* FLPR not supported yet, give all SRAM and RRAM to the APP core */
23+
&cpuapp_sram {
24+
reg = <0x20000000 DT_SIZE_K(192)>;
25+
ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
26+
};
27+
28+
&cpuapp_rram {
29+
reg = <0x0 DT_SIZE_K(1022)>;
30+
};
31+
32+
/* These partition sizes assume no FLPR area in RRAM */
33+
&cpuapp_rram {
34+
partitions {
35+
compatible = "fixed-partitions";
36+
#address-cells = <1>;
37+
#size-cells = <1>;
38+
boot_partition: partition@0 {
39+
label = "mcuboot";
40+
reg = <0x0 DT_SIZE_K(64)>;
41+
};
42+
slot0_partition: partition@10000 {
43+
label = "image-0";
44+
reg = <0x10000 DT_SIZE_K(230)>;
45+
};
46+
slot0_ns_partition: partition@49800 {
47+
label = "image-0-nonsecure";
48+
reg = <0x49800 DT_SIZE_K(230)>;
49+
};
50+
slot1_partition: partition@83000 {
51+
label = "image-1";
52+
reg = <0x83000 DT_SIZE_K(230)>;
53+
};
54+
slot1_ns_partition: partition@bc800 {
55+
label = "image-1-nonsecure";
56+
reg = <0xbc800 DT_SIZE_K(230)>;
57+
};
58+
storage_partition: partition@f6000 {
59+
label = "storage";
60+
reg = <0xf6000 DT_SIZE_K(38)>;
61+
};
62+
};
63+
};

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp.yaml

+24
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
# Copyright (c) 2024 Nordic Semiconductor ASA
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
identifier: nrf54l15dk/nrf54l10/cpuapp
5+
name: nRF54L15-DK-nRF54L10-Application
6+
type: mcu
7+
arch: arm
8+
toolchain:
9+
- gnuarmemb
10+
- xtools
11+
- zephyr
12+
sysbuild: true
13+
ram: 192
14+
flash: 230
15+
supported:
16+
- adc
17+
- counter
18+
- gpio
19+
- i2c
20+
- pwm
21+
- retained_mem
22+
- spi
23+
- watchdog
24+
- i2s

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l10_cpuapp_defconfig

+29
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@@ -0,0 +1,29 @@
1+
# Copyright (c) 2024 Nordic Semiconductor ASA
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
# Enable UART driver
5+
CONFIG_SERIAL=y
6+
7+
# Enable console
8+
CONFIG_CONSOLE=y
9+
CONFIG_UART_CONSOLE=y
10+
11+
# Enable GPIO
12+
CONFIG_GPIO=y
13+
14+
# Enable MPU
15+
CONFIG_ARM_MPU=y
16+
17+
# Enable hardware stack protection
18+
CONFIG_HW_STACK_PROTECTION=y
19+
20+
# MPU-based null-pointer dereferencing detection cannot
21+
# be applied as the (0x0 - 0x400) is unmapped for this target.
22+
CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y
23+
24+
# Enable Cache
25+
CONFIG_CACHE_MANAGEMENT=y
26+
CONFIG_EXTERNAL_CACHE=y
27+
28+
# Start SYSCOUNTER on driver init
29+
CONFIG_NRF_GRTC_START_SYSCOUNTER=y

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15_cpuapp.dts

+35-1
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,8 @@
66

77
/dts-v1/;
88

9-
#include "nrf54l15_cpuapp_common.dtsi"
9+
#include <nordic/nrf54l15_cpuapp.dtsi>
10+
#include "nrf54l_05_10_15_cpuapp_common.dtsi"
1011

1112
/ {
1213
compatible = "nordic,nrf54l15dk_nrf54l15-cpuapp";
@@ -17,3 +18,36 @@
1718
zephyr,sram = &cpuapp_sram;
1819
};
1920
};
21+
22+
&cpuapp_rram {
23+
partitions {
24+
compatible = "fixed-partitions";
25+
#address-cells = <1>;
26+
#size-cells = <1>;
27+
boot_partition: partition@0 {
28+
label = "mcuboot";
29+
reg = <0x0 DT_SIZE_K(64)>;
30+
};
31+
slot0_partition: partition@10000 {
32+
label = "image-0";
33+
reg = <0x10000 DT_SIZE_K(324)>;
34+
};
35+
slot0_ns_partition: partition@61000 {
36+
label = "image-0-nonsecure";
37+
reg = <0x61000 DT_SIZE_K(324)>;
38+
};
39+
slot1_partition: partition@b2000 {
40+
label = "image-1";
41+
reg = <0xb2000 DT_SIZE_K(324)>;
42+
};
43+
slot1_ns_partition: partition@103000 {
44+
label = "image-1-nonsecure";
45+
reg = <0x103000 DT_SIZE_K(324)>;
46+
};
47+
/* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */
48+
storage_partition: partition@15c000 {
49+
label = "storage";
50+
reg = <0x15c000 DT_SIZE_K(36)>;
51+
};
52+
};
53+
};

‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l15-pinctrl.dtsi renamed to ‎boards/nordic/nrf54l15dk/nrf54l15dk_nrf54l_05_10_15-pinctrl.dtsi

File renamed without changes.

‎boards/nordic/nrf54l15dk/nrf54l15_cpuapp_common.dtsi renamed to ‎boards/nordic/nrf54l15dk/nrf54l_05_10_15_cpuapp_common.dtsi

-34
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@@ -6,7 +6,6 @@
66

77
/* This file is common to the secure and non-secure domain */
88

9-
#include <nordic/nrf54l15_cpuapp.dtsi>
109
#include "nrf54l15dk_common.dtsi"
1110

1211
/ {
@@ -52,39 +51,6 @@
5251
status = "okay";
5352
};
5453

55-
&cpuapp_rram {
56-
partitions {
57-
compatible = "fixed-partitions";
58-
#address-cells = <1>;
59-
#size-cells = <1>;
60-
boot_partition: partition@0 {
61-
label = "mcuboot";
62-
reg = <0x0 DT_SIZE_K(64)>;
63-
};
64-
slot0_partition: partition@10000 {
65-
label = "image-0";
66-
reg = <0x10000 DT_SIZE_K(324)>;
67-
};
68-
slot0_ns_partition: partition@61000 {
69-
label = "image-0-nonsecure";
70-
reg = <0x61000 DT_SIZE_K(324)>;
71-
};
72-
slot1_partition: partition@b2000 {
73-
label = "image-1";
74-
reg = <0xb2000 DT_SIZE_K(324)>;
75-
};
76-
slot1_ns_partition: partition@103000 {
77-
label = "image-1-nonsecure";
78-
reg = <0x103000 DT_SIZE_K(324)>;
79-
};
80-
/* 32k from 0x154000 to 0x15bfff reserved for TF-M partitions */
81-
storage_partition: partition@15c000 {
82-
label = "storage";
83-
reg = <0x15c000 DT_SIZE_K(36)>;
84-
};
85-
};
86-
};
87-
8854
&uart20 {
8955
status = "okay";
9056
};

‎samples/drivers/watchdog/boards/nrf54l15dk_nrf54l05_cpuapp.overlay

+8
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@@ -0,0 +1,8 @@
1+
/*
2+
* Copyright 2024 Nordic Semiconductor ASA
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
&wdt31 {
7+
status = "okay";
8+
};

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