@@ -379,6 +379,16 @@ impl VcpuFd {
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/// Returns the vCPU general purpose registers.
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#[ cfg( target_arch = "x86_64" ) ]
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pub fn get_regs ( & self ) -> Result < StandardRegisters > {
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+ if self . vp_page . is_some ( ) {
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+ self . get_standard_regs_vp_page ( )
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+ } else {
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+ self . get_standard_regs_ioctl ( )
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+ }
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+ }
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+
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+ /// Returns the vCPU general purpose registers using IOCTL
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+ #[ cfg( not( target_arch = "aarch64" ) ) ]
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+ fn get_standard_regs_ioctl ( & self ) -> Result < StandardRegisters > {
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let reg_names = [
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hv_register_name_HV_X64_REGISTER_RAX,
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hv_register_name_HV_X64_REGISTER_RBX,
@@ -499,6 +509,37 @@ impl VcpuFd {
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}
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Ok ( ret_regs)
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}
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+
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+ /// Returns the vCPU general purpose registers using VP register page
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+ #[ cfg( not( target_arch = "aarch64" ) ) ]
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+ pub fn get_standard_regs_vp_page ( & self ) -> Result < StandardRegisters > {
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+ let vp_reg_page = self . get_vp_reg_page ( ) . unwrap ( ) . 0 ;
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+ let mut ret_regs = StandardRegisters :: default ( ) ;
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+ // SAFETY: access union fields
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+ unsafe {
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+ ret_regs. rax = get_gp_regs_field_ptr ! ( vp_reg_page, rax) ;
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+ ret_regs. rbx = get_gp_regs_field_ptr ! ( vp_reg_page, rbx) ;
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+ ret_regs. rcx = get_gp_regs_field_ptr ! ( vp_reg_page, rcx) ;
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+ ret_regs. rdx = get_gp_regs_field_ptr ! ( vp_reg_page, rdx) ;
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+ ret_regs. rsi = get_gp_regs_field_ptr ! ( vp_reg_page, rsi) ;
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+ ret_regs. rdi = get_gp_regs_field_ptr ! ( vp_reg_page, rdi) ;
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+ ret_regs. rsp = get_gp_regs_field_ptr ! ( vp_reg_page, rsp) ;
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+ ret_regs. rbp = get_gp_regs_field_ptr ! ( vp_reg_page, rbp) ;
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+ ret_regs. r8 = get_gp_regs_field_ptr ! ( vp_reg_page, r8) ;
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+ ret_regs. r9 = get_gp_regs_field_ptr ! ( vp_reg_page, r9) ;
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+ ret_regs. r10 = get_gp_regs_field_ptr ! ( vp_reg_page, r10) ;
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+ ret_regs. r11 = get_gp_regs_field_ptr ! ( vp_reg_page, r11) ;
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+ ret_regs. r12 = get_gp_regs_field_ptr ! ( vp_reg_page, r12) ;
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+ ret_regs. r13 = get_gp_regs_field_ptr ! ( vp_reg_page, r13) ;
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+ ret_regs. r14 = get_gp_regs_field_ptr ! ( vp_reg_page, r14) ;
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+ ret_regs. r15 = get_gp_regs_field_ptr ! ( vp_reg_page, r15) ;
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+ ret_regs. rip = ( * vp_reg_page) . __bindgen_anon_1 . __bindgen_anon_1 . rip ;
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+ ret_regs. rflags = ( * vp_reg_page) . __bindgen_anon_1 . __bindgen_anon_1 . rflags ;
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+ }
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+
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+ Ok ( ret_regs)
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+ }
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+
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/// Returns the vCPU special registers.
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#[ cfg( not( target_arch = "aarch64" ) ) ]
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pub fn get_sregs ( & self ) -> Result < SpecialRegisters > {
@@ -570,6 +611,7 @@ impl VcpuFd {
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Ok ( ret_regs)
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}
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+
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/// Sets the vCPU special registers
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#[ cfg( not( target_arch = "aarch64" ) ) ]
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pub fn set_sregs ( & self , sregs : & SpecialRegisters ) -> Result < ( ) > {
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