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Put common code for the port and MMIO in a trait #38

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ChocolateLoverRaj opened this issue Feb 25, 2025 · 0 comments · May be fixed by #39
Open

Put common code for the port and MMIO in a trait #38

ChocolateLoverRaj opened this issue Feb 25, 2025 · 0 comments · May be fixed by #39

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@ChocolateLoverRaj
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I will make a PR for this.
@ChocolateLoverRaj ChocolateLoverRaj linked a pull request Feb 25, 2025 that will close this issue
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Use traits for register and uart ChocolateLoverRaj/uart_16550
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@ChocolateLoverRaj