@@ -1037,6 +1037,19 @@ fn llvm_fixup_input<'ll, 'tcx>(
10371037 value
10381038 }
10391039 }
1040+ (
1041+ InlineAsmRegClass :: Arm (
1042+ ArmInlineAsmRegClass :: dreg
1043+ | ArmInlineAsmRegClass :: dreg_low8
1044+ | ArmInlineAsmRegClass :: dreg_low16
1045+ | ArmInlineAsmRegClass :: qreg
1046+ | ArmInlineAsmRegClass :: qreg_low4
1047+ | ArmInlineAsmRegClass :: qreg_low8,
1048+ ) ,
1049+ Abi :: Vector { element, count : count @ ( 4 | 8 ) } ,
1050+ ) if element. primitive ( ) == Primitive :: Float ( Float :: F16 ) => {
1051+ bx. bitcast ( value, bx. type_vector ( bx. type_i16 ( ) , count) )
1052+ }
10401053 ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => {
10411054 match s. primitive ( ) {
10421055 // MIPS only supports register-length arithmetics.
@@ -1158,6 +1171,19 @@ fn llvm_fixup_output<'ll, 'tcx>(
11581171 value
11591172 }
11601173 }
1174+ (
1175+ InlineAsmRegClass :: Arm (
1176+ ArmInlineAsmRegClass :: dreg
1177+ | ArmInlineAsmRegClass :: dreg_low8
1178+ | ArmInlineAsmRegClass :: dreg_low16
1179+ | ArmInlineAsmRegClass :: qreg
1180+ | ArmInlineAsmRegClass :: qreg_low4
1181+ | ArmInlineAsmRegClass :: qreg_low8,
1182+ ) ,
1183+ Abi :: Vector { element, count : count @ ( 4 | 8 ) } ,
1184+ ) if element. primitive ( ) == Primitive :: Float ( Float :: F16 ) => {
1185+ bx. bitcast ( value, bx. type_vector ( bx. type_f16 ( ) , count) )
1186+ }
11611187 ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => {
11621188 match s. primitive ( ) {
11631189 // MIPS only supports register-length arithmetics.
@@ -1270,6 +1296,19 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
12701296 layout. llvm_type ( cx)
12711297 }
12721298 }
1299+ (
1300+ InlineAsmRegClass :: Arm (
1301+ ArmInlineAsmRegClass :: dreg
1302+ | ArmInlineAsmRegClass :: dreg_low8
1303+ | ArmInlineAsmRegClass :: dreg_low16
1304+ | ArmInlineAsmRegClass :: qreg
1305+ | ArmInlineAsmRegClass :: qreg_low4
1306+ | ArmInlineAsmRegClass :: qreg_low8,
1307+ ) ,
1308+ Abi :: Vector { element, count : count @ ( 4 | 8 ) } ,
1309+ ) if element. primitive ( ) == Primitive :: Float ( Float :: F16 ) => {
1310+ cx. type_vector ( cx. type_i16 ( ) , count)
1311+ }
12731312 ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => {
12741313 match s. primitive ( ) {
12751314 // MIPS only supports register-length arithmetics.
0 commit comments