From c2a13dac1a8564a4087fbf5f10bc3a73e9428b14 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 8 Aug 2017 16:36:50 +1200 Subject: [PATCH 01/25] Split out endian + added encode function --- src/endian.rs | 72 +++++++++++++++++++++++++++++++++++++++++++++++++++ src/lib.rs | 26 +++---------------- 2 files changed, 76 insertions(+), 22 deletions(-) create mode 100644 src/endian.rs diff --git a/src/endian.rs b/src/endian.rs new file mode 100644 index 00000000..7603bd13 --- /dev/null +++ b/src/endian.rs @@ -0,0 +1,72 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum Endian { + Little, + Big, + Selectable, + Other +} + +impl Endian { + pub fn parse(tree: &Element) -> Endian { + let text = try!(tree.text.as_ref()); + + match &text[..] { + "little" => Endian::Little, + "big" => Endian::Big, + "selectable" => Endian::Selectable, + "other" => Endian::Other, + _ => panic!("unknown endian variant: {}", text), + } + } + + pub fn encode(&self) -> Element { + let text = match *self { + Endian::Little => String::from("little"), + Endian::Big => String::from("big"), + Endian::Selectable => String::from("selectable"), + Endian::Other => String::from("other"), + }; + + Element{ + name: String::from("endian"), + attributes: HashMap::new(), + children: Vec::new(), + text: Some(text), + } + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let types = vec![ + (Endian::Little, String::from("little")), + (Endian::Big, String::from("big")), + (Endian::Selectable, String::from("selectable")), + (Endian::Other, String::from("other")) + ]; + + for (e, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let endian = Endian::parse(tree1); + assert_eq!(endian, e, "Parsing `{}` expected `{:?}`", s, e); + let tree2 = &endian.encode(); + assert_eq!(tree1, tree2, "Encoding {:?} expected {}", e, s); + } + } +} \ No newline at end of file diff --git a/src/lib.rs b/src/lib.rs index 894d4083..2e3f003d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -24,12 +24,16 @@ #![deny(warnings)] + extern crate xmltree; use std::ops::Deref; use xmltree::Element; +mod endian; +pub use endian::*; + macro_rules! try { ($e:expr) => { $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) @@ -100,28 +104,6 @@ impl Device { } } -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum Endian { - Little, - Big, - Selectable, - Other -} - -impl Endian { - fn parse(tree: &Element) -> Endian { - let text = try!(tree.text.as_ref()); - - match &text[..] { - "little" => Endian::Little, - "big" => Endian::Big, - "selectable" => Endian::Selectable, - "other" => Endian::Other, - _ => panic!("unknown endian variant: {}", text), - } - } -} - #[derive(Clone, Debug)] pub struct Cpu { From 9c7f2fbd07c73838a481e8556a8641135324146f Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 8 Aug 2017 16:41:58 +1200 Subject: [PATCH 02/25] Split access, added encode and tests --- src/access.rs | 76 +++++++++++++++++++++++++++++++++++++++++++++++++++ src/lib.rs | 26 ++---------------- 2 files changed, 78 insertions(+), 24 deletions(-) create mode 100644 src/access.rs diff --git a/src/access.rs b/src/access.rs new file mode 100644 index 00000000..eab02f64 --- /dev/null +++ b/src/access.rs @@ -0,0 +1,76 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum Access { + ReadOnly, + ReadWrite, + ReadWriteOnce, + WriteOnce, + WriteOnly, +} + +impl Access { + pub fn parse(tree: &Element) -> Access { + let text = try!(tree.text.as_ref()); + + match &text[..] { + "read-only" => Access::ReadOnly, + "read-write" => Access::ReadWrite, + "read-writeOnce" => Access::ReadWriteOnce, + "write-only" => Access::WriteOnly, + "writeOnce" => Access::WriteOnce, + _ => panic!("unknown access variant: {}", text), + } + } + + pub fn encode(&self) -> Element { + let text = match *self { + Access::ReadOnly => String::from("read-only"), + Access::ReadWrite => String::from("read-write"), + Access::ReadWriteOnce => String::from("read-writeOnce"), + Access::WriteOnly => String::from("write-only"), + Access::WriteOnce => String::from("writeOnce"), + }; + + Element{ + name: String::from("access"), + attributes: HashMap::new(), + children: Vec::new(), + text: Some(text), + } + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let types = vec![ + (Access::ReadOnly, String::from("read-only")), + (Access::ReadWrite, String::from("read-write")), + (Access::ReadWriteOnce, String::from("read-writeOnce")), + (Access::WriteOnly, String::from("write-only")), + (Access::WriteOnce, String::from("writeOnce")) + ]; + + for (a, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let access = Access::parse(tree1); + assert_eq!(access, a, "Parsing `{}` expected `{:?}`", s, a); + let tree2 = &access.encode(); + assert_eq!(tree1, tree2, "Encoding {:?} expected {}", a, s); + } + } +} \ No newline at end of file diff --git a/src/lib.rs b/src/lib.rs index 2e3f003d..1b69d36d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -33,6 +33,8 @@ use xmltree::Element; mod endian; pub use endian::*; +mod access; +pub use access::*; macro_rules! try { ($e:expr) => { @@ -309,30 +311,6 @@ impl Register { } } -#[derive(Clone, Copy, Debug, PartialEq)] -pub enum Access { - ReadOnly, - ReadWrite, - ReadWriteOnce, - WriteOnce, - WriteOnly, -} - -impl Access { - fn parse(tree: &Element) -> Access { - let text = try!(tree.text.as_ref()); - - match &text[..] { - "read-only" => Access::ReadOnly, - "read-write" => Access::ReadWrite, - "read-writeOnce" => Access::ReadWriteOnce, - "write-only" => Access::WriteOnly, - "writeOnce" => Access::WriteOnce, - _ => panic!("unknown access variant: {}", text), - } - } -} - #[derive(Clone, Debug)] pub struct Field { pub name: String, From c252c1a0ac135743832057aee07d886126612d8d Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 8 Aug 2017 16:55:43 +1200 Subject: [PATCH 03/25] Split usage, added encode and tests --- src/access.rs | 10 +++++++--- src/endian.rs | 10 +++++++--- src/lib.rs | 25 +++++-------------------- 3 files changed, 19 insertions(+), 26 deletions(-) diff --git a/src/access.rs b/src/access.rs index eab02f64..05cefddf 100644 --- a/src/access.rs +++ b/src/access.rs @@ -4,6 +4,8 @@ use std::collections::HashMap; use xmltree::Element; +use helpers::*; + macro_rules! try { ($e:expr) => { $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) @@ -19,8 +21,8 @@ pub enum Access { WriteOnly, } -impl Access { - pub fn parse(tree: &Element) -> Access { +impl Parse for Access { + fn parse(tree: &Element) -> Access { let text = try!(tree.text.as_ref()); match &text[..] { @@ -32,8 +34,10 @@ impl Access { _ => panic!("unknown access variant: {}", text), } } +} - pub fn encode(&self) -> Element { +impl Encode for Access { + fn encode(&self) -> Element { let text = match *self { Access::ReadOnly => String::from("read-only"), Access::ReadWrite => String::from("read-write"), diff --git a/src/endian.rs b/src/endian.rs index 7603bd13..325b8a24 100644 --- a/src/endian.rs +++ b/src/endian.rs @@ -4,6 +4,8 @@ use std::collections::HashMap; use xmltree::Element; +use helpers::*; + macro_rules! try { ($e:expr) => { $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) @@ -18,8 +20,8 @@ pub enum Endian { Other } -impl Endian { - pub fn parse(tree: &Element) -> Endian { +impl Parse for Endian { + fn parse(tree: &Element) -> Endian { let text = try!(tree.text.as_ref()); match &text[..] { @@ -30,8 +32,10 @@ impl Endian { _ => panic!("unknown endian variant: {}", text), } } +} - pub fn encode(&self) -> Element { +impl Encode for Endian { + fn encode(&self) -> Element { let text = match *self { Endian::Little => String::from("little"), Endian::Big => String::from("big"), diff --git a/src/lib.rs b/src/lib.rs index 1b69d36d..5b0f23c1 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -31,10 +31,15 @@ use std::ops::Deref; use xmltree::Element; +mod helpers; +use helpers::*; + mod endian; pub use endian::*; mod access; pub use access::*; +mod usage; +pub use usage::*; macro_rules! try { ($e:expr) => { @@ -464,26 +469,6 @@ impl Defaults { } } -#[derive(Clone, Copy, Debug, Eq, PartialEq)] -pub enum Usage { - Read, - Write, - ReadWrite, -} - -impl Usage { - fn parse(tree: &Element) -> Usage { - let text = try!(tree.text.as_ref()); - - match &text[..] { - "read" => Usage::Read, - "write" => Usage::Write, - "read-write" => Usage::ReadWrite, - _ => panic!("unknown usage variant: {}", text), - } - } -} - #[derive(Clone, Debug)] pub struct EnumeratedValues { pub name: Option, From 2d36b81a1759c0b1865e7270de5188713091730f Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 8 Aug 2017 16:56:02 +1200 Subject: [PATCH 04/25] Whoops, added files --- src/helpers.rs | 12 +++++++++ src/usage.rs | 72 ++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 84 insertions(+) create mode 100644 src/helpers.rs create mode 100644 src/usage.rs diff --git a/src/helpers.rs b/src/helpers.rs new file mode 100644 index 00000000..f735217a --- /dev/null +++ b/src/helpers.rs @@ -0,0 +1,12 @@ +extern crate xmltree; + +use xmltree::Element; + +pub trait Parse { + fn parse(tree: &Element) -> Self; +} + +pub trait Encode { + fn encode(&self) -> Element; +} + diff --git a/src/usage.rs b/src/usage.rs new file mode 100644 index 00000000..1eecb1f7 --- /dev/null +++ b/src/usage.rs @@ -0,0 +1,72 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; + +use helpers::*; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Copy, Debug, Eq, PartialEq)] +pub enum Usage { + Read, + Write, + ReadWrite, +} + +impl Parse for Usage { + fn parse(tree: &Element) -> Usage { + let text = try!(tree.text.as_ref()); + + match &text[..] { + "read" => Usage::Read, + "write" => Usage::Write, + "read-write" => Usage::ReadWrite, + _ => panic!("unknown usage variant: {}", text), + } + } +} + +impl Encode for Usage { + fn encode(&self) -> Element { + let text = match *self { + Usage::Read => String::from("read"), + Usage::Write => String::from("write"), + Usage::ReadWrite => String::from("read-write"), + }; + + Element{ + name: String::from("usage"), + attributes: HashMap::new(), + children: Vec::new(), + text: Some(text), + } + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let types = vec![ + (Usage::Read, String::from("read")), + (Usage::Write, String::from("write")), + (Usage::ReadWrite, String::from("read-write")), + ]; + + for (e, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let elem = Usage::parse(tree1); + assert_eq!(elem, e, "Parsing `{}` expected `{:?}`", s, e); + let tree2 = &elem.encode(); + assert_eq!(tree1, tree2, "Encoding {:?} expected {}", e, s); + } + } +} \ No newline at end of file From eea653b9a8cf1dbb29f4841a806b972d2a946c75 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 8 Aug 2017 18:24:18 +1200 Subject: [PATCH 05/25] Added encoding to enumerated values --- src/access.rs | 4 +- src/endian.rs | 4 +- src/enumeratedvalue.rs | 115 ++++++++++++++++++++++++++++++++++ src/enumeratedvalues.rs | 135 ++++++++++++++++++++++++++++++++++++++++ src/helpers.rs | 18 +++++- src/lib.rs | 69 ++------------------ src/parse.rs | 6 ++ src/usage.rs | 4 +- 8 files changed, 284 insertions(+), 71 deletions(-) create mode 100644 src/enumeratedvalue.rs create mode 100644 src/enumeratedvalues.rs diff --git a/src/access.rs b/src/access.rs index 05cefddf..5d23198b 100644 --- a/src/access.rs +++ b/src/access.rs @@ -21,7 +21,7 @@ pub enum Access { WriteOnly, } -impl Parse for Access { +impl ParseElem for Access { fn parse(tree: &Element) -> Access { let text = try!(tree.text.as_ref()); @@ -36,7 +36,7 @@ impl Parse for Access { } } -impl Encode for Access { +impl EncodeElem for Access { fn encode(&self) -> Element { let text = match *self { Access::ReadOnly => String::from("read-only"), diff --git a/src/endian.rs b/src/endian.rs index 325b8a24..abb0403d 100644 --- a/src/endian.rs +++ b/src/endian.rs @@ -20,7 +20,7 @@ pub enum Endian { Other } -impl Parse for Endian { +impl ParseElem for Endian { fn parse(tree: &Element) -> Endian { let text = try!(tree.text.as_ref()); @@ -34,7 +34,7 @@ impl Parse for Endian { } } -impl Encode for Endian { +impl EncodeElem for Endian { fn encode(&self) -> Element { let text = match *self { Endian::Little => String::from("little"), diff --git a/src/enumeratedvalue.rs b/src/enumeratedvalue.rs new file mode 100644 index 00000000..ced5d112 --- /dev/null +++ b/src/enumeratedvalue.rs @@ -0,0 +1,115 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; +use ElementExt; + +use helpers::*; +use parse; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Debug, PartialEq)] +pub struct EnumeratedValue { + pub name: String, + pub description: Option, + pub value: Option, + pub is_default: Option, + // Reserve the right to add more fields to this struct + pub _extensible: (), +} + +impl EnumeratedValue { + pub fn parse(tree: &Element) -> Option { + assert_eq!(tree.name, "enumeratedValue"); + + Some( + EnumeratedValue { + name: try!(tree.get_child_text("name")), + description: tree.get_child_text("description"), + value: tree.get_child("value").map(|t| try!(parse::u32(t))), + is_default: tree.get_child_text("isDefault").map( + |t| { + try!(t.parse()) + }, + ), + _extensible: (), + }, + ) + } +} + +impl EncodeElem for EnumeratedValue { + fn encode(&self) -> Element { + let mut base = Element{ + name: String::from("enumeratedValue"), + attributes: HashMap::new(), + children: vec![ + new_element("name", Some(self.name.clone())), + ], + text: None, + }; + + match self.description { + Some(ref d) => { + let s = (*d).clone(); + base.children.push(new_element("description", Some(s))); + }, + None => (), + }; + + match self.value { + Some(ref v) => { + base.children.push(new_element("value", Some(format!("0x{:08.x}", *v)))); + }, + None => (), + }; + + match self.is_default { + Some(ref v) => { + base.children.push(new_element("isDefault", Some(format!("{}", v)))); + }, + None => (), + }; + + base + } +} + + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let example = String::from(" + + WS0 + Zero wait-states inserted in fetch or read transfers + 0x00000000 + true + + "); + let expected = EnumeratedValue{ + name: String::from("WS0"), + description: Some(String::from("Zero wait-states inserted in fetch or read transfers")), + value: Some(0), + is_default: Some(true), + _extensible: (), + }; + + let tree1 = &try!(Element::parse(example.as_bytes())); + + let parsed = EnumeratedValue::parse(tree1).unwrap(); + assert_eq!(parsed, expected, "Parsing tree failed"); + + let tree2 = &parsed.encode(); + assert_eq!(tree1, tree2, "Encoding value failed"); + } +} \ No newline at end of file diff --git a/src/enumeratedvalues.rs b/src/enumeratedvalues.rs new file mode 100644 index 00000000..c8bc0c7d --- /dev/null +++ b/src/enumeratedvalues.rs @@ -0,0 +1,135 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; +use ElementExt; + +use helpers::*; +use usage::*; +use enumeratedvalue::*; + +#[derive(Clone, Debug, PartialEq)] +pub struct EnumeratedValues { + pub name: Option, + pub usage: Option, + pub derived_from: Option, + pub values: Vec, + // Reserve the right to add more fields to this struct + _extensible: (), +} + +impl ParseElem for EnumeratedValues { + fn parse(tree: &Element) -> EnumeratedValues { + assert_eq!(tree.name, "enumeratedValues"); + + EnumeratedValues { + name: tree.get_child_text("name"), + usage: tree.get_child("usage").map(Usage::parse), + derived_from: tree.attributes + .get(&"derivedFrom".to_owned()) + .map(|s| s.to_owned()), + values: tree.children + .iter() + .filter_map(EnumeratedValue::parse) + .collect(), + _extensible: (), + } + } +} + +impl EncodeElem for EnumeratedValues { + fn encode(&self) -> Element { + let mut base = Element{ + name: String::from("enumeratedValues"), + attributes: HashMap::new(), + children: Vec::new(), + text: None, + }; + + match self.name { + Some(ref d) => { + base.children.push(new_element("name", Some((*d).clone()))); + }, + None => (), + }; + + match self.usage { + Some(ref v) => { base.children.push(v.encode()); }, + None => (), + }; + + match self.derived_from { + Some(ref v) => { base.attributes.insert(String::from("derivedFrom"), (*v).clone()); }, + None => () + } + + for v in &self.values { + base.children.push(v.encode()); + } + + base + } +} + +#[cfg(test)] +mod tests { + macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } + } + + + use super::*; + + #[test] + fn decode_encode() { + let example = String::from(" + + + WS0 + Zero wait-states inserted in fetch or read transfers + 0x00000000 + true + + + WS1 + One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details + 0x00000001 + + + "); + + let expected = EnumeratedValues{ + name: None, + usage: None, + derived_from: Some(String::from("fake-derivation.png")), + values: vec![ + EnumeratedValue{ + name: String::from("WS0"), + description: Some(String::from("Zero wait-states inserted in fetch or read transfers")), + value: Some(0), + is_default: Some(true), + _extensible: (), + }, + EnumeratedValue{ + name: String::from("WS1"), + description: Some(String::from("One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details")), + value: Some(1), + is_default: None, + _extensible: (), + }, + ], + _extensible: (), + }; + + let tree1 = &try!(Element::parse(example.as_bytes())); + + let parsed = EnumeratedValues::parse(tree1); + assert_eq!(parsed, expected, "Parsing tree failed"); + + let tree2 = &parsed.encode(); + assert_eq!(tree1, tree2, "Encoding value failed"); + } +} \ No newline at end of file diff --git a/src/helpers.rs b/src/helpers.rs index f735217a..ce62052a 100644 --- a/src/helpers.rs +++ b/src/helpers.rs @@ -1,12 +1,26 @@ extern crate xmltree; +use std::collections::HashMap; + use xmltree::Element; -pub trait Parse { +pub trait ParseElem { + fn parse(tree: &Element) -> Self; +} + +pub trait ParseOption { fn parse(tree: &Element) -> Self; } -pub trait Encode { +pub trait EncodeElem { fn encode(&self) -> Element; } +pub fn new_element(name: &str, text: Option) -> Element { + Element{ + name: String::from(name), + attributes: HashMap::new(), + children: Vec::new(), + text: text, + } +} \ No newline at end of file diff --git a/src/lib.rs b/src/lib.rs index 5b0f23c1..653c3b28 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -34,12 +34,18 @@ use xmltree::Element; mod helpers; use helpers::*; +mod parse; + mod endian; pub use endian::*; mod access; pub use access::*; mod usage; pub use usage::*; +mod enumeratedvalue; +pub use enumeratedvalue::*; +mod enumeratedvalues; +pub use enumeratedvalues::*; macro_rules! try { ($e:expr) => { @@ -47,8 +53,6 @@ macro_rules! try { } } -mod parse; - /// Parses the contents of a SVD file (XML) pub fn parse(xml: &str) -> Device { Device::parse(xml) @@ -468,64 +472,3 @@ impl Defaults { } } } - -#[derive(Clone, Debug)] -pub struct EnumeratedValues { - pub name: Option, - pub usage: Option, - pub derived_from: Option, - pub values: Vec, - // Reserve the right to add more fields to this struct - _extensible: (), -} - -impl EnumeratedValues { - fn parse(tree: &Element) -> EnumeratedValues { - assert_eq!(tree.name, "enumeratedValues"); - - EnumeratedValues { - name: tree.get_child_text("name"), - usage: tree.get_child("usage").map(Usage::parse), - derived_from: tree.attributes - .get(&"derivedFrom".to_owned()) - .map(|s| s.to_owned()), - values: tree.children - .iter() - .filter_map(EnumeratedValue::parse) - .collect(), - _extensible: (), - } - } -} - -#[derive(Clone, Debug)] -pub struct EnumeratedValue { - pub name: String, - pub description: Option, - pub value: Option, - pub is_default: Option, - // Reserve the right to add more fields to this struct - _extensible: (), -} - -impl EnumeratedValue { - fn parse(tree: &Element) -> Option { - if tree.name != "enumeratedValue" { - return None; - } - - Some( - EnumeratedValue { - name: try!(tree.get_child_text("name")), - description: tree.get_child_text("description"), - value: tree.get_child("value").map(|t| try!(parse::u32(t))), - is_default: tree.get_child_text("isDefault").map( - |t| { - try!(t.parse()) - }, - ), - _extensible: (), - }, - ) - } -} diff --git a/src/parse.rs b/src/parse.rs index aeb507f0..e94e34b3 100644 --- a/src/parse.rs +++ b/src/parse.rs @@ -1,5 +1,11 @@ use xmltree::Element; +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + pub fn u32(tree: &Element) -> Option { let text = try!(tree.text.as_ref()); diff --git a/src/usage.rs b/src/usage.rs index 1eecb1f7..01df42ca 100644 --- a/src/usage.rs +++ b/src/usage.rs @@ -19,7 +19,7 @@ pub enum Usage { ReadWrite, } -impl Parse for Usage { +impl ParseElem for Usage { fn parse(tree: &Element) -> Usage { let text = try!(tree.text.as_ref()); @@ -32,7 +32,7 @@ impl Parse for Usage { } } -impl Encode for Usage { +impl EncodeElem for Usage { fn encode(&self) -> Element { let text = match *self { Usage::Read => String::from("read"), From b3d4ba4bfeda702924e027d808c4973651e31b37 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Sat, 12 Aug 2017 14:03:13 +1200 Subject: [PATCH 06/25] Split Defaults + added encode_children function --- src/helpers.rs | 4 ++++ src/lib.rs | 26 ++------------------------ 2 files changed, 6 insertions(+), 24 deletions(-) diff --git a/src/helpers.rs b/src/helpers.rs index ce62052a..aff170a8 100644 --- a/src/helpers.rs +++ b/src/helpers.rs @@ -16,6 +16,10 @@ pub trait EncodeElem { fn encode(&self) -> Element; } +pub trait EncodeChildren { + fn encode_children(&self, &Element) -> Element; +} + pub fn new_element(name: &str, text: Option) -> Element { Element{ name: String::from(name), diff --git a/src/lib.rs b/src/lib.rs index 653c3b28..7c2dea41 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -46,6 +46,8 @@ mod enumeratedvalue; pub use enumeratedvalue::*; mod enumeratedvalues; pub use enumeratedvalues::*; +mod defaults; +pub use defaults::*; macro_rules! try { ($e:expr) => { @@ -448,27 +450,3 @@ impl WriteConstraint { } } -/// Register default properties -#[derive(Clone, Copy, Debug)] -pub struct Defaults { - pub size: Option, - pub reset_value: Option, - pub reset_mask: Option, - pub access: Option, - // Reserve the right to add more fields to this struct - _extensible: (), -} - -impl Defaults { - fn parse(tree: &Element) -> Defaults { - Defaults { - size: tree.get_child("size").map(|t| try!(parse::u32(t))), - reset_value: - tree.get_child("resetValue").map(|t| try!(parse::u32(t))), - reset_mask: - tree.get_child("resetMask").map(|t| try!(parse::u32(t))), - access: tree.get_child("access").map(Access::parse), - _extensible: (), - } - } -} From ee4a8a1f19bdef9dd0d079a191dc47233332d2dc Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Mon, 14 Aug 2017 08:19:10 +1200 Subject: [PATCH 07/25] Splitting writeconstraint/writeconstraintrange. Should probably consider how to have a more common set of tests for each module --- src/defaults.rs | 100 ++++++++++++++++++++++++++++++++++++ src/lib.rs | 63 ++--------------------- src/writeconstraint.rs | 97 ++++++++++++++++++++++++++++++++++ src/writeconstraintrange.rs | 43 ++++++++++++++++ 4 files changed, 244 insertions(+), 59 deletions(-) create mode 100644 src/defaults.rs create mode 100644 src/writeconstraint.rs create mode 100644 src/writeconstraintrange.rs diff --git a/src/defaults.rs b/src/defaults.rs new file mode 100644 index 00000000..503cd555 --- /dev/null +++ b/src/defaults.rs @@ -0,0 +1,100 @@ +extern crate xmltree; + +use xmltree::Element; + +use helpers::*; +use access::*; +use parse; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +/// Register default properties +#[derive(Clone, Copy, Debug, PartialEq)] +pub struct Defaults { + pub size: Option, + pub reset_value: Option, + pub reset_mask: Option, + pub access: Option, + // Reserve the right to add more fields to this struct + _extensible: (), +} + +impl ParseElem for Defaults { + fn parse(tree: &Element) -> Defaults { + Defaults { + size: tree.get_child("size").map(|t| try!(parse::u32(t))), + reset_value: + tree.get_child("resetValue").map(|t| try!(parse::u32(t))), + reset_mask: + tree.get_child("resetMask").map(|t| try!(parse::u32(t))), + access: tree.get_child("access").map(Access::parse), + _extensible: (), + } + } +} + +impl EncodeChildren for Defaults { + fn encode_children(&self, e: &Element) -> Element { + let mut elem = (*e).clone(); + + match self.size { + Some(ref v) => { elem.children.push(new_element("size", Some(format!("0x{:08.x}", v)))); }, + None => (), + }; + + match self.reset_value { + Some(ref v) => { elem.children.push(new_element("resetValue", Some(format!("0x{:08.x}", v)))); }, + None => (), + }; + + match self.reset_mask { + Some(ref v) => { elem.children.push(new_element("resetMask", Some(format!("0x{:08.x}", v)))); }, + None => (), + }; + + match self.access { + Some(ref v) => { elem.children.push(v.encode()); }, + None => (), + }; + + elem + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let example = String::from(" + + 0xaabbccdd + 0x11223344 + 0x00000000 + read-only + + "); + + let expected = Defaults { + size: Some(0xaabbccdd), + reset_value: Some(0x11223344), + reset_mask: Some(0x00000000), + access: Some(Access::ReadOnly), + _extensible: (), + }; + + let tree1 = &try!(Element::parse(example.as_bytes())); + + let parsed = Defaults::parse(tree1); + assert_eq!(parsed, expected, "Parsing tree failed"); + + let mut tree2 = new_element("mock", None); + tree2 = parsed.encode_children(&tree2); + assert_eq!(tree1, &tree2, "Encoding value failed"); + } +} \ No newline at end of file diff --git a/src/lib.rs b/src/lib.rs index 7c2dea41..0b1c9b3a 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -48,6 +48,10 @@ mod enumeratedvalues; pub use enumeratedvalues::*; mod defaults; pub use defaults::*; +mod writeconstraintrange; +pub use writeconstraintrange::*; +mod writeconstraint; +pub use writeconstraint::*; macro_rules! try { ($e:expr) => { @@ -390,63 +394,4 @@ impl BitRange { } } -#[derive(Clone, Copy, Debug)] -pub struct WriteConstraintRange { - pub min: u32, - pub max: u32, -} - -impl WriteConstraintRange { - fn parse(tree: &Element) -> WriteConstraintRange { - WriteConstraintRange { - min: try!(try!(tree.get_child_text("minimum")).parse()), - max: try!(try!(tree.get_child_text("maximum")).parse()), - } - } -} - -#[derive(Clone, Copy, Debug)] -pub enum WriteConstraint { - WriteAsRead(bool), - UseEnumeratedValues(bool), - Range(WriteConstraintRange), -} - -impl WriteConstraint { - fn parse(tree: &Element) -> WriteConstraint { - if tree.children.len() == 1 { - let ref field = tree.children[0].name; - // Write constraint can only be one of the following - match field.as_ref() { - "writeAsRead" => { - WriteConstraint::WriteAsRead( - try!( - tree.get_child(field.as_ref()) - .map(|t| try!(parse::bool(t))) - ), - ) - } - "useEnumeratedValues" => { - WriteConstraint::UseEnumeratedValues( - try!( - tree.get_child(field.as_ref()) - .map(|t| try!(parse::bool(t))) - ), - ) - } - "range" => { - WriteConstraint::Range( - try!( - tree.get_child(field.as_ref()) - .map(WriteConstraintRange::parse) - ), - ) - } - v => panic!("unknown variant: {}", v), - } - } else { - panic!("found more than one element") - } - } -} diff --git a/src/writeconstraint.rs b/src/writeconstraint.rs new file mode 100644 index 00000000..861ff09f --- /dev/null +++ b/src/writeconstraint.rs @@ -0,0 +1,97 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; + +use parse; +use helpers::*; +use writeconstraintrange::*; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Copy, Debug, PartialEq)] +pub enum WriteConstraint { + WriteAsRead(bool), + UseEnumeratedValues(bool), + Range(WriteConstraintRange), +} + +impl ParseElem for WriteConstraint { + fn parse(tree: &Element) -> WriteConstraint { + if tree.children.len() == 1 { + let ref field = tree.children[0].name; + // Write constraint can only be one of the following + match field.as_ref() { + "writeAsRead" => { + WriteConstraint::WriteAsRead( + try!(tree.get_child(field.as_ref()) + .map(|t| try!(parse::bool(t))) + ), + ) + } + "useEnumeratedValues" => { + WriteConstraint::UseEnumeratedValues( + try!(tree.get_child(field.as_ref()) + .map(|t| try!(parse::bool(t))) + ), + ) + } + "range" => { + WriteConstraint::Range( + try!( tree.get_child(field.as_ref()) + .map(WriteConstraintRange::parse) + ), + ) + } + v => panic!("unknown variant: {}", v), + } + } else { + panic!("found more than one element") + } + } +} + +impl EncodeElem for WriteConstraint { + fn encode(&self) -> Element { + let v = match *self { + WriteConstraint::WriteAsRead(v) => new_element("writeAsRead", Some(format!("{}", v))), + WriteConstraint::UseEnumeratedValues(v) => new_element("useEnumeratedValues", Some(format!("{}", v))), + WriteConstraint::Range(v) => v.encode(), + }; + + Element { + name: String::from("WriteConstraint"), + attributes: HashMap::new(), + children: vec![v], + text: None, + } + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let examples = vec![ + ( String::from("true"), WriteConstraint::WriteAsRead(true) ) + ]; + + for (example, expected) in examples { + let tree1 = &try!(Element::parse(example.as_bytes())); + + let parsed = WriteConstraint::parse(tree1); + assert_eq!(parsed, expected, "Parsing tree failed"); + + let tree2 = &parsed.encode(); + assert_eq!(tree1, tree2, "Encoding value failed"); + } + + } +} diff --git a/src/writeconstraintrange.rs b/src/writeconstraintrange.rs new file mode 100644 index 00000000..b0235804 --- /dev/null +++ b/src/writeconstraintrange.rs @@ -0,0 +1,43 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; +use ElementExt; + +use helpers::*; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Copy, Debug, PartialEq)] +pub struct WriteConstraintRange { + pub min: u32, + pub max: u32, +} + +impl ParseElem for WriteConstraintRange { + fn parse(tree: &Element) -> WriteConstraintRange { + WriteConstraintRange { + min: try!(try!(tree.get_child_text("minimum")).parse()), + max: try!(try!(tree.get_child_text("maximum")).parse()), + } + } +} + +impl EncodeElem for WriteConstraintRange { + fn encode(&self) -> Element { + Element{ + name: String::from("range"), + attributes: HashMap::new(), + children: vec![ + new_element("min", Some(format!("0x{:08.x}", self.min))), + new_element("max", Some(format!("0x{:08.x}", self.max))), + ], + text: None, + } + } +} \ No newline at end of file From ceb577c3ece217c2cc36403f8dc3f3a25026ea34 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Wed, 16 Aug 2017 19:49:06 +1200 Subject: [PATCH 08/25] Bitranges, yeeeeaah --- src/access.rs | 2 +- src/bitrange.rs | 111 ++++++++++++++++++++++++++++++++++++++++++++++++ src/helpers.rs | 5 +++ src/lib.rs | 36 ++-------------- 4 files changed, 120 insertions(+), 34 deletions(-) create mode 100644 src/bitrange.rs diff --git a/src/access.rs b/src/access.rs index 5d23198b..04719f6c 100644 --- a/src/access.rs +++ b/src/access.rs @@ -77,4 +77,4 @@ mod tests { assert_eq!(tree1, tree2, "Encoding {:?} expected {}", a, s); } } -} \ No newline at end of file +} diff --git a/src/bitrange.rs b/src/bitrange.rs new file mode 100644 index 00000000..9c483764 --- /dev/null +++ b/src/bitrange.rs @@ -0,0 +1,111 @@ +extern crate xmltree; + +use xmltree::Element; + +use helpers::*; +use parse; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Copy, Debug, PartialEq)] +enum BitRangeType { + BitRange, + OffsetWidth, + MsbLsb, +} + +#[derive(Clone, Copy, Debug, PartialEq)] +pub struct BitRange { + pub offset: u32, + pub width: u32, + range_type: BitRangeType +} + +impl ParseElem for BitRange { + fn parse(tree: &Element) -> BitRange { + let (end, start, range_type): (u32, u32, BitRangeType) = if let Some(range) = + tree.get_child("bitRange") { + let text = try!(range.text.as_ref()); + + assert!(text.starts_with('[')); + assert!(text.ends_with(']')); + + let mut parts = text[1..text.len() - 1].split(':'); + + (try!(try!(parts.next()).parse()), try!(try!(parts.next()).parse()), BitRangeType::BitRange) + } else if let (Some(lsb), Some(msb)) = + (tree.get_child("lsb"), tree.get_child("msb")) { + (try!(parse::u32(msb)), try!(parse::u32(lsb)), BitRangeType::MsbLsb) + } else { + return BitRange { + offset: try!(parse::u32(try!(tree.get_child("bitOffset")))), + width: try!(parse::u32(try!(tree.get_child("bitWidth")))), + range_type: BitRangeType::OffsetWidth, + }; + }; + + BitRange { + offset: start, + width: end - start + 1, + range_type: range_type, + } + } +} + + +impl EncodeChildren for BitRange { + fn encode_children(&self, elem: &Element) -> Element { + let mut tree = elem.clone(); + + let children = match self.range_type { + BitRangeType::BitRange => vec![ + new_element("bitRange", Some(format!("[{}:{}]", self.offset + self.width - 1, self.offset))), + ], + BitRangeType::MsbLsb => vec![ + new_element("lsb", Some(format!("{}", self.offset))), + new_element("msb", Some(format!("{}", self.offset + self.width - 1))) + ], + BitRangeType::OffsetWidth => vec![ + new_element("bitOffset", Some(format!("{}", self.offset))), + new_element("bitWidth", Some(format!("{}", self.width))) + ], + }; + + tree.children.append(&mut children.clone()); + tree + } +} + + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let types = vec![ + (BitRange{offset: 16, width: 4, range_type: BitRangeType::BitRange}, String::from(" + [19:16] + ")), + (BitRange{offset: 16, width: 4, range_type: BitRangeType::OffsetWidth}, String::from(" + 164 + ")), + (BitRange{offset: 16, width: 4, range_type: BitRangeType::MsbLsb}, String::from(" + 1619 + ")), + ]; + + for (a, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let value = BitRange::parse(tree1); + assert_eq!(value, a, "Parsing `{}` expected `{:?}`", s, a); + let tree2 = new_element("fake", None); + let tree2 = &value.encode_children(&tree2); + assert_eq!(tree1, tree2, "Encoding {:?} expected {}", a, s); + } + } +} diff --git a/src/helpers.rs b/src/helpers.rs index aff170a8..e51101e6 100644 --- a/src/helpers.rs +++ b/src/helpers.rs @@ -12,6 +12,10 @@ pub trait ParseOption { fn parse(tree: &Element) -> Self; } +pub trait ParseChildren { + fn parse_children(tree: &Element) -> Self; +} + pub trait EncodeElem { fn encode(&self) -> Element; } @@ -20,6 +24,7 @@ pub trait EncodeChildren { fn encode_children(&self, &Element) -> Element; } + pub fn new_element(name: &str, text: Option) -> Element { Element{ name: String::from(name), diff --git a/src/lib.rs b/src/lib.rs index 0b1c9b3a..8a2fb661 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -52,6 +52,9 @@ mod writeconstraintrange; pub use writeconstraintrange::*; mod writeconstraint; pub use writeconstraint::*; +mod bitrange; +pub use bitrange::*; + macro_rules! try { ($e:expr) => { @@ -359,39 +362,6 @@ impl Field { } } -#[derive(Clone, Copy, Debug)] -pub struct BitRange { - pub offset: u32, - pub width: u32, -} - -impl BitRange { - fn parse(tree: &Element) -> BitRange { - let (end, start): (u32, u32) = if let Some(range) = - tree.get_child("bitRange") { - let text = try!(range.text.as_ref()); - - assert!(text.starts_with('[')); - assert!(text.ends_with(']')); - - let mut parts = text[1..text.len() - 1].split(':'); - (try!(try!(parts.next()).parse()), try!(try!(parts.next()).parse())) - } else if let (Some(lsb), Some(msb)) = - (tree.get_child("lsb"), tree.get_child("msb")) { - (try!(parse::u32(msb)), try!(parse::u32(lsb))) - } else { - return BitRange { - offset: try!(parse::u32(try!(tree.get_child("bitOffset")))), - width: try!(parse::u32(try!(tree.get_child("bitWidth")))), - }; - }; - - BitRange { - offset: start, - width: end - start + 1, - } - } -} From 2abbdfdf6cda5d962356601a70bcebc572d259ad Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Thu, 17 Aug 2017 22:56:42 +1200 Subject: [PATCH 09/25] Interrupt module --- src/helpers.rs | 2 +- src/interrupt.rs | 81 ++++++++++++++++++++++++++++++++++++++++++++++++ src/lib.rs | 18 ++--------- 3 files changed, 84 insertions(+), 17 deletions(-) create mode 100644 src/interrupt.rs diff --git a/src/helpers.rs b/src/helpers.rs index e51101e6..94a45e83 100644 --- a/src/helpers.rs +++ b/src/helpers.rs @@ -32,4 +32,4 @@ pub fn new_element(name: &str, text: Option) -> Element { children: Vec::new(), text: text, } -} \ No newline at end of file +} diff --git a/src/interrupt.rs b/src/interrupt.rs new file mode 100644 index 00000000..1440ba1e --- /dev/null +++ b/src/interrupt.rs @@ -0,0 +1,81 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; + +use ElementExt; +use helpers::*; +use parse; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + + +#[derive(Clone, Debug, PartialEq)] +pub struct Interrupt { + pub name: String, + pub description: Option, + pub value: u32, +} + +impl ParseElem for Interrupt { + fn parse(tree: &Element) -> Interrupt { + Interrupt { + name: try!(tree.get_child_text("name")), + description: tree.get_child_text("description"), + value: try!(parse::u32(try!(tree.get_child("value")))), + } + } +} + +impl EncodeElem for Interrupt { + fn encode(&self) -> Element { + Element{ + name: String::from("interrupt"), + attributes: HashMap::new(), + children: vec![ + new_element("name", Some(self.name.clone())), + new_element("description", self.description.clone()), + new_element("value", Some(format!("{}", self.value))), + ], + text: None, + } + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let types = vec![ + (Interrupt{ + name: String::from("test"), + description: Some(String::from("description")), + value: 14, + }, + String::from(" + + test + description + 14 + " + )), + ]; + + for (a, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let v = Interrupt::parse(tree1); + assert_eq!(v, a, "Parsing `{}` expected `{:?}`", s, a); + let tree2 = &v.encode(); + assert_eq!(tree1, tree2, "Encoding {:?} expected {}", a, s); + } + } +} + + diff --git a/src/lib.rs b/src/lib.rs index 8a2fb661..da638b14 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -54,6 +54,8 @@ mod writeconstraint; pub use writeconstraint::*; mod bitrange; pub use bitrange::*; +mod interrupt; +pub use interrupt::*; macro_rules! try { @@ -210,22 +212,6 @@ impl Peripheral { } } -#[derive(Clone, Debug)] -pub struct Interrupt { - pub name: String, - pub description: Option, - pub value: u32, -} - -impl Interrupt { - fn parse(tree: &Element) -> Interrupt { - Interrupt { - name: try!(tree.get_child_text("name")), - description: tree.get_child_text("description"), - value: try!(parse::u32(try!(tree.get_child("value")))), - } - } -} #[derive(Clone, Debug)] pub struct RegisterInfo { From 0eebd4114da4e0807751d768abe5dca23a5f6699 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 22 Aug 2017 12:07:33 +1200 Subject: [PATCH 10/25] Split field and register, haven't implemented encode or tests yet. --- src/field.rs | 53 ++++++++++++++++++ src/lib.rs | 143 ++---------------------------------------------- src/register.rs | 120 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 177 insertions(+), 139 deletions(-) create mode 100644 src/field.rs create mode 100644 src/register.rs diff --git a/src/field.rs b/src/field.rs new file mode 100644 index 00000000..20fd1187 --- /dev/null +++ b/src/field.rs @@ -0,0 +1,53 @@ +extern crate xmltree; + +use xmltree::Element; +use ElementExt; + +use helpers::*; +use access::*; +use writeconstraint::*; +use bitrange::*; +use enumeratedvalues::*; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + + +#[derive(Clone, Debug)] +pub struct Field { + pub name: String, + pub description: Option, + pub bit_range: BitRange, + pub access: Option, + pub enumerated_values: Vec, + pub write_constraint: Option, + // Reserve the right to add more fields to this struct + _extensible: (), +} + +impl ParseElem for Field { + fn parse(tree: &Element) -> Field { + assert_eq!(tree.name, "field"); + + Field { + name: try!(tree.get_child_text("name")), + description: tree.get_child_text("description"), + bit_range: BitRange::parse(tree), + access: tree.get_child("access").map(Access::parse), + enumerated_values: tree.children + .iter() + .filter(|t| t.name == "enumeratedValues") + .map(EnumeratedValues::parse) + .collect::>(), + write_constraint: tree.get_child("writeConstraint") + .map(WriteConstraint::parse), + _extensible: (), + } + } +} + + + diff --git a/src/lib.rs b/src/lib.rs index da638b14..23256ab5 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -27,8 +27,6 @@ extern crate xmltree; -use std::ops::Deref; - use xmltree::Element; mod helpers; @@ -56,7 +54,10 @@ mod bitrange; pub use bitrange::*; mod interrupt; pub use interrupt::*; - +mod field; +pub use field::*; +mod register; +pub use register::*; macro_rules! try { ($e:expr) => { @@ -213,141 +214,5 @@ impl Peripheral { } -#[derive(Clone, Debug)] -pub struct RegisterInfo { - pub name: String, - pub description: String, - pub address_offset: u32, - pub size: Option, - pub access: Option, - pub reset_value: Option, - pub reset_mask: Option, - /// `None` indicates that the `` node is not present - pub fields: Option>, - pub write_constraint: Option, - // Reserve the right to add more fields to this struct - _extensible: (), -} - -#[derive(Clone, Debug)] -pub struct RegisterArrayInfo { - pub dim: u32, - pub dim_increment: u32, - pub dim_index: Option>, -} - -#[derive(Clone, Debug)] -pub enum Register { - Single(RegisterInfo), - Array(RegisterInfo, RegisterArrayInfo), -} - -impl Deref for Register { - type Target = RegisterInfo; - - fn deref(&self) -> &RegisterInfo { - match *self { - Register::Single(ref info) => info, - Register::Array(ref info, _) => info, - } - } -} - -impl RegisterInfo { - fn parse(tree: &Element) -> RegisterInfo { - RegisterInfo { - name: try!(tree.get_child_text("name")), - description: try!(tree.get_child_text("description")), - address_offset: { - try!(parse::u32(try!(tree.get_child("addressOffset")))) - }, - size: tree.get_child("size").map(|t| try!(parse::u32(t))), - access: tree.get_child("access").map(Access::parse), - reset_value: - tree.get_child("resetValue").map(|t| try!(parse::u32(t))), - reset_mask: - tree.get_child("resetMask").map(|t| try!(parse::u32(t))), - fields: - tree.get_child("fields") - .map(|fs| fs.children.iter().map(Field::parse).collect()), - write_constraint: tree.get_child("writeConstraint") - .map(WriteConstraint::parse), - _extensible: (), - } - } -} - -impl RegisterArrayInfo { - fn parse(tree: &Element) -> RegisterArrayInfo { - RegisterArrayInfo { - dim: try!(tree.get_child_text("dim").unwrap().parse::()), - dim_increment: try!( - tree.get_child("dimIncrement") - .map(|t| try!(parse::u32(t))) - ), - dim_index: tree.get_child("dimIndex") - .map(|c| parse::dim_index(try!(c.text.as_ref()))), - } - } -} - -impl Register { - // TODO handle "clusters", return `Register` not an `Option` - fn parse(tree: &Element) -> Option { - if tree.name == "cluster" { - return None; - } - - assert_eq!(tree.name, "register"); - - let info = RegisterInfo::parse(tree); - - if tree.get_child("dimIncrement").is_some() { - let array_info = RegisterArrayInfo::parse(tree); - assert!(info.name.contains("%s")); - if let Some(ref indices) = array_info.dim_index { - assert_eq!(array_info.dim as usize, indices.len()) - } - Some(Register::Array(info, array_info)) - } else { - Some(Register::Single(info)) - } - } -} - -#[derive(Clone, Debug)] -pub struct Field { - pub name: String, - pub description: Option, - pub bit_range: BitRange, - pub access: Option, - pub enumerated_values: Vec, - pub write_constraint: Option, - // Reserve the right to add more fields to this struct - _extensible: (), -} - -impl Field { - fn parse(tree: &Element) -> Field { - assert_eq!(tree.name, "field"); - - Field { - name: try!(tree.get_child_text("name")), - description: tree.get_child_text("description"), - bit_range: BitRange::parse(tree), - access: tree.get_child("access").map(Access::parse), - enumerated_values: tree.children - .iter() - .filter(|t| t.name == "enumeratedValues") - .map(EnumeratedValues::parse) - .collect::>(), - write_constraint: tree.get_child("writeConstraint") - .map(WriteConstraint::parse), - _extensible: (), - } - } -} - - diff --git a/src/register.rs b/src/register.rs new file mode 100644 index 00000000..8e8fc73c --- /dev/null +++ b/src/register.rs @@ -0,0 +1,120 @@ +extern crate xmltree; + +use std::ops::Deref; + +use xmltree::Element; +use ElementExt; + +use helpers::*; +use access::*; +use parse; +use Field; +use writeconstraint::*; + + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + + + +#[derive(Clone, Debug)] +pub struct RegisterInfo { + pub name: String, + pub description: String, + pub address_offset: u32, + pub size: Option, + pub access: Option, + pub reset_value: Option, + pub reset_mask: Option, + /// `None` indicates that the `` node is not present + pub fields: Option>, + pub write_constraint: Option, + // Reserve the right to add more fields to this struct + _extensible: (), +} + +#[derive(Clone, Debug)] +pub struct RegisterArrayInfo { + pub dim: u32, + pub dim_increment: u32, + pub dim_index: Option>, +} + +#[derive(Clone, Debug)] +pub enum Register { + Single(RegisterInfo), + Array(RegisterInfo, RegisterArrayInfo), +} + +impl Deref for Register { + type Target = RegisterInfo; + + fn deref(&self) -> &RegisterInfo { + match *self { + Register::Single(ref info) => info, + Register::Array(ref info, _) => info, + } + } +} + +impl ParseElem for RegisterInfo { + fn parse(tree: &Element) -> RegisterInfo { + RegisterInfo { + name: try!(tree.get_child_text("name")), + description: try!(tree.get_child_text("description")), + address_offset: { + try!(parse::u32(try!(tree.get_child("addressOffset")))) + }, + size: tree.get_child("size").map(|t| try!(parse::u32(t))), + access: tree.get_child("access").map(Access::parse), + reset_value: + tree.get_child("resetValue").map(|t| try!(parse::u32(t))), + reset_mask: + tree.get_child("resetMask").map(|t| try!(parse::u32(t))), + fields: + tree.get_child("fields") + .map(|fs| fs.children.iter().map(Field::parse).collect()), + write_constraint: tree.get_child("writeConstraint") + .map(WriteConstraint::parse), + _extensible: (), + } + } +} + +impl ParseElem for RegisterArrayInfo { + fn parse(tree: &Element) -> RegisterArrayInfo { + RegisterArrayInfo { + dim: try!(tree.get_child_text("dim").unwrap().parse::()), + dim_increment: try!( + tree.get_child("dimIncrement") + .map(|t| try!(parse::u32(t))) + ), + dim_index: tree.get_child("dimIndex") + .map(|c| parse::dim_index(try!(c.text.as_ref()))), + } + } +} + +impl Register { + // TODO handle "clusters", return `Register` not an `Option` + pub fn parse(tree: &Element) -> Option { + assert_eq!(tree.name, "register"); + + let info = RegisterInfo::parse(tree); + + if tree.get_child("dimIncrement").is_some() { + let array_info = RegisterArrayInfo::parse(tree); + assert!(info.name.contains("%s")); + if let Some(ref indices) = array_info.dim_index { + assert_eq!(array_info.dim as usize, indices.len()) + } + Some(Register::Array(info, array_info)) + } else { + Some(Register::Single(info)) + } + } +} + From 8e248d5a2db2e0ecb2d03d21b07cebf58a470b5c Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 22 Aug 2017 17:20:24 +1200 Subject: [PATCH 11/25] Registerinfo tests --- src/bitrange.rs | 22 ++--- src/defaults.rs | 18 ++-- src/enumeratedvalues.rs | 2 +- src/field.rs | 100 +++++++++++++++++++++- src/helpers.rs | 13 +-- src/lib.rs | 2 + src/register.rs | 47 +---------- src/registerinfo.rs | 180 ++++++++++++++++++++++++++++++++++++++++ 8 files changed, 307 insertions(+), 77 deletions(-) create mode 100644 src/registerinfo.rs diff --git a/src/bitrange.rs b/src/bitrange.rs index 9c483764..4533b6c1 100644 --- a/src/bitrange.rs +++ b/src/bitrange.rs @@ -12,17 +12,18 @@ macro_rules! try { } #[derive(Clone, Copy, Debug, PartialEq)] -enum BitRangeType { +pub enum BitRangeType { BitRange, OffsetWidth, MsbLsb, } +// TODO: reimplement equality #[derive(Clone, Copy, Debug, PartialEq)] pub struct BitRange { pub offset: u32, pub width: u32, - range_type: BitRangeType + pub range_type: BitRangeType } impl ParseElem for BitRange { @@ -58,10 +59,8 @@ impl ParseElem for BitRange { impl EncodeChildren for BitRange { - fn encode_children(&self, elem: &Element) -> Element { - let mut tree = elem.clone(); - - let children = match self.range_type { + fn encode_children(&self) -> Vec { + match self.range_type { BitRangeType::BitRange => vec![ new_element("bitRange", Some(format!("[{}:{}]", self.offset + self.width - 1, self.offset))), ], @@ -73,10 +72,7 @@ impl EncodeChildren for BitRange { new_element("bitOffset", Some(format!("{}", self.offset))), new_element("bitWidth", Some(format!("{}", self.width))) ], - }; - - tree.children.append(&mut children.clone()); - tree + } } } @@ -103,9 +99,9 @@ mod tests { let tree1 = &try!(Element::parse(s.as_bytes())); let value = BitRange::parse(tree1); assert_eq!(value, a, "Parsing `{}` expected `{:?}`", s, a); - let tree2 = new_element("fake", None); - let tree2 = &value.encode_children(&tree2); - assert_eq!(tree1, tree2, "Encoding {:?} expected {}", a, s); + let mut tree2 = new_element("fake", None); + tree2.children = value.encode_children(); + assert_eq!(tree1, &tree2, "Encoding {:?} expected {}", a, s); } } } diff --git a/src/defaults.rs b/src/defaults.rs index 503cd555..725560b2 100644 --- a/src/defaults.rs +++ b/src/defaults.rs @@ -38,30 +38,30 @@ impl ParseElem for Defaults { } impl EncodeChildren for Defaults { - fn encode_children(&self, e: &Element) -> Element { - let mut elem = (*e).clone(); + fn encode_children(&self) -> Vec { + let mut children = Vec::new(); match self.size { - Some(ref v) => { elem.children.push(new_element("size", Some(format!("0x{:08.x}", v)))); }, + Some(ref v) => { children.push(new_element("size", Some(format!("0x{:08.x}", v)))); }, None => (), }; match self.reset_value { - Some(ref v) => { elem.children.push(new_element("resetValue", Some(format!("0x{:08.x}", v)))); }, + Some(ref v) => { children.push(new_element("resetValue", Some(format!("0x{:08.x}", v)))); }, None => (), }; - match self.reset_mask { - Some(ref v) => { elem.children.push(new_element("resetMask", Some(format!("0x{:08.x}", v)))); }, + match self.reset_mask { + Some(ref v) => { children.push(new_element("resetMask", Some(format!("0x{:08.x}", v)))); }, None => (), }; match self.access { - Some(ref v) => { elem.children.push(v.encode()); }, + Some(ref v) => { children.push(v.encode()); }, None => (), }; - elem + children } } @@ -94,7 +94,7 @@ mod tests { assert_eq!(parsed, expected, "Parsing tree failed"); let mut tree2 = new_element("mock", None); - tree2 = parsed.encode_children(&tree2); + tree2.children = parsed.encode_children(); assert_eq!(tree1, &tree2, "Encoding value failed"); } } \ No newline at end of file diff --git a/src/enumeratedvalues.rs b/src/enumeratedvalues.rs index c8bc0c7d..2e8ea071 100644 --- a/src/enumeratedvalues.rs +++ b/src/enumeratedvalues.rs @@ -16,7 +16,7 @@ pub struct EnumeratedValues { pub derived_from: Option, pub values: Vec, // Reserve the right to add more fields to this struct - _extensible: (), + pub _extensible: (), } impl ParseElem for EnumeratedValues { diff --git a/src/field.rs b/src/field.rs index 20fd1187..811935e0 100644 --- a/src/field.rs +++ b/src/field.rs @@ -1,5 +1,6 @@ extern crate xmltree; +use std::collections::HashMap; use xmltree::Element; use ElementExt; @@ -15,8 +16,7 @@ macro_rules! try { } } - -#[derive(Clone, Debug)] +#[derive(Clone, Debug, PartialEq)] pub struct Field { pub name: String, pub description: Option, @@ -25,7 +25,7 @@ pub struct Field { pub enumerated_values: Vec, pub write_constraint: Option, // Reserve the right to add more fields to this struct - _extensible: (), + pub _extensible: (), } impl ParseElem for Field { @@ -49,5 +49,99 @@ impl ParseElem for Field { } } +impl EncodeElem for Field { + fn encode(&self) -> Element { + let mut elem = Element{ + name: String::from("field"), + attributes: HashMap::new(), + children: vec![ + new_element("name", Some(self.name.clone())), + new_element("description", self.description.clone()), + ], + text: None, + }; + + // Add bit range + elem.children.append(&mut self.bit_range.encode_children()); + + match self.access { + Some(ref v) => { elem.children.push(v.encode()); }, + None => (), + }; + + let mut enumerated_values: Vec = self.enumerated_values.iter().map(|v| { v.encode() }).collect(); + elem.children.append(&mut enumerated_values); + + match self.write_constraint { + Some(ref v) => { elem.children.push(v.encode()); }, + None => (), + }; + + elem + } +} + + +#[cfg(test)] +mod tests { + use super::*; + + use enumeratedvalue::EnumeratedValue; + + #[test] + fn decode_encode() { + let types = vec![ + (Field{ + name: String::from("MODE"), + description: Some(String::from("Read Mode")), + bit_range: BitRange{offset: 24, width: 2, range_type: BitRangeType::OffsetWidth}, + access: Some(Access::ReadWrite), + enumerated_values: vec![ + EnumeratedValues { + name: None, + usage: None, + derived_from: None, + values: vec![ + EnumeratedValue { + name: String::from("WS0"), + description: Some(String::from("Zero wait-states inserted in fetch or read transfers")), + value: Some(0), + is_default: None, + _extensible: (), + }, + ], + _extensible: (), + }], + write_constraint: None, + _extensible: (), + }, + String::from(" + + MODE + Read Mode + 24 + 2 + read-write + + + WS0 + Zero wait-states inserted in fetch or read transfers + 0x00000000 + + + + ")), + ]; + + for (a, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let v = Field::parse(tree1); + assert_eq!(v, a, "Parsing `{}` expected `{:?}`", s, a); + let tree2 = &v.encode(); + assert_eq!(tree1, tree2, "Encoding {:?} expected {}", a, s); + } + } +} + diff --git a/src/helpers.rs b/src/helpers.rs index 94a45e83..5ed71780 100644 --- a/src/helpers.rs +++ b/src/helpers.rs @@ -4,27 +4,27 @@ use std::collections::HashMap; use xmltree::Element; +// ParseElem parses an object from an XML element pub trait ParseElem { fn parse(tree: &Element) -> Self; } -pub trait ParseOption { - fn parse(tree: &Element) -> Self; -} - +// ParseChildren parses an object from children of an XML element pub trait ParseChildren { fn parse_children(tree: &Element) -> Self; } +// EncodeElem trait encodes an object to an XML element pub trait EncodeElem { fn encode(&self) -> Element; } +// EncodeChildren trait encodes an object to a vector of child elements pub trait EncodeChildren { - fn encode_children(&self, &Element) -> Element; + fn encode_children(&self) -> Vec; } - +// Helper to assist with creation of simple elements pub fn new_element(name: &str, text: Option) -> Element { Element{ name: String::from(name), @@ -33,3 +33,4 @@ pub fn new_element(name: &str, text: Option) -> Element { text: text, } } + diff --git a/src/lib.rs b/src/lib.rs index 23256ab5..11d1a47e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -58,6 +58,8 @@ mod field; pub use field::*; mod register; pub use register::*; +mod registerinfo; +pub use registerinfo::*; macro_rules! try { ($e:expr) => { diff --git a/src/register.rs b/src/register.rs index 8e8fc73c..9411a3e8 100644 --- a/src/register.rs +++ b/src/register.rs @@ -5,12 +5,9 @@ use std::ops::Deref; use xmltree::Element; use ElementExt; -use helpers::*; -use access::*; use parse; -use Field; -use writeconstraint::*; - +use helpers::*; +use registerinfo::*; macro_rules! try { ($e:expr) => { @@ -19,23 +16,6 @@ macro_rules! try { } - -#[derive(Clone, Debug)] -pub struct RegisterInfo { - pub name: String, - pub description: String, - pub address_offset: u32, - pub size: Option, - pub access: Option, - pub reset_value: Option, - pub reset_mask: Option, - /// `None` indicates that the `` node is not present - pub fields: Option>, - pub write_constraint: Option, - // Reserve the right to add more fields to this struct - _extensible: (), -} - #[derive(Clone, Debug)] pub struct RegisterArrayInfo { pub dim: u32, @@ -60,29 +40,6 @@ impl Deref for Register { } } -impl ParseElem for RegisterInfo { - fn parse(tree: &Element) -> RegisterInfo { - RegisterInfo { - name: try!(tree.get_child_text("name")), - description: try!(tree.get_child_text("description")), - address_offset: { - try!(parse::u32(try!(tree.get_child("addressOffset")))) - }, - size: tree.get_child("size").map(|t| try!(parse::u32(t))), - access: tree.get_child("access").map(Access::parse), - reset_value: - tree.get_child("resetValue").map(|t| try!(parse::u32(t))), - reset_mask: - tree.get_child("resetMask").map(|t| try!(parse::u32(t))), - fields: - tree.get_child("fields") - .map(|fs| fs.children.iter().map(Field::parse).collect()), - write_constraint: tree.get_child("writeConstraint") - .map(WriteConstraint::parse), - _extensible: (), - } - } -} impl ParseElem for RegisterArrayInfo { fn parse(tree: &Element) -> RegisterArrayInfo { diff --git a/src/registerinfo.rs b/src/registerinfo.rs new file mode 100644 index 00000000..7e501406 --- /dev/null +++ b/src/registerinfo.rs @@ -0,0 +1,180 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; +use ElementExt; + +use helpers::*; +use access::*; +use parse; +use Field; +use writeconstraint::*; + + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Debug, PartialEq)] +pub struct RegisterInfo { + pub name: String, + pub description: String, + pub address_offset: u32, + pub size: Option, + pub access: Option, + pub reset_value: Option, + pub reset_mask: Option, + /// `None` indicates that the `` node is not present + pub fields: Option>, + pub write_constraint: Option, + // Reserve the right to add more fields to this struct + pub _extensible: (), +} + +impl ParseElem for RegisterInfo { + fn parse(tree: &Element) -> RegisterInfo { + RegisterInfo { + name: try!(tree.get_child_text("name")), + description: try!(tree.get_child_text("description")), + address_offset: { + try!(parse::u32(try!(tree.get_child("addressOffset")))) + }, + size: tree.get_child("size").map(|t| try!(parse::u32(t))), + access: tree.get_child("access").map(Access::parse), + reset_value: + tree.get_child("resetValue").map(|t| try!(parse::u32(t))), + reset_mask: + tree.get_child("resetMask").map(|t| try!(parse::u32(t))), + fields: + tree.get_child("fields") + .map(|fs| fs.children.iter().map(Field::parse).collect()), + write_constraint: tree.get_child("writeConstraint") + .map(WriteConstraint::parse), + _extensible: (), + } + } +} + +impl EncodeElem for RegisterInfo { + fn encode(&self) -> Element { + let mut elem = Element{ + name: String::from("register"), + attributes: HashMap::new(), + children: vec![ + new_element("name", Some(self.name.clone())), + new_element("description", Some(self.description.clone())), + new_element("addressOffset", Some(format!("0x{:03.x}", self.address_offset))), + ], + text: None, + }; + + match self.size { + Some(ref v) => { elem.children.push(new_element("size", Some(format!("{}", v)))); }, + None => (), + }; + + match self.access { + Some(ref v) => { elem.children.push( v.encode()); }, + None => (), + }; + + match self.reset_value { + Some(ref v) => { elem.children.push(new_element("resetValue", Some(format!("0x{:08.x}", v)))); }, + None => (), + }; + + match self.reset_mask { + Some(ref v) => { elem.children.push(new_element("resetMask", Some(format!("0x{:08.x}", v)))); }, + None => (), + }; + + match self.fields { + Some(ref v) => { + let fields = Element{ + name: String::from("fields"), + attributes: HashMap::new(), + children: v.iter().map(Field::encode).collect(), + text: None, + }; + elem.children.push(fields); + }, + None => (), + }; + + match self.write_constraint { + Some(ref v) => { elem.children.push(v.encode()); }, + None => (), + }; + + elem + } +} + + +#[cfg(test)] +mod tests { + use super::*; + use bitrange::*; + + #[test] + fn decode_encode() { + let types = vec![ + (RegisterInfo{ + name: String::from("WRITECTRL"), + description: String::from("Write Control Register"), + address_offset: 8, + size: Some(32), + access: Some(Access::ReadWrite), + reset_value: Some(0x00000000), + reset_mask: Some(0x00000023), + fields: Some(vec![ + Field { + name: String::from("WREN"), + description: Some(String::from("Enable Write/Erase Controller")), + bit_range: BitRange{offset: 0, width: 1, range_type: BitRangeType::OffsetWidth}, + access: Some(Access::ReadWrite), + enumerated_values: Vec::new(), + write_constraint: None, + _extensible: (), + } + ]), + write_constraint: None, + _extensible: (), + }, + String::from(" + + WRITECTRL + Write Control Register + 0x008 + 32 + read-write + 0x00000000 + 0x00000023 + + + WREN + Enable Write/Erase Controller + 0 + 1 + read-write + + + + ")), + ]; + + for (a, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let v = RegisterInfo::parse(tree1); + assert_eq!(v, a, "Parsing `{}` expected `{:?}`", s, a); + let tree2 = &v.encode(); + assert_eq!(tree1, tree2, "Encoding {:?} expected {}", a, s); + } + } +} + + + From 87b078e6af7cd954a2323a58c3bdced4cf5cce6e Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 22 Aug 2017 21:44:16 +1200 Subject: [PATCH 12/25] Playing with lossless uint encoding/decoding type --- src/lib.rs | 3 +- src/types.rs | 101 +++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 103 insertions(+), 1 deletion(-) create mode 100644 src/types.rs diff --git a/src/lib.rs b/src/lib.rs index 11d1a47e..3ae4b55d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -22,7 +22,7 @@ //! - [SVD file database](https://github.com/posborne/cmsis-svd/tree/master/data) //! - [Sample SVD file](https://www.keil.com/pack/doc/CMSIS/SVD/html/svd_Example_pg.html) -#![deny(warnings)] +//#![deny(warnings)] extern crate xmltree; @@ -31,6 +31,7 @@ use xmltree::Element; mod helpers; use helpers::*; +mod types; mod parse; diff --git a/src/types.rs b/src/types.rs new file mode 100644 index 00000000..dfd1133c --- /dev/null +++ b/src/types.rs @@ -0,0 +1,101 @@ + +// Encoding type +#[derive(Debug)] +enum Encoding { + Bin, + Oct, + Dec, + Hex, +} + +// Uint type for less lossy encoding/decoding +#[derive(Debug)] +pub struct Uint { + pub value: u32, + width: usize, + encoding: Encoding, +} + +// Equality based only on value +impl PartialEq for Uint { + fn eq(&self, other: &Self) -> bool { + self.value == other.value + } +} + +impl Uint { + pub fn parse(text: &str) -> Uint { + if text.starts_with("0x") || text.starts_with("0X") { + Uint { + value: u32::from_str_radix(&text["0x".len()..], 16).unwrap(), + width: text.len()-2, + encoding: Encoding::Hex, + } + } else if text.starts_with('#') { + Uint { + value: u32::from_str_radix(&str::replace(&text["#".len()..], "x", "0"), 2).unwrap(), + width: text.len()-1, + encoding: Encoding::Bin, + } + } else if text.starts_with('0') { + Uint { + value: u32::from_str_radix(text, 8).unwrap(), + width: text.len()-1, + encoding: Encoding::Oct, + } + } else { + Uint { + value: text.parse().unwrap(), + width: text.len(), + encoding: Encoding::Dec, + } + } + } + + pub fn encode(&self) -> String { + match self.encoding { + Encoding::Dec => { + let base = &format!("{}", self.value); + let packing = String::from_utf8(vec!['0' as u8; self.width - base.len()]).unwrap(); + format!("{}{}", packing, base) + }, + Encoding::Hex => { + let base = format!("{:.x}", self.value); + let packing = String::from_utf8(vec!['0' as u8; self.width - base.len()]).unwrap(); + format!("0x{}{}", packing, base) + }, + Encoding::Oct => { + let base = &format!("{:o}", self.value); + let packing = String::from_utf8(vec!['0' as u8; self.width - base.len()]).unwrap(); + format!("0{}{}", packing, base) + }, + Encoding::Bin => { + let base = format!("{:b}", self.value); + let packing = String::from_utf8(vec!['0' as u8; self.width - base.len()]).unwrap(); + format!("#{}{}", packing, base) + }, + } + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn uint_decode_encode() { + let tests = vec![ + ("104", Uint{value: 104, width: 3, encoding: Encoding::Dec}), + ("0x013a", Uint{value: 314, width: 4, encoding: Encoding::Hex}), + ("01232", Uint{value: 666, width: 4, encoding: Encoding::Oct}), + ("#0101", Uint{value: 5, width: 4, encoding: Encoding::Bin}), + ]; + + for (text, value) in tests { + let a = Uint::parse(text); + assert_eq!(a, value); + let b = value.encode(); + assert_eq!(b, text); + } + } +} \ No newline at end of file From 89094bb02fb12210e0cfd70277e9aad6917bda21 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 22 Aug 2017 22:40:58 +1200 Subject: [PATCH 13/25] Playing with lossless uint encoding/decoding type --- src/cpu.rs | 120 +++++++++++++++++++++++++++++++++++++ src/lib.rs | 125 +++------------------------------------ src/peripheral.rs | 108 +++++++++++++++++++++++++++++++++ src/register.rs | 53 +++++++---------- src/registerarrayinfo.rs | 48 +++++++++++++++ 5 files changed, 304 insertions(+), 150 deletions(-) create mode 100644 src/cpu.rs create mode 100644 src/peripheral.rs create mode 100644 src/registerarrayinfo.rs diff --git a/src/cpu.rs b/src/cpu.rs new file mode 100644 index 00000000..65588cc4 --- /dev/null +++ b/src/cpu.rs @@ -0,0 +1,120 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; + +use ElementExt; +use parse; +use helpers::*; +use endian::*; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Debug, PartialEq)] +pub struct Cpu { + pub name: String, + pub revision: String, + pub endian: Endian, + pub mpu_present: bool, + pub fpu_present: bool, + pub nvic_priority_bits: u32, + pub has_vendor_systick: bool, + + // Reserve the right to add more fields to this struct + pub _extensible: (), +} + +impl Cpu { + pub fn is_cortex_m(&self) -> bool { + self.name.starts_with("CM") + } +} + +impl ParseElem for Cpu { + fn parse(tree: &Element) -> Cpu { + // TODO: not sure where CPU comes from here? + // EFM32 SVDs appear to have "device" key with similar stuff under it. + assert_eq!(tree.name, "cpu"); + + Cpu { + name: try!(tree.get_child_text("name")), + revision: try!(tree.get_child_text("revision")), + endian: Endian::parse(try!(tree.get_child("endian"))), + mpu_present: try!(parse::bool(try!(tree.get_child("mpuPresent")))), + fpu_present: try!(parse::bool(try!(tree.get_child("fpuPresent")))), + nvic_priority_bits: + try!(parse::u32(try!(tree.get_child("nvicPrioBits")))), + has_vendor_systick: + try!(parse::bool(try!(tree.get_child("vendorSystickConfig")))), + + _extensible: (), + } + } +} + +impl EncodeElem for Cpu { + fn encode(&self) -> Element { + Element{ + name: String::from("cpu"), + attributes: HashMap::new(), + children: vec![ + new_element("name", Some(self.name.clone())), + new_element("revision", Some(self.revision.clone())), + self.endian.encode(), + new_element("mpuPresent", Some(format!("{}", self.mpu_present))), + new_element("fpuPresent", Some(format!("{}", self.fpu_present))), + new_element("nvicPrioBits", Some(format!("{}", self.nvic_priority_bits))), + new_element("vendorSystickConfig", Some(format!("{}", self.has_vendor_systick))), + ], + text: None, + } + } +} + + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let types = vec![ + (Cpu{ + name: String::from("EFM32JG12B500F512GM48"), + revision: String::from("5.1.1"), + endian: Endian::Little, + mpu_present: true, + fpu_present: true, + nvic_priority_bits: 8, + has_vendor_systick: false, + _extensible: (), + }, String::from(" + + EFM32JG12B500F512GM48 + 5.1.1 + little + true + true + 8 + false + + ")) + ]; + + for (a, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let value = Cpu::parse(tree1); + assert_eq!(value, a, "Parsing `{}` expected `{:?}`", s, a); + let tree2 = value.encode(); + assert_eq!(tree1, &tree2, "Encoding {:?} expected {}", a, s); + } + } +} + + + diff --git a/src/lib.rs b/src/lib.rs index 3ae4b55d..8d94c417 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -31,7 +31,6 @@ use xmltree::Element; mod helpers; use helpers::*; -mod types; mod parse; @@ -61,6 +60,14 @@ mod register; pub use register::*; mod registerinfo; pub use registerinfo::*; +mod registerarrayinfo; +pub use registerarrayinfo::*; +mod peripheral; +pub use peripheral::*; +mod cpu; +pub use cpu::*; +mod device; +pub use device::*; macro_rules! try { ($e:expr) => { @@ -97,124 +104,8 @@ impl ElementExt for Element { } } -#[derive(Clone, Debug)] -pub struct Device { - pub name: String, - pub cpu: Option, - pub peripherals: Vec, - pub defaults: Defaults, - // Reserve the right to add more fields to this struct - _extensible: (), -} - -impl Device { - /// Parses a SVD file - /// - /// # Panics - /// - /// If the input is an invalid SVD file (yay, no error handling) - pub fn parse(svd: &str) -> Device { - let tree = &try!(Element::parse(svd.as_bytes())); - - Device { - name: try!(tree.get_child_text("name")), - cpu: tree.get_child("cpu").map(Cpu::parse), - peripherals: try!(tree.get_child("peripherals")) - .children - .iter() - .map(Peripheral::parse) - .collect(), - defaults: Defaults::parse(tree), - _extensible: (), - } - } -} -#[derive(Clone, Debug)] -pub struct Cpu { - pub name: String, - pub revision: String, - pub endian: Endian, - pub mpu_present: bool, - pub fpu_present: bool, - pub nvic_priority_bits: u32, - pub has_vendor_systick: bool, - - // Reserve the right to add more fields to this struct - _extensible: (), -} - -impl Cpu { - fn parse(tree: &Element) -> Cpu { - assert_eq!(tree.name, "cpu"); - - Cpu { - name: try!(tree.get_child_text("name")), - revision: try!(tree.get_child_text("revision")), - endian: Endian::parse(try!(tree.get_child("endian"))), - mpu_present: try!(parse::bool(try!(tree.get_child("mpuPresent")))), - fpu_present: try!(parse::bool(try!(tree.get_child("fpuPresent")))), - nvic_priority_bits: - try!(parse::u32(try!(tree.get_child("nvicPrioBits")))), - has_vendor_systick: - try!(parse::bool(try!(tree.get_child("vendorSystickConfig")))), - - _extensible: (), - } - } - - pub fn is_cortex_m(&self) -> bool { - self.name.starts_with("CM") - } -} - -#[derive(Clone, Debug)] -pub struct Peripheral { - pub name: String, - pub group_name: Option, - pub description: Option, - pub base_address: u32, - pub interrupt: Vec, - /// `None` indicates that the `` node is not present - pub registers: Option>, - pub derived_from: Option, - // Reserve the right to add more fields to this struct - _extensible: (), -} - -impl Peripheral { - fn parse(tree: &Element) -> Peripheral { - assert_eq!(tree.name, "peripheral"); - - Peripheral { - name: try!(tree.get_child_text("name")), - group_name: tree.get_child_text("groupName"), - description: tree.get_child_text("description"), - base_address: try!(parse::u32(try!(tree.get_child("baseAddress")))), - interrupt: tree.children - .iter() - .filter(|t| t.name == "interrupt") - .map(Interrupt::parse) - .collect::>(), - registers: tree.get_child("registers") - .map( - |rs| { - rs.children - .iter() - .filter_map(Register::parse) - .collect() - }, - ), - derived_from: tree.attributes.get("derivedFrom").map( - |s| { - s.to_owned() - }, - ), - _extensible: (), - } - } -} diff --git a/src/peripheral.rs b/src/peripheral.rs new file mode 100644 index 00000000..7f2809eb --- /dev/null +++ b/src/peripheral.rs @@ -0,0 +1,108 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; +use ElementExt; + +use parse; +use helpers::*; +use interrupt::*; +use register::*; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Debug)] +pub struct Peripheral { + pub name: String, + pub version: Option, + pub group_name: Option, + pub description: Option, + pub base_address: u32, + pub interrupt: Vec, + /// `None` indicates that the `` node is not present + pub registers: Option>, + pub derived_from: Option, + // Reserve the right to add more fields to this struct + _extensible: (), +} + +impl ParseElem for Peripheral { + fn parse(tree: &Element) -> Peripheral { + assert_eq!(tree.name, "peripheral"); + + Peripheral { + name: try!(tree.get_child_text("name")), + version: tree.get_child_text("version"), + group_name: tree.get_child_text("groupName"), + description: tree.get_child_text("description"), + base_address: try!(parse::u32(try!(tree.get_child("baseAddress")))), + interrupt: tree.children + .iter() + .filter(|t| t.name == "interrupt") + .map(Interrupt::parse) + .collect::>(), + registers: tree.get_child("registers") + .map( + |rs| { + rs.children + .iter() + .filter(|v| {v.name == "register"}) + .map(Register::parse) + .collect() + }, + ), + derived_from: tree.attributes.get("derivedFrom").map( + |s| { + s.to_owned() + }, + ), + _extensible: (), + } + } +} + +impl EncodeElem for Peripheral { + fn encode(&self) -> Element { + let mut elem = Element{ + name: String::from("peripheral"), + attributes: HashMap::new(), + children: vec![ + new_element("name", Some(self.name.clone())), + ], + text: None, + }; + + match self.version { + Some(ref v) => { elem.children.push(new_element("version", Some(format!("{}", v)))); }, + None => (), + }; + match self.group_name { + Some(ref v) => { elem.children.push(new_element("groupName", Some(format!("{}", v)))); }, + None => (), + }; + match self.description { + Some(ref v) => { elem.children.push(new_element("description", Some(format!("{}", v)))); }, + None => (), + }; + elem.children.push(new_element("baseAddress", Some(format!("{:.08x}", self.base_address)))); + elem.children.append(&mut self.interrupt.iter().map(Interrupt::encode).collect()); + match self.registers { + Some(ref v) => { + elem.children.push(Element{ + name: String::from("registers"), + attributes: HashMap::new(), + children: v.iter().map(Register::encode).collect(), + text: None, + }); + }, + None => (), + }; + + elem + } +} \ No newline at end of file diff --git a/src/register.rs b/src/register.rs index 9411a3e8..79cc6043 100644 --- a/src/register.rs +++ b/src/register.rs @@ -3,32 +3,19 @@ extern crate xmltree; use std::ops::Deref; use xmltree::Element; -use ElementExt; -use parse; use helpers::*; use registerinfo::*; - -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} +use registerarrayinfo::*; -#[derive(Clone, Debug)] -pub struct RegisterArrayInfo { - pub dim: u32, - pub dim_increment: u32, - pub dim_index: Option>, -} - #[derive(Clone, Debug)] pub enum Register { Single(RegisterInfo), Array(RegisterInfo, RegisterArrayInfo), } + impl Deref for Register { type Target = RegisterInfo; @@ -41,23 +28,9 @@ impl Deref for Register { } -impl ParseElem for RegisterArrayInfo { - fn parse(tree: &Element) -> RegisterArrayInfo { - RegisterArrayInfo { - dim: try!(tree.get_child_text("dim").unwrap().parse::()), - dim_increment: try!( - tree.get_child("dimIncrement") - .map(|t| try!(parse::u32(t))) - ), - dim_index: tree.get_child("dimIndex") - .map(|c| parse::dim_index(try!(c.text.as_ref()))), - } - } -} - -impl Register { +impl ParseElem for Register { // TODO handle "clusters", return `Register` not an `Option` - pub fn parse(tree: &Element) -> Option { + fn parse(tree: &Element) -> Register { assert_eq!(tree.name, "register"); let info = RegisterInfo::parse(tree); @@ -68,10 +41,24 @@ impl Register { if let Some(ref indices) = array_info.dim_index { assert_eq!(array_info.dim as usize, indices.len()) } - Some(Register::Array(info, array_info)) + Register::Array(info, array_info) } else { - Some(Register::Single(info)) + Register::Single(info) } } } +impl EncodeElem for Register { + fn encode(&self) -> Element { + match *self { + Register::Single(ref info) => { + info.encode() + }, + Register::Array(ref info, ref array_info) => { + // TODO: fix this (does not encode array stuff) + // Not even slightly sure what to do here + info.encode() + }, + } + } +} \ No newline at end of file diff --git a/src/registerarrayinfo.rs b/src/registerarrayinfo.rs new file mode 100644 index 00000000..b7e10d32 --- /dev/null +++ b/src/registerarrayinfo.rs @@ -0,0 +1,48 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; +use ElementExt; + +use parse; +use helpers::*; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Debug)] +pub struct RegisterArrayInfo { + pub dim: u32, + pub dim_increment: u32, + pub dim_index: Option>, +} + +impl ParseElem for RegisterArrayInfo { + fn parse(tree: &Element) -> RegisterArrayInfo { + RegisterArrayInfo { + dim: try!(tree.get_child_text("dim").unwrap().parse::()), + dim_increment: try!( + tree.get_child("dimIncrement") + .map(|t| try!(parse::u32(t))) + ), + dim_index: tree.get_child("dimIndex") + .map(|c| parse::dim_index(try!(c.text.as_ref()))), + } + } +} + +impl EncodeElem for RegisterArrayInfo { + fn encode(&self) -> Element { + Element{ + name: String::from("NOPE"), + attributes: HashMap::new(), + children: Vec::new(), + text: None, + } + } +} + From ed68e57f2e7c6c5b05d57b0ddfe84e0cdc7a5e97 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 22 Aug 2017 22:50:46 +1200 Subject: [PATCH 14/25] Almost there -big sigh- --- src/device.rs | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++ src/lib.rs | 11 +++++---- 2 files changed, 73 insertions(+), 5 deletions(-) create mode 100644 src/device.rs diff --git a/src/device.rs b/src/device.rs new file mode 100644 index 00000000..f6418c83 --- /dev/null +++ b/src/device.rs @@ -0,0 +1,67 @@ +use xmltree::Element; + +use std::collections::HashMap; + +use helpers::*; +use ElementExt; +use cpu::*; +use defaults::*; +use peripheral::*; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Debug)] +pub struct Device { + pub name: String, + pub cpu: Option, + pub peripherals: Vec, + pub defaults: Defaults, + // Reserve the right to add more fields to this struct + _extensible: (), +} + +impl ParseElem for Device { + fn parse(tree: &Element) -> Device { + Device { + name: try!(tree.get_child_text("name")), + cpu: tree.get_child("cpu").map(Cpu::parse), + peripherals: try!(tree.get_child("peripherals")) + .children + .iter() + .map(Peripheral::parse) + .collect(), + defaults: Defaults::parse(tree), + _extensible: (), + } + } +} + +impl EncodeElem for Device { + fn encode(&self) -> Element { + let mut elem = Element { + name: String::from("device"), + attributes: HashMap::new(), + children: vec![ + new_element("name", Some(self.name.clone())), + ], + text: None, + }; + + match self.cpu { + Some(ref v) => { elem.children.push(v.encode()); }, + None => (), + }; + elem.children.push(Element{ + name: String::from("peripherals"), + attributes: HashMap::new(), + children: self.peripherals.iter().map(Peripheral::encode).collect(), + text: None, + }); + + elem + } +} diff --git a/src/lib.rs b/src/lib.rs index 8d94c417..3a61a37e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -26,14 +26,12 @@ extern crate xmltree; - use xmltree::Element; -mod helpers; -use helpers::*; mod parse; - +mod helpers; +use helpers::*; mod endian; pub use endian::*; mod access; @@ -69,15 +67,18 @@ pub use cpu::*; mod device; pub use device::*; + macro_rules! try { ($e:expr) => { $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) } } + /// Parses the contents of a SVD file (XML) pub fn parse(xml: &str) -> Device { - Device::parse(xml) + let tree = &try!(Element::parse(xml.as_bytes())); + Device::parse(tree) } trait ElementExt { From e5438756df174ce67883207ab448b36cba2e2cc3 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Wed, 23 Aug 2017 11:57:58 +1200 Subject: [PATCH 15/25] Reformatted (with 120 linewidth) --- .rustfmt.toml | 2 +- src/access.rs | 24 +++++-- src/bitrange.rs | 102 +++++++++++++++++++++-------- src/cpu.rs | 43 +++++++------ src/defaults.rs | 32 +++++---- src/device.rs | 10 +-- src/endian.rs | 17 +++-- src/enumeratedvalue.rs | 56 ++++++++-------- src/enumeratedvalues.rs | 51 +++++++++------ src/field.rs | 77 +++++++++++++--------- src/helpers.rs | 3 +- src/interrupt.rs | 27 ++++---- src/lib.rs | 7 -- src/parse.rs | 2 +- src/peripheral.rs | 69 +++++++++++--------- src/register.rs | 8 +-- src/registerarrayinfo.rs | 13 ++-- src/registerinfo.rs | 125 +++++++++++++++++++++--------------- src/usage.rs | 8 +-- src/writeconstraint.rs | 31 +++++---- src/writeconstraintrange.rs | 4 +- 21 files changed, 417 insertions(+), 294 deletions(-) diff --git a/.rustfmt.toml b/.rustfmt.toml index bd7a3e01..4699f4de 100644 --- a/.rustfmt.toml +++ b/.rustfmt.toml @@ -2,6 +2,6 @@ array_layout = "Block" fn_args_layout = "Block" fn_call_style = "Block" generics_indent = "Block" -max_width = 80 +max_width = 120 where_style = "Rfc" write_mode = "overwrite" \ No newline at end of file diff --git a/src/access.rs b/src/access.rs index 04719f6c..b43d6ceb 100644 --- a/src/access.rs +++ b/src/access.rs @@ -46,7 +46,7 @@ impl EncodeElem for Access { Access::WriteOnce => String::from("writeOnce"), }; - Element{ + Element { name: String::from("access"), attributes: HashMap::new(), children: Vec::new(), @@ -62,11 +62,23 @@ mod tests { #[test] fn decode_encode() { let types = vec![ - (Access::ReadOnly, String::from("read-only")), - (Access::ReadWrite, String::from("read-write")), - (Access::ReadWriteOnce, String::from("read-writeOnce")), - (Access::WriteOnly, String::from("write-only")), - (Access::WriteOnce, String::from("writeOnce")) + (Access::ReadOnly, String::from("read-only")), + ( + Access::ReadWrite, + String::from("read-write") + ), + ( + Access::ReadWriteOnce, + String::from("read-writeOnce") + ), + ( + Access::WriteOnly, + String::from("write-only") + ), + ( + Access::WriteOnce, + String::from("writeOnce") + ), ]; for (a, s) in types { diff --git a/src/bitrange.rs b/src/bitrange.rs index 4533b6c1..c93b48af 100644 --- a/src/bitrange.rs +++ b/src/bitrange.rs @@ -23,13 +23,12 @@ pub enum BitRangeType { pub struct BitRange { pub offset: u32, pub width: u32, - pub range_type: BitRangeType + pub range_type: BitRangeType, } impl ParseElem for BitRange { fn parse(tree: &Element) -> BitRange { - let (end, start, range_type): (u32, u32, BitRangeType) = if let Some(range) = - tree.get_child("bitRange") { + let (end, start, range_type): (u32, u32, BitRangeType) = if let Some(range) = tree.get_child("bitRange") { let text = try!(range.text.as_ref()); assert!(text.starts_with('[')); @@ -37,16 +36,23 @@ impl ParseElem for BitRange { let mut parts = text[1..text.len() - 1].split(':'); - (try!(try!(parts.next()).parse()), try!(try!(parts.next()).parse()), BitRangeType::BitRange) - } else if let (Some(lsb), Some(msb)) = - (tree.get_child("lsb"), tree.get_child("msb")) { - (try!(parse::u32(msb)), try!(parse::u32(lsb)), BitRangeType::MsbLsb) + ( + try!(try!(parts.next()).parse()), + try!(try!(parts.next()).parse()), + BitRangeType::BitRange, + ) + } else if let (Some(lsb), Some(msb)) = (tree.get_child("lsb"), tree.get_child("msb")) { + ( + try!(parse::u32(msb)), + try!(parse::u32(lsb)), + BitRangeType::MsbLsb, + ) } else { return BitRange { - offset: try!(parse::u32(try!(tree.get_child("bitOffset")))), - width: try!(parse::u32(try!(tree.get_child("bitWidth")))), - range_type: BitRangeType::OffsetWidth, - }; + offset: try!(parse::u32(try!(tree.get_child("bitOffset")))), + width: try!(parse::u32(try!(tree.get_child("bitWidth")))), + range_type: BitRangeType::OffsetWidth, + }; }; BitRange { @@ -61,17 +67,30 @@ impl ParseElem for BitRange { impl EncodeChildren for BitRange { fn encode_children(&self) -> Vec { match self.range_type { - BitRangeType::BitRange => vec![ - new_element("bitRange", Some(format!("[{}:{}]", self.offset + self.width - 1, self.offset))), - ], - BitRangeType::MsbLsb => vec![ - new_element("lsb", Some(format!("{}", self.offset))), - new_element("msb", Some(format!("{}", self.offset + self.width - 1))) - ], - BitRangeType::OffsetWidth => vec![ - new_element("bitOffset", Some(format!("{}", self.offset))), - new_element("bitWidth", Some(format!("{}", self.width))) - ], + BitRangeType::BitRange => { + vec![ + new_element( + "bitRange", + Some(format!( + "[{}:{}]", + self.offset + self.width - 1, + self.offset + )) + ), + ] + } + BitRangeType::MsbLsb => { + vec![ + new_element("lsb", Some(format!("{}", self.offset))), + new_element("msb", Some(format!("{}", self.offset + self.width - 1))), + ] + } + BitRangeType::OffsetWidth => { + vec![ + new_element("bitOffset", Some(format!("{}", self.offset))), + new_element("bitWidth", Some(format!("{}", self.width))), + ] + } } } } @@ -84,15 +103,42 @@ mod tests { #[test] fn decode_encode() { let types = vec![ - (BitRange{offset: 16, width: 4, range_type: BitRangeType::BitRange}, String::from(" + ( + BitRange { + offset: 16, + width: 4, + range_type: BitRangeType::BitRange, + }, + String::from( + " [19:16] - ")), - (BitRange{offset: 16, width: 4, range_type: BitRangeType::OffsetWidth}, String::from(" + ", + ) + ), + ( + BitRange { + offset: 16, + width: 4, + range_type: BitRangeType::OffsetWidth, + }, + String::from( + " 164 - ")), - (BitRange{offset: 16, width: 4, range_type: BitRangeType::MsbLsb}, String::from(" + ", + ) + ), + ( + BitRange { + offset: 16, + width: 4, + range_type: BitRangeType::MsbLsb, + }, + String::from( + " 1619 - ")), + ", + ) + ), ]; for (a, s) in types { diff --git a/src/cpu.rs b/src/cpu.rs index 65588cc4..c72e1c49 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -47,10 +47,8 @@ impl ParseElem for Cpu { endian: Endian::parse(try!(tree.get_child("endian"))), mpu_present: try!(parse::bool(try!(tree.get_child("mpuPresent")))), fpu_present: try!(parse::bool(try!(tree.get_child("fpuPresent")))), - nvic_priority_bits: - try!(parse::u32(try!(tree.get_child("nvicPrioBits")))), - has_vendor_systick: - try!(parse::bool(try!(tree.get_child("vendorSystickConfig")))), + nvic_priority_bits: try!(parse::u32(try!(tree.get_child("nvicPrioBits")))), + has_vendor_systick: try!(parse::bool(try!(tree.get_child("vendorSystickConfig")))), _extensible: (), } @@ -59,7 +57,7 @@ impl ParseElem for Cpu { impl EncodeElem for Cpu { fn encode(&self) -> Element { - Element{ + Element { name: String::from("cpu"), attributes: HashMap::new(), children: vec![ @@ -69,7 +67,10 @@ impl EncodeElem for Cpu { new_element("mpuPresent", Some(format!("{}", self.mpu_present))), new_element("fpuPresent", Some(format!("{}", self.fpu_present))), new_element("nvicPrioBits", Some(format!("{}", self.nvic_priority_bits))), - new_element("vendorSystickConfig", Some(format!("{}", self.has_vendor_systick))), + new_element( + "vendorSystickConfig", + Some(format!("{}", self.has_vendor_systick)) + ), ], text: None, } @@ -84,16 +85,19 @@ mod tests { #[test] fn decode_encode() { let types = vec![ - (Cpu{ - name: String::from("EFM32JG12B500F512GM48"), - revision: String::from("5.1.1"), - endian: Endian::Little, - mpu_present: true, - fpu_present: true, - nvic_priority_bits: 8, - has_vendor_systick: false, - _extensible: (), - }, String::from(" + ( + Cpu { + name: String::from("EFM32JG12B500F512GM48"), + revision: String::from("5.1.1"), + endian: Endian::Little, + mpu_present: true, + fpu_present: true, + nvic_priority_bits: 8, + has_vendor_systick: false, + _extensible: (), + }, + String::from( + " EFM32JG12B500F512GM48 5.1.1 @@ -103,7 +107,9 @@ mod tests { 8 false - ")) + ", + ) + ), ]; for (a, s) in types { @@ -115,6 +121,3 @@ mod tests { } } } - - - diff --git a/src/defaults.rs b/src/defaults.rs index 725560b2..82bb4457 100644 --- a/src/defaults.rs +++ b/src/defaults.rs @@ -27,10 +27,8 @@ impl ParseElem for Defaults { fn parse(tree: &Element) -> Defaults { Defaults { size: tree.get_child("size").map(|t| try!(parse::u32(t))), - reset_value: - tree.get_child("resetValue").map(|t| try!(parse::u32(t))), - reset_mask: - tree.get_child("resetMask").map(|t| try!(parse::u32(t))), + reset_value: tree.get_child("resetValue").map(|t| try!(parse::u32(t))), + reset_mask: tree.get_child("resetMask").map(|t| try!(parse::u32(t))), access: tree.get_child("access").map(Access::parse), _extensible: (), } @@ -42,25 +40,33 @@ impl EncodeChildren for Defaults { let mut children = Vec::new(); match self.size { - Some(ref v) => { children.push(new_element("size", Some(format!("0x{:08.x}", v)))); }, + Some(ref v) => { + children.push(new_element("size", Some(format!("0x{:08.x}", v)))); + } None => (), }; match self.reset_value { - Some(ref v) => { children.push(new_element("resetValue", Some(format!("0x{:08.x}", v)))); }, + Some(ref v) => { + children.push(new_element("resetValue", Some(format!("0x{:08.x}", v)))); + } None => (), }; match self.reset_mask { - Some(ref v) => { children.push(new_element("resetMask", Some(format!("0x{:08.x}", v)))); }, + Some(ref v) => { + children.push(new_element("resetMask", Some(format!("0x{:08.x}", v)))); + } None => (), }; match self.access { - Some(ref v) => { children.push(v.encode()); }, + Some(ref v) => { + children.push(v.encode()); + } None => (), }; - + children } } @@ -71,14 +77,16 @@ mod tests { #[test] fn decode_encode() { - let example = String::from(" + let example = String::from( + " 0xaabbccdd 0x11223344 0x00000000 read-only - "); + ", + ); let expected = Defaults { size: Some(0xaabbccdd), @@ -97,4 +105,4 @@ mod tests { tree2.children = parsed.encode_children(); assert_eq!(tree1, &tree2, "Encoding value failed"); } -} \ No newline at end of file +} diff --git a/src/device.rs b/src/device.rs index f6418c83..d31741a6 100644 --- a/src/device.rs +++ b/src/device.rs @@ -45,17 +45,17 @@ impl EncodeElem for Device { let mut elem = Element { name: String::from("device"), attributes: HashMap::new(), - children: vec![ - new_element("name", Some(self.name.clone())), - ], + children: vec![new_element("name", Some(self.name.clone()))], text: None, }; match self.cpu { - Some(ref v) => { elem.children.push(v.encode()); }, + Some(ref v) => { + elem.children.push(v.encode()); + } None => (), }; - elem.children.push(Element{ + elem.children.push(Element { name: String::from("peripherals"), attributes: HashMap::new(), children: self.peripherals.iter().map(Peripheral::encode).collect(), diff --git a/src/endian.rs b/src/endian.rs index abb0403d..849ca87e 100644 --- a/src/endian.rs +++ b/src/endian.rs @@ -17,7 +17,7 @@ pub enum Endian { Little, Big, Selectable, - Other + Other, } impl ParseElem for Endian { @@ -43,7 +43,7 @@ impl EncodeElem for Endian { Endian::Other => String::from("other"), }; - Element{ + Element { name: String::from("endian"), attributes: HashMap::new(), children: Vec::new(), @@ -59,10 +59,13 @@ mod tests { #[test] fn decode_encode() { let types = vec![ - (Endian::Little, String::from("little")), - (Endian::Big, String::from("big")), - (Endian::Selectable, String::from("selectable")), - (Endian::Other, String::from("other")) + (Endian::Little, String::from("little")), + (Endian::Big, String::from("big")), + ( + Endian::Selectable, + String::from("selectable") + ), + (Endian::Other, String::from("other")), ]; for (e, s) in types { @@ -73,4 +76,4 @@ mod tests { assert_eq!(tree1, tree2, "Encoding {:?} expected {}", e, s); } } -} \ No newline at end of file +} diff --git a/src/enumeratedvalue.rs b/src/enumeratedvalue.rs index ced5d112..42d269f6 100644 --- a/src/enumeratedvalue.rs +++ b/src/enumeratedvalue.rs @@ -28,30 +28,22 @@ impl EnumeratedValue { pub fn parse(tree: &Element) -> Option { assert_eq!(tree.name, "enumeratedValue"); - Some( - EnumeratedValue { - name: try!(tree.get_child_text("name")), - description: tree.get_child_text("description"), - value: tree.get_child("value").map(|t| try!(parse::u32(t))), - is_default: tree.get_child_text("isDefault").map( - |t| { - try!(t.parse()) - }, - ), - _extensible: (), - }, - ) + Some(EnumeratedValue { + name: try!(tree.get_child_text("name")), + description: tree.get_child_text("description"), + value: tree.get_child("value").map(|t| try!(parse::u32(t))), + is_default: tree.get_child_text("isDefault").map(|t| try!(t.parse())), + _extensible: (), + }) } } impl EncodeElem for EnumeratedValue { fn encode(&self) -> Element { - let mut base = Element{ + let mut base = Element { name: String::from("enumeratedValue"), attributes: HashMap::new(), - children: vec![ - new_element("name", Some(self.name.clone())), - ], + children: vec![new_element("name", Some(self.name.clone()))], text: None, }; @@ -59,21 +51,27 @@ impl EncodeElem for EnumeratedValue { Some(ref d) => { let s = (*d).clone(); base.children.push(new_element("description", Some(s))); - }, + } None => (), }; match self.value { Some(ref v) => { - base.children.push(new_element("value", Some(format!("0x{:08.x}", *v)))); - }, + base.children.push(new_element( + "value", + Some(format!("0x{:08.x}", *v)), + )); + } None => (), }; match self.is_default { Some(ref v) => { - base.children.push(new_element("isDefault", Some(format!("{}", v)))); - }, + base.children.push(new_element( + "isDefault", + Some(format!("{}", v)), + )); + } None => (), }; @@ -88,17 +86,21 @@ mod tests { #[test] fn decode_encode() { - let example = String::from(" + let example = String::from( + " WS0 Zero wait-states inserted in fetch or read transfers 0x00000000 true - "); - let expected = EnumeratedValue{ + ", + ); + let expected = EnumeratedValue { name: String::from("WS0"), - description: Some(String::from("Zero wait-states inserted in fetch or read transfers")), + description: Some(String::from( + "Zero wait-states inserted in fetch or read transfers", + )), value: Some(0), is_default: Some(true), _extensible: (), @@ -112,4 +114,4 @@ mod tests { let tree2 = &parsed.encode(); assert_eq!(tree1, tree2, "Encoding value failed"); } -} \ No newline at end of file +} diff --git a/src/enumeratedvalues.rs b/src/enumeratedvalues.rs index 2e8ea071..2dc4f53c 100644 --- a/src/enumeratedvalues.rs +++ b/src/enumeratedvalues.rs @@ -26,9 +26,9 @@ impl ParseElem for EnumeratedValues { EnumeratedValues { name: tree.get_child_text("name"), usage: tree.get_child("usage").map(Usage::parse), - derived_from: tree.attributes - .get(&"derivedFrom".to_owned()) - .map(|s| s.to_owned()), + derived_from: tree.attributes.get(&"derivedFrom".to_owned()).map(|s| { + s.to_owned() + }), values: tree.children .iter() .filter_map(EnumeratedValue::parse) @@ -40,7 +40,7 @@ impl ParseElem for EnumeratedValues { impl EncodeElem for EnumeratedValues { fn encode(&self) -> Element { - let mut base = Element{ + let mut base = Element { name: String::from("enumeratedValues"), attributes: HashMap::new(), children: Vec::new(), @@ -48,20 +48,27 @@ impl EncodeElem for EnumeratedValues { }; match self.name { - Some(ref d) => { + Some(ref d) => { base.children.push(new_element("name", Some((*d).clone()))); - }, + } None => (), }; match self.usage { - Some(ref v) => { base.children.push(v.encode()); }, + Some(ref v) => { + base.children.push(v.encode()); + } None => (), }; match self.derived_from { - Some(ref v) => { base.attributes.insert(String::from("derivedFrom"), (*v).clone()); }, - None => () + Some(ref v) => { + base.attributes.insert( + String::from("derivedFrom"), + (*v).clone(), + ); + } + None => (), } for v in &self.values { @@ -85,7 +92,8 @@ mod tests { #[test] fn decode_encode() { - let example = String::from(" + let example = String::from( + " WS0 @@ -99,23 +107,28 @@ mod tests { 0x00000001 - "); + ", + ); - let expected = EnumeratedValues{ + let expected = EnumeratedValues { name: None, usage: None, derived_from: Some(String::from("fake-derivation.png")), - values: vec![ - EnumeratedValue{ + values: vec![ + EnumeratedValue { name: String::from("WS0"), - description: Some(String::from("Zero wait-states inserted in fetch or read transfers")), + description: Some(String::from( + "Zero wait-states inserted in fetch or read transfers", + )), value: Some(0), is_default: Some(true), _extensible: (), - }, - EnumeratedValue{ + }, + EnumeratedValue { name: String::from("WS1"), - description: Some(String::from("One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details")), + description: Some(String::from( + "One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details", + )), value: Some(1), is_default: None, _extensible: (), @@ -132,4 +145,4 @@ mod tests { let tree2 = &parsed.encode(); assert_eq!(tree1, tree2, "Encoding value failed"); } -} \ No newline at end of file +} diff --git a/src/field.rs b/src/field.rs index 811935e0..5b0b2540 100644 --- a/src/field.rs +++ b/src/field.rs @@ -42,8 +42,9 @@ impl ParseElem for Field { .filter(|t| t.name == "enumeratedValues") .map(EnumeratedValues::parse) .collect::>(), - write_constraint: tree.get_child("writeConstraint") - .map(WriteConstraint::parse), + write_constraint: tree.get_child("writeConstraint").map( + WriteConstraint::parse, + ), _extensible: (), } } @@ -51,7 +52,7 @@ impl ParseElem for Field { impl EncodeElem for Field { fn encode(&self) -> Element { - let mut elem = Element{ + let mut elem = Element { name: String::from("field"), attributes: HashMap::new(), children: vec![ @@ -65,15 +66,19 @@ impl EncodeElem for Field { elem.children.append(&mut self.bit_range.encode_children()); match self.access { - Some(ref v) => { elem.children.push(v.encode()); }, + Some(ref v) => { + elem.children.push(v.encode()); + } None => (), }; - let mut enumerated_values: Vec = self.enumerated_values.iter().map(|v| { v.encode() }).collect(); + let mut enumerated_values: Vec = self.enumerated_values.iter().map(|v| v.encode()).collect(); elem.children.append(&mut enumerated_values); match self.write_constraint { - Some(ref v) => { elem.children.push(v.encode()); }, + Some(ref v) => { + elem.children.push(v.encode()); + } None => (), }; @@ -91,31 +96,40 @@ mod tests { #[test] fn decode_encode() { let types = vec![ - (Field{ - name: String::from("MODE"), - description: Some(String::from("Read Mode")), - bit_range: BitRange{offset: 24, width: 2, range_type: BitRangeType::OffsetWidth}, - access: Some(Access::ReadWrite), - enumerated_values: vec![ - EnumeratedValues { - name: None, - usage: None, - derived_from: None, - values: vec![ - EnumeratedValue { - name: String::from("WS0"), - description: Some(String::from("Zero wait-states inserted in fetch or read transfers")), - value: Some(0), - is_default: None, + ( + Field { + name: String::from("MODE"), + description: Some(String::from("Read Mode")), + bit_range: BitRange { + offset: 24, + width: 2, + range_type: BitRangeType::OffsetWidth, + }, + access: Some(Access::ReadWrite), + enumerated_values: vec![ + EnumeratedValues { + name: None, + usage: None, + derived_from: None, + values: vec![ + EnumeratedValue { + name: String::from("WS0"), + description: Some(String::from( + "Zero wait-states inserted in fetch or read transfers", + )), + value: Some(0), + is_default: None, + _extensible: (), + }, + ], _extensible: (), - }, + }, ], + write_constraint: None, _extensible: (), - }], - write_constraint: None, - _extensible: (), - }, - String::from(" + }, + String::from( + " MODE Read Mode @@ -130,7 +144,9 @@ mod tests { - ")), + ", + ) + ), ]; for (a, s) in types { @@ -142,6 +158,3 @@ mod tests { } } } - - - diff --git a/src/helpers.rs b/src/helpers.rs index 5ed71780..744c175a 100644 --- a/src/helpers.rs +++ b/src/helpers.rs @@ -26,11 +26,10 @@ pub trait EncodeChildren { // Helper to assist with creation of simple elements pub fn new_element(name: &str, text: Option) -> Element { - Element{ + Element { name: String::from(name), attributes: HashMap::new(), children: Vec::new(), text: text, } } - diff --git a/src/interrupt.rs b/src/interrupt.rs index 1440ba1e..812d4b04 100644 --- a/src/interrupt.rs +++ b/src/interrupt.rs @@ -33,8 +33,8 @@ impl ParseElem for Interrupt { } impl EncodeElem for Interrupt { - fn encode(&self) -> Element { - Element{ + fn encode(&self) -> Element { + Element { name: String::from("interrupt"), attributes: HashMap::new(), children: vec![ @@ -44,7 +44,7 @@ impl EncodeElem for Interrupt { ], text: None, } - } + } } #[cfg(test)] @@ -54,18 +54,21 @@ mod tests { #[test] fn decode_encode() { let types = vec![ - (Interrupt{ - name: String::from("test"), - description: Some(String::from("description")), - value: 14, - }, - String::from(" + ( + Interrupt { + name: String::from("test"), + description: Some(String::from("description")), + value: 14, + }, + String::from( + " test description 14 - " - )), + ", + ) + ), ]; for (a, s) in types { @@ -77,5 +80,3 @@ mod tests { } } } - - diff --git a/src/lib.rs b/src/lib.rs index 3a61a37e..71bfbd7c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -104,10 +104,3 @@ impl ElementExt for Element { println!("", self.name); } } - - - - - - - diff --git a/src/parse.rs b/src/parse.rs index e94e34b3..5ba329e2 100644 --- a/src/parse.rs +++ b/src/parse.rs @@ -26,7 +26,7 @@ pub fn bool(tree: &Element) -> Option { match text.as_ref() { "0" => Some(false), "1" => Some(true), - _ => text.parse::().ok() + _ => text.parse::().ok(), } } diff --git a/src/peripheral.rs b/src/peripheral.rs index 7f2809eb..bdbcf39f 100644 --- a/src/peripheral.rs +++ b/src/peripheral.rs @@ -46,21 +46,14 @@ impl ParseElem for Peripheral { .filter(|t| t.name == "interrupt") .map(Interrupt::parse) .collect::>(), - registers: tree.get_child("registers") - .map( - |rs| { - rs.children - .iter() - .filter(|v| {v.name == "register"}) - .map(Register::parse) - .collect() - }, - ), - derived_from: tree.attributes.get("derivedFrom").map( - |s| { - s.to_owned() - }, - ), + registers: tree.get_child("registers").map(|rs| { + rs.children + .iter() + .filter(|v| v.name == "register") + .map(Register::parse) + .collect() + }), + derived_from: tree.attributes.get("derivedFrom").map(|s| s.to_owned()), _extensible: (), } } @@ -68,41 +61,59 @@ impl ParseElem for Peripheral { impl EncodeElem for Peripheral { fn encode(&self) -> Element { - let mut elem = Element{ + let mut elem = Element { name: String::from("peripheral"), attributes: HashMap::new(), - children: vec![ - new_element("name", Some(self.name.clone())), - ], + children: vec![new_element("name", Some(self.name.clone()))], text: None, }; match self.version { - Some(ref v) => { elem.children.push(new_element("version", Some(format!("{}", v)))); }, + Some(ref v) => { + elem.children.push( + new_element("version", Some(format!("{}", v))), + ); + } None => (), }; match self.group_name { - Some(ref v) => { elem.children.push(new_element("groupName", Some(format!("{}", v)))); }, + Some(ref v) => { + elem.children.push(new_element( + "groupName", + Some(format!("{}", v)), + )); + } None => (), }; match self.description { - Some(ref v) => { elem.children.push(new_element("description", Some(format!("{}", v)))); }, + Some(ref v) => { + elem.children.push(new_element( + "description", + Some(format!("{}", v)), + )); + } None => (), }; - elem.children.push(new_element("baseAddress", Some(format!("{:.08x}", self.base_address)))); - elem.children.append(&mut self.interrupt.iter().map(Interrupt::encode).collect()); - match self.registers { + elem.children.push(new_element( + "baseAddress", + Some(format!("{:.08x}", self.base_address)), + )); + elem.children.append(&mut self.interrupt + .iter() + .map(Interrupt::encode) + .collect()); + match self.registers { Some(ref v) => { - elem.children.push(Element{ + elem.children.push(Element { name: String::from("registers"), attributes: HashMap::new(), children: v.iter().map(Register::encode).collect(), text: None, }); - }, + } None => (), }; - + elem } -} \ No newline at end of file +} diff --git a/src/register.rs b/src/register.rs index 79cc6043..5f967f1c 100644 --- a/src/register.rs +++ b/src/register.rs @@ -51,14 +51,12 @@ impl ParseElem for Register { impl EncodeElem for Register { fn encode(&self) -> Element { match *self { - Register::Single(ref info) => { - info.encode() - }, + Register::Single(ref info) => info.encode(), Register::Array(ref info, ref array_info) => { // TODO: fix this (does not encode array stuff) // Not even slightly sure what to do here info.encode() - }, + } } } -} \ No newline at end of file +} diff --git a/src/registerarrayinfo.rs b/src/registerarrayinfo.rs index b7e10d32..c9e5949a 100644 --- a/src/registerarrayinfo.rs +++ b/src/registerarrayinfo.rs @@ -25,19 +25,17 @@ impl ParseElem for RegisterArrayInfo { fn parse(tree: &Element) -> RegisterArrayInfo { RegisterArrayInfo { dim: try!(tree.get_child_text("dim").unwrap().parse::()), - dim_increment: try!( - tree.get_child("dimIncrement") - .map(|t| try!(parse::u32(t))) - ), - dim_index: tree.get_child("dimIndex") - .map(|c| parse::dim_index(try!(c.text.as_ref()))), + dim_increment: try!(tree.get_child("dimIncrement").map(|t| try!(parse::u32(t)))), + dim_index: tree.get_child("dimIndex").map(|c| { + parse::dim_index(try!(c.text.as_ref())) + }), } } } impl EncodeElem for RegisterArrayInfo { fn encode(&self) -> Element { - Element{ + Element { name: String::from("NOPE"), attributes: HashMap::new(), children: Vec::new(), @@ -45,4 +43,3 @@ impl EncodeElem for RegisterArrayInfo { } } } - diff --git a/src/registerinfo.rs b/src/registerinfo.rs index 7e501406..6bb6fab1 100644 --- a/src/registerinfo.rs +++ b/src/registerinfo.rs @@ -44,15 +44,14 @@ impl ParseElem for RegisterInfo { }, size: tree.get_child("size").map(|t| try!(parse::u32(t))), access: tree.get_child("access").map(Access::parse), - reset_value: - tree.get_child("resetValue").map(|t| try!(parse::u32(t))), - reset_mask: - tree.get_child("resetMask").map(|t| try!(parse::u32(t))), - fields: - tree.get_child("fields") - .map(|fs| fs.children.iter().map(Field::parse).collect()), - write_constraint: tree.get_child("writeConstraint") - .map(WriteConstraint::parse), + reset_value: tree.get_child("resetValue").map(|t| try!(parse::u32(t))), + reset_mask: tree.get_child("resetMask").map(|t| try!(parse::u32(t))), + fields: tree.get_child("fields").map(|fs| { + fs.children.iter().map(Field::parse).collect() + }), + write_constraint: tree.get_child("writeConstraint").map( + WriteConstraint::parse, + ), _extensible: (), } } @@ -60,55 +59,76 @@ impl ParseElem for RegisterInfo { impl EncodeElem for RegisterInfo { fn encode(&self) -> Element { - let mut elem = Element{ + let mut elem = Element { name: String::from("register"), attributes: HashMap::new(), children: vec![ new_element("name", Some(self.name.clone())), new_element("description", Some(self.description.clone())), - new_element("addressOffset", Some(format!("0x{:03.x}", self.address_offset))), + new_element( + "addressOffset", + Some(format!("0x{:03.x}", self.address_offset)) + ), ], text: None, }; match self.size { - Some(ref v) => { elem.children.push(new_element("size", Some(format!("{}", v)))); }, + Some(ref v) => { + elem.children.push( + new_element("size", Some(format!("{}", v))), + ); + } None => (), }; match self.access { - Some(ref v) => { elem.children.push( v.encode()); }, + Some(ref v) => { + elem.children.push(v.encode()); + } None => (), }; match self.reset_value { - Some(ref v) => { elem.children.push(new_element("resetValue", Some(format!("0x{:08.x}", v)))); }, + Some(ref v) => { + elem.children.push(new_element( + "resetValue", + Some(format!("0x{:08.x}", v)), + )); + } None => (), }; - match self.reset_mask { - Some(ref v) => { elem.children.push(new_element("resetMask", Some(format!("0x{:08.x}", v)))); }, + match self.reset_mask { + Some(ref v) => { + elem.children.push(new_element( + "resetMask", + Some(format!("0x{:08.x}", v)), + )); + } None => (), }; - match self.fields { - Some(ref v) => { - let fields = Element{ + match self.fields { + Some(ref v) => { + let fields = Element { name: String::from("fields"), attributes: HashMap::new(), children: v.iter().map(Field::encode).collect(), text: None, }; elem.children.push(fields); - }, + } None => (), }; - match self.write_constraint { - Some(ref v) => { elem.children.push(v.encode()); }, + match self.write_constraint { + Some(ref v) => { + elem.children.push(v.encode()); + } None => (), }; - + elem } } @@ -122,29 +142,35 @@ mod tests { #[test] fn decode_encode() { let types = vec![ - (RegisterInfo{ - name: String::from("WRITECTRL"), - description: String::from("Write Control Register"), - address_offset: 8, - size: Some(32), - access: Some(Access::ReadWrite), - reset_value: Some(0x00000000), - reset_mask: Some(0x00000023), - fields: Some(vec![ - Field { - name: String::from("WREN"), - description: Some(String::from("Enable Write/Erase Controller")), - bit_range: BitRange{offset: 0, width: 1, range_type: BitRangeType::OffsetWidth}, - access: Some(Access::ReadWrite), - enumerated_values: Vec::new(), - write_constraint: None, - _extensible: (), - } - ]), - write_constraint: None, - _extensible: (), - }, - String::from(" + ( + RegisterInfo { + name: String::from("WRITECTRL"), + description: String::from("Write Control Register"), + address_offset: 8, + size: Some(32), + access: Some(Access::ReadWrite), + reset_value: Some(0x00000000), + reset_mask: Some(0x00000023), + fields: Some(vec![ + Field { + name: String::from("WREN"), + description: Some(String::from("Enable Write/Erase Controller")), + bit_range: BitRange { + offset: 0, + width: 1, + range_type: BitRangeType::OffsetWidth, + }, + access: Some(Access::ReadWrite), + enumerated_values: Vec::new(), + write_constraint: None, + _extensible: (), + }, + ]), + write_constraint: None, + _extensible: (), + }, + String::from( + " WRITECTRL Write Control Register @@ -163,7 +189,9 @@ mod tests { - ")), + ", + ) + ), ]; for (a, s) in types { @@ -175,6 +203,3 @@ mod tests { } } } - - - diff --git a/src/usage.rs b/src/usage.rs index 01df42ca..ed1feba5 100644 --- a/src/usage.rs +++ b/src/usage.rs @@ -40,7 +40,7 @@ impl EncodeElem for Usage { Usage::ReadWrite => String::from("read-write"), }; - Element{ + Element { name: String::from("usage"), attributes: HashMap::new(), children: Vec::new(), @@ -56,8 +56,8 @@ mod tests { #[test] fn decode_encode() { let types = vec![ - (Usage::Read, String::from("read")), - (Usage::Write, String::from("write")), + (Usage::Read, String::from("read")), + (Usage::Write, String::from("write")), (Usage::ReadWrite, String::from("read-write")), ]; @@ -69,4 +69,4 @@ mod tests { assert_eq!(tree1, tree2, "Encoding {:?} expected {}", e, s); } } -} \ No newline at end of file +} diff --git a/src/writeconstraint.rs b/src/writeconstraint.rs index 861ff09f..be3e539a 100644 --- a/src/writeconstraint.rs +++ b/src/writeconstraint.rs @@ -28,25 +28,19 @@ impl ParseElem for WriteConstraint { // Write constraint can only be one of the following match field.as_ref() { "writeAsRead" => { - WriteConstraint::WriteAsRead( - try!(tree.get_child(field.as_ref()) - .map(|t| try!(parse::bool(t))) - ), - ) + WriteConstraint::WriteAsRead(try!( + tree.get_child(field.as_ref()).map(|t| try!(parse::bool(t))) + )) } "useEnumeratedValues" => { - WriteConstraint::UseEnumeratedValues( - try!(tree.get_child(field.as_ref()) - .map(|t| try!(parse::bool(t))) - ), - ) + WriteConstraint::UseEnumeratedValues(try!( + tree.get_child(field.as_ref()).map(|t| try!(parse::bool(t))) + )) } "range" => { - WriteConstraint::Range( - try!( tree.get_child(field.as_ref()) - .map(WriteConstraintRange::parse) - ), - ) + WriteConstraint::Range(try!(tree.get_child(field.as_ref()).map( + WriteConstraintRange::parse, + ))) } v => panic!("unknown variant: {}", v), } @@ -80,7 +74,12 @@ mod tests { #[test] fn decode_encode() { let examples = vec![ - ( String::from("true"), WriteConstraint::WriteAsRead(true) ) + ( + String::from( + "true", + ), + WriteConstraint::WriteAsRead(true) + ), ]; for (example, expected) in examples { diff --git a/src/writeconstraintrange.rs b/src/writeconstraintrange.rs index b0235804..10ed6285 100644 --- a/src/writeconstraintrange.rs +++ b/src/writeconstraintrange.rs @@ -30,7 +30,7 @@ impl ParseElem for WriteConstraintRange { impl EncodeElem for WriteConstraintRange { fn encode(&self) -> Element { - Element{ + Element { name: String::from("range"), attributes: HashMap::new(), children: vec![ @@ -40,4 +40,4 @@ impl EncodeElem for WriteConstraintRange { text: None, } } -} \ No newline at end of file +} From 821e11cc1b3034eb91141cf3d4565177799127f0 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 29 Aug 2017 17:15:30 +1200 Subject: [PATCH 16/25] Working on e2e tests to make sure encoding works /ok/ --- examples/EFM32PG1B200F256GM48.svd | 65986 ++++++++++++++++++++++++++++ examples/STM32F429x.svd.txt | 57586 ++++++++++++++++++++++++ src/lib.rs | 56 + 3 files changed, 123628 insertions(+) create mode 100644 examples/EFM32PG1B200F256GM48.svd create mode 100644 examples/STM32F429x.svd.txt diff --git a/examples/EFM32PG1B200F256GM48.svd b/examples/EFM32PG1B200F256GM48.svd new file mode 100644 index 00000000..4066d351 --- /dev/null +++ b/examples/EFM32PG1B200F256GM48.svd @@ -0,0 +1,65986 @@ + + + EFM32PG1B200F256GM48 + 4.2.0 + Silicon Labs EFM32PG1B200F256GM48 Cortex-M MCU + 8 + 32 + + + MSC + 1.6 + MSC + 0x400E0000 + + 0 + 0x00000800 + registers + + + MSC + 24 + + + + CTRL + Memory System Control Register + 0x000 + 32 + read-write + 0x00000001 + 0x0000000F + + + ADDRFAULTEN + Invalid Address Bus Fault Response Enable + 0 + 1 + read-write + + + CLKDISFAULTEN + Clock-disabled Bus Fault Response Enable + 1 + 1 + read-write + + + PWRUPONDEMAND + Power Up On Demand During Wake Up + 2 + 1 + read-write + + + IFCREADCLEAR + IFC Read Clears IF + 3 + 1 + read-write + + + + + READCTRL + Read Control Register + 0x004 + 32 + read-write + 0x01000100 + 0x13000338 + + + IFCDIS + Internal Flash Cache Disable + 3 + 1 + read-write + + + AIDIS + Automatic Invalidate Disable + 4 + 1 + read-write + + + ICCDIS + Interrupt Context Cache Disable + 5 + 1 + read-write + + + PREFETCH + Prefetch Mode + 8 + 1 + read-write + + + USEHPROT + AHB_HPROT Mode + 9 + 1 + read-write + + + MODE + Read Mode + 24 + 2 + read-write + + + WS0 + Zero wait-states inserted in fetch or read transfers + 0x00000000 + + + WS1 + One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details + 0x00000001 + + + + + SCBTP + Suppress Conditional Branch Target Perfetch + 28 + 1 + read-write + + + + + WRITECTRL + Write Control Register + 0x008 + 32 + read-write + 0x00000000 + 0x00000003 + + + WREN + Enable Write/Erase Controller + 0 + 1 + read-write + + + IRQERASEABORT + Abort Page Erase on Interrupt + 1 + 1 + read-write + + + + + WRITECMD + Write Command Register + 0x00C + 32 + write-only + 0x00000000 + 0x0000113F + + + LADDRIM + Load MSC_ADDRB into ADDR + 0 + 1 + write-only + + + ERASEPAGE + Erase Page + 1 + 1 + write-only + + + WRITEEND + End Write Mode + 2 + 1 + write-only + + + WRITEONCE + Word Write-Once Trigger + 3 + 1 + write-only + + + WRITETRIG + Word Write Sequence Trigger + 4 + 1 + write-only + + + ERASEABORT + Abort erase sequence + 5 + 1 + write-only + + + ERASEMAIN0 + Mass erase region 0 + 8 + 1 + write-only + + + CLEARWDATA + Clear WDATA state + 12 + 1 + write-only + + + + + ADDRB + Page Erase/Write Address Buffer + 0x010 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + ADDRB + Page Erase or Write Address Buffer + 0 + 32 + read-write + + + + + WDATA + Write Data Register + 0x018 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + WDATA + Write Data + 0 + 32 + read-write + + + + + STATUS + Status Register + 0x01C + 32 + read-only + 0x00000008 + 0x0000007F + + + BUSY + Erase/Write Busy + 0 + 1 + read-only + + + LOCKED + Access Locked + 1 + 1 + read-only + + + INVADDR + Invalid Write Address or Erase Page + 2 + 1 + read-only + + + WDATAREADY + WDATA Write Ready + 3 + 1 + read-only + + + WORDTIMEOUT + Flash Write Word Timeout + 4 + 1 + read-only + + + ERASEABORTED + The Current Flash Erase Operation Aborted + 5 + 1 + read-only + + + PCRUNNING + Performance Counters Running + 6 + 1 + read-only + + + + + IF + Interrupt Flag Register + 0x030 + 32 + read-only + 0x00000000 + 0x0000003F + + + ERASE + Erase Done Interrupt Read Flag + 0 + 1 + read-only + + + WRITE + Write Done Interrupt Read Flag + 1 + 1 + read-only + + + CHOF + Cache Hits Overflow Interrupt Flag + 2 + 1 + read-only + + + CMOF + Cache Misses Overflow Interrupt Flag + 3 + 1 + read-only + + + PWRUPF + Flash Power Up Sequence Complete Flag + 4 + 1 + read-only + + + ICACHERR + iCache RAM Parity Error Flag + 5 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x034 + 32 + write-only + 0x00000000 + 0x0000003F + + + ERASE + Set ERASE Interrupt Flag + 0 + 1 + write-only + + + WRITE + Set WRITE Interrupt Flag + 1 + 1 + write-only + + + CHOF + Set CHOF Interrupt Flag + 2 + 1 + write-only + + + CMOF + Set CMOF Interrupt Flag + 3 + 1 + write-only + + + PWRUPF + Set PWRUPF Interrupt Flag + 4 + 1 + write-only + + + ICACHERR + Set ICACHERR Interrupt Flag + 5 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x038 + 32 + write-only + 0x00000000 + 0x0000003F + + + ERASE + Clear ERASE Interrupt Flag + 0 + 1 + write-only + + + WRITE + Clear WRITE Interrupt Flag + 1 + 1 + write-only + + + CHOF + Clear CHOF Interrupt Flag + 2 + 1 + write-only + + + CMOF + Clear CMOF Interrupt Flag + 3 + 1 + write-only + + + PWRUPF + Clear PWRUPF Interrupt Flag + 4 + 1 + write-only + + + ICACHERR + Clear ICACHERR Interrupt Flag + 5 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x03C + 32 + read-write + 0x00000000 + 0x0000003F + + + ERASE + ERASE Interrupt Enable + 0 + 1 + read-write + + + WRITE + WRITE Interrupt Enable + 1 + 1 + read-write + + + CHOF + CHOF Interrupt Enable + 2 + 1 + read-write + + + CMOF + CMOF Interrupt Enable + 3 + 1 + read-write + + + PWRUPF + PWRUPF Interrupt Enable + 4 + 1 + read-write + + + ICACHERR + ICACHERR Interrupt Enable + 5 + 1 + read-write + + + + + LOCK + Configuration Lock Register + 0x040 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + Configuration Lock + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + CACHECMD + Flash Cache Command Register + 0x044 + 32 + write-only + 0x00000000 + 0x00000007 + + + INVCACHE + Invalidate Instruction Cache + 0 + 1 + write-only + + + STARTPC + Start Performance Counters + 1 + 1 + write-only + + + STOPPC + Stop Performance Counters + 2 + 1 + write-only + + + + + CACHEHITS + Cache Hits Performance Counter + 0x048 + 32 + read-only + 0x00000000 + 0x000FFFFF + + + CACHEHITS + Cache hits since last performance counter start command. + 0 + 20 + read-only + + + + + CACHEMISSES + Cache Misses Performance Counter + 0x04C + 32 + read-only + 0x00000000 + 0x000FFFFF + + + CACHEMISSES + Cache misses since last performance counter start command. + 0 + 20 + read-only + + + + + MASSLOCK + Mass Erase Lock Register + 0x054 + 32 + read-write + 0x00000001 + 0x0000FFFF + + + LOCKKEY + Mass Erase Lock + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + STARTUP + Startup Control + 0x05C + 32 + read-write + 0x1300104D + 0x773FF3FF + + + STDLY0 + Startup Delay 0 + 0 + 10 + read-write + + + STDLY1 + Startup Delay 0 + 12 + 10 + read-write + + + ASTWAIT + Active Startup Wait + 24 + 1 + read-write + + + STWSEN + Startup Waitstates Enable + 25 + 1 + read-write + + + STWSAEN + Startup Waitstates Always Enable + 26 + 1 + read-write + + + STWS + Startup Waitstates + 28 + 3 + read-write + + + + + CMD + Command Register + 0x074 + 32 + write-only + 0x00000000 + 0x00000001 + + + PWRUP + Flash Power Up Command + 0 + 1 + write-only + + + + + + + EMU + 1.6 + EMU + 0x400E3000 + + 0 + 0x00000400 + registers + + + EMU + 0 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x00000002 + + + EM2BLOCK + Energy Mode 2 Block + 1 + 1 + read-write + + + + + STATUS + Status Register + 0x004 + 32 + read-only + 0x00000000 + 0x0010011F + + + VMONRDY + VMON ready + 0 + 1 + read-only + + + VMONAVDD + VMON AVDD Channel. + 1 + 1 + read-only + + + VMONALTAVDD + Alternate VMON AVDD Channel. + 2 + 1 + read-only + + + VMONDVDD + VMON DVDD Channel. + 3 + 1 + read-only + + + VMONIO0 + VMON IOVDD0 Channel. + 4 + 1 + read-only + + + VMONFVDD + VMON VDDFLASH Channel. + 8 + 1 + read-only + + + EM4IORET + IO Retention Status + 20 + 1 + read-only + + + + + LOCK + Configuration Lock Register + 0x008 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + Configuration Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + RAM0CTRL + Memory Control Register + 0x00C + 32 + read-write + 0x00000000 + 0x0000000F + + + RAMPOWERDOWN + RAM0 blockset power-down + 0 + 4 + read-write + + + NONE + None of the RAM blocks powered down + 0x00000000 + + + BLK4 + Power down RAM blocks 4 and above (address range 0x20006000-0x20007BFF) + 0x00000008 + + + BLK3TO4 + Power down RAM blocks 3 and above (address range 0x20004000-0x20007BFF) + 0x0000000C + + + BLK2TO4 + Power down RAM blocks 2 and above (address range 0x20002000-0x20007BFF) + 0x0000000E + + + BLK1TO4 + Power down RAM blocks 1 and above (address range 0x20001000-0x20007BFF) + 0x0000000F + + + + + + + CMD + Command Register + 0x010 + 32 + write-only + 0x00000000 + 0x00000001 + + + EM4UNLATCH + EM4 Unlatch + 0 + 1 + write-only + + + + + PERACTCONF + Peripheral to Peripheral Activation Clock Configuration + 0x014 + 32 + read-write + 0x00000000 + 0x00000001 + + + RACPER + Enable PER clock when RAC is activated + 0 + 1 + read-write + + + + + EM4CTRL + EM4 Control Register + 0x018 + 32 + read-write + 0x00000000 + 0x0003003F + + + EM4STATE + Energy Mode 4 State + 0 + 1 + read-write + + + RETAINLFRCO + LFRCO Retain during EM4 + 1 + 1 + read-write + + + RETAINLFXO + LFXO Retain during EM4 + 2 + 1 + read-write + + + RETAINULFRCO + ULFRCO Retain during EM4S + 3 + 1 + read-write + + + EM4IORETMODE + EM4 IO Retention Disable + 4 + 2 + read-write + + + DISABLE + No Retention: Pads enter reset state when entering EM4 + 0x00000000 + + + EM4EXIT + Retention through EM4: Pads enter reset state when exiting EM4 + 0x00000001 + + + SWUNLATCH + Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention + 0x00000002 + + + + + EM4ENTRY + Energy Mode 4 Entry + 16 + 2 + write-only + + + + + TEMPLIMITS + Temperature limits for interrupt generation + 0x01C + 32 + read-write + 0x0000FF00 + 0x0001FFFF + + + TEMPLOW + Temperature Low Limit + 0 + 8 + read-write + + + TEMPHIGH + Temperature High Limit + 8 + 8 + read-write + + + EM4WUEN + Enable EM4 Wakeup due to low/high temerature + 16 + 1 + read-write + + + + + TEMP + Value of last temperature measurement + 0x020 + 32 + read-only + 0x00000000 + 0x000000FF + + + TEMP + Temperature Measurement + 0 + 8 + read-only + + + + + IF + Interrupt Flag Register + 0x024 + 32 + read-only + 0x00000000 + 0xE11FC0FF + + + VMONAVDDFALL + VMON AVDD Channel Fall + 0 + 1 + read-only + + + VMONAVDDRISE + VMON AVDD Channel Rise + 1 + 1 + read-only + + + VMONALTAVDDFALL + Alternate VMON AVDD Channel Fall + 2 + 1 + read-only + + + VMONALTAVDDRISE + Alternate VMON AVDD Channel Rise + 3 + 1 + read-only + + + VMONDVDDFALL + VMON DVDD Channel Fall + 4 + 1 + read-only + + + VMONDVDDRISE + VMON DVDD Channel Rise + 5 + 1 + read-only + + + VMONIO0FALL + VMON IOVDD0 Channel Fall + 6 + 1 + read-only + + + VMONIO0RISE + VMON IOVDD0 Channel Rise + 7 + 1 + read-only + + + VMONFVDDFALL + VMON VDDFLASH Channel Fall + 14 + 1 + read-only + + + VMONFVDDRISE + VMON VDDFLASH Channel Rise + 15 + 1 + read-only + + + PFETOVERCURRENTLIMIT + PFET current limit hit + 16 + 1 + read-only + + + NFETOVERCURRENTLIMIT + NFET current limit hit + 17 + 1 + read-only + + + DCDCLPRUNNING + LP mode is running + 18 + 1 + read-only + + + DCDCLNRUNNING + LN mode is running + 19 + 1 + read-only + + + DCDCINBYPASS + DCDC is in bypass + 20 + 1 + read-only + + + EM23WAKEUP + Wakeup IRQ from EM2 and EM3 + 24 + 1 + read-only + + + TEMP + New Temperature Measurement Valid + 29 + 1 + read-only + + + TEMPLOW + Temperature Low Limit Reached + 30 + 1 + read-only + + + TEMPHIGH + Temperature High Limit Reached + 31 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x028 + 32 + write-only + 0x00000000 + 0xE11FF0FF + + + VMONAVDDFALL + Set VMONAVDDFALL Interrupt Flag + 0 + 1 + write-only + + + VMONAVDDRISE + Set VMONAVDDRISE Interrupt Flag + 1 + 1 + write-only + + + VMONALTAVDDFALL + Set VMONALTAVDDFALL Interrupt Flag + 2 + 1 + write-only + + + VMONALTAVDDRISE + Set VMONALTAVDDRISE Interrupt Flag + 3 + 1 + write-only + + + VMONDVDDFALL + Set VMONDVDDFALL Interrupt Flag + 4 + 1 + write-only + + + VMONDVDDRISE + Set VMONDVDDRISE Interrupt Flag + 5 + 1 + write-only + + + VMONIO0FALL + Set VMONIO0FALL Interrupt Flag + 6 + 1 + write-only + + + VMONIO0RISE + Set VMONIO0RISE Interrupt Flag + 7 + 1 + write-only + + + VMONPAVDDFALL + Set VMONPAVDDFALL Interrupt Flag + 12 + 1 + write-only + + + VMONPAVDDRISE + Set VMONPAVDDRISE Interrupt Flag + 13 + 1 + write-only + + + VMONFVDDFALL + Set VMONFVDDFALL Interrupt Flag + 14 + 1 + write-only + + + VMONFVDDRISE + Set VMONFVDDRISE Interrupt Flag + 15 + 1 + write-only + + + PFETOVERCURRENTLIMIT + Set PFETOVERCURRENTLIMIT Interrupt Flag + 16 + 1 + write-only + + + NFETOVERCURRENTLIMIT + Set NFETOVERCURRENTLIMIT Interrupt Flag + 17 + 1 + write-only + + + DCDCLPRUNNING + Set DCDCLPRUNNING Interrupt Flag + 18 + 1 + write-only + + + DCDCLNRUNNING + Set DCDCLNRUNNING Interrupt Flag + 19 + 1 + write-only + + + DCDCINBYPASS + Set DCDCINBYPASS Interrupt Flag + 20 + 1 + write-only + + + EM23WAKEUP + Set EM23WAKEUP Interrupt Flag + 24 + 1 + write-only + + + TEMP + Set TEMP Interrupt Flag + 29 + 1 + write-only + + + TEMPLOW + Set TEMPLOW Interrupt Flag + 30 + 1 + write-only + + + TEMPHIGH + Set TEMPHIGH Interrupt Flag + 31 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x02C + 32 + write-only + 0x00000000 + 0xE11FF0FF + + + VMONAVDDFALL + Clear VMONAVDDFALL Interrupt Flag + 0 + 1 + write-only + + + VMONAVDDRISE + Clear VMONAVDDRISE Interrupt Flag + 1 + 1 + write-only + + + VMONALTAVDDFALL + Clear VMONALTAVDDFALL Interrupt Flag + 2 + 1 + write-only + + + VMONALTAVDDRISE + Clear VMONALTAVDDRISE Interrupt Flag + 3 + 1 + write-only + + + VMONDVDDFALL + Clear VMONDVDDFALL Interrupt Flag + 4 + 1 + write-only + + + VMONDVDDRISE + Clear VMONDVDDRISE Interrupt Flag + 5 + 1 + write-only + + + VMONIO0FALL + Clear VMONIO0FALL Interrupt Flag + 6 + 1 + write-only + + + VMONIO0RISE + Clear VMONIO0RISE Interrupt Flag + 7 + 1 + write-only + + + VMONPAVDDFALL + Clear VMONPAVDDFALL Interrupt Flag + 12 + 1 + write-only + + + VMONPAVDDRISE + Clear VMONPAVDDRISE Interrupt Flag + 13 + 1 + write-only + + + VMONFVDDFALL + Clear VMONFVDDFALL Interrupt Flag + 14 + 1 + write-only + + + VMONFVDDRISE + Clear VMONFVDDRISE Interrupt Flag + 15 + 1 + write-only + + + PFETOVERCURRENTLIMIT + Clear PFETOVERCURRENTLIMIT Interrupt Flag + 16 + 1 + write-only + + + NFETOVERCURRENTLIMIT + Clear NFETOVERCURRENTLIMIT Interrupt Flag + 17 + 1 + write-only + + + DCDCLPRUNNING + Clear DCDCLPRUNNING Interrupt Flag + 18 + 1 + write-only + + + DCDCLNRUNNING + Clear DCDCLNRUNNING Interrupt Flag + 19 + 1 + write-only + + + DCDCINBYPASS + Clear DCDCINBYPASS Interrupt Flag + 20 + 1 + write-only + + + EM23WAKEUP + Clear EM23WAKEUP Interrupt Flag + 24 + 1 + write-only + + + TEMP + Clear TEMP Interrupt Flag + 29 + 1 + write-only + + + TEMPLOW + Clear TEMPLOW Interrupt Flag + 30 + 1 + write-only + + + TEMPHIGH + Clear TEMPHIGH Interrupt Flag + 31 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x030 + 32 + read-write + 0x00000000 + 0xE11FF0FF + + + VMONAVDDFALL + VMONAVDDFALL Interrupt Enable + 0 + 1 + read-write + + + VMONAVDDRISE + VMONAVDDRISE Interrupt Enable + 1 + 1 + read-write + + + VMONALTAVDDFALL + VMONALTAVDDFALL Interrupt Enable + 2 + 1 + read-write + + + VMONALTAVDDRISE + VMONALTAVDDRISE Interrupt Enable + 3 + 1 + read-write + + + VMONDVDDFALL + VMONDVDDFALL Interrupt Enable + 4 + 1 + read-write + + + VMONDVDDRISE + VMONDVDDRISE Interrupt Enable + 5 + 1 + read-write + + + VMONIO0FALL + VMONIO0FALL Interrupt Enable + 6 + 1 + read-write + + + VMONIO0RISE + VMONIO0RISE Interrupt Enable + 7 + 1 + read-write + + + VMONPAVDDFALL + VMONPAVDDFALL Interrupt Enable + 12 + 1 + read-write + + + VMONPAVDDRISE + VMONPAVDDRISE Interrupt Enable + 13 + 1 + read-write + + + VMONFVDDFALL + VMONFVDDFALL Interrupt Enable + 14 + 1 + read-write + + + VMONFVDDRISE + VMONFVDDRISE Interrupt Enable + 15 + 1 + read-write + + + PFETOVERCURRENTLIMIT + PFETOVERCURRENTLIMIT Interrupt Enable + 16 + 1 + read-write + + + NFETOVERCURRENTLIMIT + NFETOVERCURRENTLIMIT Interrupt Enable + 17 + 1 + read-write + + + DCDCLPRUNNING + DCDCLPRUNNING Interrupt Enable + 18 + 1 + read-write + + + DCDCLNRUNNING + DCDCLNRUNNING Interrupt Enable + 19 + 1 + read-write + + + DCDCINBYPASS + DCDCINBYPASS Interrupt Enable + 20 + 1 + read-write + + + EM23WAKEUP + EM23WAKEUP Interrupt Enable + 24 + 1 + read-write + + + TEMP + TEMP Interrupt Enable + 29 + 1 + read-write + + + TEMPLOW + TEMPLOW Interrupt Enable + 30 + 1 + read-write + + + TEMPHIGH + TEMPHIGH Interrupt Enable + 31 + 1 + read-write + + + + + PWRLOCK + Regulator and Supply Lock Register + 0x034 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + Regulator and Supply Configuration Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + PWRCFG + Power Configuration Register. + 0x038 + 32 + read-write + 0x00000000 + 0x0000000F + + + PWRCFG + Power Configuration + 0 + 4 + read-write + + + STARTUP + Power up configuration. Works with any external configuration. + 0x00000000 + + + NODCDC + DCDC Disabled. AVDD Bypassed to DVDD internally + 0x00000001 + + + DCDCTODVDD + DCDC filterred and routed to DVDD + 0x00000002 + + + + + + + PWRCTRL + Power Control Register. + 0x03C + 32 + read-write + 0x00000000 + 0x00000020 + + + ANASW + Analog Switch Selection + 5 + 1 + read-write + + + + + DCDCCTRL + DCDC Control + 0x040 + 32 + read-write + 0x00000030 + 0x00000033 + + + DCDCMODE + Regulator Mode + 0 + 2 + read-write + + + BYPASS + DCDC regulator is operating in bypass mode. + 0x00000000 + + + LOWNOISE + DCDC regulator is operating in low noise mode. + 0x00000001 + + + LOWPOWER + DCDC regulator is operating in low power mode. + 0x00000002 + + + OFF + DCDC regulator is off. Note: DVDD must be supplied externally + 0x00000003 + + + + + DCDCMODEEM23 + Reserved for internal use. Do not change. + 4 + 1 + read-write + + + DCDCMODEEM4 + Reserved for internal use. Do not change. + 5 + 1 + read-write + + + + + DCDCMISCCTRL + DCDC Miscellaneous Control Register + 0x04C + 32 + read-write + 0x33307700 + 0x377FFF01 + + + LNFORCECCM + Force DCDC into CCM mode in low noise operation + 0 + 1 + read-write + + + PFETCNT + PFET switch number selection + 8 + 4 + read-write + + + NFETCNT + NFET switch number selection + 12 + 4 + read-write + + + BYPLIMSEL + Current Limit In Bypass Mode + 16 + 4 + read-write + + + LPCLIMILIMSEL + Current limiter current threshold selection during low power mode + 20 + 3 + read-write + + + LNCLIMILIMSEL + Current limiter current threshold selection during low noise mode + 24 + 3 + read-write + + + LPCMPBIAS + LP mode comparator bias selection + 28 + 2 + read-write + + + BIAS0 + Nominal load current less than 10uA. + 0x00000000 + + + BIAS1 + Nominal load current less than 100uA. + 0x00000001 + + + BIAS2 + Nominal load current less than 1mA. + 0x00000002 + + + BIAS3 + Nominal load current less than 10mA. + 0x00000003 + + + + + + + DCDCZDETCTRL + DCDC Power Train NFET Zero Current Detector Control Register + 0x050 + 32 + read-write + 0x00000130 + 0x00000370 + + + ZDETILIMSEL + Reverse current limit level for zero detector + 4 + 3 + read-write + + + ZDETBLANKDLY + Reserved for internal use. Do not change. + 8 + 2 + read-write + + + + + DCDCCLIMCTRL + DCDC Power Train PFET Current Limiter Control Register + 0x054 + 32 + read-write + 0x00002100 + 0x00002300 + + + CLIMBLANKDLY + Reserved for internal use. Do not change. + 8 + 2 + read-write + + + BYPLIMEN + Bypass Current Limit Enable + 13 + 1 + read-write + + + + + DCDCLNVCTRL + DCDC Low Noise Voltage Register + 0x05C + 32 + read-write + 0x00007100 + 0x00007F02 + + + LNATT + Low Noise Mode Feedback Attenuation + 1 + 1 + read-write + + + LNVREF + Low Noise Mode VREF Trim + 8 + 7 + read-write + + + + + DCDCTIMING + DCDC Controller Timing Value Register + 0x060 + 32 + read-write + 0x0FF1F8FF + 0x6FF1F8FF + + + LPINITWAIT + Low power initialization wait time + 0 + 8 + read-write + + + COMPENPRCHGEN + LN mode precharge enable + 11 + 1 + read-write + + + LNWAIT + Low Noise Controller Initialization wait time + 12 + 5 + read-write + + + BYPWAIT + Bypass mode transition from low power or low noise modes wait + 20 + 8 + read-write + + + DUTYSCALE + Select bias duty cycle clock. + 29 + 2 + read-write + + + + + DCDCLPVCTRL + DCDC Low Power Voltage Register + 0x064 + 32 + read-write + 0x00000168 + 0x000001FF + + + LPATT + Low power feedback attenuation + 0 + 1 + read-write + + + LPVREF + LP mode vref trim + 1 + 8 + read-write + + + + + DCDCLPCTRL + DCDC Low Power Control Register + 0x06C + 32 + read-write + 0x00007000 + 0x0700F000 + + + LPCMPHYSSEL + LP mode hysteresis selection + 12 + 4 + read-write + + + LPVREFDUTYEN + Lp mode duty cycling enable + 24 + 1 + read-write + + + LPBLANK + Reserved for internal use. Do not change. + 25 + 2 + read-write + + + + + DCDCLNFREQCTRL + DCDC Low Noise Controller Frequency Control + 0x070 + 32 + read-write + 0x10000000 + 0x1F000007 + + + RCOBAND + LN mode RCO frequency band selection + 0 + 3 + read-write + + + RCOTRIM + Reserved for internal use. Do not change. + 24 + 5 + read-write + + + + + DCDCSYNC + DCDC Read Status Register + 0x078 + 32 + read-only + 0x00000000 + 0x00000001 + + + DCDCCTRLBUSY + DCDC CTRL Register Transfer Busy. + 0 + 1 + read-only + + + + + VMONAVDDCTRL + VMON AVDD Channel Control + 0x090 + 32 + read-write + 0x00000000 + 0x00FFFF0D + + + EN + Enable + 0 + 1 + read-write + + + RISEWU + Rise Wakeup + 2 + 1 + read-write + + + FALLWU + Fall Wakeup + 3 + 1 + read-write + + + FALLTHRESFINE + Falling Threshold Fine Adjust + 8 + 4 + read-write + + + FALLTHRESCOARSE + Falling Threshold Coarse Adjust + 12 + 4 + read-write + + + RISETHRESFINE + Rising Threshold Fine Adjust + 16 + 4 + read-write + + + RISETHRESCOARSE + Rising Threshold Coarse Adjust + 20 + 4 + read-write + + + + + VMONALTAVDDCTRL + Alternate VMON AVDD Channel Control + 0x094 + 32 + read-write + 0x00000000 + 0x0000FF0D + + + EN + Enable + 0 + 1 + read-write + + + RISEWU + Rise Wakeup + 2 + 1 + read-write + + + FALLWU + Fall Wakeup + 3 + 1 + read-write + + + THRESFINE + Threshold Fine Adjust + 8 + 4 + read-write + + + THRESCOARSE + Threshold Coarse Adjust + 12 + 4 + read-write + + + + + VMONDVDDCTRL + VMON DVDD Channel Control + 0x098 + 32 + read-write + 0x00000000 + 0x0000FF0D + + + EN + Enable + 0 + 1 + read-write + + + RISEWU + Rise Wakeup + 2 + 1 + read-write + + + FALLWU + Fall Wakeup + 3 + 1 + read-write + + + THRESFINE + Threshold Fine Adjust + 8 + 4 + read-write + + + THRESCOARSE + Threshold Coarse Adjust + 12 + 4 + read-write + + + + + VMONIO0CTRL + VMON IOVDD0 Channel Control + 0x09C + 32 + read-write + 0x00000000 + 0x0000FF1D + + + EN + Enable + 0 + 1 + read-write + + + RISEWU + Rise Wakeup + 2 + 1 + read-write + + + FALLWU + Fall Wakeup + 3 + 1 + read-write + + + RETDIS + EM4 IO0 Retention disable + 4 + 1 + read-write + + + THRESFINE + Threshold Fine Adjust + 8 + 4 + read-write + + + THRESCOARSE + Threshold Coarse Adjust + 12 + 4 + read-write + + + + + + + RMU + 1.6 + RMU + 0x400E5000 + + 0 + 0x00000400 + registers + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00004224 + 0x03007777 + + + WDOGRMODE + WDOG Reset Mode + 0 + 3 + read-write + + + DISABLED + Reset request is blocked. This disable bit is redundant with enable/disable bit in WDOG + 0x00000000 + + + LIMITED + The CRYOTIMER, DEBUGGER, RTCC, are not reset. + 0x00000001 + + + EXTENDED + The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. + 0x00000002 + + + FULL + The entire device is reset except some EMU and RMU registers. + 0x00000004 + + + + + LOCKUPRMODE + Core LOCKUP Reset Mode + 4 + 3 + read-write + + + DISABLED + Reset request is blocked. + 0x00000000 + + + LIMITED + The CRYOTIMER, DEBUGGER, RTCC, are not reset. + 0x00000001 + + + EXTENDED + The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. + 0x00000002 + + + FULL + The entire device is reset except some EMU and RMU registers. + 0x00000004 + + + + + SYSRMODE + Core Sysreset Reset Mode + 8 + 3 + read-write + + + DISABLED + Reset request is blocked. + 0x00000000 + + + LIMITED + The CRYOTIMER, DEBUGGER, RTCC, are not reset. + 0x00000001 + + + EXTENDED + The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. + 0x00000002 + + + FULL + The entire device is reset except some EMU and RMU registers. + 0x00000004 + + + + + PINRMODE + PIN Reset Mode + 12 + 3 + read-write + + + DISABLED + Reset request is blocked. + 0x00000000 + + + LIMITED + The CRYOTIMER, DEBUGGER, RTCC, are not reset. + 0x00000001 + + + EXTENDED + The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. + 0x00000002 + + + FULL + The entire device is reset except some EMU and RMU registers. + 0x00000004 + + + + + RESETSTATE + System Software Reset State + 24 + 2 + read-write + + + + + RSTCAUSE + Reset Cause Register + 0x004 + 32 + read-only + 0x00000000 + 0x00010F1D + + + PORST + Power On Reset + 0 + 1 + read-only + + + AVDDBOD + Brown Out Detector AVDD Reset + 2 + 1 + read-only + + + DVDDBOD + Brown Out Detector DVDD Reset + 3 + 1 + read-only + + + DECBOD + Brown Out Detector Decouple Domain Reset + 4 + 1 + read-only + + + EXTRST + External Pin Reset + 8 + 1 + read-only + + + LOCKUPRST + LOCKUP Reset + 9 + 1 + read-only + + + SYSREQRST + System Request Reset + 10 + 1 + read-only + + + WDOGRST + Watchdog Reset + 11 + 1 + read-only + + + EM4RST + EM4 Reset + 16 + 1 + read-only + + + + + CMD + Command Register + 0x008 + 32 + write-only + 0x00000000 + 0x00000001 + + + RCCLR + Reset Cause Clear + 0 + 1 + write-only + + + + + RST + Reset Control Register + 0x00C + 32 + read-write + 0x00000000 + 0x00000000 + + + LOCK + Configuration Lock Register + 0x010 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + Configuration Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + + + CMU + 1.6 + CMU + 0x400E4000 + + 0 + 0x00000400 + registers + + + CMU + 23 + + + + CTRL + CMU Control Register + 0x000 + 32 + read-write + 0x00300000 + 0x001101EF + + + CLKOUTSEL0 + Clock Output Select 0 + 0 + 4 + read-write + + + DISABLED + Disabled + 0x00000000 + + + ULFRCO + ULFRCO (directly from oscillator) + 0x00000001 + + + LFRCO + LFRCO (directly from oscillator) + 0x00000002 + + + LFXO + LFXO (directly from oscillator) + 0x00000003 + + + HFXO + HFXO (directly from oscillator) + 0x00000006 + + + HFEXPCLK + HFEXPCLK + 0x00000007 + + + ULFRCOQ + ULFRCO (qualified) + 0x00000009 + + + LFRCOQ + LFRCO (qualified) + 0x0000000A + + + LFXOQ + LFXO (qualified) + 0x0000000B + + + HFRCOQ + HFRCO (qualified) + 0x0000000C + + + AUXHFRCOQ + AUXHFRCO (qualified) + 0x0000000D + + + HFXOQ + HFXO (qualified) + 0x0000000E + + + HFSRCCLK + HFSRCCLK + 0x0000000F + + + + + CLKOUTSEL1 + Clock Output Select 1 + 5 + 4 + read-write + + + DISABLED + Disabled + 0x00000000 + + + ULFRCO + ULFRCO (directly from oscillator) + 0x00000001 + + + LFRCO + LFRCO (directly from oscillator) + 0x00000002 + + + LFXO + LFXO (directly from oscillator) + 0x00000003 + + + HFXO + HFXO (directly from oscillator) + 0x00000006 + + + HFEXPCLK + HFEXPCLK + 0x00000007 + + + ULFRCOQ + ULFRCO (qualified) + 0x00000009 + + + LFRCOQ + LFRCO (qualified) + 0x0000000A + + + LFXOQ + LFXO (qualified) + 0x0000000B + + + HFRCOQ + HFRCO (qualified) + 0x0000000C + + + AUXHFRCOQ + AUXHFRCO (qualified) + 0x0000000D + + + HFXOQ + HFXO (qualified) + 0x0000000E + + + HFSRCCLK + HFSRCCLK + 0x0000000F + + + + + WSHFLE + Wait State for High-Frequency LE Interface + 16 + 1 + read-write + + + HFPERCLKEN + HFPERCLK Enable + 20 + 1 + read-write + + + + + HFRCOCTRL + HFRCO Control Register + 0x010 + 32 + read-write + 0xB1481F3C + 0xFFFF3F7F + + + TUNING + HFRCO Tuning Value + 0 + 7 + read-write + + + FINETUNING + HFRCO Fine Tuning Value + 8 + 6 + read-write + + + FREQRANGE + HFRCO Frequency Range + 16 + 5 + read-write + + + CMPBIAS + HFRCO Comparator Bias Current + 21 + 3 + read-write + + + LDOHP + HFRCO LDO High Power Mode + 24 + 1 + read-write + + + CLKDIV + Locally divide HFRCO Clock Output + 25 + 2 + read-write + + + DIV1 + Divide by 1. + 0x00000000 + + + DIV2 + Divide by 2. + 0x00000001 + + + DIV4 + Divide by 4. + 0x00000002 + + + + + FINETUNINGEN + Enable reference for fine tuning + 27 + 1 + read-write + + + VREFTC + HFRCO Temperature Coefficient Trim on Comparator Reference + 28 + 4 + read-write + + + + + AUXHFRCOCTRL + AUXHFRCO Control Register + 0x018 + 32 + read-write + 0xB1481F3C + 0xFFFF3F7F + + + TUNING + AUXHFRCO Tuning Value + 0 + 7 + read-write + + + FINETUNING + AUXHFRCO Fine Tuning Value + 8 + 6 + read-write + + + FREQRANGE + AUXHFRCO Frequency Range + 16 + 5 + read-write + + + CMPBIAS + AUXHFRCO Comparator Bias Current + 21 + 3 + read-write + + + LDOHP + AUXHFRCO LDO High Power Mode + 24 + 1 + read-write + + + CLKDIV + Locally divide AUXHFRCO Clock Output + 25 + 2 + read-write + + + DIV1 + Divide by 1. + 0x00000000 + + + DIV2 + Divide by 2. + 0x00000001 + + + DIV4 + Divide by 4. + 0x00000002 + + + + + FINETUNINGEN + Enable reference for fine tuning + 27 + 1 + read-write + + + VREFTC + AUXHFRCO Temperature Coefficient Trim on Comparator Reference + 28 + 4 + read-write + + + + + LFRCOCTRL + LFRCO Control Register + 0x020 + 32 + read-write + 0x81060100 + 0xF30701FF + + + TUNING + LFRCO Tuning Value + 0 + 9 + read-write + + + ENVREF + Enable duty cycling of vref + 16 + 1 + read-write + + + ENCHOP + Enable comparator chopping + 17 + 1 + read-write + + + ENDEM + Enable dynamic element matching + 18 + 1 + read-write + + + TIMEOUT + LFRCO Timeout + 24 + 2 + read-write + + + 2CYCLES + Timeout period of 2 cycles + 0x00000000 + + + 16CYCLES + Timeout period of 16 cycles + 0x00000001 + + + 32CYCLES + Timeout period of 32 cycles + 0x00000002 + + + + + GMCCURTUNE + Tuning of gmc current + 28 + 4 + read-write + + + + + HFXOCTRL + HFXO Control Register + 0x024 + 32 + read-write + 0x00000000 + 0x77000F31 + + + MODE + HFXO Mode + 0 + 1 + read-write + + + PEAKDETSHUNTOPTMODE + HFXO Automatic Peak Detection and shunt current optimization mode + 4 + 2 + read-write + + + AUTOCMD + Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used. + 0x00000000 + + + CMD + CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences. + 0x00000001 + + + MANUAL + CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready. + 0x00000002 + + + + + LOWPOWER + Low power mode control. PSR performance is reduced to enable low current consumption. + 8 + 1 + read-write + + + XTI2GND + Clamp HFXTAL_N pin to ground when HFXO oscillator is off and KEEPWARM=0. + 9 + 1 + read-write + + + XTO2GND + Clamp HFXTAL_P pin to ground when HFXO oscillator is off and KEEPWARM=0. + 10 + 1 + read-write + + + KEEPWARM + Keep HFXO warm when turning off HFXO. + 11 + 1 + read-write + + + LFTIMEOUT + HFXO Low Frequency Timeout + 24 + 3 + read-write + + + 0CYCLES + Timeout period of 0 cycles (disabled) + 0x00000000 + + + 2CYCLES + Timeout period of 2 cycles + 0x00000001 + + + 4CYCLES + Timeout period of 4 cycles + 0x00000002 + + + 16CYCLES + Timeout period of 16 cycles + 0x00000003 + + + 32CYCLES + Timeout period of 32 cycles + 0x00000004 + + + 64CYCLES + Timeout period of 64 cycles + 0x00000005 + + + 1KCYCLES + Timeout period of 1024 cycles + 0x00000006 + + + 4KCYCLES + Timeout period of 4096 cycles + 0x00000007 + + + + + AUTOSTARTEM0EM1 + Automatically start of HFXO upon EM0/EM1 entry from EM2/EM3 + 28 + 1 + read-write + + + AUTOSTARTSELEM0EM1 + Automatically start and select of HFXO upon EM0/EM1 entry from EM2/EM3 + 29 + 1 + read-write + + + AUTOSTARTRDYSELRAC + Automatically start HFXO on RAC wake-up and select it upon HFXO Ready + 30 + 1 + read-write + + + + + HFXOCTRL1 + HFXO Control 1 + 0x028 + 32 + read-write + 0x00000240 + 0x00000277 + + + PEAKDETTHR + Sets the Peak Detector amplitude detection threshold levels + 0 + 3 + read-write + + + REGLVL + Reserved for internal use. Do not change. + 4 + 3 + read-write + + + XTIBIASEN + Reserved for internal use. Do not change. + 9 + 1 + read-write + + + + + HFXOSTARTUPCTRL + HFXO Startup Control + 0x02C + 32 + read-write + 0xA1250060 + 0xFFEFF87F + + + IBTRIMXOCORE + Sets the startup oscillator core bias current. Current (uA) = IBTRIMXOCORE x 40uA. Bits 6 and 5 may only be high in the crystal oscillator startup phase + 0 + 7 + read-write + + + CTUNE + Sets oscillator tuning capacitance. Capacitance on HFXTAL_N and HFXTAL_P (pF) = Ctune = Cpar + CTUNE<8:0> x 40fF. Max Ctune 25pF (CLmax ~12.5pF). CL(DNLmax)=50fF ~ 0.6ppm (12.5ppm/pF) + 11 + 9 + read-write + + + IBTRIMXOCOREWARM + Sets the oscillator core bias current. Current (uA) = IBTRIMXOCOREWARM x 40uA. Bits 6 and 5 may only be high in the crystal oscillator startup phase + 21 + 7 + read-write + + + REGISHWARM + Sets the regulator output current level (shunt regulator). Ish = 120uA + REGISHWARM x 120uA + 28 + 4 + read-write + + + + + HFXOSTEADYSTATECTRL + HFXO Steady State control + 0x030 + 32 + read-write + 0xA30AAD09 + 0xF70FFFFF + + + IBTRIMXOCORE + Sets the steady state oscillator core bias current. Current (uA) = IBTRIMXOCORE x 40uA. Bits 6 and 5 may only be high in the crystal oscillator startup phase + 0 + 7 + read-write + + + REGISH + Sets the steady state regulator output current level (shunt regulator). Ish = 120uA + REGISH x 120uA + 7 + 4 + read-write + + + CTUNE + Sets oscillator tuning capacitance. Capacitance on HFXTAL_N and HFXTAL_P (pF) = Ctune = Cpar + CTUNE<8:0> x 40fF. Max Ctune 25pF (CLmax ~12.5pF). CL(DNLmax)=50fF ~ 0.6ppm (12.5ppm/pF) + 11 + 9 + read-write + + + REGSELILOW + Controls regulator minimum shunt current detection relative to nominal + 24 + 2 + read-write + + + PEAKDETEN + Enables oscillator peak detectors + 26 + 1 + read-write + + + REGISHUPPER + Set regulator output current level (shunt regulator). Ish = 120uA + REGISHUPPER x 120uA + 28 + 4 + read-write + + + + + HFXOTIMEOUTCTRL + HFXO Timeout Control + 0x034 + 32 + read-write + 0x00026667 + 0x000FFFFF + + + STARTUPTIMEOUT + Wait duration in HFXO startup enable wait state + 0 + 4 + read-write + + + 2CYCLES + Timeout period of 2 cycles + 0x00000000 + + + 4CYCLES + Timeout period of 4 cycles + 0x00000001 + + + 16CYCLES + Timeout period of 16 cycles + 0x00000002 + + + 32CYCLES + Timeout period of 32 cycles + 0x00000003 + + + 256CYCLES + Timeout period of 256 cycles + 0x00000004 + + + 1KCYCLES + Timeout period of 1024 cycles + 0x00000005 + + + 2KCYCLES + Timeout period of 2048 cycles + 0x00000006 + + + 4KCYCLES + Timeout period of 4096 cycles + 0x00000007 + + + 8KCYCLES + Timeout period of 8192 cycles + 0x00000008 + + + 16KCYCLES + Timeout period of 16384 cycles + 0x00000009 + + + 32KCYCLES + Timeout period of 32768 cycles + 0x0000000A + + + + + STEADYTIMEOUT + Wait duration in HFXO startup steady wait state + 4 + 4 + read-write + + + 2CYCLES + Timeout period of 2 cycles + 0x00000000 + + + 4CYCLES + Timeout period of 4 cycles + 0x00000001 + + + 16CYCLES + Timeout period of 16 cycles + 0x00000002 + + + 32CYCLES + Timeout period of 32 cycles + 0x00000003 + + + 256CYCLES + Timeout period of 256 cycles + 0x00000004 + + + 1KCYCLES + Timeout period of 1024 cycles + 0x00000005 + + + 2KCYCLES + Timeout period of 2048 cycles + 0x00000006 + + + 4KCYCLES + Timeout period of 4096 cycles + 0x00000007 + + + 8KCYCLES + Timeout period of 8192 cycles + 0x00000008 + + + 16KCYCLES + Timeout period of 16384 cycles + 0x00000009 + + + 32KCYCLES + Timeout period of 32768 cycles + 0x0000000A + + + + + WARMSTEADYTIMEOUT + Wait duration in HFXO warm startup steady wait state + 8 + 4 + read-write + + + 2CYCLES + Timeout period of 2 cycles + 0x00000000 + + + 4CYCLES + Timeout period of 4 cycles + 0x00000001 + + + 16CYCLES + Timeout period of 16 cycles + 0x00000002 + + + 32CYCLES + Timeout period of 32 cycles + 0x00000003 + + + 256CYCLES + Timeout period of 256 cycles + 0x00000004 + + + 1KCYCLES + Timeout period of 1024 cycles + 0x00000005 + + + 2KCYCLES + Timeout period of 2048 cycles + 0x00000006 + + + 4KCYCLES + Timeout period of 4096 cycles + 0x00000007 + + + 8KCYCLES + Timeout period of 8192 cycles + 0x00000008 + + + 16KCYCLES + Timeout period of 16384 cycles + 0x00000009 + + + 32KCYCLES + Timeout period of 32768 cycles + 0x0000000A + + + + + PEAKDETTIMEOUT + Wait duration in HFXO peak detection wait state + 12 + 4 + read-write + + + 2CYCLES + Timeout period of 2 cycles + 0x00000000 + + + 4CYCLES + Timeout period of 4 cycles + 0x00000001 + + + 16CYCLES + Timeout period of 16 cycles + 0x00000002 + + + 32CYCLES + Timeout period of 32 cycles + 0x00000003 + + + 256CYCLES + Timeout period of 256 cycles + 0x00000004 + + + 1KCYCLES + Timeout period of 1024 cycles + 0x00000005 + + + 2KCYCLES + Timeout period of 2048 cycles + 0x00000006 + + + 4KCYCLES + Timeout period of 4096 cycles + 0x00000007 + + + 8KCYCLES + Timeout period of 8192 cycles + 0x00000008 + + + 16KCYCLES + Timeout period of 16384 cycles + 0x00000009 + + + 32KCYCLES + Timeout period of 32768 cycles + 0x0000000A + + + + + SHUNTOPTTIMEOUT + Wait duration in HFXO shunt current optimization wait state + 16 + 4 + read-write + + + 2CYCLES + Timeout period of 2 cycles + 0x00000000 + + + 4CYCLES + Timeout period of 4 cycles + 0x00000001 + + + 16CYCLES + Timeout period of 16 cycles + 0x00000002 + + + 32CYCLES + Timeout period of 32 cycles + 0x00000003 + + + 256CYCLES + Timeout period of 256 cycles + 0x00000004 + + + 1KCYCLES + Timeout period of 1024 cycles + 0x00000005 + + + 2KCYCLES + Timeout period of 2048 cycles + 0x00000006 + + + 4KCYCLES + Timeout period of 4096 cycles + 0x00000007 + + + 8KCYCLES + Timeout period of 8192 cycles + 0x00000008 + + + 16KCYCLES + Timeout period of 16384 cycles + 0x00000009 + + + 32KCYCLES + Timeout period of 32768 cycles + 0x0000000A + + + + + + + LFXOCTRL + LFXO Control Register + 0x038 + 32 + read-write + 0x07009000 + 0x0713DB7F + + + TUNING + LFXO Internal Capacitor Array Tuning Value + 0 + 7 + read-write + + + MODE + LFXO Mode + 8 + 2 + read-write + + + XTAL + 32768 Hz crystal oscillator + 0x00000000 + + + BUFEXTCLK + An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32768 Hz). + 0x00000001 + + + DIGEXTCLK + Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed. + 0x00000002 + + + + + GAIN + LFXO Startup Gain + 11 + 2 + read-write + + + HIGHAMPL + LFXO High XTAL Oscillation Amplitude Enable + 14 + 1 + read-write + + + AGC + LFXO AGC Enable + 15 + 1 + read-write + + + CUR + LFXO Current Trim + 16 + 2 + read-write + + + BUFCUR + LFXO Buffer Bias Current + 20 + 1 + read-write + + + TIMEOUT + LFXO Timeout + 24 + 3 + read-write + + + 2CYCLES + Timeout period of 2 cycles + 0x00000000 + + + 256CYCLES + Timeout period of 256 cycles + 0x00000001 + + + 1KCYCLES + Timeout period of 1024 cycles + 0x00000002 + + + 2KCYCLES + Timeout period of 2048 cycles + 0x00000003 + + + 4KCYCLES + Timeout period of 4096 cycles + 0x00000004 + + + 8KCYCLES + Timeout period of 8192 cycles + 0x00000005 + + + 16KCYCLES + Timeout period of 16384 cycles + 0x00000006 + + + 32KCYCLES + Timeout period of 32768 cycles + 0x00000007 + + + + + + + CALCTRL + Calibration Control Register + 0x050 + 32 + read-write + 0x00000000 + 0x0F0F0177 + + + UPSEL + Calibration Up-counter Select + 0 + 3 + read-write + + + HFXO + Select HFXO as up-counter + 0x00000000 + + + LFXO + Select LFXO as up-counter + 0x00000001 + + + HFRCO + Select HFRCO as up-counter + 0x00000002 + + + LFRCO + Select LFRCO as up-counter + 0x00000003 + + + AUXHFRCO + Select AUXHFRCO as up-counter + 0x00000004 + + + PRS + Select PRS input selected by PRSUPSEL as up-counter + 0x00000005 + + + + + DOWNSEL + Calibration Down-counter Select + 4 + 3 + read-write + + + HFCLK + Select HFCLK for down-counter + 0x00000000 + + + HFXO + Select HFXO for down-counter + 0x00000001 + + + LFXO + Select LFXO for down-counter + 0x00000002 + + + HFRCO + Select HFRCO for down-counter + 0x00000003 + + + LFRCO + Select LFRCO for down-counter + 0x00000004 + + + AUXHFRCO + Select AUXHFRCO for down-counter + 0x00000005 + + + PRS + Select PRS input selected by PRSDOWNSEL as down-counter + 0x00000006 + + + + + CONT + Continuous Calibration + 8 + 1 + read-write + + + PRSUPSEL + PRS Select for PRS Input when selected in UPSEL + 16 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + PRSDOWNSEL + PRS Select for PRS Input when selected in DOWNSEL + 24 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + + + CALCNT + Calibration Counter Register + 0x054 + 32 + read-write + 0x00000000 + 0x000FFFFF + + + CALCNT + Calibration Counter + 0 + 20 + read-write + + + + + OSCENCMD + Oscillator Enable/Disable Command Register + 0x060 + 32 + write-only + 0x00000000 + 0x000003FF + + + HFRCOEN + HFRCO Enable + 0 + 1 + write-only + + + HFRCODIS + HFRCO Disable + 1 + 1 + write-only + + + HFXOEN + HFXO Enable + 2 + 1 + write-only + + + HFXODIS + HFXO Disable + 3 + 1 + write-only + + + AUXHFRCOEN + AUXHFRCO Enable + 4 + 1 + write-only + + + AUXHFRCODIS + AUXHFRCO Disable + 5 + 1 + write-only + + + LFRCOEN + LFRCO Enable + 6 + 1 + write-only + + + LFRCODIS + LFRCO Disable + 7 + 1 + write-only + + + LFXOEN + LFXO Enable + 8 + 1 + write-only + + + LFXODIS + LFXO Disable + 9 + 1 + write-only + + + + + CMD + Command Register + 0x064 + 32 + write-only + 0x00000000 + 0x00000033 + + + CALSTART + Calibration Start + 0 + 1 + write-only + + + CALSTOP + Calibration Stop + 1 + 1 + write-only + + + HFXOPEAKDETSTART + HFXO Peak Detection Start + 4 + 1 + write-only + + + HFXOSHUNTOPTSTART + HFXO Shunt Current Optimization Start + 5 + 1 + write-only + + + + + DBGCLKSEL + Debug Trace Clock Select + 0x070 + 32 + read-write + 0x00000000 + 0x00000001 + + + DBG + Debug Trace Clock + 0 + 1 + read-write + + + AUXHFRCO + AUXHFRCO is the debug trace clock + 0x00000000 + + + HFCLK + HFCLK is the debug trace clock + 0x00000001 + + + + + + + HFCLKSEL + High Frequency Clock Select Command Register + 0x074 + 32 + write-only + 0x00000000 + 0x00000007 + + + HF + HFCLK Select + 0 + 3 + write-only + + + HFRCO + Select HFRCO as HFCLK + 0x00000001 + + + HFXO + Select HFXO as HFCLK + 0x00000002 + + + LFRCO + Select LFRCO as HFCLK + 0x00000003 + + + LFXO + Select LFXO as HFCLK + 0x00000004 + + + + + + + LFACLKSEL + Low Frequency A Clock Select Register + 0x080 + 32 + read-write + 0x00000000 + 0x00000007 + + + LFA + Clock Select for LFA + 0 + 3 + read-write + + + DISABLED + LFACLK is disabled + 0x00000000 + + + LFRCO + LFRCO selected as LFACLK + 0x00000001 + + + LFXO + LFXO selected as LFACLK + 0x00000002 + + + ULFRCO + ULFRCO selected as LFACLK + 0x00000004 + + + + + + + LFBCLKSEL + Low Frequency B Clock Select Register + 0x084 + 32 + read-write + 0x00000000 + 0x00000007 + + + LFB + Clock Select for LFB + 0 + 3 + read-write + + + DISABLED + LFBCLK is disabled + 0x00000000 + + + LFRCO + LFRCO selected as LFBCLK + 0x00000001 + + + LFXO + LFXO selected as LFBCLK + 0x00000002 + + + HFCLKLE + HFCLK divided by two/four is selected as LFBCLK + 0x00000003 + + + ULFRCO + ULFRCO selected as LFBCLK + 0x00000004 + + + + + + + LFECLKSEL + Low Frequency E Clock Select Register + 0x088 + 32 + read-write + 0x00000000 + 0x00000007 + + + LFE + Clock Select for LFE + 0 + 3 + read-write + + + DISABLED + LFECLK is disabled + 0x00000000 + + + LFRCO + LFRCO selected as LFECLK + 0x00000001 + + + LFXO + LFXO selected as LFECLK + 0x00000002 + + + ULFRCO + ULFRCO selected as LFECLK + 0x00000004 + + + + + + + STATUS + Status Register + 0x090 + 32 + read-only + 0x00010003 + 0x07D103FF + + + HFRCOENS + HFRCO Enable Status + 0 + 1 + read-only + + + HFRCORDY + HFRCO Ready + 1 + 1 + read-only + + + HFXOENS + HFXO Enable Status + 2 + 1 + read-only + + + HFXORDY + HFXO Ready + 3 + 1 + read-only + + + AUXHFRCOENS + AUXHFRCO Enable Status + 4 + 1 + read-only + + + AUXHFRCORDY + AUXHFRCO Ready + 5 + 1 + read-only + + + LFRCOENS + LFRCO Enable Status + 6 + 1 + read-only + + + LFRCORDY + LFRCO Ready + 7 + 1 + read-only + + + LFXOENS + LFXO Enable Status + 8 + 1 + read-only + + + LFXORDY + LFXO Ready + 9 + 1 + read-only + + + CALRDY + Calibration Ready + 16 + 1 + read-only + + + HFXOWARMS + HFXO Warm Status + 20 + 1 + read-only + + + HFXOPEAKDETRDY + HFXO Peak Detection Ready + 22 + 1 + read-only + + + HFXOSHUNTOPTRDY + HFXO Shunt Current Optimization ready + 23 + 1 + read-only + + + HFXOAMPHIGH + HFXO oscillation amplitude is too high + 24 + 1 + read-only + + + HFXOAMPLOW + HFXO amplitude tuning value too low + 25 + 1 + read-only + + + HFXOREGILOW + HFXO regulator shunt current too low + 26 + 1 + read-only + + + + + HFCLKSTATUS + HFCLK Status Register + 0x094 + 32 + read-only + 0x00000001 + 0x00000007 + + + SELECTED + HFCLK Selected + 0 + 3 + read-only + + + HFRCO + HFRCO is selected as HFCLK clock source + 0x00000001 + + + HFXO + HFXO is selected as HFCLK clock source + 0x00000002 + + + LFRCO + LFRCO is selected as HFCLK clock source + 0x00000003 + + + LFXO + LFXO is selected as HFCLK clock source + 0x00000004 + + + + + + + HFXOTRIMSTATUS + HFXO Trim Status + 0x09C + 32 + read-only + 0x00000500 + 0x000007FF + + + IBTRIMXOCORE + Value of IBTRIMXOCORE found by automatic HFXO peak detection algorithm. Can be used as initial value for IBTRIMXOCORE in the CMU_HFXOSTEADYSTATECTRL register if HFXO is to be started again. + 0 + 7 + read-only + + + REGISH + Value of REGISH found by automatic HFXO shunt current optimization algorithm. Can be used as initial value for REGISH value in the CMU_HFXOSTEADYSTATECTRL register if HFXO is to be started again. + 7 + 4 + read-only + + + + + IF + Interrupt Flag Register + 0x0A0 + 32 + read-only + 0x00000001 + 0x80007F7F + + + HFRCORDY + HFRCO Ready Interrupt Flag + 0 + 1 + read-only + + + HFXORDY + HFXO Ready Interrupt Flag + 1 + 1 + read-only + + + LFRCORDY + LFRCO Ready Interrupt Flag + 2 + 1 + read-only + + + LFXORDY + LFXO Ready Interrupt Flag + 3 + 1 + read-only + + + AUXHFRCORDY + AUXHFRCO Ready Interrupt Flag + 4 + 1 + read-only + + + CALRDY + Calibration Ready Interrupt Flag + 5 + 1 + read-only + + + CALOF + Calibration Overflow Interrupt Flag + 6 + 1 + read-only + + + HFXODISERR + HFXO Disable Error Interrupt Flag + 8 + 1 + read-only + + + HFXOAUTOSW + HFXO Automatic Switch Interrupt Flag + 9 + 1 + read-only + + + HFXOPEAKDETERR + HFXO Automatic Peak Detection Error Interrupt Flag + 10 + 1 + read-only + + + HFXOPEAKDETRDY + HFXO Automatic Peak Detection Ready Interrupt Flag + 11 + 1 + read-only + + + HFXOSHUNTOPTRDY + HFXO Automatic Shunt Current Optimization Ready Interrupt Flag + 12 + 1 + read-only + + + HFRCODIS + HFRCO Disable Interrupt Flag + 13 + 1 + read-only + + + LFTIMEOUTERR + Low Frequency Timeout Error Interrupt Flag + 14 + 1 + read-only + + + CMUERR + CMU Error Interrupt Flag + 31 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x0A4 + 32 + write-only + 0x00000000 + 0x80007F7F + + + HFRCORDY + Set HFRCORDY Interrupt Flag + 0 + 1 + write-only + + + HFXORDY + Set HFXORDY Interrupt Flag + 1 + 1 + write-only + + + LFRCORDY + Set LFRCORDY Interrupt Flag + 2 + 1 + write-only + + + LFXORDY + Set LFXORDY Interrupt Flag + 3 + 1 + write-only + + + AUXHFRCORDY + Set AUXHFRCORDY Interrupt Flag + 4 + 1 + write-only + + + CALRDY + Set CALRDY Interrupt Flag + 5 + 1 + write-only + + + CALOF + Set CALOF Interrupt Flag + 6 + 1 + write-only + + + HFXODISERR + Set HFXODISERR Interrupt Flag + 8 + 1 + write-only + + + HFXOAUTOSW + Set HFXOAUTOSW Interrupt Flag + 9 + 1 + write-only + + + HFXOPEAKDETERR + Set HFXOPEAKDETERR Interrupt Flag + 10 + 1 + write-only + + + HFXOPEAKDETRDY + Set HFXOPEAKDETRDY Interrupt Flag + 11 + 1 + write-only + + + HFXOSHUNTOPTRDY + Set HFXOSHUNTOPTRDY Interrupt Flag + 12 + 1 + write-only + + + HFRCODIS + Set HFRCODIS Interrupt Flag + 13 + 1 + write-only + + + LFTIMEOUTERR + Set LFTIMEOUTERR Interrupt Flag + 14 + 1 + write-only + + + CMUERR + Set CMUERR Interrupt Flag + 31 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x0A8 + 32 + write-only + 0x00000000 + 0x80007F7F + + + HFRCORDY + Clear HFRCORDY Interrupt Flag + 0 + 1 + write-only + + + HFXORDY + Clear HFXORDY Interrupt Flag + 1 + 1 + write-only + + + LFRCORDY + Clear LFRCORDY Interrupt Flag + 2 + 1 + write-only + + + LFXORDY + Clear LFXORDY Interrupt Flag + 3 + 1 + write-only + + + AUXHFRCORDY + Clear AUXHFRCORDY Interrupt Flag + 4 + 1 + write-only + + + CALRDY + Clear CALRDY Interrupt Flag + 5 + 1 + write-only + + + CALOF + Clear CALOF Interrupt Flag + 6 + 1 + write-only + + + HFXODISERR + Clear HFXODISERR Interrupt Flag + 8 + 1 + write-only + + + HFXOAUTOSW + Clear HFXOAUTOSW Interrupt Flag + 9 + 1 + write-only + + + HFXOPEAKDETERR + Clear HFXOPEAKDETERR Interrupt Flag + 10 + 1 + write-only + + + HFXOPEAKDETRDY + Clear HFXOPEAKDETRDY Interrupt Flag + 11 + 1 + write-only + + + HFXOSHUNTOPTRDY + Clear HFXOSHUNTOPTRDY Interrupt Flag + 12 + 1 + write-only + + + HFRCODIS + Clear HFRCODIS Interrupt Flag + 13 + 1 + write-only + + + LFTIMEOUTERR + Clear LFTIMEOUTERR Interrupt Flag + 14 + 1 + write-only + + + CMUERR + Clear CMUERR Interrupt Flag + 31 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x0AC + 32 + read-write + 0x00000000 + 0x80007F7F + + + HFRCORDY + HFRCORDY Interrupt Enable + 0 + 1 + read-write + + + HFXORDY + HFXORDY Interrupt Enable + 1 + 1 + read-write + + + LFRCORDY + LFRCORDY Interrupt Enable + 2 + 1 + read-write + + + LFXORDY + LFXORDY Interrupt Enable + 3 + 1 + read-write + + + AUXHFRCORDY + AUXHFRCORDY Interrupt Enable + 4 + 1 + read-write + + + CALRDY + CALRDY Interrupt Enable + 5 + 1 + read-write + + + CALOF + CALOF Interrupt Enable + 6 + 1 + read-write + + + HFXODISERR + HFXODISERR Interrupt Enable + 8 + 1 + read-write + + + HFXOAUTOSW + HFXOAUTOSW Interrupt Enable + 9 + 1 + read-write + + + HFXOPEAKDETERR + HFXOPEAKDETERR Interrupt Enable + 10 + 1 + read-write + + + HFXOPEAKDETRDY + HFXOPEAKDETRDY Interrupt Enable + 11 + 1 + read-write + + + HFXOSHUNTOPTRDY + HFXOSHUNTOPTRDY Interrupt Enable + 12 + 1 + read-write + + + HFRCODIS + HFRCODIS Interrupt Enable + 13 + 1 + read-write + + + LFTIMEOUTERR + LFTIMEOUTERR Interrupt Enable + 14 + 1 + read-write + + + CMUERR + CMUERR Interrupt Enable + 31 + 1 + read-write + + + + + HFBUSCLKEN0 + High Frequency Bus Clock Enable Register 0 + 0x0B0 + 32 + read-write + 0x00000000 + 0x0000003F + + + LE + Low Energy Peripheral Interface Clock Enable + 0 + 1 + read-write + + + CRYPTO + Advanced Encryption Standard Accelerator Clock Enable + 1 + 1 + read-write + + + GPIO + General purpose Input/Output Clock Enable + 2 + 1 + read-write + + + PRS + Peripheral Reflex System Clock Enable + 3 + 1 + read-write + + + LDMA + Linked Direct Memory Access Controller Clock Enable + 4 + 1 + read-write + + + GPCRC + General Purpose CRC Clock Enable + 5 + 1 + read-write + + + + + HFPERCLKEN0 + High Frequency Peripheral Clock Enable Register 0 + 0x0C0 + 32 + read-write + 0x00000000 + 0x000003FF + + + TIMER0 + Timer 0 Clock Enable + 0 + 1 + read-write + + + TIMER1 + Timer 1 Clock Enable + 1 + 1 + read-write + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable + 2 + 1 + read-write + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable + 3 + 1 + read-write + + + ACMP0 + Analog Comparator 0 Clock Enable + 4 + 1 + read-write + + + ACMP1 + Analog Comparator 1 Clock Enable + 5 + 1 + read-write + + + CRYOTIMER + CryoTimer Clock Enable + 6 + 1 + read-write + + + I2C0 + I2C 0 Clock Enable + 7 + 1 + read-write + + + ADC0 + Analog to Digital Converter 0 Clock Enable + 8 + 1 + read-write + + + IDAC0 + Current Digital to Analog Converter 0 Clock Enable + 9 + 1 + read-write + + + + + LFACLKEN0 + Low Frequency A Clock Enable Register 0 (Async Reg) + 0x0E0 + 32 + read-write + 0x00000000 + 0x00000001 + + + LETIMER0 + Low Energy Timer 0 Clock Enable + 0 + 1 + read-write + + + + + LFBCLKEN0 + Low Frequency B Clock Enable Register 0 (Async Reg) + 0x0E8 + 32 + read-write + 0x00000000 + 0x00000001 + + + LEUART0 + Low Energy UART 0 Clock Enable + 0 + 1 + read-write + + + + + LFECLKEN0 + Low Frequency E Clock Enable Register 0 (Async Reg) + 0x0F0 + 32 + read-write + 0x00000000 + 0x00000001 + + + RTCC + Real-Time Counter and Calendar Clock Enable + 0 + 1 + read-write + + + + + HFPRESC + High Frequency Clock Prescaler Register + 0x100 + 32 + read-write + 0x00000000 + 0x01001F00 + + + PRESC + HFCLK Prescaler + 8 + 5 + read-write + + + NODIVISION + "" + 0x00000000 + + + + + HFCLKLEPRESC + HFCLKLE prescaler + 24 + 1 + read-write + + + DIV2 + HFCLKLE is HFBUSCLKLE divided by 2. + 0x00000000 + + + DIV4 + HFCLKLE is HFBUSCLKLE divided by 4. + 0x00000001 + + + + + + + HFCOREPRESC + High Frequency Core Clock Prescaler Register + 0x108 + 32 + read-write + 0x00000000 + 0x0001FF00 + + + PRESC + HFCORECLK Prescaler + 8 + 9 + read-write + + + NODIVISION + "" + 0x00000000 + + + + + + + HFPERPRESC + High Frequency Peripheral Clock Prescaler Register + 0x10C + 32 + read-write + 0x00000000 + 0x0001FF00 + + + PRESC + HFPERCLK Prescaler + 8 + 9 + read-write + + + NODIVISION + "" + 0x00000000 + + + + + + + HFEXPPRESC + High Frequency Export Clock Prescaler Register + 0x114 + 32 + read-write + 0x00000000 + 0x00001F00 + + + PRESC + HFEXPCLK Prescaler + 8 + 5 + read-write + + + NODIVISION + "" + 0x00000000 + + + + + + + LFAPRESC0 + Low Frequency A Prescaler Register 0 (Async Reg) + 0x120 + 32 + read-write + 0x00000000 + 0x0000000F + + + LETIMER0 + Low Energy Timer 0 Prescaler + 0 + 4 + read-write + + + DIV1 + LFACLKLETIMER0 = LFACLK + 0x00000000 + + + DIV2 + LFACLKLETIMER0 = LFACLK/2 + 0x00000001 + + + DIV4 + LFACLKLETIMER0 = LFACLK/4 + 0x00000002 + + + DIV8 + LFACLKLETIMER0 = LFACLK/8 + 0x00000003 + + + DIV16 + LFACLKLETIMER0 = LFACLK/16 + 0x00000004 + + + DIV32 + LFACLKLETIMER0 = LFACLK/32 + 0x00000005 + + + DIV64 + LFACLKLETIMER0 = LFACLK/64 + 0x00000006 + + + DIV128 + LFACLKLETIMER0 = LFACLK/128 + 0x00000007 + + + DIV256 + LFACLKLETIMER0 = LFACLK/256 + 0x00000008 + + + DIV512 + LFACLKLETIMER0 = LFACLK/512 + 0x00000009 + + + DIV1024 + LFACLKLETIMER0 = LFACLK/1024 + 0x0000000A + + + DIV2048 + LFACLKLETIMER0 = LFACLK/2048 + 0x0000000B + + + DIV4096 + LFACLKLETIMER0 = LFACLK/4096 + 0x0000000C + + + DIV8192 + LFACLKLETIMER0 = LFACLK/8192 + 0x0000000D + + + DIV16384 + LFACLKLETIMER0 = LFACLK/16384 + 0x0000000E + + + DIV32768 + LFACLKLETIMER0 = LFACLK/32768 + 0x0000000F + + + + + + + LFBPRESC0 + Low Frequency B Prescaler Register 0 (Async Reg) + 0x128 + 32 + read-write + 0x00000000 + 0x00000003 + + + LEUART0 + Low Energy UART 0 Prescaler + 0 + 2 + read-write + + + DIV1 + LFBCLKLEUART0 = LFBCLK + 0x00000000 + + + DIV2 + LFBCLKLEUART0 = LFBCLK/2 + 0x00000001 + + + DIV4 + LFBCLKLEUART0 = LFBCLK/4 + 0x00000002 + + + DIV8 + LFBCLKLEUART0 = LFBCLK/8 + 0x00000003 + + + + + + + LFEPRESC0 + Low Frequency E Prescaler Register 0 (Async Reg) + 0x130 + 32 + read-write + 0x00000000 + 0x0000000F + + + RTCC + Real-Time Counter and Calendar Prescaler + 0 + 4 + read-only + + + DIV1 + LFECLKRTCC = LFECLK + 0x00000000 + + + + + + + SYNCBUSY + Synchronization Busy Register + 0x140 + 32 + read-only + 0x00000000 + 0x3F050055 + + + LFACLKEN0 + Low Frequency A Clock Enable 0 Busy + 0 + 1 + read-only + + + LFAPRESC0 + Low Frequency A Prescaler 0 Busy + 2 + 1 + read-only + + + LFBCLKEN0 + Low Frequency B Clock Enable 0 Busy + 4 + 1 + read-only + + + LFBPRESC0 + Low Frequency B Prescaler 0 Busy + 6 + 1 + read-only + + + LFECLKEN0 + Low Frequency E Clock Enable 0 Busy + 16 + 1 + read-only + + + LFEPRESC0 + Low Frequency E Prescaler 0 Busy + 18 + 1 + read-only + + + HFRCOBSY + HFRCO Busy + 24 + 1 + read-only + + + AUXHFRCOBSY + AUXHFRCO Busy + 25 + 1 + read-only + + + LFRCOBSY + LFRCO Busy + 26 + 1 + read-only + + + LFRCOVREFBSY + LFRCO VREF Busy + 27 + 1 + read-only + + + HFXOBSY + HFXO Busy + 28 + 1 + read-only + + + LFXOBSY + LFXO Busy + 29 + 1 + read-only + + + + + FREEZE + Freeze Register + 0x144 + 32 + read-write + 0x00000000 + 0x00000001 + + + REGFREEZE + Register Update Freeze + 0 + 1 + read-write + + + + + PCNTCTRL + PCNT Control Register + 0x150 + 32 + read-write + 0x00000000 + 0x00000003 + + + PCNT0CLKEN + PCNT0 Clock Enable + 0 + 1 + read-write + + + PCNT0CLKSEL + PCNT0 Clock Select + 1 + 1 + read-write + + + + + ADCCTRL + ADC Control Register + 0x15C + 32 + read-write + 0x00000000 + 0x00000130 + + + ADC0CLKSEL + ADC0 Clock Select + 4 + 2 + read-write + + + DISABLED + ADC0 is not clocked + 0x00000000 + + + AUXHFRCO + AUXHFRCO is clocking ADC0 + 0x00000001 + + + HFXO + HFXO is clocking ADC0 + 0x00000002 + + + HFSRCCLK + HFSRCCLK is clocking ADC0 + 0x00000003 + + + + + ADC0CLKINV + Invert clock selected by ADC0CLKSEL + 8 + 1 + read-write + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x170 + 32 + read-write + 0x00000000 + 0x00000003 + + + CLKOUT0PEN + CLKOUT0 Pin Enable + 0 + 1 + read-write + + + CLKOUT1PEN + CLKOUT1 Pin Enable + 1 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x174 + 32 + read-write + 0x00000000 + 0x00003F3F + + + CLKOUT0LOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + + + CLKOUT1LOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + + + + + LOCK + Configuration Lock Register + 0x180 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + Configuration Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + + + CRYPTO + 1.6 + CRYPTO + 0x400F0000 + + 0 + 0x00000400 + registers + + + CRYPTO + 25 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0xB333C407 + + + AES + AES Mode + 0 + 1 + read-write + + + KEYBUFDIS + Key Buffer Disable + 1 + 1 + read-write + + + SHA + SHA Mode + 2 + 1 + read-write + + + NOBUSYSTALL + No Stalling of Bus When Busy + 10 + 1 + read-write + + + INCWIDTH + Increment Width + 14 + 2 + read-write + + + INCWIDTH1 + Byte 15 in DATA1 is used for the increment function. + 0x00000000 + + + INCWIDTH2 + Bytes 14 and 15 in DATA1 are used for the increment function. + 0x00000001 + + + INCWIDTH3 + Bytes 13 to 15 in DATA1 are used for the increment function. + 0x00000002 + + + INCWIDTH4 + Bytes 12 to 15 in DATA1 are used for the increment function. + 0x00000003 + + + + + DMA0MODE + DMA0 Read Mode + 16 + 2 + read-write + + + FULL + Target register is fully read/written during every DMA transaction + 0x00000000 + + + LENLIMIT + Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + necessary zero padding is read. Zero padding is automatically added when writing. + 0x00000001 + + + FULLBYTE + Target register is fully read/written during every DMA transaction. Bytewise DMA. + 0x00000002 + + + LENLIMITBYTE + Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + necessary zero padding is read. Bytewise DMA. Zero padding is automatically added when writing. + 0x00000003 + + + + + DMA0RSEL + DMA0 Read Register Select + 20 + 2 + read-write + + + DATA0 + "" + 0x00000000 + + + DDATA0 + "" + 0x00000001 + + + DDATA0BIG + "" + 0x00000002 + + + QDATA0 + "" + 0x00000003 + + + + + DMA1MODE + DMA1 Read Mode + 24 + 2 + read-write + + + FULL + Target register is fully read/written during every DMA transaction + 0x00000000 + + + LENLIMIT + Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + 1 bytes + necessary zero padding is read. Zero padding is automatically added when writing. + 0x00000001 + + + FULLBYTE + Target register is fully read/written during every DMA transaction. Bytewise DMA. + 0x00000002 + + + LENLIMITBYTE + Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + 1 bytes + necessary zero padding is read. Bytewise DMA. Zero padding is automatically added when writing. + 0x00000003 + + + + + DMA1RSEL + DATA0 DMA Unaligned Read Register Select + 28 + 2 + read-write + + + DATA1 + "" + 0x00000000 + + + DDATA1 + "" + 0x00000001 + + + QDATA1 + "" + 0x00000002 + + + QDATA1BIG + "" + 0x00000003 + + + + + COMBDMA0WEREQ + Combined Data0 Write DMA Request + 31 + 1 + read-write + + + + + WAC + Wide Arithmetic Configuration + 0x004 + 32 + read-write + 0x00000000 + 0x00000F1F + + + MODULUS + Modular Operation Modulus + 0 + 4 + read-write + + + BIN256 + Generic modulus. p = 2^256 + 0x00000000 + + + BIN128 + Generic modulus. p = 2^128 + 0x00000001 + + + ECCBIN233P + Modulus for B-233 and K-233 ECC curves. p(t) = t^233 + t^74 + 1 + 0x00000002 + + + ECCBIN163P + Modulus for B-163 and K-163 ECC curves. p(t) = t^163 + t^7 + t^6 + t^3 + 1 + 0x00000003 + + + GCMBIN128 + Modulus for GCM. P(t) = t^128 + t^7 + t^2 + t + 1 + 0x00000004 + + + ECCPRIME256P + Modulus for P-256 ECC curve. p = 2^256 - 2^224 + 2^192 + 2^96 - 1 + 0x00000005 + + + ECCPRIME224P + Modulus for P-224 ECC curve. p = 2^224 - 2^96 - 1 + 0x00000006 + + + ECCPRIME192P + Modulus for P-192 ECC curve. p = 2^192 - 2^64 - 1 + 0x00000007 + + + ECCBIN233N + P modulus for B-233 ECC curve + 0x00000008 + + + ECCBIN233KN + P modulus for K-233 ECC curve + 0x00000009 + + + ECCBIN163N + P modulus for B-163 ECC curve + 0x0000000A + + + ECCBIN163KN + P modulus for K-163 ECC curve + 0x0000000B + + + ECCPRIME256N + P modulus for P-256 ECC curve + 0x0000000C + + + ECCPRIME224N + P modulus for P-224 ECC curve + 0x0000000D + + + ECCPRIME192N + P modulus for P-192 ECC curve + 0x0000000E + + + + + MODOP + Modular Operation Field Type + 4 + 1 + read-write + + + MULWIDTH + Multiply Width + 8 + 2 + read-write + + + MUL256 + Multiply 256 bits + 0x00000000 + + + MUL128 + Multiply 128 bits + 0x00000001 + + + MULMOD + Same number of bits as specified by MODULUS + 0x00000002 + + + + + RESULTWIDTH + Result Width + 10 + 2 + read-write + + + 256BIT + Results have 256 bits + 0x00000000 + + + 128BIT + Results have 128 bits + 0x00000001 + + + 260BIT + Results have 260 bits. Upper bits of result can be read through DDATA0MSBS in CRYPTO_STATUS + 0x00000002 + + + + + + + CMD + Command Register + 0x008 + 32 + read-write + 0x00000000 + 0x00000EFF + + + INSTR + Execute Instruction + 0 + 8 + read-write + + + SEQSTART + Encryption/Decryption SEQUENCE Start + 9 + 1 + write-only + + + SEQSTOP + Sequence Stop + 10 + 1 + write-only + + + SEQSTEP + Sequence Step + 11 + 1 + write-only + + + + + STATUS + Status Register + 0x010 + 32 + read-only + 0x00000000 + 0x00000007 + + + SEQRUNNING + AES SEQUENCE Running + 0 + 1 + read-only + + + INSTRRUNNING + Action is active + 1 + 1 + read-only + + + DMAACTIVE + DMA Action is active + 2 + 1 + read-only + + + + + DSTATUS + Data Status Register + 0x014 + 32 + read-only + 0x00000000 + 0x011F0F0F + + + DATA0ZERO + Data 0 Zero + 0 + 4 + read-only + + + ZERO0TO31 + In DATA0 bits 0 to 31 are all zero. + 0x00000001 + + + ZERO32TO63 + In DATA0 bits 32 to 63 are all zero. + 0x00000002 + + + ZERO64TO95 + In DATA0 bits 64 to 95 are all zero. + 0x00000004 + + + ZERO96TO127 + In DATA0 bits 96 to 127 are all zero. + 0x00000008 + + + + + DDATA0LSBS + LSBs in DDATA0 + 8 + 4 + read-only + + + DDATA0MSBS + MSB in DDATA0 + 16 + 4 + read-only + + + DDATA1MSB + MSB in DDATA1 + 20 + 1 + read-only + + + CARRY + Carry From Arithmetic Operation + 24 + 1 + read-only + + + + + CSTATUS + Control Status Register + 0x018 + 32 + read-only + 0x00000201 + 0x01F30707 + + + V0 + Selected ALU Operand 0 + 0 + 3 + read-only + + + DDATA0 + "" + 0x00000000 + + + DDATA1 + "" + 0x00000001 + + + DDATA2 + "" + 0x00000002 + + + DDATA3 + "" + 0x00000003 + + + DDATA4 + "" + 0x00000004 + + + DATA0 + "" + 0x00000005 + + + DATA1 + "" + 0x00000006 + + + DATA2 + "" + 0x00000007 + + + + + V1 + Selected ALU Operand 1 + 8 + 3 + read-only + + + DDATA0 + "" + 0x00000000 + + + DDATA1 + "" + 0x00000001 + + + DDATA2 + "" + 0x00000002 + + + DDATA3 + "" + 0x00000003 + + + DDATA4 + "" + 0x00000004 + + + DATA0 + "" + 0x00000005 + + + DATA1 + "" + 0x00000006 + + + DATA2 + "" + 0x00000007 + + + + + SEQPART + Sequence Part + 16 + 1 + read-only + + + SEQSKIP + Sequence Skip Next Instruction + 17 + 1 + read-only + + + SEQIP + Sequence Next Instruction Pointer + 20 + 5 + read-only + + + + + KEY + KEY Register Access + 0x020 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + KEY + Key Access + 0 + 32 + read-write + + + + + KEYBUF + KEY Buffer Register Access + 0x024 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + KEYBUF + Key Buffer Access + 0 + 32 + read-write + + + + + SEQCTRL + Sequence Control + 0x030 + 32 + read-write + 0x00000000 + 0xBF303FFF + + + LENGTHA + Buffer length A in bytes + 0 + 14 + read-write + + + BLOCKSIZE + Size of data blocks + 20 + 2 + read-write + + + 16BYTES + A block is 16 bytes long + 0x00000000 + + + 32BYTES + A block is 32 bytes long + 0x00000001 + + + 64BYTES + A block is 64 bytes long + 0x00000002 + + + + + DMA0SKIP + DMA0 Skip + 24 + 2 + read-write + + + DMA1SKIP + DMA1 Skip + 26 + 2 + read-write + + + DMA0PRESA + DMA0 Preserve A + 28 + 1 + read-write + + + DMA1PRESA + DMA1 Preserve A + 29 + 1 + read-write + + + HALT + Halt Sequence + 31 + 1 + read-write + + + + + SEQCTRLB + Sequence Control B + 0x034 + 32 + read-write + 0x00000000 + 0x30003FFF + + + LENGTHB + Buffer length B in bytes + 0 + 14 + read-write + + + DMA0PRESB + DMA0 Preserve B + 28 + 1 + read-write + + + DMA1PRESB + DMA1 Preserve B + 29 + 1 + read-write + + + + + IF + AES Interrupt Flags + 0x040 + 32 + read-only + 0x00000000 + 0x00000003 + + + INSTRDONE + Instruction done + 0 + 1 + read-only + + + SEQDONE + Sequence Done + 1 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x044 + 32 + write-only + 0x00000000 + 0x0000000F + + + INSTRDONE + Set INSTRDONE Interrupt Flag + 0 + 1 + write-only + + + SEQDONE + Set SEQDONE Interrupt Flag + 1 + 1 + write-only + + + BUFOF + Set BUFOF Interrupt Flag + 2 + 1 + write-only + + + BUFUF + Set BUFUF Interrupt Flag + 3 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x048 + 32 + write-only + 0x00000000 + 0x0000000F + + + INSTRDONE + Clear INSTRDONE Interrupt Flag + 0 + 1 + write-only + + + SEQDONE + Clear SEQDONE Interrupt Flag + 1 + 1 + write-only + + + BUFOF + Clear BUFOF Interrupt Flag + 2 + 1 + write-only + + + BUFUF + Clear BUFUF Interrupt Flag + 3 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x04C + 32 + read-write + 0x00000000 + 0x0000000F + + + INSTRDONE + INSTRDONE Interrupt Enable + 0 + 1 + read-write + + + SEQDONE + SEQDONE Interrupt Enable + 1 + 1 + read-write + + + BUFOF + BUFOF Interrupt Enable + 2 + 1 + read-write + + + BUFUF + BUFUF Interrupt Enable + 3 + 1 + read-write + + + + + SEQ0 + Sequence register 0 + 0x050 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + INSTR0 + Sequence Instruction 0 + 0 + 8 + read-write + + + INSTR1 + Sequence Instruction 1 + 8 + 8 + read-write + + + INSTR2 + Sequence Instruction 2 + 16 + 8 + read-write + + + INSTR3 + Sequence Instruction 3 + 24 + 8 + read-write + + + + + SEQ1 + Sequence Register 1 + 0x054 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + INSTR4 + Sequence Instruction 4 + 0 + 8 + read-write + + + INSTR5 + Sequence Instruction 5 + 8 + 8 + read-write + + + INSTR6 + Sequence Instruction 6 + 16 + 8 + read-write + + + INSTR7 + Sequence Instruction 7 + 24 + 8 + read-write + + + + + SEQ2 + Sequence Register 2 + 0x058 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + INSTR8 + Sequence Instruction 8 + 0 + 8 + read-write + + + INSTR9 + Sequence Instruction 9 + 8 + 8 + read-write + + + INSTR10 + Sequence Instruction 10 + 16 + 8 + read-write + + + INSTR11 + Sequence Instruction 11 + 24 + 8 + read-write + + + + + SEQ3 + Sequence Register 3 + 0x05C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + INSTR12 + Sequence Instruction 12 + 0 + 8 + read-write + + + INSTR13 + Sequence Instruction 13 + 8 + 8 + read-write + + + INSTR14 + Sequence Instruction 14 + 16 + 8 + read-write + + + INSTR15 + Sequence Instruction 15 + 24 + 8 + read-write + + + + + SEQ4 + Sequence Register 4 + 0x060 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + INSTR16 + Sequence Instruction 16 + 0 + 8 + read-write + + + INSTR17 + Sequence Instruction 17 + 8 + 8 + read-write + + + INSTR18 + Sequence Instruction 18 + 16 + 8 + read-write + + + INSTR19 + Sequence Instruction 19 + 24 + 8 + read-write + + + + + DATA0 + DATA0 Register Access + 0x080 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DATA0 + Data 0 Access + 0 + 32 + read-write + + + + + DATA1 + DATA1 Register Access + 0x084 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DATA1 + Data 1 Access + 0 + 32 + read-write + + + + + DATA2 + DATA2 Register Access + 0x088 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DATA2 + Data 2 Access + 0 + 32 + read-write + + + + + DATA3 + DATA3 Register Access + 0x08C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DATA3 + Data 3 Access + 0 + 32 + read-write + + + + + DATA0XOR + DATA0XOR Register Access + 0x0A0 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DATA0XOR + XOR Data 0 Access + 0 + 32 + read-write + + + + + DATA0BYTE + DATA0 Register Byte Access + 0x0B0 + 32 + read-write + 0x00000000 + 0x000000FF + modifyExternal + + + DATA0BYTE + Data 0 Byte Access + 0 + 8 + read-write + + + + + DATA1BYTE + DATA1 Register Byte Access + 0x0B4 + 32 + read-write + 0x00000000 + 0x000000FF + modifyExternal + + + DATA1BYTE + Data 1 Byte Access + 0 + 8 + read-write + + + + + DATA0XORBYTE + DATA0 Register Byte XOR Access + 0x0BC + 32 + read-write + 0x00000000 + 0x000000FF + modifyExternal + + + DATA0XORBYTE + Data 0 XOR Byte Access + 0 + 8 + read-write + + + + + DATA0BYTE12 + DATA0 Register Byte 12 Access + 0x0C0 + 32 + read-write + 0x00000000 + 0x000000FF + + + DATA0BYTE12 + Data 0 Byte 12 Access + 0 + 8 + read-write + + + + + DATA0BYTE13 + DATA0 Register Byte 13 Access + 0x0C4 + 32 + read-write + 0x00000000 + 0x000000FF + + + DATA0BYTE13 + Data 0 Byte 13 Access + 0 + 8 + read-write + + + + + DATA0BYTE14 + DATA0 Register Byte 14 Access + 0x0C8 + 32 + read-write + 0x00000000 + 0x000000FF + + + DATA0BYTE14 + Data 0 Byte 14 Access + 0 + 8 + read-write + + + + + DATA0BYTE15 + DATA0 Register Byte 15 Access + 0x0CC + 32 + read-write + 0x00000000 + 0x000000FF + + + DATA0BYTE15 + Data 0 Byte 15 Access + 0 + 8 + read-write + + + + + DDATA0 + DDATA0 Register Access + 0x100 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DDATA0 + Double Data 0 Access + 0 + 32 + read-write + + + + + DDATA1 + DDATA1 Register Access + 0x104 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DDATA1 + Double Data 0 Access + 0 + 32 + read-write + + + + + DDATA2 + DDATA2 Register Access + 0x108 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DDATA2 + Double Data 0 Access + 0 + 32 + read-write + + + + + DDATA3 + DDATA3 Register Access + 0x10C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DDATA3 + Double Data 0 Access + 0 + 32 + read-write + + + + + DDATA4 + DDATA4 Register Access + 0x110 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DDATA4 + Double Data 0 Access + 0 + 32 + read-write + + + + + DDATA0BIG + DDATA0 Register Big Endian Access + 0x130 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DDATA0BIG + Double Data 0 Big Endian Access + 0 + 32 + read-write + + + + + DDATA0BYTE + DDATA0 Register Byte Access + 0x140 + 32 + read-write + 0x00000000 + 0x000000FF + modifyExternal + + + DDATA0BYTE + Ddata 0 Byte Access + 0 + 8 + read-write + + + + + DDATA1BYTE + DDATA1 Register Byte Access + 0x144 + 32 + read-write + 0x00000000 + 0x000000FF + modifyExternal + + + DDATA1BYTE + Ddata 1 Byte Access + 0 + 8 + read-write + + + + + DDATA0BYTE32 + DDATA0 Register Byte 32 access. + 0x148 + 32 + read-write + 0x00000000 + 0x0000000F + + + DDATA0BYTE32 + Ddata 0 Byte 32 Access + 0 + 4 + read-write + + + + + QDATA0 + QDATA0 Register Access + 0x180 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + QDATA0 + Quad Data 0 Access + 0 + 32 + read-write + + + + + QDATA1 + QDATA1 Register Access + 0x184 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + QDATA1 + Quad Data 1 Access + 0 + 32 + read-write + + + + + QDATA1BIG + QDATA1 Register Big Endian Access + 0x1A4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + QDATA1BIG + Quad Data 1 Big Endian Access + 0 + 32 + read-write + + + + + QDATA0BYTE + QDATA0 Register Byte Access + 0x1C0 + 32 + read-write + 0x00000000 + 0x000000FF + modifyExternal + + + QDATA0BYTE + Qdata 0 Byte Access + 0 + 8 + read-write + + + + + QDATA1BYTE + QDATA1 Register Byte Access + 0x1C4 + 32 + read-write + 0x00000000 + 0x000000FF + modifyExternal + + + QDATA1BYTE + Qdata 1 Byte Access + 0 + 8 + read-write + + + + + + + GPIO + 1.6 + GPIO + 0x4000A000 + + 0 + 0x00001000 + registers + + + GPIO_EVEN + 9 + + + GPIO_ODD + 17 + + + + PA_CTRL + Port Control Register + 0x000 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PA_MODEL + Port Pin Mode Low Register + 0x004 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PA_MODEH + Port Pin Mode High Register + 0x008 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PA_DOUT + Port Data Out Register + 0x00C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PA_DOUTTGL + Port Data Out Toggle Register + 0x018 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PA_DIN + Port Data In Register + 0x01C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PA_PINLOCKN + Port Unlocked Pins Register + 0x020 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PA_OVTDIS + Over Voltage Disable for all modes + 0x028 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PB_CTRL + Port Control Register + 0x030 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PB_MODEL + Port Pin Mode Low Register + 0x034 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PB_MODEH + Port Pin Mode High Register + 0x038 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PB_DOUT + Port Data Out Register + 0x03C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PB_DOUTTGL + Port Data Out Toggle Register + 0x048 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PB_DIN + Port Data In Register + 0x04C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PB_PINLOCKN + Port Unlocked Pins Register + 0x050 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PB_OVTDIS + Over Voltage Disable for all modes + 0x058 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PC_CTRL + Port Control Register + 0x060 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PC_MODEL + Port Pin Mode Low Register + 0x064 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PC_MODEH + Port Pin Mode High Register + 0x068 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PC_DOUT + Port Data Out Register + 0x06C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PC_DOUTTGL + Port Data Out Toggle Register + 0x078 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PC_DIN + Port Data In Register + 0x07C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PC_PINLOCKN + Port Unlocked Pins Register + 0x080 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PC_OVTDIS + Over Voltage Disable for all modes + 0x088 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PD_CTRL + Port Control Register + 0x090 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PD_MODEL + Port Pin Mode Low Register + 0x094 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PD_MODEH + Port Pin Mode High Register + 0x098 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PD_DOUT + Port Data Out Register + 0x09C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PD_DOUTTGL + Port Data Out Toggle Register + 0x0A8 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PD_DIN + Port Data In Register + 0x0AC + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PD_PINLOCKN + Port Unlocked Pins Register + 0x0B0 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PD_OVTDIS + Over Voltage Disable for all modes + 0x0B8 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PE_CTRL + Port Control Register + 0x0C0 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PE_MODEL + Port Pin Mode Low Register + 0x0C4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PE_MODEH + Port Pin Mode High Register + 0x0C8 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PE_DOUT + Port Data Out Register + 0x0CC + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PE_DOUTTGL + Port Data Out Toggle Register + 0x0D8 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PE_DIN + Port Data In Register + 0x0DC + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PE_PINLOCKN + Port Unlocked Pins Register + 0x0E0 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PE_OVTDIS + Over Voltage Disable for all modes + 0x0E8 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PF_CTRL + Port Control Register + 0x0F0 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PF_MODEL + Port Pin Mode Low Register + 0x0F4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PF_MODEH + Port Pin Mode High Register + 0x0F8 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PF_DOUT + Port Data Out Register + 0x0FC + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PF_DOUTTGL + Port Data Out Toggle Register + 0x108 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PF_DIN + Port Data In Register + 0x10C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PF_PINLOCKN + Port Unlocked Pins Register + 0x110 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PF_OVTDIS + Over Voltage Disable for all modes + 0x118 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PG_CTRL + Port Control Register + 0x120 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PG_MODEL + Port Pin Mode Low Register + 0x124 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PG_MODEH + Port Pin Mode High Register + 0x128 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PG_DOUT + Port Data Out Register + 0x12C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PG_DOUTTGL + Port Data Out Toggle Register + 0x138 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PG_DIN + Port Data In Register + 0x13C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PG_PINLOCKN + Port Unlocked Pins Register + 0x140 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PG_OVTDIS + Over Voltage Disable for all modes + 0x148 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PH_CTRL + Port Control Register + 0x150 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PH_MODEL + Port Pin Mode Low Register + 0x154 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PH_MODEH + Port Pin Mode High Register + 0x158 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PH_DOUT + Port Data Out Register + 0x15C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PH_DOUTTGL + Port Data Out Toggle Register + 0x168 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PH_DIN + Port Data In Register + 0x16C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PH_PINLOCKN + Port Unlocked Pins Register + 0x170 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PH_OVTDIS + Over Voltage Disable for all modes + 0x178 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PI_CTRL + Port Control Register + 0x180 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PI_MODEL + Port Pin Mode Low Register + 0x184 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PI_MODEH + Port Pin Mode High Register + 0x188 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PI_DOUT + Port Data Out Register + 0x18C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PI_DOUTTGL + Port Data Out Toggle Register + 0x198 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PI_DIN + Port Data In Register + 0x19C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PI_PINLOCKN + Port Unlocked Pins Register + 0x1A0 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PI_OVTDIS + Over Voltage Disable for all modes + 0x1A8 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PJ_CTRL + Port Control Register + 0x1B0 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PJ_MODEL + Port Pin Mode Low Register + 0x1B4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PJ_MODEH + Port Pin Mode High Register + 0x1B8 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PJ_DOUT + Port Data Out Register + 0x1BC + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PJ_DOUTTGL + Port Data Out Toggle Register + 0x1C8 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PJ_DIN + Port Data In Register + 0x1CC + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PJ_PINLOCKN + Port Unlocked Pins Register + 0x1D0 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PJ_OVTDIS + Over Voltage Disable for all modes + 0x1D8 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PK_CTRL + Port Control Register + 0x1E0 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PK_MODEL + Port Pin Mode Low Register + 0x1E4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PK_MODEH + Port Pin Mode High Register + 0x1E8 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PK_DOUT + Port Data Out Register + 0x1EC + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PK_DOUTTGL + Port Data Out Toggle Register + 0x1F8 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PK_DIN + Port Data In Register + 0x1FC + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PK_PINLOCKN + Port Unlocked Pins Register + 0x200 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PK_OVTDIS + Over Voltage Disable for all modes + 0x208 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + PL_CTRL + Port Control Register + 0x210 + 32 + read-write + 0x00600060 + 0x10711071 + + + DRIVESTRENGTH + Drive strength for port + 0 + 1 + read-write + + + SLEWRATE + Slewrate limit for port + 4 + 3 + read-write + + + DINDIS + Data In Disable + 12 + 1 + read-write + + + DRIVESTRENGTHALT + Alternate drive strength for port + 16 + 1 + read-write + + + SLEWRATEALT + Alternate slewrate limit for port + 20 + 3 + read-write + + + DINDISALT + Alternate Data In Disable + 28 + 1 + read-write + + + + + PL_MODEL + Port Pin Mode Low Register + 0x214 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE0 + Pin 0 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE1 + Pin 1 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE2 + Pin 2 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE3 + Pin 3 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE4 + Pin 4 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE5 + Pin 5 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE6 + Pin 6 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE7 + Pin 7 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PL_MODEH + Port Pin Mode High Register + 0x218 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + MODE8 + Pin 8 Mode + 0 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE9 + Pin 9 Mode + 4 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE10 + Pin 10 Mode + 8 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE11 + Pin 11 Mode + 12 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE12 + Pin 12 Mode + 16 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE13 + Pin 13 Mode + 20 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE14 + Pin 14 Mode + 24 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + MODE15 + Pin 15 Mode + 28 + 4 + read-write + + + DISABLED + Input disabled. Pullup if DOUT is set. + 0x00000000 + + + INPUT + Input enabled. Filter if DOUT is set + 0x00000001 + + + INPUTPULL + Input enabled. DOUT determines pull direction + 0x00000002 + + + INPUTPULLFILTER + Input enabled with filter. DOUT determines pull direction + 0x00000003 + + + PUSHPULL + Push-pull output + 0x00000004 + + + PUSHPULLALT + Push-pull using alternate control + 0x00000005 + + + WIREDOR + Wired-or output + 0x00000006 + + + WIREDORPULLDOWN + Wired-or output with pull-down + 0x00000007 + + + WIREDAND + Open-drain output + 0x00000008 + + + WIREDANDFILTER + Open-drain output with filter + 0x00000009 + + + WIREDANDPULLUP + Open-drain output with pullup + 0x0000000A + + + WIREDANDPULLUPFILTER + Open-drain output with filter and pullup + 0x0000000B + + + WIREDANDALT + Open-drain output using alternate control + 0x0000000C + + + WIREDANDALTFILTER + Open-drain output using alternate control with filter + 0x0000000D + + + WIREDANDALTPULLUP + Open-drain output using alternate control with pullup + 0x0000000E + + + WIREDANDALTPULLUPFILTER + Open-drain output uisng alternate control with filter and pullup + 0x0000000F + + + + + + + PL_DOUT + Port Data Out Register + 0x21C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + DOUT + Data Out + 0 + 16 + read-write + + + + + PL_DOUTTGL + Port Data Out Toggle Register + 0x228 + 32 + write-only + 0x00000000 + 0x0000FFFF + + + DOUTTGL + Data Out Toggle + 0 + 16 + write-only + + + + + PL_DIN + Port Data In Register + 0x22C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + DIN + Data In + 0 + 16 + read-only + + + + + PL_PINLOCKN + Port Unlocked Pins Register + 0x230 + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + PINLOCKN + Unlocked Pins + 0 + 16 + read-write + + + + + PL_OVTDIS + Over Voltage Disable for all modes + 0x238 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + OVTDIS + Disable Over Voltage capability + 0 + 16 + read-write + + + + + EXTIPSELL + External Interrupt Port Select Low Register + 0x400 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + EXTIPSEL0 + External Interrupt 0 Port Select + 0 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 0 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 0 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 0 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 0 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 0 + 0x00000005 + + + + + EXTIPSEL1 + External Interrupt 1 Port Select + 4 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 1 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 1 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 1 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 1 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 1 + 0x00000005 + + + + + EXTIPSEL2 + External Interrupt 2 Port Select + 8 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 2 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 2 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 2 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 2 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 2 + 0x00000005 + + + + + EXTIPSEL3 + External Interrupt 3 Port Select + 12 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 3 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 3 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 3 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 3 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 3 + 0x00000005 + + + + + EXTIPSEL4 + External Interrupt 4 Port Select + 16 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 4 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 4 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 4 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 4 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 4 + 0x00000005 + + + + + EXTIPSEL5 + External Interrupt 5 Port Select + 20 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 5 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 5 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 5 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 5 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 5 + 0x00000005 + + + + + EXTIPSEL6 + External Interrupt 6 Port Select + 24 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 6 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 6 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 6 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 6 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 6 + 0x00000005 + + + + + EXTIPSEL7 + External Interrupt 7 Port Select + 28 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 7 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 7 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 7 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 7 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 7 + 0x00000005 + + + + + + + EXTIPSELH + External Interrupt Port Select High Register + 0x404 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + EXTIPSEL8 + External Interrupt 8 Port Select + 0 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 8 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 8 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 8 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 8 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 8 + 0x00000005 + + + + + EXTIPSEL9 + External Interrupt 9 Port Select + 4 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 9 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 9 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 9 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 9 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 9 + 0x00000005 + + + + + EXTIPSEL10 + External Interrupt 10 Port Select + 8 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 10 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 10 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 10 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 10 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 10 + 0x00000005 + + + + + EXTIPSEL11 + External Interrupt 11 Port Select + 12 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 11 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 11 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 11 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 11 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 11 + 0x00000005 + + + + + EXTIPSEL12 + External Interrupt 12 Port Select + 16 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 12 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 12 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 12 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 12 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 12 + 0x00000005 + + + + + EXTIPSEL13 + External Interrupt 13 Port Select + 20 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 13 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 13 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 13 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 13 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 13 + 0x00000005 + + + + + EXTIPSEL14 + External Interrupt 14 Port Select + 24 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 14 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 14 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 14 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 14 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 14 + 0x00000005 + + + + + EXTIPSEL15 + External Interrupt 15 Port Select + 28 + 4 + read-write + + + PORTA + Port A group selected for external interrupt 15 + 0x00000000 + + + PORTB + Port B group selected for external interrupt 15 + 0x00000001 + + + PORTC + Port C group selected for external interrupt 15 + 0x00000002 + + + PORTD + Port D group selected for external interrupt 15 + 0x00000003 + + + PORTF + Port F group selected for external interrupt 15 + 0x00000005 + + + + + + + EXTIPINSELL + External Interrupt Pin Select Low Register + 0x408 + 32 + read-write + 0x32103210 + 0x33333333 + + + EXTIPINSEL0 + External Interrupt 0 Pin Select + 0 + 2 + read-write + + + PIN0 + Pin 0 + 0x00000000 + + + PIN1 + Pin 1 + 0x00000001 + + + PIN2 + Pin 2 + 0x00000002 + + + PIN3 + Pin 3 + 0x00000003 + + + + + EXTIPINSEL1 + External Interrupt 1 Pin Select + 4 + 2 + read-write + + + PIN0 + Pin 0 + 0x00000000 + + + PIN1 + Pin 1 + 0x00000001 + + + PIN2 + Pin 2 + 0x00000002 + + + PIN3 + Pin 3 + 0x00000003 + + + + + EXTIPINSEL2 + External Interrupt 2 Pin Select + 8 + 2 + read-write + + + PIN0 + Pin 0 + 0x00000000 + + + PIN1 + Pin 1 + 0x00000001 + + + PIN2 + Pin 2 + 0x00000002 + + + PIN3 + Pin 3 + 0x00000003 + + + + + EXTIPINSEL3 + External Interrupt 3 Pin Select + 12 + 2 + read-write + + + PIN0 + Pin 0 + 0x00000000 + + + PIN1 + Pin 1 + 0x00000001 + + + PIN2 + Pin 2 + 0x00000002 + + + PIN3 + Pin 3 + 0x00000003 + + + + + EXTIPINSEL4 + External Interrupt 4 Pin Select + 16 + 2 + read-write + + + PIN4 + Pin 4 + 0x00000000 + + + PIN5 + Pin 5 + 0x00000001 + + + PIN6 + Pin 6 + 0x00000002 + + + PIN7 + Pin 7 + 0x00000003 + + + + + EXTIPINSEL5 + External Interrupt 5 Pin Select + 20 + 2 + read-write + + + PIN4 + Pin 4 + 0x00000000 + + + PIN5 + Pin 5 + 0x00000001 + + + PIN6 + Pin 6 + 0x00000002 + + + PIN7 + Pin 7 + 0x00000003 + + + + + EXTIPINSEL6 + External Interrupt 6 Pin Select + 24 + 2 + read-write + + + PIN4 + Pin 4 + 0x00000000 + + + PIN5 + Pin 5 + 0x00000001 + + + PIN6 + Pin 6 + 0x00000002 + + + PIN7 + Pin 7 + 0x00000003 + + + + + EXTIPINSEL7 + External Interrupt 7 Pin Select + 28 + 2 + read-write + + + PIN4 + Pin 4 + 0x00000000 + + + PIN5 + Pin 5 + 0x00000001 + + + PIN6 + Pin 6 + 0x00000002 + + + PIN7 + Pin 7 + 0x00000003 + + + + + + + EXTIPINSELH + External Interrupt Pin Select High Register + 0x40C + 32 + read-write + 0x32103210 + 0x33333333 + + + EXTIPINSEL8 + External Interrupt 8 Pin Select + 0 + 2 + read-write + + + PIN8 + Pin 8 + 0x00000000 + + + PIN9 + Pin 9 + 0x00000001 + + + PIN10 + Pin 10 + 0x00000002 + + + PIN11 + Pin 11 + 0x00000003 + + + + + EXTIPINSEL9 + External Interrupt 9 Pin Select + 4 + 2 + read-write + + + PIN8 + Pin 8 + 0x00000000 + + + PIN9 + Pin 9 + 0x00000001 + + + PIN10 + Pin 10 + 0x00000002 + + + PIN11 + Pin 11 + 0x00000003 + + + + + EXTIPINSEL10 + External Interrupt 10 Pin Select + 8 + 2 + read-write + + + PIN8 + Pin 8 + 0x00000000 + + + PIN9 + Pin 9 + 0x00000001 + + + PIN10 + Pin 10 + 0x00000002 + + + PIN11 + Pin 11 + 0x00000003 + + + + + EXTIPINSEL11 + External Interrupt 11 Pin Select + 12 + 2 + read-write + + + PIN8 + Pin 8 + 0x00000000 + + + PIN9 + Pin 9 + 0x00000001 + + + PIN10 + Pin 10 + 0x00000002 + + + PIN11 + Pin 11 + 0x00000003 + + + + + EXTIPINSEL12 + External Interrupt 12 Pin Select + 16 + 2 + read-write + + + PIN12 + Pin 12 + 0x00000000 + + + PIN13 + Pin 13 + 0x00000001 + + + PIN14 + Pin 14 + 0x00000002 + + + PIN15 + Pin 15 + 0x00000003 + + + + + EXTIPINSEL13 + External Interrupt 13 Pin Select + 20 + 2 + read-write + + + PIN12 + Pin 12 + 0x00000000 + + + PIN13 + Pin 13 + 0x00000001 + + + PIN14 + Pin 14 + 0x00000002 + + + PIN15 + Pin 15 + 0x00000003 + + + + + EXTIPINSEL14 + External Interrupt 14 Pin Select + 24 + 2 + read-write + + + PIN12 + Pin 12 + 0x00000000 + + + PIN13 + Pin 13 + 0x00000001 + + + PIN14 + Pin 14 + 0x00000002 + + + PIN15 + Pin 15 + 0x00000003 + + + + + EXTIPINSEL15 + External Interrupt 15 Pin Select + 28 + 2 + read-write + + + PIN12 + Pin 12 + 0x00000000 + + + PIN13 + Pin 13 + 0x00000001 + + + PIN14 + Pin 14 + 0x00000002 + + + PIN15 + Pin 15 + 0x00000003 + + + + + + + EXTIRISE + External Interrupt Rising Edge Trigger Register + 0x410 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + EXTIRISE + External Interrupt n Rising Edge Trigger Enable + 0 + 16 + read-write + + + + + EXTIFALL + External Interrupt Falling Edge Trigger Register + 0x414 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + EXTIFALL + External Interrupt n Falling Edge Trigger Enable + 0 + 16 + read-write + + + + + EXTILEVEL + External Interrupt Level Register + 0x418 + 32 + read-write + 0x00000000 + 0x13130000 + + + EM4WU0 + EM4 Wake Up Level for EM4WU0 Pin + 16 + 1 + read-write + + + EM4WU1 + EM4 Wake Up Level for EM4WU1 Pin + 17 + 1 + read-write + + + EM4WU4 + EM4 Wake Up Level for EM4WU4 Pin + 20 + 1 + read-write + + + EM4WU8 + EM4 Wake Up Level for EM4WU8 Pin + 24 + 1 + read-write + + + EM4WU9 + EM4 Wake Up Level for EM4WU9 Pin + 25 + 1 + read-write + + + EM4WU12 + EM4 Wake Up Level for EM4WU12 Pin + 28 + 1 + read-write + + + + + IF + Interrupt Flag Register + 0x41C + 32 + read-only + 0x00000000 + 0xFFFFFFFF + + + EXT + External Pin Interrupt Flag + 0 + 16 + read-only + + + EM4WU + EM4 wake up Pin Interrupt Flag + 16 + 16 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x420 + 32 + write-only + 0x00000000 + 0xFFFFFFFF + + + EXT + Set EXT Interrupt Flag + 0 + 16 + write-only + + + EM4WU + Set EM4WU Interrupt Flag + 16 + 16 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x424 + 32 + write-only + 0x00000000 + 0xFFFFFFFF + + + EXT + Clear EXT Interrupt Flag + 0 + 16 + write-only + + + EM4WU + Clear EM4WU Interrupt Flag + 16 + 16 + write-only + + + + + IEN + Interrupt Enable Register + 0x428 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + EXT + EXT Interrupt Enable + 0 + 16 + read-write + + + EM4WU + EM4WU Interrupt Enable + 16 + 16 + read-write + + + + + EM4WUEN + EM4 wake up Enable Register + 0x42C + 32 + read-write + 0x00000000 + 0xFFFF0000 + + + EM4WUEN + EM4 wake up enable + 16 + 16 + read-write + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x440 + 32 + read-write + 0x0000000F + 0x0000001F + + + SWCLKTCKPEN + Serial Wire Clock and JTAG Test Clock Pin Enable + 0 + 1 + read-write + + + SWDIOTMSPEN + Serial Wire Data and JTAG Test Mode Select Pin Enable + 1 + 1 + read-write + + + TDOPEN + JTAG Test Debug Output Pin Enable + 2 + 1 + read-write + + + TDIPEN + JTAG Test Debug Input Pin Enable + 3 + 1 + read-write + + + SWVPEN + Serial Wire Viewer Output Pin Enable + 4 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x444 + 32 + read-write + 0x00000000 + 0x0000003F + + + SWVLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + + + + + INSENSE + Input Sense Register + 0x450 + 32 + read-write + 0x00000003 + 0x00000003 + + + INT + Interrupt Sense Enable + 0 + 1 + read-write + + + EM4WU + EM4WU Interrupt Sense Enable + 1 + 1 + read-write + + + + + LOCK + Configuration Lock Register + 0x454 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + Configuration Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + + + PRS + 1.6 + PRS + 0x400E6000 + + 0 + 0x00000400 + registers + + + + SWPULSE + Software Pulse Register + 0x000 + 32 + write-only + 0x00000000 + 0x00000FFF + + + CH0PULSE + Channel 0 Pulse Generation + 0 + 1 + write-only + + + CH1PULSE + Channel 1 Pulse Generation + 1 + 1 + write-only + + + CH2PULSE + Channel 2 Pulse Generation + 2 + 1 + write-only + + + CH3PULSE + Channel 3 Pulse Generation + 3 + 1 + write-only + + + CH4PULSE + Channel 4 Pulse Generation + 4 + 1 + write-only + + + CH5PULSE + Channel 5 Pulse Generation + 5 + 1 + write-only + + + CH6PULSE + Channel 6 Pulse Generation + 6 + 1 + write-only + + + CH7PULSE + Channel 7 Pulse Generation + 7 + 1 + write-only + + + CH8PULSE + Channel 8 Pulse Generation + 8 + 1 + write-only + + + CH9PULSE + Channel 9 Pulse Generation + 9 + 1 + write-only + + + CH10PULSE + Channel 10 Pulse Generation + 10 + 1 + write-only + + + CH11PULSE + Channel 11 Pulse Generation + 11 + 1 + write-only + + + + + SWLEVEL + Software Level Register + 0x004 + 32 + read-write + 0x00000000 + 0x00000FFF + + + CH0LEVEL + Channel 0 Software Level + 0 + 1 + read-write + + + CH1LEVEL + Channel 1 Software Level + 1 + 1 + read-write + + + CH2LEVEL + Channel 2 Software Level + 2 + 1 + read-write + + + CH3LEVEL + Channel 3 Software Level + 3 + 1 + read-write + + + CH4LEVEL + Channel 4 Software Level + 4 + 1 + read-write + + + CH5LEVEL + Channel 5 Software Level + 5 + 1 + read-write + + + CH6LEVEL + Channel 6 Software Level + 6 + 1 + read-write + + + CH7LEVEL + Channel 7 Software Level + 7 + 1 + read-write + + + CH8LEVEL + Channel 8 Software Level + 8 + 1 + read-write + + + CH9LEVEL + Channel 9 Software Level + 9 + 1 + read-write + + + CH10LEVEL + Channel 10 Software Level + 10 + 1 + read-write + + + CH11LEVEL + Channel 11 Software Level + 11 + 1 + read-write + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x008 + 32 + read-write + 0x00000000 + 0x00000FFF + + + CH0PEN + CH0 Pin Enable + 0 + 1 + read-write + + + CH1PEN + CH1 Pin Enable + 1 + 1 + read-write + + + CH2PEN + CH2 Pin Enable + 2 + 1 + read-write + + + CH3PEN + CH3 Pin Enable + 3 + 1 + read-write + + + CH4PEN + CH4 Pin Enable + 4 + 1 + read-write + + + CH5PEN + CH5 Pin Enable + 5 + 1 + read-write + + + CH6PEN + CH6 Pin Enable + 6 + 1 + read-write + + + CH7PEN + CH7 Pin Enable + 7 + 1 + read-write + + + CH8PEN + CH8 Pin Enable + 8 + 1 + read-write + + + CH9PEN + CH9 Pin Enable + 9 + 1 + read-write + + + CH10PEN + CH10 Pin Enable + 10 + 1 + read-write + + + CH11PEN + CH11 Pin Enable + 11 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x010 + 32 + read-write + 0x00000000 + 0x3F3F3F3F + + + CH0LOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + + + CH1LOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + + + CH2LOC + I/O Location + 16 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + + + CH3LOC + I/O Location + 24 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + + + + + ROUTELOC1 + I/O Routing Location Register + 0x014 + 32 + read-write + 0x00000000 + 0x3F3F3F3F + + + CH4LOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + + + CH5LOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + + + CH6LOC + I/O Location + 16 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + + + CH7LOC + I/O Location + 24 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + + + + + ROUTELOC2 + I/O Routing Location Register + 0x018 + 32 + read-write + 0x00000000 + 0x3F3F3F3F + + + CH8LOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + + + CH9LOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + + + CH10LOC + I/O Location + 16 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + + + CH11LOC + I/O Location + 24 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + + + + + CTRL + Control Register + 0x020 + 32 + read-write + 0x00000000 + 0x0000001F + + + SEVONPRS + Set Event on PRS + 0 + 1 + read-write + + + SEVONPRSSEL + SEVONPRS PRS Channel Select + 1 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + + + DMAREQ0 + DMA Request 0 Register + 0x024 + 32 + read-write + 0x00000000 + 0x000003C0 + + + PRSSEL + DMA Request 0 PRS Channel Select + 6 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + + + DMAREQ1 + DMA Request 1 Register + 0x028 + 32 + read-write + 0x00000000 + 0x000003C0 + + + PRSSEL + DMA Request 1 PRS Channel Select + 6 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + + + PEEK + PRS Channel Values + 0x030 + 32 + read-only + 0x00000000 + 0x00000FFF + + + CH0VAL + Channel 0 Current Value + 0 + 1 + read-only + + + CH1VAL + Channel 1 Current Value + 1 + 1 + read-only + + + CH2VAL + Channel 2 Current Value + 2 + 1 + read-only + + + CH3VAL + Channel 3 Current Value + 3 + 1 + read-only + + + CH4VAL + Channel 4 Current Value + 4 + 1 + read-only + + + CH5VAL + Channel 5 Current Value + 5 + 1 + read-only + + + CH6VAL + Channel 6 Current Value + 6 + 1 + read-only + + + CH7VAL + Channel 7 Current Value + 7 + 1 + read-only + + + CH8VAL + Channel 8 Current Value + 8 + 1 + read-only + + + CH9VAL + Channel 9 Current Value + 9 + 1 + read-only + + + CH10VAL + Channel 10 Current Value + 10 + 1 + read-only + + + CH11VAL + Channel 11 Current Value + 11 + 1 + read-only + + + + + CH0_CTRL + Channel Control Register + 0x040 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH1_CTRL + Channel Control Register + 0x044 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH2_CTRL + Channel Control Register + 0x048 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH3_CTRL + Channel Control Register + 0x04C + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH4_CTRL + Channel Control Register + 0x050 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH5_CTRL + Channel Control Register + 0x054 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH6_CTRL + Channel Control Register + 0x058 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH7_CTRL + Channel Control Register + 0x05C + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH8_CTRL + Channel Control Register + 0x060 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH9_CTRL + Channel Control Register + 0x064 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH10_CTRL + Channel Control Register + 0x068 + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + CH11_CTRL + Channel Control Register + 0x06C + 32 + read-write + 0x00000000 + 0x5E307F07 + + + SIGSEL + Signal Select + 0 + 3 + read-write + + + SOURCESEL + Source Select + 8 + 7 + read-write + + + NONE + No source selected + 0x00000000 + + + PRSL + Peripheral Reflex System + 0x00000001 + + + PRSH + Peripheral Reflex System + 0x00000002 + + + ACMP0 + Analog Comparator 0 + 0x00000006 + + + ACMP1 + Analog Comparator 1 + 0x00000007 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x00000010 + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x00000011 + + + TIMER0 + Timer 0 + 0x0000001C + + + TIMER1 + Timer 1 + 0x0000001D + + + RTCC + Real-Time Counter and Calendar + 0x00000029 + + + GPIOL + General purpose Input/Output + 0x00000030 + + + GPIOH + General purpose Input/Output + 0x00000031 + + + LETIMER0 + Low Energy Timer 0 + 0x00000034 + + + PCNT0 + Pulse Counter 0 + 0x00000036 + + + CRYOTIMER + CryoTimer + 0x0000003C + + + CMU + Clock Management Unit + 0x0000003D + + + + + EDSEL + Edge Detect Select + 20 + 2 + read-write + + + OFF + Signal is left as it is + 0x00000000 + + + POSEDGE + A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal + 0x00000001 + + + NEGEDGE + A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal + 0x00000002 + + + BOTHEDGES + A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal + 0x00000003 + + + + + STRETCH + Stretch Channel Output + 25 + 1 + read-write + + + INV + Invert Channel + 26 + 1 + read-write + + + ORPREV + Or Previous + 27 + 1 + read-write + + + ANDNEXT + And Next + 28 + 1 + read-write + + + ASYNC + Asynchronous reflex + 30 + 1 + read-write + + + + + + + LDMA + 1.6 + LDMA + 0x400E2000 + + 0 + 0x00001000 + registers + + + LDMA + 8 + + + + CTRL + DMA Control Register + 0x000 + 32 + read-write + 0x07000000 + 0x0700FFFF + + + SYNCPRSSETEN + Synchronization PRS Set Enable + 0 + 8 + read-write + + + SYNCPRSCLREN + Synchronization PRS Clear Enable + 8 + 8 + read-write + + + NUMFIXED + Number of Fixed Priority Channels + 24 + 3 + read-write + + + + + STATUS + DMA Status Register + 0x004 + 32 + read-only + 0x08100000 + 0x1F1F073B + + + ANYBUSY + Any DMA Channel Busy + 0 + 1 + read-only + + + ANYREQ + Any DMA Channel Request Pending + 1 + 1 + read-only + + + CHGRANT + Granted Channel Number + 3 + 3 + read-only + + + CHERROR + Errant Channel Number + 8 + 3 + read-only + + + FIFOLEVEL + FIFO Level + 16 + 5 + read-only + + + CHNUM + Number of Channels + 24 + 5 + read-only + + + + + SYNC + DMA Synchronization Trigger Register (Single-Cycle RMW) + 0x008 + 32 + read-write + 0x00000000 + 0x000000FF + + + SYNCTRIG + Synchronization Trigger + 0 + 8 + read-write + + + + + CHEN + DMA Channel Enable Register (Single-Cycle RMW) + 0x020 + 32 + read-write + 0x00000000 + 0x000000FF + + + CHEN + Channel Enables + 0 + 8 + read-write + + + + + CHBUSY + DMA Channel Busy Register + 0x024 + 32 + read-only + 0x00000000 + 0x000000FF + + + BUSY + Channels Busy + 0 + 8 + read-only + + + + + CHDONE + DMA Channel Linking Done Register (Single-Cycle RMW) + 0x028 + 32 + read-write + 0x00000000 + 0x000000FF + + + CHDONE + DMA Channel Linking or Done + 0 + 8 + read-write + + + + + DBGHALT + DMA Channel Debug Halt Register + 0x02C + 32 + read-write + 0x00000000 + 0x000000FF + + + DBGHALT + DMA Debug Halt + 0 + 8 + read-write + + + + + SWREQ + DMA Channel Software Transfer Request Register + 0x030 + 32 + write-only + 0x00000000 + 0x000000FF + + + SWREQ + Software Transfer Requests + 0 + 8 + write-only + + + + + REQDIS + DMA Channel Request Disable Register + 0x034 + 32 + read-write + 0x00000000 + 0x000000FF + + + REQDIS + DMA Request Disables + 0 + 8 + read-write + + + + + REQPEND + DMA Channel Requests Pending Register + 0x038 + 32 + read-only + 0x00000000 + 0x000000FF + + + REQPEND + DMA Requests Pending + 0 + 8 + read-only + + + + + LINKLOAD + DMA Channel Link Load Register + 0x03C + 32 + write-only + 0x00000000 + 0x000000FF + + + LINKLOAD + DMA Link Loads + 0 + 8 + write-only + + + + + REQCLEAR + DMA Channel Request Clear Register + 0x040 + 32 + write-only + 0x00000000 + 0x000000FF + + + REQCLEAR + DMA Request Clear + 0 + 8 + write-only + + + + + IF + Interrupt Flag Register + 0x060 + 32 + read-only + 0x00000000 + 0x800000FF + + + DONE + DMA Structure Operation Done Interrupt Flag + 0 + 8 + read-only + + + ERROR + Transfer Error Interrupt Flag + 31 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x064 + 32 + write-only + 0x00000000 + 0x800000FF + + + DONE + Set DONE Interrupt Flag + 0 + 8 + write-only + + + ERROR + Set ERROR Interrupt Flag + 31 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x068 + 32 + write-only + 0x00000000 + 0x800000FF + + + DONE + Clear DONE Interrupt Flag + 0 + 8 + write-only + + + ERROR + Clear ERROR Interrupt Flag + 31 + 1 + write-only + + + + + IEN + Interrupt Enable register + 0x06C + 32 + read-write + 0x00000000 + 0x800000FF + + + DONE + DONE Interrupt Enable + 0 + 8 + read-write + + + ERROR + ERROR Interrupt Enable + 31 + 1 + read-write + + + + + CH0_REQSEL + Channel Peripheral Request Select Register + 0x080 + 32 + read-write + 0x00000000 + 0x003F000F + + + SIGSEL + Signal Select + 0 + 4 + read-write + + + SOURCESEL + Source Select + 16 + 6 + read-write + + + NONE + No source selected + 0x00000000 + + + PRS + Peripheral Reflex System + 0x00000001 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x0000000C + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x0000000D + + + LEUART0 + Low Energy UART 0 + 0x00000010 + + + I2C0 + I2C 0 + 0x00000014 + + + TIMER0 + Timer 0 + 0x00000018 + + + TIMER1 + Timer 1 + 0x00000019 + + + MSC + "" + 0x00000030 + + + CRYPTO + Advanced Encryption Standard Accelerator + 0x00000031 + + + + + + + CH0_CFG + Channel Configuration Register + 0x084 + 32 + read-write + 0x00000000 + 0x00330000 + + + ARBSLOTS + Arbitration Slot Number Select + 16 + 2 + read-write + + + ONE + One arbitration slot selected + 0x00000000 + + + TWO + Two arbitration slots selected + 0x00000001 + + + FOUR + Four arbitration slots selected + 0x00000002 + + + EIGHT + Eight arbitration slots selected + 0x00000003 + + + + + SRCINCSIGN + Source Address Increment Sign + 20 + 1 + read-write + + + DSTINCSIGN + Destination Address Increment Sign + 21 + 1 + read-write + + + + + CH0_LOOP + Channel Loop Counter Register + 0x088 + 32 + read-write + 0x00000000 + 0x000000FF + + + LOOPCNT + Linked Structure Sequence Loop Counter + 0 + 8 + read-write + + + + + CH0_CTRL + Channel Descriptor Control Word Register + 0x08C + 32 + read-write + 0x00000000 + 0xFFFFFFFB + + + STRUCTTYPE + DMA Structure Type + 0 + 2 + read-only + + + TRANSFER + DMA transfer structure type selected. + 0x00000000 + + + SYNCHRONIZE + Synchronization structure type selected. + 0x00000001 + + + WRITE + Write immediate value structure type selected. + 0x00000002 + + + + + STRUCTREQ + Structure DMA Transfer Request + 3 + 1 + write-only + + + XFERCNT + DMA Unit Data Transfer Count + 4 + 11 + read-write + + + BYTESWAP + Endian Byte Swap + 15 + 1 + read-write + + + BLOCKSIZE + Block Transfer Size + 16 + 4 + read-write + + + UNIT1 + One unit transfer per arbitration + 0x00000000 + + + UNIT2 + Two unit transfers per arbitration + 0x00000001 + + + UNIT3 + Three unit transfers per arbitration + 0x00000002 + + + UNIT4 + Four unit transfers per arbitration + 0x00000003 + + + UNIT6 + Six unit transfers per arbitration + 0x00000004 + + + UNIT8 + Eight unit transfers per arbitration + 0x00000005 + + + UNIT16 + Sixteen unit transfers per arbitration + 0x00000007 + + + UNIT32 + 32 unit transfers per arbitration + 0x00000009 + + + UNIT64 + 64 unit transfers per arbitration + 0x0000000A + + + UNIT128 + 128 unit transfers per arbitration + 0x0000000B + + + UNIT256 + 256 unit transfers per arbitration + 0x0000000C + + + UNIT512 + 512 unit transfers per arbitration + 0x0000000D + + + UNIT1024 + 1024 unit transfers per arbitration + 0x0000000E + + + ALL + Transfer all units as specified by the XFRCNT field + 0x0000000F + + + + + DONEIFSEN + DMA Operation Done Interrupt Flag Set Enable + 20 + 1 + read-write + + + REQMODE + DMA Request Transfer Mode Select + 21 + 1 + read-write + + + DECLOOPCNT + Decrement Loop Count + 22 + 1 + read-write + + + IGNORESREQ + Ignore Sreq + 23 + 1 + read-write + + + SRCINC + Source Address Increment Size + 24 + 2 + read-write + + + ONE + Increment source address by one unit data size after each read + 0x00000000 + + + TWO + Increment source address by two unit data sizes after each read + 0x00000001 + + + FOUR + Increment source address by four unit data sizes after each read + 0x00000002 + + + NONE + Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. + 0x00000003 + + + + + SIZE + Unit Data Transfer Size + 26 + 2 + read-write + + + BYTE + Each unit transfer is a byte + 0x00000000 + + + HALFWORD + Each unit transfer is a half-word + 0x00000001 + + + WORD + Each unit transfer is a word + 0x00000002 + + + + + DSTINC + Destination Address Increment Size + 28 + 2 + read-write + + + ONE + Increment destination address by one unit data size after each write + 0x00000000 + + + TWO + Increment destination address by two unit data sizes after each write + 0x00000001 + + + FOUR + Increment destination address by four unit data sizes after each write + 0x00000002 + + + NONE + Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. + 0x00000003 + + + + + SRCMODE + Source Addressing Mode + 30 + 1 + read-only + + + DSTMODE + Destination Addressing Mode + 31 + 1 + read-only + + + + + CH0_SRC + Channel Descriptor Source Data Address Register + 0x090 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SRCADDR + Source Data Address + 0 + 32 + read-write + + + + + CH0_DST + Channel Descriptor Destination Data Address Register + 0x094 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + DSTADDR + Destination Data Address + 0 + 32 + read-write + + + + + CH0_LINK + Channel Descriptor Link Structure Address Register + 0x098 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + LINKMODE + Link Structure Addressing Mode + 0 + 1 + read-only + + + LINK + Link Next Structure + 1 + 1 + read-write + + + LINKADDR + Link Structure Address + 2 + 30 + read-write + + + + + CH1_REQSEL + Channel Peripheral Request Select Register + 0x0B0 + 32 + read-write + 0x00000000 + 0x003F000F + + + SIGSEL + Signal Select + 0 + 4 + read-write + + + SOURCESEL + Source Select + 16 + 6 + read-write + + + NONE + No source selected + 0x00000000 + + + PRS + Peripheral Reflex System + 0x00000001 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x0000000C + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x0000000D + + + LEUART0 + Low Energy UART 0 + 0x00000010 + + + I2C0 + I2C 0 + 0x00000014 + + + TIMER0 + Timer 0 + 0x00000018 + + + TIMER1 + Timer 1 + 0x00000019 + + + MSC + "" + 0x00000030 + + + CRYPTO + Advanced Encryption Standard Accelerator + 0x00000031 + + + + + + + CH1_CFG + Channel Configuration Register + 0x0B4 + 32 + read-write + 0x00000000 + 0x00330000 + + + ARBSLOTS + Arbitration Slot Number Select + 16 + 2 + read-write + + + ONE + One arbitration slot selected + 0x00000000 + + + TWO + Two arbitration slots selected + 0x00000001 + + + FOUR + Four arbitration slots selected + 0x00000002 + + + EIGHT + Eight arbitration slots selected + 0x00000003 + + + + + SRCINCSIGN + Source Address Increment Sign + 20 + 1 + read-write + + + DSTINCSIGN + Destination Address Increment Sign + 21 + 1 + read-write + + + + + CH1_LOOP + Channel Loop Counter Register + 0x0B8 + 32 + read-write + 0x00000000 + 0x000000FF + + + LOOPCNT + Linked Structure Sequence Loop Counter + 0 + 8 + read-write + + + + + CH1_CTRL + Channel Descriptor Control Word Register + 0x0BC + 32 + read-write + 0x00000000 + 0xFFFFFFFB + + + STRUCTTYPE + DMA Structure Type + 0 + 2 + read-only + + + TRANSFER + DMA transfer structure type selected. + 0x00000000 + + + SYNCHRONIZE + Synchronization structure type selected. + 0x00000001 + + + WRITE + Write immediate value structure type selected. + 0x00000002 + + + + + STRUCTREQ + Structure DMA Transfer Request + 3 + 1 + write-only + + + XFERCNT + DMA Unit Data Transfer Count + 4 + 11 + read-write + + + BYTESWAP + Endian Byte Swap + 15 + 1 + read-write + + + BLOCKSIZE + Block Transfer Size + 16 + 4 + read-write + + + UNIT1 + One unit transfer per arbitration + 0x00000000 + + + UNIT2 + Two unit transfers per arbitration + 0x00000001 + + + UNIT3 + Three unit transfers per arbitration + 0x00000002 + + + UNIT4 + Four unit transfers per arbitration + 0x00000003 + + + UNIT6 + Six unit transfers per arbitration + 0x00000004 + + + UNIT8 + Eight unit transfers per arbitration + 0x00000005 + + + UNIT16 + Sixteen unit transfers per arbitration + 0x00000007 + + + UNIT32 + 32 unit transfers per arbitration + 0x00000009 + + + UNIT64 + 64 unit transfers per arbitration + 0x0000000A + + + UNIT128 + 128 unit transfers per arbitration + 0x0000000B + + + UNIT256 + 256 unit transfers per arbitration + 0x0000000C + + + UNIT512 + 512 unit transfers per arbitration + 0x0000000D + + + UNIT1024 + 1024 unit transfers per arbitration + 0x0000000E + + + ALL + Transfer all units as specified by the XFRCNT field + 0x0000000F + + + + + DONEIFSEN + DMA Operation Done Interrupt Flag Set Enable + 20 + 1 + read-write + + + REQMODE + DMA Request Transfer Mode Select + 21 + 1 + read-write + + + DECLOOPCNT + Decrement Loop Count + 22 + 1 + read-write + + + IGNORESREQ + Ignore Sreq + 23 + 1 + read-write + + + SRCINC + Source Address Increment Size + 24 + 2 + read-write + + + ONE + Increment source address by one unit data size after each read + 0x00000000 + + + TWO + Increment source address by two unit data sizes after each read + 0x00000001 + + + FOUR + Increment source address by four unit data sizes after each read + 0x00000002 + + + NONE + Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. + 0x00000003 + + + + + SIZE + Unit Data Transfer Size + 26 + 2 + read-write + + + BYTE + Each unit transfer is a byte + 0x00000000 + + + HALFWORD + Each unit transfer is a half-word + 0x00000001 + + + WORD + Each unit transfer is a word + 0x00000002 + + + + + DSTINC + Destination Address Increment Size + 28 + 2 + read-write + + + ONE + Increment destination address by one unit data size after each write + 0x00000000 + + + TWO + Increment destination address by two unit data sizes after each write + 0x00000001 + + + FOUR + Increment destination address by four unit data sizes after each write + 0x00000002 + + + NONE + Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. + 0x00000003 + + + + + SRCMODE + Source Addressing Mode + 30 + 1 + read-only + + + DSTMODE + Destination Addressing Mode + 31 + 1 + read-only + + + + + CH1_SRC + Channel Descriptor Source Data Address Register + 0x0C0 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SRCADDR + Source Data Address + 0 + 32 + read-write + + + + + CH1_DST + Channel Descriptor Destination Data Address Register + 0x0C4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + DSTADDR + Destination Data Address + 0 + 32 + read-write + + + + + CH1_LINK + Channel Descriptor Link Structure Address Register + 0x0C8 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + LINKMODE + Link Structure Addressing Mode + 0 + 1 + read-only + + + LINK + Link Next Structure + 1 + 1 + read-write + + + LINKADDR + Link Structure Address + 2 + 30 + read-write + + + + + CH2_REQSEL + Channel Peripheral Request Select Register + 0x0E0 + 32 + read-write + 0x00000000 + 0x003F000F + + + SIGSEL + Signal Select + 0 + 4 + read-write + + + SOURCESEL + Source Select + 16 + 6 + read-write + + + NONE + No source selected + 0x00000000 + + + PRS + Peripheral Reflex System + 0x00000001 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x0000000C + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x0000000D + + + LEUART0 + Low Energy UART 0 + 0x00000010 + + + I2C0 + I2C 0 + 0x00000014 + + + TIMER0 + Timer 0 + 0x00000018 + + + TIMER1 + Timer 1 + 0x00000019 + + + MSC + "" + 0x00000030 + + + CRYPTO + Advanced Encryption Standard Accelerator + 0x00000031 + + + + + + + CH2_CFG + Channel Configuration Register + 0x0E4 + 32 + read-write + 0x00000000 + 0x00330000 + + + ARBSLOTS + Arbitration Slot Number Select + 16 + 2 + read-write + + + ONE + One arbitration slot selected + 0x00000000 + + + TWO + Two arbitration slots selected + 0x00000001 + + + FOUR + Four arbitration slots selected + 0x00000002 + + + EIGHT + Eight arbitration slots selected + 0x00000003 + + + + + SRCINCSIGN + Source Address Increment Sign + 20 + 1 + read-write + + + DSTINCSIGN + Destination Address Increment Sign + 21 + 1 + read-write + + + + + CH2_LOOP + Channel Loop Counter Register + 0x0E8 + 32 + read-write + 0x00000000 + 0x000000FF + + + LOOPCNT + Linked Structure Sequence Loop Counter + 0 + 8 + read-write + + + + + CH2_CTRL + Channel Descriptor Control Word Register + 0x0EC + 32 + read-write + 0x00000000 + 0xFFFFFFFB + + + STRUCTTYPE + DMA Structure Type + 0 + 2 + read-only + + + TRANSFER + DMA transfer structure type selected. + 0x00000000 + + + SYNCHRONIZE + Synchronization structure type selected. + 0x00000001 + + + WRITE + Write immediate value structure type selected. + 0x00000002 + + + + + STRUCTREQ + Structure DMA Transfer Request + 3 + 1 + write-only + + + XFERCNT + DMA Unit Data Transfer Count + 4 + 11 + read-write + + + BYTESWAP + Endian Byte Swap + 15 + 1 + read-write + + + BLOCKSIZE + Block Transfer Size + 16 + 4 + read-write + + + UNIT1 + One unit transfer per arbitration + 0x00000000 + + + UNIT2 + Two unit transfers per arbitration + 0x00000001 + + + UNIT3 + Three unit transfers per arbitration + 0x00000002 + + + UNIT4 + Four unit transfers per arbitration + 0x00000003 + + + UNIT6 + Six unit transfers per arbitration + 0x00000004 + + + UNIT8 + Eight unit transfers per arbitration + 0x00000005 + + + UNIT16 + Sixteen unit transfers per arbitration + 0x00000007 + + + UNIT32 + 32 unit transfers per arbitration + 0x00000009 + + + UNIT64 + 64 unit transfers per arbitration + 0x0000000A + + + UNIT128 + 128 unit transfers per arbitration + 0x0000000B + + + UNIT256 + 256 unit transfers per arbitration + 0x0000000C + + + UNIT512 + 512 unit transfers per arbitration + 0x0000000D + + + UNIT1024 + 1024 unit transfers per arbitration + 0x0000000E + + + ALL + Transfer all units as specified by the XFRCNT field + 0x0000000F + + + + + DONEIFSEN + DMA Operation Done Interrupt Flag Set Enable + 20 + 1 + read-write + + + REQMODE + DMA Request Transfer Mode Select + 21 + 1 + read-write + + + DECLOOPCNT + Decrement Loop Count + 22 + 1 + read-write + + + IGNORESREQ + Ignore Sreq + 23 + 1 + read-write + + + SRCINC + Source Address Increment Size + 24 + 2 + read-write + + + ONE + Increment source address by one unit data size after each read + 0x00000000 + + + TWO + Increment source address by two unit data sizes after each read + 0x00000001 + + + FOUR + Increment source address by four unit data sizes after each read + 0x00000002 + + + NONE + Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. + 0x00000003 + + + + + SIZE + Unit Data Transfer Size + 26 + 2 + read-write + + + BYTE + Each unit transfer is a byte + 0x00000000 + + + HALFWORD + Each unit transfer is a half-word + 0x00000001 + + + WORD + Each unit transfer is a word + 0x00000002 + + + + + DSTINC + Destination Address Increment Size + 28 + 2 + read-write + + + ONE + Increment destination address by one unit data size after each write + 0x00000000 + + + TWO + Increment destination address by two unit data sizes after each write + 0x00000001 + + + FOUR + Increment destination address by four unit data sizes after each write + 0x00000002 + + + NONE + Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. + 0x00000003 + + + + + SRCMODE + Source Addressing Mode + 30 + 1 + read-only + + + DSTMODE + Destination Addressing Mode + 31 + 1 + read-only + + + + + CH2_SRC + Channel Descriptor Source Data Address Register + 0x0F0 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SRCADDR + Source Data Address + 0 + 32 + read-write + + + + + CH2_DST + Channel Descriptor Destination Data Address Register + 0x0F4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + DSTADDR + Destination Data Address + 0 + 32 + read-write + + + + + CH2_LINK + Channel Descriptor Link Structure Address Register + 0x0F8 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + LINKMODE + Link Structure Addressing Mode + 0 + 1 + read-only + + + LINK + Link Next Structure + 1 + 1 + read-write + + + LINKADDR + Link Structure Address + 2 + 30 + read-write + + + + + CH3_REQSEL + Channel Peripheral Request Select Register + 0x110 + 32 + read-write + 0x00000000 + 0x003F000F + + + SIGSEL + Signal Select + 0 + 4 + read-write + + + SOURCESEL + Source Select + 16 + 6 + read-write + + + NONE + No source selected + 0x00000000 + + + PRS + Peripheral Reflex System + 0x00000001 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x0000000C + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x0000000D + + + LEUART0 + Low Energy UART 0 + 0x00000010 + + + I2C0 + I2C 0 + 0x00000014 + + + TIMER0 + Timer 0 + 0x00000018 + + + TIMER1 + Timer 1 + 0x00000019 + + + MSC + "" + 0x00000030 + + + CRYPTO + Advanced Encryption Standard Accelerator + 0x00000031 + + + + + + + CH3_CFG + Channel Configuration Register + 0x114 + 32 + read-write + 0x00000000 + 0x00330000 + + + ARBSLOTS + Arbitration Slot Number Select + 16 + 2 + read-write + + + ONE + One arbitration slot selected + 0x00000000 + + + TWO + Two arbitration slots selected + 0x00000001 + + + FOUR + Four arbitration slots selected + 0x00000002 + + + EIGHT + Eight arbitration slots selected + 0x00000003 + + + + + SRCINCSIGN + Source Address Increment Sign + 20 + 1 + read-write + + + DSTINCSIGN + Destination Address Increment Sign + 21 + 1 + read-write + + + + + CH3_LOOP + Channel Loop Counter Register + 0x118 + 32 + read-write + 0x00000000 + 0x000000FF + + + LOOPCNT + Linked Structure Sequence Loop Counter + 0 + 8 + read-write + + + + + CH3_CTRL + Channel Descriptor Control Word Register + 0x11C + 32 + read-write + 0x00000000 + 0xFFFFFFFB + + + STRUCTTYPE + DMA Structure Type + 0 + 2 + read-only + + + TRANSFER + DMA transfer structure type selected. + 0x00000000 + + + SYNCHRONIZE + Synchronization structure type selected. + 0x00000001 + + + WRITE + Write immediate value structure type selected. + 0x00000002 + + + + + STRUCTREQ + Structure DMA Transfer Request + 3 + 1 + write-only + + + XFERCNT + DMA Unit Data Transfer Count + 4 + 11 + read-write + + + BYTESWAP + Endian Byte Swap + 15 + 1 + read-write + + + BLOCKSIZE + Block Transfer Size + 16 + 4 + read-write + + + UNIT1 + One unit transfer per arbitration + 0x00000000 + + + UNIT2 + Two unit transfers per arbitration + 0x00000001 + + + UNIT3 + Three unit transfers per arbitration + 0x00000002 + + + UNIT4 + Four unit transfers per arbitration + 0x00000003 + + + UNIT6 + Six unit transfers per arbitration + 0x00000004 + + + UNIT8 + Eight unit transfers per arbitration + 0x00000005 + + + UNIT16 + Sixteen unit transfers per arbitration + 0x00000007 + + + UNIT32 + 32 unit transfers per arbitration + 0x00000009 + + + UNIT64 + 64 unit transfers per arbitration + 0x0000000A + + + UNIT128 + 128 unit transfers per arbitration + 0x0000000B + + + UNIT256 + 256 unit transfers per arbitration + 0x0000000C + + + UNIT512 + 512 unit transfers per arbitration + 0x0000000D + + + UNIT1024 + 1024 unit transfers per arbitration + 0x0000000E + + + ALL + Transfer all units as specified by the XFRCNT field + 0x0000000F + + + + + DONEIFSEN + DMA Operation Done Interrupt Flag Set Enable + 20 + 1 + read-write + + + REQMODE + DMA Request Transfer Mode Select + 21 + 1 + read-write + + + DECLOOPCNT + Decrement Loop Count + 22 + 1 + read-write + + + IGNORESREQ + Ignore Sreq + 23 + 1 + read-write + + + SRCINC + Source Address Increment Size + 24 + 2 + read-write + + + ONE + Increment source address by one unit data size after each read + 0x00000000 + + + TWO + Increment source address by two unit data sizes after each read + 0x00000001 + + + FOUR + Increment source address by four unit data sizes after each read + 0x00000002 + + + NONE + Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. + 0x00000003 + + + + + SIZE + Unit Data Transfer Size + 26 + 2 + read-write + + + BYTE + Each unit transfer is a byte + 0x00000000 + + + HALFWORD + Each unit transfer is a half-word + 0x00000001 + + + WORD + Each unit transfer is a word + 0x00000002 + + + + + DSTINC + Destination Address Increment Size + 28 + 2 + read-write + + + ONE + Increment destination address by one unit data size after each write + 0x00000000 + + + TWO + Increment destination address by two unit data sizes after each write + 0x00000001 + + + FOUR + Increment destination address by four unit data sizes after each write + 0x00000002 + + + NONE + Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. + 0x00000003 + + + + + SRCMODE + Source Addressing Mode + 30 + 1 + read-only + + + DSTMODE + Destination Addressing Mode + 31 + 1 + read-only + + + + + CH3_SRC + Channel Descriptor Source Data Address Register + 0x120 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SRCADDR + Source Data Address + 0 + 32 + read-write + + + + + CH3_DST + Channel Descriptor Destination Data Address Register + 0x124 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + DSTADDR + Destination Data Address + 0 + 32 + read-write + + + + + CH3_LINK + Channel Descriptor Link Structure Address Register + 0x128 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + LINKMODE + Link Structure Addressing Mode + 0 + 1 + read-only + + + LINK + Link Next Structure + 1 + 1 + read-write + + + LINKADDR + Link Structure Address + 2 + 30 + read-write + + + + + CH4_REQSEL + Channel Peripheral Request Select Register + 0x140 + 32 + read-write + 0x00000000 + 0x003F000F + + + SIGSEL + Signal Select + 0 + 4 + read-write + + + SOURCESEL + Source Select + 16 + 6 + read-write + + + NONE + No source selected + 0x00000000 + + + PRS + Peripheral Reflex System + 0x00000001 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x0000000C + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x0000000D + + + LEUART0 + Low Energy UART 0 + 0x00000010 + + + I2C0 + I2C 0 + 0x00000014 + + + TIMER0 + Timer 0 + 0x00000018 + + + TIMER1 + Timer 1 + 0x00000019 + + + MSC + "" + 0x00000030 + + + CRYPTO + Advanced Encryption Standard Accelerator + 0x00000031 + + + + + + + CH4_CFG + Channel Configuration Register + 0x144 + 32 + read-write + 0x00000000 + 0x00330000 + + + ARBSLOTS + Arbitration Slot Number Select + 16 + 2 + read-write + + + ONE + One arbitration slot selected + 0x00000000 + + + TWO + Two arbitration slots selected + 0x00000001 + + + FOUR + Four arbitration slots selected + 0x00000002 + + + EIGHT + Eight arbitration slots selected + 0x00000003 + + + + + SRCINCSIGN + Source Address Increment Sign + 20 + 1 + read-write + + + DSTINCSIGN + Destination Address Increment Sign + 21 + 1 + read-write + + + + + CH4_LOOP + Channel Loop Counter Register + 0x148 + 32 + read-write + 0x00000000 + 0x000000FF + + + LOOPCNT + Linked Structure Sequence Loop Counter + 0 + 8 + read-write + + + + + CH4_CTRL + Channel Descriptor Control Word Register + 0x14C + 32 + read-write + 0x00000000 + 0xFFFFFFFB + + + STRUCTTYPE + DMA Structure Type + 0 + 2 + read-only + + + TRANSFER + DMA transfer structure type selected. + 0x00000000 + + + SYNCHRONIZE + Synchronization structure type selected. + 0x00000001 + + + WRITE + Write immediate value structure type selected. + 0x00000002 + + + + + STRUCTREQ + Structure DMA Transfer Request + 3 + 1 + write-only + + + XFERCNT + DMA Unit Data Transfer Count + 4 + 11 + read-write + + + BYTESWAP + Endian Byte Swap + 15 + 1 + read-write + + + BLOCKSIZE + Block Transfer Size + 16 + 4 + read-write + + + UNIT1 + One unit transfer per arbitration + 0x00000000 + + + UNIT2 + Two unit transfers per arbitration + 0x00000001 + + + UNIT3 + Three unit transfers per arbitration + 0x00000002 + + + UNIT4 + Four unit transfers per arbitration + 0x00000003 + + + UNIT6 + Six unit transfers per arbitration + 0x00000004 + + + UNIT8 + Eight unit transfers per arbitration + 0x00000005 + + + UNIT16 + Sixteen unit transfers per arbitration + 0x00000007 + + + UNIT32 + 32 unit transfers per arbitration + 0x00000009 + + + UNIT64 + 64 unit transfers per arbitration + 0x0000000A + + + UNIT128 + 128 unit transfers per arbitration + 0x0000000B + + + UNIT256 + 256 unit transfers per arbitration + 0x0000000C + + + UNIT512 + 512 unit transfers per arbitration + 0x0000000D + + + UNIT1024 + 1024 unit transfers per arbitration + 0x0000000E + + + ALL + Transfer all units as specified by the XFRCNT field + 0x0000000F + + + + + DONEIFSEN + DMA Operation Done Interrupt Flag Set Enable + 20 + 1 + read-write + + + REQMODE + DMA Request Transfer Mode Select + 21 + 1 + read-write + + + DECLOOPCNT + Decrement Loop Count + 22 + 1 + read-write + + + IGNORESREQ + Ignore Sreq + 23 + 1 + read-write + + + SRCINC + Source Address Increment Size + 24 + 2 + read-write + + + ONE + Increment source address by one unit data size after each read + 0x00000000 + + + TWO + Increment source address by two unit data sizes after each read + 0x00000001 + + + FOUR + Increment source address by four unit data sizes after each read + 0x00000002 + + + NONE + Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. + 0x00000003 + + + + + SIZE + Unit Data Transfer Size + 26 + 2 + read-write + + + BYTE + Each unit transfer is a byte + 0x00000000 + + + HALFWORD + Each unit transfer is a half-word + 0x00000001 + + + WORD + Each unit transfer is a word + 0x00000002 + + + + + DSTINC + Destination Address Increment Size + 28 + 2 + read-write + + + ONE + Increment destination address by one unit data size after each write + 0x00000000 + + + TWO + Increment destination address by two unit data sizes after each write + 0x00000001 + + + FOUR + Increment destination address by four unit data sizes after each write + 0x00000002 + + + NONE + Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. + 0x00000003 + + + + + SRCMODE + Source Addressing Mode + 30 + 1 + read-only + + + DSTMODE + Destination Addressing Mode + 31 + 1 + read-only + + + + + CH4_SRC + Channel Descriptor Source Data Address Register + 0x150 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SRCADDR + Source Data Address + 0 + 32 + read-write + + + + + CH4_DST + Channel Descriptor Destination Data Address Register + 0x154 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + DSTADDR + Destination Data Address + 0 + 32 + read-write + + + + + CH4_LINK + Channel Descriptor Link Structure Address Register + 0x158 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + LINKMODE + Link Structure Addressing Mode + 0 + 1 + read-only + + + LINK + Link Next Structure + 1 + 1 + read-write + + + LINKADDR + Link Structure Address + 2 + 30 + read-write + + + + + CH5_REQSEL + Channel Peripheral Request Select Register + 0x170 + 32 + read-write + 0x00000000 + 0x003F000F + + + SIGSEL + Signal Select + 0 + 4 + read-write + + + SOURCESEL + Source Select + 16 + 6 + read-write + + + NONE + No source selected + 0x00000000 + + + PRS + Peripheral Reflex System + 0x00000001 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x0000000C + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x0000000D + + + LEUART0 + Low Energy UART 0 + 0x00000010 + + + I2C0 + I2C 0 + 0x00000014 + + + TIMER0 + Timer 0 + 0x00000018 + + + TIMER1 + Timer 1 + 0x00000019 + + + MSC + "" + 0x00000030 + + + CRYPTO + Advanced Encryption Standard Accelerator + 0x00000031 + + + + + + + CH5_CFG + Channel Configuration Register + 0x174 + 32 + read-write + 0x00000000 + 0x00330000 + + + ARBSLOTS + Arbitration Slot Number Select + 16 + 2 + read-write + + + ONE + One arbitration slot selected + 0x00000000 + + + TWO + Two arbitration slots selected + 0x00000001 + + + FOUR + Four arbitration slots selected + 0x00000002 + + + EIGHT + Eight arbitration slots selected + 0x00000003 + + + + + SRCINCSIGN + Source Address Increment Sign + 20 + 1 + read-write + + + DSTINCSIGN + Destination Address Increment Sign + 21 + 1 + read-write + + + + + CH5_LOOP + Channel Loop Counter Register + 0x178 + 32 + read-write + 0x00000000 + 0x000000FF + + + LOOPCNT + Linked Structure Sequence Loop Counter + 0 + 8 + read-write + + + + + CH5_CTRL + Channel Descriptor Control Word Register + 0x17C + 32 + read-write + 0x00000000 + 0xFFFFFFFB + + + STRUCTTYPE + DMA Structure Type + 0 + 2 + read-only + + + TRANSFER + DMA transfer structure type selected. + 0x00000000 + + + SYNCHRONIZE + Synchronization structure type selected. + 0x00000001 + + + WRITE + Write immediate value structure type selected. + 0x00000002 + + + + + STRUCTREQ + Structure DMA Transfer Request + 3 + 1 + write-only + + + XFERCNT + DMA Unit Data Transfer Count + 4 + 11 + read-write + + + BYTESWAP + Endian Byte Swap + 15 + 1 + read-write + + + BLOCKSIZE + Block Transfer Size + 16 + 4 + read-write + + + UNIT1 + One unit transfer per arbitration + 0x00000000 + + + UNIT2 + Two unit transfers per arbitration + 0x00000001 + + + UNIT3 + Three unit transfers per arbitration + 0x00000002 + + + UNIT4 + Four unit transfers per arbitration + 0x00000003 + + + UNIT6 + Six unit transfers per arbitration + 0x00000004 + + + UNIT8 + Eight unit transfers per arbitration + 0x00000005 + + + UNIT16 + Sixteen unit transfers per arbitration + 0x00000007 + + + UNIT32 + 32 unit transfers per arbitration + 0x00000009 + + + UNIT64 + 64 unit transfers per arbitration + 0x0000000A + + + UNIT128 + 128 unit transfers per arbitration + 0x0000000B + + + UNIT256 + 256 unit transfers per arbitration + 0x0000000C + + + UNIT512 + 512 unit transfers per arbitration + 0x0000000D + + + UNIT1024 + 1024 unit transfers per arbitration + 0x0000000E + + + ALL + Transfer all units as specified by the XFRCNT field + 0x0000000F + + + + + DONEIFSEN + DMA Operation Done Interrupt Flag Set Enable + 20 + 1 + read-write + + + REQMODE + DMA Request Transfer Mode Select + 21 + 1 + read-write + + + DECLOOPCNT + Decrement Loop Count + 22 + 1 + read-write + + + IGNORESREQ + Ignore Sreq + 23 + 1 + read-write + + + SRCINC + Source Address Increment Size + 24 + 2 + read-write + + + ONE + Increment source address by one unit data size after each read + 0x00000000 + + + TWO + Increment source address by two unit data sizes after each read + 0x00000001 + + + FOUR + Increment source address by four unit data sizes after each read + 0x00000002 + + + NONE + Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. + 0x00000003 + + + + + SIZE + Unit Data Transfer Size + 26 + 2 + read-write + + + BYTE + Each unit transfer is a byte + 0x00000000 + + + HALFWORD + Each unit transfer is a half-word + 0x00000001 + + + WORD + Each unit transfer is a word + 0x00000002 + + + + + DSTINC + Destination Address Increment Size + 28 + 2 + read-write + + + ONE + Increment destination address by one unit data size after each write + 0x00000000 + + + TWO + Increment destination address by two unit data sizes after each write + 0x00000001 + + + FOUR + Increment destination address by four unit data sizes after each write + 0x00000002 + + + NONE + Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. + 0x00000003 + + + + + SRCMODE + Source Addressing Mode + 30 + 1 + read-only + + + DSTMODE + Destination Addressing Mode + 31 + 1 + read-only + + + + + CH5_SRC + Channel Descriptor Source Data Address Register + 0x180 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SRCADDR + Source Data Address + 0 + 32 + read-write + + + + + CH5_DST + Channel Descriptor Destination Data Address Register + 0x184 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + DSTADDR + Destination Data Address + 0 + 32 + read-write + + + + + CH5_LINK + Channel Descriptor Link Structure Address Register + 0x188 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + LINKMODE + Link Structure Addressing Mode + 0 + 1 + read-only + + + LINK + Link Next Structure + 1 + 1 + read-write + + + LINKADDR + Link Structure Address + 2 + 30 + read-write + + + + + CH6_REQSEL + Channel Peripheral Request Select Register + 0x1A0 + 32 + read-write + 0x00000000 + 0x003F000F + + + SIGSEL + Signal Select + 0 + 4 + read-write + + + SOURCESEL + Source Select + 16 + 6 + read-write + + + NONE + No source selected + 0x00000000 + + + PRS + Peripheral Reflex System + 0x00000001 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x0000000C + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x0000000D + + + LEUART0 + Low Energy UART 0 + 0x00000010 + + + I2C0 + I2C 0 + 0x00000014 + + + TIMER0 + Timer 0 + 0x00000018 + + + TIMER1 + Timer 1 + 0x00000019 + + + MSC + "" + 0x00000030 + + + CRYPTO + Advanced Encryption Standard Accelerator + 0x00000031 + + + + + + + CH6_CFG + Channel Configuration Register + 0x1A4 + 32 + read-write + 0x00000000 + 0x00330000 + + + ARBSLOTS + Arbitration Slot Number Select + 16 + 2 + read-write + + + ONE + One arbitration slot selected + 0x00000000 + + + TWO + Two arbitration slots selected + 0x00000001 + + + FOUR + Four arbitration slots selected + 0x00000002 + + + EIGHT + Eight arbitration slots selected + 0x00000003 + + + + + SRCINCSIGN + Source Address Increment Sign + 20 + 1 + read-write + + + DSTINCSIGN + Destination Address Increment Sign + 21 + 1 + read-write + + + + + CH6_LOOP + Channel Loop Counter Register + 0x1A8 + 32 + read-write + 0x00000000 + 0x000000FF + + + LOOPCNT + Linked Structure Sequence Loop Counter + 0 + 8 + read-write + + + + + CH6_CTRL + Channel Descriptor Control Word Register + 0x1AC + 32 + read-write + 0x00000000 + 0xFFFFFFFB + + + STRUCTTYPE + DMA Structure Type + 0 + 2 + read-only + + + TRANSFER + DMA transfer structure type selected. + 0x00000000 + + + SYNCHRONIZE + Synchronization structure type selected. + 0x00000001 + + + WRITE + Write immediate value structure type selected. + 0x00000002 + + + + + STRUCTREQ + Structure DMA Transfer Request + 3 + 1 + write-only + + + XFERCNT + DMA Unit Data Transfer Count + 4 + 11 + read-write + + + BYTESWAP + Endian Byte Swap + 15 + 1 + read-write + + + BLOCKSIZE + Block Transfer Size + 16 + 4 + read-write + + + UNIT1 + One unit transfer per arbitration + 0x00000000 + + + UNIT2 + Two unit transfers per arbitration + 0x00000001 + + + UNIT3 + Three unit transfers per arbitration + 0x00000002 + + + UNIT4 + Four unit transfers per arbitration + 0x00000003 + + + UNIT6 + Six unit transfers per arbitration + 0x00000004 + + + UNIT8 + Eight unit transfers per arbitration + 0x00000005 + + + UNIT16 + Sixteen unit transfers per arbitration + 0x00000007 + + + UNIT32 + 32 unit transfers per arbitration + 0x00000009 + + + UNIT64 + 64 unit transfers per arbitration + 0x0000000A + + + UNIT128 + 128 unit transfers per arbitration + 0x0000000B + + + UNIT256 + 256 unit transfers per arbitration + 0x0000000C + + + UNIT512 + 512 unit transfers per arbitration + 0x0000000D + + + UNIT1024 + 1024 unit transfers per arbitration + 0x0000000E + + + ALL + Transfer all units as specified by the XFRCNT field + 0x0000000F + + + + + DONEIFSEN + DMA Operation Done Interrupt Flag Set Enable + 20 + 1 + read-write + + + REQMODE + DMA Request Transfer Mode Select + 21 + 1 + read-write + + + DECLOOPCNT + Decrement Loop Count + 22 + 1 + read-write + + + IGNORESREQ + Ignore Sreq + 23 + 1 + read-write + + + SRCINC + Source Address Increment Size + 24 + 2 + read-write + + + ONE + Increment source address by one unit data size after each read + 0x00000000 + + + TWO + Increment source address by two unit data sizes after each read + 0x00000001 + + + FOUR + Increment source address by four unit data sizes after each read + 0x00000002 + + + NONE + Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. + 0x00000003 + + + + + SIZE + Unit Data Transfer Size + 26 + 2 + read-write + + + BYTE + Each unit transfer is a byte + 0x00000000 + + + HALFWORD + Each unit transfer is a half-word + 0x00000001 + + + WORD + Each unit transfer is a word + 0x00000002 + + + + + DSTINC + Destination Address Increment Size + 28 + 2 + read-write + + + ONE + Increment destination address by one unit data size after each write + 0x00000000 + + + TWO + Increment destination address by two unit data sizes after each write + 0x00000001 + + + FOUR + Increment destination address by four unit data sizes after each write + 0x00000002 + + + NONE + Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. + 0x00000003 + + + + + SRCMODE + Source Addressing Mode + 30 + 1 + read-only + + + DSTMODE + Destination Addressing Mode + 31 + 1 + read-only + + + + + CH6_SRC + Channel Descriptor Source Data Address Register + 0x1B0 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SRCADDR + Source Data Address + 0 + 32 + read-write + + + + + CH6_DST + Channel Descriptor Destination Data Address Register + 0x1B4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + DSTADDR + Destination Data Address + 0 + 32 + read-write + + + + + CH6_LINK + Channel Descriptor Link Structure Address Register + 0x1B8 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + LINKMODE + Link Structure Addressing Mode + 0 + 1 + read-only + + + LINK + Link Next Structure + 1 + 1 + read-write + + + LINKADDR + Link Structure Address + 2 + 30 + read-write + + + + + CH7_REQSEL + Channel Peripheral Request Select Register + 0x1D0 + 32 + read-write + 0x00000000 + 0x003F000F + + + SIGSEL + Signal Select + 0 + 4 + read-write + + + SOURCESEL + Source Select + 16 + 6 + read-write + + + NONE + No source selected + 0x00000000 + + + PRS + Peripheral Reflex System + 0x00000001 + + + ADC0 + Analog to Digital Converter 0 + 0x00000008 + + + USART0 + Universal Synchronous/Asynchronous Receiver/Transmitter 0 + 0x0000000C + + + USART1 + Universal Synchronous/Asynchronous Receiver/Transmitter 1 + 0x0000000D + + + LEUART0 + Low Energy UART 0 + 0x00000010 + + + I2C0 + I2C 0 + 0x00000014 + + + TIMER0 + Timer 0 + 0x00000018 + + + TIMER1 + Timer 1 + 0x00000019 + + + MSC + "" + 0x00000030 + + + CRYPTO + Advanced Encryption Standard Accelerator + 0x00000031 + + + + + + + CH7_CFG + Channel Configuration Register + 0x1D4 + 32 + read-write + 0x00000000 + 0x00330000 + + + ARBSLOTS + Arbitration Slot Number Select + 16 + 2 + read-write + + + ONE + One arbitration slot selected + 0x00000000 + + + TWO + Two arbitration slots selected + 0x00000001 + + + FOUR + Four arbitration slots selected + 0x00000002 + + + EIGHT + Eight arbitration slots selected + 0x00000003 + + + + + SRCINCSIGN + Source Address Increment Sign + 20 + 1 + read-write + + + DSTINCSIGN + Destination Address Increment Sign + 21 + 1 + read-write + + + + + CH7_LOOP + Channel Loop Counter Register + 0x1D8 + 32 + read-write + 0x00000000 + 0x000000FF + + + LOOPCNT + Linked Structure Sequence Loop Counter + 0 + 8 + read-write + + + + + CH7_CTRL + Channel Descriptor Control Word Register + 0x1DC + 32 + read-write + 0x00000000 + 0xFFFFFFFB + + + STRUCTTYPE + DMA Structure Type + 0 + 2 + read-only + + + TRANSFER + DMA transfer structure type selected. + 0x00000000 + + + SYNCHRONIZE + Synchronization structure type selected. + 0x00000001 + + + WRITE + Write immediate value structure type selected. + 0x00000002 + + + + + STRUCTREQ + Structure DMA Transfer Request + 3 + 1 + write-only + + + XFERCNT + DMA Unit Data Transfer Count + 4 + 11 + read-write + + + BYTESWAP + Endian Byte Swap + 15 + 1 + read-write + + + BLOCKSIZE + Block Transfer Size + 16 + 4 + read-write + + + UNIT1 + One unit transfer per arbitration + 0x00000000 + + + UNIT2 + Two unit transfers per arbitration + 0x00000001 + + + UNIT3 + Three unit transfers per arbitration + 0x00000002 + + + UNIT4 + Four unit transfers per arbitration + 0x00000003 + + + UNIT6 + Six unit transfers per arbitration + 0x00000004 + + + UNIT8 + Eight unit transfers per arbitration + 0x00000005 + + + UNIT16 + Sixteen unit transfers per arbitration + 0x00000007 + + + UNIT32 + 32 unit transfers per arbitration + 0x00000009 + + + UNIT64 + 64 unit transfers per arbitration + 0x0000000A + + + UNIT128 + 128 unit transfers per arbitration + 0x0000000B + + + UNIT256 + 256 unit transfers per arbitration + 0x0000000C + + + UNIT512 + 512 unit transfers per arbitration + 0x0000000D + + + UNIT1024 + 1024 unit transfers per arbitration + 0x0000000E + + + ALL + Transfer all units as specified by the XFRCNT field + 0x0000000F + + + + + DONEIFSEN + DMA Operation Done Interrupt Flag Set Enable + 20 + 1 + read-write + + + REQMODE + DMA Request Transfer Mode Select + 21 + 1 + read-write + + + DECLOOPCNT + Decrement Loop Count + 22 + 1 + read-write + + + IGNORESREQ + Ignore Sreq + 23 + 1 + read-write + + + SRCINC + Source Address Increment Size + 24 + 2 + read-write + + + ONE + Increment source address by one unit data size after each read + 0x00000000 + + + TWO + Increment source address by two unit data sizes after each read + 0x00000001 + + + FOUR + Increment source address by four unit data sizes after each read + 0x00000002 + + + NONE + Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. + 0x00000003 + + + + + SIZE + Unit Data Transfer Size + 26 + 2 + read-write + + + BYTE + Each unit transfer is a byte + 0x00000000 + + + HALFWORD + Each unit transfer is a half-word + 0x00000001 + + + WORD + Each unit transfer is a word + 0x00000002 + + + + + DSTINC + Destination Address Increment Size + 28 + 2 + read-write + + + ONE + Increment destination address by one unit data size after each write + 0x00000000 + + + TWO + Increment destination address by two unit data sizes after each write + 0x00000001 + + + FOUR + Increment destination address by four unit data sizes after each write + 0x00000002 + + + NONE + Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. + 0x00000003 + + + + + SRCMODE + Source Addressing Mode + 30 + 1 + read-only + + + DSTMODE + Destination Addressing Mode + 31 + 1 + read-only + + + + + CH7_SRC + Channel Descriptor Source Data Address Register + 0x1E0 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SRCADDR + Source Data Address + 0 + 32 + read-write + + + + + CH7_DST + Channel Descriptor Destination Data Address Register + 0x1E4 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + DSTADDR + Destination Data Address + 0 + 32 + read-write + + + + + CH7_LINK + Channel Descriptor Link Structure Address Register + 0x1E8 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + LINKMODE + Link Structure Addressing Mode + 0 + 1 + read-only + + + LINK + Link Next Structure + 1 + 1 + read-write + + + LINKADDR + Link Structure Address + 2 + 30 + read-write + + + + + + + FPUEH + 1.6 + FPUEH + 0x400E1000 + + 0 + 0x00000400 + registers + + + FPUEH + 33 + + + + IF + Interrupt Flag Register + 0x000 + 32 + read-only + 0x00000000 + 0x0000003F + + + FPIOC + FPU invalid operation + 0 + 1 + read-only + + + FPDZC + FPU divide-by-zero exception + 1 + 1 + read-only + + + FPUFC + FPU underflow exception + 2 + 1 + read-only + + + FPOFC + FPU overflow exception + 3 + 1 + read-only + + + FPIDC + FPU input denormal exception + 4 + 1 + read-only + + + FPIXC + FPU inexact exception + 5 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x004 + 32 + write-only + 0x00000000 + 0x0000003F + + + FPIOC + Set FPIOC Interrupt Flag + 0 + 1 + write-only + + + FPDZC + Set FPDZC Interrupt Flag + 1 + 1 + write-only + + + FPUFC + Set FPUFC Interrupt Flag + 2 + 1 + write-only + + + FPOFC + Set FPOFC Interrupt Flag + 3 + 1 + write-only + + + FPIDC + Set FPIDC Interrupt Flag + 4 + 1 + write-only + + + FPIXC + Set FPIXC Interrupt Flag + 5 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x008 + 32 + write-only + 0x00000000 + 0x0000003F + + + FPIOC + Clear FPIOC Interrupt Flag + 0 + 1 + write-only + + + FPDZC + Clear FPDZC Interrupt Flag + 1 + 1 + write-only + + + FPUFC + Clear FPUFC Interrupt Flag + 2 + 1 + write-only + + + FPOFC + Clear FPOFC Interrupt Flag + 3 + 1 + write-only + + + FPIDC + Clear FPIDC Interrupt Flag + 4 + 1 + write-only + + + FPIXC + Clear FPIXC Interrupt Flag + 5 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x00C + 32 + read-write + 0x00000000 + 0x0000003F + + + FPIOC + FPIOC Interrupt Enable + 0 + 1 + read-write + + + FPDZC + FPDZC Interrupt Enable + 1 + 1 + read-write + + + FPUFC + FPUFC Interrupt Enable + 2 + 1 + read-write + + + FPOFC + FPOFC Interrupt Enable + 3 + 1 + read-write + + + FPIDC + FPIDC Interrupt Enable + 4 + 1 + read-write + + + FPIXC + FPIXC Interrupt Enable + 5 + 1 + read-write + + + + + + + GPCRC + 1.6 + GPCRC + 0x4001C000 + + 0 + 0x00000400 + registers + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x00002711 + + + EN + CRC Functionality Enable + 0 + 1 + read-write + + + POLYSEL + Polynomial Select + 4 + 1 + read-write + + + BYTEMODE + Byte Mode Enable + 8 + 1 + read-write + + + BITREVERSE + Byte-level Bit Reverse Enable + 9 + 1 + read-write + + + BYTEREVERSE + Byte Reverse Mode + 10 + 1 + read-write + + + AUTOINIT + Auto Init Enable + 13 + 1 + read-write + + + + + CMD + Command Register + 0x004 + 32 + write-only + 0x00000000 + 0x00000001 + + + INIT + Initialization Enable + 0 + 1 + write-only + + + + + INIT + CRC Init Value + 0x008 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + INIT + CRC Initialization Value + 0 + 32 + read-write + + + + + POLY + CRC Polynomial Value + 0x00C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + POLY + CRC Polynomial Value + 0 + 16 + read-write + + + + + INPUTDATA + Input 32-bit Data Register + 0x010 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + INPUTDATA + Input Data for 32-bit + 0 + 32 + read-write + + + + + INPUTDATAHWORD + Input 16-bit Data Register + 0x014 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + INPUTDATAHWORD + Input Data for 16-bit + 0 + 16 + read-write + + + + + INPUTDATABYTE + Input 8-bit Data Register + 0x018 + 32 + read-write + 0x00000000 + 0x000000FF + + + INPUTDATABYTE + Input Data for 8-bit + 0 + 8 + read-write + + + + + DATA + CRC Data Register + 0x01C + 32 + read-only + 0x00000000 + 0xFFFFFFFF + + + DATA + CRC Data Register + 0 + 32 + read-only + + + + + DATAREV + CRC Data Reverse Register + 0x020 + 32 + read-only + 0x00000000 + 0xFFFFFFFF + + + DATAREV + Data Reverse Value + 0 + 32 + read-only + + + + + DATABYTEREV + CRC Data Byte Reverse Register + 0x024 + 32 + read-only + 0x00000000 + 0xFFFFFFFF + + + DATABYTEREV + Data Byte Reverse Value + 0 + 32 + read-only + + + + + + + TIMER0 + 1.6 + TIMER0 + 0x40018000 + + 0 + 0x00000400 + registers + + + TIMER0 + 10 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x3F032FFB + + + MODE + Timer Mode + 0 + 2 + read-write + + + UP + Up-count mode + 0x00000000 + + + DOWN + Down-count mode + 0x00000001 + + + UPDOWN + Up/down-count mode + 0x00000002 + + + QDEC + Quadrature decoder mode + 0x00000003 + + + + + SYNC + Timer Start/Stop/Reload Synchronization + 3 + 1 + read-write + + + OSMEN + One-shot Mode Enable + 4 + 1 + read-write + + + QDM + Quadrature Decoder Mode Selection + 5 + 1 + read-write + + + DEBUGRUN + Debug Mode Run Enable + 6 + 1 + read-write + + + DMACLRACT + DMA Request Clear on Active + 7 + 1 + read-write + + + RISEA + Timer Rising Input Edge Action + 8 + 2 + read-write + + + NONE + No action + 0x00000000 + + + START + Start counter without reload + 0x00000001 + + + STOP + Stop counter without reload + 0x00000002 + + + RELOADSTART + Reload and start counter + 0x00000003 + + + + + FALLA + Timer Falling Input Edge Action + 10 + 2 + read-write + + + NONE + No action + 0x00000000 + + + START + Start counter without reload + 0x00000001 + + + STOP + Stop counter without reload + 0x00000002 + + + RELOADSTART + Reload and start counter + 0x00000003 + + + + + X2CNT + 2x Count Mode + 13 + 1 + read-write + + + CLKSEL + Clock Source Select + 16 + 2 + read-write + + + PRESCHFPERCLK + Prescaled HFPERCLK + 0x00000000 + + + CC1 + Compare/Capture Channel 1 Input + 0x00000001 + + + TIMEROUF + Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer + 0x00000002 + + + + + PRESC + Prescaler Setting + 24 + 4 + read-write + + + DIV1 + The HFPERCLK is undivided + 0x00000000 + + + DIV2 + The HFPERCLK is divided by 2 + 0x00000001 + + + DIV4 + The HFPERCLK is divided by 4 + 0x00000002 + + + DIV8 + The HFPERCLK is divided by 8 + 0x00000003 + + + DIV16 + The HFPERCLK is divided by 16 + 0x00000004 + + + DIV32 + The HFPERCLK is divided by 32 + 0x00000005 + + + DIV64 + The HFPERCLK is divided by 64 + 0x00000006 + + + DIV128 + The HFPERCLK is divided by 128 + 0x00000007 + + + DIV256 + The HFPERCLK is divided by 256 + 0x00000008 + + + DIV512 + The HFPERCLK is divided by 512 + 0x00000009 + + + DIV1024 + The HFPERCLK is divided by 1024 + 0x0000000A + + + + + ATI + Always Track Inputs + 28 + 1 + read-write + + + RSSCOIST + Reload-Start Sets Compare Ouptut initial State + 29 + 1 + read-write + + + + + CMD + Command Register + 0x004 + 32 + write-only + 0x00000000 + 0x00000003 + + + START + Start Timer + 0 + 1 + write-only + + + STOP + Stop Timer + 1 + 1 + write-only + + + + + STATUS + Status Register + 0x008 + 32 + read-only + 0x00000000 + 0x0F0F0F07 + + + RUNNING + Running + 0 + 1 + read-only + + + DIR + Direction + 1 + 1 + read-only + + + TOPBV + TOPB Valid + 2 + 1 + read-only + + + CCVBV0 + CC0 CCVB Valid + 8 + 1 + read-only + + + CCVBV1 + CC1 CCVB Valid + 9 + 1 + read-only + + + CCVBV2 + CC2 CCVB Valid + 10 + 1 + read-only + + + CCVBV3 + CC3 CCVB Valid + 11 + 1 + read-only + + + ICV0 + CC0 Input Capture Valid + 16 + 1 + read-only + + + ICV1 + CC1 Input Capture Valid + 17 + 1 + read-only + + + ICV2 + CC2 Input Capture Valid + 18 + 1 + read-only + + + ICV3 + CC3 Input Capture Valid + 19 + 1 + read-only + + + CCPOL0 + CC0 Polarity + 24 + 1 + read-only + + + CCPOL1 + CC1 Polarity + 25 + 1 + read-only + + + CCPOL2 + CC2 Polarity + 26 + 1 + read-only + + + CCPOL3 + CC3 Polarity + 27 + 1 + read-only + + + + + IF + Interrupt Flag Register + 0x00C + 32 + read-only + 0x00000000 + 0x00000FF7 + + + OF + Overflow Interrupt Flag + 0 + 1 + read-only + + + UF + Underflow Interrupt Flag + 1 + 1 + read-only + + + DIRCHG + Direction Change Detect Interrupt Flag + 2 + 1 + read-only + + + CC0 + CC Channel 0 Interrupt Flag + 4 + 1 + read-only + + + CC1 + CC Channel 1 Interrupt Flag + 5 + 1 + read-only + + + CC2 + CC Channel 2 Interrupt Flag + 6 + 1 + read-only + + + CC3 + CC Channel 3 Interrupt Flag + 7 + 1 + read-only + + + ICBOF0 + CC Channel 0 Input Capture Buffer Overflow Interrupt Flag + 8 + 1 + read-only + + + ICBOF1 + CC Channel 1 Input Capture Buffer Overflow Interrupt Flag + 9 + 1 + read-only + + + ICBOF2 + CC Channel 2 Input Capture Buffer Overflow Interrupt Flag + 10 + 1 + read-only + + + ICBOF3 + CC Channel 3 Input Capture Buffer Overflow Interrupt Flag + 11 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x010 + 32 + write-only + 0x00000000 + 0x00000FF7 + + + OF + Set OF Interrupt Flag + 0 + 1 + write-only + + + UF + Set UF Interrupt Flag + 1 + 1 + write-only + + + DIRCHG + Set DIRCHG Interrupt Flag + 2 + 1 + write-only + + + CC0 + Set CC0 Interrupt Flag + 4 + 1 + write-only + + + CC1 + Set CC1 Interrupt Flag + 5 + 1 + write-only + + + CC2 + Set CC2 Interrupt Flag + 6 + 1 + write-only + + + CC3 + Set CC3 Interrupt Flag + 7 + 1 + write-only + + + ICBOF0 + Set ICBOF0 Interrupt Flag + 8 + 1 + write-only + + + ICBOF1 + Set ICBOF1 Interrupt Flag + 9 + 1 + write-only + + + ICBOF2 + Set ICBOF2 Interrupt Flag + 10 + 1 + write-only + + + ICBOF3 + Set ICBOF3 Interrupt Flag + 11 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x014 + 32 + write-only + 0x00000000 + 0x00000FF7 + + + OF + Clear OF Interrupt Flag + 0 + 1 + write-only + + + UF + Clear UF Interrupt Flag + 1 + 1 + write-only + + + DIRCHG + Clear DIRCHG Interrupt Flag + 2 + 1 + write-only + + + CC0 + Clear CC0 Interrupt Flag + 4 + 1 + write-only + + + CC1 + Clear CC1 Interrupt Flag + 5 + 1 + write-only + + + CC2 + Clear CC2 Interrupt Flag + 6 + 1 + write-only + + + CC3 + Clear CC3 Interrupt Flag + 7 + 1 + write-only + + + ICBOF0 + Clear ICBOF0 Interrupt Flag + 8 + 1 + write-only + + + ICBOF1 + Clear ICBOF1 Interrupt Flag + 9 + 1 + write-only + + + ICBOF2 + Clear ICBOF2 Interrupt Flag + 10 + 1 + write-only + + + ICBOF3 + Clear ICBOF3 Interrupt Flag + 11 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x018 + 32 + read-write + 0x00000000 + 0x00000FF7 + + + OF + OF Interrupt Enable + 0 + 1 + read-write + + + UF + UF Interrupt Enable + 1 + 1 + read-write + + + DIRCHG + DIRCHG Interrupt Enable + 2 + 1 + read-write + + + CC0 + CC0 Interrupt Enable + 4 + 1 + read-write + + + CC1 + CC1 Interrupt Enable + 5 + 1 + read-write + + + CC2 + CC2 Interrupt Enable + 6 + 1 + read-write + + + CC3 + CC3 Interrupt Enable + 7 + 1 + read-write + + + ICBOF0 + ICBOF0 Interrupt Enable + 8 + 1 + read-write + + + ICBOF1 + ICBOF1 Interrupt Enable + 9 + 1 + read-write + + + ICBOF2 + ICBOF2 Interrupt Enable + 10 + 1 + read-write + + + ICBOF3 + ICBOF3 Interrupt Enable + 11 + 1 + read-write + + + + + TOP + Counter Top Value Register + 0x01C + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + TOP + Counter Top Value + 0 + 16 + read-write + + + + + TOPB + Counter Top Value Buffer Register + 0x020 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + TOPB + Counter Top Value Buffer + 0 + 16 + read-write + + + + + CNT + Counter Value Register + 0x024 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + CNT + Counter Value + 0 + 16 + read-write + + + + + LOCK + TIMER Configuration Lock Register + 0x02C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + TIMERLOCKKEY + Timer Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x030 + 32 + read-write + 0x00000000 + 0x0000070F + + + CC0PEN + CC Channel 0 Pin Enable + 0 + 1 + read-write + + + CC1PEN + CC Channel 1 Pin Enable + 1 + 1 + read-write + + + CC2PEN + CC Channel 2 Pin Enable + 2 + 1 + read-write + + + CC3PEN + CC Channel 3 Pin Enable + 3 + 1 + read-write + + + CDTI0PEN + CC Channel 0 Complementary Dead-Time Insertion Pin Enable + 8 + 1 + read-write + + + CDTI1PEN + CC Channel 1 Complementary Dead-Time Insertion Pin Enable + 9 + 1 + read-write + + + CDTI2PEN + CC Channel 2 Complementary Dead-Time Insertion Pin Enable + 10 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x034 + 32 + read-write + 0x00000000 + 0x3F3F3F3F + + + CC0LOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 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PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + ICEDGE + Input Capture Edge Select + 24 + 2 + read-write + + + RISING + Rising edges detected + 0x00000000 + + + FALLING + Falling edges detected + 0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + ICEVCTRL + Input Capture Event Control + 26 + 2 + read-write + + + EVERYEDGE + PRS output pulse and interrupt flag set on every capture + 0x00000000 + + + EVERYSECONDEDGE + PRS output pulse and interrupt flag set on every second capture + 0x00000001 + + + RISING + PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) + 0x00000002 + + + FALLING + PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) + 0x00000003 + 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0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + ICEVCTRL + Input Capture Event Control + 26 + 2 + read-write + + + EVERYEDGE + PRS output pulse and interrupt flag set on every capture + 0x00000000 + + + EVERYSECONDEDGE + PRS output pulse and interrupt flag set on every second capture + 0x00000001 + + + RISING + PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) + 0x00000002 + + + FALLING + PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) + 0x00000003 + + + + + PRSCONF + PRS Configuration + 28 + 1 + read-write + + + INSEL + Input Selection + 29 + 1 + read-write + + + FILT + Digital Filter + 30 + 1 + read-write + + + + + CC3_CCV + CC Channel Value Register + 0x094 + 32 + read-write + 0x00000000 + 0x0000FFFF + modifyExternal + + + CCV + CC Channel Value + 0 + 16 + read-write + + + + + CC3_CCVP + CC Channel Value Peek Register + 0x098 + 32 + read-only + 0x00000000 + 0x0000FFFF + + + CCVP + CC Channel Value Peek + 0 + 16 + read-only + + + + + CC3_CCVB + CC Channel Buffer Register + 0x09C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + CCVB + CC Channel Value Buffer + 0 + 16 + read-write + + + + + DTCTRL + DTI Control Register + 0x0A0 + 32 + read-write + 0x00000000 + 0x010006FF + + + DTEN + DTI Enable + 0 + 1 + read-write + + + DTDAS + DTI Automatic Start-up Functionality + 1 + 1 + read-write + + + DTIPOL + DTI Inactive Polarity + 2 + 1 + read-write + + + DTCINV + DTI Complementary Output Invert. + 3 + 1 + read-write + + + DTPRSSEL + DTI PRS Source Channel Select + 4 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + DTAR + DTI Always Run + 9 + 1 + read-write + + + DTFATS + DTI Fault Action on Timer Stop + 10 + 1 + read-write + + + DTPRSEN + DTI PRS Source Enable + 24 + 1 + read-write + + + + + DTTIME + DTI Time Control Register + 0x0A4 + 32 + read-write + 0x00000000 + 0x003F3F0F + + + DTPRESC + DTI Prescaler Setting + 0 + 4 + read-write + + + DIV1 + The HFPERCLK is undivided + 0x00000000 + + + DIV2 + The HFPERCLK is divided by 2 + 0x00000001 + + + DIV4 + The HFPERCLK is divided by 4 + 0x00000002 + + + DIV8 + The HFPERCLK is divided by 8 + 0x00000003 + + + DIV16 + The HFPERCLK is divided by 16 + 0x00000004 + + + DIV32 + The HFPERCLK is divided by 32 + 0x00000005 + + + DIV64 + The HFPERCLK is divided by 64 + 0x00000006 + + + DIV128 + The HFPERCLK is divided by 128 + 0x00000007 + + + DIV256 + The HFPERCLK is divided by 256 + 0x00000008 + + + DIV512 + The HFPERCLK is divided by 512 + 0x00000009 + + + DIV1024 + The HFPERCLK is divided by 1024 + 0x0000000A + + + + + DTRISET + DTI Rise-time + 8 + 6 + read-write + + + DTFALLT + DTI Fall-time + 16 + 6 + read-write + + + + + DTFC + DTI Fault Configuration Register + 0x0A8 + 32 + read-write + 0x00000000 + 0x0F030F0F + + + DTPRS0FSEL + DTI PRS Fault Source 0 Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as fault source 0 + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as fault source 1 + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as fault source 2 + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as fault source 3 + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as fault source 4 + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as fault source 5 + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as fault source 6 + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as fault source 7 + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as fault source 8 + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as fault source 9 + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as fault source 10 + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as fault source 11 + 0x0000000B + + + + + DTPRS1FSEL + DTI PRS Fault Source 1 Select + 8 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as fault source 1 + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as fault source 1 + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as fault source 1 + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as fault source 1 + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as fault source 1 + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as fault source 1 + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as fault source 1 + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as fault source 1 + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as fault source 1 + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as fault source 1 + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as fault source 1 + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as fault source 1 + 0x0000000B + + + + + DTFA + DTI Fault Action + 16 + 2 + read-write + + + NONE + No action on fault + 0x00000000 + + + INACTIVE + Set outputs inactive + 0x00000001 + + + CLEAR + Clear outputs + 0x00000002 + + + TRISTATE + Tristate outputs + 0x00000003 + + + + + DTPRS0FEN + DTI PRS 0 Fault Enable + 24 + 1 + read-write + + + DTPRS1FEN + DTI PRS 1 Fault Enable + 25 + 1 + read-write + + + DTDBGFEN + DTI Debugger Fault Enable + 26 + 1 + read-write + + + DTLOCKUPFEN + DTI Lockup Fault Enable + 27 + 1 + read-write + + + + + DTOGEN + DTI Output Generation Enable Register + 0x0AC + 32 + read-write + 0x00000000 + 0x0000003F + + + DTOGCC0EN + DTI CC0 Output Generation Enable + 0 + 1 + read-write + + + DTOGCC1EN + DTI CC1 Output Generation Enable + 1 + 1 + read-write + + + DTOGCC2EN + DTI CC2 Output Generation Enable + 2 + 1 + read-write + + + DTOGCDTI0EN + DTI CDTI0 Output Generation Enable + 3 + 1 + read-write + + + DTOGCDTI1EN + DTI CDTI1 Output Generation Enable + 4 + 1 + read-write + + + DTOGCDTI2EN + DTI CDTI2 Output Generation Enable + 5 + 1 + read-write + + + + + DTFAULT + DTI Fault Register + 0x0B0 + 32 + read-only + 0x00000000 + 0x0000000F + + + DTPRS0F + DTI PRS 0 Fault + 0 + 1 + read-only + + + DTPRS1F + DTI PRS 1 Fault + 1 + 1 + read-only + + + DTDBGF + DTI Debugger Fault + 2 + 1 + read-only + + + DTLOCKUPF + DTI Lockup Fault + 3 + 1 + read-only + + + + + DTFAULTC + DTI Fault Clear Register + 0x0B4 + 32 + write-only + 0x00000000 + 0x0000000F + + + DTPRS0FC + DTI PRS0 Fault Clear + 0 + 1 + write-only + + + DTPRS1FC + DTI PRS1 Fault Clear + 1 + 1 + write-only + + + DTDBGFC + DTI Debugger Fault Clear + 2 + 1 + write-only + + + TLOCKUPFC + DTI Lockup Fault Clear + 3 + 1 + write-only + + + + + DTLOCK + DTI Configuration Lock Register + 0x0B8 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + DTI Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + + + TIMER1 + 1.6 + TIMER1 + 0x40018400 + + 0 + 0x00000400 + registers + + + TIMER1 + 18 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x3F032FFB + + + MODE + Timer Mode + 0 + 2 + read-write + + + UP + Up-count mode + 0x00000000 + + + DOWN + Down-count mode + 0x00000001 + + + UPDOWN + Up/down-count mode + 0x00000002 + + + QDEC + Quadrature decoder mode + 0x00000003 + + + + + SYNC + Timer Start/Stop/Reload Synchronization + 3 + 1 + read-write + + + OSMEN + One-shot Mode Enable + 4 + 1 + read-write + + + QDM + Quadrature Decoder Mode Selection + 5 + 1 + read-write + + + DEBUGRUN + Debug Mode Run Enable + 6 + 1 + read-write + + + DMACLRACT + DMA Request Clear on Active + 7 + 1 + read-write + + + RISEA + Timer Rising Input Edge Action + 8 + 2 + read-write + + + NONE + No action + 0x00000000 + + + START + Start counter without reload + 0x00000001 + + + STOP + Stop counter without reload + 0x00000002 + + + RELOADSTART + Reload and start counter + 0x00000003 + + + + + FALLA + Timer Falling Input Edge Action + 10 + 2 + read-write + + + NONE + No action + 0x00000000 + + + START + Start counter without reload + 0x00000001 + + + STOP + Stop counter without reload + 0x00000002 + + + RELOADSTART + Reload and start counter + 0x00000003 + + + + + X2CNT + 2x Count Mode + 13 + 1 + read-write + + + CLKSEL + Clock Source Select + 16 + 2 + read-write + + + PRESCHFPERCLK + Prescaled HFPERCLK + 0x00000000 + + + CC1 + Compare/Capture Channel 1 Input + 0x00000001 + + + TIMEROUF + Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer + 0x00000002 + + + + + PRESC + Prescaler Setting + 24 + 4 + read-write + + + DIV1 + The HFPERCLK is undivided + 0x00000000 + + + DIV2 + The HFPERCLK is divided by 2 + 0x00000001 + + + DIV4 + The HFPERCLK is divided by 4 + 0x00000002 + + + DIV8 + The HFPERCLK is divided by 8 + 0x00000003 + + + DIV16 + The HFPERCLK is divided by 16 + 0x00000004 + + + DIV32 + The HFPERCLK is divided by 32 + 0x00000005 + + + DIV64 + The HFPERCLK is divided by 64 + 0x00000006 + + + DIV128 + The HFPERCLK is divided by 128 + 0x00000007 + + + DIV256 + The HFPERCLK is divided by 256 + 0x00000008 + + + DIV512 + The HFPERCLK is divided by 512 + 0x00000009 + + + DIV1024 + The HFPERCLK is divided by 1024 + 0x0000000A + + + + + ATI + Always Track Inputs + 28 + 1 + read-write + + + RSSCOIST + Reload-Start Sets Compare Ouptut initial State + 29 + 1 + read-write + + + + + CMD + Command Register + 0x004 + 32 + write-only + 0x00000000 + 0x00000003 + + + START + Start Timer + 0 + 1 + write-only + + + STOP + Stop Timer + 1 + 1 + write-only + + + + + STATUS + Status Register + 0x008 + 32 + read-only + 0x00000000 + 0x0F0F0F07 + + + RUNNING + Running + 0 + 1 + read-only + + + DIR + Direction + 1 + 1 + read-only + + + TOPBV + TOPB Valid + 2 + 1 + read-only + + + CCVBV0 + CC0 CCVB Valid + 8 + 1 + read-only + + + CCVBV1 + CC1 CCVB Valid + 9 + 1 + read-only + + + CCVBV2 + CC2 CCVB Valid + 10 + 1 + read-only + + + CCVBV3 + CC3 CCVB Valid + 11 + 1 + read-only + + + ICV0 + CC0 Input Capture Valid + 16 + 1 + read-only + + + ICV1 + CC1 Input Capture Valid + 17 + 1 + read-only + + + ICV2 + CC2 Input Capture Valid + 18 + 1 + read-only + + + ICV3 + CC3 Input Capture Valid + 19 + 1 + read-only + + + CCPOL0 + CC0 Polarity + 24 + 1 + read-only + + + CCPOL1 + CC1 Polarity + 25 + 1 + read-only + + + CCPOL2 + CC2 Polarity + 26 + 1 + read-only + + + CCPOL3 + CC3 Polarity + 27 + 1 + read-only + + + + + IF + Interrupt Flag Register + 0x00C + 32 + read-only + 0x00000000 + 0x00000FF7 + + + OF + Overflow Interrupt Flag + 0 + 1 + read-only + + + UF + Underflow Interrupt Flag + 1 + 1 + read-only + + + DIRCHG + Direction Change Detect Interrupt Flag + 2 + 1 + read-only + + + CC0 + CC Channel 0 Interrupt Flag + 4 + 1 + read-only + + + CC1 + CC Channel 1 Interrupt Flag + 5 + 1 + read-only + + + CC2 + CC Channel 2 Interrupt Flag + 6 + 1 + read-only + + + CC3 + CC Channel 3 Interrupt Flag + 7 + 1 + read-only + + + ICBOF0 + CC Channel 0 Input Capture Buffer Overflow Interrupt Flag + 8 + 1 + read-only + + + ICBOF1 + CC Channel 1 Input Capture Buffer Overflow Interrupt Flag + 9 + 1 + read-only + + + ICBOF2 + CC Channel 2 Input Capture Buffer Overflow Interrupt Flag + 10 + 1 + read-only + + + ICBOF3 + CC Channel 3 Input Capture Buffer Overflow Interrupt Flag + 11 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x010 + 32 + write-only + 0x00000000 + 0x00000FF7 + + + OF + Set OF Interrupt Flag + 0 + 1 + write-only + + + UF + Set UF Interrupt Flag + 1 + 1 + write-only + + + DIRCHG + Set DIRCHG Interrupt Flag + 2 + 1 + write-only + + + CC0 + Set CC0 Interrupt Flag + 4 + 1 + write-only + + + CC1 + Set CC1 Interrupt Flag + 5 + 1 + write-only + + + CC2 + Set CC2 Interrupt Flag + 6 + 1 + write-only + + + CC3 + Set CC3 Interrupt Flag + 7 + 1 + write-only + + + ICBOF0 + Set ICBOF0 Interrupt Flag + 8 + 1 + write-only + + + ICBOF1 + Set ICBOF1 Interrupt Flag + 9 + 1 + write-only + + + ICBOF2 + Set ICBOF2 Interrupt Flag + 10 + 1 + write-only + + + ICBOF3 + Set ICBOF3 Interrupt Flag + 11 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x014 + 32 + write-only + 0x00000000 + 0x00000FF7 + + + OF + Clear OF Interrupt Flag + 0 + 1 + write-only + + + UF + Clear UF Interrupt Flag + 1 + 1 + write-only + + + DIRCHG + Clear DIRCHG Interrupt Flag + 2 + 1 + write-only + + + CC0 + Clear CC0 Interrupt Flag + 4 + 1 + write-only + + + CC1 + Clear CC1 Interrupt Flag + 5 + 1 + write-only + + + CC2 + Clear CC2 Interrupt Flag + 6 + 1 + write-only + + + CC3 + Clear CC3 Interrupt Flag + 7 + 1 + write-only + + + ICBOF0 + Clear ICBOF0 Interrupt Flag + 8 + 1 + write-only + + + ICBOF1 + Clear ICBOF1 Interrupt Flag + 9 + 1 + write-only + + + ICBOF2 + Clear ICBOF2 Interrupt Flag + 10 + 1 + write-only + + + ICBOF3 + Clear ICBOF3 Interrupt Flag + 11 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x018 + 32 + read-write + 0x00000000 + 0x00000FF7 + + + OF + OF Interrupt Enable + 0 + 1 + read-write + + + UF + UF Interrupt Enable + 1 + 1 + read-write + + + DIRCHG + DIRCHG Interrupt Enable + 2 + 1 + read-write + + + CC0 + CC0 Interrupt Enable + 4 + 1 + read-write + + + CC1 + CC1 Interrupt Enable + 5 + 1 + read-write + + + CC2 + CC2 Interrupt Enable + 6 + 1 + read-write + + + CC3 + CC3 Interrupt Enable + 7 + 1 + read-write + + + ICBOF0 + ICBOF0 Interrupt Enable + 8 + 1 + read-write + + + ICBOF1 + ICBOF1 Interrupt Enable + 9 + 1 + read-write + + + ICBOF2 + ICBOF2 Interrupt Enable + 10 + 1 + read-write + + + ICBOF3 + ICBOF3 Interrupt Enable + 11 + 1 + read-write + + + + + TOP + Counter Top Value Register + 0x01C + 32 + read-write + 0x0000FFFF + 0x0000FFFF + + + TOP + Counter Top Value + 0 + 16 + read-write + + + + + TOPB + Counter Top Value Buffer Register + 0x020 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + TOPB + Counter Top Value Buffer + 0 + 16 + read-write + + + + + CNT + Counter Value Register + 0x024 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + CNT + Counter Value + 0 + 16 + read-write + + + + + LOCK + TIMER Configuration Lock Register + 0x02C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + TIMERLOCKKEY + Timer Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x030 + 32 + read-write + 0x00000000 + 0x0000070F + + + CC0PEN + CC Channel 0 Pin Enable + 0 + 1 + read-write + + + CC1PEN + CC Channel 1 Pin Enable + 1 + 1 + read-write + + + CC2PEN + CC Channel 2 Pin Enable + 2 + 1 + read-write + + + CC3PEN + CC Channel 3 Pin Enable + 3 + 1 + read-write + + + CDTI0PEN + CC Channel 0 Complementary Dead-Time Insertion Pin Enable + 8 + 1 + read-write + + + CDTI1PEN + CC Channel 1 Complementary Dead-Time Insertion Pin Enable + 9 + 1 + read-write + + + CDTI2PEN + CC Channel 2 Complementary Dead-Time Insertion Pin Enable + 10 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x034 + 32 + read-write + 0x00000000 + 0x3F3F3F3F + + + CC0LOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CC1LOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CC2LOC + I/O Location + 16 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CC3LOC + I/O Location + 24 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + ROUTELOC2 + I/O Routing Location Register + 0x03C + 32 + read-write + 0x00000000 + 0x003F3F3F + + + CDTI0LOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CDTI1LOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CDTI2LOC + I/O Location + 16 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + CC0_CTRL + CC Channel Control Register + 0x060 + 32 + read-write + 0x00000000 + 0x7F0F3F17 + + + MODE + CC Channel Mode + 0 + 2 + read-write + + + OFF + Compare/Capture channel turned off + 0x00000000 + + + INPUTCAPTURE + Input capture + 0x00000001 + + + OUTPUTCOMPARE + Output compare + 0x00000002 + + + PWM + Pulse-Width Modulation + 0x00000003 + + + + + OUTINV + Output Invert + 2 + 1 + read-write + + + COIST + Compare Output Initial State + 4 + 1 + read-write + + + CMOA + Compare Match Output Action + 8 + 2 + read-write + + + NONE + No action on compare match + 0x00000000 + + + TOGGLE + Toggle output on compare match + 0x00000001 + + + CLEAR + Clear output on compare match + 0x00000002 + + + SET + Set output on compare match + 0x00000003 + + + + + COFOA + Counter Overflow Output Action + 10 + 2 + read-write + + + NONE + No action on counter overflow + 0x00000000 + + + TOGGLE + Toggle output on counter overflow + 0x00000001 + + + CLEAR + Clear output on counter overflow + 0x00000002 + + + SET + Set output on counter overflow + 0x00000003 + + + + + CUFOA + Counter Underflow Output Action + 12 + 2 + read-write + + + NONE + No action on counter underflow + 0x00000000 + + + TOGGLE + Toggle output on counter underflow + 0x00000001 + + + CLEAR + Clear output on counter underflow + 0x00000002 + + + SET + Set output on counter underflow + 0x00000003 + + + + + PRSSEL + Compare/Capture Channel PRS Input Channel Selection + 16 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + ICEDGE + Input Capture Edge Select + 24 + 2 + read-write + + + RISING + Rising edges detected + 0x00000000 + + + FALLING + Falling edges detected + 0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + ICEVCTRL + Input Capture Event Control + 26 + 2 + read-write + + + EVERYEDGE + PRS output pulse and interrupt flag set on every capture + 0x00000000 + + + EVERYSECONDEDGE + PRS output pulse and interrupt flag set on every second capture + 0x00000001 + + + RISING + PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) + 0x00000002 + + + FALLING + PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) + 0x00000003 + + + + + PRSCONF + PRS Configuration + 28 + 1 + read-write + + + INSEL + Input Selection + 29 + 1 + read-write + + + FILT + Digital Filter + 30 + 1 + read-write + + + + + CC0_CCV + CC Channel Value Register + 0x064 + 32 + read-write + 0x00000000 + 0x0000FFFF + modifyExternal + + + CCV + CC Channel Value + 0 + 16 + read-write + + + + + CC0_CCVP + CC Channel Value Peek Register + 0x068 + 32 + read-only + 0x00000000 + 0x0000FFFF + + + CCVP + CC Channel Value Peek + 0 + 16 + read-only + + + + + CC0_CCVB + CC Channel Buffer Register + 0x06C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + CCVB + CC Channel Value Buffer + 0 + 16 + read-write + + + + + CC1_CTRL + CC Channel Control Register + 0x070 + 32 + read-write + 0x00000000 + 0x7F0F3F17 + + + MODE + CC Channel Mode + 0 + 2 + read-write + + + OFF + Compare/Capture channel turned off + 0x00000000 + + + INPUTCAPTURE + Input capture + 0x00000001 + + + OUTPUTCOMPARE + Output compare + 0x00000002 + + + PWM + Pulse-Width Modulation + 0x00000003 + + + + + OUTINV + Output Invert + 2 + 1 + read-write + + + COIST + Compare Output Initial State + 4 + 1 + read-write + + + CMOA + Compare Match Output Action + 8 + 2 + read-write + + + NONE + No action on compare match + 0x00000000 + + + TOGGLE + Toggle output on compare match + 0x00000001 + + + CLEAR + Clear output on compare match + 0x00000002 + + + SET + Set output on compare match + 0x00000003 + + + + + COFOA + Counter Overflow Output Action + 10 + 2 + read-write + + + NONE + No action on counter overflow + 0x00000000 + + + TOGGLE + Toggle output on counter overflow + 0x00000001 + + + CLEAR + Clear output on counter overflow + 0x00000002 + + + SET + Set output on counter overflow + 0x00000003 + + + + + CUFOA + Counter Underflow Output Action + 12 + 2 + read-write + + + NONE + No action on counter underflow + 0x00000000 + + + TOGGLE + Toggle output on counter underflow + 0x00000001 + + + CLEAR + Clear output on counter underflow + 0x00000002 + + + SET + Set output on counter underflow + 0x00000003 + + + + + PRSSEL + Compare/Capture Channel PRS Input Channel Selection + 16 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + ICEDGE + Input Capture Edge Select + 24 + 2 + read-write + + + RISING + Rising edges detected + 0x00000000 + + + FALLING + Falling edges detected + 0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + ICEVCTRL + Input Capture Event Control + 26 + 2 + read-write + + + EVERYEDGE + PRS output pulse and interrupt flag set on every capture + 0x00000000 + + + EVERYSECONDEDGE + PRS output pulse and interrupt flag set on every second capture + 0x00000001 + + + RISING + PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) + 0x00000002 + + + FALLING + PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) + 0x00000003 + + + + + PRSCONF + PRS Configuration + 28 + 1 + read-write + + + INSEL + Input Selection + 29 + 1 + read-write + + + FILT + Digital Filter + 30 + 1 + read-write + + + + + CC1_CCV + CC Channel Value Register + 0x074 + 32 + read-write + 0x00000000 + 0x0000FFFF + modifyExternal + + + CCV + CC Channel Value + 0 + 16 + read-write + + + + + CC1_CCVP + CC Channel Value Peek Register + 0x078 + 32 + read-only + 0x00000000 + 0x0000FFFF + + + CCVP + CC Channel Value Peek + 0 + 16 + read-only + + + + + CC1_CCVB + CC Channel Buffer Register + 0x07C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + CCVB + CC Channel Value Buffer + 0 + 16 + read-write + + + + + CC2_CTRL + CC Channel Control Register + 0x080 + 32 + read-write + 0x00000000 + 0x7F0F3F17 + + + MODE + CC Channel Mode + 0 + 2 + read-write + + + OFF + Compare/Capture channel turned off + 0x00000000 + + + INPUTCAPTURE + Input capture + 0x00000001 + + + OUTPUTCOMPARE + Output compare + 0x00000002 + + + PWM + Pulse-Width Modulation + 0x00000003 + + + + + OUTINV + Output Invert + 2 + 1 + read-write + + + COIST + Compare Output Initial State + 4 + 1 + read-write + + + CMOA + Compare Match Output Action + 8 + 2 + read-write + + + NONE + No action on compare match + 0x00000000 + + + TOGGLE + Toggle output on compare match + 0x00000001 + + + CLEAR + Clear output on compare match + 0x00000002 + + + SET + Set output on compare match + 0x00000003 + + + + + COFOA + Counter Overflow Output Action + 10 + 2 + read-write + + + NONE + No action on counter overflow + 0x00000000 + + + TOGGLE + Toggle output on counter overflow + 0x00000001 + + + CLEAR + Clear output on counter overflow + 0x00000002 + + + SET + Set output on counter overflow + 0x00000003 + + + + + CUFOA + Counter Underflow Output Action + 12 + 2 + read-write + + + NONE + No action on counter underflow + 0x00000000 + + + TOGGLE + Toggle output on counter underflow + 0x00000001 + + + CLEAR + Clear output on counter underflow + 0x00000002 + + + SET + Set output on counter underflow + 0x00000003 + + + + + PRSSEL + Compare/Capture Channel PRS Input Channel Selection + 16 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + ICEDGE + Input Capture Edge Select + 24 + 2 + read-write + + + RISING + Rising edges detected + 0x00000000 + + + FALLING + Falling edges detected + 0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + ICEVCTRL + Input Capture Event Control + 26 + 2 + read-write + + + EVERYEDGE + PRS output pulse and interrupt flag set on every capture + 0x00000000 + + + EVERYSECONDEDGE + PRS output pulse and interrupt flag set on every second capture + 0x00000001 + + + RISING + PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) + 0x00000002 + + + FALLING + PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) + 0x00000003 + + + + + PRSCONF + PRS Configuration + 28 + 1 + read-write + + + INSEL + Input Selection + 29 + 1 + read-write + + + FILT + Digital Filter + 30 + 1 + read-write + + + + + CC2_CCV + CC Channel Value Register + 0x084 + 32 + read-write + 0x00000000 + 0x0000FFFF + modifyExternal + + + CCV + CC Channel Value + 0 + 16 + read-write + + + + + CC2_CCVP + CC Channel Value Peek Register + 0x088 + 32 + read-only + 0x00000000 + 0x0000FFFF + + + CCVP + CC Channel Value Peek + 0 + 16 + read-only + + + + + CC2_CCVB + CC Channel Buffer Register + 0x08C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + CCVB + CC Channel Value Buffer + 0 + 16 + read-write + + + + + CC3_CTRL + CC Channel Control Register + 0x090 + 32 + read-write + 0x00000000 + 0x7F0F3F17 + + + MODE + CC Channel Mode + 0 + 2 + read-write + + + OFF + Compare/Capture channel turned off + 0x00000000 + + + INPUTCAPTURE + Input capture + 0x00000001 + + + OUTPUTCOMPARE + Output compare + 0x00000002 + + + PWM + Pulse-Width Modulation + 0x00000003 + + + + + OUTINV + Output Invert + 2 + 1 + read-write + + + COIST + Compare Output Initial State + 4 + 1 + read-write + + + CMOA + Compare Match Output Action + 8 + 2 + read-write + + + NONE + No action on compare match + 0x00000000 + + + TOGGLE + Toggle output on compare match + 0x00000001 + + + CLEAR + Clear output on compare match + 0x00000002 + + + SET + Set output on compare match + 0x00000003 + + + + + COFOA + Counter Overflow Output Action + 10 + 2 + read-write + + + NONE + No action on counter overflow + 0x00000000 + + + TOGGLE + Toggle output on counter overflow + 0x00000001 + + + CLEAR + Clear output on counter overflow + 0x00000002 + + + SET + Set output on counter overflow + 0x00000003 + + + + + CUFOA + Counter Underflow Output Action + 12 + 2 + read-write + + + NONE + No action on counter underflow + 0x00000000 + + + TOGGLE + Toggle output on counter underflow + 0x00000001 + + + CLEAR + Clear output on counter underflow + 0x00000002 + + + SET + Set output on counter underflow + 0x00000003 + + + + + PRSSEL + Compare/Capture Channel PRS Input Channel Selection + 16 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + ICEDGE + Input Capture Edge Select + 24 + 2 + read-write + + + RISING + Rising edges detected + 0x00000000 + + + FALLING + Falling edges detected + 0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + ICEVCTRL + Input Capture Event Control + 26 + 2 + read-write + + + EVERYEDGE + PRS output pulse and interrupt flag set on every capture + 0x00000000 + + + EVERYSECONDEDGE + PRS output pulse and interrupt flag set on every second capture + 0x00000001 + + + RISING + PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) + 0x00000002 + + + FALLING + PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) + 0x00000003 + + + + + PRSCONF + PRS Configuration + 28 + 1 + read-write + + + INSEL + Input Selection + 29 + 1 + read-write + + + FILT + Digital Filter + 30 + 1 + read-write + + + + + CC3_CCV + CC Channel Value Register + 0x094 + 32 + read-write + 0x00000000 + 0x0000FFFF + modifyExternal + + + CCV + CC Channel Value + 0 + 16 + read-write + + + + + CC3_CCVP + CC Channel Value Peek Register + 0x098 + 32 + read-only + 0x00000000 + 0x0000FFFF + + + CCVP + CC Channel Value Peek + 0 + 16 + read-only + + + + + CC3_CCVB + CC Channel Buffer Register + 0x09C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + CCVB + CC Channel Value Buffer + 0 + 16 + read-write + + + + + DTCTRL + DTI Control Register + 0x0A0 + 32 + read-write + 0x00000000 + 0x010006FF + + + DTEN + DTI Enable + 0 + 1 + read-write + + + DTDAS + DTI Automatic Start-up Functionality + 1 + 1 + read-write + + + DTIPOL + DTI Inactive Polarity + 2 + 1 + read-write + + + DTCINV + DTI Complementary Output Invert. + 3 + 1 + read-write + + + DTPRSSEL + DTI PRS Source Channel Select + 4 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + DTAR + DTI Always Run + 9 + 1 + read-write + + + DTFATS + DTI Fault Action on Timer Stop + 10 + 1 + read-write + + + DTPRSEN + DTI PRS Source Enable + 24 + 1 + read-write + + + + + DTTIME + DTI Time Control Register + 0x0A4 + 32 + read-write + 0x00000000 + 0x003F3F0F + + + DTPRESC + DTI Prescaler Setting + 0 + 4 + read-write + + + DIV1 + The HFPERCLK is undivided + 0x00000000 + + + DIV2 + The HFPERCLK is divided by 2 + 0x00000001 + + + DIV4 + The HFPERCLK is divided by 4 + 0x00000002 + + + DIV8 + The HFPERCLK is divided by 8 + 0x00000003 + + + DIV16 + The HFPERCLK is divided by 16 + 0x00000004 + + + DIV32 + The HFPERCLK is divided by 32 + 0x00000005 + + + DIV64 + The HFPERCLK is divided by 64 + 0x00000006 + + + DIV128 + The HFPERCLK is divided by 128 + 0x00000007 + + + DIV256 + The HFPERCLK is divided by 256 + 0x00000008 + + + DIV512 + The HFPERCLK is divided by 512 + 0x00000009 + + + DIV1024 + The HFPERCLK is divided by 1024 + 0x0000000A + + + + + DTRISET + DTI Rise-time + 8 + 6 + read-write + + + DTFALLT + DTI Fall-time + 16 + 6 + read-write + + + + + DTFC + DTI Fault Configuration Register + 0x0A8 + 32 + read-write + 0x00000000 + 0x0F030F0F + + + DTPRS0FSEL + DTI PRS Fault Source 0 Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as fault source 0 + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as fault source 1 + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as fault source 2 + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as fault source 3 + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as fault source 4 + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as fault source 5 + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as fault source 6 + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as fault source 7 + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as fault source 8 + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as fault source 9 + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as fault source 10 + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as fault source 11 + 0x0000000B + + + + + DTPRS1FSEL + DTI PRS Fault Source 1 Select + 8 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as fault source 1 + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as fault source 1 + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as fault source 1 + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as fault source 1 + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as fault source 1 + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as fault source 1 + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as fault source 1 + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as fault source 1 + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as fault source 1 + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as fault source 1 + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as fault source 1 + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as fault source 1 + 0x0000000B + + + + + DTFA + DTI Fault Action + 16 + 2 + read-write + + + NONE + No action on fault + 0x00000000 + + + INACTIVE + Set outputs inactive + 0x00000001 + + + CLEAR + Clear outputs + 0x00000002 + + + TRISTATE + Tristate outputs + 0x00000003 + + + + + DTPRS0FEN + DTI PRS 0 Fault Enable + 24 + 1 + read-write + + + DTPRS1FEN + DTI PRS 1 Fault Enable + 25 + 1 + read-write + + + DTDBGFEN + DTI Debugger Fault Enable + 26 + 1 + read-write + + + DTLOCKUPFEN + DTI Lockup Fault Enable + 27 + 1 + read-write + + + + + DTOGEN + DTI Output Generation Enable Register + 0x0AC + 32 + read-write + 0x00000000 + 0x0000003F + + + DTOGCC0EN + DTI CC0 Output Generation Enable + 0 + 1 + read-write + + + DTOGCC1EN + DTI CC1 Output Generation Enable + 1 + 1 + read-write + + + DTOGCC2EN + DTI CC2 Output Generation Enable + 2 + 1 + read-write + + + DTOGCDTI0EN + DTI CDTI0 Output Generation Enable + 3 + 1 + read-write + + + DTOGCDTI1EN + DTI CDTI1 Output Generation Enable + 4 + 1 + read-write + + + DTOGCDTI2EN + DTI CDTI2 Output Generation Enable + 5 + 1 + read-write + + + + + DTFAULT + DTI Fault Register + 0x0B0 + 32 + read-only + 0x00000000 + 0x0000000F + + + DTPRS0F + DTI PRS 0 Fault + 0 + 1 + read-only + + + DTPRS1F + DTI PRS 1 Fault + 1 + 1 + read-only + + + DTDBGF + DTI Debugger Fault + 2 + 1 + read-only + + + DTLOCKUPF + DTI Lockup Fault + 3 + 1 + read-only + + + + + DTFAULTC + DTI Fault Clear Register + 0x0B4 + 32 + write-only + 0x00000000 + 0x0000000F + + + DTPRS0FC + DTI PRS0 Fault Clear + 0 + 1 + write-only + + + DTPRS1FC + DTI PRS1 Fault Clear + 1 + 1 + write-only + + + DTDBGFC + DTI Debugger Fault Clear + 2 + 1 + write-only + + + TLOCKUPFC + DTI Lockup Fault Clear + 3 + 1 + write-only + + + + + DTLOCK + DTI Configuration Lock Register + 0x0B8 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + DTI Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + + + USART0 + 1.6 + USART0 + 0x40010000 + + 0 + 0x00000400 + registers + + + USART0_RX + 11 + + + USART0_TX + 12 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0xF3FFFF7F + + + SYNC + USART Synchronous Mode + 0 + 1 + read-write + + + LOOPBK + Loopback Enable + 1 + 1 + read-write + + + CCEN + Collision Check Enable + 2 + 1 + read-write + + + MPM + Multi-Processor Mode + 3 + 1 + read-write + + + MPAB + Multi-Processor Address-Bit + 4 + 1 + read-write + + + OVS + Oversampling + 5 + 2 + read-write + + + X16 + Regular UART mode with 16X oversampling in asynchronous mode + 0x00000000 + + + X8 + Double speed with 8X oversampling in asynchronous mode + 0x00000001 + + + X6 + 6X oversampling in asynchronous mode + 0x00000002 + + + X4 + Quadruple speed with 4X oversampling in asynchronous mode + 0x00000003 + + + + + CLKPOL + Clock Polarity + 8 + 1 + read-write + + + CLKPHA + Clock Edge For Setup/Sample + 9 + 1 + read-write + + + MSBF + Most Significant Bit First + 10 + 1 + read-write + + + CSMA + Action On Slave-Select In Master Mode + 11 + 1 + read-write + + + TXBIL + TX Buffer Interrupt Level + 12 + 1 + read-write + + + RXINV + Receiver Input Invert + 13 + 1 + read-write + + + TXINV + Transmitter output Invert + 14 + 1 + read-write + + + CSINV + Chip Select Invert + 15 + 1 + read-write + + + AUTOCS + Automatic Chip Select + 16 + 1 + read-write + + + AUTOTRI + Automatic TX Tristate + 17 + 1 + read-write + + + SCMODE + SmartCard Mode + 18 + 1 + read-write + + + SCRETRANS + SmartCard Retransmit + 19 + 1 + read-write + + + SKIPPERRF + Skip Parity Error Frames + 20 + 1 + read-write + + + BIT8DV + Bit 8 Default Value + 21 + 1 + read-write + + + ERRSDMA + Halt DMA On Error + 22 + 1 + read-write + + + ERRSRX + Disable RX On Error + 23 + 1 + read-write + + + ERRSTX + Disable TX On Error + 24 + 1 + read-write + + + SSSEARLY + Synchronous Slave Setup Early + 25 + 1 + read-write + + + BYTESWAP + Byteswap In Double Accesses + 28 + 1 + read-write + + + AUTOTX + Always Transmit When RX Not Full + 29 + 1 + read-write + + + MVDIS + Majority Vote Disable + 30 + 1 + read-write + + + SMSDELAY + Synchronous Master Sample Delay + 31 + 1 + read-write + + + + + FRAME + USART Frame Format Register + 0x004 + 32 + read-write + 0x00001005 + 0x0000330F + + + DATABITS + Data-Bit Mode + 0 + 4 + read-write + + + FOUR + Each frame contains 4 data bits + 0x00000001 + + + FIVE + Each frame contains 5 data bits + 0x00000002 + + + SIX + Each frame contains 6 data bits + 0x00000003 + + + SEVEN + Each frame contains 7 data bits + 0x00000004 + + + EIGHT + Each frame contains 8 data bits + 0x00000005 + + + NINE + Each frame contains 9 data bits + 0x00000006 + + + TEN + Each frame contains 10 data bits + 0x00000007 + + + ELEVEN + Each frame contains 11 data bits + 0x00000008 + + + TWELVE + Each frame contains 12 data bits + 0x00000009 + + + THIRTEEN + Each frame contains 13 data bits + 0x0000000A + + + FOURTEEN + Each frame contains 14 data bits + 0x0000000B + + + FIFTEEN + Each frame contains 15 data bits + 0x0000000C + + + SIXTEEN + Each frame contains 16 data bits + 0x0000000D + + + + + PARITY + Parity-Bit Mode + 8 + 2 + read-write + + + NONE + Parity bits are not used + 0x00000000 + + + EVEN + Even parity are used. Parity bits are automatically generated and checked by hardware. + 0x00000002 + + + ODD + Odd parity is used. Parity bits are automatically generated and checked by hardware. + 0x00000003 + + + + + STOPBITS + Stop-Bit Mode + 12 + 2 + read-write + + + HALF + The transmitter generates a half stop bit. Stop-bits are not verified by receiver + 0x00000000 + + + ONE + One stop bit is generated and verified + 0x00000001 + + + ONEANDAHALF + The transmitter generates one and a half stop bit. The receiver verifies the first stop bit + 0x00000002 + + + TWO + The transmitter generates two stop bits. The receiver checks the first stop-bit only + 0x00000003 + + + + + + + TRIGCTRL + USART Trigger Control register + 0x008 + 32 + read-write + 0x00000000 + 0x000F1FF0 + + + RXTEN + Receive Trigger Enable + 4 + 1 + read-write + + + TXTEN + Transmit Trigger Enable + 5 + 1 + read-write + + + AUTOTXTEN + AUTOTX Trigger Enable + 6 + 1 + read-write + + + TXARX0EN + Enable Transmit Trigger after RX End of Frame plus TCMP0VAL + 7 + 1 + read-write + + + TXARX1EN + Enable Transmit Trigger after RX End of Frame plus TCMP1VAL + 8 + 1 + read-write + + + TXARX2EN + Enable Transmit Trigger after RX End of Frame plus TCMP2VAL + 9 + 1 + read-write + + + RXATX0EN + Enable Receive Trigger after TX end of frame plus TCMPVAL0 baud-times + 10 + 1 + read-write + + + RXATX1EN + Enable Receive Trigger after TX end of frame plus TCMPVAL1 baud-times + 11 + 1 + read-write + + + RXATX2EN + Enable Receive Trigger after TX end of frame plus TCMPVAL2 baud-times + 12 + 1 + read-write + + + TSEL + Trigger PRS Channel Select + 16 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + + + CMD + Command Register + 0x00C + 32 + write-only + 0x00000000 + 0x00000FFF + + + RXEN + Receiver Enable + 0 + 1 + write-only + + + RXDIS + Receiver Disable + 1 + 1 + write-only + + + TXEN + Transmitter Enable + 2 + 1 + write-only + + + TXDIS + Transmitter Disable + 3 + 1 + write-only + + + MASTEREN + Master Enable + 4 + 1 + write-only + + + MASTERDIS + Master Disable + 5 + 1 + write-only + + + RXBLOCKEN + Receiver Block Enable + 6 + 1 + write-only + + + RXBLOCKDIS + Receiver Block Disable + 7 + 1 + write-only + + + TXTRIEN + Transmitter Tristate Enable + 8 + 1 + write-only + + + TXTRIDIS + Transmitter Tristate Disable + 9 + 1 + write-only + + + CLEARTX + Clear TX + 10 + 1 + write-only + + + CLEARRX + Clear RX + 11 + 1 + write-only + + + + + STATUS + USART Status Register + 0x010 + 32 + read-only + 0x00002040 + 0x00037FFF + + + RXENS + Receiver Enable Status + 0 + 1 + read-only + + + TXENS + Transmitter Enable Status + 1 + 1 + read-only + + + MASTER + SPI Master Mode + 2 + 1 + read-only + + + RXBLOCK + Block Incoming Data + 3 + 1 + read-only + + + TXTRI + Transmitter Tristated + 4 + 1 + read-only + + + TXC + TX Complete + 5 + 1 + read-only + + + TXBL + TX Buffer Level + 6 + 1 + read-only + + + RXDATAV + RX Data Valid + 7 + 1 + read-only + + + RXFULL + RX FIFO Full + 8 + 1 + read-only + + + TXBDRIGHT + TX Buffer Expects Double Right Data + 9 + 1 + read-only + + + TXBSRIGHT + TX Buffer Expects Single Right Data + 10 + 1 + read-only + + + RXDATAVRIGHT + RX Data Right + 11 + 1 + read-only + + + RXFULLRIGHT + RX Full of Right Data + 12 + 1 + read-only + + + TXIDLE + TX Idle + 13 + 1 + read-only + + + TIMERRESTARTED + The USART Timer restarted itself + 14 + 1 + read-only + + + TXBUFCNT + TX Buffer Count + 16 + 2 + read-only + + + + + CLKDIV + Clock Control Register + 0x014 + 32 + read-write + 0x00000000 + 0x807FFFF8 + + + DIV + Fractional Clock Divider + 3 + 20 + read-write + + + AUTOBAUDEN + AUTOBAUD detection enable + 31 + 1 + read-write + + + + + RXDATAX + RX Buffer Data Extended Register + 0x018 + 32 + read-only + 0x00000000 + 0x0000C1FF + modifyExternal + + + RXDATA + RX Data + 0 + 9 + read-only + + + PERR + Data Parity Error + 14 + 1 + read-only + + + FERR + Data Framing Error + 15 + 1 + read-only + + + + + RXDATA + RX Buffer Data Register + 0x01C + 32 + read-only + 0x00000000 + 0x000000FF + modifyExternal + + + RXDATA + RX Data + 0 + 8 + read-only + + + + + RXDOUBLEX + RX Buffer Double Data Extended Register + 0x020 + 32 + read-only + 0x00000000 + 0xC1FFC1FF + modifyExternal + + + RXDATA0 + RX Data 0 + 0 + 9 + read-only + + + PERR0 + Data Parity Error 0 + 14 + 1 + read-only + + + FERR0 + Data Framing Error 0 + 15 + 1 + read-only + + + RXDATA1 + RX Data 1 + 16 + 9 + read-only + + + PERR1 + Data Parity Error 1 + 30 + 1 + read-only + + + FERR1 + Data Framing Error 1 + 31 + 1 + read-only + + + + + RXDOUBLE + RX FIFO Double Data Register + 0x024 + 32 + read-only + 0x00000000 + 0x0000FFFF + modifyExternal + + + RXDATA0 + RX Data 0 + 0 + 8 + read-only + + + RXDATA1 + RX Data 1 + 8 + 8 + read-only + + + + + RXDATAXP + RX Buffer Data Extended Peek Register + 0x028 + 32 + read-only + 0x00000000 + 0x0000C1FF + + + RXDATAP + RX Data Peek + 0 + 9 + read-only + + + PERRP + Data Parity Error Peek + 14 + 1 + read-only + + + FERRP + Data Framing Error Peek + 15 + 1 + read-only + + + + + RXDOUBLEXP + RX Buffer Double Data Extended Peek Register + 0x02C + 32 + read-only + 0x00000000 + 0xC1FFC1FF + + + RXDATAP0 + RX Data 0 Peek + 0 + 9 + read-only + + + PERRP0 + Data Parity Error 0 Peek + 14 + 1 + read-only + + + FERRP0 + Data Framing Error 0 Peek + 15 + 1 + read-only + + + RXDATAP1 + RX Data 1 Peek + 16 + 9 + read-only + + + PERRP1 + Data Parity Error 1 Peek + 30 + 1 + read-only + + + FERRP1 + Data Framing Error 1 Peek + 31 + 1 + read-only + + + + + TXDATAX + TX Buffer Data Extended Register + 0x030 + 32 + read-write + 0x00000000 + 0x0000F9FF + + + TXDATAX + TX Data + 0 + 9 + read-write + + + UBRXAT + Unblock RX After Transmission + 11 + 1 + read-write + + + TXTRIAT + Set TXTRI After Transmission + 12 + 1 + read-write + + + TXBREAK + Transmit Data As Break + 13 + 1 + read-write + + + TXDISAT + Clear TXEN After Transmission + 14 + 1 + read-write + + + RXENAT + Enable RX After Transmission + 15 + 1 + read-write + + + + + TXDATA + TX Buffer Data Register + 0x034 + 32 + read-write + 0x00000000 + 0x000000FF + + + TXDATA + TX Data + 0 + 8 + read-write + + + + + TXDOUBLEX + TX Buffer Double Data Extended Register + 0x038 + 32 + read-write + 0x00000000 + 0xF9FFF9FF + + + TXDATA0 + TX Data + 0 + 9 + read-write + + + UBRXAT0 + Unblock RX After Transmission + 11 + 1 + read-write + + + TXTRIAT0 + Set TXTRI After Transmission + 12 + 1 + read-write + + + TXBREAK0 + Transmit Data As Break + 13 + 1 + read-write + + + TXDISAT0 + Clear TXEN After Transmission + 14 + 1 + read-write + + + RXENAT0 + Enable RX After Transmission + 15 + 1 + read-write + + + TXDATA1 + TX Data + 16 + 9 + read-write + + + UBRXAT1 + Unblock RX After Transmission + 27 + 1 + read-write + + + TXTRIAT1 + Set TXTRI After Transmission + 28 + 1 + read-write + + + TXBREAK1 + Transmit Data As Break + 29 + 1 + read-write + + + TXDISAT1 + Clear TXEN After Transmission + 30 + 1 + read-write + + + RXENAT1 + Enable RX After Transmission + 31 + 1 + read-write + + + + + TXDOUBLE + TX Buffer Double Data Register + 0x03C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + TXDATA0 + TX Data + 0 + 8 + read-write + + + TXDATA1 + TX Data + 8 + 8 + read-write + + + + + IF + Interrupt Flag Register + 0x040 + 32 + read-only + 0x00000002 + 0x0001FFFF + + + TXC + TX Complete Interrupt Flag + 0 + 1 + read-only + + + TXBL + TX Buffer Level Interrupt Flag + 1 + 1 + read-only + + + RXDATAV + RX Data Valid Interrupt Flag + 2 + 1 + read-only + + + RXFULL + RX Buffer Full Interrupt Flag + 3 + 1 + read-only + + + RXOF + RX Overflow Interrupt Flag + 4 + 1 + read-only + + + RXUF + RX Underflow Interrupt Flag + 5 + 1 + read-only + + + TXOF + TX Overflow Interrupt Flag + 6 + 1 + read-only + + + TXUF + TX Underflow Interrupt Flag + 7 + 1 + read-only + + + PERR + Parity Error Interrupt Flag + 8 + 1 + read-only + + + FERR + Framing Error Interrupt Flag + 9 + 1 + read-only + + + MPAF + Multi-Processor Address Frame Interrupt Flag + 10 + 1 + read-only + + + SSM + Slave-Select In Master Mode Interrupt Flag + 11 + 1 + read-only + + + CCF + Collision Check Fail Interrupt Flag + 12 + 1 + read-only + + + TXIDLE + TX Idle Interrupt Flag + 13 + 1 + read-only + + + TCMP0 + Timer comparator 0 Interrupt Flag + 14 + 1 + read-only + + + TCMP1 + Timer comparator 1 Interrupt Flag + 15 + 1 + read-only + + + TCMP2 + Timer comparator 2 Interrupt Flag + 16 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x044 + 32 + write-only + 0x00000000 + 0x0001FFF9 + + + TXC + Set TXC Interrupt Flag + 0 + 1 + write-only + + + RXFULL + Set RXFULL Interrupt Flag + 3 + 1 + write-only + + + RXOF + Set RXOF Interrupt Flag + 4 + 1 + write-only + + + RXUF + Set RXUF Interrupt Flag + 5 + 1 + write-only + + + TXOF + Set TXOF Interrupt Flag + 6 + 1 + write-only + + + TXUF + Set TXUF Interrupt Flag + 7 + 1 + write-only + + + PERR + Set PERR Interrupt Flag + 8 + 1 + write-only + + + FERR + Set FERR Interrupt Flag + 9 + 1 + write-only + + + MPAF + Set MPAF Interrupt Flag + 10 + 1 + write-only + + + SSM + Set SSM Interrupt Flag + 11 + 1 + write-only + + + CCF + Set CCF Interrupt Flag + 12 + 1 + write-only + + + TXIDLE + Set TXIDLE Interrupt Flag + 13 + 1 + write-only + + + TCMP0 + Set TCMP0 Interrupt Flag + 14 + 1 + write-only + + + TCMP1 + Set TCMP1 Interrupt Flag + 15 + 1 + write-only + + + TCMP2 + Set TCMP2 Interrupt Flag + 16 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x048 + 32 + write-only + 0x00000000 + 0x0001FFF9 + + + TXC + Clear TXC Interrupt Flag + 0 + 1 + write-only + + + RXFULL + Clear RXFULL Interrupt Flag + 3 + 1 + write-only + + + RXOF + Clear RXOF Interrupt Flag + 4 + 1 + write-only + + + RXUF + Clear RXUF Interrupt Flag + 5 + 1 + write-only + + + TXOF + Clear TXOF Interrupt Flag + 6 + 1 + write-only + + + TXUF + Clear TXUF Interrupt Flag + 7 + 1 + write-only + + + PERR + Clear PERR Interrupt Flag + 8 + 1 + write-only + + + FERR + Clear FERR Interrupt Flag + 9 + 1 + write-only + + + MPAF + Clear MPAF Interrupt Flag + 10 + 1 + write-only + + + SSM + Clear SSM Interrupt Flag + 11 + 1 + write-only + + + CCF + Clear CCF Interrupt Flag + 12 + 1 + write-only + + + TXIDLE + Clear TXIDLE Interrupt Flag + 13 + 1 + write-only + + + TCMP0 + Clear TCMP0 Interrupt Flag + 14 + 1 + write-only + + + TCMP1 + Clear TCMP1 Interrupt Flag + 15 + 1 + write-only + + + TCMP2 + Clear TCMP2 Interrupt Flag + 16 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x04C + 32 + read-write + 0x00000000 + 0x0001FFFF + + + TXC + TXC Interrupt Enable + 0 + 1 + read-write + + + TXBL + TXBL Interrupt Enable + 1 + 1 + read-write + + + RXDATAV + RXDATAV Interrupt Enable + 2 + 1 + read-write + + + RXFULL + RXFULL Interrupt Enable + 3 + 1 + read-write + + + RXOF + RXOF Interrupt Enable + 4 + 1 + read-write + + + RXUF + RXUF Interrupt Enable + 5 + 1 + read-write + + + TXOF + TXOF Interrupt Enable + 6 + 1 + read-write + + + TXUF + TXUF Interrupt Enable + 7 + 1 + read-write + + + PERR + PERR Interrupt Enable + 8 + 1 + read-write + + + FERR + FERR Interrupt Enable + 9 + 1 + read-write + + + MPAF + MPAF Interrupt Enable + 10 + 1 + read-write + + + SSM + SSM Interrupt Enable + 11 + 1 + read-write + + + CCF + CCF Interrupt Enable + 12 + 1 + read-write + + + TXIDLE + TXIDLE Interrupt Enable + 13 + 1 + read-write + + + TCMP0 + TCMP0 Interrupt Enable + 14 + 1 + read-write + + + TCMP1 + TCMP1 Interrupt Enable + 15 + 1 + read-write + + + TCMP2 + TCMP2 Interrupt Enable + 16 + 1 + read-write + + + + + IRCTRL + IrDA Control Register + 0x050 + 32 + read-write + 0x00000000 + 0x00000F8F + + + IREN + Enable IrDA Module + 0 + 1 + read-write + + + IRPW + IrDA TX Pulse Width + 1 + 2 + read-write + + + ONE + IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 + 0x00000000 + + + TWO + IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 + 0x00000001 + + + THREE + IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 + 0x00000002 + + + FOUR + IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 + 0x00000003 + + + + + IRFILT + IrDA RX Filter + 3 + 1 + read-write + + + IRPRSEN + IrDA PRS Channel Enable + 7 + 1 + read-write + + + IRPRSSEL + IrDA PRS Channel Select + 8 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + + + INPUT + USART Input Register + 0x058 + 32 + read-write + 0x00000000 + 0x00008F8F + + + RXPRSSEL + RX PRS Channel Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + RXPRS + PRS RX Enable + 7 + 1 + read-write + + + CLKPRSSEL + CLK PRS Channel Select + 8 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + CLKPRS + PRS CLK Enable + 15 + 1 + read-write + + + + + I2SCTRL + I2S Control Register + 0x05C + 32 + read-write + 0x00000000 + 0x0000071F + + + EN + Enable I2S Mode + 0 + 1 + read-write + + + MONO + Stero or Mono + 1 + 1 + read-write + + + JUSTIFY + Justification of I2S Data + 2 + 1 + read-write + + + DMASPLIT + Separate DMA Request For Left/Right Data + 3 + 1 + read-write + + + DELAY + Delay on I2S data + 4 + 1 + read-write + + + FORMAT + I2S Word Format + 8 + 3 + read-write + + + W32D32 + 32-bit word, 32-bit data + 0x00000000 + + + W32D24M + 32-bit word, 32-bit data with 8 lsb masked + 0x00000001 + + + W32D24 + 32-bit word, 24-bit data + 0x00000002 + + + W32D16 + 32-bit word, 16-bit data + 0x00000003 + + + W32D8 + 32-bit word, 8-bit data + 0x00000004 + + + W16D16 + 16-bit word, 16-bit data + 0x00000005 + + + W16D8 + 16-bit word, 8-bit data + 0x00000006 + + + W8D8 + 8-bit word, 8-bit data + 0x00000007 + + + + + + + TIMING + Timing Register + 0x060 + 32 + read-write + 0x00000000 + 0x77770000 + + + TXDELAY + TX frame start delay + 16 + 3 + read-write + + + DISABLE + Disable - TXDELAY in USARTn_CTRL can be used for legacy + 0x00000000 + + + ONE + Start of transmission is delayed for 1 baud-times + 0x00000001 + + + TWO + Start of transmission is delayed for 2 baud-times + 0x00000002 + + + THREE + Start of transmission is delayed for 3 baud-times + 0x00000003 + + + SEVEN + Start of transmission is delayed for 7 baud-times + 0x00000004 + + + TCMP0 + Start of transmission is delayed for TCMPVAL0 baud-times + 0x00000005 + + + TCMP1 + Start of transmission is delayed for TCMPVAL1 baud-times + 0x00000006 + + + TCMP2 + Start of transmission is delayed for TCMPVAL2 baud-times + 0x00000007 + + + + + CSSETUP + Chip Select Setup + 20 + 3 + read-write + + + ZERO + CS is not asserted before start of transmission + 0x00000000 + + + ONE + CS is asserted for 1 baud-times before start of transmission + 0x00000001 + + + TWO + CS is asserted for 2 baud-times before start of transmission + 0x00000002 + + + THREE + CS is asserted for 3 baud-times before start of transmission + 0x00000003 + + + SEVEN + CS is asserted for 7 baud-times before start of transmission + 0x00000004 + + + TCMP0 + CS is asserted before the start of transmission for TCMPVAL0 baud-times + 0x00000005 + + + TCMP1 + CS is asserted before the start of transmission for TCMPVAL1 baud-times + 0x00000006 + + + TCMP2 + CS is asserted before the start of transmission for TCMPVAL2 baud-times + 0x00000007 + + + + + ICS + Inter-character spacing + 24 + 3 + read-write + + + ZERO + There is no space between charcters + 0x00000000 + + + ONE + Create a space of 1 baud-times before start of transmission + 0x00000001 + + + TWO + Create a space of 2 baud-times before start of transmission + 0x00000002 + + + THREE + Create a space of 3 baud-times before start of transmission + 0x00000003 + + + SEVEN + Create a space of 7 baud-times before start of transmission + 0x00000004 + + + TCMP0 + Create a space of before the start of transmission for TCMPVAL0 baud-times + 0x00000005 + + + TCMP1 + Create a space of before the start of transmission for TCMPVAL1 baud-times + 0x00000006 + + + TCMP2 + Create a space of before the start of transmission for TCMPVAL2 baud-times + 0x00000007 + + + + + CSHOLD + Chip Select Hold + 28 + 3 + read-write + + + ZERO + Disable CS being asserted after the end of transmission + 0x00000000 + + + ONE + CS is asserted for 1 baud-times after the end of transmission + 0x00000001 + + + TWO + CS is asserted for 2 baud-times after the end of transmission + 0x00000002 + + + THREE + CS is asserted for 3 baud-times after the end of transmission + 0x00000003 + + + SEVEN + CS is asserted for 7 baud-times after the end of transmission + 0x00000004 + + + TCMP0 + CS is asserted after the end of transmission for TCMPVAL0 baud-times + 0x00000005 + + + TCMP1 + CS is asserted after the end of transmission for TCMPVAL1 baud-times + 0x00000006 + + + TCMP2 + CS is asserted after the end of transmission for TCMPVAL2 baud-times + 0x00000007 + + + + + + + CTRLX + Control Register Extended + 0x064 + 32 + read-write + 0x00000000 + 0x0000000F + + + DBGHALT + Debug halt + 0 + 1 + read-write + + + CTSINV + CTS Pin Inversion + 1 + 1 + read-write + + + CTSEN + CTS Function enabled + 2 + 1 + read-write + + + RTSINV + RTS Pin Inversion + 3 + 1 + read-write + + + + + TIMECMP0 + Used to generate interrupts and various delays + 0x068 + 32 + read-write + 0x00000000 + 0x017700FF + + + TCMPVAL + Timer comparator 0. + 0 + 8 + read-write + + + TSTART + Timer start source + 16 + 3 + read-write + + + DISABLE + Comparator 0 is disabled + 0x00000000 + + + TXEOF + Comparator 0 and timer are started at TX end of frame + 0x00000001 + + + TXC + Comparator 0 and timer are started at TX Complete + 0x00000002 + + + RXACT + Comparator 0 and timer are started at RX going Active (default: low) + 0x00000003 + + + RXEOF + Comparator 0 and timer are started at RX end of frame + 0x00000004 + + + + + TSTOP + Source used to disable comparator 0 + 20 + 3 + read-write + + + TCMP0 + Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event + 0x00000000 + + + TXST + Comparator 0 is disabled at the start of transmission + 0x00000001 + + + RXACT + Comparator 0 is disabled on RX going going Active (default: low) + 0x00000002 + + + RXACTN + Comparator 0 is disabled on RX going Inactive + 0x00000003 + + + + + RESTARTEN + Restart Timer on TCMP0 + 24 + 1 + read-write + + + + + TIMECMP1 + Used to generate interrupts and various delays + 0x06C + 32 + read-write + 0x00000000 + 0x017700FF + + + TCMPVAL + Timer comparator 1. + 0 + 8 + read-write + + + TSTART + Timer start source + 16 + 3 + read-write + + + DISABLE + Comparator 1 is disabled + 0x00000000 + + + TXEOF + Comparator 1 and timer are started at TX end of frame + 0x00000001 + + + TXC + Comparator 1 and timer are started at TX Complete + 0x00000002 + + + RXACT + Comparator 1 and timer are started at RX going going Active (default: low) + 0x00000003 + + + RXEOF + Comparator 1 and timer are started at RX end of frame + 0x00000004 + + + + + TSTOP + Source used to disable comparator 1 + 20 + 3 + read-write + + + TCMP1 + Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event + 0x00000000 + + + TXST + Comparator 1 is disabled at TX start TX Engine + 0x00000001 + + + RXACT + Comparator 1 is disabled on RX going going Active (default: low) + 0x00000002 + + + RXACTN + Comparator 1 is disabled on RX going Inactive + 0x00000003 + + + + + RESTARTEN + Restart Timer on TCMP1 + 24 + 1 + read-write + + + + + TIMECMP2 + Used to generate interrupts and various delays + 0x070 + 32 + read-write + 0x00000000 + 0x017700FF + + + TCMPVAL + Timer comparator 2. + 0 + 8 + read-write + + + TSTART + Timer start source + 16 + 3 + read-write + + + DISABLE + Comparator 2 is disabled + 0x00000000 + + + TXEOF + Comparator 2 and timer are started at TX end of frame + 0x00000001 + + + TXC + Comparator 2 and timer are started at TX Complete + 0x00000002 + + + RXACT + Comparator 2 and timer are started at RX going going Active (default: low) + 0x00000003 + + + RXEOF + Comparator 2 and timer are started at RX end of frame + 0x00000004 + + + + + TSTOP + Source used to disable comparator 2 + 20 + 3 + read-write + + + TCMP2 + Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event + 0x00000000 + + + TXST + Comparator 2 is disabled at TX start TX Engine + 0x00000001 + + + RXACT + Comparator 2 is disabled on RX going going Active (default: low) + 0x00000002 + + + RXACTN + Comparator 2 is disabled on RX going Inactive + 0x00000003 + + + + + RESTARTEN + Restart Timer on TCMP2 + 24 + 1 + read-write + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x074 + 32 + read-write + 0x00000000 + 0x0000003F + + + RXPEN + RX Pin Enable + 0 + 1 + read-write + + + TXPEN + TX Pin Enable + 1 + 1 + read-write + + + CSPEN + CS Pin Enable + 2 + 1 + read-write + + + CLKPEN + CLK Pin Enable + 3 + 1 + read-write + + + CTSPEN + CTS Pin Enable + 4 + 1 + read-write + + + RTSPEN + RTS Pin Enable + 5 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x078 + 32 + read-write + 0x00000000 + 0x3F3F3F3F + + + RXLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + TXLOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CSLOC + I/O Location + 16 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CLKLOC + I/O Location + 24 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + ROUTELOC1 + I/O Routing Location Register + 0x07C + 32 + read-write + 0x00000000 + 0x00003F3F + + + CTSLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + RTSLOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + + + USART1 + 1.6 + USART1 + 0x40010400 + + 0 + 0x00000400 + registers + + + USART1_RX + 19 + + + USART1_TX + 20 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0xF3FFFF7F + + + SYNC + USART Synchronous Mode + 0 + 1 + read-write + + + LOOPBK + Loopback Enable + 1 + 1 + read-write + + + CCEN + Collision Check Enable + 2 + 1 + read-write + + + MPM + Multi-Processor Mode + 3 + 1 + read-write + + + MPAB + Multi-Processor Address-Bit + 4 + 1 + read-write + + + OVS + Oversampling + 5 + 2 + read-write + + + X16 + Regular UART mode with 16X oversampling in asynchronous mode + 0x00000000 + + + X8 + Double speed with 8X oversampling in asynchronous mode + 0x00000001 + + + X6 + 6X oversampling in asynchronous mode + 0x00000002 + + + X4 + Quadruple speed with 4X oversampling in asynchronous mode + 0x00000003 + + + + + CLKPOL + Clock Polarity + 8 + 1 + read-write + + + CLKPHA + Clock Edge For Setup/Sample + 9 + 1 + read-write + + + MSBF + Most Significant Bit First + 10 + 1 + read-write + + + CSMA + Action On Slave-Select In Master Mode + 11 + 1 + read-write + + + TXBIL + TX Buffer Interrupt Level + 12 + 1 + read-write + + + RXINV + Receiver Input Invert + 13 + 1 + read-write + + + TXINV + Transmitter output Invert + 14 + 1 + read-write + + + CSINV + Chip Select Invert + 15 + 1 + read-write + + + AUTOCS + Automatic Chip Select + 16 + 1 + read-write + + + AUTOTRI + Automatic TX Tristate + 17 + 1 + read-write + + + SCMODE + SmartCard Mode + 18 + 1 + read-write + + + SCRETRANS + SmartCard Retransmit + 19 + 1 + read-write + + + SKIPPERRF + Skip Parity Error Frames + 20 + 1 + read-write + + + BIT8DV + Bit 8 Default Value + 21 + 1 + read-write + + + ERRSDMA + Halt DMA On Error + 22 + 1 + read-write + + + ERRSRX + Disable RX On Error + 23 + 1 + read-write + + + ERRSTX + Disable TX On Error + 24 + 1 + read-write + + + SSSEARLY + Synchronous Slave Setup Early + 25 + 1 + read-write + + + BYTESWAP + Byteswap In Double Accesses + 28 + 1 + read-write + + + AUTOTX + Always Transmit When RX Not Full + 29 + 1 + read-write + + + MVDIS + Majority Vote Disable + 30 + 1 + read-write + + + SMSDELAY + Synchronous Master Sample Delay + 31 + 1 + read-write + + + + + FRAME + USART Frame Format Register + 0x004 + 32 + read-write + 0x00001005 + 0x0000330F + + + DATABITS + Data-Bit Mode + 0 + 4 + read-write + + + FOUR + Each frame contains 4 data bits + 0x00000001 + + + FIVE + Each frame contains 5 data bits + 0x00000002 + + + SIX + Each frame contains 6 data bits + 0x00000003 + + + SEVEN + Each frame contains 7 data bits + 0x00000004 + + + EIGHT + Each frame contains 8 data bits + 0x00000005 + + + NINE + Each frame contains 9 data bits + 0x00000006 + + + TEN + Each frame contains 10 data bits + 0x00000007 + + + ELEVEN + Each frame contains 11 data bits + 0x00000008 + + + TWELVE + Each frame contains 12 data bits + 0x00000009 + + + THIRTEEN + Each frame contains 13 data bits + 0x0000000A + + + FOURTEEN + Each frame contains 14 data bits + 0x0000000B + + + FIFTEEN + Each frame contains 15 data bits + 0x0000000C + + + SIXTEEN + Each frame contains 16 data bits + 0x0000000D + + + + + PARITY + Parity-Bit Mode + 8 + 2 + read-write + + + NONE + Parity bits are not used + 0x00000000 + + + EVEN + Even parity are used. Parity bits are automatically generated and checked by hardware. + 0x00000002 + + + ODD + Odd parity is used. Parity bits are automatically generated and checked by hardware. + 0x00000003 + + + + + STOPBITS + Stop-Bit Mode + 12 + 2 + read-write + + + HALF + The transmitter generates a half stop bit. Stop-bits are not verified by receiver + 0x00000000 + + + ONE + One stop bit is generated and verified + 0x00000001 + + + ONEANDAHALF + The transmitter generates one and a half stop bit. The receiver verifies the first stop bit + 0x00000002 + + + TWO + The transmitter generates two stop bits. The receiver checks the first stop-bit only + 0x00000003 + + + + + + + TRIGCTRL + USART Trigger Control register + 0x008 + 32 + read-write + 0x00000000 + 0x000F1FF0 + + + RXTEN + Receive Trigger Enable + 4 + 1 + read-write + + + TXTEN + Transmit Trigger Enable + 5 + 1 + read-write + + + AUTOTXTEN + AUTOTX Trigger Enable + 6 + 1 + read-write + + + TXARX0EN + Enable Transmit Trigger after RX End of Frame plus TCMP0VAL + 7 + 1 + read-write + + + TXARX1EN + Enable Transmit Trigger after RX End of Frame plus TCMP1VAL + 8 + 1 + read-write + + + TXARX2EN + Enable Transmit Trigger after RX End of Frame plus TCMP2VAL + 9 + 1 + read-write + + + RXATX0EN + Enable Receive Trigger after TX end of frame plus TCMPVAL0 baud-times + 10 + 1 + read-write + + + RXATX1EN + Enable Receive Trigger after TX end of frame plus TCMPVAL1 baud-times + 11 + 1 + read-write + + + RXATX2EN + Enable Receive Trigger after TX end of frame plus TCMPVAL2 baud-times + 12 + 1 + read-write + + + TSEL + Trigger PRS Channel Select + 16 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + + + CMD + Command Register + 0x00C + 32 + write-only + 0x00000000 + 0x00000FFF + + + RXEN + Receiver Enable + 0 + 1 + write-only + + + RXDIS + Receiver Disable + 1 + 1 + write-only + + + TXEN + Transmitter Enable + 2 + 1 + write-only + + + TXDIS + Transmitter Disable + 3 + 1 + write-only + + + MASTEREN + Master Enable + 4 + 1 + write-only + + + MASTERDIS + Master Disable + 5 + 1 + write-only + + + RXBLOCKEN + Receiver Block Enable + 6 + 1 + write-only + + + RXBLOCKDIS + Receiver Block Disable + 7 + 1 + write-only + + + TXTRIEN + Transmitter Tristate Enable + 8 + 1 + write-only + + + TXTRIDIS + Transmitter Tristate Disable + 9 + 1 + write-only + + + CLEARTX + Clear TX + 10 + 1 + write-only + + + CLEARRX + Clear RX + 11 + 1 + write-only + + + + + STATUS + USART Status Register + 0x010 + 32 + read-only + 0x00002040 + 0x00037FFF + + + RXENS + Receiver Enable Status + 0 + 1 + read-only + + + TXENS + Transmitter Enable Status + 1 + 1 + read-only + + + MASTER + SPI Master Mode + 2 + 1 + read-only + + + RXBLOCK + Block Incoming Data + 3 + 1 + read-only + + + TXTRI + Transmitter Tristated + 4 + 1 + read-only + + + TXC + TX Complete + 5 + 1 + read-only + + + TXBL + TX Buffer Level + 6 + 1 + read-only + + + RXDATAV + RX Data Valid + 7 + 1 + read-only + + + RXFULL + RX FIFO Full + 8 + 1 + read-only + + + TXBDRIGHT + TX Buffer Expects Double Right Data + 9 + 1 + read-only + + + TXBSRIGHT + TX Buffer Expects Single Right Data + 10 + 1 + read-only + + + RXDATAVRIGHT + RX Data Right + 11 + 1 + read-only + + + RXFULLRIGHT + RX Full of Right Data + 12 + 1 + read-only + + + TXIDLE + TX Idle + 13 + 1 + read-only + + + TIMERRESTARTED + The USART Timer restarted itself + 14 + 1 + read-only + + + TXBUFCNT + TX Buffer Count + 16 + 2 + read-only + + + + + CLKDIV + Clock Control Register + 0x014 + 32 + read-write + 0x00000000 + 0x807FFFF8 + + + DIV + Fractional Clock Divider + 3 + 20 + read-write + + + AUTOBAUDEN + AUTOBAUD detection enable + 31 + 1 + read-write + + + + + RXDATAX + RX Buffer Data Extended Register + 0x018 + 32 + read-only + 0x00000000 + 0x0000C1FF + modifyExternal + + + RXDATA + RX Data + 0 + 9 + read-only + + + PERR + Data Parity Error + 14 + 1 + read-only + + + FERR + Data Framing Error + 15 + 1 + read-only + + + + + RXDATA + RX Buffer Data Register + 0x01C + 32 + read-only + 0x00000000 + 0x000000FF + modifyExternal + + + RXDATA + RX Data + 0 + 8 + read-only + + + + + RXDOUBLEX + RX Buffer Double Data Extended Register + 0x020 + 32 + read-only + 0x00000000 + 0xC1FFC1FF + modifyExternal + + + RXDATA0 + RX Data 0 + 0 + 9 + read-only + + + PERR0 + Data Parity Error 0 + 14 + 1 + read-only + + + FERR0 + Data Framing Error 0 + 15 + 1 + read-only + + + RXDATA1 + RX Data 1 + 16 + 9 + read-only + + + PERR1 + Data Parity Error 1 + 30 + 1 + read-only + + + FERR1 + Data Framing Error 1 + 31 + 1 + read-only + + + + + RXDOUBLE + RX FIFO Double Data Register + 0x024 + 32 + read-only + 0x00000000 + 0x0000FFFF + modifyExternal + + + RXDATA0 + RX Data 0 + 0 + 8 + read-only + + + RXDATA1 + RX Data 1 + 8 + 8 + read-only + + + + + RXDATAXP + RX Buffer Data Extended Peek Register + 0x028 + 32 + read-only + 0x00000000 + 0x0000C1FF + + + RXDATAP + RX Data Peek + 0 + 9 + read-only + + + PERRP + Data Parity Error Peek + 14 + 1 + read-only + + + FERRP + Data Framing Error Peek + 15 + 1 + read-only + + + + + RXDOUBLEXP + RX Buffer Double Data Extended Peek Register + 0x02C + 32 + read-only + 0x00000000 + 0xC1FFC1FF + + + RXDATAP0 + RX Data 0 Peek + 0 + 9 + read-only + + + PERRP0 + Data Parity Error 0 Peek + 14 + 1 + read-only + + + FERRP0 + Data Framing Error 0 Peek + 15 + 1 + read-only + + + RXDATAP1 + RX Data 1 Peek + 16 + 9 + read-only + + + PERRP1 + Data Parity Error 1 Peek + 30 + 1 + read-only + + + FERRP1 + Data Framing Error 1 Peek + 31 + 1 + read-only + + + + + TXDATAX + TX Buffer Data Extended Register + 0x030 + 32 + read-write + 0x00000000 + 0x0000F9FF + + + TXDATAX + TX Data + 0 + 9 + read-write + + + UBRXAT + Unblock RX After Transmission + 11 + 1 + read-write + + + TXTRIAT + Set TXTRI After Transmission + 12 + 1 + read-write + + + TXBREAK + Transmit Data As Break + 13 + 1 + read-write + + + TXDISAT + Clear TXEN After Transmission + 14 + 1 + read-write + + + RXENAT + Enable RX After Transmission + 15 + 1 + read-write + + + + + TXDATA + TX Buffer Data Register + 0x034 + 32 + read-write + 0x00000000 + 0x000000FF + + + TXDATA + TX Data + 0 + 8 + read-write + + + + + TXDOUBLEX + TX Buffer Double Data Extended Register + 0x038 + 32 + read-write + 0x00000000 + 0xF9FFF9FF + + + TXDATA0 + TX Data + 0 + 9 + read-write + + + UBRXAT0 + Unblock RX After Transmission + 11 + 1 + read-write + + + TXTRIAT0 + Set TXTRI After Transmission + 12 + 1 + read-write + + + TXBREAK0 + Transmit Data As Break + 13 + 1 + read-write + + + TXDISAT0 + Clear TXEN After Transmission + 14 + 1 + read-write + + + RXENAT0 + Enable RX After Transmission + 15 + 1 + read-write + + + TXDATA1 + TX Data + 16 + 9 + read-write + + + UBRXAT1 + Unblock RX After Transmission + 27 + 1 + read-write + + + TXTRIAT1 + Set TXTRI After Transmission + 28 + 1 + read-write + + + TXBREAK1 + Transmit Data As Break + 29 + 1 + read-write + + + TXDISAT1 + Clear TXEN After Transmission + 30 + 1 + read-write + + + RXENAT1 + Enable RX After Transmission + 31 + 1 + read-write + + + + + TXDOUBLE + TX Buffer Double Data Register + 0x03C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + TXDATA0 + TX Data + 0 + 8 + read-write + + + TXDATA1 + TX Data + 8 + 8 + read-write + + + + + IF + Interrupt Flag Register + 0x040 + 32 + read-only + 0x00000002 + 0x0001FFFF + + + TXC + TX Complete Interrupt Flag + 0 + 1 + read-only + + + TXBL + TX Buffer Level Interrupt Flag + 1 + 1 + read-only + + + RXDATAV + RX Data Valid Interrupt Flag + 2 + 1 + read-only + + + RXFULL + RX Buffer Full Interrupt Flag + 3 + 1 + read-only + + + RXOF + RX Overflow Interrupt Flag + 4 + 1 + read-only + + + RXUF + RX Underflow Interrupt Flag + 5 + 1 + read-only + + + TXOF + TX Overflow Interrupt Flag + 6 + 1 + read-only + + + TXUF + TX Underflow Interrupt Flag + 7 + 1 + read-only + + + PERR + Parity Error Interrupt Flag + 8 + 1 + read-only + + + FERR + Framing Error Interrupt Flag + 9 + 1 + read-only + + + MPAF + Multi-Processor Address Frame Interrupt Flag + 10 + 1 + read-only + + + SSM + Slave-Select In Master Mode Interrupt Flag + 11 + 1 + read-only + + + CCF + Collision Check Fail Interrupt Flag + 12 + 1 + read-only + + + TXIDLE + TX Idle Interrupt Flag + 13 + 1 + read-only + + + TCMP0 + Timer comparator 0 Interrupt Flag + 14 + 1 + read-only + + + TCMP1 + Timer comparator 1 Interrupt Flag + 15 + 1 + read-only + + + TCMP2 + Timer comparator 2 Interrupt Flag + 16 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x044 + 32 + write-only + 0x00000000 + 0x0001FFF9 + + + TXC + Set TXC Interrupt Flag + 0 + 1 + write-only + + + RXFULL + Set RXFULL Interrupt Flag + 3 + 1 + write-only + + + RXOF + Set RXOF Interrupt Flag + 4 + 1 + write-only + + + RXUF + Set RXUF Interrupt Flag + 5 + 1 + write-only + + + TXOF + Set TXOF Interrupt Flag + 6 + 1 + write-only + + + TXUF + Set TXUF Interrupt Flag + 7 + 1 + write-only + + + PERR + Set PERR Interrupt Flag + 8 + 1 + write-only + + + FERR + Set FERR Interrupt Flag + 9 + 1 + write-only + + + MPAF + Set MPAF Interrupt Flag + 10 + 1 + write-only + + + SSM + Set SSM Interrupt Flag + 11 + 1 + write-only + + + CCF + Set CCF Interrupt Flag + 12 + 1 + write-only + + + TXIDLE + Set TXIDLE Interrupt Flag + 13 + 1 + write-only + + + TCMP0 + Set TCMP0 Interrupt Flag + 14 + 1 + write-only + + + TCMP1 + Set TCMP1 Interrupt Flag + 15 + 1 + write-only + + + TCMP2 + Set TCMP2 Interrupt Flag + 16 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x048 + 32 + write-only + 0x00000000 + 0x0001FFF9 + + + TXC + Clear TXC Interrupt Flag + 0 + 1 + write-only + + + RXFULL + Clear RXFULL Interrupt Flag + 3 + 1 + write-only + + + RXOF + Clear RXOF Interrupt Flag + 4 + 1 + write-only + + + RXUF + Clear RXUF Interrupt Flag + 5 + 1 + write-only + + + TXOF + Clear TXOF Interrupt Flag + 6 + 1 + write-only + + + TXUF + Clear TXUF Interrupt Flag + 7 + 1 + write-only + + + PERR + Clear PERR Interrupt Flag + 8 + 1 + write-only + + + FERR + Clear FERR Interrupt Flag + 9 + 1 + write-only + + + MPAF + Clear MPAF Interrupt Flag + 10 + 1 + write-only + + + SSM + Clear SSM Interrupt Flag + 11 + 1 + write-only + + + CCF + Clear CCF Interrupt Flag + 12 + 1 + write-only + + + TXIDLE + Clear TXIDLE Interrupt Flag + 13 + 1 + write-only + + + TCMP0 + Clear TCMP0 Interrupt Flag + 14 + 1 + write-only + + + TCMP1 + Clear TCMP1 Interrupt Flag + 15 + 1 + write-only + + + TCMP2 + Clear TCMP2 Interrupt Flag + 16 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x04C + 32 + read-write + 0x00000000 + 0x0001FFFF + + + TXC + TXC Interrupt Enable + 0 + 1 + read-write + + + TXBL + TXBL Interrupt Enable + 1 + 1 + read-write + + + RXDATAV + RXDATAV Interrupt Enable + 2 + 1 + read-write + + + RXFULL + RXFULL Interrupt Enable + 3 + 1 + read-write + + + RXOF + RXOF Interrupt Enable + 4 + 1 + read-write + + + RXUF + RXUF Interrupt Enable + 5 + 1 + read-write + + + TXOF + TXOF Interrupt Enable + 6 + 1 + read-write + + + TXUF + TXUF Interrupt Enable + 7 + 1 + read-write + + + PERR + PERR Interrupt Enable + 8 + 1 + read-write + + + FERR + FERR Interrupt Enable + 9 + 1 + read-write + + + MPAF + MPAF Interrupt Enable + 10 + 1 + read-write + + + SSM + SSM Interrupt Enable + 11 + 1 + read-write + + + CCF + CCF Interrupt Enable + 12 + 1 + read-write + + + TXIDLE + TXIDLE Interrupt Enable + 13 + 1 + read-write + + + TCMP0 + TCMP0 Interrupt Enable + 14 + 1 + read-write + + + TCMP1 + TCMP1 Interrupt Enable + 15 + 1 + read-write + + + TCMP2 + TCMP2 Interrupt Enable + 16 + 1 + read-write + + + + + IRCTRL + IrDA Control Register + 0x050 + 32 + read-write + 0x00000000 + 0x00000F8F + + + IREN + Enable IrDA Module + 0 + 1 + read-write + + + IRPW + IrDA TX Pulse Width + 1 + 2 + read-write + + + ONE + IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 + 0x00000000 + + + TWO + IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 + 0x00000001 + + + THREE + IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 + 0x00000002 + + + FOUR + IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 + 0x00000003 + + + + + IRFILT + IrDA RX Filter + 3 + 1 + read-write + + + IRPRSEN + IrDA PRS Channel Enable + 7 + 1 + read-write + + + IRPRSSEL + IrDA PRS Channel Select + 8 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + + + INPUT + USART Input Register + 0x058 + 32 + read-write + 0x00000000 + 0x00008F8F + + + RXPRSSEL + RX PRS Channel Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + RXPRS + PRS RX Enable + 7 + 1 + read-write + + + CLKPRSSEL + CLK PRS Channel Select + 8 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + CLKPRS + PRS CLK Enable + 15 + 1 + read-write + + + + + I2SCTRL + I2S Control Register + 0x05C + 32 + read-write + 0x00000000 + 0x0000071F + + + EN + Enable I2S Mode + 0 + 1 + read-write + + + MONO + Stero or Mono + 1 + 1 + read-write + + + JUSTIFY + Justification of I2S Data + 2 + 1 + read-write + + + DMASPLIT + Separate DMA Request For Left/Right Data + 3 + 1 + read-write + + + DELAY + Delay on I2S data + 4 + 1 + read-write + + + FORMAT + I2S Word Format + 8 + 3 + read-write + + + W32D32 + 32-bit word, 32-bit data + 0x00000000 + + + W32D24M + 32-bit word, 32-bit data with 8 lsb masked + 0x00000001 + + + W32D24 + 32-bit word, 24-bit data + 0x00000002 + + + W32D16 + 32-bit word, 16-bit data + 0x00000003 + + + W32D8 + 32-bit word, 8-bit data + 0x00000004 + + + W16D16 + 16-bit word, 16-bit data + 0x00000005 + + + W16D8 + 16-bit word, 8-bit data + 0x00000006 + + + W8D8 + 8-bit word, 8-bit data + 0x00000007 + + + + + + + TIMING + Timing Register + 0x060 + 32 + read-write + 0x00000000 + 0x77770000 + + + TXDELAY + TX frame start delay + 16 + 3 + read-write + + + DISABLE + Disable - TXDELAY in USARTn_CTRL can be used for legacy + 0x00000000 + + + ONE + Start of transmission is delayed for 1 baud-times + 0x00000001 + + + TWO + Start of transmission is delayed for 2 baud-times + 0x00000002 + + + THREE + Start of transmission is delayed for 3 baud-times + 0x00000003 + + + SEVEN + Start of transmission is delayed for 7 baud-times + 0x00000004 + + + TCMP0 + Start of transmission is delayed for TCMPVAL0 baud-times + 0x00000005 + + + TCMP1 + Start of transmission is delayed for TCMPVAL1 baud-times + 0x00000006 + + + TCMP2 + Start of transmission is delayed for TCMPVAL2 baud-times + 0x00000007 + + + + + CSSETUP + Chip Select Setup + 20 + 3 + read-write + + + ZERO + CS is not asserted before start of transmission + 0x00000000 + + + ONE + CS is asserted for 1 baud-times before start of transmission + 0x00000001 + + + TWO + CS is asserted for 2 baud-times before start of transmission + 0x00000002 + + + THREE + CS is asserted for 3 baud-times before start of transmission + 0x00000003 + + + SEVEN + CS is asserted for 7 baud-times before start of transmission + 0x00000004 + + + TCMP0 + CS is asserted before the start of transmission for TCMPVAL0 baud-times + 0x00000005 + + + TCMP1 + CS is asserted before the start of transmission for TCMPVAL1 baud-times + 0x00000006 + + + TCMP2 + CS is asserted before the start of transmission for TCMPVAL2 baud-times + 0x00000007 + + + + + ICS + Inter-character spacing + 24 + 3 + read-write + + + ZERO + There is no space between charcters + 0x00000000 + + + ONE + Create a space of 1 baud-times before start of transmission + 0x00000001 + + + TWO + Create a space of 2 baud-times before start of transmission + 0x00000002 + + + THREE + Create a space of 3 baud-times before start of transmission + 0x00000003 + + + SEVEN + Create a space of 7 baud-times before start of transmission + 0x00000004 + + + TCMP0 + Create a space of before the start of transmission for TCMPVAL0 baud-times + 0x00000005 + + + TCMP1 + Create a space of before the start of transmission for TCMPVAL1 baud-times + 0x00000006 + + + TCMP2 + Create a space of before the start of transmission for TCMPVAL2 baud-times + 0x00000007 + + + + + CSHOLD + Chip Select Hold + 28 + 3 + read-write + + + ZERO + Disable CS being asserted after the end of transmission + 0x00000000 + + + ONE + CS is asserted for 1 baud-times after the end of transmission + 0x00000001 + + + TWO + CS is asserted for 2 baud-times after the end of transmission + 0x00000002 + + + THREE + CS is asserted for 3 baud-times after the end of transmission + 0x00000003 + + + SEVEN + CS is asserted for 7 baud-times after the end of transmission + 0x00000004 + + + TCMP0 + CS is asserted after the end of transmission for TCMPVAL0 baud-times + 0x00000005 + + + TCMP1 + CS is asserted after the end of transmission for TCMPVAL1 baud-times + 0x00000006 + + + TCMP2 + CS is asserted after the end of transmission for TCMPVAL2 baud-times + 0x00000007 + + + + + + + CTRLX + Control Register Extended + 0x064 + 32 + read-write + 0x00000000 + 0x0000000F + + + DBGHALT + Debug halt + 0 + 1 + read-write + + + CTSINV + CTS Pin Inversion + 1 + 1 + read-write + + + CTSEN + CTS Function enabled + 2 + 1 + read-write + + + RTSINV + RTS Pin Inversion + 3 + 1 + read-write + + + + + TIMECMP0 + Used to generate interrupts and various delays + 0x068 + 32 + read-write + 0x00000000 + 0x017700FF + + + TCMPVAL + Timer comparator 0. + 0 + 8 + read-write + + + TSTART + Timer start source + 16 + 3 + read-write + + + DISABLE + Comparator 0 is disabled + 0x00000000 + + + TXEOF + Comparator 0 and timer are started at TX end of frame + 0x00000001 + + + TXC + Comparator 0 and timer are started at TX Complete + 0x00000002 + + + RXACT + Comparator 0 and timer are started at RX going Active (default: low) + 0x00000003 + + + RXEOF + Comparator 0 and timer are started at RX end of frame + 0x00000004 + + + + + TSTOP + Source used to disable comparator 0 + 20 + 3 + read-write + + + TCMP0 + Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event + 0x00000000 + + + TXST + Comparator 0 is disabled at the start of transmission + 0x00000001 + + + RXACT + Comparator 0 is disabled on RX going going Active (default: low) + 0x00000002 + + + RXACTN + Comparator 0 is disabled on RX going Inactive + 0x00000003 + + + + + RESTARTEN + Restart Timer on TCMP0 + 24 + 1 + read-write + + + + + TIMECMP1 + Used to generate interrupts and various delays + 0x06C + 32 + read-write + 0x00000000 + 0x017700FF + + + TCMPVAL + Timer comparator 1. + 0 + 8 + read-write + + + TSTART + Timer start source + 16 + 3 + read-write + + + DISABLE + Comparator 1 is disabled + 0x00000000 + + + TXEOF + Comparator 1 and timer are started at TX end of frame + 0x00000001 + + + TXC + Comparator 1 and timer are started at TX Complete + 0x00000002 + + + RXACT + Comparator 1 and timer are started at RX going going Active (default: low) + 0x00000003 + + + RXEOF + Comparator 1 and timer are started at RX end of frame + 0x00000004 + + + + + TSTOP + Source used to disable comparator 1 + 20 + 3 + read-write + + + TCMP1 + Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event + 0x00000000 + + + TXST + Comparator 1 is disabled at TX start TX Engine + 0x00000001 + + + RXACT + Comparator 1 is disabled on RX going going Active (default: low) + 0x00000002 + + + RXACTN + Comparator 1 is disabled on RX going Inactive + 0x00000003 + + + + + RESTARTEN + Restart Timer on TCMP1 + 24 + 1 + read-write + + + + + TIMECMP2 + Used to generate interrupts and various delays + 0x070 + 32 + read-write + 0x00000000 + 0x017700FF + + + TCMPVAL + Timer comparator 2. + 0 + 8 + read-write + + + TSTART + Timer start source + 16 + 3 + read-write + + + DISABLE + Comparator 2 is disabled + 0x00000000 + + + TXEOF + Comparator 2 and timer are started at TX end of frame + 0x00000001 + + + TXC + Comparator 2 and timer are started at TX Complete + 0x00000002 + + + RXACT + Comparator 2 and timer are started at RX going going Active (default: low) + 0x00000003 + + + RXEOF + Comparator 2 and timer are started at RX end of frame + 0x00000004 + + + + + TSTOP + Source used to disable comparator 2 + 20 + 3 + read-write + + + TCMP2 + Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event + 0x00000000 + + + TXST + Comparator 2 is disabled at TX start TX Engine + 0x00000001 + + + RXACT + Comparator 2 is disabled on RX going going Active (default: low) + 0x00000002 + + + RXACTN + Comparator 2 is disabled on RX going Inactive + 0x00000003 + + + + + RESTARTEN + Restart Timer on TCMP2 + 24 + 1 + read-write + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x074 + 32 + read-write + 0x00000000 + 0x0000003F + + + RXPEN + RX Pin Enable + 0 + 1 + read-write + + + TXPEN + TX Pin Enable + 1 + 1 + read-write + + + CSPEN + CS Pin Enable + 2 + 1 + read-write + + + CLKPEN + CLK Pin Enable + 3 + 1 + read-write + + + CTSPEN + CTS Pin Enable + 4 + 1 + read-write + + + RTSPEN + RTS Pin Enable + 5 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x078 + 32 + read-write + 0x00000000 + 0x3F3F3F3F + + + RXLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + TXLOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CSLOC + I/O Location + 16 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + CLKLOC + I/O Location + 24 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + ROUTELOC1 + I/O Routing Location Register + 0x07C + 32 + read-write + 0x00000000 + 0x00003F3F + + + CTSLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + RTSLOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + + + LEUART0 + 1.6 + LEUART0 + 0x4004A000 + + 0 + 0x00000400 + registers + + + LEUART0 + 21 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + AUTOTRI + Automatic Transmitter Tristate + 0 + 1 + read-write + + + DATABITS + Data-Bit Mode + 1 + 1 + read-write + + + PARITY + Parity-Bit Mode + 2 + 2 + read-write + + + NONE + Parity bits are not used + 0x00000000 + + + EVEN + Even parity are used. Parity bits are automatically generated and checked by hardware. + 0x00000002 + + + ODD + Odd parity is used. Parity bits are automatically generated and checked by hardware. + 0x00000003 + + + + + STOPBITS + Stop-Bit Mode + 4 + 1 + read-write + + + INV + Invert Input And Output + 5 + 1 + read-write + + + ERRSDMA + Clear RX DMA On Error + 6 + 1 + read-write + + + LOOPBK + Loopback Enable + 7 + 1 + read-write + + + SFUBRX + Start-Frame UnBlock RX + 8 + 1 + read-write + + + MPM + Multi-Processor Mode + 9 + 1 + read-write + + + MPAB + Multi-Processor Address-Bit + 10 + 1 + read-write + + + BIT8DV + Bit 8 Default Value + 11 + 1 + read-write + + + RXDMAWU + RX DMA Wakeup + 12 + 1 + read-write + + + TXDMAWU + TX DMA Wakeup + 13 + 1 + read-write + + + TXDELAY + TX Delay Transmission + 14 + 2 + read-write + + + NONE + Frames are transmitted immediately + 0x00000000 + + + SINGLE + Transmission of new frames are delayed by a single baud period + 0x00000001 + + + DOUBLE + Transmission of new frames are delayed by two baud periods + 0x00000002 + + + TRIPLE + Transmission of new frames are delayed by three baud periods + 0x00000003 + + + + + + + CMD + Command Register + 0x004 + 32 + write-only + 0x00000000 + 0x000000FF + + + RXEN + Receiver Enable + 0 + 1 + write-only + + + RXDIS + Receiver Disable + 1 + 1 + write-only + + + TXEN + Transmitter Enable + 2 + 1 + write-only + + + TXDIS + Transmitter Disable + 3 + 1 + write-only + + + RXBLOCKEN + Receiver Block Enable + 4 + 1 + write-only + + + RXBLOCKDIS + Receiver Block Disable + 5 + 1 + write-only + + + CLEARTX + Clear TX + 6 + 1 + write-only + + + CLEARRX + Clear RX + 7 + 1 + write-only + + + + + STATUS + Status Register + 0x008 + 32 + read-only + 0x00000050 + 0x0000007F + + + RXENS + Receiver Enable Status + 0 + 1 + read-only + + + TXENS + Transmitter Enable Status + 1 + 1 + read-only + + + RXBLOCK + Block Incoming Data + 2 + 1 + read-only + + + TXC + TX Complete + 3 + 1 + read-only + + + TXBL + TX Buffer Level + 4 + 1 + read-only + + + RXDATAV + RX Data Valid + 5 + 1 + read-only + + + TXIDLE + TX Idle + 6 + 1 + read-only + + + + + CLKDIV + Clock Control Register + 0x00C + 32 + read-write + 0x00000000 + 0x0001FFF8 + + + DIV + Fractional Clock Divider + 3 + 14 + read-write + + + + + STARTFRAME + Start Frame Register + 0x010 + 32 + read-write + 0x00000000 + 0x000001FF + + + STARTFRAME + Start Frame + 0 + 9 + read-write + + + + + SIGFRAME + Signal Frame Register + 0x014 + 32 + read-write + 0x00000000 + 0x000001FF + + + SIGFRAME + Signal Frame + 0 + 9 + read-write + + + + + RXDATAX + Receive Buffer Data Extended Register + 0x018 + 32 + read-only + 0x00000000 + 0x0000C1FF + modifyExternal + + + RXDATA + RX Data + 0 + 9 + read-only + + + PERR + Receive Data Parity Error + 14 + 1 + read-only + + + FERR + Receive Data Framing Error + 15 + 1 + read-only + + + + + RXDATA + Receive Buffer Data Register + 0x01C + 32 + read-only + 0x00000000 + 0x000000FF + modifyExternal + + + RXDATA + RX Data + 0 + 8 + read-only + + + + + RXDATAXP + Receive Buffer Data Extended Peek Register + 0x020 + 32 + read-only + 0x00000000 + 0x0000C1FF + + + RXDATAP + RX Data Peek + 0 + 9 + read-only + + + PERRP + Receive Data Parity Error Peek + 14 + 1 + read-only + + + FERRP + Receive Data Framing Error Peek + 15 + 1 + read-only + + + + + TXDATAX + Transmit Buffer Data Extended Register + 0x024 + 32 + read-write + 0x00000000 + 0x0000E1FF + + + TXDATA + TX Data + 0 + 9 + read-write + + + TXBREAK + Transmit Data As Break + 13 + 1 + read-write + + + TXDISAT + Disable TX After Transmission + 14 + 1 + read-write + + + RXENAT + Enable RX After Transmission + 15 + 1 + read-write + + + + + TXDATA + Transmit Buffer Data Register + 0x028 + 32 + read-write + 0x00000000 + 0x000000FF + + + TXDATA + TX Data + 0 + 8 + read-write + + + + + IF + Interrupt Flag Register + 0x02C + 32 + read-only + 0x00000002 + 0x000007FF + + + TXC + TX Complete Interrupt Flag + 0 + 1 + read-only + + + TXBL + TX Buffer Level Interrupt Flag + 1 + 1 + read-only + + + RXDATAV + RX Data Valid Interrupt Flag + 2 + 1 + read-only + + + RXOF + RX Overflow Interrupt Flag + 3 + 1 + read-only + + + RXUF + RX Underflow Interrupt Flag + 4 + 1 + read-only + + + TXOF + TX Overflow Interrupt Flag + 5 + 1 + read-only + + + PERR + Parity Error Interrupt Flag + 6 + 1 + read-only + + + FERR + Framing Error Interrupt Flag + 7 + 1 + read-only + + + MPAF + Multi-Processor Address Frame Interrupt Flag + 8 + 1 + read-only + + + STARTF + Start Frame Interrupt Flag + 9 + 1 + read-only + + + SIGF + Signal Frame Interrupt Flag + 10 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x030 + 32 + write-only + 0x00000000 + 0x000007F9 + + + TXC + Set TXC Interrupt Flag + 0 + 1 + write-only + + + RXOF + Set RXOF Interrupt Flag + 3 + 1 + write-only + + + RXUF + Set RXUF Interrupt Flag + 4 + 1 + write-only + + + TXOF + Set TXOF Interrupt Flag + 5 + 1 + write-only + + + PERR + Set PERR Interrupt Flag + 6 + 1 + write-only + + + FERR + Set FERR Interrupt Flag + 7 + 1 + write-only + + + MPAF + Set MPAF Interrupt Flag + 8 + 1 + write-only + + + STARTF + Set STARTF Interrupt Flag + 9 + 1 + write-only + + + SIGF + Set SIGF Interrupt Flag + 10 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x034 + 32 + write-only + 0x00000000 + 0x000007F9 + + + TXC + Clear TXC Interrupt Flag + 0 + 1 + write-only + + + RXOF + Clear RXOF Interrupt Flag + 3 + 1 + write-only + + + RXUF + Clear RXUF Interrupt Flag + 4 + 1 + write-only + + + TXOF + Clear TXOF Interrupt Flag + 5 + 1 + write-only + + + PERR + Clear PERR Interrupt Flag + 6 + 1 + write-only + + + FERR + Clear FERR Interrupt Flag + 7 + 1 + write-only + + + MPAF + Clear MPAF Interrupt Flag + 8 + 1 + write-only + + + STARTF + Clear STARTF Interrupt Flag + 9 + 1 + write-only + + + SIGF + Clear SIGF Interrupt Flag + 10 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x038 + 32 + read-write + 0x00000000 + 0x000007FF + + + TXC + TXC Interrupt Enable + 0 + 1 + read-write + + + TXBL + TXBL Interrupt Enable + 1 + 1 + read-write + + + RXDATAV + RXDATAV Interrupt Enable + 2 + 1 + read-write + + + RXOF + RXOF Interrupt Enable + 3 + 1 + read-write + + + RXUF + RXUF Interrupt Enable + 4 + 1 + read-write + + + TXOF + TXOF Interrupt Enable + 5 + 1 + read-write + + + PERR + PERR Interrupt Enable + 6 + 1 + read-write + + + FERR + FERR Interrupt Enable + 7 + 1 + read-write + + + MPAF + MPAF Interrupt Enable + 8 + 1 + read-write + + + STARTF + STARTF Interrupt Enable + 9 + 1 + read-write + + + SIGF + SIGF Interrupt Enable + 10 + 1 + read-write + + + + + PULSECTRL + Pulse Control Register + 0x03C + 32 + read-write + 0x00000000 + 0x0000003F + + + PULSEW + Pulse Width + 0 + 4 + read-write + + + PULSEEN + Pulse Generator/Extender Enable + 4 + 1 + read-write + + + PULSEFILT + Pulse Filter + 5 + 1 + read-write + + + + + FREEZE + Freeze Register + 0x040 + 32 + read-write + 0x00000000 + 0x00000001 + + + REGFREEZE + Register Update Freeze + 0 + 1 + read-write + + + + + SYNCBUSY + Synchronization Busy Register + 0x044 + 32 + read-only + 0x00000000 + 0x000000FF + + + CTRL + CTRL Register Busy + 0 + 1 + read-only + + + CMD + CMD Register Busy + 1 + 1 + read-only + + + CLKDIV + CLKDIV Register Busy + 2 + 1 + read-only + + + STARTFRAME + STARTFRAME Register Busy + 3 + 1 + read-only + + + SIGFRAME + SIGFRAME Register Busy + 4 + 1 + read-only + + + TXDATAX + TXDATAX Register Busy + 5 + 1 + read-only + + + TXDATA + TXDATA Register Busy + 6 + 1 + read-only + + + PULSECTRL + PULSECTRL Register Busy + 7 + 1 + read-only + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x054 + 32 + read-write + 0x00000000 + 0x00000003 + + + RXPEN + RX Pin Enable + 0 + 1 + read-write + + + TXPEN + TX Pin Enable + 1 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x058 + 32 + read-write + 0x00000000 + 0x00003F3F + + + RXLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + TXLOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + INPUT + LEUART Input Register + 0x064 + 32 + read-write + 0x00000000 + 0x0000002F + + + RXPRSSEL + RX PRS Channel Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected + 0x0000000B + + + + + RXPRS + PRS RX Enable + 5 + 1 + read-write + + + + + + + LETIMER0 + 1.6 + LETIMER0 + 0x40046000 + + 0 + 0x00000400 + registers + + + LETIMER0 + 26 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x000013FF + + + REPMODE + Repeat Mode + 0 + 2 + read-write + + + FREE + When started, the LETIMER counts down until it is stopped by software. + 0x00000000 + + + ONESHOT + The counter counts REP0 times. When REP0 reaches zero, the counter stops. + 0x00000001 + + + BUFFERED + The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero. Else the counter stops + 0x00000002 + + + DOUBLE + Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero + 0x00000003 + + + + + UFOA0 + Underflow Output Action 0 + 2 + 2 + read-write + + + NONE + LETn_O0 is held at its idle value as defined by OPOL0. + 0x00000000 + + + TOGGLE + LETn_O0 is toggled on CNT underflow. + 0x00000001 + + + PULSE + LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0. + 0x00000002 + + + PWM + LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1 + 0x00000003 + + + + + UFOA1 + Underflow Output Action 1 + 4 + 2 + read-write + + + NONE + LETn_O1 is held at its idle value as defined by OPOL1. + 0x00000000 + + + TOGGLE + LETn_O1 is toggled on CNT underflow. + 0x00000001 + + + PULSE + LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1. + 0x00000002 + + + PWM + LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1 + 0x00000003 + + + + + OPOL0 + Output 0 Polarity + 6 + 1 + read-write + + + OPOL1 + Output 1 Polarity + 7 + 1 + read-write + + + BUFTOP + Buffered Top + 8 + 1 + read-write + + + COMP0TOP + Compare Value 0 Is Top Value + 9 + 1 + read-write + + + DEBUGRUN + Debug Mode Run Enable + 12 + 1 + read-write + + + + + CMD + Command Register + 0x004 + 32 + write-only + 0x00000000 + 0x0000001F + + + START + Start LETIMER + 0 + 1 + write-only + + + STOP + Stop LETIMER + 1 + 1 + write-only + + + CLEAR + Clear LETIMER + 2 + 1 + write-only + + + CTO0 + Clear Toggle Output 0 + 3 + 1 + write-only + + + CTO1 + Clear Toggle Output 1 + 4 + 1 + write-only + + + + + STATUS + Status Register + 0x008 + 32 + read-only + 0x00000000 + 0x00000001 + + + RUNNING + LETIMER Running + 0 + 1 + read-only + + + + + CNT + Counter Value Register + 0x00C + 32 + read-write + 0x00000000 + 0x0000FFFF + + + CNT + Counter Value + 0 + 16 + read-write + + + + + COMP0 + Compare Value Register 0 + 0x010 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + COMP0 + Compare Value 0 + 0 + 16 + read-write + + + + + COMP1 + Compare Value Register 1 + 0x014 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + COMP1 + Compare Value 1 + 0 + 16 + read-write + + + + + REP0 + Repeat Counter Register 0 + 0x018 + 32 + read-write + 0x00000000 + 0x000000FF + + + REP0 + Repeat Counter 0 + 0 + 8 + read-write + + + + + REP1 + Repeat Counter Register 1 + 0x01C + 32 + read-write + 0x00000000 + 0x000000FF + + + REP1 + Repeat Counter 1 + 0 + 8 + read-write + + + + + IF + Interrupt Flag Register + 0x020 + 32 + read-only + 0x00000000 + 0x0000001F + + + COMP0 + Compare Match 0 Interrupt Flag + 0 + 1 + read-only + + + COMP1 + Compare Match 1 Interrupt Flag + 1 + 1 + read-only + + + UF + Underflow Interrupt Flag + 2 + 1 + read-only + + + REP0 + Repeat Counter 0 Interrupt Flag + 3 + 1 + read-only + + + REP1 + Repeat Counter 1 Interrupt Flag + 4 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x024 + 32 + write-only + 0x00000000 + 0x0000001F + + + COMP0 + Set COMP0 Interrupt Flag + 0 + 1 + write-only + + + COMP1 + Set COMP1 Interrupt Flag + 1 + 1 + write-only + + + UF + Set UF Interrupt Flag + 2 + 1 + write-only + + + REP0 + Set REP0 Interrupt Flag + 3 + 1 + write-only + + + REP1 + Set REP1 Interrupt Flag + 4 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x028 + 32 + write-only + 0x00000000 + 0x0000001F + + + COMP0 + Clear COMP0 Interrupt Flag + 0 + 1 + write-only + + + COMP1 + Clear COMP1 Interrupt Flag + 1 + 1 + write-only + + + UF + Clear UF Interrupt Flag + 2 + 1 + write-only + + + REP0 + Clear REP0 Interrupt Flag + 3 + 1 + write-only + + + REP1 + Clear REP1 Interrupt Flag + 4 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x02C + 32 + read-write + 0x00000000 + 0x0000001F + + + COMP0 + COMP0 Interrupt Enable + 0 + 1 + read-write + + + COMP1 + COMP1 Interrupt Enable + 1 + 1 + read-write + + + UF + UF Interrupt Enable + 2 + 1 + read-write + + + REP0 + REP0 Interrupt Enable + 3 + 1 + read-write + + + REP1 + REP1 Interrupt Enable + 4 + 1 + read-write + + + + + SYNCBUSY + Synchronization Busy Register + 0x034 + 32 + read-only + 0x00000000 + 0x00000002 + + + CMD + CMD Register Busy + 1 + 1 + read-only + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x040 + 32 + read-write + 0x00000000 + 0x00000003 + + + OUT0PEN + Output 0 Pin Enable + 0 + 1 + read-write + + + OUT1PEN + Output 1 Pin Enable + 1 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x044 + 32 + read-write + 0x00000000 + 0x00003F3F + + + OUT0LOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + OUT1LOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + PRSSEL + PRS Input Select Register + 0x050 + 32 + read-write + 0x00000000 + 0x0CCCF3CF + + + PRSSTARTSEL + PRS Start Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + PRSSTOPSEL + PRS Stop Select + 6 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + PRSCLEARSEL + PRS Clear Select + 12 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + PRSSTARTMODE + PRS Start Mode + 18 + 2 + read-write + + + NONE + PRS cannot start the LETIMER + 0x00000000 + + + RISING + Rising edge of selected PRS input can start the LETIMER + 0x00000001 + + + FALLING + Falling edge of selected PRS input can start the LETIMER + 0x00000002 + + + BOTH + Both the rising or falling edge of the selected PRS input can start the LETIMER + 0x00000003 + + + + + PRSSTOPMODE + PRS Stop Mode + 22 + 2 + read-write + + + NONE + PRS cannot stop the LETIMER + 0x00000000 + + + RISING + Rising edge of selected PRS input can stop the LETIMER + 0x00000001 + + + FALLING + Falling edge of selected PRS input can stop the LETIMER + 0x00000002 + + + BOTH + Both the rising or falling edge of the selected PRS input can stop the LETIMER + 0x00000003 + + + + + PRSCLEARMODE + PRS Clear Mode + 26 + 2 + read-write + + + NONE + PRS cannot clear the LETIMER + 0x00000000 + + + RISING + Rising edge of selected PRS input can clear the LETIMER + 0x00000001 + + + FALLING + Falling edge of selected PRS input can clear the LETIMER + 0x00000002 + + + BOTH + Both the rising or falling edge of the selected PRS input can clear the LETIMER + 0x00000003 + + + + + + + + + CRYOTIMER + 1.6 + CRYOTIMER + 0x4001E000 + + 0 + 0x00000400 + registers + + + CRYOTIMER + 31 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x000000EF + + + EN + Enable CRYOTIMER + 0 + 1 + read-write + + + DEBUGRUN + Debug Mode Run Enable + 1 + 1 + read-write + + + OSCSEL + Select Low frequency oscillator + 2 + 2 + read-write + + + LFRCO + Select Low Frequency RC Oscillator + 0x00000000 + + + LFXO + Select Low Frequency Crystal Oscillator + 0x00000001 + + + ULFRCO + Select Ultra Low Frequency RC Oscillator + 0x00000002 + + + + + PRESC + Prescaler Setting + 5 + 3 + read-write + + + DIV1 + LF Oscillator frequency undivided + 0x00000000 + + + DIV2 + LF Oscillator frequency divided by 2 + 0x00000001 + + + DIV4 + LF Oscillator frequency divided by 4 + 0x00000002 + + + DIV8 + LF Oscillator frequency divided by 8 + 0x00000003 + + + DIV16 + LF Oscillator frequency divided by 16 + 0x00000004 + + + DIV32 + LF Oscillator frequency divided by 32 + 0x00000005 + + + DIV64 + LF Oscillator frequency divided by 64 + 0x00000006 + + + DIV128 + LF Oscillator frequency divided by 128 + 0x00000007 + + + + + + + PERIODSEL + Interrupt Duration + 0x004 + 32 + read-write + 0x00000020 + 0x0000003F + + + PERIODSEL + Interrupts/Wakeup events period setting + 0 + 6 + read-write + + + + + CNT + Counter Value + 0x008 + 32 + read-only + 0x00000000 + 0xFFFFFFFF + + + CNT + Counter Value + 0 + 32 + read-only + + + + + EM4WUEN + Wake Up Enable + 0x00C + 32 + read-write + 0x00000000 + 0x00000001 + + + EM4WU + EM4 Wake-up enable + 0 + 1 + read-write + + + + + IF + Interrupt Flag Register + 0x010 + 32 + read-only + 0x00000000 + 0x00000001 + + + PERIOD + Wakeup event/Interrupt + 0 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x014 + 32 + write-only + 0x00000000 + 0x00000001 + + + PERIOD + Set PERIOD Interrupt Flag + 0 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x018 + 32 + write-only + 0x00000000 + 0x00000001 + + + PERIOD + Clear PERIOD Interrupt Flag + 0 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x01C + 32 + read-write + 0x00000000 + 0x00000001 + + + PERIOD + PERIOD Interrupt Enable + 0 + 1 + read-write + + + + + + + PCNT0 + 1.6 + PCNT0 + 0x4004E000 + + 0 + 0x00000400 + registers + + + PCNT0 + 22 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0xBFDBFFFF + + + MODE + Mode Select + 0 + 3 + read-write + + + DISABLE + The module is disabled. + 0x00000000 + + + OVSSINGLE + Single input LFACLK oversampling mode (available in EM0-EM2). + 0x00000001 + + + EXTCLKSINGLE + Externally clocked single input counter mode (available in EM0-EM3). + 0x00000002 + + + EXTCLKQUAD + Externally clocked quadrature decoder mode (available in EM0-EM3). + 0x00000003 + + + OVSQUAD1X + LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM2). + 0x00000004 + + + OVSQUAD2X + LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM2). + 0x00000005 + + + OVSQUAD4X + LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM2). + 0x00000006 + + + + + FILT + Enable Digital Pulse Width Filter + 3 + 1 + read-write + + + RSTEN + Enable PCNT Clock Domain Reset + 4 + 1 + read-write + + + CNTRSTEN + Enable CNT Reset + 5 + 1 + read-write + + + AUXCNTRSTEN + Enable AUXCNT Reset + 6 + 1 + read-write + + + DEBUGHALT + Debug Mode Halt Enable + 7 + 1 + read-write + + + HYST + Enable Hysteresis + 8 + 1 + read-write + + + S1CDIR + Count direction determined by S1 + 9 + 1 + read-write + + + CNTEV + Controls when the counter counts + 10 + 2 + read-write + + + BOTH + Counts up on up-count and down on down-count events. + 0x00000000 + + + UP + Only counts up on up-count events. + 0x00000001 + + + DOWN + Only counts down on down-count events. + 0x00000002 + + + NONE + Never counts. + 0x00000003 + + + + + AUXCNTEV + Controls when the auxiliary counter counts + 12 + 2 + read-write + + + NONE + Never counts. + 0x00000000 + + + UP + Counts up on up-count events. + 0x00000001 + + + DOWN + Counts up on down-count events. + 0x00000002 + + + BOTH + Counts up on both up-count and down-count events. + 0x00000003 + + + + + CNTDIR + Non-Quadrature Mode Counter Direction Control + 14 + 1 + read-write + + + EDGE + Edge Select + 15 + 1 + read-write + + + TCCMODE + Sets the mode for triggered compare and clear + 16 + 2 + read-write + + + DISABLED + Triggered compare and clear not enabled. + 0x00000000 + + + LFA + Compare and clear performed on each (optionally prescaled) LFA clock cycle. + 0x00000001 + + + PRS + Compare and clear performed on positive PRS edges. + 0x00000002 + + + + + TCCPRESC + Set the LFA prescaler for triggered compare and clear + 19 + 2 + read-write + + + DIV1 + Compare and clear event each LFA cycle. + 0x00000000 + + + DIV2 + Compare and clear performed on every other LFA cycle. + 0x00000001 + + + DIV4 + Compare and clear performed on every 4th LFA cycle. + 0x00000002 + + + DIV8 + Compare and clear performed on every 8th LFA cycle. + 0x00000003 + + + + + TCCCOMP + Triggered compare and clear compare mode + 22 + 2 + read-write + + + LTOE + Compare match if PCNT_CNT is less than, or equal to PCNT_TOP. + 0x00000000 + + + GTOE + Compare match if PCNT_CNT is greater than or equal to PCNT_TOP. + 0x00000001 + + + RANGE + Compare match if PCNT_CNT is less than, or equal to PCNT_TOP[15:8]], and greater than, or equal to PCNT_TOP[7:0]. + 0x00000002 + + + + + PRSGATEEN + PRS gate enable + 24 + 1 + read-write + + + TCCPRSPOL + TCC PRS polarity select + 25 + 1 + read-write + + + TCCPRSSEL + TCC PRS Channel Select + 26 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected. + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected. + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected. + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected. + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected. + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected. + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected. + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected. + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected. + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected. + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected. + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected. + 0x0000000B + + + + + TOPBHFSEL + TOPB High frequency value select + 31 + 1 + read-write + + + + + CMD + Command Register + 0x004 + 32 + write-only + 0x00000000 + 0x00000003 + + + LCNTIM + Load CNT Immediately + 0 + 1 + write-only + + + LTOPBIM + Load TOPB Immediately + 1 + 1 + write-only + + + + + STATUS + Status Register + 0x008 + 32 + read-only + 0x00000000 + 0x00000001 + + + DIR + Current Counter Direction + 0 + 1 + read-only + + + + + CNT + Counter Value Register + 0x00C + 32 + read-only + 0x00000000 + 0x0000FFFF + + + CNT + Counter Value + 0 + 16 + read-only + + + + + TOP + Top Value Register + 0x010 + 32 + read-only + 0x000000FF + 0x0000FFFF + + + TOP + Counter Top Value + 0 + 16 + read-only + + + + + TOPB + Top Value Buffer Register + 0x014 + 32 + read-write + 0x000000FF + 0x0000FFFF + + + TOPB + Counter Top Buffer + 0 + 16 + read-write + + + + + IF + Interrupt Flag Register + 0x018 + 32 + read-only + 0x00000000 + 0x0000003F + + + UF + Underflow Interrupt Read Flag + 0 + 1 + read-only + + + OF + Overflow Interrupt Read Flag + 1 + 1 + read-only + + + DIRCNG + Direction Change Detect Interrupt Flag + 2 + 1 + read-only + + + AUXOF + Overflow Interrupt Read Flag + 3 + 1 + read-only + + + TCC + Triggered compare Interrupt Read Flag + 4 + 1 + read-only + + + OQSTERR + Oversampling Quadrature State Error Interrupt + 5 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x01C + 32 + write-only + 0x00000000 + 0x0000003F + + + UF + Set UF Interrupt Flag + 0 + 1 + write-only + + + OF + Set OF Interrupt Flag + 1 + 1 + write-only + + + DIRCNG + Set DIRCNG Interrupt Flag + 2 + 1 + write-only + + + AUXOF + Set AUXOF Interrupt Flag + 3 + 1 + write-only + + + TCC + Set TCC Interrupt Flag + 4 + 1 + write-only + + + OQSTERR + Set OQSTERR Interrupt Flag + 5 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x020 + 32 + write-only + 0x00000000 + 0x0000003F + + + UF + Clear UF Interrupt Flag + 0 + 1 + write-only + + + OF + Clear OF Interrupt Flag + 1 + 1 + write-only + + + DIRCNG + Clear DIRCNG Interrupt Flag + 2 + 1 + write-only + + + AUXOF + Clear AUXOF Interrupt Flag + 3 + 1 + write-only + + + TCC + Clear TCC Interrupt Flag + 4 + 1 + write-only + + + OQSTERR + Clear OQSTERR Interrupt Flag + 5 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x024 + 32 + read-write + 0x00000000 + 0x0000003F + + + UF + UF Interrupt Enable + 0 + 1 + read-write + + + OF + OF Interrupt Enable + 1 + 1 + read-write + + + DIRCNG + DIRCNG Interrupt Enable + 2 + 1 + read-write + + + AUXOF + AUXOF Interrupt Enable + 3 + 1 + read-write + + + TCC + TCC Interrupt Enable + 4 + 1 + read-write + + + OQSTERR + OQSTERR Interrupt Enable + 5 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x02C + 32 + read-write + 0x00000000 + 0x00003F3F + + + S0INLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + S1INLOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + FREEZE + Freeze Register + 0x040 + 32 + read-write + 0x00000000 + 0x00000001 + + + REGFREEZE + Register Update Freeze + 0 + 1 + read-write + + + + + SYNCBUSY + Synchronization Busy Register + 0x044 + 32 + read-only + 0x00000000 + 0x0000000F + + + CTRL + CTRL Register Busy + 0 + 1 + read-only + + + CMD + CMD Register Busy + 1 + 1 + read-only + + + TOPB + TOPB Register Busy + 2 + 1 + read-only + + + OVSCFG + OVSCFG Register Busy + 3 + 1 + read-only + + + + + AUXCNT + Auxiliary Counter Value Register + 0x064 + 32 + read-only + 0x00000000 + 0x0000FFFF + + + AUXCNT + Auxiliary Counter Value + 0 + 16 + read-only + + + + + INPUT + PCNT Input Register + 0x068 + 32 + read-write + 0x00000000 + 0x00000BEF + + + S0PRSSEL + S0IN PRS Channel Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected. + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected. + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected. + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected. + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected. + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected. + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected. + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected. + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected. + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected. + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected. + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected. + 0x0000000B + + + + + S0PRSEN + S0IN PRS Enable + 5 + 1 + read-write + + + S1PRSSEL + S1IN PRS Channel Select + 6 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected. + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected. + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected. + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected. + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected. + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected. + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected. + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected. + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected. + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected. + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected. + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected. + 0x0000000B + + + + + S1PRSEN + S1IN PRS Enable + 11 + 1 + read-write + + + + + OVSCFG + Oversampling Config Register + 0x06C + 32 + read-write + 0x00000000 + 0x000010FF + + + FILTLEN + Configure filter length for inputs S0IN and S1IN + 0 + 8 + read-write + + + FLUTTERRM + Flutter Remove + 12 + 1 + read-write + + + + + + + I2C0 + 1.6 + I2C0 + 0x4000C000 + + 0 + 0x00000400 + registers + + + I2C0 + 16 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x0007B3FF + + + EN + I2C Enable + 0 + 1 + read-write + + + SLAVE + Addressable as Slave + 1 + 1 + read-write + + + AUTOACK + Automatic Acknowledge + 2 + 1 + read-write + + + AUTOSE + Automatic STOP when Empty + 3 + 1 + read-write + + + AUTOSN + Automatic STOP on NACK + 4 + 1 + read-write + + + ARBDIS + Arbitration Disable + 5 + 1 + read-write + + + GCAMEN + General Call Address Match Enable + 6 + 1 + read-write + + + TXBIL + TX Buffer Interrupt Level + 7 + 1 + read-write + + + CLHR + Clock Low High Ratio + 8 + 2 + read-write + + + STANDARD + The ratio between low period and high period counters (Nlow:Nhigh) is 4:4 + 0x00000000 + + + ASYMMETRIC + The ratio between low period and high period counters (Nlow:Nhigh) is 6:3 + 0x00000001 + + + FAST + The ratio between low period and high period counters (Nlow:Nhigh) is 11:6 + 0x00000002 + + + + + BITO + Bus Idle Timeout + 12 + 2 + read-write + + + OFF + Timeout disabled + 0x00000000 + + + 40PCC + Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. + 0x00000001 + + + 80PCC + Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. + 0x00000002 + + + 160PCC + Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. + 0x00000003 + + + + + GIBITO + Go Idle on Bus Idle Timeout + 15 + 1 + read-write + + + CLTO + Clock Low Timeout + 16 + 3 + read-write + + + OFF + Timeout disabled + 0x00000000 + + + 40PCC + Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. + 0x00000001 + + + 80PCC + Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. + 0x00000002 + + + 160PCC + Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. + 0x00000003 + + + 320PCC + Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout. + 0x00000004 + + + 1024PCC + Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout. + 0x00000005 + + + + + + + CMD + Command Register + 0x004 + 32 + write-only + 0x00000000 + 0x000000FF + + + START + Send start condition + 0 + 1 + write-only + + + STOP + Send stop condition + 1 + 1 + write-only + + + ACK + Send ACK + 2 + 1 + write-only + + + NACK + Send NACK + 3 + 1 + write-only + + + CONT + Continue transmission + 4 + 1 + write-only + + + ABORT + Abort transmission + 5 + 1 + write-only + + + CLEARTX + Clear TX + 6 + 1 + write-only + + + CLEARPC + Clear Pending Commands + 7 + 1 + write-only + + + + + STATE + State Register + 0x008 + 32 + read-only + 0x00000001 + 0x000000FF + + + BUSY + Bus Busy + 0 + 1 + read-only + + + MASTER + Master + 1 + 1 + read-only + + + TRANSMITTER + Transmitter + 2 + 1 + read-only + + + NACKED + Nack Received + 3 + 1 + read-only + + + BUSHOLD + Bus Held + 4 + 1 + read-only + + + STATE + Transmission State + 5 + 3 + read-only + + + IDLE + No transmission is being performed. + 0x00000000 + + + WAIT + Waiting for idle. Will send a start condition as soon as the bus is idle. + 0x00000001 + + + START + Start transmitted or received + 0x00000002 + + + ADDR + Address transmitted or received + 0x00000003 + + + ADDRACK + Address ack/nack transmitted or received + 0x00000004 + + + DATA + Data transmitted or received + 0x00000005 + + + DATAACK + Data ack/nack transmitted or received + 0x00000006 + + + + + + + STATUS + Status Register + 0x00C + 32 + read-only + 0x00000080 + 0x000003FF + + + PSTART + Pending START + 0 + 1 + read-only + + + PSTOP + Pending STOP + 1 + 1 + read-only + + + PACK + Pending ACK + 2 + 1 + read-only + + + PNACK + Pending NACK + 3 + 1 + read-only + + + PCONT + Pending continue + 4 + 1 + read-only + + + PABORT + Pending abort + 5 + 1 + read-only + + + TXC + TX Complete + 6 + 1 + read-only + + + TXBL + TX Buffer Level + 7 + 1 + read-only + + + RXDATAV + RX Data Valid + 8 + 1 + read-only + + + RXFULL + RX FIFO Full + 9 + 1 + read-only + + + + + CLKDIV + Clock Division Register + 0x010 + 32 + read-write + 0x00000000 + 0x000001FF + + + DIV + Clock Divider + 0 + 9 + read-write + + + + + SADDR + Slave Address Register + 0x014 + 32 + read-write + 0x00000000 + 0x000000FE + + + ADDR + Slave address + 1 + 7 + read-write + + + + + SADDRMASK + Slave Address Mask Register + 0x018 + 32 + read-write + 0x00000000 + 0x000000FE + + + MASK + Slave Address Mask + 1 + 7 + read-write + + + + + RXDATA + Receive Buffer Data Register + 0x01C + 32 + read-only + 0x00000000 + 0x000000FF + modifyExternal + + + RXDATA + RX Data + 0 + 8 + read-only + + + + + RXDOUBLE + Receive Buffer Double Data Register + 0x020 + 32 + read-only + 0x00000000 + 0x0000FFFF + modifyExternal + + + RXDATA0 + RX Data 0 + 0 + 8 + read-only + + + RXDATA1 + RX Data 1 + 8 + 8 + read-only + + + + + RXDATAP + Receive Buffer Data Peek Register + 0x024 + 32 + read-only + 0x00000000 + 0x000000FF + + + RXDATAP + RX Data Peek + 0 + 8 + read-only + + + + + RXDOUBLEP + Receive Buffer Double Data Peek Register + 0x028 + 32 + read-only + 0x00000000 + 0x0000FFFF + + + RXDATAP0 + RX Data 0 Peek + 0 + 8 + read-only + + + RXDATAP1 + RX Data 1 Peek + 8 + 8 + read-only + + + + + TXDATA + Transmit Buffer Data Register + 0x02C + 32 + read-write + 0x00000000 + 0x000000FF + + + TXDATA + TX Data + 0 + 8 + read-write + + + + + TXDOUBLE + Transmit Buffer Double Data Register + 0x030 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + TXDATA0 + TX Data + 0 + 8 + read-write + + + TXDATA1 + TX Data + 8 + 8 + read-write + + + + + IF + Interrupt Flag Register + 0x034 + 32 + read-only + 0x00000010 + 0x0007FFFF + + + START + START condition Interrupt Flag + 0 + 1 + read-only + + + RSTART + Repeated START condition Interrupt Flag + 1 + 1 + read-only + + + ADDR + Address Interrupt Flag + 2 + 1 + read-only + + + TXC + Transfer Completed Interrupt Flag + 3 + 1 + read-only + + + TXBL + Transmit Buffer Level Interrupt Flag + 4 + 1 + read-only + + + RXDATAV + Receive Data Valid Interrupt Flag + 5 + 1 + read-only + + + ACK + Acknowledge Received Interrupt Flag + 6 + 1 + read-only + + + NACK + Not Acknowledge Received Interrupt Flag + 7 + 1 + read-only + + + MSTOP + Master STOP Condition Interrupt Flag + 8 + 1 + read-only + + + ARBLOST + Arbitration Lost Interrupt Flag + 9 + 1 + read-only + + + BUSERR + Bus Error Interrupt Flag + 10 + 1 + read-only + + + BUSHOLD + Bus Held Interrupt Flag + 11 + 1 + read-only + + + TXOF + Transmit Buffer Overflow Interrupt Flag + 12 + 1 + read-only + + + RXUF + Receive Buffer Underflow Interrupt Flag + 13 + 1 + read-only + + + BITO + Bus Idle Timeout Interrupt Flag + 14 + 1 + read-only + + + CLTO + Clock Low Timeout Interrupt Flag + 15 + 1 + read-only + + + SSTOP + Slave STOP condition Interrupt Flag + 16 + 1 + read-only + + + RXFULL + Receive Buffer Full Interrupt Flag + 17 + 1 + read-only + + + CLERR + Clock Low Error Interrupt Flag + 18 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x038 + 32 + write-only + 0x00000000 + 0x0007FFCF + + + START + Set START Interrupt Flag + 0 + 1 + write-only + + + RSTART + Set RSTART Interrupt Flag + 1 + 1 + write-only + + + ADDR + Set ADDR Interrupt Flag + 2 + 1 + write-only + + + TXC + Set TXC Interrupt Flag + 3 + 1 + write-only + + + ACK + Set ACK Interrupt Flag + 6 + 1 + write-only + + + NACK + Set NACK Interrupt Flag + 7 + 1 + write-only + + + MSTOP + Set MSTOP Interrupt Flag + 8 + 1 + write-only + + + ARBLOST + Set ARBLOST Interrupt Flag + 9 + 1 + write-only + + + BUSERR + Set BUSERR Interrupt Flag + 10 + 1 + write-only + + + BUSHOLD + Set BUSHOLD Interrupt Flag + 11 + 1 + write-only + + + TXOF + Set TXOF Interrupt Flag + 12 + 1 + write-only + + + RXUF + Set RXUF Interrupt Flag + 13 + 1 + write-only + + + BITO + Set BITO Interrupt Flag + 14 + 1 + write-only + + + CLTO + Set CLTO Interrupt Flag + 15 + 1 + write-only + + + SSTOP + Set SSTOP Interrupt Flag + 16 + 1 + write-only + + + RXFULL + Set RXFULL Interrupt Flag + 17 + 1 + write-only + + + CLERR + Set CLERR Interrupt Flag + 18 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x03C + 32 + write-only + 0x00000000 + 0x0007FFCF + + + START + Clear START Interrupt Flag + 0 + 1 + write-only + + + RSTART + Clear RSTART Interrupt Flag + 1 + 1 + write-only + + + ADDR + Clear ADDR Interrupt Flag + 2 + 1 + write-only + + + TXC + Clear TXC Interrupt Flag + 3 + 1 + write-only + + + ACK + Clear ACK Interrupt Flag + 6 + 1 + write-only + + + NACK + Clear NACK Interrupt Flag + 7 + 1 + write-only + + + MSTOP + Clear MSTOP Interrupt Flag + 8 + 1 + write-only + + + ARBLOST + Clear ARBLOST Interrupt Flag + 9 + 1 + write-only + + + BUSERR + Clear BUSERR Interrupt Flag + 10 + 1 + write-only + + + BUSHOLD + Clear BUSHOLD Interrupt Flag + 11 + 1 + write-only + + + TXOF + Clear TXOF Interrupt Flag + 12 + 1 + write-only + + + RXUF + Clear RXUF Interrupt Flag + 13 + 1 + write-only + + + BITO + Clear BITO Interrupt Flag + 14 + 1 + write-only + + + CLTO + Clear CLTO Interrupt Flag + 15 + 1 + write-only + + + SSTOP + Clear SSTOP Interrupt Flag + 16 + 1 + write-only + + + RXFULL + Clear RXFULL Interrupt Flag + 17 + 1 + write-only + + + CLERR + Clear CLERR Interrupt Flag + 18 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x040 + 32 + read-write + 0x00000000 + 0x0007FFFF + + + START + START Interrupt Enable + 0 + 1 + read-write + + + RSTART + RSTART Interrupt Enable + 1 + 1 + read-write + + + ADDR + ADDR Interrupt Enable + 2 + 1 + read-write + + + TXC + TXC Interrupt Enable + 3 + 1 + read-write + + + TXBL + TXBL Interrupt Enable + 4 + 1 + read-write + + + RXDATAV + RXDATAV Interrupt Enable + 5 + 1 + read-write + + + ACK + ACK Interrupt Enable + 6 + 1 + read-write + + + NACK + NACK Interrupt Enable + 7 + 1 + read-write + + + MSTOP + MSTOP Interrupt Enable + 8 + 1 + read-write + + + ARBLOST + ARBLOST Interrupt Enable + 9 + 1 + read-write + + + BUSERR + BUSERR Interrupt Enable + 10 + 1 + read-write + + + BUSHOLD + BUSHOLD Interrupt Enable + 11 + 1 + read-write + + + TXOF + TXOF Interrupt Enable + 12 + 1 + read-write + + + RXUF + RXUF Interrupt Enable + 13 + 1 + read-write + + + BITO + BITO Interrupt Enable + 14 + 1 + read-write + + + CLTO + CLTO Interrupt Enable + 15 + 1 + read-write + + + SSTOP + SSTOP Interrupt Enable + 16 + 1 + read-write + + + RXFULL + RXFULL Interrupt Enable + 17 + 1 + read-write + + + CLERR + CLERR Interrupt Enable + 18 + 1 + read-write + + + + + ROUTEPEN + I/O Routing Pin Enable Register + 0x044 + 32 + read-write + 0x00000000 + 0x00000003 + + + SDAPEN + SDA Pin Enable + 0 + 1 + read-write + + + SCLPEN + SCL Pin Enable + 1 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x048 + 32 + read-write + 0x00000000 + 0x00003F3F + + + SDALOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + SCLLOC + I/O Location + 8 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + + + ADC0 + 1.6 + ADC0 + 0x40002000 + + 0 + 0x00000400 + registers + + + ADC0 + 14 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x001F0000 + 0x2F7F7FDF + + + WARMUPMODE + Warm-up Mode + 0 + 2 + read-write + + + NORMAL + ADC is shut down after each conversion. 5us warmup time needed before next conversion + 0x00000000 + + + KEEPINSTANDBY + ADC is kept in standby mode between conversion.1us warmup time needed before next conversion + 0x00000001 + + + KEEPINSLOWACC + ADC is kept in slow acquisition mode between conversions. 1us warmup time needed before next conversion + 0x00000002 + + + KEEPADCWARM + ADC is kept warmed up, allowing continuous conversion + 0x00000003 + + + + + SINGLEDMAWU + SINGLEFIFO DMA Wakeup + 2 + 1 + read-write + + + SCANDMAWU + SCANFIFO DMA Wakeup + 3 + 1 + read-write + + + TAILGATE + Conversion Tailgating + 4 + 1 + read-write + + + ASYNCCLKEN + Selects ASYNC CLK enable mode when ADCCLKMODE=1 + 6 + 1 + read-write + + + ADCCLKMODE + ADC Clock Mode + 7 + 1 + read-write + + + PRESC + Prescalar Setting for ADC Sample and Conversion clock + 8 + 7 + read-write + + + NODIVISION + "" + 0x00000000 + + + + + TIMEBASE + 1us Time Base + 16 + 7 + read-write + + + OVSRSEL + Oversample Rate Select + 24 + 4 + read-write + + + X2 + 2 samples for each conversion result + 0x00000000 + + + X4 + 4 samples for each conversion result + 0x00000001 + + + X8 + 8 samples for each conversion result + 0x00000002 + + + X16 + 16 samples for each conversion result + 0x00000003 + + + X32 + 32 samples for each conversion result + 0x00000004 + + + X64 + 64 samples for each conversion result + 0x00000005 + + + X128 + 128 samples for each conversion result + 0x00000006 + + + X256 + 256 samples for each conversion result + 0x00000007 + + + X512 + 512 samples for each conversion result + 0x00000008 + + + X1024 + 1024 samples for each conversion result + 0x00000009 + + + X2048 + 2048 samples for each conversion result + 0x0000000A + + + X4096 + 4096 samples for each conversion result + 0x0000000B + + + + + CHCONMODE + Channel Connect + 29 + 1 + read-write + + + + + CMD + Command Register + 0x008 + 32 + write-only + 0x00000000 + 0x0000000F + + + SINGLESTART + Single Conversion Start + 0 + 1 + write-only + + + SINGLESTOP + Single Conversion Stop + 1 + 1 + write-only + + + SCANSTART + Scan Sequence Start + 2 + 1 + write-only + + + SCANSTOP + Scan Sequence Stop + 3 + 1 + write-only + + + + + STATUS + Status Register + 0x00C + 32 + read-only + 0x00000000 + 0x00031F03 + + + SINGLEACT + Single Conversion Active + 0 + 1 + read-only + + + SCANACT + Scan Conversion Active + 1 + 1 + read-only + + + SINGLEREFWARM + Single Reference Warmed Up + 8 + 1 + read-only + + + SCANREFWARM + Scan Reference Warmed Up + 9 + 1 + read-only + + + PROGERR + Programming Error Status + 10 + 2 + read-only + + + BUSCONF + "" + 0x00000001 + + + NEGSELCONF + "" + 0x00000002 + + + + + WARM + ADC Warmed Up + 12 + 1 + read-only + + + SINGLEDV + Single Channel Data Valid + 16 + 1 + read-only + + + SCANDV + Scan Data Valid + 17 + 1 + read-only + + + + + SINGLECTRL + Single Channel Control Register + 0x010 + 32 + read-write + 0x00FFFF00 + 0xAFFFFFFF + + + REP + Single Channel Repetitive Mode + 0 + 1 + read-write + + + DIFF + Single Channel Differential Mode + 1 + 1 + read-write + + + ADJ + Single Channel Result Adjustment + 2 + 1 + read-write + + + RES + Single Channel Resolution Select + 3 + 2 + read-write + + + 12BIT + 12-bit resolution + 0x00000000 + + + 8BIT + 8-bit resolution + 0x00000001 + + + 6BIT + 6-bit resolution + 0x00000002 + + + OVS + Oversampling enabled. Oversampling rate is set in OVSRSEL + 0x00000003 + + + + + REF + Single Channel Reference Selection + 5 + 3 + read-write + + + 1V25 + VFS = 1.25V with internal VBGR reference + 0x00000000 + + + 2V5 + VFS = 2.5V with internal VBGR reference + 0x00000001 + + + VDD + VFS = AVDD with AVDD as reference source + 0x00000002 + + + 5VDIFF + VFS = 2.5V with internal differential reference + 0x00000003 + + + EXTSINGLE + Single ended external reference + 0x00000004 + + + 2XEXTDIFF + Differential external reference, 2x + 0x00000005 + + + 2XVDD + VFS=2xAVDD with AVDD as the reference source + 0x00000006 + + + CONF + Use SINGLECTRLX to configure reference + 0x00000007 + + + + + POSSEL + Single Channel Positive Input Selection + 8 + 8 + read-write + + + NEGSEL + Single Channel Negative Input Selection + 16 + 8 + read-write + + + AT + Single Channel Acquisition Time + 24 + 4 + read-write + + + 1CYCLE + 1 conversion clock cycle acquisition time for single channel + 0x00000000 + + + 2CYCLES + 2 conversion clock cycles acquisition time for single channel + 0x00000001 + + + 3CYCLES + 3 conversion clock cycles acquisition time for single channel + 0x00000002 + + + 4CYCLES + 4 conversion clock cycles acquisition time for single channel + 0x00000003 + + + 8CYCLES + 8 conversion clock cycles acquisition time for single channel + 0x00000004 + + + 16CYCLES + 16 conversion clock cycles acquisition time for single channel + 0x00000005 + + + 32CYCLES + 32 conversion clock cycles acquisition time for single channel + 0x00000006 + + + 64CYCLES + 64 conversion clock cycles acquisition time for single channel + 0x00000007 + + + 128CYCLES + 128 conversion clock cycles acquisition time for single channel + 0x00000008 + + + 256CYCLES + 256 conversion clock cycles acquisition time for single channel + 0x00000009 + + + + + PRSEN + Single Channel PRS Trigger Enable + 29 + 1 + read-write + + + CMPEN + Compare Logic Enable for Single Channel + 31 + 1 + read-write + + + + + SINGLECTRLX + Single Channel Control Register continued + 0x014 + 32 + read-write + 0x00000000 + 0x0F1F7FFF + + + VREFSEL + Single Channel Reference Selection + 0 + 3 + read-write + + + VBGR + Internal 0.83V Bandgap reference + 0x00000000 + + + VDDXWATT + Scaled AVDD: AVDD*(the VREF attenuation factor) + 0x00000001 + + + VREFPWATT + Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) + 0x00000002 + + + VREFP + Raw single ended external Vref: ADCn_EXTP + 0x00000003 + + + VENTROPY + Special mode used to generate ENTROPY. + 0x00000004 + + + VREFPNWATT + Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) + 0x00000005 + + + VREFPN + Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) + 0x00000006 + + + VBGRLOW + Internal Bandgap reference at low setting 0.78V + 0x00000007 + + + + + VREFATTFIX + Enable 1/3 scaling on VREF + 3 + 1 + read-write + + + VREFATT + Code for VREF attenuation factor when VREFSEL is 1, 2 or 5 + 4 + 4 + read-write + + + VINATT + Code for VIN attenuation factor. + 8 + 4 + read-write + + + DVL + Single Channel DV Level Select + 12 + 2 + read-write + + + FIFOOFACT + Single Channel FIFO Overflow Action + 14 + 1 + read-write + + + PRSMODE + Single Channel PRS Trigger Mode + 16 + 1 + read-write + + + PRSSEL + Single Channel PRS Trigger Select + 17 + 4 + read-write + + + PRSCH0 + PRS ch 0 triggers single channel + 0x00000000 + + + PRSCH1 + PRS ch 1 triggers single channel + 0x00000001 + + + PRSCH2 + PRS ch 2 triggers single channel + 0x00000002 + + + PRSCH3 + PRS ch 3 triggers single channel + 0x00000003 + + + PRSCH4 + PRS ch 4 triggers single channel + 0x00000004 + + + PRSCH5 + PRS ch 5 triggers single channel + 0x00000005 + + + PRSCH6 + PRS ch 6 triggers single channel + 0x00000006 + + + PRSCH7 + PRS ch 7 triggers single channel + 0x00000007 + + + PRSCH8 + PRS ch 8 triggers single channel + 0x00000008 + + + PRSCH9 + PRS ch 9 triggers single channel + 0x00000009 + + + PRSCH10 + PRS ch 10 triggers single channel + 0x0000000A + + + PRSCH11 + PRS ch 11 triggers single channel + 0x0000000B + + + + + CONVSTARTDELAY + Delay value for next conversion start if CONVSTARTDELAYEN is set. + 24 + 3 + read-write + + + CONVSTARTDELAYEN + Enable delaying next conversion start + 27 + 1 + read-write + + + + + SCANCTRL + Scan Control Register + 0x018 + 32 + read-write + 0x00000000 + 0xAF0000FF + + + REP + Scan Sequence Repetitive Mode + 0 + 1 + read-write + + + DIFF + Scan Sequence Differential Mode + 1 + 1 + read-write + + + ADJ + Scan Sequence Result Adjustment + 2 + 1 + read-write + + + RES + Scan Sequence Resolution Select + 3 + 2 + read-write + + + 12BIT + 12-bit resolution + 0x00000000 + + + 8BIT + 8-bit resolution + 0x00000001 + + + 6BIT + 6-bit resolution + 0x00000002 + + + OVS + Oversampling enabled. Oversampling rate is set in OVSRSEL + 0x00000003 + + + + + REF + Scan Sequence Reference Selection + 5 + 3 + read-write + + + 1V25 + VFS = 1.25V with internal VBGR reference + 0x00000000 + + + 2V5 + VFS = 2.5V with internal VBGR reference + 0x00000001 + + + VDD + VFS = AVDD with AVDD as reference source + 0x00000002 + + + 5VDIFF + VFS = 2.5V with internal differential reference + 0x00000003 + + + EXTSINGLE + Single ended external reference + 0x00000004 + + + 2XEXTDIFF + Differential external reference, 2x + 0x00000005 + + + 2XVDD + VFS=2xAVDD with AVDD as the reference source + 0x00000006 + + + CONF + Use SCANCTRLX to configure reference + 0x00000007 + + + + + AT + Scan Acquisition Time + 24 + 4 + read-write + + + 1CYCLE + 1 conversion clock cycle acquisition time for scan + 0x00000000 + + + 2CYCLES + 2 conversion clock cycles acquisition time for scan + 0x00000001 + + + 3CYCLES + 3 conversion clock cycles acquisition time for scan + 0x00000002 + + + 4CYCLES + 4 conversion clock cycles acquisition time for scan + 0x00000003 + + + 8CYCLES + 8 conversion clock cycles acquisition time for scan + 0x00000004 + + + 16CYCLES + 16 conversion clock cycles acquisition time for scan + 0x00000005 + + + 32CYCLES + 32 conversion clock cycles acquisition time for scan + 0x00000006 + + + 64CYCLES + 64 conversion clock cycles acquisition time for scan + 0x00000007 + + + 128CYCLES + 128 conversion clock cycles acquisition time for scan + 0x00000008 + + + 256CYCLES + 256 conversion clock cycles acquisition time for scan + 0x00000009 + + + + + PRSEN + Scan Sequence PRS Trigger Enable + 29 + 1 + read-write + + + CMPEN + Compare Logic Enable for Scan + 31 + 1 + read-write + + + + + SCANCTRLX + Scan Control Register continued + 0x01C + 32 + read-write + 0x00000000 + 0x0F1F7FFF + + + VREFSEL + Scan Channel Reference Selection + 0 + 3 + read-write + + + VBGR + Internal 0.83V Bandgap reference + 0x00000000 + + + VDDXWATT + Scaled AVDD: AVDD*(the VREF attenuation factor) + 0x00000001 + + + VREFPWATT + Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) + 0x00000002 + + + VREFP + Raw single ended external Vref: ADCn_EXTP + 0x00000003 + + + VENTROPY + Special mode used to generate ENTROPY. + 0x00000004 + + + VREFPNWATT + Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) + 0x00000005 + + + VREFPN + Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) + 0x00000006 + + + VBGRLOW + Internal Bandgap reference at low setting 0.78V + 0x00000007 + + + + + VREFATTFIX + Enable fixed 1/3 scaling on VREF + 3 + 1 + read-write + + + VREFATT + Code for VREF attenuation factor when VREFSEL is 1, 2 or 5 + 4 + 4 + read-write + + + VINATT + Code for VIN attenuation factor. + 8 + 4 + read-write + + + DVL + Scan DV Level Select + 12 + 2 + read-write + + + FIFOOFACT + Scan FIFO Overflow Action + 14 + 1 + read-write + + + PRSMODE + Scan PRS Trigger Mode + 16 + 1 + read-write + + + PRSSEL + Scan Sequence PRS Trigger Select + 17 + 4 + read-write + + + PRSCH0 + PRS ch 0 triggers scan sequence + 0x00000000 + + + PRSCH1 + PRS ch 1 triggers scan sequence + 0x00000001 + + + PRSCH2 + PRS ch 2 triggers scan sequence + 0x00000002 + + + PRSCH3 + PRS ch 3 triggers scan sequence + 0x00000003 + + + PRSCH4 + PRS ch 4 triggers scan sequence + 0x00000004 + + + PRSCH5 + PRS ch 5 triggers scan sequence + 0x00000005 + + + PRSCH6 + PRS ch 6 triggers scan sequence + 0x00000006 + + + PRSCH7 + PRS ch 7 triggers scan sequence + 0x00000007 + + + PRSCH8 + PRS ch 8 triggers scan sequence + 0x00000008 + + + PRSCH9 + PRS ch 9 triggers scan sequence + 0x00000009 + + + PRSCH10 + PRS ch 10 triggers scan sequence + 0x0000000A + + + PRSCH11 + PRS ch 11 triggers scan sequence + 0x0000000B + + + + + CONVSTARTDELAY + Delay next conversion start if CONVSTARTDELAYEN is set. + 24 + 3 + read-write + + + CONVSTARTDELAYEN + Enable delaying next conversion start + 27 + 1 + read-write + + + + + SCANMASK + Scan Sequence Input Mask Register + 0x020 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + SCANINPUTEN + Scan Sequence Input Mask + 0 + 32 + read-write + + + INPUT0INPUT0NEGSEL + "" + 0x00000001 + + + INPUT0 + "" + 0x00000001 + + + INPUT1 + "" + 0x00000002 + + + INPUT1INPUT2 + "" + 0x00000002 + + + INPUT2 + "" + 0x00000004 + + + INPUT2INPUT2NEGSEL + "" + 0x00000004 + + + INPUT3 + "" + 0x00000008 + + + INPUT3INPUT4 + "" + 0x00000008 + + + INPUT4 + "" + 0x00000010 + + + INPUT4INPUT4NEGSEL + "" + 0x00000010 + + + INPUT5INPUT6 + "" + 0x00000020 + + + INPUT5 + "" + 0x00000020 + + + INPUT6INPUT6NEGSEL + "" + 0x00000040 + + + INPUT6 + "" + 0x00000040 + + + INPUT7 + "" + 0x00000080 + + + INPUT7INPUT0 + "" + 0x00000080 + + + INPUT8INPUT9 + "" + 0x00000100 + + + INPUT8 + "" + 0x00000100 + + + INPUT9 + "" + 0x00000200 + + + INPUT9INPUT9NEGSEL + "" + 0x00000200 + + + INPUT10INPUT11 + "" + 0x00000400 + + + INPUT10 + "" + 0x00000400 + + + INPUT11INPUT11NEGSEL + "" + 0x00000800 + + + INPUT11 + "" + 0x00000800 + + + INPUT12INPUT13 + "" + 0x00001000 + + + INPUT12 + "" + 0x00001000 + + + INPUT13INPUT13NEGSEL + "" + 0x00002000 + + + INPUT13 + "" + 0x00002000 + + + INPUT14INPUT15 + "" + 0x00004000 + + + INPUT14 + "" + 0x00004000 + + + INPUT15INPUT15NEGSEL + "" + 0x00008000 + + + INPUT15 + "" + 0x00008000 + + + INPUT16INPUT17 + "" + 0x00010000 + + + INPUT16 + "" + 0x00010000 + + + INPUT17INPUT18 + "" + 0x00020000 + + + INPUT17 + "" + 0x00020000 + + + INPUT18INPUT19 + "" + 0x00040000 + + + INPUT18 + "" + 0x00040000 + + + INPUT19 + "" + 0x00080000 + + + INPUT19INPUT20 + "" + 0x00080000 + + + INPUT20INPUT21 + "" + 0x00100000 + + + INPUT20 + "" + 0x00100000 + + + INPUT21 + "" + 0x00200000 + + + INPUT21INPUT22 + "" + 0x00200000 + + + INPUT22INPUT23 + "" + 0x00400000 + + + INPUT22 + "" + 0x00400000 + + + INPUT23INPUT16 + "" + 0x00800000 + + + INPUT23 + "" + 0x00800000 + + + INPUT24 + "" + 0x01000000 + + + INPUT24INPUT25 + "" + 0x01000000 + + + INPUT25INPUT26 + "" + 0x02000000 + + + INPUT25 + "" + 0x02000000 + + + INPUT26 + "" + 0x04000000 + + + INPUT26INPUT27 + "" + 0x04000000 + + + INPUT27INPUT28 + "" + 0x08000000 + + + INPUT27 + "" + 0x08000000 + + + INPUT28INPUT29 + "" + 0x10000000 + + + INPUT28 + "" + 0x10000000 + + + INPUT29 + "" + 0x20000000 + + + INPUT29INPUT30 + "" + 0x20000000 + + + INPUT30 + "" + 0x40000000 + + + INPUT30INPUT31 + "" + 0x40000000 + + + INPUT31INPUT24 + "" + 0x80000000 + + + INPUT31 + "" + 0x80000000 + + + + + + + SCANINPUTSEL + Input Selection register for Scan mode + 0x024 + 32 + read-write + 0x00000000 + 0x1F1F1F1F + + + INPUT0TO7SEL + Inputs chosen for ADCn_INPUT7-ADCn_INPUT0 as referred in SCANMASK + 0 + 5 + read-write + + + APORT0CH0TO7 + "" + 0x00000000 + + + APORT0CH8TO15 + "" + 0x00000001 + + + APORT1CH0TO7 + "" + 0x00000004 + + + APORT1CH8TO15 + "" + 0x00000005 + + + APORT1CH16TO23 + "" + 0x00000006 + + + APORT1CH24TO31 + "" + 0x00000007 + + + APORT2CH0TO7 + "" + 0x00000008 + + + APORT2CH8TO15 + "" + 0x00000009 + + + APORT2CH16TO23 + "" + 0x0000000A + + + APORT2CH24TO31 + "" + 0x0000000B + + + APORT3CH0TO7 + "" + 0x0000000C + + + APORT3CH8TO15 + "" + 0x0000000D + + + APORT3CH16TO23 + "" + 0x0000000E + + + APORT3CH24TO31 + "" + 0x0000000F + + + APORT4CH0TO7 + "" + 0x00000010 + + + APORT4CH8TO15 + "" + 0x00000011 + + + APORT4CH16TO23 + "" + 0x00000012 + + + APORT4CH24TO31 + "" + 0x00000013 + + + + + INPUT8TO15SEL + Inputs chosen for ADCn_INPUT8-ADCn_INPUT15 as referred in SCANMASK + 8 + 5 + read-write + + + APORT0CH0TO7 + "" + 0x00000000 + + + APORT0CH8TO15 + "" + 0x00000001 + + + APORT1CH0TO7 + "" + 0x00000004 + + + APORT1CH8TO15 + "" + 0x00000005 + + + APORT1CH16TO23 + "" + 0x00000006 + + + APORT1CH24TO31 + "" + 0x00000007 + + + APORT2CH0TO7 + "" + 0x00000008 + + + APORT2CH8TO15 + "" + 0x00000009 + + + APORT2CH16TO23 + "" + 0x0000000A + + + APORT2CH24TO31 + "" + 0x0000000B + + + APORT3CH0TO7 + "" + 0x0000000C + + + APORT3CH8TO15 + "" + 0x0000000D + + + APORT3CH16TO23 + "" + 0x0000000E + + + APORT3CH24TO31 + "" + 0x0000000F + + + APORT4CH0TO7 + "" + 0x00000010 + + + APORT4CH8TO15 + "" + 0x00000011 + + + APORT4CH16TO23 + "" + 0x00000012 + + + APORT4CH24TO31 + "" + 0x00000013 + + + + + INPUT16TO23SEL + Inputs chosen for ADCn_INPUT16-ADCn_INPUT23 as referred in SCANMASK + 16 + 5 + read-write + + + APORT0CH0TO7 + "" + 0x00000000 + + + APORT0CH8TO15 + "" + 0x00000001 + + + APORT1CH0TO7 + "" + 0x00000004 + + + APORT1CH8TO15 + "" + 0x00000005 + + + APORT1CH16TO23 + "" + 0x00000006 + + + APORT1CH24TO31 + "" + 0x00000007 + + + APORT2CH0TO7 + "" + 0x00000008 + + + APORT2CH8TO15 + "" + 0x00000009 + + + APORT2CH16TO23 + "" + 0x0000000A + + + APORT2CH24TO31 + "" + 0x0000000B + + + APORT3CH0TO7 + "" + 0x0000000C + + + APORT3CH8TO15 + "" + 0x0000000D + + + APORT3CH16TO23 + "" + 0x0000000E + + + APORT3CH24TO31 + "" + 0x0000000F + + + APORT4CH0TO7 + "" + 0x00000010 + + + APORT4CH8TO15 + "" + 0x00000011 + + + APORT4CH16TO23 + "" + 0x00000012 + + + APORT4CH24TO31 + "" + 0x00000013 + + + + + INPUT24TO31SEL + Inputs chosen for ADCn_INPUT24-ADCn_INPUT31 as referred in SCANMASK + 24 + 5 + read-write + + + APORT0CH0TO7 + "" + 0x00000000 + + + APORT0CH8TO15 + "" + 0x00000001 + + + APORT1CH0TO7 + "" + 0x00000004 + + + APORT1CH8TO15 + "" + 0x00000005 + + + APORT1CH16TO23 + "" + 0x00000006 + + + APORT1CH24TO31 + "" + 0x00000007 + + + APORT2CH0TO7 + "" + 0x00000008 + + + APORT2CH8TO15 + "" + 0x00000009 + + + APORT2CH16TO23 + "" + 0x0000000A + + + APORT2CH24TO31 + "" + 0x0000000B + + + APORT3CH0TO7 + "" + 0x0000000C + + + APORT3CH8TO15 + "" + 0x0000000D + + + APORT3CH16TO23 + "" + 0x0000000E + + + APORT3CH24TO31 + "" + 0x0000000F + + + APORT4CH0TO7 + "" + 0x00000010 + + + APORT4CH8TO15 + "" + 0x00000011 + + + APORT4CH16TO23 + "" + 0x00000012 + + + APORT4CH24TO31 + "" + 0x00000013 + + + + + + + SCANNEGSEL + Negative Input select register for Scan + 0x028 + 32 + read-write + 0x000039E4 + 0x0000FFFF + + + INPUT0NEGSEL + Negative Input select Register for ADCn_INPUT0 in Differential Scan mode + 0 + 2 + read-write + + + INPUT1 + Selects ADCn_INPUT1 as negative channel input + 0x00000000 + + + INPUT3 + Selects ADCn_INPUT3 as negative channel input + 0x00000001 + + + INPUT5 + Selects ADCn_INPUT5 as negative channel input + 0x00000002 + + + INPUT7 + Selects ADCn_INPUT7 as negative channel input + 0x00000003 + + + + + INPUT2NEGSEL + Negative Input select Register for ADCn_INPUT2 in Differential Scan mode + 2 + 2 + read-write + + + INPUT1 + Selects ADCn_INPUT1 as negative channel input + 0x00000000 + + + INPUT3 + Selects ADCn_INPUT3 as negative channel input + 0x00000001 + + + INPUT5 + Selects ADCn_INPUT5 as negative channel input + 0x00000002 + + + INPUT7 + Selects ADCn_INPUT7 as negative channel input + 0x00000003 + + + + + INPUT4NEGSEL + Negative Input select Register for ADCn_INPUT4 in Differential Scan mode + 4 + 2 + read-write + + + INPUT1 + Selects ADCn_INPUT1 as negative channel input + 0x00000000 + + + INPUT3 + Selects ADCn_INPUT3 as negative channel input + 0x00000001 + + + INPUT5 + Selects ADCn_INPUT5 as negative channel input + 0x00000002 + + + INPUT7 + Selects ADCn_INPUT7 as negative channel input + 0x00000003 + + + + + INPUT6NEGSEL + Negative Input select Register for ADCn_INPUT1 in Differential Scan mode + 6 + 2 + read-write + + + INPUT1 + Selects ADCn_INPUT1 as negative channel input + 0x00000000 + + + INPUT3 + Selects ADCn_INPUT3 as negative channel input + 0x00000001 + + + INPUT5 + Selects ADCn_INPUT5 as negative channel input + 0x00000002 + + + INPUT7 + Selects ADCn_INPUT7 as negative channel input + 0x00000003 + + + + + INPUT9NEGSEL + Negative Input select Register for ADCn_INPUT9 in Differential Scan mode + 8 + 2 + read-write + + + INPUT8 + Selects ADCn_INPUT8 as negative channel input + 0x00000000 + + + INPUT10 + Selects ADCn_INPUT10 as negative channel input + 0x00000001 + + + INPUT12 + Selects ADCn_INPUT12 as negative channel input + 0x00000002 + + + INPUT14 + Selects ADCn_INPUT14 as negative channel input + 0x00000003 + + + + + INPUT11NEGSEL + Negative Input select Register for ADCn_INPUT11 in Differential Scan mode + 10 + 2 + read-write + + + INPUT8 + Selects ADCn_INPUT8 as negative channel input + 0x00000000 + + + INPUT10 + Selects ADCn_INPUT10 as negative channel input + 0x00000001 + + + INPUT12 + Selects ADCn_INPUT12 as negative channel input + 0x00000002 + + + INPUT14 + Selects ADCn_INPUT14 as negative channel input + 0x00000003 + + + + + INPUT13NEGSEL + Negative Input select Register for ADCn_INPUT13 in Differential Scan mode + 12 + 2 + read-write + + + INPUT8 + Selects ADCn_INPUT8 as negative channel input + 0x00000000 + + + INPUT10 + Selects ADCn_INPUT10 as negative channel input + 0x00000001 + + + INPUT12 + Selects ADCn_INPUT12 as negative channel input + 0x00000002 + + + INPUT14 + Selects ADCn_INPUT14 as negative channel input + 0x00000003 + + + + + INPUT15NEGSEL + Negative Input select Register for ADCn_INPUT15 in Differential Scan mode + 14 + 2 + read-write + + + INPUT8 + Selects ADCn_INPUT8 as negative channel input + 0x00000000 + + + INPUT10 + Selects ADCn_INPUT10 as negative channel input + 0x00000001 + + + INPUT12 + Selects ADCn_INPUT12 as negative channel input + 0x00000002 + + + INPUT14 + Selects ADCn_INPUT14 as negative channel input + 0x00000003 + + + + + + + CMPTHR + Compare Threshold Register + 0x02C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + ADLT + Less Than Compare Threshold + 0 + 16 + read-write + + + ADGT + Greater Than Compare Threshold + 16 + 16 + read-write + + + + + BIASPROG + Bias Programming Register for various analog blocks used in ADC operation + 0x030 + 32 + read-write + 0x00000000 + 0x0000100F + + + ADCBIASPROG + Bias Programming Value of analog ADC block + 0 + 4 + read-write + + + NORMAL + Normal power for 1Msps operation + 0x00000000 + + + SCALE2 + Scaling bias to 1/2 + 0x00000004 + + + SCALE4 + Scaling bias to 1/4 + 0x00000008 + + + SCALE8 + Scaling bias to 1/8 + 0x0000000C + + + SCALE16 + Scaling bias to 1/16 + 0x0000000E + + + SCALE32 + Scaling bias to 1/32 + 0x0000000F + + + + + VFAULTCLR + Set Vfault_clr flag + 12 + 1 + read-write + + + + + CAL + Calibration Register + 0x034 + 32 + read-write + 0x40784078 + 0xFFFFFFFF + + + SINGLEOFFSET + Single Mode Offset Calibration Value for differential or positive single-ended mode + 0 + 4 + read-write + + + SINGLEOFFSETINV + Single Mode Offset Calibration Value for negative single-ended mode + 4 + 4 + read-write + + + SINGLEGAIN + Single Mode Gain Calibration Value + 8 + 7 + read-write + + + OFFSETINVMODE + Negative single-ended offset calibration is enabled + 15 + 1 + read-write + + + SCANOFFSET + Scan Mode Offset Calibration Value for differential or positive single-ended mode + 16 + 4 + read-write + + + SCANOFFSETINV + Scan Mode Offset Calibration Value for negative single-ended mode + 20 + 4 + read-write + + + SCANGAIN + Scan Mode Gain Calibration Value + 24 + 7 + read-write + + + CALEN + Calibration mode is enabled + 31 + 1 + read-write + + + + + IF + Interrupt Flag Register + 0x038 + 32 + read-only + 0x00000000 + 0x03030F03 + + + SINGLE + Single Conversion Complete Interrupt Flag + 0 + 1 + read-only + + + SCAN + Scan Conversion Complete Interrupt Flag + 1 + 1 + read-only + + + SINGLEOF + Single Result Overflow Interrupt Flag + 8 + 1 + read-only + + + SCANOF + Scan Result Overflow Interrupt Flag + 9 + 1 + read-only + + + SINGLEUF + Single Result Underflow Interrupt Flag + 10 + 1 + read-only + + + SCANUF + Scan Result Underflow Interrupt Flag + 11 + 1 + read-only + + + SINGLECMP + Single Result Compare Match Interrupt Flag + 16 + 1 + read-only + + + SCANCMP + Scan Result Compare Match Interrupt Flag + 17 + 1 + read-only + + + VREFOV + VREF OverVoltage Interrupt Flag + 24 + 1 + read-only + + + PROGERR + Programming Error Interrupt Flag + 25 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x03C + 32 + write-only + 0x00000000 + 0x03030F00 + + + SINGLEOF + Set SINGLEOF Interrupt Flag + 8 + 1 + write-only + + + SCANOF + Set SCANOF Interrupt Flag + 9 + 1 + write-only + + + SINGLEUF + Set SINGLEUF Interrupt Flag + 10 + 1 + write-only + + + SCANUF + Set SCANUF Interrupt Flag + 11 + 1 + write-only + + + SINGLECMP + Set SINGLECMP Interrupt Flag + 16 + 1 + write-only + + + SCANCMP + Set SCANCMP Interrupt Flag + 17 + 1 + write-only + + + VREFOV + Set VREFOV Interrupt Flag + 24 + 1 + write-only + + + PROGERR + Set PROGERR Interrupt Flag + 25 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x040 + 32 + write-only + 0x00000000 + 0x03030F00 + + + SINGLEOF + Clear SINGLEOF Interrupt Flag + 8 + 1 + write-only + + + SCANOF + Clear SCANOF Interrupt Flag + 9 + 1 + write-only + + + SINGLEUF + Clear SINGLEUF Interrupt Flag + 10 + 1 + write-only + + + SCANUF + Clear SCANUF Interrupt Flag + 11 + 1 + write-only + + + SINGLECMP + Clear SINGLECMP Interrupt Flag + 16 + 1 + write-only + + + SCANCMP + Clear SCANCMP Interrupt Flag + 17 + 1 + write-only + + + VREFOV + Clear VREFOV Interrupt Flag + 24 + 1 + write-only + + + PROGERR + Clear PROGERR Interrupt Flag + 25 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x044 + 32 + read-write + 0x00000000 + 0x03030F03 + + + SINGLE + SINGLE Interrupt Enable + 0 + 1 + read-write + + + SCAN + SCAN Interrupt Enable + 1 + 1 + read-write + + + SINGLEOF + SINGLEOF Interrupt Enable + 8 + 1 + read-write + + + SCANOF + SCANOF Interrupt Enable + 9 + 1 + read-write + + + SINGLEUF + SINGLEUF Interrupt Enable + 10 + 1 + read-write + + + SCANUF + SCANUF Interrupt Enable + 11 + 1 + read-write + + + SINGLECMP + SINGLECMP Interrupt Enable + 16 + 1 + read-write + + + SCANCMP + SCANCMP Interrupt Enable + 17 + 1 + read-write + + + VREFOV + VREFOV Interrupt Enable + 24 + 1 + read-write + + + PROGERR + PROGERR Interrupt Enable + 25 + 1 + read-write + + + + + SINGLEDATA + Single Conversion Result Data + 0x048 + 32 + read-only + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DATA + Single Conversion Result Data + 0 + 32 + read-only + + + + + SCANDATA + Scan Conversion Result Data + 0x04C + 32 + read-only + 0x00000000 + 0xFFFFFFFF + + + DATA + Scan Conversion Result Data + 0 + 32 + read-only + + + + + SINGLEDATAP + Single Conversion Result Data Peek Register + 0x050 + 32 + read-only + 0x00000000 + 0xFFFFFFFF + modifyExternal + + + DATAP + Single Conversion Result Data Peek + 0 + 32 + read-only + + + + + SCANDATAP + Scan Sequence Result Data Peek Register + 0x054 + 32 + read-only + 0x00000000 + 0xFFFFFFFF + + + DATAP + Scan Conversion Result Data Peek + 0 + 32 + read-only + + + + + SCANDATAX + Scan Sequence Result Data + Data Source Register + 0x068 + 32 + read-only + 0x00000000 + 0x001FFFFF + + + DATA + Scan Conversion Result Data + 0 + 16 + read-only + + + SCANINPUTID + Scan Conversion Input ID + 16 + 5 + read-only + + + + + SCANDATAXP + Scan Sequence Result Data + Data Source Peek Register + 0x06C + 32 + read-only + 0x00000000 + 0x001FFFFF + + + DATAP + Scan Conversion Result Data Peek + 0 + 16 + read-only + + + SCANINPUTIDPEEK + Scan Conversion Data Source Peek + 16 + 5 + read-only + + + + + APORTREQ + APORT Request Status Register + 0x07C + 32 + read-only + 0x00000000 + 0x000003FF + + + APORT0XREQ + 1 if the bus connected to APORT0X is requested + 0 + 1 + read-only + + + APORT0YREQ + 1 if the bus connected to APORT0Y is requested + 1 + 1 + read-only + + + APORT1XREQ + 1 if the bus connected to APORT1X is requested + 2 + 1 + read-only + + + APORT1YREQ + 1 if the bus connected to APORT1Y is requested + 3 + 1 + read-only + + + APORT2XREQ + 1 if the bus connected to APORT2X is requested + 4 + 1 + read-only + + + APORT2YREQ + 1 if the bus connected to APORT2Y is requested + 5 + 1 + read-only + + + APORT3XREQ + 1 if the bus connected to APORT3X is requested + 6 + 1 + read-only + + + APORT3YREQ + 1 if the bus connected to APORT3Y is requested + 7 + 1 + read-only + + + APORT4XREQ + 1 if the bus connected to APORT4X is requested + 8 + 1 + read-only + + + APORT4YREQ + 1 if the bus connected to APORT4Y is requested + 9 + 1 + read-only + + + + + APORTCONFLICT + APORT BUS Request Status Register + 0x080 + 32 + read-only + 0x00000000 + 0x000003FF + + + APORT0XCONFLICT + 1 if the bus connected to APORT0X is in conflict with another peripheral + 0 + 1 + read-only + + + APORT0YCONFLICT + 1 if the bus connected to APORT0Y is in conflict with another peripheral + 1 + 1 + read-only + + + APORT1XCONFLICT + 1 if the bus connected to APORT1X is in conflict with another peripheral + 2 + 1 + read-only + + + APORT1YCONFLICT + 1 if the bus connected to APORT1Y is in conflict with another peripheral + 3 + 1 + read-only + + + APORT2XCONFLICT + 1 if the bus connected to APORT2X is in conflict with another peripheral + 4 + 1 + read-only + + + APORT2YCONFLICT + 1 if the bus connected to APORT2Y is in conflict with another peripheral + 5 + 1 + read-only + + + APORT3XCONFLICT + 1 if the bus connected to APORT3X is in conflict with another peripheral + 6 + 1 + read-only + + + APORT3YCONFLICT + 1 if the bus connected to APORT3Y is in conflict with another peripheral + 7 + 1 + read-only + + + APORT4XCONFLICT + 1 if the bus connected to APORT4X is in conflict with another peripheral + 8 + 1 + read-only + + + APORT4YCONFLICT + 1 if the bus connected to APORT4Y is in conflict with another peripheral + 9 + 1 + read-only + + + + + SINGLEFIFOCOUNT + Single FIFO Count Register + 0x084 + 32 + read-only + 0x00000000 + 0x00000007 + + + SINGLEDC + Single Data count + 0 + 3 + read-only + + + + + SCANFIFOCOUNT + Scan FIFO Count Register + 0x088 + 32 + read-only + 0x00000000 + 0x00000007 + + + SCANDC + Scan Data count + 0 + 3 + read-only + + + + + SINGLEFIFOCLEAR + Single FIFO Clear Register + 0x08C + 32 + write-only + 0x00000000 + 0x00000001 + + + SINGLEFIFOCLEAR + Clear Single FIFO content + 0 + 1 + write-only + + + + + SCANFIFOCLEAR + Scan FIFO Clear Register + 0x090 + 32 + write-only + 0x00000000 + 0x00000001 + + + SCANFIFOCLEAR + Clear Scan FIFO content + 0 + 1 + write-only + + + + + APORTMASTERDIS + APORT Bus Master Disable Register + 0x094 + 32 + read-write + 0x00000000 + 0x000003FC + + + APORT1XMASTERDIS + APORT1X Master Disable + 2 + 1 + read-write + + + APORT1YMASTERDIS + APORT1Y Master Disable + 3 + 1 + read-write + + + APORT2XMASTERDIS + APORT2X Master Disable + 4 + 1 + read-write + + + APORT2YMASTERDIS + APORT2Y Master Disable + 5 + 1 + read-write + + + APORT3XMASTERDIS + APORT3X Master Disable + 6 + 1 + read-write + + + APORT3YMASTERDIS + APORT3Y Master Disable + 7 + 1 + read-write + + + APORT4XMASTERDIS + APORT4X Master Disable + 8 + 1 + read-write + + + APORT4YMASTERDIS + APORT4Y Master Disable + 9 + 1 + read-write + + + + + + + ACMP0 + 1.6 + ACMP0 + 0x40000000 + + 0 + 0x00000400 + registers + + + ACMP0 + 13 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x07000000 + 0xBF3CF70D + + + EN + Analog Comparator Enable + 0 + 1 + read-write + + + INACTVAL + Inactive Value + 2 + 1 + read-write + + + GPIOINV + Comparator GPIO Output Invert + 3 + 1 + read-write + + + APORTXMASTERDIS + APORT Bus X Master Disable + 8 + 1 + read-write + + + APORTYMASTERDIS + APORT Bus Y Master Disable + 9 + 1 + read-write + + + APORTVMASTERDIS + APORT Bus Master Disable for Bus selected by VASEL + 10 + 1 + read-write + + + PWRSEL + Power Select + 12 + 3 + read-write + + + AVDD + AVDD supply + 0x00000000 + + + VREGVDD + VREGVDD supply + 0x00000001 + + + IOVDD0 + IOVDD/IOVDD0 supply + 0x00000002 + + + IOVDD1 + IOVDD1 supply (if part has two I/O voltages) + 0x00000004 + + + + + ACCURACY + ACMP accuracy mode + 15 + 1 + read-write + + + INPUTRANGE + Input Range + 18 + 2 + read-write + + + FULL + Setting when the input can be from 0 to VDD. + 0x00000000 + + + GTVDDDIV2 + Setting when the input will always be greater than VDD/2. + 0x00000001 + + + LTVDDDIV2 + Setting when the input will always be less than VDD/2. + 0x00000002 + + + + + IRISE + Rising Edge Interrupt Sense + 20 + 1 + read-write + + + IFALL + Falling Edge Interrupt Sense + 21 + 1 + read-write + + + BIASPROG + Bias Configuration + 24 + 6 + read-write + + + FULLBIAS + Full Bias Current + 31 + 1 + read-write + + + + + INPUTSEL + Input Selection Register + 0x004 + 32 + read-write + 0x00000000 + 0x757FFFFF + + + POSSEL + Positive Input Select + 0 + 8 + read-write + + + NEGSEL + Negative Input Select + 8 + 8 + read-write + + + VASEL + VA Selection + 16 + 6 + read-write + + + VDD + VDD + 0x00000000 + + + APORT2YCH0 + APORT2Y Channel 0 + 0x00000001 + + + APORT2YCH2 + APORT2Y Channel 2 + 0x00000003 + + + APORT2YCH4 + APORT2Y Channel 4 + 0x00000005 + + + APORT2YCH6 + APORT2Y Channel 6 + 0x00000007 + + + APORT2YCH8 + APORT2Y Channel 8 + 0x00000009 + + + APORT2YCH10 + APORT2Y Channel 10 + 0x0000000B + + + APORT2YCH12 + APORT2Y Channel 12 + 0x0000000D + + + APORT2YCH14 + APORT2Y Channel 14 + 0x0000000F + + + APORT2YCH16 + APORT2Y Channel 16 + 0x00000011 + + + APORT2YCH18 + APORT2Y Channel 18 + 0x00000013 + + + APORT2YCH20 + APORT2Y Channel 20 + 0x00000015 + + + APORT2YCH22 + APORT2Y Channel 22 + 0x00000017 + + + APORT2YCH24 + APORT2Y Channel 24 + 0x00000019 + + + APORT2YCH26 + APORT2Y Channel 26 + 0x0000001B + + + APORT2YCH28 + APORT2Y Channel 28 + 0x0000001D + + + APORT2YCH30 + APORT2Y Channel 30 + 0x0000001F + + + APORT1XCH0 + APORT1X Channel 0 + 0x00000020 + + + APORT1YCH1 + APORT1Y Channel 1 + 0x00000021 + + + APORT1XCH2 + APORT1X Channel 2 + 0x00000022 + + + APORT1YCH3 + APORT1Y Channel 3 + 0x00000023 + + + APORT1XCH4 + APORT1X Channel 4 + 0x00000024 + + + APORT1YCH5 + APORT1Y Channel 5 + 0x00000025 + + + APORT1XCH6 + APORT1X Channel 6 + 0x00000026 + + + APORT1YCH7 + APORT1Y Channel 7 + 0x00000027 + + + APORT1XCH8 + APORT1X Channel 8 + 0x00000028 + + + APORT1YCH9 + APORT1Y Channel 9 + 0x00000029 + + + APORT1XCH10 + APORT1X Channel 10 + 0x0000002A + + + APORT1YCH11 + APORT1Y Channel 11 + 0x0000002B + + + APORT1XCH12 + APORT1X Channel 12 + 0x0000002C + + + APORT1YCH13 + APORT1Y Channel 13 + 0x0000002D + + + APORT1XCH14 + APORT1X Channel 14 + 0x0000002E + + + APORT1YCH15 + APORT1Y Channel 15 + 0x0000002F + + + APORT1XCH16 + APORT1X Channel 16 + 0x00000030 + + + APORT1YCH17 + APORT1Y Channel 17 + 0x00000031 + + + APORT1XCH18 + APORT1X Channel 18 + 0x00000032 + + + APORT1YCH19 + APORT1Y Channel 19 + 0x00000033 + + + APORT1XCH20 + APORT1X Channel 20 + 0x00000034 + + + APORT1YCH21 + APORT1Y Channel 21 + 0x00000035 + + + APORT1XCH22 + APORT1X Channel 22 + 0x00000036 + + + APORT1YCH23 + APORT1Y Channel 23 + 0x00000037 + + + APORT1XCH24 + APORT1X Channel 24 + 0x00000038 + + + APORT1YCH25 + APORT1Y Channel 25 + 0x00000039 + + + APORT1XCH26 + APORT1X Channel 26 + 0x0000003A + + + APORT1YCH27 + APORT1Y Channel 27 + 0x0000003B + + + APORT1XCH28 + APORT1X Channel 28 + 0x0000003C + + + APORT1YCH29 + APORT1Y Channel 29 + 0x0000003D + + + APORT1XCH30 + APORT1X Channel 30 + 0x0000003E + + + APORT1YCH31 + APORT1Y Channel 31 + 0x0000003F + + + + + VBSEL + VB Selection + 22 + 1 + read-write + + + VLPSEL + Low-Power Sampled Voltage Selection + 24 + 1 + read-write + + + CSRESEN + Capacitive Sense Mode Internal Resistor Enable + 26 + 1 + read-write + + + CSRESSEL + Capacitive Sense Mode Internal Resistor Select + 28 + 3 + read-write + + + RES0 + Internal capacitive sense resistor value 0 + 0x00000000 + + + RES1 + Internal capacitive sense resistor value 1 + 0x00000001 + + + RES2 + Internal capacitive sense resistor value 2 + 0x00000002 + + + RES3 + Internal capacitive sense resistor value 3 + 0x00000003 + + + RES4 + Internal capacitive sense resistor value 4 + 0x00000004 + + + RES5 + Internal capacitive sense resistor value 5 + 0x00000005 + + + RES6 + Internal capacitive sense resistor value 6 + 0x00000006 + + + RES7 + Internal capacitive sense resistor value 7 + 0x00000007 + + + + + + + STATUS + Status Register + 0x008 + 32 + read-only + 0x00000000 + 0x00000007 + + + ACMPACT + Analog Comparator Active + 0 + 1 + read-only + + + ACMPOUT + Analog Comparator Output + 1 + 1 + read-only + + + APORTCONFLICT + APORT Conflict Output + 2 + 1 + read-only + + + + + IF + Interrupt Flag Register + 0x00C + 32 + read-only + 0x00000000 + 0x00000007 + + + EDGE + Edge Triggered Interrupt Flag + 0 + 1 + read-only + + + WARMUP + Warm-up Interrupt Flag + 1 + 1 + read-only + + + APORTCONFLICT + APORT Conflict Interrupt Flag + 2 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x010 + 32 + write-only + 0x00000000 + 0x00000007 + + + EDGE + Set EDGE Interrupt Flag + 0 + 1 + write-only + + + WARMUP + Set WARMUP Interrupt Flag + 1 + 1 + write-only + + + APORTCONFLICT + Set APORTCONFLICT Interrupt Flag + 2 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x014 + 32 + write-only + 0x00000000 + 0x00000007 + + + EDGE + Clear EDGE Interrupt Flag + 0 + 1 + write-only + + + WARMUP + Clear WARMUP Interrupt Flag + 1 + 1 + write-only + + + APORTCONFLICT + Clear APORTCONFLICT Interrupt Flag + 2 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x018 + 32 + read-write + 0x00000000 + 0x00000007 + + + EDGE + EDGE Interrupt Enable + 0 + 1 + read-write + + + WARMUP + WARMUP Interrupt Enable + 1 + 1 + read-write + + + APORTCONFLICT + APORTCONFLICT Interrupt Enable + 2 + 1 + read-write + + + + + APORTREQ + APORT Request Status Register + 0x020 + 32 + read-only + 0x00000000 + 0x000003FF + + + APORT0XREQ + 1 if the bus connected to APORT0X is requested + 0 + 1 + read-only + + + APORT0YREQ + 1 if the bus connected to APORT0Y is requested + 1 + 1 + read-only + + + APORT1XREQ + 1 if the bus connected to APORT2X is requested + 2 + 1 + read-only + + + APORT1YREQ + 1 if the bus connected to APORT1X is requested + 3 + 1 + read-only + + + APORT2XREQ + 1 if the bus connected to APORT2X is requested + 4 + 1 + read-only + + + APORT2YREQ + 1 if the bus connected to APORT2Y is requested + 5 + 1 + read-only + + + APORT3XREQ + 1 if the bus connected to APORT3X is requested + 6 + 1 + read-only + + + APORT3YREQ + 1 if the bus connected to APORT3Y is requested + 7 + 1 + read-only + + + APORT4XREQ + 1 if the bus connected to APORT4X is requested + 8 + 1 + read-only + + + APORT4YREQ + 1 if the bus connected to APORT4Y is requested + 9 + 1 + read-only + + + + + APORTCONFLICT + APORT Request Status Register + 0x024 + 32 + read-only + 0x00000000 + 0x000003FF + + + APORT0XCONFLICT + 1 if the bus connected to APORT0X is in conflict with another peripheral + 0 + 1 + read-only + + + APORT0YCONFLICT + 1 if the bus connected to APORT0Y is in conflict with another peripheral + 1 + 1 + read-only + + + APORT1XCONFLICT + 1 if the bus connected to APORT1X is in conflict with another peripheral + 2 + 1 + read-only + + + APORT1YCONFLICT + 1 if the bus connected to APORT1X is in conflict with another peripheral + 3 + 1 + read-only + + + APORT2XCONFLICT + 1 if the bus connected to APORT2X is in conflict with another peripheral + 4 + 1 + read-only + + + APORT2YCONFLICT + 1 if the bus connected to APORT2Y is in conflict with another peripheral + 5 + 1 + read-only + + + APORT3XCONFLICT + 1 if the bus connected to APORT3X is in conflict with another peripheral + 6 + 1 + read-only + + + APORT3YCONFLICT + 1 if the bus connected to APORT3Y is in conflict with another peripheral + 7 + 1 + read-only + + + APORT4XCONFLICT + 1 if the bus connected to APORT4X is in conflict with another peripheral + 8 + 1 + read-only + + + APORT4YCONFLICT + 1 if the bus connected to APORT4Y is in conflict with another peripheral + 9 + 1 + read-only + + + + + HYSTERESIS0 + Hysteresis 0 Register + 0x028 + 32 + read-write + 0x00000000 + 0x3F3F000F + + + HYST + Hysteresis Select when ACMPOUT=0 + 0 + 4 + read-write + + + HYST0 + No hysteresis + 0x00000000 + + + HYST1 + 14 mV hysteresis + 0x00000001 + + + HYST2 + 25 mV hysteresis + 0x00000002 + + + HYST3 + 30 mV hysteresis + 0x00000003 + + + HYST4 + 35 mV hysteresis + 0x00000004 + + + HYST5 + 39 mV hysteresis + 0x00000005 + + + HYST6 + 42 mV hysteresis + 0x00000006 + + + HYST7 + 45 mV hysteresis + 0x00000007 + + + HYST8 + No hysteresis + 0x00000008 + + + HYST9 + -14 mV hysteresis + 0x00000009 + + + HYST10 + -25 mV hysteresis + 0x0000000A + + + HYST11 + -30 mV hysteresis + 0x0000000B + + + HYST12 + -35 mV hysteresis + 0x0000000C + + + HYST13 + -39 mV hysteresis + 0x0000000D + + + HYST14 + -42 mV hysteresis + 0x0000000E + + + HYST15 + -45 mV hysteresis + 0x0000000F + + + + + DIVVA + Divider for VA Voltage when ACMPOUT=0 + 16 + 6 + read-write + + + DIVVB + Divider for VB Voltage when ACMPOUT=0 + 24 + 6 + read-write + + + + + HYSTERESIS1 + Hysteresis 1 Register + 0x02C + 32 + read-write + 0x00000000 + 0x3F3F000F + + + HYST + Hysteresis Select when ACMPOUT=1 + 0 + 4 + read-write + + + HYST0 + No hysteresis + 0x00000000 + + + HYST1 + 14 mV hysteresis + 0x00000001 + + + HYST2 + 25 mV hysteresis + 0x00000002 + + + HYST3 + 30 mV hysteresis + 0x00000003 + + + HYST4 + 35 mV hysteresis + 0x00000004 + + + HYST5 + 39 mV hysteresis + 0x00000005 + + + HYST6 + 42 mV hysteresis + 0x00000006 + + + HYST7 + 45 mV hysteresis + 0x00000007 + + + HYST8 + No hysteresis + 0x00000008 + + + HYST9 + -14 mV hysteresis + 0x00000009 + + + HYST10 + -25 mV hysteresis + 0x0000000A + + + HYST11 + -30 mV hysteresis + 0x0000000B + + + HYST12 + -35 mV hysteresis + 0x0000000C + + + HYST13 + -39 mV hysteresis + 0x0000000D + + + HYST14 + -42 mV hysteresis + 0x0000000E + + + HYST15 + -45 mV hysteresis + 0x0000000F + + + + + DIVVA + Divider for VA Voltage when ACMPOUT=1 + 16 + 6 + read-write + + + DIVVB + Divider for VB Voltage when ACMPOUT=1 + 24 + 6 + read-write + + + + + ROUTEPEN + I/O Routing Pine Enable Register + 0x040 + 32 + read-write + 0x00000000 + 0x00000001 + + + OUTPEN + ACMP Output Pin Enable + 0 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x044 + 32 + read-write + 0x00000000 + 0x0000003F + + + OUTLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + + + ACMP1 + 1.6 + ACMP1 + 0x40000400 + + 0 + 0x00000400 + registers + + + ACMP0 + 13 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x07000000 + 0xBF3CF70D + + + EN + Analog Comparator Enable + 0 + 1 + read-write + + + INACTVAL + Inactive Value + 2 + 1 + read-write + + + GPIOINV + Comparator GPIO Output Invert + 3 + 1 + read-write + + + APORTXMASTERDIS + APORT Bus X Master Disable + 8 + 1 + read-write + + + APORTYMASTERDIS + APORT Bus Y Master Disable + 9 + 1 + read-write + + + APORTVMASTERDIS + APORT Bus Master Disable for Bus selected by VASEL + 10 + 1 + read-write + + + PWRSEL + Power Select + 12 + 3 + read-write + + + AVDD + AVDD supply + 0x00000000 + + + VREGVDD + VREGVDD supply + 0x00000001 + + + IOVDD0 + IOVDD/IOVDD0 supply + 0x00000002 + + + IOVDD1 + IOVDD1 supply (if part has two I/O voltages) + 0x00000004 + + + + + ACCURACY + ACMP accuracy mode + 15 + 1 + read-write + + + INPUTRANGE + Input Range + 18 + 2 + read-write + + + FULL + Setting when the input can be from 0 to VDD. + 0x00000000 + + + GTVDDDIV2 + Setting when the input will always be greater than VDD/2. + 0x00000001 + + + LTVDDDIV2 + Setting when the input will always be less than VDD/2. + 0x00000002 + + + + + IRISE + Rising Edge Interrupt Sense + 20 + 1 + read-write + + + IFALL + Falling Edge Interrupt Sense + 21 + 1 + read-write + + + BIASPROG + Bias Configuration + 24 + 6 + read-write + + + FULLBIAS + Full Bias Current + 31 + 1 + read-write + + + + + INPUTSEL + Input Selection Register + 0x004 + 32 + read-write + 0x00000000 + 0x757FFFFF + + + POSSEL + Positive Input Select + 0 + 8 + read-write + + + NEGSEL + Negative Input Select + 8 + 8 + read-write + + + VASEL + VA Selection + 16 + 6 + read-write + + + VDD + VDD + 0x00000000 + + + APORT2YCH0 + APORT2Y Channel 0 + 0x00000001 + + + APORT2YCH2 + APORT2Y Channel 2 + 0x00000003 + + + APORT2YCH4 + APORT2Y Channel 4 + 0x00000005 + + + APORT2YCH6 + APORT2Y Channel 6 + 0x00000007 + + + APORT2YCH8 + APORT2Y Channel 8 + 0x00000009 + + + APORT2YCH10 + APORT2Y Channel 10 + 0x0000000B + + + APORT2YCH12 + APORT2Y Channel 12 + 0x0000000D + + + APORT2YCH14 + APORT2Y Channel 14 + 0x0000000F + + + APORT2YCH16 + APORT2Y Channel 16 + 0x00000011 + + + APORT2YCH18 + APORT2Y Channel 18 + 0x00000013 + + + APORT2YCH20 + APORT2Y Channel 20 + 0x00000015 + + + APORT2YCH22 + APORT2Y Channel 22 + 0x00000017 + + + APORT2YCH24 + APORT2Y Channel 24 + 0x00000019 + + + APORT2YCH26 + APORT2Y Channel 26 + 0x0000001B + + + APORT2YCH28 + APORT2Y Channel 28 + 0x0000001D + + + APORT2YCH30 + APORT2Y Channel 30 + 0x0000001F + + + APORT1XCH0 + APORT1X Channel 0 + 0x00000020 + + + APORT1YCH1 + APORT1Y Channel 1 + 0x00000021 + + + APORT1XCH2 + APORT1X Channel 2 + 0x00000022 + + + APORT1YCH3 + APORT1Y Channel 3 + 0x00000023 + + + APORT1XCH4 + APORT1X Channel 4 + 0x00000024 + + + APORT1YCH5 + APORT1Y Channel 5 + 0x00000025 + + + APORT1XCH6 + APORT1X Channel 6 + 0x00000026 + + + APORT1YCH7 + APORT1Y Channel 7 + 0x00000027 + + + APORT1XCH8 + APORT1X Channel 8 + 0x00000028 + + + APORT1YCH9 + APORT1Y Channel 9 + 0x00000029 + + + APORT1XCH10 + APORT1X Channel 10 + 0x0000002A + + + APORT1YCH11 + APORT1Y Channel 11 + 0x0000002B + + + APORT1XCH12 + APORT1X Channel 12 + 0x0000002C + + + APORT1YCH13 + APORT1Y Channel 13 + 0x0000002D + + + APORT1XCH14 + APORT1X Channel 14 + 0x0000002E + + + APORT1YCH15 + APORT1Y Channel 15 + 0x0000002F + + + APORT1XCH16 + APORT1X Channel 16 + 0x00000030 + + + APORT1YCH17 + APORT1Y Channel 17 + 0x00000031 + + + APORT1XCH18 + APORT1X Channel 18 + 0x00000032 + + + APORT1YCH19 + APORT1Y Channel 19 + 0x00000033 + + + APORT1XCH20 + APORT1X Channel 20 + 0x00000034 + + + APORT1YCH21 + APORT1Y Channel 21 + 0x00000035 + + + APORT1XCH22 + APORT1X Channel 22 + 0x00000036 + + + APORT1YCH23 + APORT1Y Channel 23 + 0x00000037 + + + APORT1XCH24 + APORT1X Channel 24 + 0x00000038 + + + APORT1YCH25 + APORT1Y Channel 25 + 0x00000039 + + + APORT1XCH26 + APORT1X Channel 26 + 0x0000003A + + + APORT1YCH27 + APORT1Y Channel 27 + 0x0000003B + + + APORT1XCH28 + APORT1X Channel 28 + 0x0000003C + + + APORT1YCH29 + APORT1Y Channel 29 + 0x0000003D + + + APORT1XCH30 + APORT1X Channel 30 + 0x0000003E + + + APORT1YCH31 + APORT1Y Channel 31 + 0x0000003F + + + + + VBSEL + VB Selection + 22 + 1 + read-write + + + VLPSEL + Low-Power Sampled Voltage Selection + 24 + 1 + read-write + + + CSRESEN + Capacitive Sense Mode Internal Resistor Enable + 26 + 1 + read-write + + + CSRESSEL + Capacitive Sense Mode Internal Resistor Select + 28 + 3 + read-write + + + RES0 + Internal capacitive sense resistor value 0 + 0x00000000 + + + RES1 + Internal capacitive sense resistor value 1 + 0x00000001 + + + RES2 + Internal capacitive sense resistor value 2 + 0x00000002 + + + RES3 + Internal capacitive sense resistor value 3 + 0x00000003 + + + RES4 + Internal capacitive sense resistor value 4 + 0x00000004 + + + RES5 + Internal capacitive sense resistor value 5 + 0x00000005 + + + RES6 + Internal capacitive sense resistor value 6 + 0x00000006 + + + RES7 + Internal capacitive sense resistor value 7 + 0x00000007 + + + + + + + STATUS + Status Register + 0x008 + 32 + read-only + 0x00000000 + 0x00000007 + + + ACMPACT + Analog Comparator Active + 0 + 1 + read-only + + + ACMPOUT + Analog Comparator Output + 1 + 1 + read-only + + + APORTCONFLICT + APORT Conflict Output + 2 + 1 + read-only + + + + + IF + Interrupt Flag Register + 0x00C + 32 + read-only + 0x00000000 + 0x00000007 + + + EDGE + Edge Triggered Interrupt Flag + 0 + 1 + read-only + + + WARMUP + Warm-up Interrupt Flag + 1 + 1 + read-only + + + APORTCONFLICT + APORT Conflict Interrupt Flag + 2 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x010 + 32 + write-only + 0x00000000 + 0x00000007 + + + EDGE + Set EDGE Interrupt Flag + 0 + 1 + write-only + + + WARMUP + Set WARMUP Interrupt Flag + 1 + 1 + write-only + + + APORTCONFLICT + Set APORTCONFLICT Interrupt Flag + 2 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x014 + 32 + write-only + 0x00000000 + 0x00000007 + + + EDGE + Clear EDGE Interrupt Flag + 0 + 1 + write-only + + + WARMUP + Clear WARMUP Interrupt Flag + 1 + 1 + write-only + + + APORTCONFLICT + Clear APORTCONFLICT Interrupt Flag + 2 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x018 + 32 + read-write + 0x00000000 + 0x00000007 + + + EDGE + EDGE Interrupt Enable + 0 + 1 + read-write + + + WARMUP + WARMUP Interrupt Enable + 1 + 1 + read-write + + + APORTCONFLICT + APORTCONFLICT Interrupt Enable + 2 + 1 + read-write + + + + + APORTREQ + APORT Request Status Register + 0x020 + 32 + read-only + 0x00000000 + 0x000003FF + + + APORT0XREQ + 1 if the bus connected to APORT0X is requested + 0 + 1 + read-only + + + APORT0YREQ + 1 if the bus connected to APORT0Y is requested + 1 + 1 + read-only + + + APORT1XREQ + 1 if the bus connected to APORT2X is requested + 2 + 1 + read-only + + + APORT1YREQ + 1 if the bus connected to APORT1X is requested + 3 + 1 + read-only + + + APORT2XREQ + 1 if the bus connected to APORT2X is requested + 4 + 1 + read-only + + + APORT2YREQ + 1 if the bus connected to APORT2Y is requested + 5 + 1 + read-only + + + APORT3XREQ + 1 if the bus connected to APORT3X is requested + 6 + 1 + read-only + + + APORT3YREQ + 1 if the bus connected to APORT3Y is requested + 7 + 1 + read-only + + + APORT4XREQ + 1 if the bus connected to APORT4X is requested + 8 + 1 + read-only + + + APORT4YREQ + 1 if the bus connected to APORT4Y is requested + 9 + 1 + read-only + + + + + APORTCONFLICT + APORT Request Status Register + 0x024 + 32 + read-only + 0x00000000 + 0x000003FF + + + APORT0XCONFLICT + 1 if the bus connected to APORT0X is in conflict with another peripheral + 0 + 1 + read-only + + + APORT0YCONFLICT + 1 if the bus connected to APORT0Y is in conflict with another peripheral + 1 + 1 + read-only + + + APORT1XCONFLICT + 1 if the bus connected to APORT1X is in conflict with another peripheral + 2 + 1 + read-only + + + APORT1YCONFLICT + 1 if the bus connected to APORT1X is in conflict with another peripheral + 3 + 1 + read-only + + + APORT2XCONFLICT + 1 if the bus connected to APORT2X is in conflict with another peripheral + 4 + 1 + read-only + + + APORT2YCONFLICT + 1 if the bus connected to APORT2Y is in conflict with another peripheral + 5 + 1 + read-only + + + APORT3XCONFLICT + 1 if the bus connected to APORT3X is in conflict with another peripheral + 6 + 1 + read-only + + + APORT3YCONFLICT + 1 if the bus connected to APORT3Y is in conflict with another peripheral + 7 + 1 + read-only + + + APORT4XCONFLICT + 1 if the bus connected to APORT4X is in conflict with another peripheral + 8 + 1 + read-only + + + APORT4YCONFLICT + 1 if the bus connected to APORT4Y is in conflict with another peripheral + 9 + 1 + read-only + + + + + HYSTERESIS0 + Hysteresis 0 Register + 0x028 + 32 + read-write + 0x00000000 + 0x3F3F000F + + + HYST + Hysteresis Select when ACMPOUT=0 + 0 + 4 + read-write + + + HYST0 + No hysteresis + 0x00000000 + + + HYST1 + 14 mV hysteresis + 0x00000001 + + + HYST2 + 25 mV hysteresis + 0x00000002 + + + HYST3 + 30 mV hysteresis + 0x00000003 + + + HYST4 + 35 mV hysteresis + 0x00000004 + + + HYST5 + 39 mV hysteresis + 0x00000005 + + + HYST6 + 42 mV hysteresis + 0x00000006 + + + HYST7 + 45 mV hysteresis + 0x00000007 + + + HYST8 + No hysteresis + 0x00000008 + + + HYST9 + -14 mV hysteresis + 0x00000009 + + + HYST10 + -25 mV hysteresis + 0x0000000A + + + HYST11 + -30 mV hysteresis + 0x0000000B + + + HYST12 + -35 mV hysteresis + 0x0000000C + + + HYST13 + -39 mV hysteresis + 0x0000000D + + + HYST14 + -42 mV hysteresis + 0x0000000E + + + HYST15 + -45 mV hysteresis + 0x0000000F + + + + + DIVVA + Divider for VA Voltage when ACMPOUT=0 + 16 + 6 + read-write + + + DIVVB + Divider for VB Voltage when ACMPOUT=0 + 24 + 6 + read-write + + + + + HYSTERESIS1 + Hysteresis 1 Register + 0x02C + 32 + read-write + 0x00000000 + 0x3F3F000F + + + HYST + Hysteresis Select when ACMPOUT=1 + 0 + 4 + read-write + + + HYST0 + No hysteresis + 0x00000000 + + + HYST1 + 14 mV hysteresis + 0x00000001 + + + HYST2 + 25 mV hysteresis + 0x00000002 + + + HYST3 + 30 mV hysteresis + 0x00000003 + + + HYST4 + 35 mV hysteresis + 0x00000004 + + + HYST5 + 39 mV hysteresis + 0x00000005 + + + HYST6 + 42 mV hysteresis + 0x00000006 + + + HYST7 + 45 mV hysteresis + 0x00000007 + + + HYST8 + No hysteresis + 0x00000008 + + + HYST9 + -14 mV hysteresis + 0x00000009 + + + HYST10 + -25 mV hysteresis + 0x0000000A + + + HYST11 + -30 mV hysteresis + 0x0000000B + + + HYST12 + -35 mV hysteresis + 0x0000000C + + + HYST13 + -39 mV hysteresis + 0x0000000D + + + HYST14 + -42 mV hysteresis + 0x0000000E + + + HYST15 + -45 mV hysteresis + 0x0000000F + + + + + DIVVA + Divider for VA Voltage when ACMPOUT=1 + 16 + 6 + read-write + + + DIVVB + Divider for VB Voltage when ACMPOUT=1 + 24 + 6 + read-write + + + + + ROUTEPEN + I/O Routing Pine Enable Register + 0x040 + 32 + read-write + 0x00000000 + 0x00000001 + + + OUTPEN + ACMP Output Pin Enable + 0 + 1 + read-write + + + + + ROUTELOC0 + I/O Routing Location Register + 0x044 + 32 + read-write + 0x00000000 + 0x0000003F + + + OUTLOC + I/O Location + 0 + 6 + read-write + + + LOC0 + Location 0 + 0x00000000 + + + LOC1 + Location 1 + 0x00000001 + + + LOC2 + Location 2 + 0x00000002 + + + LOC3 + Location 3 + 0x00000003 + + + LOC4 + Location 4 + 0x00000004 + + + LOC5 + Location 5 + 0x00000005 + + + LOC6 + Location 6 + 0x00000006 + + + LOC7 + Location 7 + 0x00000007 + + + LOC8 + Location 8 + 0x00000008 + + + LOC9 + Location 9 + 0x00000009 + + + LOC10 + Location 10 + 0x0000000A + + + LOC11 + Location 11 + 0x0000000B + + + LOC12 + Location 12 + 0x0000000C + + + LOC13 + Location 13 + 0x0000000D + + + LOC14 + Location 14 + 0x0000000E + + + LOC15 + Location 15 + 0x0000000F + + + LOC16 + Location 16 + 0x00000010 + + + LOC17 + Location 17 + 0x00000011 + + + LOC18 + Location 18 + 0x00000012 + + + LOC19 + Location 19 + 0x00000013 + + + LOC20 + Location 20 + 0x00000014 + + + LOC21 + Location 21 + 0x00000015 + + + LOC22 + Location 22 + 0x00000016 + + + LOC23 + Location 23 + 0x00000017 + + + LOC24 + Location 24 + 0x00000018 + + + LOC25 + Location 25 + 0x00000019 + + + LOC26 + Location 26 + 0x0000001A + + + LOC27 + Location 27 + 0x0000001B + + + LOC28 + Location 28 + 0x0000001C + + + LOC29 + Location 29 + 0x0000001D + + + LOC30 + Location 30 + 0x0000001E + + + LOC31 + Location 31 + 0x0000001F + + + + + + + + + IDAC0 + 1.6 + IDAC0 + 0x40006000 + + 0 + 0x00000400 + registers + + + IDAC0 + 15 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x00F17FFF + + + EN + Current DAC Enable + 0 + 1 + read-write + + + CURSINK + Current Sink Enable + 1 + 1 + read-write + + + MINOUTTRANS + Minimum Output Transition Enable + 2 + 1 + read-write + + + OUTEN + Output Enable + 3 + 1 + read-write + + + APORTOUTSEL + APORT Output Select + 4 + 8 + read-write + + + APORT1XCH0 + APORT1X Channel 0 + 0x00000020 + + + APORT1YCH1 + APORT1Y Channel 1 + 0x00000021 + + + APORT1XCH2 + APORT1X Channel 2 + 0x00000022 + + + APORT1YCH3 + APORT1Y Channel 3 + 0x00000023 + + + APORT1XCH4 + APORT1X Channel 4 + 0x00000024 + + + APORT1YCH5 + APORT1Y Channel 5 + 0x00000025 + + + APORT1XCH6 + APORT1X Channel 6 + 0x00000026 + + + APORT1YCH7 + APORT1Y Channel 7 + 0x00000027 + + + APORT1XCH8 + APORT1X Channel 8 + 0x00000028 + + + APORT1YCH9 + APORT1Y Channel 9 + 0x00000029 + + + APORT1XCH10 + APORT1X Channel 10 + 0x0000002A + + + APORT1YCH11 + APORT1Y Channel 11 + 0x0000002B + + + APORT1XCH12 + APORT1X Channel 12 + 0x0000002C + + + APORT1YCH13 + APORT1Y Channel 13 + 0x0000002D + + + APORT1XCH14 + APORT1X Channel 14 + 0x0000002E + + + APORT1YCH15 + APORT1Y Channel 15 + 0x0000002F + + + APORT1XCH16 + APORT1X Channel 16 + 0x00000030 + + + APORT1YCH17 + APORT1Y Channel 17 + 0x00000031 + + + APORT1XCH18 + APORT1X Channel 18 + 0x00000032 + + + APORT1YCH19 + APORT1Y Channel 19 + 0x00000033 + + + APORT1XCH20 + APORT1X Channel 20 + 0x00000034 + + + APORT1YCH21 + APORT1Y Channel 21 + 0x00000035 + + + APORT1XCH22 + APORT1X Channel 22 + 0x00000036 + + + APORT1YCH23 + APORT1Y Channel 23 + 0x00000037 + + + APORT1XCH24 + APORT1X Channel 24 + 0x00000038 + + + APORT1YCH25 + APORT1Y Channel 25 + 0x00000039 + + + APORT1XCH26 + APORT1X Channel 26 + 0x0000003A + + + APORT1YCH27 + APORT1Y Channel 27 + 0x0000003B + + + APORT1XCH28 + APORT1X Channel 28 + 0x0000003C + + + APORT1YCH29 + APORT1Y Channel 29 + 0x0000003D + + + APORT1XCH30 + APORT1X Channel 30 + 0x0000003E + + + APORT1YCH31 + APORT1Y Channel 31 + 0x0000003F + + + + + PWRSEL + Power Select + 12 + 1 + read-write + + + EM2DELAY + EM2 Delay + 13 + 1 + read-write + + + APORTMASTERDIS + APORT Bus Master Disable + 14 + 1 + read-write + + + OUTENPRS + PRS Controlled Output Enable + 16 + 1 + read-write + + + PRSSEL + IDAC Output PRS channnel Select + 20 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected. + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected. + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected. + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected. + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected. + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected. + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected. + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected. + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected. + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected. + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected. + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected. + 0x0000000B + + + + + + + CURPROG + Current Programming Register + 0x004 + 32 + read-write + 0x009B0000 + 0x00FF1F03 + + + RANGESEL + Current Range Select + 0 + 2 + read-write + + + RANGE0 + Current range set to 0 - 1.6 uA. + 0x00000000 + + + RANGE1 + Current range set to 1.6 - 4.7 uA. + 0x00000001 + + + RANGE2 + Current range set to 0.5 - 16 uA. + 0x00000002 + + + RANGE3 + Current range set to 2 - 64 uA. + 0x00000003 + + + + + STEPSEL + Current Step Size Select + 8 + 5 + read-write + + + TUNING + Tune the current to given accuracy + 16 + 8 + read-write + + + + + DUTYCONFIG + Duty Cycle Configauration Register + 0x00C + 32 + read-write + 0x00000000 + 0x00000002 + + + EM2DUTYCYCLEDIS + Duty Cycle Enable. + 1 + 1 + read-write + + + + + STATUS + Status Register + 0x018 + 32 + read-only + 0x00000000 + 0x00000002 + + + APORTCONFLICT + APORT Conflict Output + 1 + 1 + read-only + + + + + IF + Interrupt Flag Register + 0x020 + 32 + read-only + 0x00000000 + 0x00000002 + + + APORTCONFLICT + APORT Conflict Interrupt Flag + 1 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x024 + 32 + write-only + 0x00000000 + 0x00000003 + + + CURSTABLE + Set CURSTABLE Interrupt Flag + 0 + 1 + write-only + + + APORTCONFLICT + Set APORTCONFLICT Interrupt Flag + 1 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x028 + 32 + write-only + 0x00000000 + 0x00000003 + + + CURSTABLE + Clear CURSTABLE Interrupt Flag + 0 + 1 + write-only + + + APORTCONFLICT + Clear APORTCONFLICT Interrupt Flag + 1 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x02C + 32 + read-write + 0x00000000 + 0x00000003 + + + CURSTABLE + CURSTABLE Interrupt Enable + 0 + 1 + read-write + + + APORTCONFLICT + APORTCONFLICT Interrupt Enable + 1 + 1 + read-write + + + + + APORTREQ + APORT Request Status Register + 0x034 + 32 + read-only + 0x00000000 + 0x0000000C + + + APORT1XREQ + 1 if the APORT bus connected to APORT1X is requested + 2 + 1 + read-only + + + APORT1YREQ + 1 if the bus connected to APORT1Y is requested + 3 + 1 + read-only + + + + + APORTCONFLICT + APORT Request Status Register + 0x038 + 32 + read-only + 0x00000000 + 0x0000000C + + + APORT1XCONFLICT + 1 if the bus connected to APORT1X is in conflict with another peripheral + 2 + 1 + read-only + + + APORT1YCONFLICT + 1 if the bus connected to APORT1Y is in conflict with another peripheral + 3 + 1 + read-only + + + + + + + RTCC + 1.6 + RTCC + 0x40042000 + + 0 + 0x00000400 + registers + + + RTCC + 29 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000000 + 0x00039F35 + + + ENABLE + RTCC Enable + 0 + 1 + read-write + + + DEBUGRUN + Debug Mode Run Enable + 2 + 1 + read-write + + + PRECCV0TOP + Pre-counter CCV0 top value enable. + 4 + 1 + read-write + + + CCV1TOP + CCV1 top value enable + 5 + 1 + read-write + + + CNTPRESC + Counter prescaler value. + 8 + 4 + read-write + + + DIV1 + CLKCNT = LFECLKRTCC/1 + 0x00000000 + + + DIV2 + CLKCNT = LFECLKRTCC/2 + 0x00000001 + + + DIV4 + CLKCNT = LFECLKRTCC/4 + 0x00000002 + + + DIV8 + CLKCNT = LFECLKRTCC/8 + 0x00000003 + + + DIV16 + CLKCNT = LFECLKRTCC/16 + 0x00000004 + + + DIV32 + CLKCNT = LFECLKRTCC/32 + 0x00000005 + + + DIV64 + CLKCNT = LFECLKRTCC/64 + 0x00000006 + + + DIV128 + CLKCNT = LFECLKRTCC/128 + 0x00000007 + + + DIV256 + CLKCNT = LFECLKRTCC/256 + 0x00000008 + + + DIV512 + CLKCNT = LFECLKRTCC/512 + 0x00000009 + + + DIV1024 + CLKCNT = LFECLKRTCC/1024 + 0x0000000A + + + DIV2048 + CLKCNT = LFECLKRTCC/2048 + 0x0000000B + + + DIV4096 + CLKCNT = LFECLKRTCC/4096 + 0x0000000C + + + DIV8192 + CLKCNT = LFECLKRTCC/8192 + 0x0000000D + + + DIV16384 + CLKCNT = LFECLKRTCC/16384 + 0x0000000E + + + DIV32768 + CLKCNT = LFECLKRTCC/32768 + 0x0000000F + + + + + CNTTICK + Counter prescaler mode. + 12 + 1 + read-write + + + OSCFDETEN + Oscillator failure detection enable + 15 + 1 + read-write + + + CNTMODE + Main counter mode + 16 + 1 + read-write + + + LYEARCORRDIS + Leap year correction disabled. + 17 + 1 + read-write + + + + + PRECNT + Pre-Counter Value Register + 0x004 + 32 + read-write + 0x00000000 + 0x00007FFF + + + PRECNT + Pre-Counter Value + 0 + 15 + read-write + + + + + CNT + Counter Value Register + 0x008 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + CNT + Counter Value + 0 + 32 + read-write + + + + + COMBCNT + Combined Pre-Counter and Counter Value Register + 0x00C + 32 + read-only + 0x00000000 + 0xFFFFFFFF + + + PRECNT + Pre-Counter Value + 0 + 15 + read-only + + + CNTLSB + Counter Value + 15 + 17 + read-only + + + + + TIME + Time of day register + 0x010 + 32 + read-write + 0x00000000 + 0x003F7F7F + + + SECU + Seconds, units. + 0 + 4 + read-write + + + SECT + Seconds, tens. + 4 + 3 + read-write + + + MINU + Minutes, units. + 8 + 4 + read-write + + + MINT + Minutes, tens. + 12 + 3 + read-write + + + HOURU + Hours, units. + 16 + 4 + read-write + + + HOURT + Hours, tens. + 20 + 2 + read-write + + + + + DATE + Date register + 0x014 + 32 + read-write + 0x00000000 + 0x07FF1F3F + + + DAYOMU + Day of month, units. + 0 + 4 + read-write + + + DAYOMT + Day of month, tens. + 4 + 2 + read-write + + + MONTHU + Month, units. + 8 + 4 + read-write + + + MONTHT + Month, tens. + 12 + 1 + read-write + + + YEARU + Year, units. + 16 + 4 + read-write + + + YEART + Year, tens. + 20 + 4 + read-write + + + DAYOW + Day of week. + 24 + 3 + read-write + + + + + IF + RTCC Interrupt Flags + 0x018 + 32 + read-only + 0x00000000 + 0x000007FF + + + OF + Overflow Interrupt Flag + 0 + 1 + read-only + + + CC0 + Channel 0 Interrupt Flag + 1 + 1 + read-only + + + CC1 + Channel 1 Interrupt Flag + 2 + 1 + read-only + + + CC2 + Channel 2 Interrupt Flag + 3 + 1 + read-only + + + OSCFAIL + Oscillator failure Interrupt Flag + 4 + 1 + read-only + + + CNTTICK + Main counter tick + 5 + 1 + read-only + + + MINTICK + Minute tick + 6 + 1 + read-only + + + HOURTICK + Hour tick + 7 + 1 + read-only + + + DAYTICK + Day tick + 8 + 1 + read-only + + + DAYOWOF + Day of week overflow + 9 + 1 + read-only + + + MONTHTICK + Month tick + 10 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x01C + 32 + write-only + 0x00000000 + 0x000007FF + + + OF + Set OF Interrupt Flag + 0 + 1 + write-only + + + CC0 + Set CC0 Interrupt Flag + 1 + 1 + write-only + + + CC1 + Set CC1 Interrupt Flag + 2 + 1 + write-only + + + CC2 + Set CC2 Interrupt Flag + 3 + 1 + write-only + + + OSCFAIL + Set OSCFAIL Interrupt Flag + 4 + 1 + write-only + + + CNTTICK + Set CNTTICK Interrupt Flag + 5 + 1 + write-only + + + MINTICK + Set MINTICK Interrupt Flag + 6 + 1 + write-only + + + HOURTICK + Set HOURTICK Interrupt Flag + 7 + 1 + write-only + + + DAYTICK + Set DAYTICK Interrupt Flag + 8 + 1 + write-only + + + DAYOWOF + Set DAYOWOF Interrupt Flag + 9 + 1 + write-only + + + MONTHTICK + Set MONTHTICK Interrupt Flag + 10 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x020 + 32 + write-only + 0x00000000 + 0x000007FF + + + OF + Clear OF Interrupt Flag + 0 + 1 + write-only + + + CC0 + Clear CC0 Interrupt Flag + 1 + 1 + write-only + + + CC1 + Clear CC1 Interrupt Flag + 2 + 1 + write-only + + + CC2 + Clear CC2 Interrupt Flag + 3 + 1 + write-only + + + OSCFAIL + Clear OSCFAIL Interrupt Flag + 4 + 1 + write-only + + + CNTTICK + Clear CNTTICK Interrupt Flag + 5 + 1 + write-only + + + MINTICK + Clear MINTICK Interrupt Flag + 6 + 1 + write-only + + + HOURTICK + Clear HOURTICK Interrupt Flag + 7 + 1 + write-only + + + DAYTICK + Clear DAYTICK Interrupt Flag + 8 + 1 + write-only + + + DAYOWOF + Clear DAYOWOF Interrupt Flag + 9 + 1 + write-only + + + MONTHTICK + Clear MONTHTICK Interrupt Flag + 10 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x024 + 32 + read-write + 0x00000000 + 0x000007FF + + + OF + OF Interrupt Enable + 0 + 1 + read-write + + + CC0 + CC0 Interrupt Enable + 1 + 1 + read-write + + + CC1 + CC1 Interrupt Enable + 2 + 1 + read-write + + + CC2 + CC2 Interrupt Enable + 3 + 1 + read-write + + + OSCFAIL + OSCFAIL Interrupt Enable + 4 + 1 + read-write + + + CNTTICK + CNTTICK Interrupt Enable + 5 + 1 + read-write + + + MINTICK + MINTICK Interrupt Enable + 6 + 1 + read-write + + + HOURTICK + HOURTICK Interrupt Enable + 7 + 1 + read-write + + + DAYTICK + DAYTICK Interrupt Enable + 8 + 1 + read-write + + + DAYOWOF + DAYOWOF Interrupt Enable + 9 + 1 + read-write + + + MONTHTICK + MONTHTICK Interrupt Enable + 10 + 1 + read-write + + + + + STATUS + Status register + 0x028 + 32 + read-only + 0x00000000 + 0x00000000 + + + CMD + Command Register + 0x02C + 32 + write-only + 0x00000000 + 0x00000001 + + + CLRSTATUS + Clear RTCC_STATUS register. + 0 + 1 + write-only + + + + + SYNCBUSY + Synchronization Busy Register + 0x030 + 32 + read-only + 0x00000000 + 0x00000020 + + + CMD + CMD Register Busy + 5 + 1 + read-only + + + + + POWERDOWN + Retention RAM power-down register + 0x034 + 32 + read-write + 0x00000000 + 0x00000001 + + + RAM + Retention RAM power-down + 0 + 1 + read-write + + + + + LOCK + Configuration Lock Register + 0x038 + 32 + read-write + 0x00000000 + 0x0000FFFF + + + LOCKKEY + Configuration Lock Key + 0 + 16 + read-write + + + UNLOCKED + "" + 0x00000000 + + + LOCKED + "" + 0x00000001 + + + + + + + EM4WUEN + Wake Up Enable + 0x03C + 32 + read-write + 0x00000000 + 0x00000001 + + + EM4WU + EM4 Wake-up enable + 0 + 1 + read-write + + + + + CC0_CTRL + CC Channel Control Register + 0x040 + 32 + read-write + 0x00000000 + 0x0003FBFF + + + MODE + CC Channel Mode + 0 + 2 + read-write + + + OFF + Compare/Capture channel turned off + 0x00000000 + + + INPUTCAPTURE + Input capture + 0x00000001 + + + OUTPUTCOMPARE + Output compare + 0x00000002 + + + + + CMOA + Compare Match Output Action + 2 + 2 + read-write + + + PULSE + A single clock cycle pulse is generated on output + 0x00000000 + + + TOGGLE + Toggle output on compare match + 0x00000001 + + + CLEAR + Clear output on compare match + 0x00000002 + + + SET + Set output on compare match + 0x00000003 + + + + + ICEDGE + Input Capture Edge Select + 4 + 2 + read-write + + + RISING + Rising edges detected + 0x00000000 + + + FALLING + Falling edges detected + 0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + PRSSEL + Compare/Capture Channel PRS Input Channel Selection + 6 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + COMPBASE + Capture compare channel comparison base. + 11 + 1 + read-write + + + COMPMASK + Capture compare channel comparison mask. + 12 + 5 + read-write + + + DAYCC + Day Capture/Compare selection + 17 + 1 + read-write + + + + + CC0_CCV + Capture/Compare Value Register + 0x044 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + CCV + Capture/Compare Value + 0 + 32 + read-write + + + + + CC0_TIME + Capture/Compare Time Register + 0x048 + 32 + read-write + 0x00000000 + 0x003F7F7F + + + SECU + Seconds, units. + 0 + 4 + read-write + + + SECT + Seconds, tens. + 4 + 3 + read-write + + + MINU + Minutes, units. + 8 + 4 + read-write + + + MINT + Minutes, tens. + 12 + 3 + read-write + + + HOURU + Hours, units. + 16 + 4 + read-write + + + HOURT + Hours, tens. + 20 + 2 + read-write + + + + + CC0_DATE + Capture/Compare Date Register + 0x04C + 32 + read-write + 0x00000000 + 0x00001F3F + + + DAYU + Day of month/week, units. + 0 + 4 + read-write + + + DAYT + Day of month/week, tens. + 4 + 2 + read-write + + + MONTHU + Month, units. + 8 + 4 + read-write + + + MONTHT + Month, tens. + 12 + 1 + read-write + + + + + CC1_CTRL + CC Channel Control Register + 0x050 + 32 + read-write + 0x00000000 + 0x0003FBFF + + + MODE + CC Channel Mode + 0 + 2 + read-write + + + OFF + Compare/Capture channel turned off + 0x00000000 + + + INPUTCAPTURE + Input capture + 0x00000001 + + + OUTPUTCOMPARE + Output compare + 0x00000002 + + + + + CMOA + Compare Match Output Action + 2 + 2 + read-write + + + PULSE + A single clock cycle pulse is generated on output + 0x00000000 + + + TOGGLE + Toggle output on compare match + 0x00000001 + + + CLEAR + Clear output on compare match + 0x00000002 + + + SET + Set output on compare match + 0x00000003 + + + + + ICEDGE + Input Capture Edge Select + 4 + 2 + read-write + + + RISING + Rising edges detected + 0x00000000 + + + FALLING + Falling edges detected + 0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + PRSSEL + Compare/Capture Channel PRS Input Channel Selection + 6 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + COMPBASE + Capture compare channel comparison base. + 11 + 1 + read-write + + + COMPMASK + Capture compare channel comparison mask. + 12 + 5 + read-write + + + DAYCC + Day Capture/Compare selection + 17 + 1 + read-write + + + + + CC1_CCV + Capture/Compare Value Register + 0x054 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + CCV + Capture/Compare Value + 0 + 32 + read-write + + + + + CC1_TIME + Capture/Compare Time Register + 0x058 + 32 + read-write + 0x00000000 + 0x003F7F7F + + + SECU + Seconds, units. + 0 + 4 + read-write + + + SECT + Seconds, tens. + 4 + 3 + read-write + + + MINU + Minutes, units. + 8 + 4 + read-write + + + MINT + Minutes, tens. + 12 + 3 + read-write + + + HOURU + Hours, units. + 16 + 4 + read-write + + + HOURT + Hours, tens. + 20 + 2 + read-write + + + + + CC1_DATE + Capture/Compare Date Register + 0x05C + 32 + read-write + 0x00000000 + 0x00001F3F + + + DAYU + Day of month/week, units. + 0 + 4 + read-write + + + DAYT + Day of month/week, tens. + 4 + 2 + read-write + + + MONTHU + Month, units. + 8 + 4 + read-write + + + MONTHT + Month, tens. + 12 + 1 + read-write + + + + + CC2_CTRL + CC Channel Control Register + 0x060 + 32 + read-write + 0x00000000 + 0x0003FBFF + + + MODE + CC Channel Mode + 0 + 2 + read-write + + + OFF + Compare/Capture channel turned off + 0x00000000 + + + INPUTCAPTURE + Input capture + 0x00000001 + + + OUTPUTCOMPARE + Output compare + 0x00000002 + + + + + CMOA + Compare Match Output Action + 2 + 2 + read-write + + + PULSE + A single clock cycle pulse is generated on output + 0x00000000 + + + TOGGLE + Toggle output on compare match + 0x00000001 + + + CLEAR + Clear output on compare match + 0x00000002 + + + SET + Set output on compare match + 0x00000003 + + + + + ICEDGE + Input Capture Edge Select + 4 + 2 + read-write + + + RISING + Rising edges detected + 0x00000000 + + + FALLING + Falling edges detected + 0x00000001 + + + BOTH + Both edges detected + 0x00000002 + + + NONE + No edge detection, signal is left as it is + 0x00000003 + + + + + PRSSEL + Compare/Capture Channel PRS Input Channel Selection + 6 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + COMPBASE + Capture compare channel comparison base. + 11 + 1 + read-write + + + COMPMASK + Capture compare channel comparison mask. + 12 + 5 + read-write + + + DAYCC + Day Capture/Compare selection + 17 + 1 + read-write + + + + + CC2_CCV + Capture/Compare Value Register + 0x064 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + CCV + Capture/Compare Value + 0 + 32 + read-write + + + + + CC2_TIME + Capture/Compare Time Register + 0x068 + 32 + read-write + 0x00000000 + 0x003F7F7F + + + SECU + Seconds, units. + 0 + 4 + read-write + + + SECT + Seconds, tens. + 4 + 3 + read-write + + + MINU + Minutes, units. + 8 + 4 + read-write + + + MINT + Minutes, tens. + 12 + 3 + read-write + + + HOURU + Hours, units. + 16 + 4 + read-write + + + HOURT + Hours, tens. + 20 + 2 + read-write + + + + + CC2_DATE + Capture/Compare Date Register + 0x06C + 32 + read-write + 0x00000000 + 0x00001F3F + + + DAYU + Day of month/week, units. + 0 + 4 + read-write + + + DAYT + Day of month/week, tens. + 4 + 2 + read-write + + + MONTHU + Month, units. + 8 + 4 + read-write + + + MONTHT + Month, tens. + 12 + 1 + read-write + + + + + RET0_REG + Retention register + 0x104 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET1_REG + Retention register + 0x108 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET2_REG + Retention register + 0x10C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET3_REG + Retention register + 0x110 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET4_REG + Retention register + 0x114 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET5_REG + Retention register + 0x118 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET6_REG + Retention register + 0x11C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET7_REG + Retention register + 0x120 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET8_REG + Retention register + 0x124 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET9_REG + Retention register + 0x128 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET10_REG + Retention register + 0x12C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET11_REG + Retention register + 0x130 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET12_REG + Retention register + 0x134 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET13_REG + Retention register + 0x138 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET14_REG + Retention register + 0x13C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET15_REG + Retention register + 0x140 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET16_REG + Retention register + 0x144 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET17_REG + Retention register + 0x148 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET18_REG + Retention register + 0x14C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET19_REG + Retention register + 0x150 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET20_REG + Retention register + 0x154 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET21_REG + Retention register + 0x158 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET22_REG + Retention register + 0x15C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET23_REG + Retention register + 0x160 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET24_REG + Retention register + 0x164 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET25_REG + Retention register + 0x168 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET26_REG + Retention register + 0x16C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET27_REG + Retention register + 0x170 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET28_REG + Retention register + 0x174 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET29_REG + Retention register + 0x178 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET30_REG + Retention register + 0x17C + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + RET31_REG + Retention register + 0x180 + 32 + read-write + 0x00000000 + 0xFFFFFFFF + + + REG + General Purpose Retention Register + 0 + 32 + read-write + + + + + + + WDOG0 + 1.6 + WDOG0 + 0x40052000 + + 0 + 0x00000400 + registers + + + WDOG0 + 2 + + + + CTRL + Control Register + 0x000 + 32 + read-write + 0x00000F00 + 0xC7033F7F + + + EN + Watchdog Timer Enable + 0 + 1 + read-write + + + DEBUGRUN + Debug Mode Run Enable + 1 + 1 + read-write + + + EM2RUN + Energy Mode 2 Run Enable + 2 + 1 + read-write + + + EM3RUN + Energy Mode 3 Run Enable + 3 + 1 + read-write + + + LOCK + Configuration lock + 4 + 1 + read-write + + + EM4BLOCK + Energy Mode 4 Block + 5 + 1 + read-write + + + SWOSCBLOCK + Software Oscillator Disable Block + 6 + 1 + read-write + + + PERSEL + Watchdog Timeout Period Select + 8 + 4 + read-write + + + CLKSEL + Watchdog Clock Select + 12 + 2 + read-write + + + ULFRCO + ULFRCO + 0x00000000 + + + LFRCO + LFRCO + 0x00000001 + + + LFXO + LFXO + 0x00000002 + + + + + WARNSEL + Watchdog Timeout Period Select + 16 + 2 + read-write + + + WINSEL + Watchdog Illegal Window Select + 24 + 3 + read-write + + + CLRSRC + Watchdog Clear Source + 30 + 1 + read-write + + + WDOGRSTDIS + Watchdog Reset Disable + 31 + 1 + read-write + + + + + CMD + Command Register + 0x004 + 32 + write-only + 0x00000000 + 0x00000001 + + + CLEAR + Watchdog Timer Clear + 0 + 1 + write-only + + + + + SYNCBUSY + Synchronization Busy Register + 0x008 + 32 + read-only + 0x00000000 + 0x0000000F + + + CTRL + CTRL Register Busy + 0 + 1 + read-only + + + CMD + CMD Register Busy + 1 + 1 + read-only + + + PCH0_PRSCTRL + PCH0_PRSCTRL Register Busy + 2 + 1 + read-only + + + PCH1_PRSCTRL + PCH1_PRSCTRL Register Busy + 3 + 1 + read-only + + + + + PCH0_PRSCTRL + PRS Control Register + 0x00C + 32 + read-write + 0x00000000 + 0x0000010F + + + PRSSEL + PRS Channel PRS Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + PRSMISSRSTEN + PRS missing event will trigger a watchdog reset + 8 + 1 + read-write + + + + + PCH1_PRSCTRL + PRS Control Register + 0x010 + 32 + read-write + 0x00000000 + 0x0000010F + + + PRSSEL + PRS Channel PRS Select + 0 + 4 + read-write + + + PRSCH0 + PRS Channel 0 selected as input + 0x00000000 + + + PRSCH1 + PRS Channel 1 selected as input + 0x00000001 + + + PRSCH2 + PRS Channel 2 selected as input + 0x00000002 + + + PRSCH3 + PRS Channel 3 selected as input + 0x00000003 + + + PRSCH4 + PRS Channel 4 selected as input + 0x00000004 + + + PRSCH5 + PRS Channel 5 selected as input + 0x00000005 + + + PRSCH6 + PRS Channel 6 selected as input + 0x00000006 + + + PRSCH7 + PRS Channel 7 selected as input + 0x00000007 + + + PRSCH8 + PRS Channel 8 selected as input + 0x00000008 + + + PRSCH9 + PRS Channel 9 selected as input + 0x00000009 + + + PRSCH10 + PRS Channel 10 selected as input + 0x0000000A + + + PRSCH11 + PRS Channel 11 selected as input + 0x0000000B + + + + + PRSMISSRSTEN + PRS missing event will trigger a watchdog reset + 8 + 1 + read-write + + + + + IF + Watchdog Interrupt Flags + 0x01C + 32 + read-only + 0x00000000 + 0x0000001F + + + TOUT + Wdog Timeout Interrupt Flag + 0 + 1 + read-only + + + WARN + Wdog Warning Timeout Interrupt Flag + 1 + 1 + read-only + + + WIN + Wdog Window Interrupt Flag + 2 + 1 + read-only + + + PEM0 + PRS Channel Zero Event Missing Interrupt Flag + 3 + 1 + read-only + + + PEM1 + PRS Channel One Event Missing Interrupt Flag + 4 + 1 + read-only + + + + + IFS + Interrupt Flag Set Register + 0x020 + 32 + write-only + 0x00000000 + 0x0000001F + + + TOUT + Set TOUT Interrupt Flag + 0 + 1 + write-only + + + WARN + Set WARN Interrupt Flag + 1 + 1 + write-only + + + WIN + Set WIN Interrupt Flag + 2 + 1 + write-only + + + PEM0 + Set PEM0 Interrupt Flag + 3 + 1 + write-only + + + PEM1 + Set PEM1 Interrupt Flag + 4 + 1 + write-only + + + + + IFC + Interrupt Flag Clear Register + 0x024 + 32 + write-only + 0x00000000 + 0x0000001F + + + TOUT + Clear TOUT Interrupt Flag + 0 + 1 + write-only + + + WARN + Clear WARN Interrupt Flag + 1 + 1 + write-only + + + WIN + Clear WIN Interrupt Flag + 2 + 1 + write-only + + + PEM0 + Clear PEM0 Interrupt Flag + 3 + 1 + write-only + + + PEM1 + Clear PEM1 Interrupt Flag + 4 + 1 + write-only + + + + + IEN + Interrupt Enable Register + 0x028 + 32 + read-write + 0x00000000 + 0x0000001F + + + TOUT + TOUT Interrupt Enable + 0 + 1 + read-write + + + WARN + WARN Interrupt Enable + 1 + 1 + read-write + + + WIN + WIN Interrupt Enable + 2 + 1 + read-write + + + PEM0 + PEM0 Interrupt Enable + 3 + 1 + read-write + + + PEM1 + PEM1 Interrupt Enable + 4 + 1 + read-write + + + + + + + + + (C) Copyright Silicon Laboratories, Inc. 2015 + + diff --git a/examples/STM32F429x.svd.txt b/examples/STM32F429x.svd.txt new file mode 100644 index 00000000..6a8e699f --- /dev/null +++ b/examples/STM32F429x.svd.txt @@ -0,0 +1,57586 @@ + + + STM32F429x + 1.0 + STM32F429x + + + 8 + + 32 + + 0x20 + 0x0 + 0xFFFFFFFF + + + RNG + Random number generator + RNG + 0x50060800 + + 0x0 + 0x400 + registers + + + FPU + FPU interrupt + 81 + + + RNG + Rng global interrupt + 80 + + + + CR + CR + control register + 0x0 + 0x20 + read-write + 0x00000000 + + + IE + Interrupt enable + 3 + 1 + + + RNGEN + Random number generator + enable + 2 + 1 + + + + + SR + SR + status register + 0x4 + 0x20 + 0x00000000 + + + SEIS + Seed error interrupt + status + 6 + 1 + read-write + + + CEIS + Clock error interrupt + status + 5 + 1 + read-write + + + SECS + Seed error current status + 2 + 1 + read-only + + + CECS + Clock error current status + 1 + 1 + read-only + + + DRDY + Data ready + 0 + 1 + read-only + + + + + DR + DR + data register + 0x8 + 0x20 + read-only + 0x00000000 + + + RNDATA + Random data + 0 + 32 + + + + + + + DCMI + Digital camera interface + DCMI + 0x50050000 + + 0x0 + 0x400 + registers + + + DCMI + DCMI global interrupt + 78 + + + + CR + CR + control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + ENABLE + DCMI enable + 14 + 1 + + + EDM + Extended data mode + 10 + 2 + + + FCRC + Frame capture rate control + 8 + 2 + + + VSPOL + Vertical synchronization + polarity + 7 + 1 + + + HSPOL + Horizontal synchronization + polarity + 6 + 1 + + + PCKPOL + Pixel clock polarity + 5 + 1 + + + ESS + Embedded synchronization + select + 4 + 1 + + + JPEG + JPEG format + 3 + 1 + + + CROP + Crop feature + 2 + 1 + + + CM + Capture mode + 1 + 1 + + + CAPTURE + Capture enable + 0 + 1 + + + + + SR + SR + status register + 0x4 + 0x20 + read-only + 0x0000 + + + FNE + FIFO not empty + 2 + 1 + + + VSYNC + VSYNC + 1 + 1 + + + HSYNC + HSYNC + 0 + 1 + + + + + RIS + RIS + raw interrupt status register + 0x8 + 0x20 + read-only + 0x0000 + + + LINE_RIS + Line raw interrupt status + 4 + 1 + + + VSYNC_RIS + VSYNC raw interrupt status + 3 + 1 + + + ERR_RIS + Synchronization error raw interrupt + status + 2 + 1 + + + OVR_RIS + Overrun raw interrupt + status + 1 + 1 + + + FRAME_RIS + Capture complete raw interrupt + status + 0 + 1 + + + + + IER + IER + interrupt enable register + 0xC + 0x20 + read-write + 0x0000 + + + LINE_IE + Line interrupt enable + 4 + 1 + + + VSYNC_IE + VSYNC interrupt enable + 3 + 1 + + + ERR_IE + Synchronization error interrupt + enable + 2 + 1 + + + OVR_IE + Overrun interrupt enable + 1 + 1 + + + FRAME_IE + Capture complete interrupt + enable + 0 + 1 + + + + + MIS + MIS + masked interrupt status + register + 0x10 + 0x20 + read-only + 0x0000 + + + LINE_MIS + Line masked interrupt + status + 4 + 1 + + + VSYNC_MIS + VSYNC masked interrupt + status + 3 + 1 + + + ERR_MIS + Synchronization error masked interrupt + status + 2 + 1 + + + OVR_MIS + Overrun masked interrupt + status + 1 + 1 + + + FRAME_MIS + Capture complete masked interrupt + status + 0 + 1 + + + + + ICR + ICR + interrupt clear register + 0x14 + 0x20 + write-only + 0x0000 + + + LINE_ISC + line interrupt status + clear + 4 + 1 + + + VSYNC_ISC + Vertical synch interrupt status + clear + 3 + 1 + + + ERR_ISC + Synchronization error interrupt status + clear + 2 + 1 + + + OVR_ISC + Overrun interrupt status + clear + 1 + 1 + + + FRAME_ISC + Capture complete interrupt status + clear + 0 + 1 + + + + + ESCR + ESCR + embedded synchronization code + register + 0x18 + 0x20 + read-write + 0x0000 + + + FEC + Frame end delimiter code + 24 + 8 + + + LEC + Line end delimiter code + 16 + 8 + + + LSC + Line start delimiter code + 8 + 8 + + + FSC + Frame start delimiter code + 0 + 8 + + + + + ESUR + ESUR + embedded synchronization unmask + register + 0x1C + 0x20 + read-write + 0x0000 + + + FEU + Frame end delimiter unmask + 24 + 8 + + + LEU + Line end delimiter unmask + 16 + 8 + + + LSU + Line start delimiter + unmask + 8 + 8 + + + FSU + Frame start delimiter + unmask + 0 + 8 + + + + + CWSTRT + CWSTRT + crop window start + 0x20 + 0x20 + read-write + 0x0000 + + + VST + Vertical start line count + 16 + 13 + + + HOFFCNT + Horizontal offset count + 0 + 14 + + + + + CWSIZE + CWSIZE + crop window size + 0x24 + 0x20 + read-write + 0x0000 + + + VLINE + Vertical line count + 16 + 14 + + + CAPCNT + Capture count + 0 + 14 + + + + + DR + DR + data register + 0x28 + 0x20 + read-only + 0x0000 + + + Byte3 + Data byte 3 + 24 + 8 + + + Byte2 + Data byte 2 + 16 + 8 + + + Byte1 + Data byte 1 + 8 + 8 + + + Byte0 + Data byte 0 + 0 + 8 + + + + + + + FMC + Flexible memory controller + FSMC + 0xA0000000 + + 0x0 + 0x400 + registers + + + FMC + FMC global interrupt + 48 + + + + BCR1 + BCR1 + SRAM/NOR-Flash chip-select control register + 1 + 0x0 + 0x20 + read-write + 0x000030D0 + + + CCLKEN + CCLKEN + 20 + 1 + + + CBURSTRW + CBURSTRW + 19 + 1 + + + ASYNCWAIT + ASYNCWAIT + 15 + 1 + + + EXTMOD + EXTMOD + 14 + 1 + + + WAITEN + WAITEN + 13 + 1 + + + WREN + WREN + 12 + 1 + + + WAITCFG + WAITCFG + 11 + 1 + + + WAITPOL + WAITPOL + 9 + 1 + + + BURSTEN + BURSTEN + 8 + 1 + + + FACCEN + FACCEN + 6 + 1 + + + MWID + MWID + 4 + 2 + + + MTYP + MTYP + 2 + 2 + + + MUXEN + MUXEN + 1 + 1 + + + MBKEN + MBKEN + 0 + 1 + + + + + BTR1 + BTR1 + SRAM/NOR-Flash chip-select timing register + 1 + 0x4 + 0x20 + read-write + 0xFFFFFFFF + + + ACCMOD + ACCMOD + 28 + 2 + + + DATLAT + DATLAT + 24 + 4 + + + CLKDIV + CLKDIV + 20 + 4 + + + BUSTURN + BUSTURN + 16 + 4 + + + DATAST + DATAST + 8 + 8 + + + ADDHLD + ADDHLD + 4 + 4 + + + ADDSET + ADDSET + 0 + 4 + + + + + BCR2 + BCR2 + SRAM/NOR-Flash chip-select control register + 2 + 0x8 + 0x20 + read-write + 0x000030D0 + + + CBURSTRW + CBURSTRW + 19 + 1 + + + ASYNCWAIT + ASYNCWAIT + 15 + 1 + + + EXTMOD + EXTMOD + 14 + 1 + + + WAITEN + WAITEN + 13 + 1 + + + WREN + WREN + 12 + 1 + + + WAITCFG + WAITCFG + 11 + 1 + + + WRAPMOD + WRAPMOD + 10 + 1 + + + WAITPOL + WAITPOL + 9 + 1 + + + BURSTEN + BURSTEN + 8 + 1 + + + FACCEN + FACCEN + 6 + 1 + + + MWID + MWID + 4 + 2 + + + MTYP + MTYP + 2 + 2 + + + MUXEN + MUXEN + 1 + 1 + + + MBKEN + MBKEN + 0 + 1 + + + + + BTR2 + BTR2 + SRAM/NOR-Flash chip-select timing register + 2 + 0xC + 0x20 + read-write + 0xFFFFFFFF + + + ACCMOD + ACCMOD + 28 + 2 + + + DATLAT + DATLAT + 24 + 4 + + + CLKDIV + CLKDIV + 20 + 4 + + + BUSTURN + BUSTURN + 16 + 4 + + + DATAST + DATAST + 8 + 8 + + + ADDHLD + ADDHLD + 4 + 4 + + + ADDSET + ADDSET + 0 + 4 + + + + + BCR3 + BCR3 + SRAM/NOR-Flash chip-select control register + 3 + 0x10 + 0x20 + read-write + 0x000030D0 + + + CBURSTRW + CBURSTRW + 19 + 1 + + + ASYNCWAIT + ASYNCWAIT + 15 + 1 + + + EXTMOD + EXTMOD + 14 + 1 + + + WAITEN + WAITEN + 13 + 1 + + + WREN + WREN + 12 + 1 + + + WAITCFG + WAITCFG + 11 + 1 + + + WRAPMOD + WRAPMOD + 10 + 1 + + + WAITPOL + WAITPOL + 9 + 1 + + + BURSTEN + BURSTEN + 8 + 1 + + + FACCEN + FACCEN + 6 + 1 + + + MWID + MWID + 4 + 2 + + + MTYP + MTYP + 2 + 2 + + + MUXEN + MUXEN + 1 + 1 + + + MBKEN + MBKEN + 0 + 1 + + + + + BTR3 + BTR3 + SRAM/NOR-Flash chip-select timing register + 3 + 0x14 + 0x20 + read-write + 0xFFFFFFFF + + + ACCMOD + ACCMOD + 28 + 2 + + + DATLAT + DATLAT + 24 + 4 + + + CLKDIV + CLKDIV + 20 + 4 + + + BUSTURN + BUSTURN + 16 + 4 + + + DATAST + DATAST + 8 + 8 + + + ADDHLD + ADDHLD + 4 + 4 + + + ADDSET + ADDSET + 0 + 4 + + + + + BCR4 + BCR4 + SRAM/NOR-Flash chip-select control register + 4 + 0x18 + 0x20 + read-write + 0x000030D0 + + + CBURSTRW + CBURSTRW + 19 + 1 + + + ASYNCWAIT + ASYNCWAIT + 15 + 1 + + + EXTMOD + EXTMOD + 14 + 1 + + + WAITEN + WAITEN + 13 + 1 + + + WREN + WREN + 12 + 1 + + + WAITCFG + WAITCFG + 11 + 1 + + + WRAPMOD + WRAPMOD + 10 + 1 + + + WAITPOL + WAITPOL + 9 + 1 + + + BURSTEN + BURSTEN + 8 + 1 + + + FACCEN + FACCEN + 6 + 1 + + + MWID + MWID + 4 + 2 + + + MTYP + MTYP + 2 + 2 + + + MUXEN + MUXEN + 1 + 1 + + + MBKEN + MBKEN + 0 + 1 + + + + + BTR4 + BTR4 + SRAM/NOR-Flash chip-select timing register + 4 + 0x1C + 0x20 + read-write + 0xFFFFFFFF + + + ACCMOD + ACCMOD + 28 + 2 + + + DATLAT + DATLAT + 24 + 4 + + + CLKDIV + CLKDIV + 20 + 4 + + + BUSTURN + BUSTURN + 16 + 4 + + + DATAST + DATAST + 8 + 8 + + + ADDHLD + ADDHLD + 4 + 4 + + + ADDSET + ADDSET + 0 + 4 + + + + + PCR2 + PCR2 + PC Card/NAND Flash control register + 2 + 0x60 + 0x20 + read-write + 0x00000018 + + + ECCPS + ECCPS + 17 + 3 + + + TAR + TAR + 13 + 4 + + + TCLR + TCLR + 9 + 4 + + + ECCEN + ECCEN + 6 + 1 + + + PWID + PWID + 4 + 2 + + + PTYP + PTYP + 3 + 1 + + + PBKEN + PBKEN + 2 + 1 + + + PWAITEN + PWAITEN + 1 + 1 + + + + + SR2 + SR2 + FIFO status and interrupt register + 2 + 0x64 + 0x20 + 0x00000040 + + + FEMPT + FEMPT + 6 + 1 + read-only + + + IFEN + IFEN + 5 + 1 + read-write + + + ILEN + ILEN + 4 + 1 + read-write + + + IREN + IREN + 3 + 1 + read-write + + + IFS + IFS + 2 + 1 + read-write + + + ILS + ILS + 1 + 1 + read-write + + + IRS + IRS + 0 + 1 + read-write + + + + + PMEM2 + PMEM2 + Common memory space timing register + 2 + 0x68 + 0x20 + read-write + 0xFCFCFCFC + + + MEMHIZx + MEMHIZx + 24 + 8 + + + MEMHOLDx + MEMHOLDx + 16 + 8 + + + MEMWAITx + MEMWAITx + 8 + 8 + + + MEMSETx + MEMSETx + 0 + 8 + + + + + PATT2 + PATT2 + Attribute memory space timing register + 2 + 0x6C + 0x20 + read-write + 0xFCFCFCFC + + + ATTHIZx + ATTHIZx + 24 + 8 + + + ATTHOLDx + ATTHOLDx + 16 + 8 + + + ATTWAITx + ATTWAITx + 8 + 8 + + + ATTSETx + ATTSETx + 0 + 8 + + + + + ECCR2 + ECCR2 + ECC result register 2 + 0x74 + 0x20 + read-only + 0x00000000 + + + ECCx + ECCx + 0 + 32 + + + + + PCR3 + PCR3 + PC Card/NAND Flash control register + 3 + 0x80 + 0x20 + read-write + 0x00000018 + + + ECCPS + ECCPS + 17 + 3 + + + TAR + TAR + 13 + 4 + + + TCLR + TCLR + 9 + 4 + + + ECCEN + ECCEN + 6 + 1 + + + PWID + PWID + 4 + 2 + + + PTYP + PTYP + 3 + 1 + + + PBKEN + PBKEN + 2 + 1 + + + PWAITEN + PWAITEN + 1 + 1 + + + + + SR3 + SR3 + FIFO status and interrupt register + 3 + 0x84 + 0x20 + 0x00000040 + + + FEMPT + FEMPT + 6 + 1 + read-only + + + IFEN + IFEN + 5 + 1 + read-write + + + ILEN + ILEN + 4 + 1 + read-write + + + IREN + IREN + 3 + 1 + read-write + + + IFS + IFS + 2 + 1 + read-write + + + ILS + ILS + 1 + 1 + read-write + + + IRS + IRS + 0 + 1 + read-write + + + + + PMEM3 + PMEM3 + Common memory space timing register + 3 + 0x88 + 0x20 + read-write + 0xFCFCFCFC + + + MEMHIZx + MEMHIZx + 24 + 8 + + + MEMHOLDx + MEMHOLDx + 16 + 8 + + + MEMWAITx + MEMWAITx + 8 + 8 + + + MEMSETx + MEMSETx + 0 + 8 + + + + + PATT3 + PATT3 + Attribute memory space timing register + 3 + 0x8C + 0x20 + read-write + 0xFCFCFCFC + + + ATTHIZx + ATTHIZx + 24 + 8 + + + ATTHOLDx + ATTHOLDx + 16 + 8 + + + ATTWAITx + ATTWAITx + 8 + 8 + + + ATTSETx + ATTSETx + 0 + 8 + + + + + ECCR3 + ECCR3 + ECC result register 3 + 0x94 + 0x20 + read-only + 0x00000000 + + + ECCx + ECCx + 0 + 32 + + + + + PCR4 + PCR4 + PC Card/NAND Flash control register + 4 + 0xA0 + 0x20 + read-write + 0x00000018 + + + ECCPS + ECCPS + 17 + 3 + + + TAR + TAR + 13 + 4 + + + TCLR + TCLR + 9 + 4 + + + ECCEN + ECCEN + 6 + 1 + + + PWID + PWID + 4 + 2 + + + PTYP + PTYP + 3 + 1 + + + PBKEN + PBKEN + 2 + 1 + + + PWAITEN + PWAITEN + 1 + 1 + + + + + SR4 + SR4 + FIFO status and interrupt register + 4 + 0xA4 + 0x20 + 0x00000040 + + + FEMPT + FEMPT + 6 + 1 + read-only + + + IFEN + IFEN + 5 + 1 + read-write + + + ILEN + ILEN + 4 + 1 + read-write + + + IREN + IREN + 3 + 1 + read-write + + + IFS + IFS + 2 + 1 + read-write + + + ILS + ILS + 1 + 1 + read-write + + + IRS + IRS + 0 + 1 + read-write + + + + + PMEM4 + PMEM4 + Common memory space timing register + 4 + 0xA8 + 0x20 + read-write + 0xFCFCFCFC + + + MEMHIZx + MEMHIZx + 24 + 8 + + + MEMHOLDx + MEMHOLDx + 16 + 8 + + + MEMWAITx + MEMWAITx + 8 + 8 + + + MEMSETx + MEMSETx + 0 + 8 + + + + + PATT4 + PATT4 + Attribute memory space timing register + 4 + 0xAC + 0x20 + read-write + 0xFCFCFCFC + + + ATTHIZx + ATTHIZx + 24 + 8 + + + ATTHOLDx + ATTHOLDx + 16 + 8 + + + ATTWAITx + ATTWAITx + 8 + 8 + + + ATTSETx + ATTSETx + 0 + 8 + + + + + PIO4 + PIO4 + I/O space timing register 4 + 0xB0 + 0x20 + read-write + 0xFCFCFCFC + + + IOHIZx + IOHIZx + 24 + 8 + + + IOHOLDx + IOHOLDx + 16 + 8 + + + IOWAITx + IOWAITx + 8 + 8 + + + IOSETx + IOSETx + 0 + 8 + + + + + BWTR1 + BWTR1 + SRAM/NOR-Flash write timing registers + 1 + 0x104 + 0x20 + read-write + 0x0FFFFFFF + + + ACCMOD + ACCMOD + 28 + 2 + + + DATLAT + DATLAT + 24 + 4 + + + CLKDIV + CLKDIV + 20 + 4 + + + DATAST + DATAST + 8 + 8 + + + ADDHLD + ADDHLD + 4 + 4 + + + ADDSET + ADDSET + 0 + 4 + + + + + BWTR2 + BWTR2 + SRAM/NOR-Flash write timing registers + 2 + 0x10C + 0x20 + read-write + 0x0FFFFFFF + + + ACCMOD + ACCMOD + 28 + 2 + + + DATLAT + DATLAT + 24 + 4 + + + CLKDIV + CLKDIV + 20 + 4 + + + DATAST + DATAST + 8 + 8 + + + ADDHLD + ADDHLD + 4 + 4 + + + ADDSET + ADDSET + 0 + 4 + + + + + BWTR3 + BWTR3 + SRAM/NOR-Flash write timing registers + 3 + 0x114 + 0x20 + read-write + 0x0FFFFFFF + + + ACCMOD + ACCMOD + 28 + 2 + + + DATLAT + DATLAT + 24 + 4 + + + CLKDIV + CLKDIV + 20 + 4 + + + DATAST + DATAST + 8 + 8 + + + ADDHLD + ADDHLD + 4 + 4 + + + ADDSET + ADDSET + 0 + 4 + + + + + BWTR4 + BWTR4 + SRAM/NOR-Flash write timing registers + 4 + 0x11C + 0x20 + read-write + 0x0FFFFFFF + + + ACCMOD + ACCMOD + 28 + 2 + + + DATLAT + DATLAT + 24 + 4 + + + CLKDIV + CLKDIV + 20 + 4 + + + DATAST + DATAST + 8 + 8 + + + ADDHLD + ADDHLD + 4 + 4 + + + ADDSET + ADDSET + 0 + 4 + + + + + SDCR1 + SDCR1 + SDRAM Control Register 1 + 0x140 + 0x20 + read-write + 0x000002D0 + + + NC + Number of column address + bits + 0 + 2 + + + NR + Number of row address bits + 2 + 2 + + + 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+ 1 + 1 + + + DBG_TIM9_STOP + TIM9 counter stopped when core is + halted + 16 + 1 + + + DBG_TIM10_STOP + TIM10 counter stopped when core is + halted + 17 + 1 + + + DBG_TIM11_STOP + TIM11 counter stopped when core is + halted + 18 + 1 + + + + + + + DMA2 + DMA controller + DMA + 0x40026400 + + 0x0 + 0x400 + registers + + + DMA2_Stream0 + DMA2 Stream0 global interrupt + 56 + + + DMA2_Stream1 + DMA2 Stream1 global interrupt + 57 + + + DMA2_Stream2 + DMA2 Stream2 global interrupt + 58 + + + DMA2_Stream3 + DMA2 Stream3 global interrupt + 59 + + + DMA2_Stream4 + DMA2 Stream4 global interrupt + 60 + + + DMA2_Stream5 + DMA2 Stream5 global interrupt + 68 + + + DMA2_Stream6 + DMA2 Stream6 global interrupt + 69 + + + DMA2_Stream7 + DMA2 Stream7 global interrupt + 70 + + + + LISR + LISR + low interrupt status register + 0x0 + 0x20 + read-only + 0x00000000 + + + TCIF3 + Stream x transfer complete interrupt + flag (x = 3..0) + 27 + 1 + + + HTIF3 + Stream x half transfer interrupt flag + (x=3..0) + 26 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interrupt + flag (x = 3..0) + 5 + 1 + + + HTIF0 + Stream x half transfer interrupt flag + (x=3..0) + 4 + 1 + + + TEIF0 + Stream x transfer error interrupt flag + (x=3..0) + 3 + 1 + + + DMEIF0 + Stream x direct mode error interrupt + flag (x=3..0) + 2 + 1 + + + FEIF0 + Stream x FIFO error interrupt flag + (x=3..0) + 0 + 1 + + + + + HISR + HISR + high interrupt status register + 0x4 + 0x20 + read-only + 0x00000000 + + + TCIF7 + Stream x transfer complete interrupt + flag (x=7..4) + 27 + 1 + + + HTIF7 + Stream x half transfer interrupt flag + (x=7..4) + 26 + 1 + + + TEIF7 + Stream x transfer error interrupt flag + (x=7..4) + 25 + 1 + + + DMEIF7 + Stream x direct mode error interrupt + flag (x=7..4) + 24 + 1 + + + FEIF7 + Stream x FIFO error interrupt flag + (x=7..4) + 22 + 1 + + + TCIF6 + Stream x transfer complete interrupt + flag (x=7..4) + 21 + 1 + + + HTIF6 + Stream x half transfer interrupt flag + (x=7..4) + 20 + 1 + + + TEIF6 + Stream x transfer error interrupt flag + (x=7..4) + 19 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clear transfer complete + interrupt flag (x = 3..0) + 27 + 1 + + + CHTIF3 + Stream x clear half transfer interrupt + flag (x = 3..0) + 26 + 1 + + + CTEIF3 + Stream x clear transfer error interrupt + flag (x = 3..0) + 25 + 1 + + + CDMEIF3 + Stream x clear direct mode error + interrupt flag (x = 3..0) + 24 + 1 + + + CFEIF3 + Stream x clear FIFO error interrupt flag + (x = 3..0) + 22 + 1 + + + CTCIF2 + Stream x clear transfer complete + interrupt flag (x = 3..0) + 21 + 1 + + + CHTIF2 + Stream x clear half transfer interrupt + flag (x = 3..0) + 20 + 1 + + + CTEIF2 + Stream x clear transfer error interrupt + flag (x = 3..0) + 19 + 1 + + + CDMEIF2 + Stream x clear direct mode error + interrupt flag (x = 3..0) + 18 + 1 + + + CFEIF2 + Stream x clear FIFO error interrupt flag + (x = 3..0) + 16 + 1 + + + CTCIF1 + Stream x clear transfer complete + interrupt flag (x = 3..0) + 11 + 1 + + + CHTIF1 + Stream x clear half transfer interrupt + flag (x = 3..0) + 10 + 1 + + + CTEIF1 + Stream x clear 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address + register + 0x68 + 0x20 + read-write + 0x00000000 + + + M1A + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S3FCR + S3FCR + stream x FIFO control register + 0x6C + 0x20 + 0x00000021 + + + FEIE + FIFO error interrupt + enable + 7 + 1 + read-write + + + FS + FIFO status + 3 + 3 + read-only + + + DMDIS + Direct mode disable + 2 + 1 + read-write + + + FTH + FIFO threshold selection + 0 + 2 + read-write + + + + + S4CR + S4CR + stream x configuration + register + 0x70 + 0x20 + read-write + 0x00000000 + + + CHSEL + Channel selection + 25 + 3 + + + MBURST + Memory burst transfer + configuration + 23 + 2 + + + PBURST + Peripheral burst transfer + configuration + 21 + 2 + + + ACK + ACK + 20 + 1 + + + CT + Current target (only in double buffer + mode) + 19 + 1 + + + DBM + Double buffer mode + 18 + 1 + + + PL + Priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MSIZE + Memory data size + 13 + 2 + + + PSIZE + Peripheral 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S4M1AR + stream x memory 1 address + register + 0x80 + 0x20 + read-write + 0x00000000 + + + M1A + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S4FCR + S4FCR + stream x FIFO control register + 0x84 + 0x20 + 0x00000021 + + + FEIE + FIFO error interrupt + enable + 7 + 1 + read-write + + + FS + FIFO status + 3 + 3 + read-only + + + DMDIS + Direct mode disable + 2 + 1 + read-write + + + FTH + FIFO threshold selection + 0 + 2 + read-write + + + + + S5CR + S5CR + stream x configuration + register + 0x88 + 0x20 + read-write + 0x00000000 + + + CHSEL + Channel selection + 25 + 3 + + + MBURST + Memory burst transfer + configuration + 23 + 2 + + + PBURST + Peripheral burst transfer + configuration + 21 + 2 + + + ACK + ACK + 20 + 1 + + + CT + Current target (only in double buffer + mode) + 19 + 1 + + + DBM + Double buffer mode + 18 + 1 + + + PL + Priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MSIZE + Memory data size + 13 + 2 + + + PSIZE + Peripheral data size + 11 + 2 + + + MINC + Memory increment mode + 10 + 1 + + + PINC + Peripheral increment mode + 9 + 1 + + + CIRC + Circular mode + 8 + 1 + + + DIR + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + TCIE + Transfer complete interrupt + enable + 4 + 1 + + + HTIE + Half transfer interrupt + enable + 3 + 1 + + + TEIE + Transfer error interrupt + enable + 2 + 1 + + + DMEIE + Direct mode error interrupt + enable + 1 + 1 + + + EN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S5NDTR + S5NDTR + stream x number of data + register + 0x8C + 0x20 + read-write + 0x00000000 + + + NDT + Number of data items to + transfer + 0 + 16 + + + + + S5PAR + S5PAR + stream x peripheral address + register + 0x90 + 0x20 + read-write + 0x00000000 + + + PA + Peripheral address + 0 + 32 + + + + + S5M0AR + S5M0AR + stream x memory 0 address + register + 0x94 + 0x20 + read-write + 0x00000000 + + + M0A + Memory 0 address + 0 + 32 + + + + + S5M1AR + S5M1AR + stream x memory 1 address + register + 0x98 + 0x20 + read-write + 0x00000000 + + + M1A + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S5FCR + S5FCR + stream x FIFO control register + 0x9C + 0x20 + 0x00000021 + + + FEIE + FIFO error interrupt + enable + 7 + 1 + read-write + + + FS + FIFO status + 3 + 3 + read-only + + + DMDIS + Direct mode disable + 2 + 1 + read-write + + + FTH + FIFO threshold selection + 0 + 2 + read-write + + + + + S6CR + S6CR + stream x configuration + register + 0xA0 + 0x20 + read-write + 0x00000000 + + + CHSEL + Channel selection + 25 + 3 + + + MBURST + Memory burst transfer + configuration + 23 + 2 + + + PBURST + Peripheral burst transfer + configuration + 21 + 2 + + + ACK + ACK + 20 + 1 + + + CT + Current target (only in double buffer + mode) + 19 + 1 + + + DBM + Double buffer mode + 18 + 1 + + + PL + Priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MSIZE + Memory data size + 13 + 2 + + + PSIZE + Peripheral data size + 11 + 2 + + + MINC + Memory increment mode + 10 + 1 + + + PINC + Peripheral increment mode + 9 + 1 + + + CIRC + Circular mode + 8 + 1 + + + DIR + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + TCIE + Transfer complete interrupt + enable + 4 + 1 + + + HTIE + Half transfer interrupt + enable + 3 + 1 + + + TEIE + Transfer error interrupt + enable + 2 + 1 + + + DMEIE + Direct mode error interrupt + enable + 1 + 1 + + + EN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S6NDTR + S6NDTR + stream x number of data + register + 0xA4 + 0x20 + read-write + 0x00000000 + + + NDT + Number of data items to + transfer + 0 + 16 + + + + + S6PAR + S6PAR + stream x peripheral address + register + 0xA8 + 0x20 + read-write + 0x00000000 + + + PA + Peripheral address + 0 + 32 + + + + + S6M0AR + S6M0AR + stream x memory 0 address + register + 0xAC + 0x20 + read-write + 0x00000000 + + + M0A + Memory 0 address + 0 + 32 + + + + + S6M1AR + S6M1AR + stream x memory 1 address + register + 0xB0 + 0x20 + read-write + 0x00000000 + + + M1A + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S6FCR + S6FCR + stream x FIFO control register + 0xB4 + 0x20 + 0x00000021 + + + FEIE + FIFO error interrupt + enable + 7 + 1 + read-write + + + FS + FIFO status + 3 + 3 + read-only + + + DMDIS + Direct mode disable + 2 + 1 + read-write + + + FTH + FIFO threshold selection + 0 + 2 + read-write + + + + + S7CR + S7CR + stream x configuration + register + 0xB8 + 0x20 + read-write + 0x00000000 + + + CHSEL + Channel selection + 25 + 3 + + + MBURST + Memory burst transfer + configuration + 23 + 2 + + + PBURST + Peripheral burst transfer + configuration + 21 + 2 + + + ACK + ACK + 20 + 1 + + + CT + Current target (only in double buffer + mode) + 19 + 1 + + + DBM + Double buffer mode + 18 + 1 + + + PL + Priority level + 16 + 2 + + + PINCOS + Peripheral increment offset + size + 15 + 1 + + + MSIZE + Memory data size + 13 + 2 + + + PSIZE + Peripheral data size + 11 + 2 + + + MINC + Memory increment mode + 10 + 1 + + + PINC + Peripheral increment mode + 9 + 1 + + + CIRC + Circular mode + 8 + 1 + + + DIR + Data transfer direction + 6 + 2 + + + PFCTRL + Peripheral flow controller + 5 + 1 + + + TCIE + Transfer complete interrupt + enable + 4 + 1 + + + HTIE + Half transfer interrupt + enable + 3 + 1 + + + TEIE + Transfer error interrupt + enable + 2 + 1 + + + DMEIE + Direct mode error interrupt + enable + 1 + 1 + + + EN + Stream enable / flag stream ready when + read low + 0 + 1 + + + + + S7NDTR + S7NDTR + stream x number of data + register + 0xBC + 0x20 + read-write + 0x00000000 + + + NDT + Number of data items to + transfer + 0 + 16 + + + + + S7PAR + S7PAR + stream x peripheral address + register + 0xC0 + 0x20 + read-write + 0x00000000 + + + PA + Peripheral address + 0 + 32 + + + + + S7M0AR + S7M0AR + stream x memory 0 address + register + 0xC4 + 0x20 + read-write + 0x00000000 + + + M0A + Memory 0 address + 0 + 32 + + + + + S7M1AR + S7M1AR + stream x memory 1 address + register + 0xC8 + 0x20 + read-write + 0x00000000 + + + M1A + Memory 1 address (used in case of Double + buffer mode) + 0 + 32 + + + + + S7FCR + S7FCR + stream x FIFO control register + 0xCC + 0x20 + 0x00000021 + + + FEIE + FIFO error interrupt + enable + 7 + 1 + read-write + + + FS + FIFO status + 3 + 3 + read-only + + + DMDIS + Direct mode disable + 2 + 1 + read-write + + + FTH + FIFO threshold selection + 0 + 2 + read-write + + + + + + + DMA1 + 0x40026000 + + DMA1_Stream0 + DMA1 Stream0 global interrupt + 11 + + + DMA1_Stream1 + DMA1 Stream1 global interrupt + 12 + + + DMA1_Stream2 + DMA1 Stream2 global interrupt + 13 + + + DMA1_Stream3 + DMA1 Stream3 global interrupt + 14 + + + DMA1_Stream4 + DMA1 Stream4 global interrupt + 15 + + + DMA1_Stream5 + DMA1 Stream5 global interrupt + 16 + + + DMA1_Stream6 + DMA1 Stream6 global interrupt + 17 + + + DMA1_Stream7 + DMA1 Stream7 global interrupt + 47 + + + + RCC + Reset and clock control + RCC + 0x40023800 + + 0x0 + 0x400 + registers + + + RCC + RCC global interrupt + 5 + + + + CR + CR + clock control register + 0x0 + 0x20 + 0x00000083 + + + PLLI2SRDY + PLLI2S clock ready flag + 27 + 1 + read-only + + + PLLI2SON + PLLI2S enable + 26 + 1 + read-write + + + PLLRDY + Main PLL (PLL) clock ready + flag + 25 + 1 + read-only + + + PLLON + Main PLL (PLL) enable + 24 + 1 + read-write + + + CSSON + Clock security system + enable + 19 + 1 + read-write + + + HSEBYP + HSE clock bypass + 18 + 1 + read-write + + + HSERDY + HSE clock ready flag + 17 + 1 + read-only + + + HSEON + HSE clock enable + 16 + 1 + read-write + + + HSICAL + Internal high-speed clock + calibration + 8 + 8 + read-only + + + HSITRIM + Internal high-speed clock + trimming + 3 + 5 + read-write + + + HSIRDY + Internal high-speed clock ready + flag + 1 + 1 + read-only + + + HSION + Internal high-speed clock + enable + 0 + 1 + read-write + + + + + PLLCFGR + PLLCFGR + PLL configuration register + 0x4 + 0x20 + read-write + 0x24003010 + + + PLLQ3 + Main PLL (PLL) division factor for USB + OTG FS, SDIO and random number generator + clocks + 27 + 1 + + + PLLQ2 + Main PLL (PLL) division factor for USB + OTG FS, SDIO and random number generator + clocks + 26 + 1 + + + PLLQ1 + Main PLL (PLL) division factor for USB + OTG FS, SDIO and random number generator + clocks + 25 + 1 + + + PLLQ0 + Main PLL (PLL) division factor for USB + OTG FS, SDIO and random number generator + clocks + 24 + 1 + + + PLLSRC + Main PLL(PLL) and audio PLL (PLLI2S) + entry clock source + 22 + 1 + + + PLLP1 + Main PLL (PLL) division factor for main + system clock + 17 + 1 + + + PLLP0 + Main PLL (PLL) division factor for main + system clock + 16 + 1 + + + PLLN8 + Main PLL (PLL) multiplication factor for + VCO + 14 + 1 + + + PLLN7 + Main PLL (PLL) multiplication factor for + VCO + 13 + 1 + + + PLLN6 + Main PLL (PLL) multiplication factor for + VCO + 12 + 1 + + + PLLN5 + Main PLL (PLL) multiplication factor for + VCO + 11 + 1 + + + PLLN4 + Main PLL (PLL) multiplication factor for + VCO + 10 + 1 + + + PLLN3 + Main PLL (PLL) multiplication factor for + VCO + 9 + 1 + + + PLLN2 + Main PLL (PLL) multiplication factor for + VCO + 8 + 1 + + + PLLN1 + Main PLL (PLL) multiplication factor for + VCO + 7 + 1 + + + PLLN0 + Main PLL (PLL) multiplication factor for + VCO + 6 + 1 + + + PLLM5 + Division factor for the main PLL (PLL) + and audio PLL (PLLI2S) input clock + 5 + 1 + + + PLLM4 + Division factor for the main PLL (PLL) + and audio PLL (PLLI2S) input clock + 4 + 1 + + + PLLM3 + Division factor for the main PLL (PLL) + and audio PLL (PLLI2S) input clock + 3 + 1 + + + PLLM2 + Division factor for the main PLL (PLL) + and audio PLL (PLLI2S) input clock + 2 + 1 + + + PLLM1 + Division factor for the main PLL (PLL) + and audio PLL (PLLI2S) input clock + 1 + 1 + + + PLLM0 + Division factor for the main PLL (PLL) + and audio PLL (PLLI2S) input clock + 0 + 1 + + + + + CFGR + CFGR + clock configuration register + 0x8 + 0x20 + 0x00000000 + + + MCO2 + Microcontroller clock output + 2 + 30 + 2 + read-write + + + MCO2PRE + MCO2 prescaler + 27 + 3 + read-write + + + MCO1PRE + MCO1 prescaler + 24 + 3 + read-write + + + I2SSRC + I2S clock selection + 23 + 1 + read-write + + + MCO1 + Microcontroller clock output + 1 + 21 + 2 + read-write + + + RTCPRE + HSE division factor for RTC + clock + 16 + 5 + read-write + + + PPRE2 + APB high-speed prescaler + (APB2) + 13 + 3 + read-write + + + PPRE1 + APB Low speed prescaler + (APB1) + 10 + 3 + read-write + + + HPRE + AHB prescaler + 4 + 4 + read-write + + + SWS1 + System clock switch status + 3 + 1 + read-only + + + SWS0 + System clock switch status + 2 + 1 + read-only + + + SW1 + System clock switch + 1 + 1 + read-write + + + SW0 + System clock switch + 0 + 1 + read-write + + + + + CIR + CIR + clock interrupt register + 0xC + 0x20 + 0x00000000 + + + CSSC + Clock security system interrupt + clear + 23 + 1 + write-only + + + PLLSAIRDYC + PLLSAI Ready Interrupt + Clear + 22 + 1 + write-only + + + PLLI2SRDYC + PLLI2S ready interrupt + clear + 21 + 1 + write-only + + + PLLRDYC + Main PLL(PLL) ready interrupt + clear + 20 + 1 + write-only + + + HSERDYC + HSE ready interrupt clear + 19 + 1 + write-only + + + HSIRDYC + HSI ready interrupt clear + 18 + 1 + write-only + + + LSERDYC + LSE ready interrupt clear + 17 + 1 + write-only + + + LSIRDYC + LSI ready interrupt clear + 16 + 1 + write-only + + + PLLSAIRDYIE + PLLSAI Ready Interrupt + Enable + 14 + 1 + read-write + + + PLLI2SRDYIE + PLLI2S ready interrupt + enable + 13 + 1 + read-write + + + PLLRDYIE + Main PLL (PLL) ready interrupt + enable + 12 + 1 + read-write + + + HSERDYIE + HSE ready interrupt enable + 11 + 1 + read-write + + + HSIRDYIE + HSI ready interrupt enable + 10 + 1 + read-write + + + LSERDYIE + LSE ready interrupt enable + 9 + 1 + read-write + + + LSIRDYIE + LSI ready interrupt enable + 8 + 1 + read-write + + + CSSF + Clock security system interrupt + flag + 7 + 1 + read-only + + + PLLSAIRDYF + PLLSAI ready interrupt + flag + 6 + 1 + read-only + + + PLLI2SRDYF + PLLI2S ready interrupt + flag + 5 + 1 + read-only + + + PLLRDYF + Main PLL (PLL) ready interrupt + flag + 4 + 1 + read-only + + + HSERDYF + HSE ready interrupt flag + 3 + 1 + read-only + + + HSIRDYF + HSI ready interrupt flag + 2 + 1 + read-only + + + LSERDYF + LSE ready interrupt flag + 1 + 1 + read-only + + + LSIRDYF + LSI ready interrupt flag + 0 + 1 + read-only + + + + + AHB1RSTR + AHB1RSTR + AHB1 peripheral reset register + 0x10 + 0x20 + read-write + 0x00000000 + + + OTGHSRST + USB OTG HS module reset + 29 + 1 + + + ETHMACRST + Ethernet MAC reset + 25 + 1 + + + DMA2DRST + DMA2D reset + 23 + 1 + + + DMA2RST + DMA2 reset + 22 + 1 + + + DMA1RST + DMA2 reset + 21 + 1 + + + CRCRST + CRC reset + 12 + 1 + + + GPIOKRST + IO port K reset + 10 + 1 + + + GPIOJRST + IO port J reset + 9 + 1 + + + GPIOIRST + IO port I reset + 8 + 1 + + + GPIOHRST + IO port H reset + 7 + 1 + + + GPIOGRST + IO port G reset + 6 + 1 + + + GPIOFRST + IO port F reset + 5 + 1 + + + GPIOERST + IO port E reset + 4 + 1 + + + GPIODRST + IO port D reset + 3 + 1 + + + GPIOCRST + IO port C reset + 2 + 1 + + + GPIOBRST + IO port B reset + 1 + 1 + + + GPIOARST + IO port A reset + 0 + 1 + + + + + AHB2RSTR + AHB2RSTR + AHB2 peripheral reset register + 0x14 + 0x20 + read-write + 0x00000000 + + + OTGFSRST + USB OTG FS module reset + 7 + 1 + + + RNGRST + Random number generator module + reset + 6 + 1 + + + DCMIRST + Camera interface reset + 0 + 1 + + + + + AHB3RSTR + AHB3RSTR + AHB3 peripheral reset register + 0x18 + 0x20 + read-write + 0x00000000 + + + FMCRST + Flexible memory controller module + reset + 0 + 1 + + + + + APB1RSTR + APB1RSTR + APB1 peripheral reset register + 0x20 + 0x20 + read-write + 0x00000000 + + + TIM2RST + TIM2 reset + 0 + 1 + + + TIM3RST + TIM3 reset + 1 + 1 + + + TIM4RST + TIM4 reset + 2 + 1 + + + TIM5RST + TIM5 reset + 3 + 1 + + + TIM6RST + TIM6 reset + 4 + 1 + + + TIM7RST + TIM7 reset + 5 + 1 + + + TIM12RST + TIM12 reset + 6 + 1 + + + TIM13RST + TIM13 reset + 7 + 1 + + + TIM14RST + TIM14 reset + 8 + 1 + + + WWDGRST + Window watchdog reset + 11 + 1 + + + SPI2RST + SPI 2 reset + 14 + 1 + + + SPI3RST + SPI 3 reset + 15 + 1 + + + UART2RST + USART 2 reset + 17 + 1 + + + UART3RST + USART 3 reset + 18 + 1 + + + UART4RST + USART 4 reset + 19 + 1 + + + UART5RST + USART 5 reset + 20 + 1 + + + I2C1RST + I2C 1 reset + 21 + 1 + + + I2C2RST + I2C 2 reset + 22 + 1 + + + I2C3RST + I2C3 reset + 23 + 1 + + + CAN1RST + CAN1 reset + 25 + 1 + + + CAN2RST + CAN2 reset + 26 + 1 + + + PWRRST + Power interface reset + 28 + 1 + + + DACRST + DAC reset + 29 + 1 + + + UART7RST + UART7 reset + 30 + 1 + + + UART8RST + UART8 reset + 31 + 1 + + + + + APB2RSTR + APB2RSTR + APB2 peripheral reset register + 0x24 + 0x20 + read-write + 0x00000000 + + + TIM1RST + TIM1 reset + 0 + 1 + + + TIM8RST + TIM8 reset + 1 + 1 + + + USART1RST + USART1 reset + 4 + 1 + + + USART6RST + USART6 reset + 5 + 1 + + + ADCRST + ADC interface reset (common to all + ADCs) + 8 + 1 + + + SDIORST + SDIO reset + 11 + 1 + + + SPI1RST + SPI 1 reset + 12 + 1 + + + SPI4RST + SPI4 reset + 13 + 1 + + + SYSCFGRST + System configuration controller + reset + 14 + 1 + + + TIM9RST + TIM9 reset + 16 + 1 + + + TIM10RST + TIM10 reset + 17 + 1 + + + TIM11RST + TIM11 reset + 18 + 1 + + + SPI5RST + SPI5 reset + 20 + 1 + + + SPI6RST + SPI6 reset + 21 + 1 + + + SAI1RST + SAI1 reset + 22 + 1 + + + LTDCRST + LTDC reset + 26 + 1 + + + + + AHB1ENR + AHB1ENR + AHB1 peripheral clock register + 0x30 + 0x20 + read-write + 0x00100000 + + + OTGHSULPIEN + USB OTG HSULPI clock + enable + 30 + 1 + + + OTGHSEN + USB OTG HS clock enable + 29 + 1 + + + ETHMACPTPEN + Ethernet PTP clock enable + 28 + 1 + + + ETHMACRXEN + Ethernet Reception clock + enable + 27 + 1 + + + ETHMACTXEN + Ethernet Transmission clock + enable + 26 + 1 + + + ETHMACEN + Ethernet MAC clock enable + 25 + 1 + + + DMA2DEN + DMA2D clock enable + 23 + 1 + + + DMA2EN + DMA2 clock enable + 22 + 1 + + + DMA1EN + DMA1 clock enable + 21 + 1 + + + CCMDATARAMEN + CCM data RAM clock enable + 20 + 1 + + + BKPSRAMEN + Backup SRAM interface clock + enable + 18 + 1 + + + CRCEN + CRC clock enable + 12 + 1 + + + GPIOKEN + IO port K clock enable + 10 + 1 + + + GPIOJEN + IO port J clock enable + 9 + 1 + + + GPIOIEN + IO port I clock enable + 8 + 1 + + + GPIOHEN + IO port H clock enable + 7 + 1 + + + GPIOGEN + IO port G clock enable + 6 + 1 + + + GPIOFEN + IO port F clock enable + 5 + 1 + + + GPIOEEN + IO port E clock enable + 4 + 1 + + + GPIODEN + IO port D clock enable + 3 + 1 + + + GPIOCEN + IO port C clock enable + 2 + 1 + + + GPIOBEN + IO port B clock enable + 1 + 1 + + + GPIOAEN + IO port A clock enable + 0 + 1 + + + + + AHB2ENR + AHB2ENR + AHB2 peripheral clock enable + register + 0x34 + 0x20 + read-write + 0x00000000 + + + OTGFSEN + USB OTG FS clock enable + 7 + 1 + + + RNGEN + Random number generator clock + enable + 6 + 1 + + + DCMIEN + Camera interface enable + 0 + 1 + + + + + AHB3ENR + AHB3ENR + AHB3 peripheral clock enable + register + 0x38 + 0x20 + read-write + 0x00000000 + + + FMCEN + Flexible memory controller module clock + enable + 0 + 1 + + + + + APB1ENR + APB1ENR + APB1 peripheral clock enable + register + 0x40 + 0x20 + read-write + 0x00000000 + + + TIM2EN + TIM2 clock enable + 0 + 1 + + + TIM3EN + TIM3 clock enable + 1 + 1 + + + TIM4EN + TIM4 clock enable + 2 + 1 + + + TIM5EN + TIM5 clock enable + 3 + 1 + + + TIM6EN + TIM6 clock enable + 4 + 1 + + + TIM7EN + TIM7 clock enable + 5 + 1 + + + TIM12EN + TIM12 clock enable + 6 + 1 + + + TIM13EN + TIM13 clock enable + 7 + 1 + + + TIM14EN + TIM14 clock enable + 8 + 1 + + + WWDGEN + Window watchdog clock + enable + 11 + 1 + + + SPI2EN + SPI2 clock enable + 14 + 1 + + + SPI3EN + SPI3 clock enable + 15 + 1 + + + USART2EN + USART 2 clock enable + 17 + 1 + + + USART3EN + USART3 clock enable + 18 + 1 + + + UART4EN + UART4 clock enable + 19 + 1 + + + UART5EN + UART5 clock enable + 20 + 1 + + + I2C1EN + I2C1 clock enable + 21 + 1 + + + I2C2EN + I2C2 clock enable + 22 + 1 + + + I2C3EN + I2C3 clock enable + 23 + 1 + + + CAN1EN + CAN 1 clock enable + 25 + 1 + + + CAN2EN + CAN 2 clock enable + 26 + 1 + + + PWREN + Power interface clock + enable + 28 + 1 + + + DACEN + DAC interface clock enable + 29 + 1 + + + UART7ENR + UART7 clock enable + 30 + 1 + + + UART8ENR + UART8 clock enable + 31 + 1 + + + + + APB2ENR + APB2ENR + APB2 peripheral clock enable + register + 0x44 + 0x20 + read-write + 0x00000000 + + + TIM1EN + TIM1 clock enable + 0 + 1 + + + TIM8EN + TIM8 clock enable + 1 + 1 + + + USART1EN + USART1 clock enable + 4 + 1 + + + USART6EN + USART6 clock enable + 5 + 1 + + + ADC1EN + ADC1 clock enable + 8 + 1 + + + ADC2EN + ADC2 clock enable + 9 + 1 + + + ADC3EN + ADC3 clock enable + 10 + 1 + + + SDIOEN + SDIO clock enable + 11 + 1 + + + SPI1EN + SPI1 clock enable + 12 + 1 + + + SPI4ENR + SPI4 clock enable + 13 + 1 + + + SYSCFGEN + System configuration controller clock + enable + 14 + 1 + + + TIM9EN + TIM9 clock enable + 16 + 1 + + + TIM10EN + TIM10 clock enable + 17 + 1 + + + TIM11EN + TIM11 clock enable + 18 + 1 + + + SPI5ENR + SPI5 clock enable + 20 + 1 + + + SPI6ENR + SPI6 clock enable + 21 + 1 + + + SAI1EN + SAI1 clock enable + 22 + 1 + + + LTDCEN + LTDC clock enable + 26 + 1 + + + + + AHB1LPENR + AHB1LPENR + AHB1 peripheral clock enable in low power + mode register + 0x50 + 0x20 + read-write + 0x7E6791FF + + + GPIOALPEN + IO port A clock enable during sleep + mode + 0 + 1 + + + GPIOBLPEN + IO port B clock enable during Sleep + mode + 1 + 1 + + + GPIOCLPEN + IO port C clock enable during Sleep + mode + 2 + 1 + + + GPIODLPEN + IO port D clock enable during Sleep + mode + 3 + 1 + + + GPIOELPEN + IO port E clock enable during Sleep + mode + 4 + 1 + + + GPIOFLPEN + IO port F clock enable during Sleep + mode + 5 + 1 + + + GPIOGLPEN + IO port G clock enable during Sleep + mode + 6 + 1 + + + GPIOHLPEN + IO port H clock enable during Sleep + mode + 7 + 1 + + + GPIOILPEN + IO port I clock enable during Sleep + mode + 8 + 1 + + + GPIOJLPEN + IO port J clock enable during Sleep + mode + 9 + 1 + + + GPIOKLPEN + IO port K clock enable during Sleep + mode + 10 + 1 + + + CRCLPEN + CRC clock enable during Sleep + mode + 12 + 1 + + + FLITFLPEN + Flash interface clock enable during + Sleep mode + 15 + 1 + + + SRAM1LPEN + SRAM 1interface clock enable during + Sleep mode + 16 + 1 + + + SRAM2LPEN + SRAM 2 interface clock enable during + Sleep mode + 17 + 1 + + + BKPSRAMLPEN + Backup SRAM interface clock enable + during Sleep mode + 18 + 1 + + + SRAM3LPEN + SRAM 3 interface clock enable during + Sleep mode + 19 + 1 + + + DMA1LPEN + DMA1 clock enable during Sleep + mode + 21 + 1 + + + DMA2LPEN + DMA2 clock enable during Sleep + mode + 22 + 1 + + + DMA2DLPEN + DMA2D clock enable during Sleep + mode + 23 + 1 + + + ETHMACLPEN + Ethernet MAC clock enable during Sleep + mode + 25 + 1 + + + ETHMACTXLPEN + Ethernet transmission clock enable + during Sleep mode + 26 + 1 + + + ETHMACRXLPEN + Ethernet reception clock enable during + Sleep mode + 27 + 1 + + + ETHMACPTPLPEN + Ethernet PTP clock enable during Sleep + mode + 28 + 1 + + + OTGHSLPEN + USB OTG HS clock enable during Sleep + mode + 29 + 1 + + + OTGHSULPILPEN + USB OTG HS ULPI clock enable during + Sleep mode + 30 + 1 + + + + + AHB2LPENR + AHB2LPENR + AHB2 peripheral clock enable in low power + mode register + 0x54 + 0x20 + read-write + 0x000000F1 + + + OTGFSLPEN + USB OTG FS clock enable during Sleep + mode + 7 + 1 + + + RNGLPEN + Random number generator clock enable + during Sleep mode + 6 + 1 + + + DCMILPEN + Camera interface enable during Sleep + mode + 0 + 1 + + + + + AHB3LPENR + AHB3LPENR + AHB3 peripheral clock enable in low power + mode register + 0x58 + 0x20 + read-write + 0x00000001 + + + FMCLPEN + Flexible memory controller module clock + enable during Sleep mode + 0 + 1 + + + + + APB1LPENR + APB1LPENR + APB1 peripheral clock enable in low power + mode register + 0x60 + 0x20 + read-write + 0x36FEC9FF + + + TIM2LPEN + TIM2 clock enable during Sleep + mode + 0 + 1 + + + TIM3LPEN + TIM3 clock enable during Sleep + mode + 1 + 1 + + + TIM4LPEN + TIM4 clock enable during Sleep + mode + 2 + 1 + + + TIM5LPEN + TIM5 clock enable during Sleep + mode + 3 + 1 + + + TIM6LPEN + TIM6 clock enable during Sleep + mode + 4 + 1 + + + TIM7LPEN + TIM7 clock enable during Sleep + mode + 5 + 1 + + + TIM12LPEN + TIM12 clock enable during Sleep + mode + 6 + 1 + + + TIM13LPEN + TIM13 clock enable during Sleep + mode + 7 + 1 + + + TIM14LPEN + TIM14 clock enable during Sleep + mode + 8 + 1 + + + WWDGLPEN + Window watchdog clock enable during + Sleep mode + 11 + 1 + + + SPI2LPEN + SPI2 clock enable during Sleep + mode + 14 + 1 + + + SPI3LPEN + SPI3 clock enable during Sleep + mode + 15 + 1 + + + USART2LPEN + USART2 clock enable during Sleep + mode + 17 + 1 + + + USART3LPEN + USART3 clock enable during Sleep + mode + 18 + 1 + + + UART4LPEN + UART4 clock enable during Sleep + mode + 19 + 1 + + + UART5LPEN + UART5 clock enable during Sleep + mode + 20 + 1 + + + I2C1LPEN + I2C1 clock enable during Sleep + mode + 21 + 1 + + + I2C2LPEN + I2C2 clock enable during Sleep + mode + 22 + 1 + + + I2C3LPEN + I2C3 clock enable during Sleep + mode + 23 + 1 + + + CAN1LPEN + CAN 1 clock enable during Sleep + mode + 25 + 1 + + + CAN2LPEN + CAN 2 clock enable during Sleep + mode + 26 + 1 + + + PWRLPEN + Power interface clock enable during + Sleep mode + 28 + 1 + + + DACLPEN + DAC interface clock enable during Sleep + mode + 29 + 1 + + + UART7LPEN + UART7 clock enable during Sleep + mode + 30 + 1 + + + UART8LPEN + UART8 clock enable during Sleep + mode + 31 + 1 + + + + + APB2LPENR + APB2LPENR + APB2 peripheral clock enabled in low power + mode register + 0x64 + 0x20 + read-write + 0x00075F33 + + + TIM1LPEN + TIM1 clock enable during Sleep + mode + 0 + 1 + + + TIM8LPEN + TIM8 clock enable during Sleep + mode + 1 + 1 + + + USART1LPEN + USART1 clock enable during Sleep + mode + 4 + 1 + + + USART6LPEN + USART6 clock enable during Sleep + mode + 5 + 1 + + + ADC1LPEN + ADC1 clock enable during Sleep + mode + 8 + 1 + + + ADC2LPEN + ADC2 clock enable during Sleep + mode + 9 + 1 + + + ADC3LPEN + ADC 3 clock enable during Sleep + mode + 10 + 1 + + + SDIOLPEN + SDIO clock enable during Sleep + mode + 11 + 1 + + + SPI1LPEN + SPI 1 clock enable during Sleep + mode + 12 + 1 + + + SPI4LPEN + SPI 4 clock enable during Sleep + mode + 13 + 1 + + + SYSCFGLPEN + System configuration controller clock + enable during Sleep mode + 14 + 1 + + + TIM9LPEN + TIM9 clock enable during sleep + mode + 16 + 1 + + + TIM10LPEN + TIM10 clock enable during Sleep + mode + 17 + 1 + + + TIM11LPEN + TIM11 clock enable during Sleep + mode + 18 + 1 + + + SPI5LPEN + SPI 5 clock enable during Sleep + mode + 20 + 1 + + + SPI6LPEN + SPI 6 clock enable during Sleep + mode + 21 + 1 + + + SAI1LPEN + SAI1 clock enable + 22 + 1 + + + LTDCLPEN + LTDC clock enable + 26 + 1 + + + + + BDCR + BDCR + Backup domain control register + 0x70 + 0x20 + 0x00000000 + + + BDRST + Backup domain software + reset + 16 + 1 + read-write + + + RTCEN + RTC clock enable + 15 + 1 + read-write + + + RTCSEL1 + RTC clock source selection + 9 + 1 + read-write + + + RTCSEL0 + RTC clock source selection + 8 + 1 + read-write + + + LSEBYP + External low-speed oscillator + bypass + 2 + 1 + read-write + + + LSERDY + External low-speed oscillator + ready + 1 + 1 + read-only + + + LSEON + External low-speed oscillator + enable + 0 + 1 + read-write + + + + + CSR + CSR + clock control & status + register + 0x74 + 0x20 + 0x0E000000 + + + LPWRRSTF + Low-power reset flag + 31 + 1 + read-write + + + WWDGRSTF + Window watchdog reset flag + 30 + 1 + read-write + + + WDGRSTF + Independent watchdog reset + flag + 29 + 1 + read-write + + + SFTRSTF + Software reset flag + 28 + 1 + read-write + + + PORRSTF + POR/PDR reset flag + 27 + 1 + read-write + + + PADRSTF + PIN reset flag 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PLLSAIQ + PLLSAIN + 24 + 4 + + + PLLSAIR + PLLSAIN + 28 + 3 + + + + + DCKCFGR + DCKCFGR + DCKCFGR + 0x8C + 0x20 + read-write + 0x00000000 + + + PLLI2SDIVQ + PLLI2SDIVQ + 0 + 5 + + + PLLSAIDIVQ + PLLSAIDIVQ + 8 + 5 + + + PLLSAIDIVR + PLLSAIDIVR + 16 + 2 + + + SAI1ASRC + SAI1ASRC + 20 + 2 + + + SAI1BSRC + SAI1BSRC + 22 + 2 + + + TIMPRE + TIMPRE + 24 + 1 + + + + + + + + GPIOK + General-purpose I/Os + GPIO + 0x40022800 + + 0x0 + 0x400 + registers + + + + MODER + MODER + GPIO port mode register + 0x0 + 0x20 + read-write + 0x00000000 + + + MODER15 + Port x configuration bits (y = + 0..15) + 30 + 2 + + + MODER14 + Port x configuration bits (y = + 0..15) + 28 + 2 + + + MODER13 + Port x configuration bits (y = + 0..15) + 26 + 2 + + + MODER12 + Port x configuration bits (y = + 0..15) + 24 + 2 + + + MODER11 + Port x configuration bits (y = + 0..15) + 22 + 2 + + + MODER10 + Port x configuration bits (y = + 0..15) + 20 + 2 + + + MODER9 + Port x configuration bits (y = + 0..15) + 18 + 2 + + + MODER8 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bits (y = + 0..15) + 10 + 1 + + + OT9 + Port x configuration bits (y = + 0..15) + 9 + 1 + + + OT8 + Port x configuration bits (y = + 0..15) + 8 + 1 + + + OT7 + Port x configuration bits (y = + 0..15) + 7 + 1 + + + OT6 + Port x configuration bits (y = + 0..15) + 6 + 1 + + + OT5 + Port x configuration bits (y = + 0..15) + 5 + 1 + + + OT4 + Port x configuration bits (y = + 0..15) + 4 + 1 + + + OT3 + Port x configuration bits (y = + 0..15) + 3 + 1 + + + OT2 + Port x configuration bits (y = + 0..15) + 2 + 1 + + + OT1 + Port x configuration bits (y = + 0..15) + 1 + 1 + + + OT0 + Port x configuration bits (y = + 0..15) + 0 + 1 + + + + + OSPEEDR + OSPEEDR + GPIO port output speed + register + 0x8 + 0x20 + read-write + 0x00000000 + + + OSPEEDR15 + Port x configuration bits (y = + 0..15) + 30 + 2 + + + OSPEEDR14 + Port x configuration bits (y = + 0..15) + 28 + 2 + + + OSPEEDR13 + Port x configuration bits (y = + 0..15) + 26 + 2 + + + OSPEEDR12 + Port x configuration bits (y = + 0..15) + 24 + 2 + + + OSPEEDR11 + Port x configuration bits (y = + 0..15) + 22 + 2 + + + OSPEEDR10 + Port x configuration bits (y = + 0..15) + 20 + 2 + + + OSPEEDR9 + Port x configuration bits (y = + 0..15) + 18 + 2 + + + OSPEEDR8 + Port x configuration bits (y = + 0..15) + 16 + 2 + + + OSPEEDR7 + Port x configuration bits (y = + 0..15) + 14 + 2 + + + OSPEEDR6 + Port x configuration bits (y = + 0..15) + 12 + 2 + + + OSPEEDR5 + Port x configuration bits (y = + 0..15) + 10 + 2 + + + OSPEEDR4 + Port x configuration bits (y = + 0..15) + 8 + 2 + + + OSPEEDR3 + Port x configuration bits (y = + 0..15) + 6 + 2 + + + OSPEEDR2 + Port x configuration bits (y = + 0..15) + 4 + 2 + + + OSPEEDR1 + Port x configuration bits (y = + 0..15) + 2 + 2 + + + OSPEEDR0 + Port x configuration bits (y = + 0..15) + 0 + 2 + + + + + PUPDR + PUPDR + GPIO port pull-up/pull-down + register + 0xC + 0x20 + read-write + 0x00000000 + + + PUPDR15 + Port x configuration bits (y = + 0..15) + 30 + 2 + + + PUPDR14 + Port x configuration bits (y = + 0..15) + 28 + 2 + + + PUPDR13 + Port x configuration bits (y = + 0..15) + 26 + 2 + + + PUPDR12 + Port x configuration bits (y = + 0..15) + 24 + 2 + + + PUPDR11 + Port x configuration bits (y = + 0..15) + 22 + 2 + + + PUPDR10 + Port x configuration bits (y = + 0..15) + 20 + 2 + + + PUPDR9 + Port x configuration bits (y = + 0..15) + 18 + 2 + + + PUPDR8 + Port x configuration bits (y = + 0..15) + 16 + 2 + + + PUPDR7 + Port x configuration bits (y = + 0..15) + 14 + 2 + + + PUPDR6 + Port x configuration bits (y = + 0..15) + 12 + 2 + + + PUPDR5 + Port x configuration bits (y = + 0..15) + 10 + 2 + + + PUPDR4 + Port x configuration bits (y = + 0..15) + 8 + 2 + + + PUPDR3 + Port x configuration bits (y = + 0..15) + 6 + 2 + + + PUPDR2 + Port x configuration bits (y = + 0..15) + 4 + 2 + + + PUPDR1 + Port x configuration bits (y = + 0..15) + 2 + 2 + + + PUPDR0 + Port x configuration bits (y = + 0..15) + 0 + 2 + + + + + IDR + IDR + GPIO port input data register + 0x10 + 0x20 + read-only + 0x00000000 + + + IDR15 + Port input data (y = + 0..15) + 15 + 1 + + + IDR14 + Port input data (y = + 0..15) + 14 + 1 + + + IDR13 + Port input data (y = + 0..15) + 13 + 1 + + + IDR12 + Port input data (y = + 0..15) + 12 + 1 + + + IDR11 + Port input data (y = + 0..15) + 11 + 1 + + + IDR10 + Port input data (y = + 0..15) + 10 + 1 + + + IDR9 + Port input data (y = + 0..15) + 9 + 1 + + + IDR8 + Port input data (y = + 0..15) + 8 + 1 + + + IDR7 + Port input data (y = + 0..15) + 7 + 1 + + + IDR6 + Port input data (y = + 0..15) + 6 + 1 + + + IDR5 + Port input data (y = + 0..15) + 5 + 1 + + + IDR4 + Port input data (y = + 0..15) + 4 + 1 + + + IDR3 + Port input data (y = + 0..15) + 3 + 1 + + + IDR2 + Port input data (y = + 0..15) + 2 + 1 + + + IDR1 + Port input data (y = + 0..15) + 1 + 1 + + + IDR0 + Port input data (y = + 0..15) + 0 + 1 + + + + + ODR + ODR + GPIO port output data register + 0x14 + 0x20 + read-write + 0x00000000 + + + ODR15 + Port output data (y = + 0..15) + 15 + 1 + + + ODR14 + Port output data (y = + 0..15) + 14 + 1 + + + ODR13 + Port output data (y = + 0..15) + 13 + 1 + + + ODR12 + Port output data (y = + 0..15) + 12 + 1 + + + ODR11 + Port output data (y = + 0..15) + 11 + 1 + + + ODR10 + Port output data (y = + 0..15) + 10 + 1 + + + ODR9 + Port output data (y = + 0..15) + 9 + 1 + + + ODR8 + Port output data (y = + 0..15) + 8 + 1 + + + ODR7 + Port output data (y = + 0..15) + 7 + 1 + + + ODR6 + Port output data (y = + 0..15) + 6 + 1 + + + ODR5 + Port output data (y = + 0..15) + 5 + 1 + + + ODR4 + Port output data (y = + 0..15) + 4 + 1 + + + ODR3 + Port output data (y = + 0..15) + 3 + 1 + + + ODR2 + Port output data (y = + 0..15) + 2 + 1 + + + ODR1 + Port output data (y = + 0..15) + 1 + 1 + + + ODR0 + Port output data (y = + 0..15) + 0 + 1 + + + + + BSRR + BSRR + GPIO port bit set/reset + register + 0x18 + 0x20 + write-only + 0x00000000 + + + BR15 + Port x reset bit y (y = + 0..15) + 31 + 1 + + + BR14 + Port x reset bit y (y = + 0..15) + 30 + 1 + + + BR13 + Port x reset bit y (y = + 0..15) + 29 + 1 + + + BR12 + Port x reset bit y (y = + 0..15) + 28 + 1 + + + BR11 + Port x reset bit y (y = + 0..15) + 27 + 1 + + + BR10 + Port x reset bit y (y = + 0..15) + 26 + 1 + + + BR9 + Port x reset bit y (y = + 0..15) + 25 + 1 + + + BR8 + Port x reset bit y (y = + 0..15) + 24 + 1 + + + BR7 + Port x reset bit y (y = + 0..15) + 23 + 1 + + + BR6 + Port x reset bit y (y = + 0..15) + 22 + 1 + + + BR5 + Port x reset bit y (y = + 0..15) + 21 + 1 + + + BR4 + Port x reset bit y (y = + 0..15) + 20 + 1 + + + BR3 + Port x reset bit y (y = + 0..15) + 19 + 1 + + + BR2 + Port x reset bit y (y = + 0..15) + 18 + 1 + + + BR1 + Port x reset bit y (y = + 0..15) + 17 + 1 + + + BR0 + Port x set bit y (y= + 0..15) + 16 + 1 + + + BS15 + Port x set bit y (y= + 0..15) + 15 + 1 + + + BS14 + Port x set bit y (y= + 0..15) + 14 + 1 + + + BS13 + Port x set bit y (y= + 0..15) + 13 + 1 + + + BS12 + Port x set bit y (y= + 0..15) + 12 + 1 + + + BS11 + Port x set bit y (y= + 0..15) + 11 + 1 + + + BS10 + Port x set bit y (y= + 0..15) + 10 + 1 + + + BS9 + Port x set bit y (y= + 0..15) + 9 + 1 + + + BS8 + Port x set bit y (y= + 0..15) + 8 + 1 + + + BS7 + Port x set bit y (y= + 0..15) + 7 + 1 + + + BS6 + Port x set bit y (y= + 0..15) + 6 + 1 + + + BS5 + Port x set bit y (y= + 0..15) + 5 + 1 + + + BS4 + Port x set bit y (y= + 0..15) + 4 + 1 + + + BS3 + Port x set bit y (y= + 0..15) + 3 + 1 + + + BS2 + Port x set bit y (y= + 0..15) + 2 + 1 + + + BS1 + Port x set bit y (y= + 0..15) + 1 + 1 + + + BS0 + Port x set bit y (y= + 0..15) + 0 + 1 + + + + + LCKR + LCKR + GPIO port configuration lock + register + 0x1C + 0x20 + read-write + 0x00000000 + + + LCKK + Port x lock bit y (y= + 0..15) + 16 + 1 + + + LCK15 + Port x lock bit y (y= + 0..15) + 15 + 1 + + + LCK14 + Port x lock bit y (y= + 0..15) + 14 + 1 + + + LCK13 + Port x lock bit y (y= + 0..15) + 13 + 1 + + + LCK12 + Port x lock bit y (y= + 0..15) + 12 + 1 + + + LCK11 + Port x lock bit y (y= + 0..15) + 11 + 1 + + + LCK10 + Port x lock bit y (y= + 0..15) + 10 + 1 + + + LCK9 + Port x lock bit y (y= + 0..15) + 9 + 1 + + + LCK8 + Port x lock bit y (y= + 0..15) + 8 + 1 + + + LCK7 + Port x lock bit y (y= + 0..15) + 7 + 1 + + + LCK6 + Port x lock bit y (y= + 0..15) + 6 + 1 + + + LCK5 + Port x lock bit y (y= + 0..15) + 5 + 1 + + + LCK4 + Port x lock bit y (y= + 0..15) + 4 + 1 + + + LCK3 + Port x lock bit y (y= + 0..15) + 3 + 1 + + + LCK2 + Port x lock bit y (y= + 0..15) + 2 + 1 + + + LCK1 + Port x lock bit y (y= + 0..15) + 1 + 1 + + + LCK0 + Port x lock bit y (y= + 0..15) + 0 + 1 + + + + + AFRL + AFRL + GPIO alternate function low + register + 0x20 + 0x20 + read-write + 0x00000000 + + + AFRL7 + Alternate function selection for port x + bit y (y = 0..7) + 28 + 4 + + + AFRL6 + Alternate function selection for port x + bit y (y = 0..7) + 24 + 4 + + + AFRL5 + Alternate function selection for port x + bit y (y = 0..7) + 20 + 4 + + + AFRL4 + Alternate function selection for port x + bit y (y = 0..7) + 16 + 4 + + + AFRL3 + Alternate function selection for port x + bit y (y = 0..7) + 12 + 4 + + + AFRL2 + Alternate function selection for port x + bit y (y = 0..7) + 8 + 4 + + + AFRL1 + Alternate function selection for port x + bit y (y = 0..7) + 4 + 4 + + + AFRL0 + Alternate function selection for port x + bit y (y = 0..7) + 0 + 4 + + + + + AFRH + AFRH + GPIO alternate function high + register + 0x24 + 0x20 + read-write + 0x00000000 + + + AFRH15 + Alternate function selection for port x + bit y (y = 8..15) + 28 + 4 + + + AFRH14 + Alternate function selection for port x + bit y (y = 8..15) + 24 + 4 + + + AFRH13 + Alternate function selection for port x + bit y (y = 8..15) + 20 + 4 + + + AFRH12 + Alternate function selection for port x + bit y (y = 8..15) + 16 + 4 + + + AFRH11 + Alternate function selection for port x + bit y (y = 8..15) + 12 + 4 + + + AFRH10 + Alternate function selection for port x + bit y (y = 8..15) + 8 + 4 + + + AFRH9 + Alternate function selection for port x + bit y (y = 8..15) + 4 + 4 + + + AFRH8 + Alternate function selection for port x + bit y (y = 8..15) + 0 + 4 + + + + + + + GPIOJ + 0x40022400 + + + GPIOI + 0x40022000 + + + GPIOH + 0x40021C00 + + + GPIOG + 0x40021800 + + + GPIOF + 0x40021400 + + + GPIOE + 0x40021000 + + + GPIOD + 0X40020C00 + + + GPIOC + 0x40020800 + + + GPIOB + General-purpose I/Os + GPIO + 0x40020400 + + 0x0 + 0x400 + registers + + + + MODER + MODER + GPIO port mode register + 0x0 + 0x20 + read-write + 0x00000280 + + + MODER15 + Port x configuration bits (y = + 0..15) + 30 + 2 + + + MODER14 + Port x configuration bits (y = + 0..15) + 28 + 2 + + + MODER13 + Port x configuration bits (y = + 0..15) + 26 + 2 + + + MODER12 + Port x configuration bits (y = + 0..15) + 24 + 2 + + + MODER11 + Port x configuration bits (y = + 0..15) + 22 + 2 + + + MODER10 + Port x configuration bits (y = + 0..15) + 20 + 2 + + + MODER9 + Port x configuration bits (y = + 0..15) + 18 + 2 + + + MODER8 + Port x configuration bits (y = + 0..15) + 16 + 2 + + + MODER7 + Port x configuration bits (y = + 0..15) + 14 + 2 + + + MODER6 + Port x configuration bits (y = + 0..15) + 12 + 2 + + + MODER5 + Port x configuration bits (y = + 0..15) + 10 + 2 + + + MODER4 + Port x configuration bits (y = + 0..15) + 8 + 2 + + + MODER3 + Port x configuration bits (y = + 0..15) + 6 + 2 + + + MODER2 + Port x configuration bits (y = + 0..15) + 4 + 2 + + + MODER1 + Port x configuration bits (y = + 0..15) + 2 + 2 + + + MODER0 + Port x configuration bits (y = + 0..15) + 0 + 2 + + + + + OTYPER + OTYPER + GPIO port output type register + 0x4 + 0x20 + read-write + 0x00000000 + + + OT15 + Port x configuration bits (y = + 0..15) + 15 + 1 + + + OT14 + Port x configuration bits (y = + 0..15) + 14 + 1 + + + OT13 + Port x configuration bits (y = + 0..15) + 13 + 1 + + + OT12 + Port x configuration bits (y = + 0..15) + 12 + 1 + + + OT11 + Port x configuration bits (y = + 0..15) + 11 + 1 + + + OT10 + Port x configuration bits (y = + 0..15) + 10 + 1 + + + OT9 + Port x configuration bits (y = + 0..15) + 9 + 1 + + + OT8 + Port x configuration bits (y = + 0..15) + 8 + 1 + + + OT7 + Port x configuration bits (y = + 0..15) + 7 + 1 + + + OT6 + Port x configuration bits (y = + 0..15) + 6 + 1 + + + OT5 + Port x configuration bits (y = + 0..15) + 5 + 1 + + + OT4 + Port x configuration bits (y = + 0..15) + 4 + 1 + + + OT3 + Port x configuration bits (y = + 0..15) + 3 + 1 + + + OT2 + Port x configuration bits (y = + 0..15) + 2 + 1 + + + OT1 + Port x configuration bits (y = + 0..15) + 1 + 1 + + + OT0 + Port x configuration bits (y = + 0..15) + 0 + 1 + + + + + OSPEEDR + OSPEEDR + GPIO port output speed + register + 0x8 + 0x20 + read-write + 0x000000C0 + + + OSPEEDR15 + Port x configuration bits (y = + 0..15) + 30 + 2 + + + OSPEEDR14 + Port x configuration bits (y = + 0..15) + 28 + 2 + + + OSPEEDR13 + Port x configuration bits (y = + 0..15) + 26 + 2 + + + OSPEEDR12 + Port x configuration bits (y = + 0..15) + 24 + 2 + + + OSPEEDR11 + Port x configuration bits (y = + 0..15) + 22 + 2 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(y= + 0..15) + 4 + 1 + + + BS3 + Port x set bit y (y= + 0..15) + 3 + 1 + + + BS2 + Port x set bit y (y= + 0..15) + 2 + 1 + + + BS1 + Port x set bit y (y= + 0..15) + 1 + 1 + + + BS0 + Port x set bit y (y= + 0..15) + 0 + 1 + + + + + LCKR + LCKR + GPIO port configuration lock + register + 0x1C + 0x20 + read-write + 0x00000000 + + + LCKK + Port x lock bit y (y= + 0..15) + 16 + 1 + + + LCK15 + Port x lock bit y (y= + 0..15) + 15 + 1 + + + LCK14 + Port x lock bit y (y= + 0..15) + 14 + 1 + + + LCK13 + Port x lock bit y (y= + 0..15) + 13 + 1 + + + LCK12 + Port x lock bit y (y= + 0..15) + 12 + 1 + + + LCK11 + Port x lock bit y (y= + 0..15) + 11 + 1 + + + LCK10 + Port x lock bit y (y= + 0..15) + 10 + 1 + + + LCK9 + Port x lock bit y (y= + 0..15) + 9 + 1 + + + LCK8 + Port x lock bit y (y= + 0..15) + 8 + 1 + + + LCK7 + Port x lock bit y (y= + 0..15) + 7 + 1 + + + LCK6 + Port x lock bit y (y= + 0..15) + 6 + 1 + + + LCK5 + Port x lock bit y (y= + 0..15) + 5 + 1 + + + LCK4 + Port x lock bit y (y= + 0..15) + 4 + 1 + + + LCK3 + Port x lock bit y (y= + 0..15) + 3 + 1 + + + LCK2 + Port x lock bit y (y= + 0..15) + 2 + 1 + + + LCK1 + Port x lock bit y (y= + 0..15) + 1 + 1 + + + LCK0 + Port x lock bit y (y= + 0..15) + 0 + 1 + + + + + AFRL + AFRL + GPIO alternate function low + register + 0x20 + 0x20 + read-write + 0x00000000 + + + AFRL7 + Alternate function selection for port x + bit y (y = 0..7) + 28 + 4 + + + AFRL6 + Alternate function selection for port x + bit y (y = 0..7) + 24 + 4 + + + AFRL5 + Alternate function selection for port x + bit y (y = 0..7) + 20 + 4 + + + AFRL4 + Alternate function selection for port x + bit y (y = 0..7) + 16 + 4 + + + AFRL3 + Alternate function selection for port x + bit y (y = 0..7) + 12 + 4 + + + AFRL2 + Alternate function selection for port x + bit y (y = 0..7) + 8 + 4 + + + AFRL1 + Alternate function selection for port x + bit y (y = 0..7) + 4 + 4 + + + AFRL0 + Alternate function selection for port x + bit y (y = 0..7) + 0 + 4 + + + + + AFRH + AFRH + GPIO alternate function high + register + 0x24 + 0x20 + read-write + 0x00000000 + + + AFRH15 + Alternate function selection for port x + bit y (y = 8..15) + 28 + 4 + + + AFRH14 + Alternate function selection for port x + bit y (y = 8..15) + 24 + 4 + + + AFRH13 + Alternate function selection for port x + bit y (y = 8..15) + 20 + 4 + + + AFRH12 + Alternate function selection for port x + bit y (y = 8..15) + 16 + 4 + + + AFRH11 + Alternate function selection for port x + bit y (y = 8..15) + 12 + 4 + + + AFRH10 + Alternate function selection for port x + bit y (y = 8..15) + 8 + 4 + + + AFRH9 + Alternate function selection for port x + bit y (y = 8..15) + 4 + 4 + + + AFRH8 + Alternate function selection for port x + bit y (y = 8..15) + 0 + 4 + + + + + + + SYSCFG + System configuration controller + SYSCFG + 0x40013800 + + 0x0 + 0x400 + registers + + + + MEMRM + MEMRM + memory remap register + 0x0 + 0x20 + read-write + 0x00000000 + + + MEM_MODE + Memory mapping selection + 0 + 3 + + + FB_MODE + Flash bank mode selection + 8 + 1 + + + SWP_FMC + FMC memory mapping swap + 10 + 2 + + + + + PMC + PMC + peripheral mode configuration + register + 0x4 + 0x20 + read-write + 0x00000000 + + + MII_RMII_SEL + Ethernet PHY interface + selection + 23 + 1 + + + ADC1DC2 + ADC1DC2 + 16 + 1 + + + ADC2DC2 + ADC2DC2 + 17 + 1 + + + ADC3DC2 + ADC3DC2 + 18 + 1 + + + + + EXTICR1 + EXTICR1 + external interrupt configuration register + 1 + 0x8 + 0x20 + read-write + 0x0000 + + + EXTI3 + EXTI x configuration (x = 0 to + 3) + 12 + 4 + + + EXTI2 + EXTI x configuration (x = 0 to + 3) + 8 + 4 + + + EXTI1 + EXTI x configuration (x = 0 to + 3) + 4 + 4 + + + EXTI0 + EXTI x configuration (x = 0 to + 3) + 0 + 4 + + + + + EXTICR2 + EXTICR2 + external interrupt configuration register + 2 + 0xC + 0x20 + read-write + 0x0000 + + + EXTI7 + EXTI x configuration (x = 4 to + 7) + 12 + 4 + + + EXTI6 + EXTI x configuration (x = 4 to + 7) + 8 + 4 + + + EXTI5 + EXTI x configuration (x = 4 to + 7) + 4 + 4 + + + EXTI4 + EXTI x configuration (x = 4 to + 7) + 0 + 4 + + + + + EXTICR3 + EXTICR3 + external interrupt configuration register + 3 + 0x10 + 0x20 + read-write + 0x0000 + + + EXTI11 + EXTI x configuration (x = 8 to + 11) + 12 + 4 + + + EXTI10 + EXTI10 + 8 + 4 + + + EXTI9 + EXTI x configuration (x = 8 to + 11) + 4 + 4 + + + EXTI8 + EXTI x configuration (x = 8 to + 11) + 0 + 4 + + + + + EXTICR4 + EXTICR4 + external interrupt configuration register + 4 + 0x14 + 0x20 + read-write + 0x0000 + + + EXTI15 + EXTI x configuration (x = 12 to + 15) + 12 + 4 + + + EXTI14 + EXTI x configuration (x = 12 to + 15) + 8 + 4 + + + EXTI13 + EXTI x configuration (x = 12 to + 15) + 4 + 4 + + + EXTI12 + EXTI x configuration (x = 12 to + 15) + 0 + 4 + + + + + CMPCR + CMPCR + Compensation cell control + register + 0x20 + 0x20 + read-only + 0x00000000 + + + READY + READY + 8 + 1 + + + CMP_PD + Compensation cell + power-down + 0 + 1 + + + + + + + SPI1 + Serial peripheral interface + SPI + 0x40013000 + + 0x0 + 0x400 + registers + + + SPI1 + SPI1 global interrupt + 35 + + + + CR1 + CR1 + control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + BIDIMODE + Bidirectional data mode + enable + 15 + 1 + + + BIDIOE + Output enable in bidirectional + mode + 14 + 1 + + + CRCEN + Hardware CRC calculation + enable + 13 + 1 + + + CRCNEXT + CRC transfer next + 12 + 1 + + + DFF + Data frame format + 11 + 1 + + + RXONLY + Receive only + 10 + 1 + + + SSM + Software slave management + 9 + 1 + + + SSI + Internal slave select + 8 + 1 + + + LSBFIRST + Frame format + 7 + 1 + + + SPE + SPI enable + 6 + 1 + + + BR + Baud rate control + 3 + 3 + + + MSTR + Master selection + 2 + 1 + + + CPOL + Clock polarity + 1 + 1 + + + CPHA + Clock phase + 0 + 1 + + + + + CR2 + CR2 + control register 2 + 0x4 + 0x20 + read-write + 0x0000 + + + TXEIE + Tx buffer empty interrupt + enable + 7 + 1 + + + RXNEIE + RX buffer not empty interrupt + enable + 6 + 1 + + + ERRIE + Error interrupt enable + 5 + 1 + + + FRF + Frame format + 4 + 1 + + + SSOE + SS output enable + 2 + 1 + + + TXDMAEN + Tx buffer DMA enable + 1 + 1 + + + RXDMAEN + Rx buffer DMA enable + 0 + 1 + + + + + SR + SR + status register + 0x8 + 0x20 + 0x0002 + + + TIFRFE + TI frame format error + 8 + 1 + read-only + + + BSY + Busy flag + 7 + 1 + read-only + + + OVR + Overrun flag + 6 + 1 + read-only + + + MODF + Mode fault + 5 + 1 + read-only + + + CRCERR + CRC error flag + 4 + 1 + read-write + + + UDR + Underrun flag + 3 + 1 + read-only + + + CHSIDE + Channel side + 2 + 1 + read-only + + + TXE + Transmit buffer empty + 1 + 1 + read-only + + + RXNE + Receive buffer not empty + 0 + 1 + read-only + + + + + DR + DR + data register + 0xC + 0x20 + read-write + 0x0000 + + + DR + Data register + 0 + 16 + + + + + CRCPR + CRCPR + CRC polynomial register + 0x10 + 0x20 + read-write + 0x0007 + + + CRCPOLY + CRC polynomial register + 0 + 16 + + + + + RXCRCR + RXCRCR + RX CRC register + 0x14 + 0x20 + read-only + 0x0000 + + + RxCRC + Rx CRC register + 0 + 16 + + + + + TXCRCR + TXCRCR + TX CRC register + 0x18 + 0x20 + read-only + 0x0000 + + + TxCRC + Tx CRC register + 0 + 16 + + + + + I2SCFGR + I2SCFGR + I2S configuration register + 0x1C + 0x20 + read-write + 0x0000 + + + I2SMOD + I2S mode selection + 11 + 1 + + + I2SE + I2S Enable + 10 + 1 + + + I2SCFG + I2S configuration mode + 8 + 2 + + + PCMSYNC + PCM frame synchronization + 7 + 1 + + + I2SSTD + I2S standard selection + 4 + 2 + + + CKPOL + Steady state clock + polarity + 3 + 1 + + + DATLEN + Data length to be + transferred + 1 + 2 + + + CHLEN + Channel length (number of bits per audio + channel) + 0 + 1 + + + + + I2SPR + I2SPR + I2S prescaler register + 0x20 + 0x20 + read-write + 00000010 + + + MCKOE + Master clock output enable + 9 + 1 + + + ODD + Odd factor for the + prescaler + 8 + 1 + + + I2SDIV + I2S Linear prescaler + 0 + 8 + + + + + + + SPI2 + 0x40003800 + + SPI2 + SPI2 global interrupt + 36 + + + + SPI3 + 0x40003C00 + + SPI3 + SPI3 global interrupt + 51 + + + + I2S2ext + 0x40003400 + + + I2S3ext + 0x40004000 + + + SPI4 + 0x40013400 + + SPI4 + SPI 4 global interrupt + 84 + + + + SPI5 + 0x40015000 + + SPI5 + SPI 5 global interrupt + 85 + + + + SPI6 + 0x40015400 + + SPI6 + SPI 6 global interrupt + 86 + + + + SDIO + Secure digital input/output + interface + SDIO + 0x40012C00 + + 0x0 + 0x400 + registers + + + SDIO + SDIO global interrupt + 49 + + + + POWER + POWER + power control register + 0x0 + 0x20 + read-write + 0x00000000 + + + PWRCTRL + PWRCTRL + 0 + 2 + + + + + CLKCR + CLKCR + SDI clock control register + 0x4 + 0x20 + read-write + 0x00000000 + + + HWFC_EN + HW Flow Control enable + 14 + 1 + + + NEGEDGE + SDIO_CK dephasing selection + bit + 13 + 1 + + + WIDBUS + Wide bus mode enable bit + 11 + 2 + + + BYPASS + Clock divider bypass enable + bit + 10 + 1 + + + PWRSAV + Power saving configuration + bit + 9 + 1 + + + CLKEN + Clock enable bit + 8 + 1 + + + CLKDIV + Clock divide factor + 0 + 8 + + + + + ARG + ARG + argument register + 0x8 + 0x20 + read-write + 0x00000000 + + + CMDARG + Command argument + 0 + 32 + + + + + CMD + CMD + command register + 0xC + 0x20 + read-write + 0x00000000 + + + CE_ATACMD + CE-ATA command + 14 + 1 + + + nIEN + not Interrupt Enable + 13 + 1 + + + ENCMDcompl + Enable CMD completion + 12 + 1 + + + SDIOSuspend + SD I/O suspend command + 11 + 1 + + + CPSMEN + Command path state machine (CPSM) Enable + bit + 10 + 1 + + + WAITPEND + CPSM Waits for ends of data transfer + (CmdPend internal signal). + 9 + 1 + + + WAITINT + CPSM waits for interrupt + request + 8 + 1 + + + WAITRESP + Wait for response bits + 6 + 2 + + + CMDINDEX + Command index + 0 + 6 + + + + + RESPCMD + RESPCMD + command response register + 0x10 + 0x20 + read-only + 0x00000000 + + + RESPCMD + Response command index + 0 + 6 + + + + + RESP1 + RESP1 + response 1..4 register + 0x14 + 0x20 + read-only + 0x00000000 + + + CARDSTATUS1 + see Table 132. + 0 + 32 + + + + + RESP2 + RESP2 + response 1..4 register + 0x18 + 0x20 + read-only + 0x00000000 + + + CARDSTATUS2 + see Table 132. + 0 + 32 + + + + + RESP3 + RESP3 + response 1..4 register + 0x1C + 0x20 + read-only + 0x00000000 + + + CARDSTATUS3 + see Table 132. + 0 + 32 + + + + + RESP4 + RESP4 + response 1..4 register + 0x20 + 0x20 + read-only + 0x00000000 + + + CARDSTATUS4 + see Table 132. + 0 + 32 + + + + + DTIMER + DTIMER + data timer register + 0x24 + 0x20 + read-write + 0x00000000 + + + DATATIME + Data timeout period + 0 + 32 + + + + + DLEN + DLEN + data length register + 0x28 + 0x20 + read-write + 0x00000000 + + + DATALENGTH + Data length value + 0 + 25 + + + + + DCTRL + DCTRL + data control register + 0x2C + 0x20 + read-write + 0x00000000 + + + SDIOEN + SD I/O enable functions + 11 + 1 + + + RWMOD + Read wait mode + 10 + 1 + + + RWSTOP + Read wait stop + 9 + 1 + + + RWSTART + Read wait start + 8 + 1 + + + DBLOCKSIZE + Data block size + 4 + 4 + + + DMAEN + DMA enable bit + 3 + 1 + + + DTMODE + Data transfer mode selection 1: Stream + or SDIO multibyte data transfer. + 2 + 1 + + + DTDIR + Data transfer direction + selection + 1 + 1 + + + DTEN + DTEN + 0 + 1 + + + + + DCOUNT + DCOUNT + data counter register + 0x30 + 0x20 + read-only + 0x00000000 + + + DATACOUNT + Data count value + 0 + 25 + + + + + STA + STA + status register + 0x34 + 0x20 + read-only + 0x00000000 + + + CEATAEND + CE-ATA command completion signal + received for CMD61 + 23 + 1 + + + SDIOIT + SDIO interrupt received + 22 + 1 + + + RXDAVL + Data available in receive + FIFO + 21 + 1 + + + TXDAVL + Data available in transmit + FIFO + 20 + 1 + + + RXFIFOE + Receive FIFO empty + 19 + 1 + + + TXFIFOE + Transmit FIFO empty + 18 + 1 + + + RXFIFOF + Receive FIFO full + 17 + 1 + + + TXFIFOF + Transmit FIFO full + 16 + 1 + + + RXFIFOHF + Receive FIFO half full: there are at + least 8 words in the FIFO + 15 + 1 + + + TXFIFOHE + Transmit FIFO half empty: at least 8 + words can be written into the FIFO + 14 + 1 + + + RXACT + Data receive in progress + 13 + 1 + + + TXACT + Data transmit in progress + 12 + 1 + + + CMDACT + Command transfer in + progress + 11 + 1 + + + DBCKEND + Data block sent/received (CRC check + passed) + 10 + 1 + + + STBITERR + Start bit not detected on all data + signals in wide bus mode + 9 + 1 + + + DATAEND + Data end (data counter, SDIDCOUNT, is + zero) + 8 + 1 + + + CMDSENT + Command sent (no response + required) + 7 + 1 + + + CMDREND + Command response received (CRC check + passed) + 6 + 1 + + + RXOVERR + Received FIFO overrun + error + 5 + 1 + + + TXUNDERR + Transmit FIFO underrun + error + 4 + 1 + + + DTIMEOUT + Data timeout + 3 + 1 + + + CTIMEOUT + Command response timeout + 2 + 1 + + + DCRCFAIL + Data block sent/received (CRC check + failed) + 1 + 1 + + + CCRCFAIL + Command response received (CRC check + failed) + 0 + 1 + + + + + ICR + ICR + interrupt clear register + 0x38 + 0x20 + read-write + 0x00000000 + + + CEATAENDC + CEATAEND flag clear bit + 23 + 1 + + + SDIOITC + SDIOIT flag clear bit + 22 + 1 + + + DBCKENDC + DBCKEND flag clear bit + 10 + 1 + + + STBITERRC + STBITERR flag clear bit + 9 + 1 + + + DATAENDC + DATAEND flag clear bit + 8 + 1 + + + CMDSENTC + CMDSENT flag clear bit + 7 + 1 + + + CMDRENDC + CMDREND flag clear bit + 6 + 1 + + + RXOVERRC + RXOVERR flag clear bit + 5 + 1 + + + TXUNDERRC + TXUNDERR flag clear bit + 4 + 1 + + + DTIMEOUTC + DTIMEOUT flag clear bit + 3 + 1 + + + CTIMEOUTC + CTIMEOUT flag clear bit + 2 + 1 + + + DCRCFAILC + DCRCFAIL flag clear bit + 1 + 1 + + + CCRCFAILC + CCRCFAIL flag clear bit + 0 + 1 + + + + + MASK + MASK + mask register + 0x3C + 0x20 + read-write + 0x00000000 + + + CEATAENDIE + CE-ATA command completion signal + received interrupt enable + 23 + 1 + + + SDIOITIE + SDIO mode interrupt received interrupt + enable + 22 + 1 + + + RXDAVLIE + Data available in Rx FIFO interrupt + enable + 21 + 1 + + + TXDAVLIE + Data available in Tx FIFO interrupt + enable + 20 + 1 + + + RXFIFOEIE + Rx FIFO empty interrupt + enable + 19 + 1 + + + TXFIFOEIE + Tx FIFO empty interrupt + enable + 18 + 1 + + + RXFIFOFIE + Rx FIFO full interrupt + enable + 17 + 1 + + + TXFIFOFIE + Tx FIFO full interrupt + enable + 16 + 1 + + + RXFIFOHFIE + Rx FIFO half full interrupt + enable + 15 + 1 + + + TXFIFOHEIE + Tx FIFO half empty interrupt + enable + 14 + 1 + + + RXACTIE + Data receive acting interrupt + enable + 13 + 1 + + + TXACTIE + Data transmit acting interrupt + enable + 12 + 1 + + + CMDACTIE + Command acting interrupt + enable + 11 + 1 + + + DBCKENDIE + Data block end interrupt + enable + 10 + 1 + + + STBITERRIE + Start bit error interrupt + enable + 9 + 1 + + + DATAENDIE + Data end interrupt enable + 8 + 1 + + + CMDSENTIE + Command sent interrupt + enable + 7 + 1 + + + CMDRENDIE + Command response received interrupt + enable + 6 + 1 + + + RXOVERRIE + Rx FIFO overrun error interrupt + enable + 5 + 1 + + + TXUNDERRIE + Tx FIFO underrun error interrupt + enable + 4 + 1 + + + DTIMEOUTIE + Data timeout interrupt + enable + 3 + 1 + + + CTIMEOUTIE + Command timeout interrupt + enable + 2 + 1 + + + DCRCFAILIE + Data CRC fail interrupt + enable + 1 + 1 + + + CCRCFAILIE + Command CRC fail interrupt + enable + 0 + 1 + + + + + FIFOCNT + FIFOCNT + FIFO counter register + 0x48 + 0x20 + read-only + 0x00000000 + + + FIFOCOUNT + Remaining number of words to be written + to or read from the FIFO. + 0 + 24 + + + + + FIFO + FIFO + data FIFO register + 0x80 + 0x20 + read-write + 0x00000000 + + + FIFOData + Receive and transmit FIFO + data + 0 + 32 + + + + + + + ADC1 + Analog-to-digital converter + ADC + 0x40012000 + + 0x0 + 0x400 + registers + + + ADC + ADC1 global interrupt + 18 + + + + SR + SR + status register + 0x0 + 0x20 + read-write + 0x00000000 + + + OVR + Overrun + 5 + 1 + + + STRT + Regular channel start flag + 4 + 1 + + + JSTRT + Injected channel start + flag + 3 + 1 + + + JEOC + Injected channel end of + conversion + 2 + 1 + + + EOC + Regular channel end of + conversion + 1 + 1 + + + AWD + Analog watchdog flag + 0 + 1 + + + + + CR1 + CR1 + control register 1 + 0x4 + 0x20 + read-write + 0x00000000 + + + OVRIE + Overrun interrupt enable + 26 + 1 + + + RES + Resolution + 24 + 2 + + + AWDEN + Analog watchdog enable on regular + channels + 23 + 1 + + + JAWDEN + Analog watchdog enable on injected + channels + 22 + 1 + + + DISCNUM + Discontinuous mode channel + count + 13 + 3 + + + JDISCEN + Discontinuous mode on injected + channels + 12 + 1 + + + DISCEN + Discontinuous mode on regular + channels + 11 + 1 + + + JAUTO + Automatic injected group + conversion + 10 + 1 + + + AWDSGL + Enable the watchdog on a single channel + in scan mode + 9 + 1 + + + SCAN + Scan mode + 8 + 1 + + + JEOCIE + Interrupt enable for injected + channels + 7 + 1 + + + AWDIE + Analog watchdog interrupt + enable + 6 + 1 + + + EOCIE + Interrupt enable for EOC + 5 + 1 + + + AWDCH + Analog watchdog channel select + bits + 0 + 5 + + + + + CR2 + CR2 + control register 2 + 0x8 + 0x20 + read-write + 0x00000000 + + + SWSTART + Start conversion of regular + channels + 30 + 1 + + + EXTEN + External trigger enable for regular + channels + 28 + 2 + + + EXTSEL + External event select for regular + group + 24 + 4 + + + JSWSTART + Start conversion of injected + channels + 22 + 1 + + + JEXTEN + External trigger enable for injected + channels + 20 + 2 + + + JEXTSEL + External event select for injected + group + 16 + 4 + + + ALIGN + Data alignment + 11 + 1 + + + EOCS + End of conversion + selection + 10 + 1 + + + DDS + DMA disable selection (for single ADC + mode) + 9 + 1 + + + DMA + Direct memory access mode (for single + ADC mode) + 8 + 1 + + + CONT + Continuous conversion + 1 + 1 + + + ADON + A/D Converter ON / OFF + 0 + 1 + + + + + SMPR1 + SMPR1 + sample time register 1 + 0xC + 0x20 + read-write + 0x00000000 + + + SMPx_x + Sample time bits + 0 + 32 + + + + + SMPR2 + SMPR2 + sample time register 2 + 0x10 + 0x20 + read-write + 0x00000000 + + + SMPx_x + Sample time bits + 0 + 32 + + + + + JOFR1 + JOFR1 + injected channel data offset register + x + 0x14 + 0x20 + read-write + 0x00000000 + + + JOFFSET1 + Data offset for injected channel + x + 0 + 12 + + + + + JOFR2 + JOFR2 + injected channel data offset register + x + 0x18 + 0x20 + read-write + 0x00000000 + + + JOFFSET2 + Data offset for injected channel + x + 0 + 12 + + + + + JOFR3 + JOFR3 + injected channel data offset register + x + 0x1C + 0x20 + read-write + 0x00000000 + + + JOFFSET3 + Data offset for injected channel + x + 0 + 12 + + + + + JOFR4 + JOFR4 + injected channel data offset register + x + 0x20 + 0x20 + read-write + 0x00000000 + + + JOFFSET4 + Data offset for injected channel + x + 0 + 12 + + + + + HTR + HTR + watchdog higher threshold + register + 0x24 + 0x20 + read-write + 0x00000FFF + + + HT + Analog watchdog higher + threshold + 0 + 12 + + + + + LTR + LTR + watchdog lower threshold + register + 0x28 + 0x20 + read-write + 0x00000000 + + + LT + Analog watchdog lower + threshold + 0 + 12 + + + + + SQR1 + SQR1 + regular sequence register 1 + 0x2C + 0x20 + read-write + 0x00000000 + + + L + Regular channel sequence + length + 20 + 4 + + + SQ16 + 16th conversion in regular + sequence + 15 + 5 + + + SQ15 + 15th conversion in regular + sequence + 10 + 5 + + + SQ14 + 14th conversion in regular + sequence + 5 + 5 + + + SQ13 + 13th conversion in regular + sequence + 0 + 5 + + + + + SQR2 + SQR2 + regular sequence register 2 + 0x30 + 0x20 + read-write + 0x00000000 + + + SQ12 + 12th conversion in regular + sequence + 25 + 5 + + + SQ11 + 11th conversion in regular + sequence + 20 + 5 + + + SQ10 + 10th conversion in regular + sequence + 15 + 5 + + + SQ9 + 9th conversion in regular + sequence + 10 + 5 + + + SQ8 + 8th conversion in regular + sequence + 5 + 5 + + + SQ7 + 7th conversion in regular + sequence + 0 + 5 + + + + + SQR3 + SQR3 + regular sequence register 3 + 0x34 + 0x20 + read-write + 0x00000000 + + + SQ6 + 6th conversion in regular + sequence + 25 + 5 + + + SQ5 + 5th conversion in regular + sequence + 20 + 5 + + + SQ4 + 4th conversion in regular + sequence + 15 + 5 + + + SQ3 + 3rd conversion in regular + sequence + 10 + 5 + + + SQ2 + 2nd conversion in regular + sequence + 5 + 5 + + + SQ1 + 1st conversion in regular + sequence + 0 + 5 + + + + + JSQR + JSQR + injected sequence register + 0x38 + 0x20 + read-write + 0x00000000 + + + JL + Injected sequence length + 20 + 2 + + + JSQ4 + 4th conversion in injected + sequence + 15 + 5 + + + JSQ3 + 3rd conversion in injected + sequence + 10 + 5 + + + JSQ2 + 2nd conversion in injected + sequence + 5 + 5 + + + JSQ1 + 1st conversion in injected + sequence + 0 + 5 + + + + + JDR1 + JDR1 + injected data register x + 0x3C + 0x20 + read-only + 0x00000000 + + + JDATA + Injected data + 0 + 16 + + + + + JDR2 + JDR2 + injected data register x + 0x40 + 0x20 + read-only + 0x00000000 + + + JDATA + Injected data + 0 + 16 + + + + + JDR3 + JDR3 + injected data register x + 0x44 + 0x20 + read-only + 0x00000000 + + + JDATA + Injected data + 0 + 16 + + + + + JDR4 + JDR4 + injected data register x + 0x48 + 0x20 + read-only + 0x00000000 + + + JDATA + Injected data + 0 + 16 + + + + + DR + DR + regular data register + 0x4C + 0x20 + read-only + 0x00000000 + + + DATA + Regular data + 0 + 16 + + + + + + + ADC2 + 0x40012100 + + ADC + ADC2 global interrupts + 18 + + + + ADC3 + 0x40012200 + + ADC + ADC3 global interrupts + 18 + + + + USART6 + Universal synchronous asynchronous receiver + transmitter + USART + 0x40011400 + + 0x0 + 0x400 + registers + + + USART6 + USART6 global interrupt + 71 + + + + SR + SR + Status register + 0x0 + 0x20 + 0x00C00000 + + + CTS + CTS flag + 9 + 1 + read-write + + + LBD + LIN break detection flag + 8 + 1 + read-write + + + TXE + Transmit data register + empty + 7 + 1 + read-only + + + TC + Transmission complete + 6 + 1 + read-write + + + RXNE + Read data register not + empty + 5 + 1 + read-write + + + IDLE + IDLE line detected + 4 + 1 + read-only + + + ORE + Overrun error + 3 + 1 + read-only + + + NF + Noise detected flag + 2 + 1 + read-only + + + FE + Framing error + 1 + 1 + read-only + + + PE + Parity error + 0 + 1 + read-only + + + + + DR + DR + Data register + 0x4 + 0x20 + read-write + 0x00000000 + + + DR + Data value + 0 + 9 + + + + + BRR + BRR + Baud rate register + 0x8 + 0x20 + read-write + 0x0000 + + + DIV_Mantissa + mantissa of USARTDIV + 4 + 12 + + + DIV_Fraction + fraction of USARTDIV + 0 + 4 + + + + + CR1 + CR1 + Control register 1 + 0xC + 0x20 + read-write + 0x0000 + + + OVER8 + Oversampling mode + 15 + 1 + + + UE + USART enable + 13 + 1 + + + M + Word length + 12 + 1 + + + WAKE + Wakeup method + 11 + 1 + + + PCE + Parity control enable + 10 + 1 + + + PS + Parity selection + 9 + 1 + + + PEIE + PE interrupt enable + 8 + 1 + + + TXEIE + TXE interrupt enable + 7 + 1 + + + TCIE + Transmission complete interrupt + enable + 6 + 1 + + + RXNEIE + RXNE interrupt enable + 5 + 1 + + + IDLEIE + IDLE interrupt enable + 4 + 1 + + + TE + Transmitter enable + 3 + 1 + + + RE + Receiver enable + 2 + 1 + + + RWU + Receiver wakeup + 1 + 1 + + + SBK + Send break + 0 + 1 + + + + + CR2 + CR2 + Control register 2 + 0x10 + 0x20 + read-write + 0x0000 + + + LINEN + LIN mode enable + 14 + 1 + + + STOP + STOP bits + 12 + 2 + + + CLKEN + Clock enable + 11 + 1 + + + CPOL + Clock polarity + 10 + 1 + + + CPHA + Clock phase + 9 + 1 + + + LBCL + Last bit clock pulse + 8 + 1 + + + LBDIE + LIN break detection interrupt + enable + 6 + 1 + + + LBDL + lin break detection length + 5 + 1 + + + ADD + Address of the USART node + 0 + 4 + + + + + CR3 + CR3 + Control register 3 + 0x14 + 0x20 + read-write + 0x0000 + + + ONEBIT + One sample bit method + enable + 11 + 1 + + + CTSIE + CTS interrupt enable + 10 + 1 + + + CTSE + CTS enable + 9 + 1 + + + RTSE + RTS enable + 8 + 1 + + + DMAT + DMA enable transmitter + 7 + 1 + + + DMAR + DMA enable receiver + 6 + 1 + + + SCEN + Smartcard mode enable + 5 + 1 + + + NACK + Smartcard NACK enable + 4 + 1 + + + HDSEL + Half-duplex selection + 3 + 1 + + + IRLP + IrDA low-power + 2 + 1 + + + IREN + IrDA mode enable + 1 + 1 + + + EIE + Error interrupt enable + 0 + 1 + + + + + GTPR + GTPR + Guard time and prescaler + register + 0x18 + 0x20 + read-write + 0x0000 + + + GT + Guard time value + 8 + 8 + + + PSC + Prescaler value + 0 + 8 + + + + + + + USART1 + 0x40011000 + + USART1 + USART1 global interrupt + 37 + + + + USART2 + 0x40004400 + + USART2 + USART2 global interrupt + 38 + + + + USART3 + 0x40004800 + + USART3 + USART3 global interrupt + 39 + + + + UART7 + 0x40007800 + + UART7 + UART 7 global interrupt + 82 + + + + UART8 + 0x40007C00 + + UART8 + UART 8 global interrupt + 83 + + + + DAC + Digital-to-analog converter + DAC + 0x40007400 + + 0x0 + 0x400 + registers + + + TIM6_DAC + TIM6 global interrupt, DAC1 and DAC2 underrun + error interrupt + 54 + + + + CR + CR + control register + 0x0 + 0x20 + read-write + 0x00000000 + + + DMAUDRIE2 + DAC channel2 DMA underrun interrupt + enable + 29 + 1 + + + DMAEN2 + DAC channel2 DMA enable + 28 + 1 + + + MAMP2 + DAC channel2 mask/amplitude + selector + 24 + 4 + + + WAVE2 + DAC channel2 noise/triangle wave + generation enable + 22 + 2 + + + TSEL2 + DAC channel2 trigger + selection + 19 + 3 + + + TEN2 + DAC channel2 trigger + enable + 18 + 1 + + + BOFF2 + DAC channel2 output buffer + disable + 17 + 1 + + + EN2 + DAC channel2 enable + 16 + 1 + + + DMAUDRIE1 + DAC channel1 DMA Underrun Interrupt + enable + 13 + 1 + + + DMAEN1 + DAC channel1 DMA enable + 12 + 1 + + + MAMP1 + DAC channel1 mask/amplitude + selector + 8 + 4 + + + WAVE1 + DAC channel1 noise/triangle wave + generation enable + 6 + 2 + + + TSEL1 + DAC channel1 trigger + selection + 3 + 3 + + + TEN1 + DAC channel1 trigger + enable + 2 + 1 + + + BOFF1 + DAC channel1 output buffer + disable + 1 + 1 + + + EN1 + DAC channel1 enable + 0 + 1 + + + + + SWTRIGR + SWTRIGR + software trigger register + 0x4 + 0x20 + write-only + 0x00000000 + + + SWTRIG2 + DAC channel2 software + trigger + 1 + 1 + + + SWTRIG1 + DAC channel1 software + trigger + 0 + 1 + + + + + DHR12R1 + DHR12R1 + channel1 12-bit right-aligned data holding + register + 0x8 + 0x20 + read-write + 0x00000000 + + + DACC1DHR + DAC channel1 12-bit right-aligned + data + 0 + 12 + + + + + DHR12L1 + DHR12L1 + channel1 12-bit left aligned data holding + register + 0xC + 0x20 + read-write + 0x00000000 + + + DACC1DHR + DAC channel1 12-bit left-aligned + data + 4 + 12 + + + + + DHR8R1 + DHR8R1 + channel1 8-bit right aligned data holding + register + 0x10 + 0x20 + read-write + 0x00000000 + + + DACC1DHR + DAC channel1 8-bit right-aligned + data + 0 + 8 + + + + + DHR12R2 + DHR12R2 + channel2 12-bit right aligned data holding + register + 0x14 + 0x20 + read-write + 0x00000000 + + + DACC2DHR + DAC channel2 12-bit right-aligned + data + 0 + 12 + + + + + DHR12L2 + DHR12L2 + channel2 12-bit left aligned data holding + register + 0x18 + 0x20 + read-write + 0x00000000 + + + DACC2DHR + DAC channel2 12-bit left-aligned + data + 4 + 12 + + + + + DHR8R2 + DHR8R2 + channel2 8-bit right-aligned data holding + register + 0x1C + 0x20 + read-write + 0x00000000 + + + DACC2DHR + DAC channel2 8-bit right-aligned + data + 0 + 8 + + + + + DHR12RD + DHR12RD + Dual DAC 12-bit right-aligned data holding + register + 0x20 + 0x20 + read-write + 0x00000000 + + + DACC2DHR + DAC channel2 12-bit right-aligned + data + 16 + 12 + + + DACC1DHR + DAC channel1 12-bit right-aligned + data + 0 + 12 + + + + + DHR12LD + DHR12LD + DUAL DAC 12-bit left aligned data holding + register + 0x24 + 0x20 + read-write + 0x00000000 + + + DACC2DHR + DAC channel2 12-bit left-aligned + data + 20 + 12 + + + DACC1DHR + DAC channel1 12-bit left-aligned + data + 4 + 12 + + + + + DHR8RD + DHR8RD + DUAL DAC 8-bit right aligned data holding + register + 0x28 + 0x20 + read-write + 0x00000000 + + + DACC2DHR + DAC channel2 8-bit right-aligned + data + 8 + 8 + + + DACC1DHR + DAC channel1 8-bit right-aligned + data + 0 + 8 + + + + + DOR1 + DOR1 + channel1 data output register + 0x2C + 0x20 + read-only + 0x00000000 + + + DACC1DOR + DAC channel1 data output + 0 + 12 + + + + + DOR2 + DOR2 + channel2 data output register + 0x30 + 0x20 + read-only + 0x00000000 + + + DACC2DOR + DAC channel2 data output + 0 + 12 + + + + + SR + SR + status register + 0x34 + 0x20 + read-write + 0x00000000 + + + DMAUDR2 + DAC channel2 DMA underrun + flag + 29 + 1 + + + DMAUDR1 + DAC channel1 DMA underrun + flag + 13 + 1 + + + + + + + I2C3 + Inter-integrated circuit + I2C + 0x40005C00 + + 0x0 + 0x400 + registers + + + I2C3_EV + I2C3 event interrupt + 72 + + + I2C3_ER + I2C3 error interrupt + 73 + + + + CR1 + CR1 + Control register 1 + 0x0 + 0x20 + read-write + 0x0000 + + + SWRST + Software reset + 15 + 1 + + + ALERT + SMBus alert + 13 + 1 + + + PEC + Packet error checking + 12 + 1 + + + POS + Acknowledge/PEC Position (for data + reception) + 11 + 1 + + + ACK + Acknowledge enable + 10 + 1 + + + STOP + Stop generation + 9 + 1 + + + START + Start generation + 8 + 1 + + + NOSTRETCH + Clock stretching disable (Slave + mode) + 7 + 1 + + + ENGC + General call enable + 6 + 1 + + + ENPEC + PEC enable + 5 + 1 + + + ENARP + ARP enable + 4 + 1 + + + SMBTYPE + SMBus type + 3 + 1 + + + SMBUS + SMBus mode + 1 + 1 + + + PE + Peripheral enable + 0 + 1 + + + + + CR2 + CR2 + Control register 2 + 0x4 + 0x20 + read-write + 0x0000 + + + LAST + DMA last transfer + 12 + 1 + + + DMAEN + DMA requests enable + 11 + 1 + + + ITBUFEN + Buffer interrupt enable + 10 + 1 + + + ITEVTEN + Event interrupt enable + 9 + 1 + + + ITERREN + Error interrupt enable + 8 + 1 + + + FREQ + Peripheral clock frequency + 0 + 6 + + + + + OAR1 + OAR1 + Own address register 1 + 0x8 + 0x20 + read-write + 0x0000 + + + ADDMODE + Addressing mode (slave + mode) + 15 + 1 + + + ADD10 + Interface address + 8 + 2 + + + ADD7 + Interface address + 1 + 7 + + + ADD0 + Interface address + 0 + 1 + + + + + OAR2 + OAR2 + Own address register 2 + 0xC + 0x20 + read-write + 0x0000 + + + ADD2 + Interface address + 1 + 7 + + + ENDUAL + Dual addressing mode + enable + 0 + 1 + + + + + DR + DR + Data register + 0x10 + 0x20 + read-write + 0x0000 + + + DR + 8-bit data register + 0 + 8 + + + + + SR1 + SR1 + Status register 1 + 0x14 + 0x20 + 0x0000 + + + SMBALERT + SMBus alert + 15 + 1 + read-write + + + TIMEOUT + Timeout or Tlow error + 14 + 1 + read-write + + + PECERR + PEC Error in reception + 12 + 1 + read-write + + + OVR + Overrun/Underrun + 11 + 1 + read-write + + + AF + Acknowledge failure + 10 + 1 + read-write + + + ARLO + Arbitration lost (master + mode) + 9 + 1 + read-write + + + BERR + Bus error + 8 + 1 + read-write + + + TxE + Data register empty + (transmitters) + 7 + 1 + read-only + + + RxNE + Data register not empty + (receivers) + 6 + 1 + read-only + + + STOPF + Stop detection (slave + mode) + 4 + 1 + read-only + + + ADD10 + 10-bit header sent (Master + mode) + 3 + 1 + read-only + + + BTF + Byte transfer finished + 2 + 1 + read-only + + + ADDR + Address sent (master mode)/matched + (slave mode) + 1 + 1 + read-only + + + SB + Start bit (Master mode) + 0 + 1 + read-only + + + + + SR2 + SR2 + Status register 2 + 0x18 + 0x20 + read-only + 0x0000 + + + PEC + acket error checking + register + 8 + 8 + + + DUALF + Dual flag (Slave mode) + 7 + 1 + + + SMBHOST + SMBus host header (Slave + mode) + 6 + 1 + + + SMBDEFAULT + SMBus device default address (Slave + mode) + 5 + 1 + + + GENCALL + General call address (Slave + mode) + 4 + 1 + + + TRA + Transmitter/receiver + 2 + 1 + + + BUSY + Bus busy + 1 + 1 + + + MSL + Master/slave + 0 + 1 + + + + + CCR + CCR + Clock control register + 0x1C + 0x20 + read-write + 0x0000 + + + F_S + I2C master mode selection + 15 + 1 + + + DUTY + Fast mode duty cycle + 14 + 1 + + + CCR + Clock control register in Fast/Standard + mode (Master mode) + 0 + 12 + + + + + TRISE + TRISE + TRISE register + 0x20 + 0x20 + read-write + 0x0002 + + + TRISE + Maximum rise time in Fast/Standard mode + (Master mode) + 0 + 6 + + + + + FLTR + FLTR + I2C FLTR register + 0x24 + 0x20 + read-write + 0x0000 + + + DNF + Digital noise filter + 0 + 4 + + + ANOFF + Analog noise filter OFF + 4 + 1 + + + + + + + I2C2 + 0x40005800 + + I2C2_EV + I2C2 event interrupt + 33 + + + I2C2_ER + I2C2 error interrupt + 34 + + + + I2C1 + 0x40005400 + + I2C1_EV + I2C1 event interrupt + 31 + + + I2C1_ER + I2C1 error interrupt + 32 + + + + IWDG + Independent watchdog + IWDG + 0x40003000 + + 0x0 + 0x400 + registers + + + + KR + KR + Key register + 0x0 + 0x20 + write-only + 0x00000000 + + + KEY + Key value (write only, read + 0000h) + 0 + 16 + + + + + PR + PR + Prescaler register + 0x4 + 0x20 + read-write + 0x00000000 + + + PR + Prescaler divider + 0 + 3 + + + + + RLR + RLR + Reload register + 0x8 + 0x20 + read-write + 0x00000FFF + + + RL + Watchdog counter reload + value + 0 + 12 + + + + + SR + SR + Status register + 0xC + 0x20 + read-only + 0x00000000 + + + RVU + Watchdog counter reload value + update + 1 + 1 + + + PVU + Watchdog prescaler value + update + 0 + 1 + + + + + + + WWDG + Window watchdog + WWDG + 0x40002C00 + + 0x0 + 0x400 + registers + + + WWDG + Window Watchdog interrupt + 0 + + + + CR + CR + Control register + 0x0 + 0x20 + read-write + 0x7F + + + WDGA + Activation bit + 7 + 1 + + + T + 7-bit counter (MSB to LSB) + 0 + 7 + + + + + CFR + CFR + Configuration register + 0x4 + 0x20 + read-write + 0x7F + + + EWI + Early wakeup interrupt + 9 + 1 + + + WDGTB1 + Timer base + 8 + 1 + + + WDGTB0 + Timer base + 7 + 1 + + + W + 7-bit window value + 0 + 7 + + + + + SR + SR + Status register + 0x8 + 0x20 + read-write + 0x00 + + + EWIF + Early wakeup interrupt + flag + 0 + 1 + + + + + + + RTC + Real-time clock + RTC + 0x40002800 + + 0x0 + 0x400 + registers + + + RTC_WKUP + RTC Wakeup interrupt through the EXTI + line + 3 + + + RTC_Alarm + RTC Alarms (A and B) through EXTI line + interrupt + 41 + + + + TR + TR + time register + 0x0 + 0x20 + read-write + 0x00000000 + + + PM + AM/PM notation + 22 + 1 + + + HT + Hour tens in BCD format + 20 + 2 + + + HU + Hour units in BCD format + 16 + 4 + + + MNT + Minute tens in BCD format + 12 + 3 + + + MNU + Minute units in BCD format + 8 + 4 + + + ST + Second tens in BCD format + 4 + 3 + + + SU + Second units in BCD format + 0 + 4 + + + + + DR + DR + date register + 0x4 + 0x20 + read-write + 0x00002101 + + + YT + Year tens in BCD format + 20 + 4 + + + YU + Year units in BCD format + 16 + 4 + + + WDU + Week day units + 13 + 3 + + + MT + Month tens in BCD format + 12 + 1 + + + MU + Month units in BCD format + 8 + 4 + + + DT + Date tens in BCD format + 4 + 2 + + + DU + Date units in BCD format + 0 + 4 + + + + + CR + CR + control register + 0x8 + 0x20 + read-write + 0x00000000 + + + COE + Calibration output enable + 23 + 1 + + + OSEL + Output selection + 21 + 2 + + + POL + Output polarity + 20 + 1 + + + BKP + Backup + 18 + 1 + + + SUB1H + Subtract 1 hour (winter time + change) + 17 + 1 + + + ADD1H + Add 1 hour (summer time + change) + 16 + 1 + + + TSIE + Time-stamp interrupt + enable + 15 + 1 + + + WUTIE + Wakeup timer interrupt + enable + 14 + 1 + + + ALRBIE + Alarm B interrupt enable + 13 + 1 + + + ALRAIE + Alarm A interrupt enable + 12 + 1 + + + TSE + Time stamp enable + 11 + 1 + + + WUTE + Wakeup timer enable + 10 + 1 + + + ALRBE + Alarm B enable + 9 + 1 + + + ALRAE + Alarm A enable + 8 + 1 + + + DCE + Coarse digital calibration + enable + 7 + 1 + + + FMT + Hour format + 6 + 1 + + + REFCKON + Reference clock detection enable (50 or + 60 Hz) + 4 + 1 + + + TSEDGE + Time-stamp event active + edge + 3 + 1 + + + WCKSEL + Wakeup clock selection + 0 + 3 + + + + + ISR + ISR + initialization and status + register + 0xC + 0x20 + 0x00000007 + + + ALRAWF + Alarm A write flag + 0 + 1 + read-only + + + ALRBWF + Alarm B write flag + 1 + 1 + read-only + + + WUTWF + Wakeup timer write flag + 2 + 1 + read-only + + + SHPF + Shift operation pending + 3 + 1 + read-write + + + INITS + Initialization status flag + 4 + 1 + read-only + + + RSF + Registers synchronization + flag + 5 + 1 + read-write + + + INITF + Initialization flag + 6 + 1 + read-only + + + INIT + Initialization mode + 7 + 1 + read-write + + + ALRAF + Alarm A flag + 8 + 1 + read-write + + + ALRBF + Alarm B flag + 9 + 1 + read-write + + + WUTF + Wakeup timer flag + 10 + 1 + read-write + + + TSF + Time-stamp flag + 11 + 1 + read-write + + + TSOVF + Time-stamp overflow flag + 12 + 1 + read-write + + + TAMP1F + Tamper detection flag + 13 + 1 + read-write + + + TAMP2F + TAMPER2 detection flag + 14 + 1 + read-write + + + RECALPF + Recalibration pending Flag + 16 + 1 + read-only + + + + + PRER + PRER + prescaler register + 0x10 + 0x20 + read-write + 0x007F00FF + + + PREDIV_A + Asynchronous prescaler + factor + 16 + 7 + + + PREDIV_S + Synchronous prescaler + factor + 0 + 15 + + + + + WUTR + WUTR + wakeup timer register + 0x14 + 0x20 + read-write + 0x0000FFFF + + + WUT + Wakeup auto-reload value + bits + 0 + 16 + + + + + CALIBR + CALIBR + calibration register + 0x18 + 0x20 + read-write + 0x00000000 + + + DCS + Digital calibration sign + 7 + 1 + + + DC + Digital calibration + 0 + 5 + + + + + ALRMAR + ALRMAR + alarm A register + 0x1C + 0x20 + read-write + 0x00000000 + + + MSK4 + Alarm A date mask + 31 + 1 + + + WDSEL + Week day selection + 30 + 1 + + + DT + Date tens in BCD format + 28 + 2 + + + DU + Date units or day in BCD + format + 24 + 4 + + + MSK3 + Alarm A hours mask + 23 + 1 + + + PM + AM/PM notation + 22 + 1 + + + HT + Hour tens in BCD format + 20 + 2 + + + HU + Hour units in BCD format + 16 + 4 + + + MSK2 + Alarm A minutes mask + 15 + 1 + + + MNT + Minute tens in BCD format + 12 + 3 + + + MNU + Minute units in BCD format + 8 + 4 + + + MSK1 + Alarm A seconds mask + 7 + 1 + + + ST + Second tens in BCD format + 4 + 3 + + + SU + Second units in BCD format + 0 + 4 + + + + + ALRMBR + ALRMBR + alarm B register + 0x20 + 0x20 + read-write + 0x00000000 + + + MSK4 + Alarm B date mask + 31 + 1 + + + WDSEL + Week day selection + 30 + 1 + + + DT + Date tens in BCD format + 28 + 2 + + + DU + Date units or day in BCD + format + 24 + 4 + + + MSK3 + Alarm B hours mask + 23 + 1 + + + PM + AM/PM notation + 22 + 1 + + + HT + Hour tens in BCD format + 20 + 2 + + + HU + Hour units in BCD format + 16 + 4 + + + MSK2 + Alarm B minutes mask + 15 + 1 + + + MNT + Minute tens in BCD format + 12 + 3 + + + MNU + Minute units in BCD format + 8 + 4 + + + MSK1 + Alarm B seconds mask + 7 + 1 + + + ST + Second tens in BCD format + 4 + 3 + + + SU + Second units in BCD format + 0 + 4 + + + + + WPR + WPR + write protection register + 0x24 + 0x20 + write-only + 0x00000000 + + + KEY + Write protection key + 0 + 8 + + + + + SSR + SSR + sub second register + 0x28 + 0x20 + read-only + 0x00000000 + + + SS + Sub second value + 0 + 16 + + + + + SHIFTR + SHIFTR + shift control register + 0x2C + 0x20 + write-only + 0x00000000 + + + ADD1S + Add one second + 31 + 1 + + + SUBFS + Subtract a fraction of a + second + 0 + 15 + + + + + TSTR + TSTR + time stamp time register + 0x30 + 0x20 + read-only + 0x00000000 + + + ALARMOUTTYPE + AFO_ALARM output type + 18 + 1 + + + TSINSEL + TIMESTAMP mapping + 17 + 1 + + + TAMP1INSEL + TAMPER1 mapping + 16 + 1 + + + TAMPIE + Tamper interrupt enable + 2 + 1 + + + TAMP1TRG + Active level for tamper 1 + 1 + 1 + + + TAMP1E + Tamper 1 detection enable + 0 + 1 + + + + + TSDR + TSDR + time stamp date register + 0x34 + 0x20 + read-only + 0x00000000 + + + WDU + Week day units + 13 + 3 + + + MT + Month tens in BCD format + 12 + 1 + + + MU + Month units in BCD format + 8 + 4 + + + DT + Date tens in BCD format + 4 + 2 + + + DU + Date units in BCD format + 0 + 4 + + + + + TSSSR + TSSSR + timestamp sub second register + 0x38 + 0x20 + read-only + 0x00000000 + + + SS + Sub second value + 0 + 16 + + + + + CALR + CALR + calibration register + 0x3C + 0x20 + read-write + 0x00000000 + + + CALP + Increase frequency of RTC by 488.5 + ppm + 15 + 1 + + + CALW8 + Use an 8-second calibration cycle + period + 14 + 1 + + + CALW16 + Use a 16-second calibration cycle + period + 13 + 1 + + + CALM + Calibration minus + 0 + 9 + + + + + TAFCR + TAFCR + tamper and alternate function configuration + register + 0x40 + 0x20 + read-write + 0x00000000 + + + ALARMOUTTYPE + AFO_ALARM output type + 18 + 1 + + + TSINSEL + TIMESTAMP mapping + 17 + 1 + + + TAMP1INSEL + TAMPER1 mapping + 16 + 1 + + + TAMPPUDIS + TAMPER pull-up disable + 15 + 1 + + + TAMPPRCH + Tamper precharge duration + 13 + 2 + + + TAMPFLT + Tamper filter count + 11 + 2 + + + TAMPFREQ + Tamper sampling frequency + 8 + 3 + + + TAMPTS + Activate timestamp on tamper detection + event + 7 + 1 + + + TAMP2TRG + Active level for tamper 2 + 4 + 1 + + + TAMP2E + Tamper 2 detection enable + 3 + 1 + + + TAMPIE + Tamper interrupt enable + 2 + 1 + + + TAMP1TRG + Active level for tamper 1 + 1 + 1 + + + TAMP1E + Tamper 1 detection enable + 0 + 1 + + + + + ALRMASSR + ALRMASSR + alarm A sub second register + 0x44 + 0x20 + read-write + 0x00000000 + + + MASKSS + Mask the most-significant bits starting + at this bit + 24 + 4 + + + SS + Sub seconds value + 0 + 15 + + + + + ALRMBSSR + ALRMBSSR + alarm B sub second register + 0x48 + 0x20 + read-write + 0x00000000 + + + MASKSS + Mask the most-significant bits starting + at this bit + 24 + 4 + + + SS + Sub seconds value + 0 + 15 + + + + + BKP0R + BKP0R + backup register + 0x50 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP1R + BKP1R + backup register + 0x54 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP2R + BKP2R + backup register + 0x58 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP3R + BKP3R + backup register + 0x5C + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP4R + BKP4R + backup register + 0x60 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP5R + BKP5R + backup register + 0x64 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP6R + BKP6R + backup register + 0x68 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP7R + BKP7R + backup register + 0x6C + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP8R + BKP8R + backup register + 0x70 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP9R + BKP9R + backup register + 0x74 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP10R + BKP10R + backup register + 0x78 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP11R + BKP11R + backup register + 0x7C + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP12R + BKP12R + backup register + 0x80 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP13R + BKP13R + backup register + 0x84 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP14R + BKP14R + backup register + 0x88 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP15R + BKP15R + backup register + 0x8C + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP16R + BKP16R + backup register + 0x90 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP17R + BKP17R + backup register + 0x94 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP18R + BKP18R + backup register + 0x98 + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + BKP19R + BKP19R + backup register + 0x9C + 0x20 + read-write + 0x00000000 + + + BKP + BKP + 0 + 32 + + + + + + + UART4 + Universal synchronous asynchronous receiver + transmitter + USART + 0x40004C00 + + 0x0 + 0x400 + registers + + + UART4 + UART4 global interrupt + 52 + + + + SR + SR + Status register + 0x0 + 0x20 + 0x00C00000 + + + LBD + LIN break detection flag + 8 + 1 + read-write + + + TXE + Transmit data register + empty + 7 + 1 + read-only + + + TC + Transmission complete + 6 + 1 + read-write + + + RXNE + Read data register not + empty + 5 + 1 + read-write + + + IDLE + IDLE line detected + 4 + 1 + read-only + + + ORE + Overrun error + 3 + 1 + read-only + + + NF + Noise detected flag + 2 + 1 + read-only + + + FE + Framing error + 1 + 1 + read-only + + + PE + Parity error + 0 + 1 + read-only + + + + + DR + DR + Data register + 0x4 + 0x20 + read-write + 0x00000000 + + + DR + Data value + 0 + 9 + + + + + BRR + BRR + Baud rate register + 0x8 + 0x20 + read-write + 0x0000 + + + DIV_Mantissa + mantissa of USARTDIV + 4 + 12 + + + DIV_Fraction + fraction of USARTDIV + 0 + 4 + + + + + CR1 + CR1 + Control register 1 + 0xC + 0x20 + read-write + 0x0000 + + + OVER8 + Oversampling mode + 15 + 1 + + + UE + USART enable + 13 + 1 + + + M + Word length + 12 + 1 + + + WAKE + Wakeup method + 11 + 1 + + + PCE + Parity control enable + 10 + 1 + + + PS + Parity selection + 9 + 1 + + + PEIE + PE interrupt enable + 8 + 1 + + + TXEIE + TXE interrupt enable + 7 + 1 + + + TCIE + Transmission complete interrupt + enable + 6 + 1 + + + RXNEIE + RXNE interrupt enable + 5 + 1 + + + IDLEIE + IDLE interrupt enable + 4 + 1 + + + TE + Transmitter enable + 3 + 1 + + + RE + Receiver enable + 2 + 1 + + + RWU + Receiver wakeup + 1 + 1 + + + SBK + Send break + 0 + 1 + + + + + CR2 + CR2 + Control register 2 + 0x10 + 0x20 + read-write + 0x0000 + + + LINEN + LIN mode enable + 14 + 1 + + + STOP + STOP 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read-write + 0x00000000 + + + RFCES + no description available + 5 + 1 + + + RFAES + no description available + 6 + 1 + + + RGUFS + no description available + 17 + 1 + + + + + MMCTIR + MMCTIR + Ethernet MMC transmit interrupt + register + 0x8 + 0x20 + read-only + 0x00000000 + + + TGFSCS + no description available + 14 + 1 + + + TGFMSCS + no description available + 15 + 1 + + + TGFS + no description available + 21 + 1 + + + + + MMCRIMR + MMCRIMR + Ethernet MMC receive interrupt mask + register + 0xC + 0x20 + read-write + 0x00000000 + + + RFCEM + no description available + 5 + 1 + + + RFAEM + no description available + 6 + 1 + + + RGUFM + no description available + 17 + 1 + + + + + MMCTIMR + MMCTIMR + Ethernet MMC transmit interrupt mask + register + 0x10 + 0x20 + read-write + 0x00000000 + + + TGFSCM + no description available + 14 + 1 + + + TGFMSCM + no description available + 15 + 1 + + + TGFM + no description available + 16 + 1 + + + + + MMCTGFSCCR + MMCTGFSCCR + Ethernet MMC transmitted good frames after a + single collision counter + 0x4C + 0x20 + read-only + 0x00000000 + + + TGFSCC + no description available + 0 + 32 + + + + + MMCTGFMSCCR + MMCTGFMSCCR + Ethernet MMC transmitted good frames after + more than a single collision + 0x50 + 0x20 + read-only + 0x00000000 + + + TGFMSCC + no description available + 0 + 32 + + + + + MMCTGFCR + MMCTGFCR + Ethernet MMC transmitted good frames counter + register + 0x68 + 0x20 + read-only + 0x00000000 + + + TGFC + HTL + 0 + 32 + + + + + MMCRFCECR + MMCRFCECR + Ethernet MMC received frames with CRC error + counter register + 0x94 + 0x20 + read-only + 0x00000000 + + + RFCFC + no description available + 0 + 32 + + + + + MMCRFAECR + MMCRFAECR + Ethernet MMC received frames with alignment + error counter register + 0x98 + 0x20 + read-only + 0x00000000 + + + RFAEC + no description available + 0 + 32 + + + + + MMCRGUFCR + MMCRGUFCR + MMC received good unicast frames counter + register + 0xC4 + 0x20 + read-only + 0x00000000 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available + 8 + 1 + + + TSSSR + no description available + 9 + 1 + + + + + PTPSSIR + PTPSSIR + Ethernet PTP subsecond increment + register + 0x4 + 0x20 + read-write + 0x00000000 + + + STSSI + no description available + 0 + 8 + + + + + PTPTSHR + PTPTSHR + Ethernet PTP time stamp high + register + 0x8 + 0x20 + read-only + 0x00000000 + + + STS + no description available + 0 + 32 + + + + + PTPTSLR + PTPTSLR + Ethernet PTP time stamp low + register + 0xC + 0x20 + read-only + 0x00000000 + + + STSS + no description available + 0 + 31 + + + STPNS + no description available + 31 + 1 + + + + + PTPTSHUR + PTPTSHUR + Ethernet PTP time stamp high update + register + 0x10 + 0x20 + read-write + 0x00000000 + + + TSUS + no description available + 0 + 32 + + + + + PTPTSLUR + PTPTSLUR + Ethernet PTP time stamp low update + register + 0x14 + 0x20 + read-write + 0x00000000 + + + TSUSS + no description available + 0 + 31 + + + TSUPNS + no description available + 31 + 1 + + + + + PTPTSAR + PTPTSAR + Ethernet PTP time stamp addend + register + 0x18 + 0x20 + read-write + 0x00000000 + + + TSA + no description available + 0 + 32 + + + + + PTPTTHR + PTPTTHR + Ethernet PTP target time high + register + 0x1C + 0x20 + read-write + 0x00000000 + + + TTSH + 0 + 0 + 32 + + + + + PTPTTLR + PTPTTLR + Ethernet PTP target time low + register + 0x20 + 0x20 + read-write + 0x00000000 + + + TTSL + no description available + 0 + 32 + + + + + PTPTSSR + PTPTSSR + Ethernet PTP time stamp status + register + 0x28 + 0x20 + read-only + 0x00000000 + + + TSSO + no description available + 0 + 1 + + + TSTTR + no description available + 1 + 1 + + + + + PTPPPSCR + PTPPPSCR + Ethernet PTP PPS control + register + 0x2C + 0x20 + read-only + 0x00000000 + + + TSSO + TSSO + 0 + 1 + + + TSTTR + TSTTR + 1 + 1 + + + + + + + Ethernet_DMA + Ethernet: DMA controller operation + Ethernet + 0x40029000 + + 0x0 + 0x400 + registers + + + + DMABMR + DMABMR + Ethernet DMA bus mode register + 0x0 + 0x20 + read-write + 0x00002101 + + + SR + no description available + 0 + 1 + + + DA + no description available + 1 + 1 + + + DSL + no description available + 2 + 5 + + + EDFE + no description available + 7 + 1 + + + PBL + no description available + 8 + 6 + + + RTPR + no description available + 14 + 2 + + + FB + no description available + 16 + 1 + + + RDP + no description available + 17 + 6 + + + USP + no description available + 23 + 1 + + + FPM + no description available + 24 + 1 + + + AAB + no description available + 25 + 1 + + + MB + no description available + 26 + 1 + + + + + DMATPDR + DMATPDR + Ethernet DMA transmit poll demand + register + 0x4 + 0x20 + read-write + 0x00000000 + + + TPD + no description available + 0 + 32 + + + + + DMARPDR + DMARPDR + EHERNET DMA receive poll demand + register + 0x8 + 0x20 + read-write + 0x00000000 + + + RPD + RPD + 0 + 32 + + + + + DMARDLAR + DMARDLAR + Ethernet DMA receive descriptor list address + register + 0xC + 0x20 + read-write + 0x00000000 + + + SRL + no description available + 0 + 32 + + + + + DMATDLAR + DMATDLAR + Ethernet DMA transmit descriptor list + address register + 0x10 + 0x20 + read-write + 0x00000000 + + + STL + no description available + 0 + 32 + + + + + DMASR + DMASR + Ethernet DMA status register + 0x14 + 0x20 + 0x00000000 + + + TS + no description available + 0 + 1 + read-write + + + TPSS + no description available + 1 + 1 + read-write + + + TBUS + no description available + 2 + 1 + read-write + + + TJTS + no description available + 3 + 1 + read-write + + + ROS + no description available + 4 + 1 + read-write + + + TUS + no description available + 5 + 1 + read-write + + + RS + no description available + 6 + 1 + read-write + + + RBUS + no description available + 7 + 1 + read-write + + + RPSS + no description available + 8 + 1 + read-write + + + PWTS + no description available + 9 + 1 + read-write + + + ETS + no description available + 10 + 1 + read-write + + + FBES + no description available + 13 + 1 + read-write + + + ERS + no description available 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+ no description available + 28 + 1 + + + + + DMARSWTR + DMARSWTR + Ethernet DMA receive status watchdog timer + register + 0x24 + 0x20 + read-write + 0x00000000 + + + RSWTC + RSWTC + 0 + 8 + + + + + DMACHTDR + DMACHTDR + Ethernet DMA current host transmit + descriptor register + 0x48 + 0x20 + read-only + 0x00000000 + + + HTDAP + HTDAP + 0 + 32 + + + + + DMACHRDR + DMACHRDR + Ethernet DMA current host receive descriptor + register + 0x4C + 0x20 + read-only + 0x00000000 + + + HRDAP + HRDAP + 0 + 32 + + + + + DMACHTBAR + DMACHTBAR + Ethernet DMA current host transmit buffer + address register + 0x50 + 0x20 + read-only + 0x00000000 + + + HTBAP + no description available + 0 + 32 + + + + + DMACHRBAR + DMACHRBAR + Ethernet DMA current host receive buffer + address register + 0x54 + 0x20 + read-only + 0x00000000 + + + HRBAP + no description available + 0 + 32 + + + + + + + CRC + Cryptographic processor + CRC + 0x40023000 + + 0x0 + 0x400 + registers + + + + DR + DR + Data register + 0x0 + 0x20 + read-write + 0xFFFFFFFF + + + DR + Data Register + 0 + 32 + + + + + IDR + IDR + Independent Data register + 0x4 + 0x20 + read-write + 0x00000000 + + + IDR + Independent Data register + 0 + 8 + + + + + CR + CR + Control register + 0x8 + 0x20 + write-only + 0x00000000 + + + CR + Control regidter + 0 + 1 + + + + + + + OTG_FS_GLOBAL + USB on the go full speed + USB_OTG_FS + 0x50000000 + + 0x0 + 0x400 + registers + + + OTG_FS_WKUP + USB On-The-Go FS Wakeup through EXTI line + interrupt + 42 + + + OTG_FS + USB On The Go FS global + interrupt + 67 + + + + FS_GOTGCTL + FS_GOTGCTL + OTG_FS control and status register + (OTG_FS_GOTGCTL) + 0x0 + 0x20 + 0x00000800 + + + SRQSCS + Session request success + 0 + 1 + read-only + + + SRQ + Session request + 1 + 1 + read-write + + + HNGSCS + Host negotiation success + 8 + 1 + read-only + + + HNPRQ + HNP request + 9 + 1 + read-write + + + HSHNPEN + Host set HNP enable + 10 + 1 + read-write + + + DHNPEN + Device HNP enabled + 11 + 1 + read-write + + + CIDSTS + Connector ID status + 16 + 1 + read-only + + + DBCT + Long/short debounce time + 17 + 1 + read-only + + + ASVLD + A-session valid + 18 + 1 + read-only + + + BSVLD + B-session valid + 19 + 1 + read-only + + + + + FS_GOTGINT + FS_GOTGINT + OTG_FS interrupt register + (OTG_FS_GOTGINT) + 0x4 + 0x20 + read-write + 0x00000000 + + + SEDET + Session end detected + 2 + 1 + + + SRSSCHG + Session request success status + change + 8 + 1 + + + HNSSCHG + Host negotiation success status + change + 9 + 1 + + + HNGDET + Host negotiation detected + 17 + 1 + + + ADTOCHG + A-device timeout change + 18 + 1 + + + DBCDNE + Debounce done + 19 + 1 + + + + + FS_GAHBCFG + FS_GAHBCFG + OTG_FS AHB configuration register + (OTG_FS_GAHBCFG) + 0x8 + 0x20 + read-write + 0x00000000 + + + GINT + Global interrupt mask + 0 + 1 + + + TXFELVL + TxFIFO empty level + 7 + 1 + + + PTXFELVL + Periodic TxFIFO empty + level + 8 + 1 + + + + + FS_GUSBCFG + FS_GUSBCFG + OTG_FS USB configuration register + (OTG_FS_GUSBCFG) + 0xC + 0x20 + 0x00000A00 + + + TOCAL + FS timeout calibration + 0 + 3 + read-write + + + PHYSEL + Full Speed serial transceiver + select + 6 + 1 + write-only + + + SRPCAP + SRP-capable + 8 + 1 + read-write + + + HNPCAP + HNP-capable + 9 + 1 + read-write + + + TRDT + USB turnaround time + 10 + 4 + read-write + + + FHMOD + Force host mode + 29 + 1 + read-write + + + FDMOD + Force device mode + 30 + 1 + read-write + + + CTXPKT + Corrupt Tx packet + 31 + 1 + read-write + + + + + FS_GRSTCTL + FS_GRSTCTL + OTG_FS reset register + (OTG_FS_GRSTCTL) + 0x10 + 0x20 + 0x20000000 + + + CSRST + Core soft reset + 0 + 1 + read-write + + + HSRST + HCLK soft reset + 1 + 1 + read-write + + + FCRST + Host frame counter reset + 2 + 1 + read-write + + + RXFFLSH + RxFIFO flush + 4 + 1 + read-write + + + TXFFLSH + TxFIFO flush + 5 + 1 + read-write + + + TXFNUM + TxFIFO number + 6 + 5 + read-write + + + AHBIDL + AHB master idle + 31 + 1 + read-only + + + + + FS_GINTSTS + FS_GINTSTS + OTG_FS core interrupt register + (OTG_FS_GINTSTS) + 0x14 + 0x20 + 0x04000020 + + + CMOD + Current mode of operation + 0 + 1 + read-only + + + MMIS + Mode mismatch interrupt + 1 + 1 + read-write + + + OTGINT + OTG interrupt + 2 + 1 + read-only + + + SOF + Start of frame + 3 + 1 + read-write + + + RXFLVL + RxFIFO non-empty + 4 + 1 + read-only + + + NPTXFE + Non-periodic TxFIFO empty + 5 + 1 + read-only + + + GINAKEFF + Global IN non-periodic NAK + effective + 6 + 1 + read-only + + + GOUTNAKEFF + Global OUT NAK effective + 7 + 1 + read-only + + + ESUSP + Early suspend + 10 + 1 + read-write + + + USBSUSP + USB suspend + 11 + 1 + read-write + + + USBRST + USB reset + 12 + 1 + read-write + + + ENUMDNE + Enumeration done + 13 + 1 + read-write + + + ISOODRP + Isochronous OUT packet dropped + interrupt + 14 + 1 + read-write + + + EOPF + End of periodic frame + interrupt + 15 + 1 + read-write + + + IEPINT + IN endpoint interrupt + 18 + 1 + read-only + + + OEPINT + OUT endpoint interrupt + 19 + 1 + read-only + + + IISOIXFR + Incomplete isochronous IN + transfer + 20 + 1 + read-write + + + IPXFR_INCOMPISOOUT + Incomplete periodic transfer(Host + mode)/Incomplete isochronous OUT transfer(Device + mode) + 21 + 1 + read-write + + + HPRTINT + Host port interrupt + 24 + 1 + read-only + + + HCINT + Host channels interrupt + 25 + 1 + read-only + + + PTXFE + Periodic TxFIFO empty + 26 + 1 + read-only + + + CIDSCHG + Connector ID status change + 28 + 1 + read-write + + + DISCINT + Disconnect detected + interrupt + 29 + 1 + read-write + + + SRQINT + Session request/new session detected + interrupt + 30 + 1 + read-write + + + WKUPINT + Resume/remote wakeup detected + interrupt + 31 + 1 + read-write + + + + + FS_GINTMSK + FS_GINTMSK + OTG_FS interrupt mask register + (OTG_FS_GINTMSK) + 0x18 + 0x20 + 0x00000000 + + + MMISM + Mode mismatch interrupt + mask + 1 + 1 + read-write + + + OTGINT + OTG interrupt mask + 2 + 1 + read-write + + + SOFM + Start of frame mask + 3 + 1 + read-write + + + RXFLVLM + Receive FIFO non-empty + mask + 4 + 1 + read-write + + + NPTXFEM + Non-periodic TxFIFO empty + mask + 5 + 1 + read-write + + + GINAKEFFM + Global non-periodic IN NAK effective + mask + 6 + 1 + read-write + + + GONAKEFFM + Global OUT NAK effective + mask + 7 + 1 + read-write + + + ESUSPM + Early suspend mask + 10 + 1 + read-write + + + USBSUSPM + USB suspend mask + 11 + 1 + read-write + + + USBRST + USB reset mask + 12 + 1 + read-write + + + ENUMDNEM + Enumeration done mask + 13 + 1 + read-write + + + ISOODRPM + Isochronous OUT packet dropped interrupt + mask + 14 + 1 + read-write + + + EOPFM + End of periodic frame interrupt + mask + 15 + 1 + read-write + + + EPMISM + Endpoint mismatch interrupt + mask + 17 + 1 + read-write + + + IEPINT + IN endpoints interrupt + mask + 18 + 1 + read-write + + + OEPINT + OUT endpoints interrupt + mask + 19 + 1 + read-write + + + IISOIXFRM + Incomplete isochronous IN transfer + mask + 20 + 1 + read-write + + + IPXFRM_IISOOXFRM + Incomplete periodic transfer mask(Host + mode)/Incomplete isochronous OUT transfer mask(Device + mode) + 21 + 1 + read-write + + + PRTIM + Host port interrupt mask + 24 + 1 + read-only + + + HCIM + Host channels interrupt + mask + 25 + 1 + read-write + + + PTXFEM + Periodic TxFIFO empty mask + 26 + 1 + read-write + + + CIDSCHGM + Connector ID status change + mask + 28 + 1 + read-write + + + DISCINT + Disconnect detected interrupt + mask + 29 + 1 + read-write + + + SRQIM + Session request/new session detected + interrupt mask + 30 + 1 + read-write + + + WUIM + Resume/remote wakeup detected interrupt + mask + 31 + 1 + read-write + + + + + FS_GRXSTSR_Device + FS_GRXSTSR_Device + OTG_FS Receive status debug read(Device + mode) + 0x1C + 0x20 + read-only + 0x00000000 + + + EPNUM + Endpoint number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + FRMNUM + Frame number + 21 + 4 + + + + + FS_GRXSTSR_Host + FS_GRXSTSR_Host + OTG_FS Receive status debug read(Host + mode) + FS_GRXSTSR_Device + 0x1C + 0x20 + read-only + 0x00000000 + + + EPNUM + Endpoint number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + FRMNUM + Frame number + 21 + 4 + + + + + FS_GRXFSIZ + FS_GRXFSIZ + OTG_FS Receive FIFO size register + (OTG_FS_GRXFSIZ) + 0x24 + 0x20 + read-write + 0x00000200 + + + RXFD + RxFIFO depth + 0 + 16 + + + + + FS_GNPTXFSIZ_Device + FS_GNPTXFSIZ_Device + OTG_FS non-periodic transmit FIFO size + register (Device mode) + 0x28 + 0x20 + read-write + 0x00000200 + + + TX0FSA + Endpoint 0 transmit RAM start + address + 0 + 16 + + + TX0FD + Endpoint 0 TxFIFO depth + 16 + 16 + + + + + FS_GNPTXFSIZ_Host + FS_GNPTXFSIZ_Host + OTG_FS non-periodic transmit FIFO size + register (Host mode) + FS_GNPTXFSIZ_Device + 0x28 + 0x20 + read-write + 0x00000200 + + + NPTXFSA + Non-periodic transmit RAM start + address + 0 + 16 + + + NPTXFD + Non-periodic TxFIFO depth + 16 + 16 + + + + + FS_GNPTXSTS + FS_GNPTXSTS + OTG_FS non-periodic transmit FIFO/queue + status register (OTG_FS_GNPTXSTS) + 0x2C + 0x20 + read-only + 0x00080200 + + + NPTXFSAV + Non-periodic TxFIFO space + available + 0 + 16 + + + NPTQXSAV + Non-periodic transmit request queue + space available + 16 + 8 + + + NPTXQTOP + Top of the non-periodic transmit request + queue + 24 + 7 + + + + + FS_GCCFG + FS_GCCFG + OTG_FS general core configuration register + (OTG_FS_GCCFG) + 0x38 + 0x20 + read-write + 0x00000000 + + + PWRDWN + Power down + 16 + 1 + + + VBUSASEN + Enable the VBUS sensing + device + 18 + 1 + + + VBUSBSEN + Enable the VBUS sensing + device + 19 + 1 + + + SOFOUTEN + SOF output enable + 20 + 1 + + + + + FS_CID + FS_CID + core ID register + 0x3C + 0x20 + read-write + 0x00001000 + + + PRODUCT_ID + Product ID field + 0 + 32 + + + + + FS_HPTXFSIZ + FS_HPTXFSIZ + OTG_FS Host periodic transmit FIFO size + register (OTG_FS_HPTXFSIZ) + 0x100 + 0x20 + read-write + 0x02000600 + + + PTXSA + Host periodic TxFIFO start + address + 0 + 16 + + + PTXFSIZ + Host periodic TxFIFO depth + 16 + 16 + + + + + FS_DIEPTXF1 + FS_DIEPTXF1 + OTG_FS device IN endpoint transmit FIFO size + register (OTG_FS_DIEPTXF2) + 0x104 + 0x20 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFO2 transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + FS_DIEPTXF2 + FS_DIEPTXF2 + OTG_FS device IN endpoint transmit FIFO size + register (OTG_FS_DIEPTXF3) + 0x108 + 0x20 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFO3 transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + FS_DIEPTXF3 + FS_DIEPTXF3 + OTG_FS device IN endpoint transmit FIFO size + register (OTG_FS_DIEPTXF4) + 0x10C + 0x20 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFO4 transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + + + OTG_FS_HOST + USB on the go full speed + USB_OTG_FS + 0x50000400 + + 0x0 + 0x400 + registers + + + + FS_HCFG + FS_HCFG + OTG_FS host configuration register + (OTG_FS_HCFG) + 0x0 + 0x20 + 0x00000000 + + + FSLSPCS + FS/LS PHY clock select + 0 + 2 + read-write + + + FSLSS + FS- and LS-only support + 2 + 1 + read-only + + + + + HFIR + HFIR + OTG_FS Host frame interval + register + 0x4 + 0x20 + read-write + 0x0000EA60 + + + FRIVL + Frame interval + 0 + 16 + + + + + FS_HFNUM + FS_HFNUM + OTG_FS host frame number/frame time + remaining register (OTG_FS_HFNUM) + 0x8 + 0x20 + read-only + 0x00003FFF + + + FRNUM + Frame number + 0 + 16 + + + FTREM + Frame time remaining + 16 + 16 + + + + + FS_HPTXSTS + FS_HPTXSTS + OTG_FS_Host periodic transmit FIFO/queue + status register (OTG_FS_HPTXSTS) + 0x10 + 0x20 + 0x00080100 + + + PTXFSAVL + Periodic transmit data FIFO space + available + 0 + 16 + read-write + + + PTXQSAV + Periodic transmit request queue space + available + 16 + 8 + read-only + + + PTXQTOP + Top of the periodic transmit request + queue + 24 + 8 + read-only + + + + + HAINT + HAINT + OTG_FS Host all channels interrupt + register + 0x14 + 0x20 + read-only + 0x00000000 + + + HAINT + Channel interrupts + 0 + 16 + + + + + HAINTMSK + HAINTMSK + OTG_FS host all channels interrupt mask + register + 0x18 + 0x20 + read-write + 0x00000000 + + + HAINTM + Channel interrupt mask + 0 + 16 + + + + + FS_HPRT + FS_HPRT + OTG_FS host port control and status register + (OTG_FS_HPRT) + 0x40 + 0x20 + 0x00000000 + + + PCSTS + Port connect status + 0 + 1 + read-only + + + PCDET + Port connect detected + 1 + 1 + read-write + + + PENA + Port enable + 2 + 1 + read-write + + + PENCHNG + Port enable/disable change + 3 + 1 + read-write + + + POCA + Port overcurrent active + 4 + 1 + read-only + + + POCCHNG + Port overcurrent change + 5 + 1 + read-write + + + PRES + Port resume + 6 + 1 + read-write + + + PSUSP + Port suspend + 7 + 1 + read-write + + + PRST + Port reset + 8 + 1 + read-write + + + PLSTS + Port line status + 10 + 2 + read-only + + + PPWR + Port power + 12 + 1 + read-write + + + PTCTL + Port test control + 13 + 4 + read-write + + + PSPD + Port speed + 17 + 2 + read-only + + + + + FS_HCCHAR0 + FS_HCCHAR0 + OTG_FS host channel-0 characteristics + register (OTG_FS_HCCHAR0) + 0x100 + 0x20 + read-write + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MCNT + Multicount + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + FS_HCCHAR1 + FS_HCCHAR1 + OTG_FS host channel-1 characteristics + register (OTG_FS_HCCHAR1) + 0x120 + 0x20 + read-write + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MCNT + Multicount + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + FS_HCCHAR2 + FS_HCCHAR2 + OTG_FS host channel-2 characteristics + register (OTG_FS_HCCHAR2) + 0x140 + 0x20 + read-write + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MCNT + Multicount + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + FS_HCCHAR3 + FS_HCCHAR3 + OTG_FS host channel-3 characteristics + register (OTG_FS_HCCHAR3) + 0x160 + 0x20 + read-write + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MCNT + Multicount + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + FS_HCCHAR4 + FS_HCCHAR4 + OTG_FS host channel-4 characteristics + register (OTG_FS_HCCHAR4) + 0x180 + 0x20 + read-write + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MCNT + Multicount + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + FS_HCCHAR5 + FS_HCCHAR5 + OTG_FS host channel-5 characteristics + register (OTG_FS_HCCHAR5) + 0x1A0 + 0x20 + read-write + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MCNT + Multicount + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + FS_HCCHAR6 + FS_HCCHAR6 + OTG_FS host channel-6 characteristics + register (OTG_FS_HCCHAR6) + 0x1C0 + 0x20 + read-write + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MCNT + Multicount + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + FS_HCCHAR7 + FS_HCCHAR7 + OTG_FS host channel-7 characteristics + register (OTG_FS_HCCHAR7) + 0x1E0 + 0x20 + read-write + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MCNT + Multicount + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + FS_HCINT0 + FS_HCINT0 + OTG_FS host channel-0 interrupt register + (OTG_FS_HCINT0) + 0x108 + 0x20 + read-write + 0x00000000 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + FS_HCINT1 + FS_HCINT1 + OTG_FS host channel-1 interrupt register + (OTG_FS_HCINT1) + 0x128 + 0x20 + read-write + 0x00000000 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + FS_HCINT2 + FS_HCINT2 + OTG_FS host channel-2 interrupt register + (OTG_FS_HCINT2) + 0x148 + 0x20 + read-write + 0x00000000 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + FS_HCINT3 + FS_HCINT3 + OTG_FS host channel-3 interrupt register + (OTG_FS_HCINT3) + 0x168 + 0x20 + read-write + 0x00000000 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + FS_HCINT4 + FS_HCINT4 + OTG_FS host channel-4 interrupt register + (OTG_FS_HCINT4) + 0x188 + 0x20 + read-write + 0x00000000 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + FS_HCINT5 + FS_HCINT5 + OTG_FS host channel-5 interrupt register + (OTG_FS_HCINT5) + 0x1A8 + 0x20 + read-write + 0x00000000 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + FS_HCINT6 + FS_HCINT6 + OTG_FS host channel-6 interrupt register + (OTG_FS_HCINT6) + 0x1C8 + 0x20 + read-write + 0x00000000 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + FS_HCINT7 + FS_HCINT7 + OTG_FS host channel-7 interrupt register + (OTG_FS_HCINT7) + 0x1E8 + 0x20 + read-write + 0x00000000 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + FS_HCINTMSK0 + FS_HCINTMSK0 + OTG_FS host channel-0 mask register + (OTG_FS_HCINTMSK0) + 0x10C + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + FS_HCINTMSK1 + FS_HCINTMSK1 + OTG_FS host channel-1 mask register + (OTG_FS_HCINTMSK1) + 0x12C + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + FS_HCINTMSK2 + FS_HCINTMSK2 + OTG_FS host channel-2 mask register + (OTG_FS_HCINTMSK2) + 0x14C + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + FS_HCINTMSK3 + FS_HCINTMSK3 + OTG_FS host channel-3 mask register + (OTG_FS_HCINTMSK3) + 0x16C + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + FS_HCINTMSK4 + FS_HCINTMSK4 + OTG_FS host channel-4 mask register + (OTG_FS_HCINTMSK4) + 0x18C + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + FS_HCINTMSK5 + FS_HCINTMSK5 + OTG_FS host channel-5 mask register + (OTG_FS_HCINTMSK5) + 0x1AC + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + FS_HCINTMSK6 + FS_HCINTMSK6 + OTG_FS host channel-6 mask register + (OTG_FS_HCINTMSK6) + 0x1CC + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + FS_HCINTMSK7 + FS_HCINTMSK7 + OTG_FS host channel-7 mask register + (OTG_FS_HCINTMSK7) + 0x1EC + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + FS_HCTSIZ0 + FS_HCTSIZ0 + OTG_FS host channel-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + FS_HCTSIZ1 + FS_HCTSIZ1 + OTG_FS host channel-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + FS_HCTSIZ2 + FS_HCTSIZ2 + OTG_FS host channel-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + FS_HCTSIZ3 + FS_HCTSIZ3 + OTG_FS host channel-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + FS_HCTSIZ4 + FS_HCTSIZ4 + OTG_FS host channel-x transfer size + register + 0x190 + 0x20 + read-write + 0x00000000 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + FS_HCTSIZ5 + FS_HCTSIZ5 + OTG_FS host channel-5 transfer size + register + 0x1B0 + 0x20 + read-write + 0x00000000 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + FS_HCTSIZ6 + FS_HCTSIZ6 + OTG_FS host channel-6 transfer size + register + 0x1D0 + 0x20 + read-write + 0x00000000 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + FS_HCTSIZ7 + FS_HCTSIZ7 + OTG_FS host channel-7 transfer size + register + 0x1F0 + 0x20 + read-write + 0x00000000 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + + + OTG_FS_DEVICE + USB on the go full speed + USB_OTG_FS + 0x50000800 + + 0x0 + 0x400 + registers + + + + FS_DCFG + FS_DCFG + OTG_FS device configuration register + (OTG_FS_DCFG) + 0x0 + 0x20 + read-write + 0x02200000 + + + DSPD + Device speed + 0 + 2 + + + NZLSOHSK + Non-zero-length status OUT + handshake + 2 + 1 + + + DAD + Device address + 4 + 7 + + + PFIVL + Periodic frame interval + 11 + 2 + + + + + FS_DCTL + FS_DCTL + OTG_FS device control register + (OTG_FS_DCTL) + 0x4 + 0x20 + 0x00000000 + + + RWUSIG + Remote wakeup signaling + 0 + 1 + read-write + + + SDIS + Soft disconnect + 1 + 1 + read-write + + + GINSTS + Global IN NAK status + 2 + 1 + read-only + + + GONSTS + Global OUT NAK status + 3 + 1 + read-only + + + TCTL + Test control + 4 + 3 + read-write + + + SGINAK + Set global IN NAK + 7 + 1 + read-write + + + CGINAK + Clear global IN NAK + 8 + 1 + read-write + + + SGONAK + Set global OUT NAK + 9 + 1 + read-write + + + CGONAK + Clear global OUT NAK + 10 + 1 + read-write + + + POPRGDNE + Power-on programming done + 11 + 1 + read-write + + + + + FS_DSTS + FS_DSTS + OTG_FS device status register + (OTG_FS_DSTS) + 0x8 + 0x20 + read-only + 0x00000010 + + + SUSPSTS + Suspend status + 0 + 1 + + + ENUMSPD + Enumerated speed + 1 + 2 + + + EERR + Erratic error + 3 + 1 + + + FNSOF + Frame number of the received + SOF + 8 + 14 + + + + + FS_DIEPMSK + FS_DIEPMSK + OTG_FS device IN endpoint common interrupt + mask register (OTG_FS_DIEPMSK) + 0x10 + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed interrupt + mask + 0 + 1 + + + EPDM + Endpoint disabled interrupt + mask + 1 + 1 + + + TOM + Timeout condition mask (Non-isochronous + endpoints) + 3 + 1 + + + ITTXFEMSK + IN token received when TxFIFO empty + mask + 4 + 1 + + + INEPNMM + IN token received with EP mismatch + mask + 5 + 1 + + + INEPNEM + IN endpoint NAK effective + mask + 6 + 1 + + + + + FS_DOEPMSK + FS_DOEPMSK + OTG_FS device OUT endpoint common interrupt + mask register (OTG_FS_DOEPMSK) + 0x14 + 0x20 + read-write + 0x00000000 + + + XFRCM + Transfer completed interrupt + mask + 0 + 1 + + + EPDM + Endpoint disabled interrupt + mask + 1 + 1 + + + STUPM + SETUP phase done mask + 3 + 1 + + + OTEPDM + OUT token received when endpoint + disabled mask + 4 + 1 + + + + + FS_DAINT + FS_DAINT + OTG_FS device all endpoints interrupt + register (OTG_FS_DAINT) + 0x18 + 0x20 + read-only + 0x00000000 + + + IEPINT + IN endpoint interrupt bits + 0 + 16 + + + OEPINT + OUT endpoint interrupt + bits + 16 + 16 + + + + + FS_DAINTMSK + FS_DAINTMSK + OTG_FS all endpoints interrupt mask register + (OTG_FS_DAINTMSK) + 0x1C + 0x20 + read-write + 0x00000000 + + + IEPM + IN EP interrupt mask bits + 0 + 16 + + + OEPINT + OUT endpoint interrupt + bits + 16 + 16 + + + + + DVBUSDIS + DVBUSDIS + OTG_FS device VBUS discharge time + register + 0x28 + 0x20 + read-write + 0x000017D7 + + + VBUSDT + Device VBUS discharge time + 0 + 16 + + + + + DVBUSPULSE + DVBUSPULSE + OTG_FS device VBUS pulsing time + register + 0x2C + 0x20 + read-write + 0x000005B8 + + + DVBUSP + Device VBUS pulsing time + 0 + 12 + + + + + DIEPEMPMSK + DIEPEMPMSK + OTG_FS device IN endpoint FIFO empty + interrupt mask register + 0x34 + 0x20 + read-write + 0x00000000 + + + INEPTXFEM + IN EP Tx FIFO empty interrupt mask + bits + 0 + 16 + + + + + FS_DIEPCTL0 + FS_DIEPCTL0 + OTG_FS device control IN endpoint 0 control + register (OTG_FS_DIEPCTL0) + 0x100 + 0x20 + 0x00000000 + + + MPSIZ + Maximum packet size + 0 + 2 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-only + + + STALL + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-only + + + EPENA + Endpoint enable + 31 + 1 + read-only + + + + + DIEPCTL1 + DIEPCTL1 + OTG device endpoint-1 control + register + 0x120 + 0x20 + 0x00000000 + + + EPENA + EPENA + 31 + 1 + read-write + + + EPDIS + EPDIS + 30 + 1 + read-write + + + SODDFRM_SD1PID + SODDFRM/SD1PID + 29 + 1 + write-only + + + SD0PID_SEVNFRM + SD0PID/SEVNFRM + 28 + 1 + write-only + + + SNAK + SNAK + 27 + 1 + write-only + + + CNAK + CNAK + 26 + 1 + write-only + + + TXFNUM + TXFNUM + 22 + 4 + read-write + + + Stall + Stall + 21 + 1 + read-write + + + EPTYP + EPTYP + 18 + 2 + read-write + + + NAKSTS + NAKSTS + 17 + 1 + read-only + + + EONUM_DPID + EONUM/DPID + 16 + 1 + read-only + + + USBAEP + USBAEP + 15 + 1 + read-write + + + MPSIZ + MPSIZ + 0 + 11 + read-write + + + + + DIEPCTL2 + DIEPCTL2 + OTG device endpoint-2 control + register + 0x140 + 0x20 + 0x00000000 + + + EPENA + EPENA + 31 + 1 + read-write + + + EPDIS + EPDIS + 30 + 1 + read-write + + + SODDFRM + SODDFRM + 29 + 1 + write-only + + + SD0PID_SEVNFRM + SD0PID/SEVNFRM + 28 + 1 + write-only + + + SNAK + SNAK + 27 + 1 + write-only + + + CNAK + CNAK + 26 + 1 + write-only + + + TXFNUM + TXFNUM + 22 + 4 + read-write + + + Stall + Stall + 21 + 1 + read-write + + + EPTYP + EPTYP + 18 + 2 + read-write + + + NAKSTS + NAKSTS + 17 + 1 + read-only + + + EONUM_DPID + EONUM/DPID + 16 + 1 + read-only + + + USBAEP + USBAEP + 15 + 1 + read-write + + + MPSIZ + MPSIZ + 0 + 11 + read-write + + + + + DIEPCTL3 + DIEPCTL3 + OTG device endpoint-3 control + register + 0x160 + 0x20 + 0x00000000 + + + EPENA + EPENA + 31 + 1 + read-write + + + EPDIS + EPDIS + 30 + 1 + read-write + + + SODDFRM + SODDFRM + 29 + 1 + write-only + + + SD0PID_SEVNFRM + SD0PID/SEVNFRM + 28 + 1 + write-only + + + SNAK + SNAK + 27 + 1 + write-only + + + CNAK + CNAK + 26 + 1 + write-only + + + TXFNUM + TXFNUM + 22 + 4 + read-write + + + Stall + Stall + 21 + 1 + read-write + + + EPTYP + EPTYP + 18 + 2 + read-write + + + NAKSTS + NAKSTS + 17 + 1 + read-only + + + EONUM_DPID + EONUM/DPID + 16 + 1 + read-only + + + USBAEP + USBAEP + 15 + 1 + read-write + + + MPSIZ + MPSIZ + 0 + 11 + read-write + + + + + DOEPCTL0 + DOEPCTL0 + device endpoint-0 control + register + 0x300 + 0x20 + 0x00008000 + + + EPENA + EPENA + 31 + 1 + write-only + + + EPDIS + EPDIS + 30 + 1 + read-only + + + SNAK + SNAK + 27 + 1 + write-only + + + CNAK + CNAK + 26 + 1 + write-only + + + Stall + Stall + 21 + 1 + read-write + + + SNPM + SNPM + 20 + 1 + read-write + + + EPTYP + EPTYP + 18 + 2 + read-only + + + NAKSTS + NAKSTS + 17 + 1 + read-only + + + USBAEP + USBAEP + 15 + 1 + read-only + + + MPSIZ + MPSIZ + 0 + 2 + read-only + + + + + DOEPCTL1 + DOEPCTL1 + device endpoint-1 control + register + 0x320 + 0x20 + 0x00000000 + + + EPENA + EPENA + 31 + 1 + read-write + + + EPDIS + EPDIS + 30 + 1 + read-write + + + SODDFRM + SODDFRM + 29 + 1 + write-only + + + SD0PID_SEVNFRM + SD0PID/SEVNFRM + 28 + 1 + write-only + + + SNAK + SNAK + 27 + 1 + write-only + + + CNAK + CNAK + 26 + 1 + write-only + + + Stall + Stall + 21 + 1 + read-write + + + SNPM + SNPM + 20 + 1 + read-write + + + EPTYP + EPTYP + 18 + 2 + read-write + + + NAKSTS + NAKSTS + 17 + 1 + read-only + + + EONUM_DPID + EONUM/DPID + 16 + 1 + read-only + + + USBAEP + USBAEP + 15 + 1 + read-write + + + MPSIZ + MPSIZ + 0 + 11 + read-write + + + + + DOEPCTL2 + DOEPCTL2 + device endpoint-2 control + register + 0x340 + 0x20 + 0x00000000 + + + EPENA + EPENA + 31 + 1 + read-write + + + EPDIS + EPDIS + 30 + 1 + read-write + + + SODDFRM + SODDFRM + 29 + 1 + write-only + + + SD0PID_SEVNFRM + SD0PID/SEVNFRM + 28 + 1 + write-only + + + SNAK + SNAK + 27 + 1 + write-only + + + CNAK + CNAK + 26 + 1 + write-only + + + Stall + Stall + 21 + 1 + read-write + + + SNPM + SNPM + 20 + 1 + read-write + + + EPTYP + EPTYP + 18 + 2 + read-write + + + NAKSTS + NAKSTS + 17 + 1 + read-only + + + EONUM_DPID + EONUM/DPID + 16 + 1 + read-only + + + USBAEP + USBAEP + 15 + 1 + read-write + + + MPSIZ + MPSIZ + 0 + 11 + read-write + + + + + DOEPCTL3 + DOEPCTL3 + device endpoint-3 control + register + 0x360 + 0x20 + 0x00000000 + + + EPENA + EPENA + 31 + 1 + read-write + + + EPDIS + EPDIS + 30 + 1 + read-write + + + SODDFRM + SODDFRM + 29 + 1 + write-only + + + SD0PID_SEVNFRM + SD0PID/SEVNFRM + 28 + 1 + write-only + + + SNAK + SNAK + 27 + 1 + write-only + + + CNAK + CNAK + 26 + 1 + write-only + + + Stall + Stall + 21 + 1 + read-write + + + SNPM + SNPM + 20 + 1 + read-write + + + EPTYP + EPTYP + 18 + 2 + read-write + + + NAKSTS + NAKSTS + 17 + 1 + read-only + + + EONUM_DPID + EONUM/DPID + 16 + 1 + read-only + + + USBAEP + USBAEP + 15 + 1 + read-write + + + MPSIZ + MPSIZ + 0 + 11 + read-write + + + + + DIEPINT0 + DIEPINT0 + device endpoint-x interrupt + register + 0x108 + 0x20 + 0x00000080 + + + TXFE + TXFE + 7 + 1 + read-only + + + INEPNE + INEPNE + 6 + 1 + read-write + + + ITTXFE + ITTXFE + 4 + 1 + read-write + + + TOC + TOC + 3 + 1 + read-write + + + EPDISD + EPDISD + 1 + 1 + read-write + + + XFRC + XFRC + 0 + 1 + read-write + + + + + DIEPINT1 + DIEPINT1 + device endpoint-1 interrupt + register + 0x128 + 0x20 + 0x00000080 + + + TXFE + TXFE + 7 + 1 + read-only + + + INEPNE + INEPNE + 6 + 1 + read-write + + + ITTXFE + ITTXFE + 4 + 1 + read-write + + + TOC + TOC + 3 + 1 + read-write + + + EPDISD + EPDISD + 1 + 1 + read-write + + + XFRC + XFRC + 0 + 1 + read-write + + + + + DIEPINT2 + DIEPINT2 + device endpoint-2 interrupt + register + 0x148 + 0x20 + 0x00000080 + + + TXFE + TXFE + 7 + 1 + read-only + + + INEPNE + INEPNE + 6 + 1 + read-write + + + ITTXFE + ITTXFE + 4 + 1 + read-write + + + TOC + TOC + 3 + 1 + read-write + + + EPDISD + EPDISD + 1 + 1 + read-write + + + XFRC + XFRC + 0 + 1 + read-write + + + + + DIEPINT3 + DIEPINT3 + device endpoint-3 interrupt + register + 0x168 + 0x20 + 0x00000080 + + + TXFE + TXFE + 7 + 1 + read-only + + + INEPNE + INEPNE + 6 + 1 + read-write + + + ITTXFE + ITTXFE + 4 + 1 + read-write + + + TOC + TOC + 3 + 1 + read-write + + + EPDISD + EPDISD + 1 + 1 + read-write + + + XFRC + XFRC + 0 + 1 + read-write + + + + + DOEPINT0 + DOEPINT0 + device endpoint-0 interrupt + register + 0x308 + 0x20 + read-write + 0x00000080 + + + B2BSTUP + B2BSTUP + 6 + 1 + + + OTEPDIS + OTEPDIS + 4 + 1 + + + STUP + STUP + 3 + 1 + + + EPDISD + EPDISD + 1 + 1 + + + XFRC + XFRC + 0 + 1 + + + + + DOEPINT1 + DOEPINT1 + device endpoint-1 interrupt + register + 0x328 + 0x20 + read-write + 0x00000080 + + + B2BSTUP + B2BSTUP + 6 + 1 + + + OTEPDIS + OTEPDIS + 4 + 1 + + + STUP + STUP + 3 + 1 + + + EPDISD + EPDISD + 1 + 1 + + + XFRC + XFRC + 0 + 1 + + + + + DOEPINT2 + DOEPINT2 + device endpoint-2 interrupt + register + 0x348 + 0x20 + read-write + 0x00000080 + + + B2BSTUP + B2BSTUP + 6 + 1 + + + OTEPDIS + OTEPDIS + 4 + 1 + + + STUP + STUP + 3 + 1 + + + EPDISD + EPDISD + 1 + 1 + + + XFRC + XFRC + 0 + 1 + + + + + DOEPINT3 + DOEPINT3 + device endpoint-3 interrupt + register + 0x368 + 0x20 + read-write + 0x00000080 + + + B2BSTUP + B2BSTUP + 6 + 1 + + + OTEPDIS + OTEPDIS + 4 + 1 + + + STUP + STUP + 3 + 1 + + + EPDISD + EPDISD + 1 + 1 + + + XFRC + XFRC + 0 + 1 + + + + + DIEPTSIZ0 + DIEPTSIZ0 + device endpoint-0 transfer size + register + 0x110 + 0x20 + read-write + 0x00000000 + + + PKTCNT + Packet count + 19 + 2 + + + XFRSIZ + Transfer size + 0 + 7 + + + + + DOEPTSIZ0 + DOEPTSIZ0 + device OUT endpoint-0 transfer size + register + 0x310 + 0x20 + read-write + 0x00000000 + + + STUPCNT + SETUP packet count + 29 + 2 + + + PKTCNT + Packet count + 19 + 1 + + + XFRSIZ + Transfer size + 0 + 7 + + + + + DIEPTSIZ1 + DIEPTSIZ1 + device endpoint-1 transfer size + register + 0x130 + 0x20 + read-write + 0x00000000 + + + MCNT + Multi count + 29 + 2 + + + PKTCNT + Packet count + 19 + 10 + + + XFRSIZ + Transfer size + 0 + 19 + + + + + DIEPTSIZ2 + DIEPTSIZ2 + device endpoint-2 transfer size + register + 0x150 + 0x20 + read-write + 0x00000000 + + + MCNT + Multi count + 29 + 2 + + + PKTCNT + Packet count + 19 + 10 + + + XFRSIZ + Transfer size + 0 + 19 + + + + + DIEPTSIZ3 + DIEPTSIZ3 + device endpoint-3 transfer size + register + 0x170 + 0x20 + read-write + 0x00000000 + + + MCNT + Multi count + 29 + 2 + + + PKTCNT + Packet count + 19 + 10 + + + XFRSIZ + Transfer size + 0 + 19 + + + + + DTXFSTS0 + DTXFSTS0 + OTG_FS device IN endpoint transmit FIFO + status register + 0x118 + 0x20 + read-only + 0x00000000 + + + INEPTFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS1 + DTXFSTS1 + OTG_FS device IN endpoint transmit FIFO + status register + 0x138 + 0x20 + read-only + 0x00000000 + + + INEPTFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS2 + DTXFSTS2 + OTG_FS device IN endpoint transmit FIFO + status register + 0x158 + 0x20 + read-only + 0x00000000 + + + INEPTFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DTXFSTS3 + DTXFSTS3 + OTG_FS device IN endpoint transmit FIFO + status register + 0x178 + 0x20 + read-only + 0x00000000 + + + INEPTFSAV + IN endpoint TxFIFO space + available + 0 + 16 + + + + + DOEPTSIZ1 + DOEPTSIZ1 + device OUT endpoint-1 transfer size + register + 0x330 + 0x20 + read-write + 0x00000000 + + + RXDPID_STUPCNT + Received data PID/SETUP packet + count + 29 + 2 + + + PKTCNT + Packet count + 19 + 10 + + + XFRSIZ + Transfer size + 0 + 19 + + + + + DOEPTSIZ2 + DOEPTSIZ2 + device OUT endpoint-2 transfer size + register + 0x350 + 0x20 + read-write + 0x00000000 + + + RXDPID_STUPCNT + Received data PID/SETUP packet + count + 29 + 2 + + + PKTCNT + Packet count + 19 + 10 + + + XFRSIZ + Transfer size + 0 + 19 + + + + + DOEPTSIZ3 + DOEPTSIZ3 + device OUT endpoint-3 transfer size + register + 0x370 + 0x20 + read-write + 0x00000000 + + + RXDPID_STUPCNT + Received data PID/SETUP packet + count + 29 + 2 + + + PKTCNT + Packet count + 19 + 10 + + + XFRSIZ + Transfer size + 0 + 19 + + + + + + + OTG_FS_PWRCLK + USB on the go full speed + USB_OTG_FS + 0x50000E00 + + 0x0 + 0x400 + registers + + + + FS_PCGCCTL + FS_PCGCCTL + OTG_FS power and clock gating control + register (OTG_FS_PCGCCTL) + 0x0 + 0x20 + read-write + 0x00000000 + + + STPPCLK + Stop PHY clock + 0 + 1 + + + GATEHCLK + Gate HCLK + 1 + 1 + + + PHYSUSP + PHY Suspended + 4 + 1 + + + + + + + CAN1 + Controller area network + CAN + 0x40006400 + + 0x0 + 0x400 + registers + + + CAN1_TX + CAN1 TX interrupts + 19 + + + CAN1_RX0 + CAN1 RX0 interrupts + 20 + + + CAN1_RX1 + CAN1 RX1 interrupts + 21 + + + CAN1_SCE + CAN1 SCE interrupt + 22 + + + + MCR + MCR + master control register + 0x0 + 0x20 + read-write + 0x00010002 + + + DBF + DBF + 16 + 1 + + + RESET + RESET + 15 + 1 + + + TTCM + TTCM + 7 + 1 + + + ABOM + ABOM + 6 + 1 + + + AWUM + AWUM + 5 + 1 + + + NART + NART + 4 + 1 + + + RFLM + RFLM + 3 + 1 + + + TXFP + TXFP + 2 + 1 + + + SLEEP + SLEEP + 1 + 1 + + + INRQ + INRQ + 0 + 1 + + + + + MSR + MSR + master status register + 0x4 + 0x20 + 0x00000C02 + + + RX + RX + 11 + 1 + read-only + + + SAMP + SAMP + 10 + 1 + read-only + + + RXM + RXM + 9 + 1 + read-only + + + TXM + TXM + 8 + 1 + read-only + + + SLAKI + SLAKI + 4 + 1 + read-write + + + WKUI + WKUI + 3 + 1 + read-write + + + ERRI + ERRI + 2 + 1 + read-write + + + SLAK + SLAK + 1 + 1 + read-only + + + INAK + INAK + 0 + 1 + read-only + + + + + TSR + TSR + transmit status register + 0x8 + 0x20 + 0x1C000000 + + + LOW2 + Lowest priority flag for mailbox + 2 + 31 + 1 + read-only + + + LOW1 + Lowest priority flag for mailbox + 1 + 30 + 1 + read-only + + + LOW0 + Lowest priority flag for mailbox + 0 + 29 + 1 + read-only + + + TME2 + Lowest priority flag for mailbox + 2 + 28 + 1 + read-only + + + TME1 + Lowest priority flag for mailbox + 1 + 27 + 1 + read-only + + + TME0 + Lowest priority flag for mailbox + 0 + 26 + 1 + read-only + + + CODE + CODE + 24 + 2 + read-only + + + ABRQ2 + ABRQ2 + 23 + 1 + read-write + + + TERR2 + TERR2 + 19 + 1 + read-write + + + ALST2 + ALST2 + 18 + 1 + read-write + + + TXOK2 + TXOK2 + 17 + 1 + read-write + + + RQCP2 + RQCP2 + 16 + 1 + read-write + + + ABRQ1 + ABRQ1 + 15 + 1 + read-write + + + TERR1 + TERR1 + 11 + 1 + read-write + + + ALST1 + ALST1 + 10 + 1 + read-write + + + TXOK1 + TXOK1 + 9 + 1 + read-write + + + RQCP1 + RQCP1 + 8 + 1 + read-write + + + ABRQ0 + ABRQ0 + 7 + 1 + read-write + + + TERR0 + TERR0 + 3 + 1 + read-write + + + ALST0 + ALST0 + 2 + 1 + read-write + + + TXOK0 + TXOK0 + 1 + 1 + read-write + + + RQCP0 + RQCP0 + 0 + 1 + read-write + + + + + RF0R + RF0R + receive FIFO 0 register + 0xC + 0x20 + 0x00000000 + + + RFOM0 + RFOM0 + 5 + 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read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR2 + IPR2 + Interrupt Priority Register + 0x408 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR3 + IPR3 + Interrupt Priority Register + 0x40C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR4 + IPR4 + Interrupt Priority Register + 0x410 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR5 + IPR5 + Interrupt Priority Register + 0x414 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR6 + IPR6 + Interrupt Priority Register + 0x418 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR7 + IPR7 + Interrupt Priority Register + 0x41C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR8 + IPR8 + Interrupt Priority Register + 0x420 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR9 + IPR9 + Interrupt Priority Register + 0x424 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR10 + IPR10 + Interrupt Priority Register + 0x428 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR11 + IPR11 + Interrupt Priority Register + 0x42C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR12 + IPR12 + Interrupt Priority Register + 0x430 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR13 + IPR13 + Interrupt Priority Register + 0x434 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR14 + IPR14 + Interrupt Priority Register + 0x438 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR15 + IPR15 + Interrupt Priority Register + 0x43C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR16 + IPR16 + Interrupt Priority Register + 0x440 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR17 + IPR17 + Interrupt Priority Register + 0x444 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR18 + IPR18 + Interrupt Priority Register + 0x448 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR19 + IPR19 + Interrupt Priority Register + 0x44C + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + IPR20 + IPR20 + Interrupt Priority Register + 0x450 + 0x20 + read-write + 0x00000000 + + + IPR_N0 + IPR_N0 + 0 + 8 + + + IPR_N1 + IPR_N1 + 8 + 8 + + + IPR_N2 + IPR_N2 + 16 + 8 + + + IPR_N3 + IPR_N3 + 24 + 8 + + + + + + + FLASH + FLASH + FLASH + 0x40023C00 + + 0x0 + 0x400 + registers + + + FLASH + Flash global interrupt + 4 + + + + ACR + ACR + Flash access control register + 0x0 + 0x20 + 0x00000000 + + + LATENCY + Latency + 0 + 3 + read-write + + + PRFTEN + Prefetch enable + 8 + 1 + read-write + + + ICEN + Instruction cache enable + 9 + 1 + read-write + + + DCEN + Data cache enable + 10 + 1 + read-write + + + ICRST + Instruction cache reset + 11 + 1 + write-only + + + DCRST + Data cache reset + 12 + 1 + read-write + + + + + KEYR + KEYR + Flash key register + 0x4 + 0x20 + write-only + 0x00000000 + + + KEY + FPEC key + 0 + 32 + + + + + OPTKEYR + OPTKEYR + Flash option key register + 0x8 + 0x20 + write-only + 0x00000000 + + + OPTKEY + Option byte key + 0 + 32 + + + + + SR + SR + Status register + 0xC + 0x20 + 0x00000000 + + + EOP + End of operation + 0 + 1 + read-write + + + OPERR + Operation error + 1 + 1 + read-write + + + WRPERR + Write protection error + 4 + 1 + read-write + + + PGAERR + Programming alignment + error + 5 + 1 + read-write + + + PGPERR + Programming parallelism + error + 6 + 1 + read-write + + + PGSERR + Programming sequence error + 7 + 1 + read-write + + + BSY + Busy + 16 + 1 + read-only + + + + + CR + CR + Control register + 0x10 + 0x20 + read-write + 0x80000000 + + + PG + Programming + 0 + 1 + + + SER + Sector Erase + 1 + 1 + + + MER + Mass Erase of sectors 0 to + 11 + 2 + 1 + + + SNB + Sector number + 3 + 5 + + + PSIZE + Program size + 8 + 2 + + + MER1 + Mass Erase of sectors 12 to + 23 + 15 + 1 + + + STRT + Start + 16 + 1 + + + EOPIE + End of operation interrupt + enable + 24 + 1 + + + ERRIE + Error interrupt enable + 25 + 1 + + + LOCK + Lock + 31 + 1 + + + + + OPTCR + OPTCR + Flash option control register + 0x14 + 0x20 + read-write + 0x0FFFAAED + + + OPTLOCK + Option lock + 0 + 1 + + + OPTSTRT + Option start + 1 + 1 + + + BOR_LEV + BOR reset Level + 2 + 2 + + + WDG_SW + WDG_SW User option bytes + 5 + 1 + + + nRST_STOP + nRST_STOP User option + bytes + 6 + 1 + + + nRST_STDBY + nRST_STDBY User option + bytes + 7 + 1 + + + RDP + Read protect + 8 + 8 + + + nWRP + Not write protect + 16 + 12 + + + + + OPTCR1 + OPTCR1 + Flash option control register + 1 + 0x18 + 0x20 + read-write + 0x0FFF0000 + + + nWRP + Not write protect + 16 + 12 + + + + + + + EXTI + External interrupt/event + controller + EXTI + 0x40013C00 + + 0x0 + 0x400 + registers + + + TAMP_STAMP + Tamper and TimeStamp interrupts through the + EXTI line + 2 + + + EXTI0 + EXTI Line0 interrupt + 6 + + + EXTI1 + EXTI Line1 interrupt + 7 + + + EXTI2 + EXTI Line2 interrupt + 8 + + + EXTI3 + EXTI Line3 interrupt + 9 + + + EXTI4 + EXTI Line4 interrupt + 10 + + + EXTI9_5 + EXTI Line[9:5] interrupts + 23 + + + EXTI15_10 + EXTI Line[15:10] interrupts + 40 + + + + IMR + IMR + Interrupt mask register + (EXTI_IMR) + 0x0 + 0x20 + read-write + 0x00000000 + + + MR0 + Interrupt Mask on line 0 + 0 + 1 + + + MR1 + Interrupt Mask on line 1 + 1 + 1 + + + MR2 + Interrupt Mask on line 2 + 2 + 1 + + + MR3 + Interrupt Mask on line 3 + 3 + 1 + + + MR4 + Interrupt Mask on line 4 + 4 + 1 + + + MR5 + Interrupt Mask on line 5 + 5 + 1 + + + MR6 + Interrupt Mask on line 6 + 6 + 1 + + + MR7 + Interrupt Mask on line 7 + 7 + 1 + + + MR8 + Interrupt Mask on line 8 + 8 + 1 + + + MR9 + Interrupt Mask on line 9 + 9 + 1 + + + MR10 + Interrupt Mask on line 10 + 10 + 1 + + + MR11 + Interrupt Mask on line 11 + 11 + 1 + + + MR12 + Interrupt Mask on line 12 + 12 + 1 + + + MR13 + Interrupt Mask on line 13 + 13 + 1 + + + MR14 + Interrupt Mask on line 14 + 14 + 1 + + + MR15 + Interrupt Mask on line 15 + 15 + 1 + + + MR16 + Interrupt Mask on line 16 + 16 + 1 + + + MR17 + Interrupt Mask on line 17 + 17 + 1 + + + MR18 + Interrupt Mask on line 18 + 18 + 1 + + + MR19 + Interrupt Mask on line 19 + 19 + 1 + + + MR20 + Interrupt Mask on line 20 + 20 + 1 + + + MR21 + Interrupt Mask on line 21 + 21 + 1 + + + MR22 + Interrupt Mask on line 22 + 22 + 1 + + + + + EMR + EMR + Event mask register (EXTI_EMR) + 0x4 + 0x20 + read-write + 0x00000000 + + + MR0 + Event Mask on line 0 + 0 + 1 + + + MR1 + Event Mask on line 1 + 1 + 1 + + + MR2 + Event Mask on line 2 + 2 + 1 + + + MR3 + Event Mask on line 3 + 3 + 1 + + + MR4 + Event Mask on line 4 + 4 + 1 + + + MR5 + Event Mask on line 5 + 5 + 1 + + + MR6 + Event Mask on line 6 + 6 + 1 + + + MR7 + Event Mask on line 7 + 7 + 1 + + + MR8 + Event Mask on line 8 + 8 + 1 + + + MR9 + Event Mask on line 9 + 9 + 1 + + + MR10 + Event Mask on line 10 + 10 + 1 + + + MR11 + Event Mask on line 11 + 11 + 1 + + + MR12 + Event Mask on line 12 + 12 + 1 + + + MR13 + Event Mask on line 13 + 13 + 1 + + + MR14 + Event Mask on line 14 + 14 + 1 + + + MR15 + Event Mask on line 15 + 15 + 1 + + + MR16 + Event Mask on line 16 + 16 + 1 + + + MR17 + Event Mask on line 17 + 17 + 1 + + + MR18 + Event Mask on line 18 + 18 + 1 + + + MR19 + Event Mask on line 19 + 19 + 1 + + + MR20 + Event Mask on line 20 + 20 + 1 + + + MR21 + Event Mask on line 21 + 21 + 1 + + + MR22 + Event Mask on line 22 + 22 + 1 + + + + + RTSR + RTSR + Rising Trigger selection register + (EXTI_RTSR) + 0x8 + 0x20 + read-write + 0x00000000 + + + TR0 + Rising trigger event configuration of + line 0 + 0 + 1 + + + TR1 + Rising trigger event configuration of + line 1 + 1 + 1 + + + TR2 + Rising trigger event configuration of + line 2 + 2 + 1 + + + TR3 + Rising trigger event configuration of + line 3 + 3 + 1 + + + TR4 + Rising trigger event configuration of + line 4 + 4 + 1 + + + TR5 + Rising trigger event configuration of + line 5 + 5 + 1 + + + TR6 + Rising trigger event configuration of + line 6 + 6 + 1 + + + TR7 + Rising trigger event configuration of + line 7 + 7 + 1 + + + TR8 + Rising trigger event configuration of + line 8 + 8 + 1 + + + TR9 + Rising trigger event configuration of + line 9 + 9 + 1 + + + TR10 + Rising trigger event configuration of + line 10 + 10 + 1 + + + TR11 + Rising trigger event configuration of + line 11 + 11 + 1 + + + TR12 + Rising trigger event configuration of + line 12 + 12 + 1 + + + TR13 + Rising trigger event configuration of + line 13 + 13 + 1 + + + TR14 + Rising trigger event configuration of + line 14 + 14 + 1 + + + TR15 + Rising trigger event configuration of + line 15 + 15 + 1 + + + TR16 + Rising trigger event configuration of + line 16 + 16 + 1 + + + TR17 + Rising trigger event configuration of + line 17 + 17 + 1 + + + TR18 + Rising trigger event configuration of + line 18 + 18 + 1 + + + TR19 + Rising trigger event configuration of + line 19 + 19 + 1 + + + TR20 + Rising trigger event configuration of + line 20 + 20 + 1 + + + TR21 + Rising trigger event configuration of + line 21 + 21 + 1 + + + TR22 + Rising trigger event configuration of + line 22 + 22 + 1 + + + + + FTSR + FTSR + Falling Trigger selection register + (EXTI_FTSR) + 0xC + 0x20 + read-write + 0x00000000 + + + TR0 + Falling trigger event configuration of + line 0 + 0 + 1 + + + TR1 + Falling trigger event configuration of + line 1 + 1 + 1 + + + TR2 + Falling trigger event configuration of + line 2 + 2 + 1 + + + TR3 + Falling trigger event configuration of + line 3 + 3 + 1 + + + TR4 + Falling trigger event configuration of + line 4 + 4 + 1 + + + TR5 + Falling trigger event configuration of + line 5 + 5 + 1 + + + TR6 + Falling trigger event configuration of + line 6 + 6 + 1 + + + TR7 + Falling trigger event configuration of + line 7 + 7 + 1 + + + TR8 + Falling trigger event configuration of + line 8 + 8 + 1 + + + TR9 + Falling trigger event configuration of + line 9 + 9 + 1 + + + TR10 + Falling trigger event configuration of + line 10 + 10 + 1 + + + TR11 + Falling trigger event configuration of + line 11 + 11 + 1 + + + TR12 + Falling trigger event configuration of + line 12 + 12 + 1 + + + TR13 + Falling trigger event configuration of + line 13 + 13 + 1 + + + TR14 + Falling trigger event configuration of + line 14 + 14 + 1 + + + TR15 + Falling trigger event configuration of + line 15 + 15 + 1 + + + TR16 + Falling trigger event configuration of + line 16 + 16 + 1 + + + TR17 + Falling trigger event configuration of + line 17 + 17 + 1 + + + TR18 + Falling trigger event configuration of + line 18 + 18 + 1 + + + TR19 + Falling trigger event configuration of + line 19 + 19 + 1 + + + TR20 + Falling trigger event configuration of + line 20 + 20 + 1 + + + TR21 + Falling trigger event configuration of + line 21 + 21 + 1 + + + TR22 + Falling trigger event configuration of + line 22 + 22 + 1 + + + + + SWIER + SWIER + Software interrupt event register + (EXTI_SWIER) + 0x10 + 0x20 + read-write + 0x00000000 + + + SWIER0 + Software Interrupt on line + 0 + 0 + 1 + + + SWIER1 + Software Interrupt on line + 1 + 1 + 1 + + + SWIER2 + Software Interrupt on line + 2 + 2 + 1 + + + SWIER3 + Software Interrupt on line + 3 + 3 + 1 + + + SWIER4 + Software Interrupt on line + 4 + 4 + 1 + + + SWIER5 + Software Interrupt on line + 5 + 5 + 1 + + + SWIER6 + Software Interrupt on line + 6 + 6 + 1 + + + SWIER7 + Software Interrupt on line + 7 + 7 + 1 + + + SWIER8 + Software Interrupt on line + 8 + 8 + 1 + + + SWIER9 + Software Interrupt on line + 9 + 9 + 1 + + + SWIER10 + Software Interrupt on line + 10 + 10 + 1 + + + SWIER11 + Software Interrupt on line + 11 + 11 + 1 + + + SWIER12 + Software Interrupt on line + 12 + 12 + 1 + + + SWIER13 + Software Interrupt on line + 13 + 13 + 1 + + + SWIER14 + Software Interrupt on line + 14 + 14 + 1 + + + SWIER15 + Software Interrupt on line + 15 + 15 + 1 + + + SWIER16 + Software Interrupt on line + 16 + 16 + 1 + + + SWIER17 + Software Interrupt on line + 17 + 17 + 1 + + + SWIER18 + Software Interrupt on line + 18 + 18 + 1 + + + SWIER19 + Software Interrupt on line + 19 + 19 + 1 + + + SWIER20 + Software Interrupt on line + 20 + 20 + 1 + + + SWIER21 + Software Interrupt on line + 21 + 21 + 1 + + + SWIER22 + Software Interrupt on line + 22 + 22 + 1 + + + + + PR + PR + Pending register (EXTI_PR) + 0x14 + 0x20 + read-write + 0x00000000 + + + PR0 + Pending bit 0 + 0 + 1 + + + PR1 + Pending bit 1 + 1 + 1 + + + PR2 + Pending bit 2 + 2 + 1 + + + PR3 + Pending bit 3 + 3 + 1 + + + PR4 + Pending bit 4 + 4 + 1 + + + PR5 + Pending bit 5 + 5 + 1 + + + PR6 + Pending bit 6 + 6 + 1 + + + PR7 + Pending bit 7 + 7 + 1 + + + PR8 + Pending bit 8 + 8 + 1 + + + PR9 + Pending bit 9 + 9 + 1 + + + PR10 + Pending bit 10 + 10 + 1 + + + PR11 + Pending bit 11 + 11 + 1 + + + PR12 + Pending bit 12 + 12 + 1 + + + PR13 + Pending bit 13 + 13 + 1 + + + PR14 + Pending bit 14 + 14 + 1 + + + PR15 + Pending bit 15 + 15 + 1 + + + PR16 + Pending bit 16 + 16 + 1 + + + PR17 + Pending bit 17 + 17 + 1 + + + PR18 + Pending bit 18 + 18 + 1 + + + PR19 + Pending bit 19 + 19 + 1 + + + PR20 + Pending bit 20 + 20 + 1 + + + PR21 + Pending bit 21 + 21 + 1 + + + PR22 + Pending bit 22 + 22 + 1 + + + + + + + OTG_HS_GLOBAL + USB on the go high speed + USB_OTG_HS + 0x40040000 + + 0x0 + 0x400 + registers + + + OTG_HS_EP1_OUT + USB On The Go HS End Point 1 Out global + interrupt + 74 + + + OTG_HS_EP1_IN + USB On The Go HS End Point 1 In global + interrupt + 75 + + + OTG_HS_WKUP + USB On The Go HS Wakeup through EXTI + interrupt + 76 + + + OTG_HS + USB On The Go HS global + interrupt + 77 + + + + OTG_HS_GOTGCTL + OTG_HS_GOTGCTL + OTG_HS control and status + register + 0x0 + 32 + 0x00000800 + + + SRQSCS + Session request success + 0 + 1 + read-only + + + SRQ + Session request + 1 + 1 + read-write + + + HNGSCS + Host negotiation success + 8 + 1 + read-only + + + HNPRQ + HNP request + 9 + 1 + read-write + + + HSHNPEN + Host set HNP enable + 10 + 1 + read-write + + + DHNPEN + Device HNP enabled + 11 + 1 + read-write + + + CIDSTS + Connector ID status + 16 + 1 + read-only + + + DBCT + Long/short debounce time + 17 + 1 + read-only + + + ASVLD + A-session valid + 18 + 1 + read-only + + + BSVLD + B-session valid + 19 + 1 + read-only + + + + + OTG_HS_GOTGINT + OTG_HS_GOTGINT + OTG_HS interrupt register + 0x4 + 32 + read-write + 0x0 + + + SEDET + Session end detected + 2 + 1 + + + SRSSCHG + Session request success status + change + 8 + 1 + + + HNSSCHG + Host negotiation success status + change + 9 + 1 + + + HNGDET + Host negotiation detected + 17 + 1 + + + ADTOCHG + A-device timeout change + 18 + 1 + + + DBCDNE + Debounce done + 19 + 1 + + + + + OTG_HS_GAHBCFG + OTG_HS_GAHBCFG + OTG_HS AHB configuration + register + 0x8 + 32 + read-write + 0x0 + + + GINT + Global interrupt mask + 0 + 1 + + + HBSTLEN + Burst length/type + 1 + 4 + + + DMAEN + DMA enable + 5 + 1 + + + TXFELVL + TxFIFO empty level + 7 + 1 + + + PTXFELVL + Periodic TxFIFO empty + level + 8 + 1 + + + + + OTG_HS_GUSBCFG + OTG_HS_GUSBCFG + OTG_HS USB configuration + register + 0xC + 32 + 0x00000A00 + + + TOCAL + FS timeout calibration + 0 + 3 + read-write + + + PHYSEL + USB 2.0 high-speed ULPI PHY or USB 1.1 + full-speed serial transceiver select + 6 + 1 + write-only + + + SRPCAP + SRP-capable + 8 + 1 + read-write + + + HNPCAP + HNP-capable + 9 + 1 + read-write + + + TRDT + USB turnaround time + 10 + 4 + read-write + + + PHYLPCS + PHY Low-power clock select + 15 + 1 + read-write + + + ULPIFSLS + ULPI FS/LS select + 17 + 1 + read-write + + + ULPIAR + ULPI Auto-resume + 18 + 1 + read-write + + + ULPICSM + ULPI Clock SuspendM + 19 + 1 + read-write + + + ULPIEVBUSD + ULPI External VBUS Drive + 20 + 1 + read-write + + + ULPIEVBUSI + ULPI external VBUS + indicator + 21 + 1 + read-write + + + TSDPS + TermSel DLine pulsing + selection + 22 + 1 + read-write + + + PCCI + Indicator complement + 23 + 1 + read-write + + + PTCI + Indicator pass through + 24 + 1 + read-write + + + ULPIIPD + ULPI interface protect + disable + 25 + 1 + read-write + + + FHMOD + Forced host mode + 29 + 1 + read-write + + + FDMOD + Forced peripheral mode + 30 + 1 + read-write + + + CTXPKT + Corrupt Tx packet + 31 + 1 + read-write + + + + + OTG_HS_GRSTCTL + OTG_HS_GRSTCTL + OTG_HS reset register + 0x10 + 32 + 0x20000000 + + + CSRST + Core soft reset + 0 + 1 + read-write + + + HSRST + HCLK soft reset + 1 + 1 + read-write + + + FCRST + Host frame counter reset + 2 + 1 + read-write + + + RXFFLSH + RxFIFO flush + 4 + 1 + read-write + + + TXFFLSH + TxFIFO flush + 5 + 1 + read-write + + + TXFNUM + TxFIFO number + 6 + 5 + read-write + + + DMAREQ + DMA request signal + 30 + 1 + read-only + + + AHBIDL + AHB master idle + 31 + 1 + read-only + + + + + OTG_HS_GINTSTS + OTG_HS_GINTSTS + OTG_HS core interrupt register + 0x14 + 32 + 0x04000020 + + + CMOD + Current mode of operation + 0 + 1 + read-only + + + MMIS + Mode mismatch interrupt + 1 + 1 + read-write + + + OTGINT + OTG interrupt + 2 + 1 + read-only + + + SOF + Start of frame + 3 + 1 + read-write + + + RXFLVL + RxFIFO nonempty + 4 + 1 + read-only + + + NPTXFE + Nonperiodic TxFIFO empty + 5 + 1 + read-only + + + GINAKEFF + Global IN nonperiodic NAK + effective + 6 + 1 + read-only + + + BOUTNAKEFF + Global OUT NAK effective + 7 + 1 + read-only + + + ESUSP + Early suspend + 10 + 1 + read-write + + + USBSUSP + USB suspend + 11 + 1 + read-write + + + USBRST + USB reset + 12 + 1 + read-write + + + ENUMDNE + Enumeration done + 13 + 1 + read-write + + + ISOODRP + Isochronous OUT packet dropped + interrupt + 14 + 1 + read-write + + + EOPF + End of periodic frame + interrupt + 15 + 1 + read-write + + + IEPINT + IN endpoint interrupt + 18 + 1 + read-only + + + OEPINT + OUT endpoint interrupt + 19 + 1 + read-only + + + IISOIXFR + Incomplete isochronous IN + transfer + 20 + 1 + read-write + + + PXFR_INCOMPISOOUT + Incomplete periodic + transfer + 21 + 1 + read-write + + + DATAFSUSP + Data fetch suspended + 22 + 1 + read-write + + + HPRTINT + Host port interrupt + 24 + 1 + read-only + + + HCINT + Host channels interrupt + 25 + 1 + read-only + + + PTXFE + Periodic TxFIFO empty + 26 + 1 + read-only + + + CIDSCHG + Connector ID status change + 28 + 1 + read-write + + + DISCINT + Disconnect detected + interrupt + 29 + 1 + read-write + + + SRQINT + Session request/new session detected + interrupt + 30 + 1 + read-write + + + WKUINT + Resume/remote wakeup detected + interrupt + 31 + 1 + read-write + + + + + OTG_HS_GINTMSK + OTG_HS_GINTMSK + OTG_HS interrupt mask register + 0x18 + 32 + 0x0 + + + MMISM + Mode mismatch interrupt + mask + 1 + 1 + read-write + + + OTGINT + OTG interrupt mask + 2 + 1 + read-write + + + SOFM + Start of frame mask + 3 + 1 + read-write + + + RXFLVLM + Receive FIFO nonempty mask + 4 + 1 + read-write + + + NPTXFEM + Nonperiodic TxFIFO empty + mask + 5 + 1 + read-write + + + GINAKEFFM + Global nonperiodic IN NAK effective + mask + 6 + 1 + read-write + + + GONAKEFFM + Global OUT NAK effective + mask + 7 + 1 + read-write + + + ESUSPM + Early suspend mask + 10 + 1 + read-write + + + USBSUSPM + USB suspend mask + 11 + 1 + read-write + + + USBRST + USB reset mask + 12 + 1 + read-write + + + ENUMDNEM + Enumeration done mask + 13 + 1 + read-write + + + ISOODRPM + Isochronous OUT packet dropped interrupt + mask + 14 + 1 + read-write + + + EOPFM + End of periodic frame interrupt + mask + 15 + 1 + read-write + + + EPMISM + Endpoint mismatch interrupt + mask + 17 + 1 + read-write + + + IEPINT + IN endpoints interrupt + mask + 18 + 1 + read-write + + + OEPINT + OUT endpoints interrupt + mask + 19 + 1 + read-write + + + IISOIXFRM + Incomplete isochronous IN transfer + mask + 20 + 1 + read-write + + + PXFRM_IISOOXFRM + Incomplete periodic transfer + mask + 21 + 1 + read-write + + + FSUSPM + Data fetch suspended mask + 22 + 1 + read-write + + + PRTIM + Host port interrupt mask + 24 + 1 + read-only + + + HCIM + Host channels interrupt + mask + 25 + 1 + read-write + + + PTXFEM + Periodic TxFIFO empty mask + 26 + 1 + read-write + + + CIDSCHGM + Connector ID status change + mask + 28 + 1 + read-write + + + DISCINT + Disconnect detected interrupt + mask + 29 + 1 + read-write + + + SRQIM + Session request/new session detected + interrupt mask + 30 + 1 + read-write + + + WUIM + Resume/remote wakeup detected interrupt + mask + 31 + 1 + read-write + + + + + OTG_HS_GRXSTSR_Host + OTG_HS_GRXSTSR_Host + OTG_HS Receive status debug read register + (host mode) + 0x1C + 32 + read-only + 0x0 + + + CHNUM + Channel number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + + + OTG_HS_GRXSTSP_Host + OTG_HS_GRXSTSP_Host + OTG_HS status read and pop register (host + mode) + 0x20 + 32 + read-only + 0x0 + + + CHNUM + Channel number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + + + OTG_HS_GRXFSIZ + OTG_HS_GRXFSIZ + OTG_HS Receive FIFO size + register + 0x24 + 32 + read-write + 0x00000200 + + + RXFD + RxFIFO depth + 0 + 16 + + + + + OTG_HS_GNPTXFSIZ_Host + OTG_HS_GNPTXFSIZ_Host + OTG_HS nonperiodic transmit FIFO size + register (host mode) + 0x28 + 32 + read-write + 0x00000200 + + + NPTXFSA + Nonperiodic transmit RAM start + address + 0 + 16 + + + NPTXFD + Nonperiodic TxFIFO depth + 16 + 16 + + + + + OTG_HS_TX0FSIZ_Peripheral + OTG_HS_TX0FSIZ_Peripheral + Endpoint 0 transmit FIFO size (peripheral + mode) + OTG_HS_GNPTXFSIZ_Host + 0x28 + 32 + read-write + 0x00000200 + + + TX0FSA + Endpoint 0 transmit RAM start + address + 0 + 16 + + + TX0FD + Endpoint 0 TxFIFO depth + 16 + 16 + + + + + OTG_HS_GNPTXSTS + OTG_HS_GNPTXSTS + OTG_HS nonperiodic transmit FIFO/queue + status register + 0x2C + 32 + read-only + 0x00080200 + + + NPTXFSAV + Nonperiodic TxFIFO space + available + 0 + 16 + + + NPTQXSAV + Nonperiodic transmit request queue space + available + 16 + 8 + + + NPTXQTOP + Top of the nonperiodic transmit request + queue + 24 + 7 + + + + + OTG_HS_GCCFG + OTG_HS_GCCFG + OTG_HS general core configuration + register + 0x38 + 32 + read-write + 0x0 + + + PWRDWN + Power down + 16 + 1 + + + I2CPADEN + Enable I2C bus connection for the + external I2C PHY interface + 17 + 1 + + + VBUSASEN + Enable the VBUS sensing + device + 18 + 1 + + + VBUSBSEN + Enable the VBUS sensing + device + 19 + 1 + + + SOFOUTEN + SOF output enable + 20 + 1 + + + NOVBUSSENS + VBUS sensing disable + option + 21 + 1 + + + + + OTG_HS_CID + OTG_HS_CID + OTG_HS core ID register + 0x3C + 32 + read-write + 0x00001200 + + + PRODUCT_ID + Product ID field + 0 + 32 + + + + + OTG_HS_HPTXFSIZ + OTG_HS_HPTXFSIZ + OTG_HS Host periodic transmit FIFO size + register + 0x100 + 32 + read-write + 0x02000600 + + + PTXSA + Host periodic TxFIFO start + address + 0 + 16 + + + PTXFD + Host periodic TxFIFO depth + 16 + 16 + + + + + OTG_HS_DIEPTXF1 + OTG_HS_DIEPTXF1 + OTG_HS device IN endpoint transmit FIFO size + register + 0x104 + 32 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFOx transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + OTG_HS_DIEPTXF2 + OTG_HS_DIEPTXF2 + OTG_HS device IN endpoint transmit FIFO size + register + 0x108 + 32 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFOx transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + OTG_HS_DIEPTXF3 + OTG_HS_DIEPTXF3 + OTG_HS device IN endpoint transmit FIFO size + register + 0x11C + 32 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFOx transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + OTG_HS_DIEPTXF4 + OTG_HS_DIEPTXF4 + OTG_HS device IN endpoint transmit FIFO size + register + 0x120 + 32 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFOx transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + OTG_HS_DIEPTXF5 + OTG_HS_DIEPTXF5 + OTG_HS device IN endpoint transmit FIFO size + register + 0x124 + 32 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFOx transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + OTG_HS_DIEPTXF6 + OTG_HS_DIEPTXF6 + OTG_HS device IN endpoint transmit FIFO size + register + 0x128 + 32 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFOx transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + OTG_HS_DIEPTXF7 + OTG_HS_DIEPTXF7 + OTG_HS device IN endpoint transmit FIFO size + register + 0x12C + 32 + read-write + 0x02000400 + + + INEPTXSA + IN endpoint FIFOx transmit RAM start + address + 0 + 16 + + + INEPTXFD + IN endpoint TxFIFO depth + 16 + 16 + + + + + OTG_HS_GRXSTSR_Peripheral + OTG_HS_GRXSTSR_Peripheral + OTG_HS Receive status debug read register + (peripheral mode mode) + OTG_HS_GRXSTSR_Host + 0x1C + 32 + read-only + 0x0 + + + EPNUM + Endpoint number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + FRMNUM + Frame number + 21 + 4 + + + + + OTG_HS_GRXSTSP_Peripheral + OTG_HS_GRXSTSP_Peripheral + OTG_HS status read and pop register + (peripheral mode) + OTG_HS_GRXSTSP_Host + 0x20 + 32 + read-only + 0x0 + + + EPNUM + Endpoint number + 0 + 4 + + + BCNT + Byte count + 4 + 11 + + + DPID + Data PID + 15 + 2 + + + PKTSTS + Packet status + 17 + 4 + + + FRMNUM + Frame number + 21 + 4 + + + + + + + OTG_HS_HOST + USB on the go high speed + USB_OTG_HS + 0x40040400 + + 0x0 + 0x400 + registers + + + + OTG_HS_HCFG + OTG_HS_HCFG + OTG_HS host configuration + register + 0x0 + 32 + 0x0 + + + FSLSPCS + FS/LS PHY clock select + 0 + 2 + read-write + + + FSLSS + FS- and LS-only support + 2 + 1 + read-only + + + + + OTG_HS_HFIR + OTG_HS_HFIR + OTG_HS Host frame interval + register + 0x4 + 32 + read-write + 0x0000EA60 + + + FRIVL + Frame interval + 0 + 16 + + + + + OTG_HS_HFNUM + OTG_HS_HFNUM + OTG_HS host frame number/frame time + remaining register + 0x8 + 32 + read-only + 0x00003FFF + + + FRNUM + Frame number + 0 + 16 + + + FTREM + Frame time remaining + 16 + 16 + + + + + OTG_HS_HPTXSTS + OTG_HS_HPTXSTS + OTG_HS_Host periodic transmit FIFO/queue + status register + 0x10 + 32 + 0x00080100 + + + PTXFSAVL + Periodic transmit data FIFO space + available + 0 + 16 + read-write + + + PTXQSAV + Periodic transmit request queue space + available + 16 + 8 + read-only + + + PTXQTOP + Top of the periodic transmit request + queue + 24 + 8 + read-only + + + + + OTG_HS_HAINT + OTG_HS_HAINT + OTG_HS Host all channels interrupt + register + 0x14 + 32 + read-only + 0x0 + + + HAINT + Channel interrupts + 0 + 16 + + + + + OTG_HS_HAINTMSK + OTG_HS_HAINTMSK + OTG_HS host all channels interrupt mask + register + 0x18 + 32 + read-write + 0x0 + + + HAINTM + Channel interrupt mask + 0 + 16 + + + + + OTG_HS_HPRT + OTG_HS_HPRT + OTG_HS host port control and status + register + 0x40 + 32 + 0x0 + + + PCSTS + Port connect status + 0 + 1 + read-only + + + PCDET + Port connect detected + 1 + 1 + read-write + + + PENA + Port enable + 2 + 1 + read-write + + + PENCHNG + Port enable/disable change + 3 + 1 + read-write + + + POCA + Port overcurrent active + 4 + 1 + read-only + + + POCCHNG + Port overcurrent change + 5 + 1 + read-write + + + PRES + Port resume + 6 + 1 + read-write + + + PSUSP + Port suspend + 7 + 1 + read-write + + + PRST + Port reset + 8 + 1 + read-write + + + PLSTS + Port line status + 10 + 2 + read-only + + + PPWR + Port power + 12 + 1 + read-write + + + PTCTL + Port test control + 13 + 4 + read-write + + + PSPD + Port speed + 17 + 2 + read-only + + + + + OTG_HS_HCCHAR0 + OTG_HS_HCCHAR0 + OTG_HS host channel-0 characteristics + register + 0x100 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR1 + OTG_HS_HCCHAR1 + OTG_HS host channel-1 characteristics + register + 0x120 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR2 + OTG_HS_HCCHAR2 + OTG_HS host channel-2 characteristics + register + 0x140 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR3 + OTG_HS_HCCHAR3 + OTG_HS host channel-3 characteristics + register + 0x160 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR4 + OTG_HS_HCCHAR4 + OTG_HS host channel-4 characteristics + register + 0x180 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR5 + OTG_HS_HCCHAR5 + OTG_HS host channel-5 characteristics + register + 0x1A0 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR6 + OTG_HS_HCCHAR6 + OTG_HS host channel-6 characteristics + register + 0x1C0 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR7 + OTG_HS_HCCHAR7 + OTG_HS host channel-7 characteristics + register + 0x1E0 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR8 + OTG_HS_HCCHAR8 + OTG_HS host channel-8 characteristics + register + 0x200 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR9 + OTG_HS_HCCHAR9 + OTG_HS host channel-9 characteristics + register + 0x220 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR10 + OTG_HS_HCCHAR10 + OTG_HS host channel-10 characteristics + register + 0x240 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCCHAR11 + OTG_HS_HCCHAR11 + OTG_HS host channel-11 characteristics + register + 0x260 + 32 + read-write + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + + + EPNUM + Endpoint number + 11 + 4 + + + EPDIR + Endpoint direction + 15 + 1 + + + LSDEV + Low-speed device + 17 + 1 + + + EPTYP + Endpoint type + 18 + 2 + + + MC + Multi Count (MC) / Error Count + (EC) + 20 + 2 + + + DAD + Device address + 22 + 7 + + + ODDFRM + Odd frame + 29 + 1 + + + CHDIS + Channel disable + 30 + 1 + + + CHENA + Channel enable + 31 + 1 + + + + + OTG_HS_HCSPLT0 + OTG_HS_HCSPLT0 + OTG_HS host channel-0 split control + register + 0x104 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT1 + OTG_HS_HCSPLT1 + OTG_HS host channel-1 split control + register + 0x124 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT2 + OTG_HS_HCSPLT2 + OTG_HS host channel-2 split control + register + 0x144 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT3 + OTG_HS_HCSPLT3 + OTG_HS host channel-3 split control + register + 0x164 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT4 + OTG_HS_HCSPLT4 + OTG_HS host channel-4 split control + register + 0x184 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT5 + OTG_HS_HCSPLT5 + OTG_HS host channel-5 split control + register + 0x1A4 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT6 + OTG_HS_HCSPLT6 + OTG_HS host channel-6 split control + register + 0x1C4 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT7 + OTG_HS_HCSPLT7 + OTG_HS host channel-7 split control + register + 0x1E4 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT8 + OTG_HS_HCSPLT8 + OTG_HS host channel-8 split control + register + 0x204 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT9 + OTG_HS_HCSPLT9 + OTG_HS host channel-9 split control + register + 0x224 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT10 + OTG_HS_HCSPLT10 + OTG_HS host channel-10 split control + register + 0x244 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCSPLT11 + OTG_HS_HCSPLT11 + OTG_HS host channel-11 split control + register + 0x264 + 32 + read-write + 0x0 + + + PRTADDR + Port address + 0 + 7 + + + HUBADDR + Hub address + 7 + 7 + + + XACTPOS + XACTPOS + 14 + 2 + + + COMPLSPLT + Do complete split + 16 + 1 + + + SPLITEN + Split enable + 31 + 1 + + + + + OTG_HS_HCINT0 + OTG_HS_HCINT0 + OTG_HS host channel-11 interrupt + register + 0x108 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT1 + OTG_HS_HCINT1 + OTG_HS host channel-1 interrupt + register + 0x128 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT2 + OTG_HS_HCINT2 + OTG_HS host channel-2 interrupt + register + 0x148 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT3 + OTG_HS_HCINT3 + OTG_HS host channel-3 interrupt + register + 0x168 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT4 + OTG_HS_HCINT4 + OTG_HS host channel-4 interrupt + register + 0x188 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT5 + OTG_HS_HCINT5 + OTG_HS host channel-5 interrupt + register + 0x1A8 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT6 + OTG_HS_HCINT6 + OTG_HS host channel-6 interrupt + register + 0x1C8 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT7 + OTG_HS_HCINT7 + OTG_HS host channel-7 interrupt + register + 0x1E8 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT8 + OTG_HS_HCINT8 + OTG_HS host channel-8 interrupt + register + 0x208 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT9 + OTG_HS_HCINT9 + OTG_HS host channel-9 interrupt + register + 0x228 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT10 + OTG_HS_HCINT10 + OTG_HS host channel-10 interrupt + register + 0x248 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINT11 + OTG_HS_HCINT11 + OTG_HS host channel-11 interrupt + register + 0x268 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + 0 + 1 + + + CHH + Channel halted + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALL + STALL response received + interrupt + 3 + 1 + + + NAK + NAK response received + interrupt + 4 + 1 + + + ACK + ACK response received/transmitted + interrupt + 5 + 1 + + + NYET + Response received + interrupt + 6 + 1 + + + TXERR + Transaction error + 7 + 1 + + + BBERR + Babble error + 8 + 1 + + + FRMOR + Frame overrun + 9 + 1 + + + DTERR + Data toggle error + 10 + 1 + + + + + OTG_HS_HCINTMSK0 + OTG_HS_HCINTMSK0 + OTG_HS host channel-11 interrupt mask + register + 0x10C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK1 + OTG_HS_HCINTMSK1 + OTG_HS host channel-1 interrupt mask + register + 0x12C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK2 + OTG_HS_HCINTMSK2 + OTG_HS host channel-2 interrupt mask + register + 0x14C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK3 + OTG_HS_HCINTMSK3 + OTG_HS host channel-3 interrupt mask + register + 0x16C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK4 + OTG_HS_HCINTMSK4 + OTG_HS host channel-4 interrupt mask + register + 0x18C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK5 + OTG_HS_HCINTMSK5 + OTG_HS host channel-5 interrupt mask + register + 0x1AC + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK6 + OTG_HS_HCINTMSK6 + OTG_HS host channel-6 interrupt mask + register + 0x1CC + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK7 + OTG_HS_HCINTMSK7 + OTG_HS host channel-7 interrupt mask + register + 0x1EC + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK8 + OTG_HS_HCINTMSK8 + OTG_HS host channel-8 interrupt mask + register + 0x20C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK9 + OTG_HS_HCINTMSK9 + OTG_HS host channel-9 interrupt mask + register + 0x22C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK10 + OTG_HS_HCINTMSK10 + OTG_HS host channel-10 interrupt mask + register + 0x24C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCINTMSK11 + OTG_HS_HCINTMSK11 + OTG_HS host channel-11 interrupt mask + register + 0x26C + 32 + read-write + 0x0 + + + XFRCM + Transfer completed mask + 0 + 1 + + + CHHM + Channel halted mask + 1 + 1 + + + AHBERR + AHB error + 2 + 1 + + + STALLM + STALL response received interrupt + mask + 3 + 1 + + + NAKM + NAK response received interrupt + mask + 4 + 1 + + + ACKM + ACK response received/transmitted + interrupt mask + 5 + 1 + + + NYET + response received interrupt + mask + 6 + 1 + + + TXERRM + Transaction error mask + 7 + 1 + + + BBERRM + Babble error mask + 8 + 1 + + + FRMORM + Frame overrun mask + 9 + 1 + + + DTERRM + Data toggle error mask + 10 + 1 + + + + + OTG_HS_HCTSIZ0 + OTG_HS_HCTSIZ0 + OTG_HS host channel-11 transfer size + register + 0x110 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ1 + OTG_HS_HCTSIZ1 + OTG_HS host channel-1 transfer size + register + 0x130 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ2 + OTG_HS_HCTSIZ2 + OTG_HS host channel-2 transfer size + register + 0x150 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ3 + OTG_HS_HCTSIZ3 + OTG_HS host channel-3 transfer size + register + 0x170 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ4 + OTG_HS_HCTSIZ4 + OTG_HS host channel-4 transfer size + register + 0x190 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ5 + OTG_HS_HCTSIZ5 + OTG_HS host channel-5 transfer size + register + 0x1B0 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ6 + OTG_HS_HCTSIZ6 + OTG_HS host channel-6 transfer size + register + 0x1D0 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ7 + OTG_HS_HCTSIZ7 + OTG_HS host channel-7 transfer size + register + 0x1F0 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ8 + OTG_HS_HCTSIZ8 + OTG_HS host channel-8 transfer size + register + 0x210 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ9 + OTG_HS_HCTSIZ9 + OTG_HS host channel-9 transfer size + register + 0x230 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ10 + OTG_HS_HCTSIZ10 + OTG_HS host channel-10 transfer size + register + 0x250 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCTSIZ11 + OTG_HS_HCTSIZ11 + OTG_HS host channel-11 transfer size + register + 0x270 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + DPID + Data PID + 29 + 2 + + + + + OTG_HS_HCDMA0 + OTG_HS_HCDMA0 + OTG_HS host channel-0 DMA address + register + 0x114 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA1 + OTG_HS_HCDMA1 + OTG_HS host channel-1 DMA address + register + 0x134 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA2 + OTG_HS_HCDMA2 + OTG_HS host channel-2 DMA address + register + 0x154 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA3 + OTG_HS_HCDMA3 + OTG_HS host channel-3 DMA address + register + 0x174 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA4 + OTG_HS_HCDMA4 + OTG_HS host channel-4 DMA address + register + 0x194 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA5 + OTG_HS_HCDMA5 + OTG_HS host channel-5 DMA address + register + 0x1B4 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA6 + OTG_HS_HCDMA6 + OTG_HS host channel-6 DMA address + register + 0x1D4 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA7 + OTG_HS_HCDMA7 + OTG_HS host channel-7 DMA address + register + 0x1F4 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA8 + OTG_HS_HCDMA8 + OTG_HS host channel-8 DMA address + register + 0x214 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA9 + OTG_HS_HCDMA9 + OTG_HS host channel-9 DMA address + register + 0x234 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA10 + OTG_HS_HCDMA10 + OTG_HS host channel-10 DMA address + register + 0x254 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_HCDMA11 + OTG_HS_HCDMA11 + OTG_HS host channel-11 DMA address + register + 0x274 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + + + OTG_HS_DEVICE + USB on the go high speed + USB_OTG_HS + 0x40040800 + + 0x0 + 0x400 + registers + + + + OTG_HS_DCFG + OTG_HS_DCFG + OTG_HS device configuration + register + 0x0 + 32 + read-write + 0x02200000 + + + DSPD + Device speed + 0 + 2 + + + NZLSOHSK + Nonzero-length status OUT + handshake + 2 + 1 + + + DAD + Device address + 4 + 7 + + + PFIVL + Periodic (micro)frame + interval + 11 + 2 + + + PERSCHIVL + Periodic scheduling + interval + 24 + 2 + + + + + OTG_HS_DCTL + OTG_HS_DCTL + OTG_HS device control register + 0x4 + 32 + 0x0 + + + RWUSIG + Remote wakeup signaling + 0 + 1 + read-write + + + SDIS + Soft disconnect + 1 + 1 + read-write + + + GINSTS + Global IN NAK status + 2 + 1 + read-only + + + GONSTS + Global OUT NAK status + 3 + 1 + read-only + + + TCTL + Test control + 4 + 3 + read-write + + + SGINAK + Set global IN NAK + 7 + 1 + write-only + + + CGINAK + Clear global IN NAK + 8 + 1 + write-only + + + SGONAK + Set global OUT NAK + 9 + 1 + write-only + + + CGONAK + Clear global OUT NAK + 10 + 1 + write-only + + + POPRGDNE + Power-on programming done + 11 + 1 + read-write + + + + + OTG_HS_DSTS + OTG_HS_DSTS + OTG_HS device status register + 0x8 + 32 + read-only + 0x00000010 + + + SUSPSTS + Suspend status + 0 + 1 + + + ENUMSPD + Enumerated speed + 1 + 2 + + + EERR + Erratic error + 3 + 1 + + + FNSOF + Frame number of the received + SOF + 8 + 14 + + + + + OTG_HS_DIEPMSK + OTG_HS_DIEPMSK + OTG_HS device IN endpoint common interrupt + mask register + 0x10 + 32 + read-write + 0x0 + + + XFRCM + Transfer completed interrupt + mask + 0 + 1 + + + EPDM + Endpoint disabled interrupt + mask + 1 + 1 + + + TOM + Timeout condition mask (nonisochronous + endpoints) + 3 + 1 + + + ITTXFEMSK + IN token received when TxFIFO empty + mask + 4 + 1 + + + INEPNMM + IN token received with EP mismatch + mask + 5 + 1 + + + INEPNEM + IN endpoint NAK effective + mask + 6 + 1 + + + TXFURM + FIFO underrun mask + 8 + 1 + + + BIM + BNA interrupt mask + 9 + 1 + + + + + OTG_HS_DOEPMSK + OTG_HS_DOEPMSK + OTG_HS device OUT endpoint common interrupt + mask register + 0x14 + 32 + read-write + 0x0 + + + XFRCM + Transfer completed interrupt + mask + 0 + 1 + + + EPDM + Endpoint disabled interrupt + mask + 1 + 1 + + + STUPM + SETUP phase done mask + 3 + 1 + + + OTEPDM + OUT token received when endpoint + disabled mask + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets received + mask + 6 + 1 + + + OPEM + OUT packet error mask + 8 + 1 + + + BOIM + BNA interrupt mask + 9 + 1 + + + + + OTG_HS_DAINT + OTG_HS_DAINT + OTG_HS device all endpoints interrupt + register + 0x18 + 32 + read-only + 0x0 + + + IEPINT + IN endpoint interrupt bits + 0 + 16 + + + OEPINT + OUT endpoint interrupt + bits + 16 + 16 + + + + + OTG_HS_DAINTMSK + OTG_HS_DAINTMSK + OTG_HS all endpoints interrupt mask + register + 0x1C + 32 + read-write + 0x0 + + + IEPM + IN EP interrupt mask bits + 0 + 16 + + + OEPM + OUT EP interrupt mask bits + 16 + 16 + + + + + OTG_HS_DVBUSDIS + OTG_HS_DVBUSDIS + OTG_HS device VBUS discharge time + register + 0x28 + 32 + read-write + 0x000017D7 + + + VBUSDT + Device VBUS discharge time + 0 + 16 + + + + + OTG_HS_DVBUSPULSE + OTG_HS_DVBUSPULSE + OTG_HS device VBUS pulsing time + register + 0x2C + 32 + read-write + 0x000005B8 + + + DVBUSP + Device VBUS pulsing time + 0 + 12 + + + + + OTG_HS_DTHRCTL + OTG_HS_DTHRCTL + OTG_HS Device threshold control + register + 0x30 + 32 + read-write + 0x0 + + + NONISOTHREN + Nonisochronous IN endpoints threshold + enable + 0 + 1 + + + ISOTHREN + ISO IN endpoint threshold + enable + 1 + 1 + + + TXTHRLEN + Transmit threshold length + 2 + 9 + + + RXTHREN + Receive threshold enable + 16 + 1 + + + RXTHRLEN + Receive threshold length + 17 + 9 + + + ARPEN + Arbiter parking enable + 27 + 1 + + + + + OTG_HS_DIEPEMPMSK + OTG_HS_DIEPEMPMSK + OTG_HS device IN endpoint FIFO empty + interrupt mask register + 0x34 + 32 + read-write + 0x0 + + + INEPTXFEM + IN EP Tx FIFO empty interrupt mask + bits + 0 + 16 + + + + + OTG_HS_DEACHINT + OTG_HS_DEACHINT + OTG_HS device each endpoint interrupt + register + 0x38 + 32 + read-write + 0x0 + + + IEP1INT + IN endpoint 1interrupt bit + 1 + 1 + + + OEP1INT + OUT endpoint 1 interrupt + bit + 17 + 1 + + + + + OTG_HS_DEACHINTMSK + OTG_HS_DEACHINTMSK + OTG_HS device each endpoint interrupt + register mask + 0x3C + 32 + read-write + 0x0 + + + IEP1INTM + IN Endpoint 1 interrupt mask + bit + 1 + 1 + + + OEP1INTM + OUT Endpoint 1 interrupt mask + bit + 17 + 1 + + + + + OTG_HS_DIEPEACHMSK1 + OTG_HS_DIEPEACHMSK1 + OTG_HS device each in endpoint-1 interrupt + register + 0x40 + 32 + read-write + 0x0 + + + XFRCM + Transfer completed interrupt + mask + 0 + 1 + + + EPDM + Endpoint disabled interrupt + mask + 1 + 1 + + + TOM + Timeout condition mask (nonisochronous + endpoints) + 3 + 1 + + + ITTXFEMSK + IN token received when TxFIFO empty + mask + 4 + 1 + + + INEPNMM + IN token received with EP mismatch + mask + 5 + 1 + + + INEPNEM + IN endpoint NAK effective + mask + 6 + 1 + + + TXFURM + FIFO underrun mask + 8 + 1 + + + BIM + BNA interrupt mask + 9 + 1 + + + NAKM + NAK interrupt mask + 13 + 1 + + + + + OTG_HS_DOEPEACHMSK1 + OTG_HS_DOEPEACHMSK1 + OTG_HS device each OUT endpoint-1 interrupt + register + 0x80 + 32 + read-write + 0x0 + + + XFRCM + Transfer completed interrupt + mask + 0 + 1 + + + EPDM + Endpoint disabled interrupt + mask + 1 + 1 + + + TOM + Timeout condition mask + 3 + 1 + + + ITTXFEMSK + IN token received when TxFIFO empty + mask + 4 + 1 + + + INEPNMM + IN token received with EP mismatch + mask + 5 + 1 + + + INEPNEM + IN endpoint NAK effective + mask + 6 + 1 + + + TXFURM + OUT packet error mask + 8 + 1 + + + BIM + BNA interrupt mask + 9 + 1 + + + BERRM + Bubble error interrupt + mask + 12 + 1 + + + NAKM + NAK interrupt mask + 13 + 1 + + + NYETM + NYET interrupt mask + 14 + 1 + + + + + OTG_HS_DIEPCTL0 + OTG_HS_DIEPCTL0 + OTG device endpoint-0 control + register + 0x100 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even/odd frame + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DIEPCTL1 + OTG_HS_DIEPCTL1 + OTG device endpoint-1 control + register + 0x120 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even/odd frame + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DIEPCTL2 + OTG_HS_DIEPCTL2 + OTG device endpoint-2 control + register + 0x140 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even/odd frame + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DIEPCTL3 + OTG_HS_DIEPCTL3 + OTG device endpoint-3 control + register + 0x160 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even/odd frame + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DIEPCTL4 + OTG_HS_DIEPCTL4 + OTG device endpoint-4 control + register + 0x180 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even/odd frame + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DIEPCTL5 + OTG_HS_DIEPCTL5 + OTG device endpoint-5 control + register + 0x1A0 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even/odd frame + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DIEPCTL6 + OTG_HS_DIEPCTL6 + OTG device endpoint-6 control + register + 0x1C0 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even/odd frame + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DIEPCTL7 + OTG_HS_DIEPCTL7 + OTG device endpoint-7 control + register + 0x1E0 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even/odd frame + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + TXFNUM + TxFIFO number + 22 + 4 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DIEPINT0 + OTG_HS_DIEPINT0 + OTG device endpoint-0 interrupt + register + 0x108 + 32 + 0x00000080 + + + XFRC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TOC + Timeout condition + 3 + 1 + read-write + + + ITTXFE + IN token received when TxFIFO is + empty + 4 + 1 + read-write + + + INEPNE + IN endpoint NAK effective + 6 + 1 + read-write + + + TXFE + Transmit FIFO empty + 7 + 1 + read-only + + + TXFIFOUDRN + Transmit Fifo Underrun + 8 + 1 + read-write + + + BNA + Buffer not available + interrupt + 9 + 1 + read-write + + + PKTDRPSTS + Packet dropped status + 11 + 1 + read-write + + + BERR + Babble error interrupt + 12 + 1 + read-write + + + NAK + NAK interrupt + 13 + 1 + read-write + + + + + OTG_HS_DIEPINT1 + OTG_HS_DIEPINT1 + OTG device endpoint-1 interrupt + register + 0x128 + 32 + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TOC + Timeout condition + 3 + 1 + read-write + + + ITTXFE + IN token received when TxFIFO is + empty + 4 + 1 + read-write + + + INEPNE + IN endpoint NAK effective + 6 + 1 + read-write + + + TXFE + Transmit FIFO empty + 7 + 1 + read-only + + + TXFIFOUDRN + Transmit Fifo Underrun + 8 + 1 + read-write + + + BNA + Buffer not available + interrupt + 9 + 1 + read-write + + + PKTDRPSTS + Packet dropped status + 11 + 1 + read-write + + + BERR + Babble error interrupt + 12 + 1 + read-write + + + NAK + NAK interrupt + 13 + 1 + read-write + + + + + OTG_HS_DIEPINT2 + OTG_HS_DIEPINT2 + OTG device endpoint-2 interrupt + register + 0x148 + 32 + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TOC + Timeout condition + 3 + 1 + read-write + + + ITTXFE + IN token received when TxFIFO is + empty + 4 + 1 + read-write + + + INEPNE + IN endpoint NAK effective + 6 + 1 + read-write + + + TXFE + Transmit FIFO empty + 7 + 1 + read-only + + + TXFIFOUDRN + Transmit Fifo Underrun + 8 + 1 + read-write + + + BNA + Buffer not available + interrupt + 9 + 1 + read-write + + + PKTDRPSTS + Packet dropped status + 11 + 1 + read-write + + + BERR + Babble error interrupt + 12 + 1 + read-write + + + NAK + NAK interrupt + 13 + 1 + read-write + + + + + OTG_HS_DIEPINT3 + OTG_HS_DIEPINT3 + OTG device endpoint-3 interrupt + register + 0x168 + 32 + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TOC + Timeout condition + 3 + 1 + read-write + + + ITTXFE + IN token received when TxFIFO is + empty + 4 + 1 + read-write + + + INEPNE + IN endpoint NAK effective + 6 + 1 + read-write + + + TXFE + Transmit FIFO empty + 7 + 1 + read-only + + + TXFIFOUDRN + Transmit Fifo Underrun + 8 + 1 + read-write + + + BNA + Buffer not available + interrupt + 9 + 1 + read-write + + + PKTDRPSTS + Packet dropped status + 11 + 1 + read-write + + + BERR + Babble error interrupt + 12 + 1 + read-write + + + NAK + NAK interrupt + 13 + 1 + read-write + + + + + OTG_HS_DIEPINT4 + OTG_HS_DIEPINT4 + OTG device endpoint-4 interrupt + register + 0x188 + 32 + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TOC + Timeout condition + 3 + 1 + read-write + + + ITTXFE + IN token received when TxFIFO is + empty + 4 + 1 + read-write + + + INEPNE + IN endpoint NAK effective + 6 + 1 + read-write + + + TXFE + Transmit FIFO empty + 7 + 1 + read-only + + + TXFIFOUDRN + Transmit Fifo Underrun + 8 + 1 + read-write + + + BNA + Buffer not available + interrupt + 9 + 1 + read-write + + + PKTDRPSTS + Packet dropped status + 11 + 1 + read-write + + + BERR + Babble error interrupt + 12 + 1 + read-write + + + NAK + NAK interrupt + 13 + 1 + read-write + + + + + OTG_HS_DIEPINT5 + OTG_HS_DIEPINT5 + OTG device endpoint-5 interrupt + register + 0x1A8 + 32 + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TOC + Timeout condition + 3 + 1 + read-write + + + ITTXFE + IN token received when TxFIFO is + empty + 4 + 1 + read-write + + + INEPNE + IN endpoint NAK effective + 6 + 1 + read-write + + + TXFE + Transmit FIFO empty + 7 + 1 + read-only + + + TXFIFOUDRN + Transmit Fifo Underrun + 8 + 1 + read-write + + + BNA + Buffer not available + interrupt + 9 + 1 + read-write + + + PKTDRPSTS + Packet dropped status + 11 + 1 + read-write + + + BERR + Babble error interrupt + 12 + 1 + read-write + + + NAK + NAK interrupt + 13 + 1 + read-write + + + + + OTG_HS_DIEPINT6 + OTG_HS_DIEPINT6 + OTG device endpoint-6 interrupt + register + 0x1C8 + 32 + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TOC + Timeout condition + 3 + 1 + read-write + + + ITTXFE + IN token received when TxFIFO is + empty + 4 + 1 + read-write + + + INEPNE + IN endpoint NAK effective + 6 + 1 + read-write + + + TXFE + Transmit FIFO empty + 7 + 1 + read-only + + + TXFIFOUDRN + Transmit Fifo Underrun + 8 + 1 + read-write + + + BNA + Buffer not available + interrupt + 9 + 1 + read-write + + + PKTDRPSTS + Packet dropped status + 11 + 1 + read-write + + + BERR + Babble error interrupt + 12 + 1 + read-write + + + NAK + NAK interrupt + 13 + 1 + read-write + + + + + OTG_HS_DIEPINT7 + OTG_HS_DIEPINT7 + OTG device endpoint-7 interrupt + register + 0x1E8 + 32 + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + read-write + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + read-write + + + TOC + Timeout condition + 3 + 1 + read-write + + + ITTXFE + IN token received when TxFIFO is + empty + 4 + 1 + read-write + + + INEPNE + IN endpoint NAK effective + 6 + 1 + read-write + + + TXFE + Transmit FIFO empty + 7 + 1 + read-only + + + TXFIFOUDRN + Transmit Fifo Underrun + 8 + 1 + read-write + + + BNA + Buffer not available + interrupt + 9 + 1 + read-write + + + PKTDRPSTS + Packet dropped status + 11 + 1 + read-write + + + BERR + Babble error interrupt + 12 + 1 + read-write + + + NAK + NAK interrupt + 13 + 1 + read-write + + + + + OTG_HS_DIEPTSIZ0 + OTG_HS_DIEPTSIZ0 + OTG_HS device IN endpoint 0 transfer size + register + 0x110 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 2 + + + + + OTG_HS_DIEPDMA1 + OTG_HS_DIEPDMA1 + OTG_HS device endpoint-1 DMA address + register + 0x114 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_DIEPDMA2 + OTG_HS_DIEPDMA2 + OTG_HS device endpoint-2 DMA address + register + 0x134 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_DIEPDMA3 + OTG_HS_DIEPDMA3 + OTG_HS device endpoint-3 DMA address + register + 0x154 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_DIEPDMA4 + OTG_HS_DIEPDMA4 + OTG_HS device endpoint-4 DMA address + register + 0x174 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_DIEPDMA5 + OTG_HS_DIEPDMA5 + OTG_HS device endpoint-5 DMA address + register + 0x194 + 32 + read-write + 0x0 + + + DMAADDR + DMA address + 0 + 32 + + + + + OTG_HS_DTXFSTS0 + OTG_HS_DTXFSTS0 + OTG_HS device IN endpoint transmit FIFO + status register + 0x118 + 32 + read-only + 0x0 + + + INEPTFSAV + IN endpoint TxFIFO space + avail + 0 + 16 + + + + + OTG_HS_DTXFSTS1 + OTG_HS_DTXFSTS1 + OTG_HS device IN endpoint transmit FIFO + status register + 0x138 + 32 + read-only + 0x0 + + + INEPTFSAV + IN endpoint TxFIFO space + avail + 0 + 16 + + + + + OTG_HS_DTXFSTS2 + OTG_HS_DTXFSTS2 + OTG_HS device IN endpoint transmit FIFO + status register + 0x158 + 32 + read-only + 0x0 + + + INEPTFSAV + IN endpoint TxFIFO space + avail + 0 + 16 + + + + + OTG_HS_DTXFSTS3 + OTG_HS_DTXFSTS3 + OTG_HS device IN endpoint transmit FIFO + status register + 0x178 + 32 + read-only + 0x0 + + + INEPTFSAV + IN endpoint TxFIFO space + avail + 0 + 16 + + + + + OTG_HS_DTXFSTS4 + OTG_HS_DTXFSTS4 + OTG_HS device IN endpoint transmit FIFO + status register + 0x198 + 32 + read-only + 0x0 + + + INEPTFSAV + IN endpoint TxFIFO space + avail + 0 + 16 + + + + + OTG_HS_DTXFSTS5 + OTG_HS_DTXFSTS5 + OTG_HS device IN endpoint transmit FIFO + status register + 0x1B8 + 32 + read-only + 0x0 + + + INEPTFSAV + IN endpoint TxFIFO space + avail + 0 + 16 + + + + + OTG_HS_DIEPTSIZ1 + OTG_HS_DIEPTSIZ1 + OTG_HS device endpoint transfer size + register + 0x130 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MCNT + Multi count + 29 + 2 + + + + + OTG_HS_DIEPTSIZ2 + OTG_HS_DIEPTSIZ2 + OTG_HS device endpoint transfer size + register + 0x150 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MCNT + Multi count + 29 + 2 + + + + + OTG_HS_DIEPTSIZ3 + OTG_HS_DIEPTSIZ3 + OTG_HS device endpoint transfer size + register + 0x170 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MCNT + Multi count + 29 + 2 + + + + + OTG_HS_DIEPTSIZ4 + OTG_HS_DIEPTSIZ4 + OTG_HS device endpoint transfer size + register + 0x190 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MCNT + Multi count + 29 + 2 + + + + + OTG_HS_DIEPTSIZ5 + OTG_HS_DIEPTSIZ5 + OTG_HS device endpoint transfer size + register + 0x1B0 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + MCNT + Multi count + 29 + 2 + + + + + OTG_HS_DOEPCTL0 + OTG_HS_DOEPCTL0 + OTG_HS device control OUT endpoint 0 control + register + 0x300 + 32 + 0x00008000 + + + MPSIZ + Maximum packet size + 0 + 2 + read-only + + + USBAEP + USB active endpoint + 15 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-only + + + SNPM + Snoop mode + 20 + 1 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-only + + + EPENA + Endpoint enable + 31 + 1 + write-only + + + + + OTG_HS_DOEPCTL1 + OTG_HS_DOEPCTL1 + OTG device endpoint-1 control + register + 0x320 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even odd frame/Endpoint data + PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + SNPM + Snoop mode + 20 + 1 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID/Set even + frame + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DOEPCTL2 + OTG_HS_DOEPCTL2 + OTG device endpoint-2 control + register + 0x340 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even odd frame/Endpoint data + PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + SNPM + Snoop mode + 20 + 1 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID/Set even + frame + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DOEPCTL3 + OTG_HS_DOEPCTL3 + OTG device endpoint-3 control + register + 0x360 + 32 + 0x0 + + + MPSIZ + Maximum packet size + 0 + 11 + read-write + + + USBAEP + USB active endpoint + 15 + 1 + read-write + + + EONUM_DPID + Even odd frame/Endpoint data + PID + 16 + 1 + read-only + + + NAKSTS + NAK status + 17 + 1 + read-only + + + EPTYP + Endpoint type + 18 + 2 + read-write + + + SNPM + Snoop mode + 20 + 1 + read-write + + + Stall + STALL handshake + 21 + 1 + read-write + + + CNAK + Clear NAK + 26 + 1 + write-only + + + SNAK + Set NAK + 27 + 1 + write-only + + + SD0PID_SEVNFRM + Set DATA0 PID/Set even + frame + 28 + 1 + write-only + + + SODDFRM + Set odd frame + 29 + 1 + write-only + + + EPDIS + Endpoint disable + 30 + 1 + read-write + + + EPENA + Endpoint enable + 31 + 1 + read-write + + + + + OTG_HS_DOEPINT0 + OTG_HS_DOEPINT0 + OTG_HS device endpoint-0 interrupt + register + 0x308 + 32 + read-write + 0x00000080 + + + XFRC + Transfer completed + interrupt + 0 + 1 + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + + + STUP + SETUP phase done + 3 + 1 + + + OTEPDIS + OUT token received when endpoint + disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets + received + 6 + 1 + + + NYET + NYET interrupt + 14 + 1 + + + + + OTG_HS_DOEPINT1 + OTG_HS_DOEPINT1 + OTG_HS device endpoint-1 interrupt + register + 0x328 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + + + STUP + SETUP phase done + 3 + 1 + + + OTEPDIS + OUT token received when endpoint + disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets + received + 6 + 1 + + + NYET + NYET interrupt + 14 + 1 + + + + + OTG_HS_DOEPINT2 + OTG_HS_DOEPINT2 + OTG_HS device endpoint-2 interrupt + register + 0x348 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + + + STUP + SETUP phase done + 3 + 1 + + + OTEPDIS + OUT token received when endpoint + disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets + received + 6 + 1 + + + NYET + NYET interrupt + 14 + 1 + + + + + OTG_HS_DOEPINT3 + OTG_HS_DOEPINT3 + OTG_HS device endpoint-3 interrupt + register + 0x368 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + + + STUP + SETUP phase done + 3 + 1 + + + OTEPDIS + OUT token received when endpoint + disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets + received + 6 + 1 + + + NYET + NYET interrupt + 14 + 1 + + + + + OTG_HS_DOEPINT4 + OTG_HS_DOEPINT4 + OTG_HS device endpoint-4 interrupt + register + 0x388 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + + + STUP + SETUP phase done + 3 + 1 + + + OTEPDIS + OUT token received when endpoint + disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets + received + 6 + 1 + + + NYET + NYET interrupt + 14 + 1 + + + + + OTG_HS_DOEPINT5 + OTG_HS_DOEPINT5 + OTG_HS device endpoint-5 interrupt + register + 0x3A8 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + + + STUP + SETUP phase done + 3 + 1 + + + OTEPDIS + OUT token received when endpoint + disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets + received + 6 + 1 + + + NYET + NYET interrupt + 14 + 1 + + + + + OTG_HS_DOEPINT6 + OTG_HS_DOEPINT6 + OTG_HS device endpoint-6 interrupt + register + 0x3C8 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + + + STUP + SETUP phase done + 3 + 1 + + + OTEPDIS + OUT token received when endpoint + disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets + received + 6 + 1 + + + NYET + NYET interrupt + 14 + 1 + + + + + OTG_HS_DOEPINT7 + OTG_HS_DOEPINT7 + OTG_HS device endpoint-7 interrupt + register + 0x3E8 + 32 + read-write + 0x0 + + + XFRC + Transfer completed + interrupt + 0 + 1 + + + EPDISD + Endpoint disabled + interrupt + 1 + 1 + + + STUP + SETUP phase done + 3 + 1 + + + OTEPDIS + OUT token received when endpoint + disabled + 4 + 1 + + + B2BSTUP + Back-to-back SETUP packets + received + 6 + 1 + + + NYET + NYET interrupt + 14 + 1 + + + + + OTG_HS_DOEPTSIZ0 + OTG_HS_DOEPTSIZ0 + OTG_HS device endpoint-1 transfer size + register + 0x310 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 7 + + + PKTCNT + Packet count + 19 + 1 + + + STUPCNT + SETUP packet count + 29 + 2 + + + + + OTG_HS_DOEPTSIZ1 + OTG_HS_DOEPTSIZ1 + OTG_HS device endpoint-2 transfer size + register + 0x330 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID_STUPCNT + Received data PID/SETUP packet + count + 29 + 2 + + + + + OTG_HS_DOEPTSIZ2 + OTG_HS_DOEPTSIZ2 + OTG_HS device endpoint-3 transfer size + register + 0x350 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID_STUPCNT + Received data PID/SETUP packet + count + 29 + 2 + + + + + OTG_HS_DOEPTSIZ3 + OTG_HS_DOEPTSIZ3 + OTG_HS device endpoint-4 transfer size + register + 0x370 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID_STUPCNT + Received data PID/SETUP packet + count + 29 + 2 + + + + + OTG_HS_DOEPTSIZ4 + OTG_HS_DOEPTSIZ4 + OTG_HS device endpoint-5 transfer size + register + 0x390 + 32 + read-write + 0x0 + + + XFRSIZ + Transfer size + 0 + 19 + + + PKTCNT + Packet count + 19 + 10 + + + RXDPID_STUPCNT + Received data PID/SETUP packet + count + 29 + 2 + + + + + + + OTG_HS_PWRCLK + USB on the go high speed + USB_OTG_HS + 0x40040E00 + + 0x0 + 0x3F200 + registers + + + + OTG_HS_PCGCR + OTG_HS_PCGCR + Power and clock gating control + register + 0x0 + 32 + read-write + 0x0 + + + STPPCLK + Stop PHY clock + 0 + 1 + + + GATEHCLK + Gate HCLK + 1 + 1 + + + PHYSUSP + PHY suspended + 4 + 1 + + + + + + + LTDC + LCD-TFT Controller + LTDC + 0x40016800 + + 0x0 + 0x400 + registers + + + LCD_TFT + LTDC global interrupt + 88 + + + LCD_TFT_1 + LTDC global error interrupt + 89 + + + + SSCR + SSCR + Synchronization Size Configuration + Register + 0x8 + 0x20 + read-write + 0x00000000 + + + HSW + Horizontal Synchronization Width (in + units of pixel clock period) + 16 + 12 + + + VSH + Vertical Synchronization Height (in + units of horizontal scan line) + 0 + 11 + + + + + BPCR + BPCR + Back Porch Configuration + Register + 0xC + 0x20 + read-write + 0x00000000 + + + AHBP + Accumulated Horizontal back porch (in + units of pixel clock period) + 16 + 12 + + + AVBP + Accumulated Vertical back porch (in + units of horizontal scan line) + 0 + 11 + + + + + AWCR + AWCR + Active Width Configuration + Register + 0x10 + 0x20 + read-write + 0x00000000 + + + AAW + Accumulated Active Width (in units of pixel clock period) + 16 + 12 + + + AAH + Accumulated Active Height (in units of + horizontal scan line) + 0 + 11 + + + + + TWCR + TWCR + Total Width Configuration + Register + 0x14 + 0x20 + read-write + 0x00000000 + + + TOTALW + Total Width (in units of pixel clock + period) + 16 + 12 + + + TOTALH + Total Height (in units of horizontal + scan line) + 0 + 11 + + + + + GCR + GCR + Global Control Register + 0x18 + 0x20 + 0x00002220 + + + HSPOL + Horizontal Synchronization + Polarity + 31 + 1 + read-write + + + VSPOL + Vertical Synchronization + Polarity + 30 + 1 + read-write + + + DEPOL + Data Enable Polarity + 29 + 1 + read-write + + + PCPOL + Pixel Clock Polarity + 28 + 1 + read-write + + + DEN + Dither Enable + 16 + 1 + read-write + + + DRW + Dither Red Width + 12 + 3 + read-only + + + DGW + Dither Green Width + 8 + 3 + read-only + + + DBW + Dither Blue Width + 4 + 3 + read-only + + + LTDCEN + LCD-TFT controller enable + bit + 0 + 1 + read-write + + + + + SRCR + SRCR + Shadow Reload Configuration + Register + 0x24 + 0x20 + read-write + 0x00000000 + + + VBR + Vertical Blanking Reload + 1 + 1 + + + IMR + Immediate Reload + 0 + 1 + + + + + BCCR + BCCR + Background Color Configuration + Register + 0x2C + 0x20 + read-write + 0x00000000 + + + BC + Background Color Red value + 0 + 24 + + + + + IER + IER + Interrupt Enable Register + 0x34 + 0x20 + read-write + 0x00000000 + + + RRIE + Register Reload interrupt + enable + 3 + 1 + + + TERRIE + Transfer Error Interrupt + Enable + 2 + 1 + + + FUIE + FIFO Underrun Interrupt + Enable + 1 + 1 + + + LIE + Line Interrupt Enable + 0 + 1 + + + + + ISR + ISR + Interrupt Status Register + 0x38 + 0x20 + read-only + 0x00000000 + + + RRIF + Register Reload Interrupt + Flag + 3 + 1 + + + TERRIF + Transfer Error interrupt + flag + 2 + 1 + + + FUIF + FIFO Underrun Interrupt + flag + 1 + 1 + + + LIF + Line Interrupt flag + 0 + 1 + + + + + ICR + ICR + Interrupt Clear Register + 0x3C + 0x20 + write-only + 0x00000000 + + + CRRIF + Clears Register Reload Interrupt + Flag + 3 + 1 + + + CTERRIF + Clears the Transfer Error Interrupt + Flag + 2 + 1 + + + CFUIF + Clears the FIFO Underrun Interrupt + flag + 1 + 1 + + + CLIF + Clears the Line Interrupt + Flag + 0 + 1 + + + + + LIPCR + LIPCR + Line Interrupt Position Configuration + Register + 0x40 + 0x20 + read-write + 0x00000000 + + + LIPOS + Line Interrupt Position + 0 + 11 + + + + + CPSR + CPSR + Current Position Status + Register + 0x44 + 0x20 + read-only + 0x00000000 + + + CXPOS + Current X Position + 16 + 16 + + + CYPOS + Current Y Position + 0 + 16 + + + + + CDSR + CDSR + Current Display Status + Register + 0x48 + 0x20 + read-only + 0x0000000F + + + HSYNCS + Horizontal Synchronization display + Status + 3 + 1 + + + VSYNCS + Vertical Synchronization display + Status + 2 + 1 + + + HDES + Horizontal Data Enable display + Status + 1 + 1 + + + VDES + Vertical Data Enable display + Status + 0 + 1 + + + + + L1CR + L1CR + Layerx Control Register + 0x84 + 0x20 + read-write + 0x00000000 + + + CLUTEN + Color Look-Up Table Enable + 4 + 1 + + + COLKEN + Color Keying Enable + 1 + 1 + + + LEN + Layer Enable + 0 + 1 + + + + + L1WHPCR + L1WHPCR + Layerx Window Horizontal Position + Configuration Register + 0x88 + 0x20 + read-write + 0x00000000 + + + WHSPPOS + Window Horizontal Stop + Position + 16 + 12 + + + WHSTPOS + Window Horizontal Start + Position + 0 + 12 + + + + + L1WVPCR + L1WVPCR + Layerx Window Vertical Position + Configuration Register + 0x8C + 0x20 + read-write + 0x00000000 + + + WVSPPOS + Window Vertical Stop + Position + 16 + 11 + + + WVSTPOS + Window Vertical Start + Position + 0 + 11 + + + + + L1CKCR + L1CKCR + Layerx Color Keying Configuration + Register + 0x90 + 0x20 + read-write + 0x00000000 + + + CKRED + Color Key Red value + 16 + 8 + + + CKGREEN + Color Key Green value + 8 + 8 + + + CKBLUE + Color Key Blue value + 0 + 8 + + + + + L1PFCR + L1PFCR + Layerx Pixel Format Configuration + Register + 0x94 + 0x20 + read-write + 0x00000000 + + + PF + Pixel Format + 0 + 3 + + + + + L1CACR + L1CACR + Layerx Constant Alpha Configuration + Register + 0x98 + 0x20 + read-write + 0x00000000 + + + CONSTA + Constant Alpha + 0 + 8 + + + + + L1DCCR + L1DCCR + Layerx Default Color Configuration + Register + 0x9C + 0x20 + read-write + 0x00000000 + + + DCALPHA + Default Color Alpha + 24 + 8 + + + DCRED + Default Color Red + 16 + 8 + + + DCGREEN + Default Color Green + 8 + 8 + + + DCBLUE + Default Color Blue + 0 + 8 + + + + + L1BFCR + L1BFCR + Layerx Blending Factors Configuration + Register + 0xA0 + 0x20 + read-write + 0x00000607 + + + BF1 + Blending Factor 1 + 8 + 3 + + + BF2 + Blending Factor 2 + 0 + 3 + + + + + L1CFBAR + L1CFBAR + Layerx Color Frame Buffer Address + Register + 0xAC + 0x20 + read-write + 0x00000000 + + + CFBADD + Color Frame Buffer Start + Address + 0 + 32 + + + + + L1CFBLR + L1CFBLR + Layerx Color Frame Buffer Length + Register + 0xB0 + 0x20 + read-write + 0x00000000 + + + CFBP + Color Frame Buffer Pitch in + bytes + 16 + 13 + + + CFBLL + Color Frame Buffer Line + Length + 0 + 13 + + + + + L1CFBLNR + L1CFBLNR + Layerx ColorFrame Buffer Line Number + Register + 0xB4 + 0x20 + read-write + 0x00000000 + + + CFBLNBR + Frame Buffer Line Number + 0 + 11 + + + + + L1CLUTWR + L1CLUTWR + Layerx CLUT Write Register + 0xC4 + 0x20 + write-only + 0x00000000 + + + CLUTADD + CLUT Address + 24 + 8 + + + RED + Red value + 16 + 8 + + + GREEN + Green value + 8 + 8 + + + BLUE + Blue value + 0 + 8 + + + + + L2CR + L2CR + Layerx Control Register + 0x104 + 0x20 + read-write + 0x00000000 + + + CLUTEN + Color Look-Up Table Enable + 4 + 1 + + + COLKEN + Color Keying Enable + 1 + 1 + + + LEN + Layer Enable + 0 + 1 + + + + + L2WHPCR + L2WHPCR + Layerx Window Horizontal Position + Configuration Register + 0x108 + 0x20 + read-write + 0x00000000 + + + WHSPPOS + Window Horizontal Stop + Position + 16 + 12 + + + WHSTPOS + Window Horizontal Start + Position + 0 + 12 + + + + + L2WVPCR + L2WVPCR + Layerx Window Vertical Position + Configuration Register + 0x10C + 0x20 + read-write + 0x00000000 + + + WVSPPOS + Window Vertical Stop + Position + 16 + 11 + + + WVSTPOS + Window Vertical Start + Position + 0 + 11 + + + + + L2CKCR + L2CKCR + Layerx Color Keying Configuration + Register + 0x110 + 0x20 + read-write + 0x00000000 + + + CKRED + Color Key Red value + 15 + 9 + + + CKGREEN + Color Key Green value + 8 + 7 + + + CKBLUE + Color Key Blue value + 0 + 8 + + + + + L2PFCR + L2PFCR + Layerx Pixel Format Configuration + Register + 0x114 + 0x20 + read-write + 0x00000000 + + + PF + Pixel Format + 0 + 3 + + + + + L2CACR + L2CACR + Layerx Constant Alpha Configuration + Register + 0x118 + 0x20 + read-write + 0x00000000 + + + CONSTA + Constant Alpha + 0 + 8 + + + + + L2DCCR + L2DCCR + Layerx Default Color Configuration + Register + 0x11C + 0x20 + read-write + 0x00000000 + + + DCALPHA + Default Color Alpha + 24 + 8 + + + DCRED + Default Color Red + 16 + 8 + + + DCGREEN + Default Color Green + 8 + 8 + + + DCBLUE + Default Color Blue + 0 + 8 + + + + + L2BFCR + L2BFCR + Layerx Blending Factors Configuration + Register + 0x120 + 0x20 + read-write + 0x00000607 + + + BF1 + Blending Factor 1 + 8 + 3 + + + BF2 + Blending Factor 2 + 0 + 3 + + + + + L2CFBAR + L2CFBAR + Layerx Color Frame Buffer Address + Register + 0x12C + 0x20 + read-write + 0x00000000 + + + CFBADD + Color Frame Buffer Start + Address + 0 + 32 + + + + + L2CFBLR + L2CFBLR + Layerx Color Frame Buffer Length + Register + 0x130 + 0x20 + read-write + 0x00000000 + + + CFBP + Color Frame Buffer Pitch in + bytes + 16 + 13 + + + CFBLL + Color Frame Buffer Line + Length + 0 + 13 + + + + + L2CFBLNR + L2CFBLNR + Layerx ColorFrame Buffer Line Number + Register + 0x134 + 0x20 + read-write + 0x00000000 + + + CFBLNBR + Frame Buffer Line Number + 0 + 11 + + + + + L2CLUTWR + L2CLUTWR + Layerx CLUT Write Register + 0x144 + 0x20 + write-only + 0x00000000 + + + CLUTADD + CLUT Address + 24 + 8 + + + RED + Red value + 16 + 8 + + + GREEN + Green value + 8 + 8 + + + BLUE + Blue value + 0 + 8 + + + + + + + SAI + Serial audio interface + SAI + 0x40015800 + + 0x0 + 0x400 + registers + + + SAI1 + SAI1 global interrupt + 87 + + + + BCR1 + BCR1 + BConfiguration register 1 + 0x24 + 0x20 + read-write + 0x00000040 + + + MCJDIV + Master clock divider + 20 + 4 + + + NODIV + No divider + 19 + 1 + + + DMAEN + DMA enable + 17 + 1 + + + SAIBEN + Audio block B enable + 16 + 1 + + + OutDri + Output drive + 13 + 1 + + + MONO + Mono mode + 12 + 1 + + + SYNCEN + Synchronization enable + 10 + 2 + + + CKSTR + Clock strobing edge + 9 + 1 + + + LSBFIRST + Least significant bit + first + 8 + 1 + + + DS + Data size + 5 + 3 + + + PRTCFG + Protocol configuration + 2 + 2 + + + MODE + Audio block mode + 0 + 2 + + + + + BCR2 + BCR2 + BConfiguration register 2 + 0x28 + 0x20 + read-write + 0x00000000 + + + COMP + Companding mode + 14 + 2 + + + CPL + Complement bit + 13 + 1 + + + MUTECN + Mute counter + 7 + 6 + + + MUTEVAL + Mute value + 6 + 1 + + + MUTE + Mute + 5 + 1 + + + TRIS + Tristate management on data + line + 4 + 1 + + + FFLUS + FIFO flush + 3 + 1 + + + FTH + FIFO threshold + 0 + 3 + + + + + BFRCR + BFRCR + BFRCR + 0x2C + 0x20 + read-write + 0x00000007 + + + FSOFF + Frame synchronization + offset + 18 + 1 + + + FSPOL + Frame synchronization + polarity + 17 + 1 + + + FSDEF + Frame synchronization + definition + 16 + 1 + + + FSALL + Frame synchronization active level + length + 8 + 7 + + + FRL + Frame length + 0 + 8 + + + + + BSLOTR + BSLOTR + BSlot register + 0x30 + 0x20 + read-write + 0x00000000 + + + SLOTEN + Slot enable + 16 + 16 + + + NBSLOT + Number of slots in an audio + frame + 8 + 4 + + + SLOTSZ + Slot size + 6 + 2 + + + FBOFF + First bit offset + 0 + 5 + + + + + BIM + BIM + BInterrupt mask register2 + 0x34 + 0x20 + read-write + 0x00000000 + + + LFSDETIE + Late frame synchronization detection + interrupt enable + 6 + 1 + + + AFSDETIE + Anticipated frame synchronization + detection interrupt enable + 5 + 1 + + + CNRDYIE + Codec not ready interrupt + enable + 4 + 1 + + + FREQIE + FIFO request interrupt + enable + 3 + 1 + + + WCKCFG + Wrong clock configuration interrupt + enable + 2 + 1 + + + MUTEDET + Mute detection interrupt + enable + 1 + 1 + + + OVRUDRIE + Overrun/underrun interrupt + enable + 0 + 1 + + + + + BSR + BSR + BStatus register + 0x38 + 0x20 + read-only + 0x00000000 + + + FLVL + FIFO level threshold + 16 + 3 + + + LFSDET + Late frame synchronization + detection + 6 + 1 + + + AFSDET + Anticipated frame synchronization + detection + 5 + 1 + + + CNRDY + Codec not ready + 4 + 1 + + + FREQ + FIFO request + 3 + 1 + + + WCKCFG + Wrong clock configuration + flag + 2 + 1 + + + MUTEDET + Mute detection + 1 + 1 + + + OVRUDR + Overrun / underrun + 0 + 1 + + + + + BCLRFR + BCLRFR + BClear flag register + 0x3C + 0x20 + write-only + 0x00000000 + + + LFSDET + Clear late frame synchronization + detection flag + 6 + 1 + + + CAFSDET + Clear anticipated frame synchronization + detection flag + 5 + 1 + + + CNRDY + Clear codec not ready flag + 4 + 1 + + + WCKCFG + Clear wrong clock configuration + flag + 2 + 1 + + + MUTEDET + Mute detection flag + 1 + 1 + + + OVRUDR + Clear overrun / underrun + 0 + 1 + + + + + BDR + BDR + BData register + 0x40 + 0x20 + read-write + 0x00000000 + + + DATA + Data + 0 + 32 + + + + + ACR1 + ACR1 + AConfiguration register 1 + 0x4 + 0x20 + read-write + 0x00000040 + + + MCJDIV + Master clock divider + 20 + 4 + + + NODIV + No divider + 19 + 1 + + + DMAEN + DMA enable + 17 + 1 + + + SAIAEN + Audio block A enable + 16 + 1 + + + OutDri + Output drive + 13 + 1 + + + MONO + Mono mode + 12 + 1 + + + SYNCEN + Synchronization enable + 10 + 2 + + + CKSTR + Clock strobing edge + 9 + 1 + + + LSBFIRST + Least significant bit + first + 8 + 1 + + + DS + Data size + 5 + 3 + + + PRTCFG + Protocol configuration + 2 + 2 + + + MODE + Audio block mode + 0 + 2 + + + + + ACR2 + ACR2 + AConfiguration register 2 + 0x8 + 0x20 + read-write + 0x00000000 + + + COMP + Companding mode + 14 + 2 + + + CPL + Complement bit + 13 + 1 + + + MUTECN + Mute counter + 7 + 6 + + + MUTEVAL + Mute value + 6 + 1 + + + MUTE + Mute + 5 + 1 + + + TRIS + Tristate management on data + line + 4 + 1 + + + FFLUS + FIFO flush + 3 + 1 + + + FTH + FIFO threshold + 0 + 3 + + + + + AFRCR + AFRCR + AFRCR + 0xC + 0x20 + read-write + 0x00000007 + + + FSOFF + Frame synchronization + offset + 18 + 1 + + + FSPOL + Frame synchronization + polarity + 17 + 1 + + + FSDEF + Frame synchronization + definition + 16 + 1 + + + FSALL + Frame synchronization active level + length + 8 + 7 + + + FRL + Frame length + 0 + 8 + + + + + ASLOTR + ASLOTR + ASlot register + 0x10 + 0x20 + read-write + 0x00000000 + + + SLOTEN + Slot enable + 16 + 16 + + + NBSLOT + Number of slots in an audio + frame + 8 + 4 + + + SLOTSZ + Slot size + 6 + 2 + + + FBOFF + First bit offset + 0 + 5 + + + + + AIM + AIM + AInterrupt mask register2 + 0x14 + 0x20 + read-write + 0x00000000 + + + LFSDET + Late frame synchronization detection + interrupt enable + 6 + 1 + + + AFSDETIE + Anticipated frame synchronization + detection interrupt enable + 5 + 1 + + + CNRDYIE + Codec not ready interrupt + enable + 4 + 1 + + + FREQIE + FIFO request interrupt + enable + 3 + 1 + + + WCKCFG + Wrong clock configuration interrupt + enable + 2 + 1 + + + MUTEDET + Mute detection interrupt + enable + 1 + 1 + + + OVRUDRIE + Overrun/underrun interrupt + enable + 0 + 1 + + + + + ASR + ASR + AStatus register + 0x18 + 0x20 + read-write + 0x00000000 + + + FLVL + FIFO level threshold + 16 + 3 + + + LFSDET + Late frame synchronization + detection + 6 + 1 + + + AFSDET + Anticipated frame synchronization + detection + 5 + 1 + + + CNRDY + Codec not ready + 4 + 1 + + + FREQ + FIFO request + 3 + 1 + + + WCKCFG + Wrong clock configuration flag. This bit + is read only. + 2 + 1 + + + MUTEDET + Mute detection + 1 + 1 + + + OVRUDR + Overrun / underrun + 0 + 1 + + + + + ACLRFR + ACLRFR + AClear flag register + 0x1C + 0x20 + read-write + 0x00000000 + + + LFSDET + Clear late frame synchronization + detection flag + 6 + 1 + + + CAFSDET + Clear anticipated frame synchronization + detection flag. + 5 + 1 + + + CNRDY + Clear codec not ready flag + 4 + 1 + + + WCKCFG + Clear wrong clock configuration + flag + 2 + 1 + + + MUTEDET + Mute detection flag + 1 + 1 + + + OVRUDR + Clear overrun / underrun + 0 + 1 + + + + + ADR + ADR + AData register + 0x20 + 0x20 + read-write + 0x00000000 + + + DATA + Data + 0 + 32 + + + + + + + DMA2D + DMA2D controller + DMA2D + 0x4002B000 + + 0x0 + 0xC00 + registers + + + DMA2D + DMA2D global interrupt + 90 + + + + CR + CR + control register + 0x0 + 0x20 + read-write + 0x00000000 + + + MODE + DMA2D mode + 16 + 2 + + + CEIE + Configuration Error Interrupt + Enable + 13 + 1 + + + CTCIE + CLUT transfer complete interrupt + enable + 12 + 1 + + + CAEIE + CLUT access error interrupt + enable + 11 + 1 + + + TWIE + Transfer watermark interrupt + enable + 10 + 1 + + + TCIE + Transfer complete interrupt + enable + 9 + 1 + + + TEIE + Transfer error interrupt + enable + 8 + 1 + + + ABORT + Abort + 2 + 1 + + + SUSP + Suspend + 1 + 1 + + + START + Start + 0 + 1 + + + + + ISR + ISR + Interrupt Status Register + 0x4 + 0x20 + read-only + 0x00000000 + + + CEIF + Configuration error interrupt + flag + 5 + 1 + + + CTCIF + CLUT transfer complete interrupt + flag + 4 + 1 + + + CAEIF + CLUT access error interrupt + flag + 3 + 1 + + + TWIF + Transfer watermark interrupt + flag + 2 + 1 + + + TCIF + Transfer complete interrupt + flag + 1 + 1 + + + TEIF + Transfer error interrupt + flag + 0 + 1 + + + + + IFCR + IFCR + interrupt flag clear register + 0x8 + 0x20 + read-write + 0x00000000 + + + CCEIF + Clear configuration error interrupt + flag + 5 + 1 + + + CCTCIF + Clear CLUT transfer complete interrupt + flag + 4 + 1 + + + CAECIF + Clear CLUT access error interrupt + flag + 3 + 1 + + + CTWIF + Clear transfer watermark interrupt + flag + 2 + 1 + + + CTCIF + Clear transfer complete interrupt + flag + 1 + 1 + + + CTEIF + Clear Transfer error interrupt + flag + 0 + 1 + + + + + FGMAR + FGMAR + foreground memory address + register + 0xC + 0x20 + read-write + 0x00000000 + + + MA + Memory address + 0 + 32 + + + + + FGOR + FGOR + foreground offset register + 0x10 + 0x20 + read-write + 0x00000000 + + + LO + Line offset + 0 + 14 + + + + + BGMAR + BGMAR + background memory address + register + 0x14 + 0x20 + read-write + 0x00000000 + + + MA + Memory address + 0 + 32 + + + + + BGOR + BGOR + background offset register + 0x18 + 0x20 + read-write + 0x00000000 + + + LO + Line offset + 0 + 14 + + + + + FGPFCCR + FGPFCCR + foreground PFC control + register + 0x1C + 0x20 + read-write + 0x00000000 + + + ALPHA + Alpha value + 24 + 8 + + + AM + Alpha mode + 16 + 2 + + + CS + CLUT size + 8 + 8 + + + START + Start + 5 + 1 + + + CCM + CLUT color mode + 4 + 1 + + + CM + Color mode + 0 + 4 + + + + + FGCOLR + FGCOLR + foreground color register + 0x20 + 0x20 + read-write + 0x00000000 + + + RED + Red Value + 16 + 8 + + + GREEN + Green Value + 8 + 8 + + + BLUE + Blue Value + 0 + 8 + + + + + BGPFCCR + BGPFCCR + background PFC control + register + 0x24 + 0x20 + read-write + 0x00000000 + + + ALPHA + Alpha value + 24 + 8 + + + AM + Alpha mode + 16 + 2 + + + CS + CLUT size + 8 + 8 + + + START + Start + 5 + 1 + + + CCM + CLUT Color mode + 4 + 1 + + + CM + Color mode + 0 + 4 + + + + + BGCOLR + BGCOLR + background color register + 0x28 + 0x20 + read-write + 0x00000000 + + + RED + Red Value + 16 + 8 + + + GREEN + Green Value + 8 + 8 + + + BLUE + Blue Value + 0 + 8 + + + + + FGCMAR + FGCMAR + foreground CLUT memory address + register + 0x2C + 0x20 + read-write + 0x00000000 + + + MA + Memory Address + 0 + 32 + + + + + BGCMAR + BGCMAR + background CLUT memory address + register + 0x30 + 0x20 + read-write + 0x00000000 + + + MA + Memory address + 0 + 32 + + + + + OPFCCR + OPFCCR + output PFC control register + 0x34 + 0x20 + read-write + 0x00000000 + + + CM + Color mode + 0 + 3 + + + + + OCOLR + OCOLR + output color register + 0x38 + 0x20 + read-write + 0x00000000 + + + APLHA + Alpha Channel Value + 24 + 8 + + + RED + Red Value + 16 + 8 + + + GREEN + Green Value + 8 + 8 + + + BLUE + Blue Value + 0 + 8 + + + + + OMAR + OMAR + output memory address register + 0x3C + 0x20 + read-write + 0x00000000 + + + MA + Memory Address + 0 + 32 + + + + + OOR + OOR + output offset register + 0x40 + 0x20 + read-write + 0x00000000 + + + LO + Line Offset + 0 + 14 + + + + + NLR + NLR + number of line register + 0x44 + 0x20 + read-write + 0x00000000 + + + PL + Pixel per lines + 16 + 14 + + + NL + Number of lines + 0 + 16 + + + + + LWR + LWR + line watermark register + 0x48 + 0x20 + read-write + 0x00000000 + + + LW + Line watermark + 0 + 16 + + + + + AMTCR + AMTCR + AHB master timer configuration + register + 0x4C + 0x20 + read-write + 0x00000000 + + + DT + Dead Time + 8 + 8 + + + EN + Enable + 0 + 1 + + + + + FGCLUT + FGCLUT + FGCLUT + 0x400 + 0x20 + read-write + 0x00000000 + + + APLHA + APLHA + 24 + 8 + + + RED + RED + 16 + 8 + + + GREEN + GREEN + 8 + 8 + + + BLUE + BLUE + 0 + 8 + + + + + BGCLUT + BGCLUT + BGCLUT + 0x800 + 0x20 + read-write + 0x00000000 + + + APLHA + APLHA + 24 + 8 + + + RED + RED + 16 + 8 + + + GREEN + GREEN + 8 + 8 + + + BLUE + BLUE + 0 + 8 + + + + + + + PWR + Power control + PWR + 0x40007000 + + 0x0 + 0x400 + registers + + + PVD + PVD through EXTI line detection + interrupt + 1 + + + + CR + CR + power control register + 0x0 + 0x20 + read-write + 0x0000C000 + + + LPDS + Low-power deep sleep + 0 + 1 + + + PDDS + Power down deepsleep + 1 + 1 + + + CWUF + Clear wakeup flag + 2 + 1 + + + CSBF + Clear standby flag + 3 + 1 + + + PVDE + Power voltage detector + enable + 4 + 1 + + + PLS + PVD level selection + 5 + 3 + + + DBP + Disable backup domain write + protection + 8 + 1 + + + FPDS + Flash power down in Stop + mode + 9 + 1 + + + LPUDS + Low-Power Regulator Low Voltage in + deepsleep + 10 + 1 + + + MRUDS + Main regulator low voltage in deepsleep + mode + 11 + 1 + + + ADCDC1 + ADCDC1 + 13 + 1 + + + VOS + Regulator voltage scaling output + selection + 14 + 2 + + + ODEN + Over-drive enable + 16 + 1 + + + ODSWEN + Over-drive switching + enabled + 17 + 1 + + + UDEN + Under-drive enable in stop + mode + 18 + 2 + + + + + CSR + CSR + power control/status register + 0x4 + 0x20 + 0x00000000 + + + WUF + Wakeup flag + 0 + 1 + read-only + + + SBF + Standby flag + 1 + 1 + read-only + + + PVDO + PVD output + 2 + 1 + read-only + + + BRR + Backup regulator ready + 3 + 1 + read-only + + + EWUP + Enable WKUP pin + 8 + 1 + read-write + + + BRE + Backup regulator enable + 9 + 1 + read-write + + + VOSRDY + Regulator voltage scaling output + selection ready bit + 14 + 1 + read-write + + + ODRDY + Over-drive mode ready + 16 + 1 + read-only + + + ODSWRDY + Over-drive mode switching + ready + 17 + 1 + read-only + + + UDRDY + Under-drive ready flag + 18 + 2 + read-write + + + + + + + diff --git a/src/lib.rs b/src/lib.rs index 71bfbd7c..242b206e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -81,6 +81,10 @@ pub fn parse(xml: &str) -> Device { Device::parse(tree) } +pub fn encode(device: &Device) -> Element { + device.encode() +} + trait ElementExt { fn get_child_text(&self, k: K) -> Option where @@ -104,3 +108,55 @@ impl ElementExt for Element { println!("", self.name); } } + + +#[cfg(test)] +mod tests { + use super::*; + use bitrange::*; + + use std::fs; + use std::process::Command; + use std::fs::{File, OpenOptions}; + use std::io; + use std::io::prelude::*; + use std::path::Path; + + #[test] + fn decode_encode() { + let path = String::from("./examples"); + + let files: Vec = fs::read_dir(&path).unwrap() + .map(|res| res.unwrap()) + .filter(|f| !f.metadata().unwrap().is_dir()) + .map(|f| f.file_name().into_string().unwrap()) + .filter(|f| !(f.starts_with(".") || f.starts_with("_"))) + .collect(); + + println!("Files: {:?}", files); + + for name in files { + let p1 = format!("{}/{}", path, name); + + let mut xml = String::new(); + let mut f = fs::File::open(&p1).unwrap(); + f.read_to_string(&mut xml).unwrap(); + + let device = parse(&xml); + + let p2 = format!("{}/{}", String::from("target"), name); + encode(&device).write(File::create(&p2).unwrap()); + + let output1 = Command::new("xmllint").arg("--exc-c14n").arg(p1).output().unwrap(); + let mut f1 = File::create("target/p1.svd").unwrap(); + f1.write_all(&output1.stdout); + + let output2 = Command::new("xmllint").arg("--exc-c14n").arg(p2).output().unwrap(); + let mut f2 = File::create("target/p2.svd").unwrap(); + f2.write_all(&output2.stdout); + + + + } + } +} \ No newline at end of file From 6607684dd12737e6b69d028f09393a59a3624bc1 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 12 Sep 2017 15:37:07 +1200 Subject: [PATCH 17/25] Working on e2e import/export tests --- .../{STM32F429x.svd.txt => STM32F429x.svd} | 0 src/device.rs | 4 ++ src/lib.rs | 53 +++++++++++++------ src/peripheral.rs | 11 ++++ 4 files changed, 51 insertions(+), 17 deletions(-) rename examples/{STM32F429x.svd.txt => STM32F429x.svd} (100%) diff --git a/examples/STM32F429x.svd.txt b/examples/STM32F429x.svd similarity index 100% rename from examples/STM32F429x.svd.txt rename to examples/STM32F429x.svd diff --git a/src/device.rs b/src/device.rs index d31741a6..6ceb7baa 100644 --- a/src/device.rs +++ b/src/device.rs @@ -49,6 +49,10 @@ impl EncodeElem for Device { text: None, }; + elem.attributes.insert(String::from("xmlns:xs"), String::from("http://www.w3.org/2001/XMLSchema-instance")); + elem.attributes.insert(String::from("schemaVersion"), String::from("1.0")); + elem.attributes.insert(String::from("xs:noNamespaceSchemaLocation"), String::from("CMSIS-SVD_Schema_1.0.xsd")); + match self.cpu { Some(ref v) => { elem.children.push(v.encode()); diff --git a/src/lib.rs b/src/lib.rs index 242b206e..3a5af58e 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -24,7 +24,6 @@ //#![deny(warnings)] - extern crate xmltree; use xmltree::Element; @@ -128,34 +127,54 @@ mod tests { let files: Vec = fs::read_dir(&path).unwrap() .map(|res| res.unwrap()) - .filter(|f| !f.metadata().unwrap().is_dir()) - .map(|f| f.file_name().into_string().unwrap()) - .filter(|f| !(f.starts_with(".") || f.starts_with("_"))) + .filter(|all| !all.metadata().unwrap().is_dir()) + .map(|file| file.file_name().into_string().unwrap()) + .filter(|filename| !(filename.starts_with(".") || filename.starts_with("_")) && filename.ends_with(".svd")) + .map(|filename| String::from(Path::new(&filename).file_stem().unwrap().to_str().unwrap())) .collect(); println!("Files: {:?}", files); for name in files { - let p1 = format!("{}/{}", path, name); + let source_file = format!("{}/{}.svd", path, name); + let original_file = format!("target/{}-original.svd", name); + let encoded_file = format!("target/{}-encoded.svd", name); + let diff_file = format!("target/{}-diff.svd", name); + // Load orignal target file let mut xml = String::new(); - let mut f = fs::File::open(&p1).unwrap(); + let mut f = fs::File::open(&source_file).unwrap(); f.read_to_string(&mut xml).unwrap(); + // Parse device info let device = parse(&xml); - let p2 = format!("{}/{}", String::from("target"), name); - encode(&device).write(File::create(&p2).unwrap()); - - let output1 = Command::new("xmllint").arg("--exc-c14n").arg(p1).output().unwrap(); - let mut f1 = File::create("target/p1.svd").unwrap(); - f1.write_all(&output1.stdout); - - let output2 = Command::new("xmllint").arg("--exc-c14n").arg(p2).output().unwrap(); - let mut f2 = File::create("target/p2.svd").unwrap(); - f2.write_all(&output2.stdout); - + // Encode device info + encode(&device).write(File::create(&encoded_file).unwrap()); + + // Normalize source info + let output = Command::new("xmllint").arg("--c14n").arg(source_file.clone()).output().unwrap(); + let mut f = File::create(original_file.clone()).unwrap(); + f.write_all(&output.stdout).unwrap(); + + let output = Command::new("xmllint").arg("--format").arg(source_file.clone()).output().unwrap(); + let mut f = File::create(original_file.clone()).unwrap(); + f.write_all(&output.stdout).unwrap(); + + // Normalise encoded info + let output = Command::new("xmllint").arg("--c14n").arg(encoded_file.clone()).output().unwrap(); + let mut f = File::create(encoded_file.clone()).unwrap(); + f.write_all(&output.stdout).unwrap(); + + let output = Command::new("xmllint").arg("--format").arg(encoded_file.clone()).output().unwrap(); + let mut f = File::create(encoded_file.clone()).unwrap(); + f.write_all(&output.stdout).unwrap(); + + // Diff normalised source and output + let output = Command::new("diff").arg(original_file).arg(encoded_file).output().unwrap(); + let mut f = File::create(diff_file).unwrap(); + f.write_all(&output.stdout).unwrap(); } } diff --git a/src/peripheral.rs b/src/peripheral.rs index bdbcf39f..706c845e 100644 --- a/src/peripheral.rs +++ b/src/peripheral.rs @@ -20,6 +20,7 @@ macro_rules! try { pub struct Peripheral { pub name: String, pub version: Option, + pub display_name: Option, pub group_name: Option, pub description: Option, pub base_address: u32, @@ -38,6 +39,7 @@ impl ParseElem for Peripheral { Peripheral { name: try!(tree.get_child_text("name")), version: tree.get_child_text("version"), + display_name: tree.get_child_text("displayName"), group_name: tree.get_child_text("groupName"), description: tree.get_child_text("description"), base_address: try!(parse::u32(try!(tree.get_child("baseAddress")))), @@ -75,6 +77,15 @@ impl EncodeElem for Peripheral { ); } None => (), + }; + match self.display_name { + Some(ref v) => { + elem.children.push(new_element( + "displayName", + Some(format!("{}", v)), + )); + } + None => (), }; match self.group_name { Some(ref v) => { From 05b9e77b7c8c38a08cd64a5068fa0fcd54e5152f Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 12 Sep 2017 17:09:00 +1200 Subject: [PATCH 18/25] Input/output processing looking pretty close to matching, some differences in vendor formatting for files but apart from that seems to be working --- examples/EFM32PG1B200F256GM48.svd | 6438 ++++++++++++++--------------- examples/STM32F429x.svd | 942 ++--- src/addressblock.rs | 80 + src/device.rs | 23 +- src/lib.rs | 4 +- src/peripheral.rs | 12 +- src/registerinfo.rs | 5 +- 7 files changed, 3806 insertions(+), 3698 deletions(-) create mode 100644 src/addressblock.rs diff --git a/examples/EFM32PG1B200F256GM48.svd b/examples/EFM32PG1B200F256GM48.svd index 4066d351..0909afc8 100644 --- a/examples/EFM32PG1B200F256GM48.svd +++ b/examples/EFM32PG1B200F256GM48.svd @@ -10,7 +10,7 @@ MSC 1.6 MSC - 0x400E0000 + 0x400e0000 0 0x00000800 @@ -24,11 +24,11 @@ CTRL Memory System Control Register - 0x000 + 0x0 32 read-write 0x00000001 - 0x0000000F + 0x0000000f ADDRFAULTEN @@ -63,7 +63,7 @@ READCTRL Read Control Register - 0x004 + 0x4 32 read-write 0x01000100 @@ -135,7 +135,7 @@ WRITECTRL Write Control Register - 0x008 + 0x8 32 read-write 0x00000000 @@ -160,11 +160,11 @@ WRITECMD Write Command Register - 0x00C + 0xc 32 write-only 0x00000000 - 0x0000113F + 0x0000113f LADDRIM @@ -227,11 +227,11 @@ ADDRB Page Erase/Write Address Buffer - 0x010 + 0x10 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff ADDRB @@ -245,11 +245,11 @@ WDATA Write Data Register - 0x018 + 0x18 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff WDATA @@ -263,11 +263,11 @@ STATUS Status Register - 0x01C + 0x1c 32 read-only 0x00000008 - 0x0000007F + 0x0000007f BUSY @@ -323,11 +323,11 @@ IF Interrupt Flag Register - 0x030 + 0x30 32 read-only 0x00000000 - 0x0000003F + 0x0000003f ERASE @@ -376,11 +376,11 @@ IFS Interrupt Flag Set Register - 0x034 + 0x34 32 write-only 0x00000000 - 0x0000003F + 0x0000003f ERASE @@ -429,11 +429,11 @@ IFC Interrupt Flag Clear Register - 0x038 + 0x38 32 write-only 0x00000000 - 0x0000003F + 0x0000003f ERASE @@ -482,11 +482,11 @@ IEN Interrupt Enable Register - 0x03C + 0x3c 32 read-write 0x00000000 - 0x0000003F + 0x0000003f ERASE @@ -535,11 +535,11 @@ LOCK Configuration Lock Register - 0x040 + 0x40 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -565,7 +565,7 @@ CACHECMD Flash Cache Command Register - 0x044 + 0x44 32 write-only 0x00000000 @@ -597,11 +597,11 @@ CACHEHITS Cache Hits Performance Counter - 0x048 + 0x48 32 read-only 0x00000000 - 0x000FFFFF + 0x000fffff CACHEHITS @@ -615,11 +615,11 @@ CACHEMISSES Cache Misses Performance Counter - 0x04C + 0x4c 32 read-only 0x00000000 - 0x000FFFFF + 0x000fffff CACHEMISSES @@ -633,11 +633,11 @@ MASSLOCK Mass Erase Lock Register - 0x054 + 0x54 32 read-write 0x00000001 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -663,11 +663,11 @@ STARTUP Startup Control - 0x05C + 0x5c 32 read-write - 0x1300104D - 0x773FF3FF + 0x1300104d + 0x773ff3ff STDLY0 @@ -716,7 +716,7 @@ CMD Command Register - 0x074 + 0x74 32 write-only 0x00000000 @@ -737,7 +737,7 @@ EMU 1.6 EMU - 0x400E3000 + 0x400e3000 0 0x00000400 @@ -751,7 +751,7 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 @@ -769,11 +769,11 @@ STATUS Status Register - 0x004 + 0x4 32 read-only 0x00000000 - 0x0010011F + 0x0010011f VMONRDY @@ -829,11 +829,11 @@ LOCK Configuration Lock Register - 0x008 + 0x8 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -859,11 +859,11 @@ RAM0CTRL Memory Control Register - 0x00C + 0xc 32 read-write 0x00000000 - 0x0000000F + 0x0000000f RAMPOWERDOWN @@ -879,23 +879,23 @@ BLK4 - Power down RAM blocks 4 and above (address range 0x20006000-0x20007BFF) + Power down RAM blocks 4 and above (address range 0x20006000-0x20007bff) 0x00000008 BLK3TO4 - Power down RAM blocks 3 and above (address range 0x20004000-0x20007BFF) - 0x0000000C + Power down RAM blocks 3 and above (address range 0x20004000-0x20007bff) + 0x0000000c BLK2TO4 - Power down RAM blocks 2 and above (address range 0x20002000-0x20007BFF) - 0x0000000E + Power down RAM blocks 2 and above (address range 0x20002000-0x20007bff) + 0x0000000e BLK1TO4 - Power down RAM blocks 1 and above (address range 0x20001000-0x20007BFF) - 0x0000000F + Power down RAM blocks 1 and above (address range 0x20001000-0x20007bff) + 0x0000000f @@ -904,7 +904,7 @@ CMD Command Register - 0x010 + 0x10 32 write-only 0x00000000 @@ -922,7 +922,7 @@ PERACTCONF Peripheral to Peripheral Activation Clock Configuration - 0x014 + 0x14 32 read-write 0x00000000 @@ -940,11 +940,11 @@ EM4CTRL EM4 Control Register - 0x018 + 0x18 32 read-write 0x00000000 - 0x0003003F + 0x0003003f EM4STATE @@ -1010,11 +1010,11 @@ TEMPLIMITS Temperature limits for interrupt generation - 0x01C + 0x1c 32 read-write - 0x0000FF00 - 0x0001FFFF + 0x0000ff00 + 0x0001ffff TEMPLOW @@ -1042,11 +1042,11 @@ TEMP Value of last temperature measurement - 0x020 + 0x20 32 read-only 0x00000000 - 0x000000FF + 0x000000ff TEMP @@ -1060,11 +1060,11 @@ IF Interrupt Flag Register - 0x024 + 0x24 32 read-only 0x00000000 - 0xE11FC0FF + 0xe11fc0ff VMONAVDDFALL @@ -1204,11 +1204,11 @@ IFS Interrupt Flag Set Register - 0x028 + 0x28 32 write-only 0x00000000 - 0xE11FF0FF + 0xe11ff0ff VMONAVDDFALL @@ -1362,11 +1362,11 @@ IFC Interrupt Flag Clear Register - 0x02C + 0x2c 32 write-only 0x00000000 - 0xE11FF0FF + 0xe11ff0ff VMONAVDDFALL @@ -1520,11 +1520,11 @@ IEN Interrupt Enable Register - 0x030 + 0x30 32 read-write 0x00000000 - 0xE11FF0FF + 0xe11ff0ff VMONAVDDFALL @@ -1678,11 +1678,11 @@ PWRLOCK Regulator and Supply Lock Register - 0x034 + 0x34 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -1708,11 +1708,11 @@ PWRCFG Power Configuration Register. - 0x038 + 0x38 32 read-write 0x00000000 - 0x0000000F + 0x0000000f PWRCFG @@ -1743,7 +1743,7 @@ PWRCTRL Power Control Register. - 0x03C + 0x3c 32 read-write 0x00000000 @@ -1761,7 +1761,7 @@ DCDCCTRL DCDC Control - 0x040 + 0x40 32 read-write 0x00000030 @@ -1815,11 +1815,11 @@ DCDCMISCCTRL DCDC Miscellaneous Control Register - 0x04C + 0x4c 32 read-write 0x33307700 - 0x377FFF01 + 0x377fff01 LNFORCECCM @@ -1897,7 +1897,7 @@ DCDCZDETCTRL DCDC Power Train NFET Zero Current Detector Control Register - 0x050 + 0x50 32 read-write 0x00000130 @@ -1922,7 +1922,7 @@ DCDCCLIMCTRL DCDC Power Train PFET Current Limiter Control Register - 0x054 + 0x54 32 read-write 0x00002100 @@ -1947,11 +1947,11 @@ DCDCLNVCTRL DCDC Low Noise Voltage Register - 0x05C + 0x5c 32 read-write 0x00007100 - 0x00007F02 + 0x00007f02 LNATT @@ -1972,11 +1972,11 @@ DCDCTIMING DCDC Controller Timing Value Register - 0x060 + 0x60 32 read-write - 0x0FF1F8FF - 0x6FF1F8FF + 0x0ff1f8ff + 0x6ff1f8ff LPINITWAIT @@ -2018,11 +2018,11 @@ DCDCLPVCTRL DCDC Low Power Voltage Register - 0x064 + 0x64 32 read-write 0x00000168 - 0x000001FF + 0x000001ff LPATT @@ -2043,11 +2043,11 @@ DCDCLPCTRL DCDC Low Power Control Register - 0x06C + 0x6c 32 read-write 0x00007000 - 0x0700F000 + 0x0700f000 LPCMPHYSSEL @@ -2075,11 +2075,11 @@ DCDCLNFREQCTRL DCDC Low Noise Controller Frequency Control - 0x070 + 0x70 32 read-write 0x10000000 - 0x1F000007 + 0x1f000007 RCOBAND @@ -2100,7 +2100,7 @@ DCDCSYNC DCDC Read Status Register - 0x078 + 0x78 32 read-only 0x00000000 @@ -2118,11 +2118,11 @@ VMONAVDDCTRL VMON AVDD Channel Control - 0x090 + 0x90 32 read-write 0x00000000 - 0x00FFFF0D + 0x00ffff0d EN @@ -2178,11 +2178,11 @@ VMONALTAVDDCTRL Alternate VMON AVDD Channel Control - 0x094 + 0x94 32 read-write 0x00000000 - 0x0000FF0D + 0x0000ff0d EN @@ -2224,11 +2224,11 @@ VMONDVDDCTRL VMON DVDD Channel Control - 0x098 + 0x98 32 read-write 0x00000000 - 0x0000FF0D + 0x0000ff0d EN @@ -2270,11 +2270,11 @@ VMONIO0CTRL VMON IOVDD0 Channel Control - 0x09C + 0x9c 32 read-write 0x00000000 - 0x0000FF1D + 0x0000ff1d EN @@ -2326,7 +2326,7 @@ RMU 1.6 RMU - 0x400E5000 + 0x400e5000 0 0x00000400 @@ -2336,7 +2336,7 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00004224 @@ -2470,11 +2470,11 @@ RSTCAUSE Reset Cause Register - 0x004 + 0x4 32 read-only 0x00000000 - 0x00010F1D + 0x00010f1d PORST @@ -2544,7 +2544,7 @@ CMD Command Register - 0x008 + 0x8 32 write-only 0x00000000 @@ -2562,7 +2562,7 @@ RST Reset Control Register - 0x00C + 0xc 32 read-write 0x00000000 @@ -2571,11 +2571,11 @@ LOCK Configuration Lock Register - 0x010 + 0x10 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -2604,7 +2604,7 @@ CMU 1.6 CMU - 0x400E4000 + 0x400e4000 0 0x00000400 @@ -2618,11 +2618,11 @@ CTRL CMU Control Register - 0x000 + 0x0 32 read-write 0x00300000 - 0x001101EF + 0x001101ef CLKOUTSEL0 @@ -2669,32 +2669,32 @@ LFRCOQ LFRCO (qualified) - 0x0000000A + 0x0000000a LFXOQ LFXO (qualified) - 0x0000000B + 0x0000000b HFRCOQ HFRCO (qualified) - 0x0000000C + 0x0000000c AUXHFRCOQ AUXHFRCO (qualified) - 0x0000000D + 0x0000000d HFXOQ HFXO (qualified) - 0x0000000E + 0x0000000e HFSRCCLK HFSRCCLK - 0x0000000F + 0x0000000f @@ -2743,32 +2743,32 @@ LFRCOQ LFRCO (qualified) - 0x0000000A + 0x0000000a LFXOQ LFXO (qualified) - 0x0000000B + 0x0000000b HFRCOQ HFRCO (qualified) - 0x0000000C + 0x0000000c AUXHFRCOQ AUXHFRCO (qualified) - 0x0000000D + 0x0000000d HFXOQ HFXO (qualified) - 0x0000000E + 0x0000000e HFSRCCLK HFSRCCLK - 0x0000000F + 0x0000000f @@ -2791,11 +2791,11 @@ HFRCOCTRL HFRCO Control Register - 0x010 + 0x10 32 read-write - 0xB1481F3C - 0xFFFF3F7F + 0xb1481f3c + 0xffff3f7f TUNING @@ -2875,11 +2875,11 @@ AUXHFRCOCTRL AUXHFRCO Control Register - 0x018 + 0x18 32 read-write - 0xB1481F3C - 0xFFFF3F7F + 0xb1481f3c + 0xffff3f7f TUNING @@ -2959,11 +2959,11 @@ LFRCOCTRL LFRCO Control Register - 0x020 + 0x20 32 read-write 0x81060100 - 0xF30701FF + 0xf30701ff TUNING @@ -3029,11 +3029,11 @@ HFXOCTRL HFXO Control Register - 0x024 + 0x24 32 read-write 0x00000000 - 0x77000F31 + 0x77000f31 MODE @@ -3169,7 +3169,7 @@ HFXOCTRL1 HFXO Control 1 - 0x028 + 0x28 32 read-write 0x00000240 @@ -3201,11 +3201,11 @@ HFXOSTARTUPCTRL HFXO Startup Control - 0x02C + 0x2c 32 read-write - 0xA1250060 - 0xFFEFF87F + 0xa1250060 + 0xffeff87f IBTRIMXOCORE @@ -3240,11 +3240,11 @@ HFXOSTEADYSTATECTRL HFXO Steady State control - 0x030 + 0x30 32 read-write - 0xA30AAD09 - 0xF70FFFFF + 0xa30aad09 + 0xf70fffff IBTRIMXOCORE @@ -3293,11 +3293,11 @@ HFXOTIMEOUTCTRL HFXO Timeout Control - 0x034 + 0x34 32 read-write 0x00026667 - 0x000FFFFF + 0x000fffff STARTUPTIMEOUT @@ -3359,7 +3359,7 @@ 32KCYCLES Timeout period of 32768 cycles - 0x0000000A + 0x0000000a @@ -3423,7 +3423,7 @@ 32KCYCLES Timeout period of 32768 cycles - 0x0000000A + 0x0000000a @@ -3487,7 +3487,7 @@ 32KCYCLES Timeout period of 32768 cycles - 0x0000000A + 0x0000000a @@ -3551,7 +3551,7 @@ 32KCYCLES Timeout period of 32768 cycles - 0x0000000A + 0x0000000a @@ -3615,7 +3615,7 @@ 32KCYCLES Timeout period of 32768 cycles - 0x0000000A + 0x0000000a @@ -3624,11 +3624,11 @@ LFXOCTRL LFXO Control Register - 0x038 + 0x38 32 read-write 0x07009000 - 0x0713DB7F + 0x0713db7f TUNING @@ -3750,11 +3750,11 @@ CALCTRL Calibration Control Register - 0x050 + 0x50 32 read-write 0x00000000 - 0x0F0F0177 + 0x0f0f0177 UPSEL @@ -3906,12 +3906,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -3975,12 +3975,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -3989,11 +3989,11 @@ CALCNT Calibration Counter Register - 0x054 + 0x54 32 read-write 0x00000000 - 0x000FFFFF + 0x000fffff CALCNT @@ -4007,11 +4007,11 @@ OSCENCMD Oscillator Enable/Disable Command Register - 0x060 + 0x60 32 write-only 0x00000000 - 0x000003FF + 0x000003ff HFRCOEN @@ -4088,7 +4088,7 @@ CMD Command Register - 0x064 + 0x64 32 write-only 0x00000000 @@ -4127,7 +4127,7 @@ DBGCLKSEL Debug Trace Clock Select - 0x070 + 0x70 32 read-write 0x00000000 @@ -4157,7 +4157,7 @@ HFCLKSEL High Frequency Clock Select Command Register - 0x074 + 0x74 32 write-only 0x00000000 @@ -4197,7 +4197,7 @@ LFACLKSEL Low Frequency A Clock Select Register - 0x080 + 0x80 32 read-write 0x00000000 @@ -4237,7 +4237,7 @@ LFBCLKSEL Low Frequency B Clock Select Register - 0x084 + 0x84 32 read-write 0x00000000 @@ -4282,7 +4282,7 @@ LFECLKSEL Low Frequency E Clock Select Register - 0x088 + 0x88 32 read-write 0x00000000 @@ -4322,11 +4322,11 @@ STATUS Status Register - 0x090 + 0x90 32 read-only 0x00010003 - 0x07D103FF + 0x07d103ff HFRCOENS @@ -4452,7 +4452,7 @@ HFCLKSTATUS HFCLK Status Register - 0x094 + 0x94 32 read-only 0x00000001 @@ -4492,11 +4492,11 @@ HFXOTRIMSTATUS HFXO Trim Status - 0x09C + 0x9c 32 read-only 0x00000500 - 0x000007FF + 0x000007ff IBTRIMXOCORE @@ -4517,11 +4517,11 @@ IF Interrupt Flag Register - 0x0A0 + 0xa0 32 read-only 0x00000001 - 0x80007F7F + 0x80007f7f HFRCORDY @@ -4633,11 +4633,11 @@ IFS Interrupt Flag Set Register - 0x0A4 + 0xa4 32 write-only 0x00000000 - 0x80007F7F + 0x80007f7f HFRCORDY @@ -4749,11 +4749,11 @@ IFC Interrupt Flag Clear Register - 0x0A8 + 0xa8 32 write-only 0x00000000 - 0x80007F7F + 0x80007f7f HFRCORDY @@ -4865,11 +4865,11 @@ IEN Interrupt Enable Register - 0x0AC + 0xac 32 read-write 0x00000000 - 0x80007F7F + 0x80007f7f HFRCORDY @@ -4981,11 +4981,11 @@ HFBUSCLKEN0 High Frequency Bus Clock Enable Register 0 - 0x0B0 + 0xb0 32 read-write 0x00000000 - 0x0000003F + 0x0000003f LE @@ -5034,11 +5034,11 @@ HFPERCLKEN0 High Frequency Peripheral Clock Enable Register 0 - 0x0C0 + 0xc0 32 read-write 0x00000000 - 0x000003FF + 0x000003ff TIMER0 @@ -5115,7 +5115,7 @@ LFACLKEN0 Low Frequency A Clock Enable Register 0 (Async Reg) - 0x0E0 + 0xe0 32 read-write 0x00000000 @@ -5133,7 +5133,7 @@ LFBCLKEN0 Low Frequency B Clock Enable Register 0 (Async Reg) - 0x0E8 + 0xe8 32 read-write 0x00000000 @@ -5151,7 +5151,7 @@ LFECLKEN0 Low Frequency E Clock Enable Register 0 (Async Reg) - 0x0F0 + 0xf0 32 read-write 0x00000000 @@ -5173,7 +5173,7 @@ 32 read-write 0x00000000 - 0x01001F00 + 0x01001f00 PRESC @@ -5217,7 +5217,7 @@ 32 read-write 0x00000000 - 0x0001FF00 + 0x0001ff00 PRESC @@ -5238,11 +5238,11 @@ HFPERPRESC High Frequency Peripheral Clock Prescaler Register - 0x10C + 0x10c 32 read-write 0x00000000 - 0x0001FF00 + 0x0001ff00 PRESC @@ -5267,7 +5267,7 @@ 32 read-write 0x00000000 - 0x00001F00 + 0x00001f00 PRESC @@ -5292,7 +5292,7 @@ 32 read-write 0x00000000 - 0x0000000F + 0x0000000f LETIMER0 @@ -5354,32 +5354,32 @@ DIV1024 LFACLKLETIMER0 = LFACLK/1024 - 0x0000000A + 0x0000000a DIV2048 LFACLKLETIMER0 = LFACLK/2048 - 0x0000000B + 0x0000000b DIV4096 LFACLKLETIMER0 = LFACLK/4096 - 0x0000000C + 0x0000000c DIV8192 LFACLKLETIMER0 = LFACLK/8192 - 0x0000000D + 0x0000000d DIV16384 LFACLKLETIMER0 = LFACLK/16384 - 0x0000000E + 0x0000000e DIV32768 LFACLKLETIMER0 = LFACLK/32768 - 0x0000000F + 0x0000000f @@ -5432,7 +5432,7 @@ 32 read-write 0x00000000 - 0x0000000F + 0x0000000f RTCC @@ -5457,7 +5457,7 @@ 32 read-only 0x00000000 - 0x3F050055 + 0x3f050055 LFACLKEN0 @@ -5591,7 +5591,7 @@ ADCCTRL ADC Control Register - 0x15C + 0x15c 32 read-write 0x00000000 @@ -5667,7 +5667,7 @@ 32 read-write 0x00000000 - 0x00003F3F + 0x00003f3f CLKOUT0LOC @@ -5776,7 +5776,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -5805,7 +5805,7 @@ CRYPTO 1.6 CRYPTO - 0x400F0000 + 0x400f0000 0 0x00000400 @@ -5819,11 +5819,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0xB333C407 + 0xb333c407 AES @@ -6010,11 +6010,11 @@ WAC Wide Arithmetic Configuration - 0x004 + 0x4 32 read-write 0x00000000 - 0x00000F1F + 0x00000f1f MODULUS @@ -6076,27 +6076,27 @@ ECCBIN163N P modulus for B-163 ECC curve - 0x0000000A + 0x0000000a ECCBIN163KN P modulus for K-163 ECC curve - 0x0000000B + 0x0000000b ECCPRIME256N P modulus for P-256 ECC curve - 0x0000000C + 0x0000000c ECCPRIME224N P modulus for P-224 ECC curve - 0x0000000D + 0x0000000d ECCPRIME192N P modulus for P-192 ECC curve - 0x0000000E + 0x0000000e @@ -6160,11 +6160,11 @@ CMD Command Register - 0x008 + 0x8 32 read-write 0x00000000 - 0x00000EFF + 0x00000eff INSTR @@ -6199,7 +6199,7 @@ STATUS Status Register - 0x010 + 0x10 32 read-only 0x00000000 @@ -6231,11 +6231,11 @@ DSTATUS Data Status Register - 0x014 + 0x14 32 read-only 0x00000000 - 0x011F0F0F + 0x011f0f0f DATA0ZERO @@ -6299,11 +6299,11 @@ CSTATUS Control Status Register - 0x018 + 0x18 32 read-only 0x00000201 - 0x01F30707 + 0x01f30707 V0 @@ -6429,11 +6429,11 @@ KEY KEY Register Access - 0x020 + 0x20 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -6448,11 +6448,11 @@ KEYBUF KEY Buffer Register Access - 0x024 + 0x24 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -6467,11 +6467,11 @@ SEQCTRL Sequence Control - 0x030 + 0x30 32 read-write 0x00000000 - 0xBF303FFF + 0xbf303fff LENGTHA @@ -6544,11 +6544,11 @@ SEQCTRLB Sequence Control B - 0x034 + 0x34 32 read-write 0x00000000 - 0x30003FFF + 0x30003fff LENGTHB @@ -6576,7 +6576,7 @@ IF AES Interrupt Flags - 0x040 + 0x40 32 read-only 0x00000000 @@ -6601,11 +6601,11 @@ IFS Interrupt Flag Set Register - 0x044 + 0x44 32 write-only 0x00000000 - 0x0000000F + 0x0000000f INSTRDONE @@ -6640,11 +6640,11 @@ IFC Interrupt Flag Clear Register - 0x048 + 0x48 32 write-only 0x00000000 - 0x0000000F + 0x0000000f INSTRDONE @@ -6679,11 +6679,11 @@ IEN Interrupt Enable Register - 0x04C + 0x4c 32 read-write 0x00000000 - 0x0000000F + 0x0000000f INSTRDONE @@ -6718,11 +6718,11 @@ SEQ0 Sequence register 0 - 0x050 + 0x50 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff INSTR0 @@ -6757,11 +6757,11 @@ SEQ1 Sequence Register 1 - 0x054 + 0x54 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff INSTR4 @@ -6796,11 +6796,11 @@ SEQ2 Sequence Register 2 - 0x058 + 0x58 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff INSTR8 @@ -6835,11 +6835,11 @@ SEQ3 Sequence Register 3 - 0x05C + 0x5c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff INSTR12 @@ -6874,11 +6874,11 @@ SEQ4 Sequence Register 4 - 0x060 + 0x60 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff INSTR16 @@ -6913,11 +6913,11 @@ DATA0 DATA0 Register Access - 0x080 + 0x80 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -6932,11 +6932,11 @@ DATA1 DATA1 Register Access - 0x084 + 0x84 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -6951,11 +6951,11 @@ DATA2 DATA2 Register Access - 0x088 + 0x88 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -6970,11 +6970,11 @@ DATA3 DATA3 Register Access - 0x08C + 0x8c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -6989,11 +6989,11 @@ DATA0XOR DATA0XOR Register Access - 0x0A0 + 0xa0 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7008,11 +7008,11 @@ DATA0BYTE DATA0 Register Byte Access - 0x0B0 + 0xb0 32 read-write 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -7027,11 +7027,11 @@ DATA1BYTE DATA1 Register Byte Access - 0x0B4 + 0xb4 32 read-write 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -7046,11 +7046,11 @@ DATA0XORBYTE DATA0 Register Byte XOR Access - 0x0BC + 0xbc 32 read-write 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -7065,11 +7065,11 @@ DATA0BYTE12 DATA0 Register Byte 12 Access - 0x0C0 + 0xc0 32 read-write 0x00000000 - 0x000000FF + 0x000000ff DATA0BYTE12 @@ -7083,11 +7083,11 @@ DATA0BYTE13 DATA0 Register Byte 13 Access - 0x0C4 + 0xc4 32 read-write 0x00000000 - 0x000000FF + 0x000000ff DATA0BYTE13 @@ -7101,11 +7101,11 @@ DATA0BYTE14 DATA0 Register Byte 14 Access - 0x0C8 + 0xc8 32 read-write 0x00000000 - 0x000000FF + 0x000000ff DATA0BYTE14 @@ -7119,11 +7119,11 @@ DATA0BYTE15 DATA0 Register Byte 15 Access - 0x0CC + 0xcc 32 read-write 0x00000000 - 0x000000FF + 0x000000ff DATA0BYTE15 @@ -7141,7 +7141,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7160,7 +7160,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7179,7 +7179,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7194,11 +7194,11 @@ DDATA3 DDATA3 Register Access - 0x10C + 0x10c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7217,7 +7217,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7236,7 +7236,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7255,7 +7255,7 @@ 32 read-write 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -7274,7 +7274,7 @@ 32 read-write 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -7293,7 +7293,7 @@ 32 read-write 0x00000000 - 0x0000000F + 0x0000000f DDATA0BYTE32 @@ -7311,7 +7311,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7330,7 +7330,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7345,11 +7345,11 @@ QDATA1BIG QDATA1 Register Big Endian Access - 0x1A4 + 0x1a4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -7364,11 +7364,11 @@ QDATA0BYTE QDATA0 Register Byte Access - 0x1C0 + 0x1c0 32 read-write 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -7383,11 +7383,11 @@ QDATA1BYTE QDATA1 Register Byte Access - 0x1C4 + 0x1c4 32 read-write 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -7405,7 +7405,7 @@ GPIO 1.6 GPIO - 0x4000A000 + 0x4000a000 0 0x00001000 @@ -7423,7 +7423,7 @@ PA_CTRL Port Control Register - 0x000 + 0x0 32 read-write 0x00600060 @@ -7476,11 +7476,11 @@ PA_MODEL Port Pin Mode Low Register - 0x004 + 0x4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -7542,32 +7542,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -7631,32 +7631,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -7720,32 +7720,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -7809,32 +7809,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -7898,32 +7898,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -7987,32 +7987,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8076,32 +8076,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8165,32 +8165,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8199,11 +8199,11 @@ PA_MODEH Port Pin Mode High Register - 0x008 + 0x8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -8265,32 +8265,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8354,32 +8354,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8443,32 +8443,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8532,32 +8532,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8621,32 +8621,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8710,32 +8710,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8799,32 +8799,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8888,32 +8888,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -8922,11 +8922,11 @@ PA_DOUT Port Data Out Register - 0x00C + 0xc 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -8940,11 +8940,11 @@ PA_DOUTTGL Port Data Out Toggle Register - 0x018 + 0x18 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -8958,11 +8958,11 @@ PA_DIN Port Data In Register - 0x01C + 0x1c 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -8976,11 +8976,11 @@ PA_PINLOCKN Port Unlocked Pins Register - 0x020 + 0x20 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -8994,11 +8994,11 @@ PA_OVTDIS Over Voltage Disable for all modes - 0x028 + 0x28 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -9012,7 +9012,7 @@ PB_CTRL Port Control Register - 0x030 + 0x30 32 read-write 0x00600060 @@ -9065,11 +9065,11 @@ PB_MODEL Port Pin Mode Low Register - 0x034 + 0x34 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -9131,32 +9131,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9220,32 +9220,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9309,32 +9309,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9398,32 +9398,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9487,32 +9487,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9576,32 +9576,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9665,32 +9665,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9754,32 +9754,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9788,11 +9788,11 @@ PB_MODEH Port Pin Mode High Register - 0x038 + 0x38 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -9854,32 +9854,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -9943,32 +9943,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10032,32 +10032,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10121,32 +10121,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10210,32 +10210,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10299,32 +10299,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10388,32 +10388,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10477,32 +10477,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10511,11 +10511,11 @@ PB_DOUT Port Data Out Register - 0x03C + 0x3c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -10529,11 +10529,11 @@ PB_DOUTTGL Port Data Out Toggle Register - 0x048 + 0x48 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -10547,11 +10547,11 @@ PB_DIN Port Data In Register - 0x04C + 0x4c 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -10565,11 +10565,11 @@ PB_PINLOCKN Port Unlocked Pins Register - 0x050 + 0x50 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -10583,11 +10583,11 @@ PB_OVTDIS Over Voltage Disable for all modes - 0x058 + 0x58 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -10601,7 +10601,7 @@ PC_CTRL Port Control Register - 0x060 + 0x60 32 read-write 0x00600060 @@ -10654,11 +10654,11 @@ PC_MODEL Port Pin Mode Low Register - 0x064 + 0x64 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -10720,32 +10720,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10809,32 +10809,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10898,32 +10898,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -10987,32 +10987,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11076,32 +11076,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11165,32 +11165,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11254,32 +11254,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11343,32 +11343,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11377,11 +11377,11 @@ PC_MODEH Port Pin Mode High Register - 0x068 + 0x68 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -11443,32 +11443,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11532,32 +11532,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11621,32 +11621,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11710,32 +11710,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11799,32 +11799,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11888,32 +11888,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -11977,32 +11977,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12066,32 +12066,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12100,11 +12100,11 @@ PC_DOUT Port Data Out Register - 0x06C + 0x6c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -12118,11 +12118,11 @@ PC_DOUTTGL Port Data Out Toggle Register - 0x078 + 0x78 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -12136,11 +12136,11 @@ PC_DIN Port Data In Register - 0x07C + 0x7c 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -12154,11 +12154,11 @@ PC_PINLOCKN Port Unlocked Pins Register - 0x080 + 0x80 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -12172,11 +12172,11 @@ PC_OVTDIS Over Voltage Disable for all modes - 0x088 + 0x88 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -12190,7 +12190,7 @@ PD_CTRL Port Control Register - 0x090 + 0x90 32 read-write 0x00600060 @@ -12243,11 +12243,11 @@ PD_MODEL Port Pin Mode Low Register - 0x094 + 0x94 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -12309,32 +12309,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12398,32 +12398,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12487,32 +12487,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12576,32 +12576,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12665,32 +12665,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12754,32 +12754,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12843,32 +12843,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12932,32 +12932,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -12966,11 +12966,11 @@ PD_MODEH Port Pin Mode High Register - 0x098 + 0x98 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -13032,32 +13032,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13121,32 +13121,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13210,32 +13210,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13299,32 +13299,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13388,32 +13388,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13477,32 +13477,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13566,32 +13566,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13655,32 +13655,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13689,11 +13689,11 @@ PD_DOUT Port Data Out Register - 0x09C + 0x9c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -13707,11 +13707,11 @@ PD_DOUTTGL Port Data Out Toggle Register - 0x0A8 + 0xa8 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -13725,11 +13725,11 @@ PD_DIN Port Data In Register - 0x0AC + 0xac 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -13743,11 +13743,11 @@ PD_PINLOCKN Port Unlocked Pins Register - 0x0B0 + 0xb0 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -13761,11 +13761,11 @@ PD_OVTDIS Over Voltage Disable for all modes - 0x0B8 + 0xb8 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -13779,7 +13779,7 @@ PE_CTRL Port Control Register - 0x0C0 + 0xc0 32 read-write 0x00600060 @@ -13832,11 +13832,11 @@ PE_MODEL Port Pin Mode Low Register - 0x0C4 + 0xc4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -13898,32 +13898,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -13987,32 +13987,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14076,32 +14076,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14165,32 +14165,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14254,32 +14254,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14343,32 +14343,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14432,32 +14432,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14521,32 +14521,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14555,11 +14555,11 @@ PE_MODEH Port Pin Mode High Register - 0x0C8 + 0xc8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -14621,32 +14621,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14710,32 +14710,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14799,32 +14799,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14888,32 +14888,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -14977,32 +14977,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15066,32 +15066,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15155,32 +15155,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15244,32 +15244,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15278,11 +15278,11 @@ PE_DOUT Port Data Out Register - 0x0CC + 0xcc 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -15296,11 +15296,11 @@ PE_DOUTTGL Port Data Out Toggle Register - 0x0D8 + 0xd8 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -15314,11 +15314,11 @@ PE_DIN Port Data In Register - 0x0DC + 0xdc 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -15332,11 +15332,11 @@ PE_PINLOCKN Port Unlocked Pins Register - 0x0E0 + 0xe0 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -15350,11 +15350,11 @@ PE_OVTDIS Over Voltage Disable for all modes - 0x0E8 + 0xe8 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -15368,7 +15368,7 @@ PF_CTRL Port Control Register - 0x0F0 + 0xf0 32 read-write 0x00600060 @@ -15421,11 +15421,11 @@ PF_MODEL Port Pin Mode Low Register - 0x0F4 + 0xf4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -15487,32 +15487,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15576,32 +15576,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15665,32 +15665,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15754,32 +15754,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15843,32 +15843,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -15932,32 +15932,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16021,32 +16021,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16110,32 +16110,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16144,11 +16144,11 @@ PF_MODEH Port Pin Mode High Register - 0x0F8 + 0xf8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -16210,32 +16210,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16299,32 +16299,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16388,32 +16388,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16477,32 +16477,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16566,32 +16566,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16655,32 +16655,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16744,32 +16744,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16833,32 +16833,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -16867,11 +16867,11 @@ PF_DOUT Port Data Out Register - 0x0FC + 0xfc 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -16889,7 +16889,7 @@ 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -16903,11 +16903,11 @@ PF_DIN Port Data In Register - 0x10C + 0x10c 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -16924,8 +16924,8 @@ 0x110 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -16943,7 +16943,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -17014,7 +17014,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -17076,32 +17076,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17165,32 +17165,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17254,32 +17254,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17343,32 +17343,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17432,32 +17432,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17521,32 +17521,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17610,32 +17610,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17699,32 +17699,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17737,7 +17737,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -17799,32 +17799,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17888,32 +17888,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -17977,32 +17977,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18066,32 +18066,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18155,32 +18155,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18244,32 +18244,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18333,32 +18333,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18422,32 +18422,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18456,11 +18456,11 @@ PG_DOUT Port Data Out Register - 0x12C + 0x12c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -18478,7 +18478,7 @@ 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -18492,11 +18492,11 @@ PG_DIN Port Data In Register - 0x13C + 0x13c 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -18513,8 +18513,8 @@ 0x140 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -18532,7 +18532,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -18603,7 +18603,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -18665,32 +18665,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18754,32 +18754,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18843,32 +18843,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -18932,32 +18932,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19021,32 +19021,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19110,32 +19110,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19199,32 +19199,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19288,32 +19288,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19326,7 +19326,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -19388,32 +19388,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19477,32 +19477,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19566,32 +19566,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19655,32 +19655,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19744,32 +19744,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19833,32 +19833,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -19922,32 +19922,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20011,32 +20011,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20045,11 +20045,11 @@ PH_DOUT Port Data Out Register - 0x15C + 0x15c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -20067,7 +20067,7 @@ 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -20081,11 +20081,11 @@ PH_DIN Port Data In Register - 0x16C + 0x16c 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -20102,8 +20102,8 @@ 0x170 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -20121,7 +20121,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -20192,7 +20192,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -20254,32 +20254,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20343,32 +20343,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20432,32 +20432,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20521,32 +20521,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20610,32 +20610,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20699,32 +20699,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20788,32 +20788,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20877,32 +20877,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -20915,7 +20915,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -20977,32 +20977,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21066,32 +21066,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21155,32 +21155,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21244,32 +21244,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21333,32 +21333,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21422,32 +21422,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21511,32 +21511,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21600,32 +21600,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21634,11 +21634,11 @@ PI_DOUT Port Data Out Register - 0x18C + 0x18c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -21656,7 +21656,7 @@ 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -21670,11 +21670,11 @@ PI_DIN Port Data In Register - 0x19C + 0x19c 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -21688,11 +21688,11 @@ PI_PINLOCKN Port Unlocked Pins Register - 0x1A0 + 0x1a0 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -21706,11 +21706,11 @@ PI_OVTDIS Over Voltage Disable for all modes - 0x1A8 + 0x1a8 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -21724,7 +21724,7 @@ PJ_CTRL Port Control Register - 0x1B0 + 0x1b0 32 read-write 0x00600060 @@ -21777,11 +21777,11 @@ PJ_MODEL Port Pin Mode Low Register - 0x1B4 + 0x1b4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -21843,32 +21843,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -21932,32 +21932,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22021,32 +22021,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22110,32 +22110,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22199,32 +22199,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22288,32 +22288,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22377,32 +22377,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22466,32 +22466,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22500,11 +22500,11 @@ PJ_MODEH Port Pin Mode High Register - 0x1B8 + 0x1b8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -22566,32 +22566,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22655,32 +22655,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22744,32 +22744,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22833,32 +22833,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -22922,32 +22922,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23011,32 +23011,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23100,32 +23100,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23189,32 +23189,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23223,11 +23223,11 @@ PJ_DOUT Port Data Out Register - 0x1BC + 0x1bc 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -23241,11 +23241,11 @@ PJ_DOUTTGL Port Data Out Toggle Register - 0x1C8 + 0x1c8 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -23259,11 +23259,11 @@ PJ_DIN Port Data In Register - 0x1CC + 0x1cc 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -23277,11 +23277,11 @@ PJ_PINLOCKN Port Unlocked Pins Register - 0x1D0 + 0x1d0 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -23295,11 +23295,11 @@ PJ_OVTDIS Over Voltage Disable for all modes - 0x1D8 + 0x1d8 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -23313,7 +23313,7 @@ PK_CTRL Port Control Register - 0x1E0 + 0x1e0 32 read-write 0x00600060 @@ -23366,11 +23366,11 @@ PK_MODEL Port Pin Mode Low Register - 0x1E4 + 0x1e4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -23432,32 +23432,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23521,32 +23521,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23610,32 +23610,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23699,32 +23699,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23788,32 +23788,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23877,32 +23877,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -23966,32 +23966,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24055,32 +24055,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24089,11 +24089,11 @@ PK_MODEH Port Pin Mode High Register - 0x1E8 + 0x1e8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -24155,32 +24155,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24244,32 +24244,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24333,32 +24333,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24422,32 +24422,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24511,32 +24511,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24600,32 +24600,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24689,32 +24689,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24778,32 +24778,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -24812,11 +24812,11 @@ PK_DOUT Port Data Out Register - 0x1EC + 0x1ec 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -24830,11 +24830,11 @@ PK_DOUTTGL Port Data Out Toggle Register - 0x1F8 + 0x1f8 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -24848,11 +24848,11 @@ PK_DIN Port Data In Register - 0x1FC + 0x1fc 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -24869,8 +24869,8 @@ 0x200 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -24888,7 +24888,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -24959,7 +24959,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE0 @@ -25021,32 +25021,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25110,32 +25110,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25199,32 +25199,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25288,32 +25288,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25377,32 +25377,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25466,32 +25466,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25555,32 +25555,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25644,32 +25644,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25682,7 +25682,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff MODE8 @@ -25744,32 +25744,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25833,32 +25833,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -25922,32 +25922,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -26011,32 +26011,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -26100,32 +26100,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -26189,32 +26189,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -26278,32 +26278,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -26367,32 +26367,32 @@ WIREDANDPULLUP Open-drain output with pullup - 0x0000000A + 0x0000000a WIREDANDPULLUPFILTER Open-drain output with filter and pullup - 0x0000000B + 0x0000000b WIREDANDALT Open-drain output using alternate control - 0x0000000C + 0x0000000c WIREDANDALTFILTER Open-drain output using alternate control with filter - 0x0000000D + 0x0000000d WIREDANDALTPULLUP Open-drain output using alternate control with pullup - 0x0000000E + 0x0000000e WIREDANDALTPULLUPFILTER Open-drain output uisng alternate control with filter and pullup - 0x0000000F + 0x0000000f @@ -26401,11 +26401,11 @@ PL_DOUT Port Data Out Register - 0x21C + 0x21c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff DOUT @@ -26423,7 +26423,7 @@ 32 write-only 0x00000000 - 0x0000FFFF + 0x0000ffff DOUTTGL @@ -26437,11 +26437,11 @@ PL_DIN Port Data In Register - 0x22C + 0x22c 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff DIN @@ -26458,8 +26458,8 @@ 0x230 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff PINLOCKN @@ -26477,7 +26477,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff OVTDIS @@ -26495,7 +26495,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff EXTIPSEL0 @@ -26778,7 +26778,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff EXTIPSEL8 @@ -27300,7 +27300,7 @@ EXTIPINSELH External Interrupt Pin Select High Register - 0x40C + 0x40c 32 read-write 0x32103210 @@ -27547,7 +27547,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff EXTIRISE @@ -27565,7 +27565,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff EXTIFALL @@ -27632,11 +27632,11 @@ IF Interrupt Flag Register - 0x41C + 0x41c 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff EXT @@ -27661,7 +27661,7 @@ 32 write-only 0x00000000 - 0xFFFFFFFF + 0xffffffff EXT @@ -27686,7 +27686,7 @@ 32 write-only 0x00000000 - 0xFFFFFFFF + 0xffffffff EXT @@ -27711,7 +27711,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff EXT @@ -27732,11 +27732,11 @@ EM4WUEN EM4 wake up Enable Register - 0x42C + 0x42c 32 read-write 0x00000000 - 0xFFFF0000 + 0xffff0000 EM4WUEN @@ -27753,8 +27753,8 @@ 0x440 32 read-write - 0x0000000F - 0x0000001F + 0x0000000f + 0x0000001f SWCLKTCKPEN @@ -27800,7 +27800,7 @@ 32 read-write 0x00000000 - 0x0000003F + 0x0000003f SWVLOC @@ -27865,7 +27865,7 @@ 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -27894,7 +27894,7 @@ PRS 1.6 PRS - 0x400E6000 + 0x400e6000 0 0x00000400 @@ -27904,11 +27904,11 @@ SWPULSE Software Pulse Register - 0x000 + 0x0 32 write-only 0x00000000 - 0x00000FFF + 0x00000fff CH0PULSE @@ -27999,11 +27999,11 @@ SWLEVEL Software Level Register - 0x004 + 0x4 32 read-write 0x00000000 - 0x00000FFF + 0x00000fff CH0LEVEL @@ -28094,11 +28094,11 @@ ROUTEPEN I/O Routing Pin Enable Register - 0x008 + 0x8 32 read-write 0x00000000 - 0x00000FFF + 0x00000fff CH0PEN @@ -28189,11 +28189,11 @@ ROUTELOC0 I/O Routing Location Register - 0x010 + 0x10 32 read-write 0x00000000 - 0x3F3F3F3F + 0x3f3f3f3f CH0LOC @@ -28255,22 +28255,22 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d @@ -28432,27 +28432,27 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e @@ -28461,11 +28461,11 @@ ROUTELOC1 I/O Routing Location Register - 0x014 + 0x14 32 read-write 0x00000000 - 0x3F3F3F3F + 0x3f3f3f3f CH4LOC @@ -28615,32 +28615,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -28714,7 +28714,7 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a @@ -28723,11 +28723,11 @@ ROUTELOC2 I/O Routing Location Register - 0x018 + 0x18 32 read-write 0x00000000 - 0x3F3F3F3F + 0x3f3f3f3f CH8LOC @@ -28789,7 +28789,7 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a @@ -28853,32 +28853,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -28970,11 +28970,11 @@ CTRL Control Register - 0x020 + 0x20 32 read-write 0x00000000 - 0x0000001F + 0x0000001f SEVONPRS @@ -29043,12 +29043,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -29057,11 +29057,11 @@ DMAREQ0 DMA Request 0 Register - 0x024 + 0x24 32 read-write 0x00000000 - 0x000003C0 + 0x000003c0 PRSSEL @@ -29123,12 +29123,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -29137,11 +29137,11 @@ DMAREQ1 DMA Request 1 Register - 0x028 + 0x28 32 read-write 0x00000000 - 0x000003C0 + 0x000003c0 PRSSEL @@ -29203,12 +29203,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -29217,11 +29217,11 @@ PEEK PRS Channel Values - 0x030 + 0x30 32 read-only 0x00000000 - 0x00000FFF + 0x00000fff CH0VAL @@ -29312,11 +29312,11 @@ CH0_CTRL Channel Control Register - 0x040 + 0x40 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -29375,12 +29375,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -29410,12 +29410,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -29488,11 +29488,11 @@ CH1_CTRL Channel Control Register - 0x044 + 0x44 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -29551,12 +29551,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -29586,12 +29586,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -29664,11 +29664,11 @@ CH2_CTRL Channel Control Register - 0x048 + 0x48 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -29727,12 +29727,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -29762,12 +29762,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -29840,11 +29840,11 @@ CH3_CTRL Channel Control Register - 0x04C + 0x4c 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -29903,12 +29903,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -29938,12 +29938,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -30016,11 +30016,11 @@ CH4_CTRL Channel Control Register - 0x050 + 0x50 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -30079,12 +30079,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -30114,12 +30114,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -30192,11 +30192,11 @@ CH5_CTRL Channel Control Register - 0x054 + 0x54 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -30255,12 +30255,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -30290,12 +30290,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -30368,11 +30368,11 @@ CH6_CTRL Channel Control Register - 0x058 + 0x58 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -30431,12 +30431,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -30466,12 +30466,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -30544,11 +30544,11 @@ CH7_CTRL Channel Control Register - 0x05C + 0x5c 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -30607,12 +30607,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -30642,12 +30642,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -30720,11 +30720,11 @@ CH8_CTRL Channel Control Register - 0x060 + 0x60 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -30783,12 +30783,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -30818,12 +30818,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -30896,11 +30896,11 @@ CH9_CTRL Channel Control Register - 0x064 + 0x64 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -30959,12 +30959,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -30994,12 +30994,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -31072,11 +31072,11 @@ CH10_CTRL Channel Control Register - 0x068 + 0x68 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -31135,12 +31135,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -31170,12 +31170,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -31248,11 +31248,11 @@ CH11_CTRL Channel Control Register - 0x06C + 0x6c 32 read-write 0x00000000 - 0x5E307F07 + 0x5e307f07 SIGSEL @@ -31311,12 +31311,12 @@ TIMER0 Timer 0 - 0x0000001C + 0x0000001c TIMER1 Timer 1 - 0x0000001D + 0x0000001d RTCC @@ -31346,12 +31346,12 @@ CRYOTIMER CryoTimer - 0x0000003C + 0x0000003c CMU Clock Management Unit - 0x0000003D + 0x0000003d @@ -31427,7 +31427,7 @@ LDMA 1.6 LDMA - 0x400E2000 + 0x400e2000 0 0x00001000 @@ -31441,11 +31441,11 @@ CTRL DMA Control Register - 0x000 + 0x0 32 read-write 0x07000000 - 0x0700FFFF + 0x0700ffff SYNCPRSSETEN @@ -31473,11 +31473,11 @@ STATUS DMA Status Register - 0x004 + 0x4 32 read-only 0x08100000 - 0x1F1F073B + 0x1f1f073b ANYBUSY @@ -31526,11 +31526,11 @@ SYNC DMA Synchronization Trigger Register (Single-Cycle RMW) - 0x008 + 0x8 32 read-write 0x00000000 - 0x000000FF + 0x000000ff SYNCTRIG @@ -31544,11 +31544,11 @@ CHEN DMA Channel Enable Register (Single-Cycle RMW) - 0x020 + 0x20 32 read-write 0x00000000 - 0x000000FF + 0x000000ff CHEN @@ -31562,11 +31562,11 @@ CHBUSY DMA Channel Busy Register - 0x024 + 0x24 32 read-only 0x00000000 - 0x000000FF + 0x000000ff BUSY @@ -31580,11 +31580,11 @@ CHDONE DMA Channel Linking Done Register (Single-Cycle RMW) - 0x028 + 0x28 32 read-write 0x00000000 - 0x000000FF + 0x000000ff CHDONE @@ -31598,11 +31598,11 @@ DBGHALT DMA Channel Debug Halt Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0x000000FF + 0x000000ff DBGHALT @@ -31616,11 +31616,11 @@ SWREQ DMA Channel Software Transfer Request Register - 0x030 + 0x30 32 write-only 0x00000000 - 0x000000FF + 0x000000ff SWREQ @@ -31634,11 +31634,11 @@ REQDIS DMA Channel Request Disable Register - 0x034 + 0x34 32 read-write 0x00000000 - 0x000000FF + 0x000000ff REQDIS @@ -31652,11 +31652,11 @@ REQPEND DMA Channel Requests Pending Register - 0x038 + 0x38 32 read-only 0x00000000 - 0x000000FF + 0x000000ff REQPEND @@ -31670,11 +31670,11 @@ LINKLOAD DMA Channel Link Load Register - 0x03C + 0x3c 32 write-only 0x00000000 - 0x000000FF + 0x000000ff LINKLOAD @@ -31688,11 +31688,11 @@ REQCLEAR DMA Channel Request Clear Register - 0x040 + 0x40 32 write-only 0x00000000 - 0x000000FF + 0x000000ff REQCLEAR @@ -31706,11 +31706,11 @@ IF Interrupt Flag Register - 0x060 + 0x60 32 read-only 0x00000000 - 0x800000FF + 0x800000ff DONE @@ -31731,11 +31731,11 @@ IFS Interrupt Flag Set Register - 0x064 + 0x64 32 write-only 0x00000000 - 0x800000FF + 0x800000ff DONE @@ -31756,11 +31756,11 @@ IFC Interrupt Flag Clear Register - 0x068 + 0x68 32 write-only 0x00000000 - 0x800000FF + 0x800000ff DONE @@ -31781,11 +31781,11 @@ IEN Interrupt Enable register - 0x06C + 0x6c 32 read-write 0x00000000 - 0x800000FF + 0x800000ff DONE @@ -31806,11 +31806,11 @@ CH0_REQSEL Channel Peripheral Request Select Register - 0x080 + 0x80 32 read-write 0x00000000 - 0x003F000F + 0x003f000f SIGSEL @@ -31844,12 +31844,12 @@ USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000C + 0x0000000c USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000D + 0x0000000d LEUART0 @@ -31888,7 +31888,7 @@ CH0_CFG Channel Configuration Register - 0x084 + 0x84 32 read-write 0x00000000 @@ -31942,11 +31942,11 @@ CH0_LOOP Channel Loop Counter Register - 0x088 + 0x88 32 read-write 0x00000000 - 0x000000FF + 0x000000ff LOOPCNT @@ -31960,11 +31960,11 @@ CH0_CTRL Channel Descriptor Control Word Register - 0x08C + 0x8c 32 read-write 0x00000000 - 0xFFFFFFFB + 0xfffffffb STRUCTTYPE @@ -32061,32 +32061,32 @@ UNIT64 64 unit transfers per arbitration - 0x0000000A + 0x0000000a UNIT128 128 unit transfers per arbitration - 0x0000000B + 0x0000000b UNIT256 256 unit transfers per arbitration - 0x0000000C + 0x0000000c UNIT512 512 unit transfers per arbitration - 0x0000000D + 0x0000000d UNIT1024 1024 unit transfers per arbitration - 0x0000000E + 0x0000000e ALL Transfer all units as specified by the XFRCNT field - 0x0000000F + 0x0000000f @@ -32219,11 +32219,11 @@ CH0_SRC Channel Descriptor Source Data Address Register - 0x090 + 0x90 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SRCADDR @@ -32237,11 +32237,11 @@ CH0_DST Channel Descriptor Destination Data Address Register - 0x094 + 0x94 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff DSTADDR @@ -32255,11 +32255,11 @@ CH0_LINK Channel Descriptor Link Structure Address Register - 0x098 + 0x98 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff LINKMODE @@ -32287,11 +32287,11 @@ CH1_REQSEL Channel Peripheral Request Select Register - 0x0B0 + 0xb0 32 read-write 0x00000000 - 0x003F000F + 0x003f000f SIGSEL @@ -32325,12 +32325,12 @@ USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000C + 0x0000000c USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000D + 0x0000000d LEUART0 @@ -32369,7 +32369,7 @@ CH1_CFG Channel Configuration Register - 0x0B4 + 0xb4 32 read-write 0x00000000 @@ -32423,11 +32423,11 @@ CH1_LOOP Channel Loop Counter Register - 0x0B8 + 0xb8 32 read-write 0x00000000 - 0x000000FF + 0x000000ff LOOPCNT @@ -32441,11 +32441,11 @@ CH1_CTRL Channel Descriptor Control Word Register - 0x0BC + 0xbc 32 read-write 0x00000000 - 0xFFFFFFFB + 0xfffffffb STRUCTTYPE @@ -32542,32 +32542,32 @@ UNIT64 64 unit transfers per arbitration - 0x0000000A + 0x0000000a UNIT128 128 unit transfers per arbitration - 0x0000000B + 0x0000000b UNIT256 256 unit transfers per arbitration - 0x0000000C + 0x0000000c UNIT512 512 unit transfers per arbitration - 0x0000000D + 0x0000000d UNIT1024 1024 unit transfers per arbitration - 0x0000000E + 0x0000000e ALL Transfer all units as specified by the XFRCNT field - 0x0000000F + 0x0000000f @@ -32700,11 +32700,11 @@ CH1_SRC Channel Descriptor Source Data Address Register - 0x0C0 + 0xc0 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SRCADDR @@ -32718,11 +32718,11 @@ CH1_DST Channel Descriptor Destination Data Address Register - 0x0C4 + 0xc4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff DSTADDR @@ -32736,11 +32736,11 @@ CH1_LINK Channel Descriptor Link Structure Address Register - 0x0C8 + 0xc8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff LINKMODE @@ -32768,11 +32768,11 @@ CH2_REQSEL Channel Peripheral Request Select Register - 0x0E0 + 0xe0 32 read-write 0x00000000 - 0x003F000F + 0x003f000f SIGSEL @@ -32806,12 +32806,12 @@ USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000C + 0x0000000c USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000D + 0x0000000d LEUART0 @@ -32850,7 +32850,7 @@ CH2_CFG Channel Configuration Register - 0x0E4 + 0xe4 32 read-write 0x00000000 @@ -32904,11 +32904,11 @@ CH2_LOOP Channel Loop Counter Register - 0x0E8 + 0xe8 32 read-write 0x00000000 - 0x000000FF + 0x000000ff LOOPCNT @@ -32922,11 +32922,11 @@ CH2_CTRL Channel Descriptor Control Word Register - 0x0EC + 0xec 32 read-write 0x00000000 - 0xFFFFFFFB + 0xfffffffb STRUCTTYPE @@ -33023,32 +33023,32 @@ UNIT64 64 unit transfers per arbitration - 0x0000000A + 0x0000000a UNIT128 128 unit transfers per arbitration - 0x0000000B + 0x0000000b UNIT256 256 unit transfers per arbitration - 0x0000000C + 0x0000000c UNIT512 512 unit transfers per arbitration - 0x0000000D + 0x0000000d UNIT1024 1024 unit transfers per arbitration - 0x0000000E + 0x0000000e ALL Transfer all units as specified by the XFRCNT field - 0x0000000F + 0x0000000f @@ -33181,11 +33181,11 @@ CH2_SRC Channel Descriptor Source Data Address Register - 0x0F0 + 0xf0 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SRCADDR @@ -33199,11 +33199,11 @@ CH2_DST Channel Descriptor Destination Data Address Register - 0x0F4 + 0xf4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff DSTADDR @@ -33217,11 +33217,11 @@ CH2_LINK Channel Descriptor Link Structure Address Register - 0x0F8 + 0xf8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff LINKMODE @@ -33253,7 +33253,7 @@ 32 read-write 0x00000000 - 0x003F000F + 0x003f000f SIGSEL @@ -33287,12 +33287,12 @@ USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000C + 0x0000000c USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000D + 0x0000000d LEUART0 @@ -33389,7 +33389,7 @@ 32 read-write 0x00000000 - 0x000000FF + 0x000000ff LOOPCNT @@ -33403,11 +33403,11 @@ CH3_CTRL Channel Descriptor Control Word Register - 0x11C + 0x11c 32 read-write 0x00000000 - 0xFFFFFFFB + 0xfffffffb STRUCTTYPE @@ -33504,32 +33504,32 @@ UNIT64 64 unit transfers per arbitration - 0x0000000A + 0x0000000a UNIT128 128 unit transfers per arbitration - 0x0000000B + 0x0000000b UNIT256 256 unit transfers per arbitration - 0x0000000C + 0x0000000c UNIT512 512 unit transfers per arbitration - 0x0000000D + 0x0000000d UNIT1024 1024 unit transfers per arbitration - 0x0000000E + 0x0000000e ALL Transfer all units as specified by the XFRCNT field - 0x0000000F + 0x0000000f @@ -33666,7 +33666,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SRCADDR @@ -33684,7 +33684,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff DSTADDR @@ -33702,7 +33702,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff LINKMODE @@ -33734,7 +33734,7 @@ 32 read-write 0x00000000 - 0x003F000F + 0x003f000f SIGSEL @@ -33768,12 +33768,12 @@ USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000C + 0x0000000c USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000D + 0x0000000d LEUART0 @@ -33870,7 +33870,7 @@ 32 read-write 0x00000000 - 0x000000FF + 0x000000ff LOOPCNT @@ -33884,11 +33884,11 @@ CH4_CTRL Channel Descriptor Control Word Register - 0x14C + 0x14c 32 read-write 0x00000000 - 0xFFFFFFFB + 0xfffffffb STRUCTTYPE @@ -33985,32 +33985,32 @@ UNIT64 64 unit transfers per arbitration - 0x0000000A + 0x0000000a UNIT128 128 unit transfers per arbitration - 0x0000000B + 0x0000000b UNIT256 256 unit transfers per arbitration - 0x0000000C + 0x0000000c UNIT512 512 unit transfers per arbitration - 0x0000000D + 0x0000000d UNIT1024 1024 unit transfers per arbitration - 0x0000000E + 0x0000000e ALL Transfer all units as specified by the XFRCNT field - 0x0000000F + 0x0000000f @@ -34147,7 +34147,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SRCADDR @@ -34165,7 +34165,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff DSTADDR @@ -34183,7 +34183,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff LINKMODE @@ -34215,7 +34215,7 @@ 32 read-write 0x00000000 - 0x003F000F + 0x003f000f SIGSEL @@ -34249,12 +34249,12 @@ USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000C + 0x0000000c USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000D + 0x0000000d LEUART0 @@ -34351,7 +34351,7 @@ 32 read-write 0x00000000 - 0x000000FF + 0x000000ff LOOPCNT @@ -34365,11 +34365,11 @@ CH5_CTRL Channel Descriptor Control Word Register - 0x17C + 0x17c 32 read-write 0x00000000 - 0xFFFFFFFB + 0xfffffffb STRUCTTYPE @@ -34466,32 +34466,32 @@ UNIT64 64 unit transfers per arbitration - 0x0000000A + 0x0000000a UNIT128 128 unit transfers per arbitration - 0x0000000B + 0x0000000b UNIT256 256 unit transfers per arbitration - 0x0000000C + 0x0000000c UNIT512 512 unit transfers per arbitration - 0x0000000D + 0x0000000d UNIT1024 1024 unit transfers per arbitration - 0x0000000E + 0x0000000e ALL Transfer all units as specified by the XFRCNT field - 0x0000000F + 0x0000000f @@ -34628,7 +34628,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SRCADDR @@ -34646,7 +34646,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff DSTADDR @@ -34664,7 +34664,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff LINKMODE @@ -34692,11 +34692,11 @@ CH6_REQSEL Channel Peripheral Request Select Register - 0x1A0 + 0x1a0 32 read-write 0x00000000 - 0x003F000F + 0x003f000f SIGSEL @@ -34730,12 +34730,12 @@ USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000C + 0x0000000c USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000D + 0x0000000d LEUART0 @@ -34774,7 +34774,7 @@ CH6_CFG Channel Configuration Register - 0x1A4 + 0x1a4 32 read-write 0x00000000 @@ -34828,11 +34828,11 @@ CH6_LOOP Channel Loop Counter Register - 0x1A8 + 0x1a8 32 read-write 0x00000000 - 0x000000FF + 0x000000ff LOOPCNT @@ -34846,11 +34846,11 @@ CH6_CTRL Channel Descriptor Control Word Register - 0x1AC + 0x1ac 32 read-write 0x00000000 - 0xFFFFFFFB + 0xfffffffb STRUCTTYPE @@ -34947,32 +34947,32 @@ UNIT64 64 unit transfers per arbitration - 0x0000000A + 0x0000000a UNIT128 128 unit transfers per arbitration - 0x0000000B + 0x0000000b UNIT256 256 unit transfers per arbitration - 0x0000000C + 0x0000000c UNIT512 512 unit transfers per arbitration - 0x0000000D + 0x0000000d UNIT1024 1024 unit transfers per arbitration - 0x0000000E + 0x0000000e ALL Transfer all units as specified by the XFRCNT field - 0x0000000F + 0x0000000f @@ -35105,11 +35105,11 @@ CH6_SRC Channel Descriptor Source Data Address Register - 0x1B0 + 0x1b0 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SRCADDR @@ -35123,11 +35123,11 @@ CH6_DST Channel Descriptor Destination Data Address Register - 0x1B4 + 0x1b4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff DSTADDR @@ -35141,11 +35141,11 @@ CH6_LINK Channel Descriptor Link Structure Address Register - 0x1B8 + 0x1b8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff LINKMODE @@ -35173,11 +35173,11 @@ CH7_REQSEL Channel Peripheral Request Select Register - 0x1D0 + 0x1d0 32 read-write 0x00000000 - 0x003F000F + 0x003f000f SIGSEL @@ -35211,12 +35211,12 @@ USART0 Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000C + 0x0000000c USART1 Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000D + 0x0000000d LEUART0 @@ -35255,7 +35255,7 @@ CH7_CFG Channel Configuration Register - 0x1D4 + 0x1d4 32 read-write 0x00000000 @@ -35309,11 +35309,11 @@ CH7_LOOP Channel Loop Counter Register - 0x1D8 + 0x1d8 32 read-write 0x00000000 - 0x000000FF + 0x000000ff LOOPCNT @@ -35327,11 +35327,11 @@ CH7_CTRL Channel Descriptor Control Word Register - 0x1DC + 0x1dc 32 read-write 0x00000000 - 0xFFFFFFFB + 0xfffffffb STRUCTTYPE @@ -35428,32 +35428,32 @@ UNIT64 64 unit transfers per arbitration - 0x0000000A + 0x0000000a UNIT128 128 unit transfers per arbitration - 0x0000000B + 0x0000000b UNIT256 256 unit transfers per arbitration - 0x0000000C + 0x0000000c UNIT512 512 unit transfers per arbitration - 0x0000000D + 0x0000000d UNIT1024 1024 unit transfers per arbitration - 0x0000000E + 0x0000000e ALL Transfer all units as specified by the XFRCNT field - 0x0000000F + 0x0000000f @@ -35586,11 +35586,11 @@ CH7_SRC Channel Descriptor Source Data Address Register - 0x1E0 + 0x1e0 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SRCADDR @@ -35604,11 +35604,11 @@ CH7_DST Channel Descriptor Destination Data Address Register - 0x1E4 + 0x1e4 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff DSTADDR @@ -35622,11 +35622,11 @@ CH7_LINK Channel Descriptor Link Structure Address Register - 0x1E8 + 0x1e8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff LINKMODE @@ -35657,7 +35657,7 @@ FPUEH 1.6 FPUEH - 0x400E1000 + 0x400e1000 0 0x00000400 @@ -35671,11 +35671,11 @@ IF Interrupt Flag Register - 0x000 + 0x0 32 read-only 0x00000000 - 0x0000003F + 0x0000003f FPIOC @@ -35724,11 +35724,11 @@ IFS Interrupt Flag Set Register - 0x004 + 0x4 32 write-only 0x00000000 - 0x0000003F + 0x0000003f FPIOC @@ -35777,11 +35777,11 @@ IFC Interrupt Flag Clear Register - 0x008 + 0x8 32 write-only 0x00000000 - 0x0000003F + 0x0000003f FPIOC @@ -35830,11 +35830,11 @@ IEN Interrupt Enable Register - 0x00C + 0xc 32 read-write 0x00000000 - 0x0000003F + 0x0000003f FPIOC @@ -35886,7 +35886,7 @@ GPCRC 1.6 GPCRC - 0x4001C000 + 0x4001c000 0 0x00000400 @@ -35896,7 +35896,7 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 @@ -35949,7 +35949,7 @@ CMD Command Register - 0x004 + 0x4 32 write-only 0x00000000 @@ -35967,11 +35967,11 @@ INIT CRC Init Value - 0x008 + 0x8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff INIT @@ -35985,11 +35985,11 @@ POLY CRC Polynomial Value - 0x00C + 0xc 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff POLY @@ -36003,11 +36003,11 @@ INPUTDATA Input 32-bit Data Register - 0x010 + 0x10 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff INPUTDATA @@ -36021,11 +36021,11 @@ INPUTDATAHWORD Input 16-bit Data Register - 0x014 + 0x14 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff INPUTDATAHWORD @@ -36039,11 +36039,11 @@ INPUTDATABYTE Input 8-bit Data Register - 0x018 + 0x18 32 read-write 0x00000000 - 0x000000FF + 0x000000ff INPUTDATABYTE @@ -36057,11 +36057,11 @@ DATA CRC Data Register - 0x01C + 0x1c 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff DATA @@ -36075,11 +36075,11 @@ DATAREV CRC Data Reverse Register - 0x020 + 0x20 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff DATAREV @@ -36093,11 +36093,11 @@ DATABYTEREV CRC Data Byte Reverse Register - 0x024 + 0x24 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff DATABYTEREV @@ -36128,11 +36128,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0x3F032FFB + 0x3f032ffb MODE @@ -36347,7 +36347,7 @@ DIV1024 The HFPERCLK is divided by 1024 - 0x0000000A + 0x0000000a @@ -36370,7 +36370,7 @@ CMD Command Register - 0x004 + 0x4 32 write-only 0x00000000 @@ -36395,11 +36395,11 @@ STATUS Status Register - 0x008 + 0x8 32 read-only 0x00000000 - 0x0F0F0F07 + 0x0f0f0f07 RUNNING @@ -36511,11 +36511,11 @@ IF Interrupt Flag Register - 0x00C + 0xc 32 read-only 0x00000000 - 0x00000FF7 + 0x00000ff7 OF @@ -36599,11 +36599,11 @@ IFS Interrupt Flag Set Register - 0x010 + 0x10 32 write-only 0x00000000 - 0x00000FF7 + 0x00000ff7 OF @@ -36687,11 +36687,11 @@ IFC Interrupt Flag Clear Register - 0x014 + 0x14 32 write-only 0x00000000 - 0x00000FF7 + 0x00000ff7 OF @@ -36775,11 +36775,11 @@ IEN Interrupt Enable Register - 0x018 + 0x18 32 read-write 0x00000000 - 0x00000FF7 + 0x00000ff7 OF @@ -36863,11 +36863,11 @@ TOP Counter Top Value Register - 0x01C + 0x1c 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff TOP @@ -36881,11 +36881,11 @@ TOPB Counter Top Value Buffer Register - 0x020 + 0x20 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff TOPB @@ -36899,11 +36899,11 @@ CNT Counter Value Register - 0x024 + 0x24 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CNT @@ -36917,11 +36917,11 @@ LOCK TIMER Configuration Lock Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff TIMERLOCKKEY @@ -36947,11 +36947,11 @@ ROUTEPEN I/O Routing Pin Enable Register - 0x030 + 0x30 32 read-write 0x00000000 - 0x0000070F + 0x0000070f CC0PEN @@ -37007,11 +37007,11 @@ ROUTELOC0 I/O Routing Location Register - 0x034 + 0x34 32 read-write 0x00000000 - 0x3F3F3F3F + 0x3f3f3f3f CC0LOC @@ -37073,32 +37073,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -37153,32 +37153,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -37242,32 +37242,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -37322,32 +37322,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -37411,32 +37411,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -37491,32 +37491,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -37580,32 +37580,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -37660,32 +37660,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -37694,11 +37694,11 @@ ROUTELOC2 I/O Routing Location Register - 0x03C + 0x3c 32 read-write 0x00000000 - 0x003F3F3F + 0x003f3f3f CDTI0LOC @@ -37760,32 +37760,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -37840,32 +37840,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -37929,32 +37929,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -38009,32 +38009,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -38098,32 +38098,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -38178,32 +38178,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -38212,11 +38212,11 @@ CC0_CTRL CC Channel Control Register - 0x060 + 0x60 32 read-write 0x00000000 - 0x7F0F3F17 + 0x7f0f3f17 MODE @@ -38408,12 +38408,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -38501,11 +38501,11 @@ CC0_CCV CC Channel Value Register - 0x064 + 0x64 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -38520,11 +38520,11 @@ CC0_CCVP CC Channel Value Peek Register - 0x068 + 0x68 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CCVP @@ -38538,11 +38538,11 @@ CC0_CCVB CC Channel Buffer Register - 0x06C + 0x6c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CCVB @@ -38556,11 +38556,11 @@ CC1_CTRL CC Channel Control Register - 0x070 + 0x70 32 read-write 0x00000000 - 0x7F0F3F17 + 0x7f0f3f17 MODE @@ -38752,12 +38752,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -38845,11 +38845,11 @@ CC1_CCV CC Channel Value Register - 0x074 + 0x74 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -38864,11 +38864,11 @@ CC1_CCVP CC Channel Value Peek Register - 0x078 + 0x78 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CCVP @@ -38882,11 +38882,11 @@ CC1_CCVB CC Channel Buffer Register - 0x07C + 0x7c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CCVB @@ -38900,11 +38900,11 @@ CC2_CTRL CC Channel Control Register - 0x080 + 0x80 32 read-write 0x00000000 - 0x7F0F3F17 + 0x7f0f3f17 MODE @@ -39096,12 +39096,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -39189,11 +39189,11 @@ CC2_CCV CC Channel Value Register - 0x084 + 0x84 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -39208,11 +39208,11 @@ CC2_CCVP CC Channel Value Peek Register - 0x088 + 0x88 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CCVP @@ -39226,11 +39226,11 @@ CC2_CCVB CC Channel Buffer Register - 0x08C + 0x8c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CCVB @@ -39244,11 +39244,11 @@ CC3_CTRL CC Channel Control Register - 0x090 + 0x90 32 read-write 0x00000000 - 0x7F0F3F17 + 0x7f0f3f17 MODE @@ -39440,12 +39440,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -39533,11 +39533,11 @@ CC3_CCV CC Channel Value Register - 0x094 + 0x94 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -39552,11 +39552,11 @@ CC3_CCVP CC Channel Value Peek Register - 0x098 + 0x98 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CCVP @@ -39570,11 +39570,11 @@ CC3_CCVB CC Channel Buffer Register - 0x09C + 0x9c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CCVB @@ -39588,11 +39588,11 @@ DTCTRL DTI Control Register - 0x0A0 + 0xa0 32 read-write 0x00000000 - 0x010006FF + 0x010006ff DTEN @@ -39682,12 +39682,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -39717,11 +39717,11 @@ DTTIME DTI Time Control Register - 0x0A4 + 0xa4 32 read-write 0x00000000 - 0x003F3F0F + 0x003f3f0f DTPRESC @@ -39783,7 +39783,7 @@ DIV1024 The HFPERCLK is divided by 1024 - 0x0000000A + 0x0000000a @@ -39806,11 +39806,11 @@ DTFC DTI Fault Configuration Register - 0x0A8 + 0xa8 32 read-write 0x00000000 - 0x0F030F0F + 0x0f030f0f DTPRS0FSEL @@ -39872,12 +39872,12 @@ PRSCH10 PRS Channel 10 selected as fault source 10 - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as fault source 11 - 0x0000000B + 0x0000000b @@ -39941,12 +39941,12 @@ PRSCH10 PRS Channel 10 selected as fault source 1 - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as fault source 1 - 0x0000000B + 0x0000000b @@ -40012,11 +40012,11 @@ DTOGEN DTI Output Generation Enable Register - 0x0AC + 0xac 32 read-write 0x00000000 - 0x0000003F + 0x0000003f DTOGCC0EN @@ -40065,11 +40065,11 @@ DTFAULT DTI Fault Register - 0x0B0 + 0xb0 32 read-only 0x00000000 - 0x0000000F + 0x0000000f DTPRS0F @@ -40104,11 +40104,11 @@ DTFAULTC DTI Fault Clear Register - 0x0B4 + 0xb4 32 write-only 0x00000000 - 0x0000000F + 0x0000000f DTPRS0FC @@ -40143,11 +40143,11 @@ DTLOCK DTI Configuration Lock Register - 0x0B8 + 0xb8 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -40190,11 +40190,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0x3F032FFB + 0x3f032ffb MODE @@ -40409,7 +40409,7 @@ DIV1024 The HFPERCLK is divided by 1024 - 0x0000000A + 0x0000000a @@ -40432,7 +40432,7 @@ CMD Command Register - 0x004 + 0x4 32 write-only 0x00000000 @@ -40457,11 +40457,11 @@ STATUS Status Register - 0x008 + 0x8 32 read-only 0x00000000 - 0x0F0F0F07 + 0x0f0f0f07 RUNNING @@ -40573,11 +40573,11 @@ IF Interrupt Flag Register - 0x00C + 0xc 32 read-only 0x00000000 - 0x00000FF7 + 0x00000ff7 OF @@ -40661,11 +40661,11 @@ IFS Interrupt Flag Set Register - 0x010 + 0x10 32 write-only 0x00000000 - 0x00000FF7 + 0x00000ff7 OF @@ -40749,11 +40749,11 @@ IFC Interrupt Flag Clear Register - 0x014 + 0x14 32 write-only 0x00000000 - 0x00000FF7 + 0x00000ff7 OF @@ -40837,11 +40837,11 @@ IEN Interrupt Enable Register - 0x018 + 0x18 32 read-write 0x00000000 - 0x00000FF7 + 0x00000ff7 OF @@ -40925,11 +40925,11 @@ TOP Counter Top Value Register - 0x01C + 0x1c 32 read-write - 0x0000FFFF - 0x0000FFFF + 0x0000ffff + 0x0000ffff TOP @@ -40943,11 +40943,11 @@ TOPB Counter Top Value Buffer Register - 0x020 + 0x20 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff TOPB @@ -40961,11 +40961,11 @@ CNT Counter Value Register - 0x024 + 0x24 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CNT @@ -40979,11 +40979,11 @@ LOCK TIMER Configuration Lock Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff TIMERLOCKKEY @@ -41009,11 +41009,11 @@ ROUTEPEN I/O Routing Pin Enable Register - 0x030 + 0x30 32 read-write 0x00000000 - 0x0000070F + 0x0000070f CC0PEN @@ -41069,11 +41069,11 @@ ROUTELOC0 I/O Routing Location Register - 0x034 + 0x34 32 read-write 0x00000000 - 0x3F3F3F3F + 0x3f3f3f3f CC0LOC @@ -41135,32 +41135,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -41215,32 +41215,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -41304,32 +41304,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -41384,32 +41384,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -41473,32 +41473,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -41553,32 +41553,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -41642,32 +41642,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -41722,32 +41722,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -41756,11 +41756,11 @@ ROUTELOC2 I/O Routing Location Register - 0x03C + 0x3c 32 read-write 0x00000000 - 0x003F3F3F + 0x003f3f3f CDTI0LOC @@ -41822,32 +41822,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -41902,32 +41902,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -41991,32 +41991,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -42071,32 +42071,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -42160,32 +42160,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -42240,32 +42240,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -42274,11 +42274,11 @@ CC0_CTRL CC Channel Control Register - 0x060 + 0x60 32 read-write 0x00000000 - 0x7F0F3F17 + 0x7f0f3f17 MODE @@ -42470,12 +42470,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -42563,11 +42563,11 @@ CC0_CCV CC Channel Value Register - 0x064 + 0x64 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -42582,11 +42582,11 @@ CC0_CCVP CC Channel Value Peek Register - 0x068 + 0x68 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CCVP @@ -42600,11 +42600,11 @@ CC0_CCVB CC Channel Buffer Register - 0x06C + 0x6c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CCVB @@ -42618,11 +42618,11 @@ CC1_CTRL CC Channel Control Register - 0x070 + 0x70 32 read-write 0x00000000 - 0x7F0F3F17 + 0x7f0f3f17 MODE @@ -42814,12 +42814,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -42907,11 +42907,11 @@ CC1_CCV CC Channel Value Register - 0x074 + 0x74 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -42926,11 +42926,11 @@ CC1_CCVP CC Channel Value Peek Register - 0x078 + 0x78 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CCVP @@ -42944,11 +42944,11 @@ CC1_CCVB CC Channel Buffer Register - 0x07C + 0x7c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CCVB @@ -42962,11 +42962,11 @@ CC2_CTRL CC Channel Control Register - 0x080 + 0x80 32 read-write 0x00000000 - 0x7F0F3F17 + 0x7f0f3f17 MODE @@ -43158,12 +43158,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -43251,11 +43251,11 @@ CC2_CCV CC Channel Value Register - 0x084 + 0x84 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -43270,11 +43270,11 @@ CC2_CCVP CC Channel Value Peek Register - 0x088 + 0x88 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CCVP @@ -43288,11 +43288,11 @@ CC2_CCVB CC Channel Buffer Register - 0x08C + 0x8c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CCVB @@ -43306,11 +43306,11 @@ CC3_CTRL CC Channel Control Register - 0x090 + 0x90 32 read-write 0x00000000 - 0x7F0F3F17 + 0x7f0f3f17 MODE @@ -43502,12 +43502,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -43595,11 +43595,11 @@ CC3_CCV CC Channel Value Register - 0x094 + 0x94 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -43614,11 +43614,11 @@ CC3_CCVP CC Channel Value Peek Register - 0x098 + 0x98 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CCVP @@ -43632,11 +43632,11 @@ CC3_CCVB CC Channel Buffer Register - 0x09C + 0x9c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CCVB @@ -43650,11 +43650,11 @@ DTCTRL DTI Control Register - 0x0A0 + 0xa0 32 read-write 0x00000000 - 0x010006FF + 0x010006ff DTEN @@ -43744,12 +43744,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -43779,11 +43779,11 @@ DTTIME DTI Time Control Register - 0x0A4 + 0xa4 32 read-write 0x00000000 - 0x003F3F0F + 0x003f3f0f DTPRESC @@ -43845,7 +43845,7 @@ DIV1024 The HFPERCLK is divided by 1024 - 0x0000000A + 0x0000000a @@ -43868,11 +43868,11 @@ DTFC DTI Fault Configuration Register - 0x0A8 + 0xa8 32 read-write 0x00000000 - 0x0F030F0F + 0x0f030f0f DTPRS0FSEL @@ -43934,12 +43934,12 @@ PRSCH10 PRS Channel 10 selected as fault source 10 - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as fault source 11 - 0x0000000B + 0x0000000b @@ -44003,12 +44003,12 @@ PRSCH10 PRS Channel 10 selected as fault source 1 - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as fault source 1 - 0x0000000B + 0x0000000b @@ -44074,11 +44074,11 @@ DTOGEN DTI Output Generation Enable Register - 0x0AC + 0xac 32 read-write 0x00000000 - 0x0000003F + 0x0000003f DTOGCC0EN @@ -44127,11 +44127,11 @@ DTFAULT DTI Fault Register - 0x0B0 + 0xb0 32 read-only 0x00000000 - 0x0000000F + 0x0000000f DTPRS0F @@ -44166,11 +44166,11 @@ DTFAULTC DTI Fault Clear Register - 0x0B4 + 0xb4 32 write-only 0x00000000 - 0x0000000F + 0x0000000f DTPRS0FC @@ -44205,11 +44205,11 @@ DTLOCK DTI Configuration Lock Register - 0x0B8 + 0xb8 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -44256,11 +44256,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0xF3FFFF7F + 0xf3ffff7f SYNC @@ -44485,11 +44485,11 @@ FRAME USART Frame Format Register - 0x004 + 0x4 32 read-write 0x00001005 - 0x0000330F + 0x0000330f DATABITS @@ -44546,22 +44546,22 @@ THIRTEEN Each frame contains 13 data bits - 0x0000000A + 0x0000000a FOURTEEN Each frame contains 14 data bits - 0x0000000B + 0x0000000b FIFTEEN Each frame contains 15 data bits - 0x0000000C + 0x0000000c SIXTEEN Each frame contains 16 data bits - 0x0000000D + 0x0000000d @@ -44623,11 +44623,11 @@ TRIGCTRL USART Trigger Control register - 0x008 + 0x8 32 read-write 0x00000000 - 0x000F1FF0 + 0x000f1ff0 RXTEN @@ -44752,12 +44752,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -44766,11 +44766,11 @@ CMD Command Register - 0x00C + 0xc 32 write-only 0x00000000 - 0x00000FFF + 0x00000fff RXEN @@ -44861,11 +44861,11 @@ STATUS USART Status Register - 0x010 + 0x10 32 read-only 0x00002040 - 0x00037FFF + 0x00037fff RXENS @@ -44984,11 +44984,11 @@ CLKDIV Clock Control Register - 0x014 + 0x14 32 read-write 0x00000000 - 0x807FFFF8 + 0x807ffff8 DIV @@ -45009,11 +45009,11 @@ RXDATAX RX Buffer Data Extended Register - 0x018 + 0x18 32 read-only 0x00000000 - 0x0000C1FF + 0x0000c1ff modifyExternal @@ -45042,11 +45042,11 @@ RXDATA RX Buffer Data Register - 0x01C + 0x1c 32 read-only 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -45061,11 +45061,11 @@ RXDOUBLEX RX Buffer Double Data Extended Register - 0x020 + 0x20 32 read-only 0x00000000 - 0xC1FFC1FF + 0xc1ffc1ff modifyExternal @@ -45115,11 +45115,11 @@ RXDOUBLE RX FIFO Double Data Register - 0x024 + 0x24 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -45141,11 +45141,11 @@ RXDATAXP RX Buffer Data Extended Peek Register - 0x028 + 0x28 32 read-only 0x00000000 - 0x0000C1FF + 0x0000c1ff RXDATAP @@ -45173,11 +45173,11 @@ RXDOUBLEXP RX Buffer Double Data Extended Peek Register - 0x02C + 0x2c 32 read-only 0x00000000 - 0xC1FFC1FF + 0xc1ffc1ff RXDATAP0 @@ -45226,11 +45226,11 @@ TXDATAX TX Buffer Data Extended Register - 0x030 + 0x30 32 read-write 0x00000000 - 0x0000F9FF + 0x0000f9ff TXDATAX @@ -45279,11 +45279,11 @@ TXDATA TX Buffer Data Register - 0x034 + 0x34 32 read-write 0x00000000 - 0x000000FF + 0x000000ff TXDATA @@ -45297,11 +45297,11 @@ TXDOUBLEX TX Buffer Double Data Extended Register - 0x038 + 0x38 32 read-write 0x00000000 - 0xF9FFF9FF + 0xf9fff9ff TXDATA0 @@ -45392,11 +45392,11 @@ TXDOUBLE TX Buffer Double Data Register - 0x03C + 0x3c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff TXDATA0 @@ -45417,11 +45417,11 @@ IF Interrupt Flag Register - 0x040 + 0x40 32 read-only 0x00000002 - 0x0001FFFF + 0x0001ffff TXC @@ -45547,11 +45547,11 @@ IFS Interrupt Flag Set Register - 0x044 + 0x44 32 write-only 0x00000000 - 0x0001FFF9 + 0x0001fff9 TXC @@ -45663,11 +45663,11 @@ IFC Interrupt Flag Clear Register - 0x048 + 0x48 32 write-only 0x00000000 - 0x0001FFF9 + 0x0001fff9 TXC @@ -45779,11 +45779,11 @@ IEN Interrupt Enable Register - 0x04C + 0x4c 32 read-write 0x00000000 - 0x0001FFFF + 0x0001ffff TXC @@ -45909,11 +45909,11 @@ IRCTRL IrDA Control Register - 0x050 + 0x50 32 read-write 0x00000000 - 0x00000F8F + 0x00000f8f IREN @@ -46025,12 +46025,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -46039,11 +46039,11 @@ INPUT USART Input Register - 0x058 + 0x58 32 read-write 0x00000000 - 0x00008F8F + 0x00008f8f RXPRSSEL @@ -46105,12 +46105,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -46181,12 +46181,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -46202,11 +46202,11 @@ I2SCTRL I2S Control Register - 0x05C + 0x5c 32 read-write 0x00000000 - 0x0000071F + 0x0000071f EN @@ -46297,7 +46297,7 @@ TIMING Timing Register - 0x060 + 0x60 32 read-write 0x00000000 @@ -46504,11 +46504,11 @@ CTRLX Control Register Extended - 0x064 + 0x64 32 read-write 0x00000000 - 0x0000000F + 0x0000000f DBGHALT @@ -46543,11 +46543,11 @@ TIMECMP0 Used to generate interrupts and various delays - 0x068 + 0x68 32 read-write 0x00000000 - 0x017700FF + 0x017700ff TCMPVAL @@ -46631,11 +46631,11 @@ TIMECMP1 Used to generate interrupts and various delays - 0x06C + 0x6c 32 read-write 0x00000000 - 0x017700FF + 0x017700ff TCMPVAL @@ -46719,11 +46719,11 @@ TIMECMP2 Used to generate interrupts and various delays - 0x070 + 0x70 32 read-write 0x00000000 - 0x017700FF + 0x017700ff TCMPVAL @@ -46807,11 +46807,11 @@ ROUTEPEN I/O Routing Pin Enable Register - 0x074 + 0x74 32 read-write 0x00000000 - 0x0000003F + 0x0000003f RXPEN @@ -46860,11 +46860,11 @@ ROUTELOC0 I/O Routing Location Register - 0x078 + 0x78 32 read-write 0x00000000 - 0x3F3F3F3F + 0x3f3f3f3f RXLOC @@ -46926,32 +46926,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -47006,32 +47006,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -47095,32 +47095,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -47175,32 +47175,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -47264,32 +47264,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -47344,32 +47344,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -47433,32 +47433,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -47513,32 +47513,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -47547,11 +47547,11 @@ ROUTELOC1 I/O Routing Location Register - 0x07C + 0x7c 32 read-write 0x00000000 - 0x00003F3F + 0x00003f3f CTSLOC @@ -47613,32 +47613,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -47693,32 +47693,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -47782,32 +47782,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -47862,32 +47862,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -47917,11 +47917,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0xF3FFFF7F + 0xf3ffff7f SYNC @@ -48146,11 +48146,11 @@ FRAME USART Frame Format Register - 0x004 + 0x4 32 read-write 0x00001005 - 0x0000330F + 0x0000330f DATABITS @@ -48207,22 +48207,22 @@ THIRTEEN Each frame contains 13 data bits - 0x0000000A + 0x0000000a FOURTEEN Each frame contains 14 data bits - 0x0000000B + 0x0000000b FIFTEEN Each frame contains 15 data bits - 0x0000000C + 0x0000000c SIXTEEN Each frame contains 16 data bits - 0x0000000D + 0x0000000d @@ -48284,11 +48284,11 @@ TRIGCTRL USART Trigger Control register - 0x008 + 0x8 32 read-write 0x00000000 - 0x000F1FF0 + 0x000f1ff0 RXTEN @@ -48413,12 +48413,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -48427,11 +48427,11 @@ CMD Command Register - 0x00C + 0xc 32 write-only 0x00000000 - 0x00000FFF + 0x00000fff RXEN @@ -48522,11 +48522,11 @@ STATUS USART Status Register - 0x010 + 0x10 32 read-only 0x00002040 - 0x00037FFF + 0x00037fff RXENS @@ -48645,11 +48645,11 @@ CLKDIV Clock Control Register - 0x014 + 0x14 32 read-write 0x00000000 - 0x807FFFF8 + 0x807ffff8 DIV @@ -48670,11 +48670,11 @@ RXDATAX RX Buffer Data Extended Register - 0x018 + 0x18 32 read-only 0x00000000 - 0x0000C1FF + 0x0000c1ff modifyExternal @@ -48703,11 +48703,11 @@ RXDATA RX Buffer Data Register - 0x01C + 0x1c 32 read-only 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -48722,11 +48722,11 @@ RXDOUBLEX RX Buffer Double Data Extended Register - 0x020 + 0x20 32 read-only 0x00000000 - 0xC1FFC1FF + 0xc1ffc1ff modifyExternal @@ -48776,11 +48776,11 @@ RXDOUBLE RX FIFO Double Data Register - 0x024 + 0x24 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -48802,11 +48802,11 @@ RXDATAXP RX Buffer Data Extended Peek Register - 0x028 + 0x28 32 read-only 0x00000000 - 0x0000C1FF + 0x0000c1ff RXDATAP @@ -48834,11 +48834,11 @@ RXDOUBLEXP RX Buffer Double Data Extended Peek Register - 0x02C + 0x2c 32 read-only 0x00000000 - 0xC1FFC1FF + 0xc1ffc1ff RXDATAP0 @@ -48887,11 +48887,11 @@ TXDATAX TX Buffer Data Extended Register - 0x030 + 0x30 32 read-write 0x00000000 - 0x0000F9FF + 0x0000f9ff TXDATAX @@ -48940,11 +48940,11 @@ TXDATA TX Buffer Data Register - 0x034 + 0x34 32 read-write 0x00000000 - 0x000000FF + 0x000000ff TXDATA @@ -48958,11 +48958,11 @@ TXDOUBLEX TX Buffer Double Data Extended Register - 0x038 + 0x38 32 read-write 0x00000000 - 0xF9FFF9FF + 0xf9fff9ff TXDATA0 @@ -49053,11 +49053,11 @@ TXDOUBLE TX Buffer Double Data Register - 0x03C + 0x3c 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff TXDATA0 @@ -49078,11 +49078,11 @@ IF Interrupt Flag Register - 0x040 + 0x40 32 read-only 0x00000002 - 0x0001FFFF + 0x0001ffff TXC @@ -49208,11 +49208,11 @@ IFS Interrupt Flag Set Register - 0x044 + 0x44 32 write-only 0x00000000 - 0x0001FFF9 + 0x0001fff9 TXC @@ -49324,11 +49324,11 @@ IFC Interrupt Flag Clear Register - 0x048 + 0x48 32 write-only 0x00000000 - 0x0001FFF9 + 0x0001fff9 TXC @@ -49440,11 +49440,11 @@ IEN Interrupt Enable Register - 0x04C + 0x4c 32 read-write 0x00000000 - 0x0001FFFF + 0x0001ffff TXC @@ -49570,11 +49570,11 @@ IRCTRL IrDA Control Register - 0x050 + 0x50 32 read-write 0x00000000 - 0x00000F8F + 0x00000f8f IREN @@ -49686,12 +49686,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -49700,11 +49700,11 @@ INPUT USART Input Register - 0x058 + 0x58 32 read-write 0x00000000 - 0x00008F8F + 0x00008f8f RXPRSSEL @@ -49766,12 +49766,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -49842,12 +49842,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -49863,11 +49863,11 @@ I2SCTRL I2S Control Register - 0x05C + 0x5c 32 read-write 0x00000000 - 0x0000071F + 0x0000071f EN @@ -49958,7 +49958,7 @@ TIMING Timing Register - 0x060 + 0x60 32 read-write 0x00000000 @@ -50165,11 +50165,11 @@ CTRLX Control Register Extended - 0x064 + 0x64 32 read-write 0x00000000 - 0x0000000F + 0x0000000f DBGHALT @@ -50204,11 +50204,11 @@ TIMECMP0 Used to generate interrupts and various delays - 0x068 + 0x68 32 read-write 0x00000000 - 0x017700FF + 0x017700ff TCMPVAL @@ -50292,11 +50292,11 @@ TIMECMP1 Used to generate interrupts and various delays - 0x06C + 0x6c 32 read-write 0x00000000 - 0x017700FF + 0x017700ff TCMPVAL @@ -50380,11 +50380,11 @@ TIMECMP2 Used to generate interrupts and various delays - 0x070 + 0x70 32 read-write 0x00000000 - 0x017700FF + 0x017700ff TCMPVAL @@ -50468,11 +50468,11 @@ ROUTEPEN I/O Routing Pin Enable Register - 0x074 + 0x74 32 read-write 0x00000000 - 0x0000003F + 0x0000003f RXPEN @@ -50521,11 +50521,11 @@ ROUTELOC0 I/O Routing Location Register - 0x078 + 0x78 32 read-write 0x00000000 - 0x3F3F3F3F + 0x3f3f3f3f RXLOC @@ -50587,32 +50587,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -50667,32 +50667,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -50756,32 +50756,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -50836,32 +50836,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -50925,32 +50925,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -51005,32 +51005,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -51094,32 +51094,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -51174,32 +51174,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -51208,11 +51208,11 @@ ROUTELOC1 I/O Routing Location Register - 0x07C + 0x7c 32 read-write 0x00000000 - 0x00003F3F + 0x00003f3f CTSLOC @@ -51274,32 +51274,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -51354,32 +51354,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -51443,32 +51443,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -51523,32 +51523,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -51560,7 +51560,7 @@ LEUART0 1.6 LEUART0 - 0x4004A000 + 0x4004a000 0 0x00000400 @@ -51574,11 +51574,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff AUTOTRI @@ -51722,11 +51722,11 @@ CMD Command Register - 0x004 + 0x4 32 write-only 0x00000000 - 0x000000FF + 0x000000ff RXEN @@ -51789,11 +51789,11 @@ STATUS Status Register - 0x008 + 0x8 32 read-only 0x00000050 - 0x0000007F + 0x0000007f RXENS @@ -51849,11 +51849,11 @@ CLKDIV Clock Control Register - 0x00C + 0xc 32 read-write 0x00000000 - 0x0001FFF8 + 0x0001fff8 DIV @@ -51867,11 +51867,11 @@ STARTFRAME Start Frame Register - 0x010 + 0x10 32 read-write 0x00000000 - 0x000001FF + 0x000001ff STARTFRAME @@ -51885,11 +51885,11 @@ SIGFRAME Signal Frame Register - 0x014 + 0x14 32 read-write 0x00000000 - 0x000001FF + 0x000001ff SIGFRAME @@ -51903,11 +51903,11 @@ RXDATAX Receive Buffer Data Extended Register - 0x018 + 0x18 32 read-only 0x00000000 - 0x0000C1FF + 0x0000c1ff modifyExternal @@ -51936,11 +51936,11 @@ RXDATA Receive Buffer Data Register - 0x01C + 0x1c 32 read-only 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -51955,11 +51955,11 @@ RXDATAXP Receive Buffer Data Extended Peek Register - 0x020 + 0x20 32 read-only 0x00000000 - 0x0000C1FF + 0x0000c1ff RXDATAP @@ -51987,11 +51987,11 @@ TXDATAX Transmit Buffer Data Extended Register - 0x024 + 0x24 32 read-write 0x00000000 - 0x0000E1FF + 0x0000e1ff TXDATA @@ -52026,11 +52026,11 @@ TXDATA Transmit Buffer Data Register - 0x028 + 0x28 32 read-write 0x00000000 - 0x000000FF + 0x000000ff TXDATA @@ -52044,11 +52044,11 @@ IF Interrupt Flag Register - 0x02C + 0x2c 32 read-only 0x00000002 - 0x000007FF + 0x000007ff TXC @@ -52132,11 +52132,11 @@ IFS Interrupt Flag Set Register - 0x030 + 0x30 32 write-only 0x00000000 - 0x000007F9 + 0x000007f9 TXC @@ -52206,11 +52206,11 @@ IFC Interrupt Flag Clear Register - 0x034 + 0x34 32 write-only 0x00000000 - 0x000007F9 + 0x000007f9 TXC @@ -52280,11 +52280,11 @@ IEN Interrupt Enable Register - 0x038 + 0x38 32 read-write 0x00000000 - 0x000007FF + 0x000007ff TXC @@ -52368,11 +52368,11 @@ PULSECTRL Pulse Control Register - 0x03C + 0x3c 32 read-write 0x00000000 - 0x0000003F + 0x0000003f PULSEW @@ -52400,7 +52400,7 @@ FREEZE Freeze Register - 0x040 + 0x40 32 read-write 0x00000000 @@ -52418,11 +52418,11 @@ SYNCBUSY Synchronization Busy Register - 0x044 + 0x44 32 read-only 0x00000000 - 0x000000FF + 0x000000ff CTRL @@ -52485,7 +52485,7 @@ ROUTEPEN I/O Routing Pin Enable Register - 0x054 + 0x54 32 read-write 0x00000000 @@ -52510,11 +52510,11 @@ ROUTELOC0 I/O Routing Location Register - 0x058 + 0x58 32 read-write 0x00000000 - 0x00003F3F + 0x00003f3f RXLOC @@ -52576,32 +52576,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -52656,32 +52656,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -52745,32 +52745,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -52825,32 +52825,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -52859,11 +52859,11 @@ INPUT LEUART Input Register - 0x064 + 0x64 32 read-write 0x00000000 - 0x0000002F + 0x0000002f RXPRSSEL @@ -52925,12 +52925,12 @@ PRSCH10 PRS Channel 10 selected - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected - 0x0000000B + 0x0000000b @@ -52963,11 +52963,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0x000013FF + 0x000013ff REPMODE @@ -53096,11 +53096,11 @@ CMD Command Register - 0x004 + 0x4 32 write-only 0x00000000 - 0x0000001F + 0x0000001f START @@ -53142,7 +53142,7 @@ STATUS Status Register - 0x008 + 0x8 32 read-only 0x00000000 @@ -53160,11 +53160,11 @@ CNT Counter Value Register - 0x00C + 0xc 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff CNT @@ -53178,11 +53178,11 @@ COMP0 Compare Value Register 0 - 0x010 + 0x10 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff COMP0 @@ -53196,11 +53196,11 @@ COMP1 Compare Value Register 1 - 0x014 + 0x14 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff COMP1 @@ -53214,11 +53214,11 @@ REP0 Repeat Counter Register 0 - 0x018 + 0x18 32 read-write 0x00000000 - 0x000000FF + 0x000000ff REP0 @@ -53232,11 +53232,11 @@ REP1 Repeat Counter Register 1 - 0x01C + 0x1c 32 read-write 0x00000000 - 0x000000FF + 0x000000ff REP1 @@ -53250,11 +53250,11 @@ IF Interrupt Flag Register - 0x020 + 0x20 32 read-only 0x00000000 - 0x0000001F + 0x0000001f COMP0 @@ -53296,11 +53296,11 @@ IFS Interrupt Flag Set Register - 0x024 + 0x24 32 write-only 0x00000000 - 0x0000001F + 0x0000001f COMP0 @@ -53342,11 +53342,11 @@ IFC Interrupt Flag Clear Register - 0x028 + 0x28 32 write-only 0x00000000 - 0x0000001F + 0x0000001f COMP0 @@ -53388,11 +53388,11 @@ IEN Interrupt Enable Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0x0000001F + 0x0000001f COMP0 @@ -53434,7 +53434,7 @@ SYNCBUSY Synchronization Busy Register - 0x034 + 0x34 32 read-only 0x00000000 @@ -53452,7 +53452,7 @@ ROUTEPEN I/O Routing Pin Enable Register - 0x040 + 0x40 32 read-write 0x00000000 @@ -53477,11 +53477,11 @@ ROUTELOC0 I/O Routing Location Register - 0x044 + 0x44 32 read-write 0x00000000 - 0x00003F3F + 0x00003f3f OUT0LOC @@ -53543,32 +53543,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -53623,32 +53623,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -53712,32 +53712,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -53792,32 +53792,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -53826,11 +53826,11 @@ PRSSEL PRS Input Select Register - 0x050 + 0x50 32 read-write 0x00000000 - 0x0CCCF3CF + 0x0cccf3cf PRSSTARTSEL @@ -53892,12 +53892,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -53961,12 +53961,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -54030,12 +54030,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -54134,7 +54134,7 @@ CRYOTIMER 1.6 CRYOTIMER - 0x4001E000 + 0x4001e000 0 0x00000400 @@ -54148,11 +54148,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0x000000EF + 0x000000ef EN @@ -54246,11 +54246,11 @@ PERIODSEL Interrupt Duration - 0x004 + 0x4 32 read-write 0x00000020 - 0x0000003F + 0x0000003f PERIODSEL @@ -54264,11 +54264,11 @@ CNT Counter Value - 0x008 + 0x8 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff CNT @@ -54282,7 +54282,7 @@ EM4WUEN Wake Up Enable - 0x00C + 0xc 32 read-write 0x00000000 @@ -54300,7 +54300,7 @@ IF Interrupt Flag Register - 0x010 + 0x10 32 read-only 0x00000000 @@ -54318,7 +54318,7 @@ IFS Interrupt Flag Set Register - 0x014 + 0x14 32 write-only 0x00000000 @@ -54336,7 +54336,7 @@ IFC Interrupt Flag Clear Register - 0x018 + 0x18 32 write-only 0x00000000 @@ -54354,7 +54354,7 @@ IEN Interrupt Enable Register - 0x01C + 0x1c 32 read-write 0x00000000 @@ -54375,7 +54375,7 @@ PCNT0 1.6 PCNT0 - 0x4004E000 + 0x4004e000 0 0x00000400 @@ -54389,11 +54389,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0xBFDBFFFF + 0xbfdbffff MODE @@ -54711,12 +54711,12 @@ PRSCH10 PRS Channel 10 selected. - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected. - 0x0000000B + 0x0000000b @@ -54732,7 +54732,7 @@ CMD Command Register - 0x004 + 0x4 32 write-only 0x00000000 @@ -54757,7 +54757,7 @@ STATUS Status Register - 0x008 + 0x8 32 read-only 0x00000000 @@ -54775,11 +54775,11 @@ CNT Counter Value Register - 0x00C + 0xc 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff CNT @@ -54793,11 +54793,11 @@ TOP Top Value Register - 0x010 + 0x10 32 read-only - 0x000000FF - 0x0000FFFF + 0x000000ff + 0x0000ffff TOP @@ -54811,11 +54811,11 @@ TOPB Top Value Buffer Register - 0x014 + 0x14 32 read-write - 0x000000FF - 0x0000FFFF + 0x000000ff + 0x0000ffff TOPB @@ -54829,11 +54829,11 @@ IF Interrupt Flag Register - 0x018 + 0x18 32 read-only 0x00000000 - 0x0000003F + 0x0000003f UF @@ -54882,11 +54882,11 @@ IFS Interrupt Flag Set Register - 0x01C + 0x1c 32 write-only 0x00000000 - 0x0000003F + 0x0000003f UF @@ -54935,11 +54935,11 @@ IFC Interrupt Flag Clear Register - 0x020 + 0x20 32 write-only 0x00000000 - 0x0000003F + 0x0000003f UF @@ -54988,11 +54988,11 @@ IEN Interrupt Enable Register - 0x024 + 0x24 32 read-write 0x00000000 - 0x0000003F + 0x0000003f UF @@ -55041,11 +55041,11 @@ ROUTELOC0 I/O Routing Location Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0x00003F3F + 0x00003f3f S0INLOC @@ -55107,32 +55107,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -55187,32 +55187,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -55276,32 +55276,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -55356,32 +55356,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -55390,7 +55390,7 @@ FREEZE Freeze Register - 0x040 + 0x40 32 read-write 0x00000000 @@ -55408,11 +55408,11 @@ SYNCBUSY Synchronization Busy Register - 0x044 + 0x44 32 read-only 0x00000000 - 0x0000000F + 0x0000000f CTRL @@ -55447,11 +55447,11 @@ AUXCNT Auxiliary Counter Value Register - 0x064 + 0x64 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff AUXCNT @@ -55465,11 +55465,11 @@ INPUT PCNT Input Register - 0x068 + 0x68 32 read-write 0x00000000 - 0x00000BEF + 0x00000bef S0PRSSEL @@ -55531,12 +55531,12 @@ PRSCH10 PRS Channel 10 selected. - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected. - 0x0000000B + 0x0000000b @@ -55607,12 +55607,12 @@ PRSCH10 PRS Channel 10 selected. - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected. - 0x0000000B + 0x0000000b @@ -55628,11 +55628,11 @@ OVSCFG Oversampling Config Register - 0x06C + 0x6c 32 read-write 0x00000000 - 0x000010FF + 0x000010ff FILTLEN @@ -55656,7 +55656,7 @@ I2C0 1.6 I2C0 - 0x4000C000 + 0x4000c000 0 0x00000400 @@ -55670,11 +55670,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0x0007B3FF + 0x0007b3ff EN @@ -55836,11 +55836,11 @@ CMD Command Register - 0x004 + 0x4 32 write-only 0x00000000 - 0x000000FF + 0x000000ff START @@ -55903,11 +55903,11 @@ STATE State Register - 0x008 + 0x8 32 read-only 0x00000001 - 0x000000FF + 0x000000ff BUSY @@ -55993,11 +55993,11 @@ STATUS Status Register - 0x00C + 0xc 32 read-only 0x00000080 - 0x000003FF + 0x000003ff PSTART @@ -56074,11 +56074,11 @@ CLKDIV Clock Division Register - 0x010 + 0x10 32 read-write 0x00000000 - 0x000001FF + 0x000001ff DIV @@ -56092,11 +56092,11 @@ SADDR Slave Address Register - 0x014 + 0x14 32 read-write 0x00000000 - 0x000000FE + 0x000000fe ADDR @@ -56110,11 +56110,11 @@ SADDRMASK Slave Address Mask Register - 0x018 + 0x18 32 read-write 0x00000000 - 0x000000FE + 0x000000fe MASK @@ -56128,11 +56128,11 @@ RXDATA Receive Buffer Data Register - 0x01C + 0x1c 32 read-only 0x00000000 - 0x000000FF + 0x000000ff modifyExternal @@ -56147,11 +56147,11 @@ RXDOUBLE Receive Buffer Double Data Register - 0x020 + 0x20 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff modifyExternal @@ -56173,11 +56173,11 @@ RXDATAP Receive Buffer Data Peek Register - 0x024 + 0x24 32 read-only 0x00000000 - 0x000000FF + 0x000000ff RXDATAP @@ -56191,11 +56191,11 @@ RXDOUBLEP Receive Buffer Double Data Peek Register - 0x028 + 0x28 32 read-only 0x00000000 - 0x0000FFFF + 0x0000ffff RXDATAP0 @@ -56216,11 +56216,11 @@ TXDATA Transmit Buffer Data Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0x000000FF + 0x000000ff TXDATA @@ -56234,11 +56234,11 @@ TXDOUBLE Transmit Buffer Double Data Register - 0x030 + 0x30 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff TXDATA0 @@ -56259,11 +56259,11 @@ IF Interrupt Flag Register - 0x034 + 0x34 32 read-only 0x00000010 - 0x0007FFFF + 0x0007ffff START @@ -56403,11 +56403,11 @@ IFS Interrupt Flag Set Register - 0x038 + 0x38 32 write-only 0x00000000 - 0x0007FFCF + 0x0007ffcf START @@ -56533,11 +56533,11 @@ IFC Interrupt Flag Clear Register - 0x03C + 0x3c 32 write-only 0x00000000 - 0x0007FFCF + 0x0007ffcf START @@ -56663,11 +56663,11 @@ IEN Interrupt Enable Register - 0x040 + 0x40 32 read-write 0x00000000 - 0x0007FFFF + 0x0007ffff START @@ -56807,7 +56807,7 @@ ROUTEPEN I/O Routing Pin Enable Register - 0x044 + 0x44 32 read-write 0x00000000 @@ -56832,11 +56832,11 @@ ROUTELOC0 I/O Routing Location Register - 0x048 + 0x48 32 read-write 0x00000000 - 0x00003F3F + 0x00003f3f SDALOC @@ -56898,32 +56898,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -56978,32 +56978,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -57067,32 +57067,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -57147,32 +57147,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -57198,11 +57198,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write - 0x001F0000 - 0x2F7F7FDF + 0x001f0000 + 0x2f7f7fdf WARMUPMODE @@ -57349,12 +57349,12 @@ X2048 2048 samples for each conversion result - 0x0000000A + 0x0000000a X4096 4096 samples for each conversion result - 0x0000000B + 0x0000000b @@ -57370,11 +57370,11 @@ CMD Command Register - 0x008 + 0x8 32 write-only 0x00000000 - 0x0000000F + 0x0000000f SINGLESTART @@ -57409,11 +57409,11 @@ STATUS Status Register - 0x00C + 0xc 32 read-only 0x00000000 - 0x00031F03 + 0x00031f03 SINGLEACT @@ -57488,11 +57488,11 @@ SINGLECTRL Single Channel Control Register - 0x010 + 0x10 32 read-write - 0x00FFFF00 - 0xAFFFFFFF + 0x00ffff00 + 0xafffffff REP @@ -57685,11 +57685,11 @@ SINGLECTRLX Single Channel Control Register continued - 0x014 + 0x14 32 read-write 0x00000000 - 0x0F1F7FFF + 0x0f1f7fff VREFSEL @@ -57842,12 +57842,12 @@ PRSCH10 PRS ch 10 triggers single channel - 0x0000000A + 0x0000000a PRSCH11 PRS ch 11 triggers single channel - 0x0000000B + 0x0000000b @@ -57870,11 +57870,11 @@ SCANCTRL Scan Control Register - 0x018 + 0x18 32 read-write 0x00000000 - 0xAF0000FF + 0xaf0000ff REP @@ -58053,11 +58053,11 @@ SCANCTRLX Scan Control Register continued - 0x01C + 0x1c 32 read-write 0x00000000 - 0x0F1F7FFF + 0x0f1f7fff VREFSEL @@ -58210,12 +58210,12 @@ PRSCH10 PRS ch 10 triggers scan sequence - 0x0000000A + 0x0000000a PRSCH11 PRS ch 11 triggers scan sequence - 0x0000000B + 0x0000000b @@ -58238,11 +58238,11 @@ SCANMASK Scan Sequence Input Mask Register - 0x020 + 0x20 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff SCANINPUTEN @@ -58578,11 +58578,11 @@ SCANINPUTSEL Input Selection register for Scan mode - 0x024 + 0x24 32 read-write 0x00000000 - 0x1F1F1F1F + 0x1f1f1f1f INPUT0TO7SEL @@ -58634,32 +58634,32 @@ APORT2CH16TO23 "" - 0x0000000A + 0x0000000a APORT2CH24TO31 "" - 0x0000000B + 0x0000000b APORT3CH0TO7 "" - 0x0000000C + 0x0000000c APORT3CH8TO15 "" - 0x0000000D + 0x0000000d APORT3CH16TO23 "" - 0x0000000E + 0x0000000e APORT3CH24TO31 "" - 0x0000000F + 0x0000000f APORT4CH0TO7 @@ -58733,32 +58733,32 @@ APORT2CH16TO23 "" - 0x0000000A + 0x0000000a APORT2CH24TO31 "" - 0x0000000B + 0x0000000b APORT3CH0TO7 "" - 0x0000000C + 0x0000000c APORT3CH8TO15 "" - 0x0000000D + 0x0000000d APORT3CH16TO23 "" - 0x0000000E + 0x0000000e APORT3CH24TO31 "" - 0x0000000F + 0x0000000f APORT4CH0TO7 @@ -58832,32 +58832,32 @@ APORT2CH16TO23 "" - 0x0000000A + 0x0000000a APORT2CH24TO31 "" - 0x0000000B + 0x0000000b APORT3CH0TO7 "" - 0x0000000C + 0x0000000c APORT3CH8TO15 "" - 0x0000000D + 0x0000000d APORT3CH16TO23 "" - 0x0000000E + 0x0000000e APORT3CH24TO31 "" - 0x0000000F + 0x0000000f APORT4CH0TO7 @@ -58931,32 +58931,32 @@ APORT2CH16TO23 "" - 0x0000000A + 0x0000000a APORT2CH24TO31 "" - 0x0000000B + 0x0000000b APORT3CH0TO7 "" - 0x0000000C + 0x0000000c APORT3CH8TO15 "" - 0x0000000D + 0x0000000d APORT3CH16TO23 "" - 0x0000000E + 0x0000000e APORT3CH24TO31 "" - 0x0000000F + 0x0000000f APORT4CH0TO7 @@ -58985,11 +58985,11 @@ SCANNEGSEL Negative Input select register for Scan - 0x028 + 0x28 32 read-write - 0x000039E4 - 0x0000FFFF + 0x000039e4 + 0x0000ffff INPUT0NEGSEL @@ -59228,11 +59228,11 @@ CMPTHR Compare Threshold Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff ADLT @@ -59253,11 +59253,11 @@ BIASPROG Bias Programming Register for various analog blocks used in ADC operation - 0x030 + 0x30 32 read-write 0x00000000 - 0x0000100F + 0x0000100f ADCBIASPROG @@ -59284,17 +59284,17 @@ SCALE8 Scaling bias to 1/8 - 0x0000000C + 0x0000000c SCALE16 Scaling bias to 1/16 - 0x0000000E + 0x0000000e SCALE32 Scaling bias to 1/32 - 0x0000000F + 0x0000000f @@ -59310,11 +59310,11 @@ CAL Calibration Register - 0x034 + 0x34 32 read-write 0x40784078 - 0xFFFFFFFF + 0xffffffff SINGLEOFFSET @@ -59377,11 +59377,11 @@ IF Interrupt Flag Register - 0x038 + 0x38 32 read-only 0x00000000 - 0x03030F03 + 0x03030f03 SINGLE @@ -59458,11 +59458,11 @@ IFS Interrupt Flag Set Register - 0x03C + 0x3c 32 write-only 0x00000000 - 0x03030F00 + 0x03030f00 SINGLEOF @@ -59525,11 +59525,11 @@ IFC Interrupt Flag Clear Register - 0x040 + 0x40 32 write-only 0x00000000 - 0x03030F00 + 0x03030f00 SINGLEOF @@ -59592,11 +59592,11 @@ IEN Interrupt Enable Register - 0x044 + 0x44 32 read-write 0x00000000 - 0x03030F03 + 0x03030f03 SINGLE @@ -59673,11 +59673,11 @@ SINGLEDATA Single Conversion Result Data - 0x048 + 0x48 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -59692,11 +59692,11 @@ SCANDATA Scan Conversion Result Data - 0x04C + 0x4c 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff DATA @@ -59710,11 +59710,11 @@ SINGLEDATAP Single Conversion Result Data Peek Register - 0x050 + 0x50 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff modifyExternal @@ -59729,11 +59729,11 @@ SCANDATAP Scan Sequence Result Data Peek Register - 0x054 + 0x54 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff DATAP @@ -59747,11 +59747,11 @@ SCANDATAX Scan Sequence Result Data + Data Source Register - 0x068 + 0x68 32 read-only 0x00000000 - 0x001FFFFF + 0x001fffff DATA @@ -59772,11 +59772,11 @@ SCANDATAXP Scan Sequence Result Data + Data Source Peek Register - 0x06C + 0x6c 32 read-only 0x00000000 - 0x001FFFFF + 0x001fffff DATAP @@ -59797,11 +59797,11 @@ APORTREQ APORT Request Status Register - 0x07C + 0x7c 32 read-only 0x00000000 - 0x000003FF + 0x000003ff APORT0XREQ @@ -59878,11 +59878,11 @@ APORTCONFLICT APORT BUS Request Status Register - 0x080 + 0x80 32 read-only 0x00000000 - 0x000003FF + 0x000003ff APORT0XCONFLICT @@ -59959,7 +59959,7 @@ SINGLEFIFOCOUNT Single FIFO Count Register - 0x084 + 0x84 32 read-only 0x00000000 @@ -59977,7 +59977,7 @@ SCANFIFOCOUNT Scan FIFO Count Register - 0x088 + 0x88 32 read-only 0x00000000 @@ -59995,7 +59995,7 @@ SINGLEFIFOCLEAR Single FIFO Clear Register - 0x08C + 0x8c 32 write-only 0x00000000 @@ -60013,7 +60013,7 @@ SCANFIFOCLEAR Scan FIFO Clear Register - 0x090 + 0x90 32 write-only 0x00000000 @@ -60031,11 +60031,11 @@ APORTMASTERDIS APORT Bus Master Disable Register - 0x094 + 0x94 32 read-write 0x00000000 - 0x000003FC + 0x000003fc APORT1XMASTERDIS @@ -60115,11 +60115,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x07000000 - 0xBF3CF70D + 0xbf3cf70d EN @@ -60256,11 +60256,11 @@ INPUTSEL Input Selection Register - 0x004 + 0x4 32 read-write 0x00000000 - 0x757FFFFF + 0x757fffff POSSEL @@ -60316,17 +60316,17 @@ APORT2YCH10 APORT2Y Channel 10 - 0x0000000B + 0x0000000b APORT2YCH12 APORT2Y Channel 12 - 0x0000000D + 0x0000000d APORT2YCH14 APORT2Y Channel 14 - 0x0000000F + 0x0000000f APORT2YCH16 @@ -60356,17 +60356,17 @@ APORT2YCH26 APORT2Y Channel 26 - 0x0000001B + 0x0000001b APORT2YCH28 APORT2Y Channel 28 - 0x0000001D + 0x0000001d APORT2YCH30 APORT2Y Channel 30 - 0x0000001F + 0x0000001f APORT1XCH0 @@ -60421,32 +60421,32 @@ APORT1XCH10 APORT1X Channel 10 - 0x0000002A + 0x0000002a APORT1YCH11 APORT1Y Channel 11 - 0x0000002B + 0x0000002b APORT1XCH12 APORT1X Channel 12 - 0x0000002C + 0x0000002c APORT1YCH13 APORT1Y Channel 13 - 0x0000002D + 0x0000002d APORT1XCH14 APORT1X Channel 14 - 0x0000002E + 0x0000002e APORT1YCH15 APORT1Y Channel 15 - 0x0000002F + 0x0000002f APORT1XCH16 @@ -60501,32 +60501,32 @@ APORT1XCH26 APORT1X Channel 26 - 0x0000003A + 0x0000003a APORT1YCH27 APORT1Y Channel 27 - 0x0000003B + 0x0000003b APORT1XCH28 APORT1X Channel 28 - 0x0000003C + 0x0000003c APORT1YCH29 APORT1Y Channel 29 - 0x0000003D + 0x0000003d APORT1XCH30 APORT1X Channel 30 - 0x0000003E + 0x0000003e APORT1YCH31 APORT1Y Channel 31 - 0x0000003F + 0x0000003f @@ -60605,7 +60605,7 @@ STATUS Status Register - 0x008 + 0x8 32 read-only 0x00000000 @@ -60637,7 +60637,7 @@ IF Interrupt Flag Register - 0x00C + 0xc 32 read-only 0x00000000 @@ -60669,7 +60669,7 @@ IFS Interrupt Flag Set Register - 0x010 + 0x10 32 write-only 0x00000000 @@ -60701,7 +60701,7 @@ IFC Interrupt Flag Clear Register - 0x014 + 0x14 32 write-only 0x00000000 @@ -60733,7 +60733,7 @@ IEN Interrupt Enable Register - 0x018 + 0x18 32 read-write 0x00000000 @@ -60765,11 +60765,11 @@ APORTREQ APORT Request Status Register - 0x020 + 0x20 32 read-only 0x00000000 - 0x000003FF + 0x000003ff APORT0XREQ @@ -60846,11 +60846,11 @@ APORTCONFLICT APORT Request Status Register - 0x024 + 0x24 32 read-only 0x00000000 - 0x000003FF + 0x000003ff APORT0XCONFLICT @@ -60927,11 +60927,11 @@ HYSTERESIS0 Hysteresis 0 Register - 0x028 + 0x28 32 read-write 0x00000000 - 0x3F3F000F + 0x3f3f000f HYST @@ -60993,32 +60993,32 @@ HYST10 -25 mV hysteresis - 0x0000000A + 0x0000000a HYST11 -30 mV hysteresis - 0x0000000B + 0x0000000b HYST12 -35 mV hysteresis - 0x0000000C + 0x0000000c HYST13 -39 mV hysteresis - 0x0000000D + 0x0000000d HYST14 -42 mV hysteresis - 0x0000000E + 0x0000000e HYST15 -45 mV hysteresis - 0x0000000F + 0x0000000f @@ -61041,11 +61041,11 @@ HYSTERESIS1 Hysteresis 1 Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0x3F3F000F + 0x3f3f000f HYST @@ -61107,32 +61107,32 @@ HYST10 -25 mV hysteresis - 0x0000000A + 0x0000000a HYST11 -30 mV hysteresis - 0x0000000B + 0x0000000b HYST12 -35 mV hysteresis - 0x0000000C + 0x0000000c HYST13 -39 mV hysteresis - 0x0000000D + 0x0000000d HYST14 -42 mV hysteresis - 0x0000000E + 0x0000000e HYST15 -45 mV hysteresis - 0x0000000F + 0x0000000f @@ -61155,7 +61155,7 @@ ROUTEPEN I/O Routing Pine Enable Register - 0x040 + 0x40 32 read-write 0x00000000 @@ -61173,11 +61173,11 @@ ROUTELOC0 I/O Routing Location Register - 0x044 + 0x44 32 read-write 0x00000000 - 0x0000003F + 0x0000003f OUTLOC @@ -61239,32 +61239,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -61319,32 +61319,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -61370,11 +61370,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x07000000 - 0xBF3CF70D + 0xbf3cf70d EN @@ -61511,11 +61511,11 @@ INPUTSEL Input Selection Register - 0x004 + 0x4 32 read-write 0x00000000 - 0x757FFFFF + 0x757fffff POSSEL @@ -61571,17 +61571,17 @@ APORT2YCH10 APORT2Y Channel 10 - 0x0000000B + 0x0000000b APORT2YCH12 APORT2Y Channel 12 - 0x0000000D + 0x0000000d APORT2YCH14 APORT2Y Channel 14 - 0x0000000F + 0x0000000f APORT2YCH16 @@ -61611,17 +61611,17 @@ APORT2YCH26 APORT2Y Channel 26 - 0x0000001B + 0x0000001b APORT2YCH28 APORT2Y Channel 28 - 0x0000001D + 0x0000001d APORT2YCH30 APORT2Y Channel 30 - 0x0000001F + 0x0000001f APORT1XCH0 @@ -61676,32 +61676,32 @@ APORT1XCH10 APORT1X Channel 10 - 0x0000002A + 0x0000002a APORT1YCH11 APORT1Y Channel 11 - 0x0000002B + 0x0000002b APORT1XCH12 APORT1X Channel 12 - 0x0000002C + 0x0000002c APORT1YCH13 APORT1Y Channel 13 - 0x0000002D + 0x0000002d APORT1XCH14 APORT1X Channel 14 - 0x0000002E + 0x0000002e APORT1YCH15 APORT1Y Channel 15 - 0x0000002F + 0x0000002f APORT1XCH16 @@ -61756,32 +61756,32 @@ APORT1XCH26 APORT1X Channel 26 - 0x0000003A + 0x0000003a APORT1YCH27 APORT1Y Channel 27 - 0x0000003B + 0x0000003b APORT1XCH28 APORT1X Channel 28 - 0x0000003C + 0x0000003c APORT1YCH29 APORT1Y Channel 29 - 0x0000003D + 0x0000003d APORT1XCH30 APORT1X Channel 30 - 0x0000003E + 0x0000003e APORT1YCH31 APORT1Y Channel 31 - 0x0000003F + 0x0000003f @@ -61860,7 +61860,7 @@ STATUS Status Register - 0x008 + 0x8 32 read-only 0x00000000 @@ -61892,7 +61892,7 @@ IF Interrupt Flag Register - 0x00C + 0xc 32 read-only 0x00000000 @@ -61924,7 +61924,7 @@ IFS Interrupt Flag Set Register - 0x010 + 0x10 32 write-only 0x00000000 @@ -61956,7 +61956,7 @@ IFC Interrupt Flag Clear Register - 0x014 + 0x14 32 write-only 0x00000000 @@ -61988,7 +61988,7 @@ IEN Interrupt Enable Register - 0x018 + 0x18 32 read-write 0x00000000 @@ -62020,11 +62020,11 @@ APORTREQ APORT Request Status Register - 0x020 + 0x20 32 read-only 0x00000000 - 0x000003FF + 0x000003ff APORT0XREQ @@ -62101,11 +62101,11 @@ APORTCONFLICT APORT Request Status Register - 0x024 + 0x24 32 read-only 0x00000000 - 0x000003FF + 0x000003ff APORT0XCONFLICT @@ -62182,11 +62182,11 @@ HYSTERESIS0 Hysteresis 0 Register - 0x028 + 0x28 32 read-write 0x00000000 - 0x3F3F000F + 0x3f3f000f HYST @@ -62248,32 +62248,32 @@ HYST10 -25 mV hysteresis - 0x0000000A + 0x0000000a HYST11 -30 mV hysteresis - 0x0000000B + 0x0000000b HYST12 -35 mV hysteresis - 0x0000000C + 0x0000000c HYST13 -39 mV hysteresis - 0x0000000D + 0x0000000d HYST14 -42 mV hysteresis - 0x0000000E + 0x0000000e HYST15 -45 mV hysteresis - 0x0000000F + 0x0000000f @@ -62296,11 +62296,11 @@ HYSTERESIS1 Hysteresis 1 Register - 0x02C + 0x2c 32 read-write 0x00000000 - 0x3F3F000F + 0x3f3f000f HYST @@ -62362,32 +62362,32 @@ HYST10 -25 mV hysteresis - 0x0000000A + 0x0000000a HYST11 -30 mV hysteresis - 0x0000000B + 0x0000000b HYST12 -35 mV hysteresis - 0x0000000C + 0x0000000c HYST13 -39 mV hysteresis - 0x0000000D + 0x0000000d HYST14 -42 mV hysteresis - 0x0000000E + 0x0000000e HYST15 -45 mV hysteresis - 0x0000000F + 0x0000000f @@ -62410,7 +62410,7 @@ ROUTEPEN I/O Routing Pine Enable Register - 0x040 + 0x40 32 read-write 0x00000000 @@ -62428,11 +62428,11 @@ ROUTELOC0 I/O Routing Location Register - 0x044 + 0x44 32 read-write 0x00000000 - 0x0000003F + 0x0000003f OUTLOC @@ -62494,32 +62494,32 @@ LOC10 Location 10 - 0x0000000A + 0x0000000a LOC11 Location 11 - 0x0000000B + 0x0000000b LOC12 Location 12 - 0x0000000C + 0x0000000c LOC13 Location 13 - 0x0000000D + 0x0000000d LOC14 Location 14 - 0x0000000E + 0x0000000e LOC15 Location 15 - 0x0000000F + 0x0000000f LOC16 @@ -62574,32 +62574,32 @@ LOC26 Location 26 - 0x0000001A + 0x0000001a LOC27 Location 27 - 0x0000001B + 0x0000001b LOC28 Location 28 - 0x0000001C + 0x0000001c LOC29 Location 29 - 0x0000001D + 0x0000001d LOC30 Location 30 - 0x0000001E + 0x0000001e LOC31 Location 31 - 0x0000001F + 0x0000001f @@ -62625,11 +62625,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0x00F17FFF + 0x00f17fff EN @@ -62719,32 +62719,32 @@ APORT1XCH10 APORT1X Channel 10 - 0x0000002A + 0x0000002a APORT1YCH11 APORT1Y Channel 11 - 0x0000002B + 0x0000002b APORT1XCH12 APORT1X Channel 12 - 0x0000002C + 0x0000002c APORT1YCH13 APORT1Y Channel 13 - 0x0000002D + 0x0000002d APORT1XCH14 APORT1X Channel 14 - 0x0000002E + 0x0000002e APORT1YCH15 APORT1Y Channel 15 - 0x0000002F + 0x0000002f APORT1XCH16 @@ -62799,32 +62799,32 @@ APORT1XCH26 APORT1X Channel 26 - 0x0000003A + 0x0000003a APORT1YCH27 APORT1Y Channel 27 - 0x0000003B + 0x0000003b APORT1XCH28 APORT1X Channel 28 - 0x0000003C + 0x0000003c APORT1YCH29 APORT1Y Channel 29 - 0x0000003D + 0x0000003d APORT1XCH30 APORT1X Channel 30 - 0x0000003E + 0x0000003e APORT1YCH31 APORT1Y Channel 31 - 0x0000003F + 0x0000003f @@ -62916,12 +62916,12 @@ PRSCH10 PRS Channel 10 selected. - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected. - 0x0000000B + 0x0000000b @@ -62930,11 +62930,11 @@ CURPROG Current Programming Register - 0x004 + 0x4 32 read-write - 0x009B0000 - 0x00FF1F03 + 0x009b0000 + 0x00ff1f03 RANGESEL @@ -62984,7 +62984,7 @@ DUTYCONFIG Duty Cycle Configauration Register - 0x00C + 0xc 32 read-write 0x00000000 @@ -63002,7 +63002,7 @@ STATUS Status Register - 0x018 + 0x18 32 read-only 0x00000000 @@ -63020,7 +63020,7 @@ IF Interrupt Flag Register - 0x020 + 0x20 32 read-only 0x00000000 @@ -63038,7 +63038,7 @@ IFS Interrupt Flag Set Register - 0x024 + 0x24 32 write-only 0x00000000 @@ -63063,7 +63063,7 @@ IFC Interrupt Flag Clear Register - 0x028 + 0x28 32 write-only 0x00000000 @@ -63088,7 +63088,7 @@ IEN Interrupt Enable Register - 0x02C + 0x2c 32 read-write 0x00000000 @@ -63113,11 +63113,11 @@ APORTREQ APORT Request Status Register - 0x034 + 0x34 32 read-only 0x00000000 - 0x0000000C + 0x0000000c APORT1XREQ @@ -63138,11 +63138,11 @@ APORTCONFLICT APORT Request Status Register - 0x038 + 0x38 32 read-only 0x00000000 - 0x0000000C + 0x0000000c APORT1XCONFLICT @@ -63180,11 +63180,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write 0x00000000 - 0x00039F35 + 0x00039f35 ENABLE @@ -63274,32 +63274,32 @@ DIV1024 CLKCNT = LFECLKRTCC/1024 - 0x0000000A + 0x0000000a DIV2048 CLKCNT = LFECLKRTCC/2048 - 0x0000000B + 0x0000000b DIV4096 CLKCNT = LFECLKRTCC/4096 - 0x0000000C + 0x0000000c DIV8192 CLKCNT = LFECLKRTCC/8192 - 0x0000000D + 0x0000000d DIV16384 CLKCNT = LFECLKRTCC/16384 - 0x0000000E + 0x0000000e DIV32768 CLKCNT = LFECLKRTCC/32768 - 0x0000000F + 0x0000000f @@ -63336,11 +63336,11 @@ PRECNT Pre-Counter Value Register - 0x004 + 0x4 32 read-write 0x00000000 - 0x00007FFF + 0x00007fff PRECNT @@ -63354,11 +63354,11 @@ CNT Counter Value Register - 0x008 + 0x8 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff CNT @@ -63372,11 +63372,11 @@ COMBCNT Combined Pre-Counter and Counter Value Register - 0x00C + 0xc 32 read-only 0x00000000 - 0xFFFFFFFF + 0xffffffff PRECNT @@ -63397,11 +63397,11 @@ TIME Time of day register - 0x010 + 0x10 32 read-write 0x00000000 - 0x003F7F7F + 0x003f7f7f SECU @@ -63450,11 +63450,11 @@ DATE Date register - 0x014 + 0x14 32 read-write 0x00000000 - 0x07FF1F3F + 0x07ff1f3f DAYOMU @@ -63510,11 +63510,11 @@ IF RTCC Interrupt Flags - 0x018 + 0x18 32 read-only 0x00000000 - 0x000007FF + 0x000007ff OF @@ -63598,11 +63598,11 @@ IFS Interrupt Flag Set Register - 0x01C + 0x1c 32 write-only 0x00000000 - 0x000007FF + 0x000007ff OF @@ -63686,11 +63686,11 @@ IFC Interrupt Flag Clear Register - 0x020 + 0x20 32 write-only 0x00000000 - 0x000007FF + 0x000007ff OF @@ -63774,11 +63774,11 @@ IEN Interrupt Enable Register - 0x024 + 0x24 32 read-write 0x00000000 - 0x000007FF + 0x000007ff OF @@ -63862,7 +63862,7 @@ STATUS Status register - 0x028 + 0x28 32 read-only 0x00000000 @@ -63871,7 +63871,7 @@ CMD Command Register - 0x02C + 0x2c 32 write-only 0x00000000 @@ -63889,7 +63889,7 @@ SYNCBUSY Synchronization Busy Register - 0x030 + 0x30 32 read-only 0x00000000 @@ -63907,7 +63907,7 @@ POWERDOWN Retention RAM power-down register - 0x034 + 0x34 32 read-write 0x00000000 @@ -63925,11 +63925,11 @@ LOCK Configuration Lock Register - 0x038 + 0x38 32 read-write 0x00000000 - 0x0000FFFF + 0x0000ffff LOCKKEY @@ -63955,7 +63955,7 @@ EM4WUEN Wake Up Enable - 0x03C + 0x3c 32 read-write 0x00000000 @@ -63973,11 +63973,11 @@ CC0_CTRL CC Channel Control Register - 0x040 + 0x40 32 read-write 0x00000000 - 0x0003FBFF + 0x0003fbff MODE @@ -64121,12 +64121,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -64156,11 +64156,11 @@ CC0_CCV Capture/Compare Value Register - 0x044 + 0x44 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff CCV @@ -64174,11 +64174,11 @@ CC0_TIME Capture/Compare Time Register - 0x048 + 0x48 32 read-write 0x00000000 - 0x003F7F7F + 0x003f7f7f SECU @@ -64227,11 +64227,11 @@ CC0_DATE Capture/Compare Date Register - 0x04C + 0x4c 32 read-write 0x00000000 - 0x00001F3F + 0x00001f3f DAYU @@ -64266,11 +64266,11 @@ CC1_CTRL CC Channel Control Register - 0x050 + 0x50 32 read-write 0x00000000 - 0x0003FBFF + 0x0003fbff MODE @@ -64414,12 +64414,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -64449,11 +64449,11 @@ CC1_CCV Capture/Compare Value Register - 0x054 + 0x54 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff CCV @@ -64467,11 +64467,11 @@ CC1_TIME Capture/Compare Time Register - 0x058 + 0x58 32 read-write 0x00000000 - 0x003F7F7F + 0x003f7f7f SECU @@ -64520,11 +64520,11 @@ CC1_DATE Capture/Compare Date Register - 0x05C + 0x5c 32 read-write 0x00000000 - 0x00001F3F + 0x00001f3f DAYU @@ -64559,11 +64559,11 @@ CC2_CTRL CC Channel Control Register - 0x060 + 0x60 32 read-write 0x00000000 - 0x0003FBFF + 0x0003fbff MODE @@ -64707,12 +64707,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -64742,11 +64742,11 @@ CC2_CCV Capture/Compare Value Register - 0x064 + 0x64 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff CCV @@ -64760,11 +64760,11 @@ CC2_TIME Capture/Compare Time Register - 0x068 + 0x68 32 read-write 0x00000000 - 0x003F7F7F + 0x003f7f7f SECU @@ -64813,11 +64813,11 @@ CC2_DATE Capture/Compare Date Register - 0x06C + 0x6c 32 read-write 0x00000000 - 0x00001F3F + 0x00001f3f DAYU @@ -64856,7 +64856,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -64874,7 +64874,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -64888,11 +64888,11 @@ RET2_REG Retention register - 0x10C + 0x10c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -64910,7 +64910,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -64928,7 +64928,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -64946,7 +64946,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -64960,11 +64960,11 @@ RET6_REG Retention register - 0x11C + 0x11c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -64982,7 +64982,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65000,7 +65000,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65018,7 +65018,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65032,11 +65032,11 @@ RET10_REG Retention register - 0x12C + 0x12c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65054,7 +65054,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65072,7 +65072,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65090,7 +65090,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65104,11 +65104,11 @@ RET14_REG Retention register - 0x13C + 0x13c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65126,7 +65126,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65144,7 +65144,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65162,7 +65162,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65176,11 +65176,11 @@ RET18_REG Retention register - 0x14C + 0x14c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65198,7 +65198,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65216,7 +65216,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65234,7 +65234,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65248,11 +65248,11 @@ RET22_REG Retention register - 0x15C + 0x15c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65270,7 +65270,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65288,7 +65288,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65306,7 +65306,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65320,11 +65320,11 @@ RET26_REG Retention register - 0x16C + 0x16c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65342,7 +65342,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65360,7 +65360,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65378,7 +65378,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65392,11 +65392,11 @@ RET30_REG Retention register - 0x17C + 0x17c 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65414,7 +65414,7 @@ 32 read-write 0x00000000 - 0xFFFFFFFF + 0xffffffff REG @@ -65445,11 +65445,11 @@ CTRL Control Register - 0x000 + 0x0 32 read-write - 0x00000F00 - 0xC7033F7F + 0x00000f00 + 0xc7033f7f EN @@ -65564,7 +65564,7 @@ CMD Command Register - 0x004 + 0x4 32 write-only 0x00000000 @@ -65582,11 +65582,11 @@ SYNCBUSY Synchronization Busy Register - 0x008 + 0x8 32 read-only 0x00000000 - 0x0000000F + 0x0000000f CTRL @@ -65621,11 +65621,11 @@ PCH0_PRSCTRL PRS Control Register - 0x00C + 0xc 32 read-write 0x00000000 - 0x0000010F + 0x0000010f PRSSEL @@ -65687,12 +65687,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -65708,11 +65708,11 @@ PCH1_PRSCTRL PRS Control Register - 0x010 + 0x10 32 read-write 0x00000000 - 0x0000010F + 0x0000010f PRSSEL @@ -65774,12 +65774,12 @@ PRSCH10 PRS Channel 10 selected as input - 0x0000000A + 0x0000000a PRSCH11 PRS Channel 11 selected as input - 0x0000000B + 0x0000000b @@ -65795,11 +65795,11 @@ IF Watchdog Interrupt Flags - 0x01C + 0x1c 32 read-only 0x00000000 - 0x0000001F + 0x0000001f TOUT @@ -65841,11 +65841,11 @@ IFS Interrupt Flag Set Register - 0x020 + 0x20 32 write-only 0x00000000 - 0x0000001F + 0x0000001f TOUT @@ -65887,11 +65887,11 @@ IFC Interrupt Flag Clear Register - 0x024 + 0x24 32 write-only 0x00000000 - 0x0000001F + 0x0000001f TOUT @@ -65933,11 +65933,11 @@ IEN Interrupt Enable Register - 0x028 + 0x28 32 read-write 0x00000000 - 0x0000001F + 0x0000001f TOUT diff --git a/examples/STM32F429x.svd b/examples/STM32F429x.svd index 6a8e699f..f9711f4f 100644 --- a/examples/STM32F429x.svd +++ b/examples/STM32F429x.svd @@ -13,7 +13,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x0 - 0xFFFFFFFF + 0xffffffff RNG @@ -149,7 +149,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 ENABLE @@ -229,7 +229,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-only - 0x0000 + 0x00 FNE @@ -258,7 +258,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-only - 0x0000 + 0x00 LINE_RIS @@ -299,10 +299,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IER IER interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 LINE_IE @@ -346,7 +346,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-only - 0x0000 + 0x00 LINE_MIS @@ -392,7 +392,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 LINE_ISC @@ -439,7 +439,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x18 0x20 read-write - 0x0000 + 0x00 FEC @@ -472,10 +472,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ESUR embedded synchronization unmask register - 0x1C + 0x1c 0x20 read-write - 0x0000 + 0x00 FEU @@ -512,7 +512,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0000 + 0x00 VST @@ -535,7 +535,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x24 0x20 read-write - 0x0000 + 0x00 VLINE @@ -558,7 +558,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-only - 0x0000 + 0x00 Byte3 @@ -592,7 +592,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FMC Flexible memory controller FSMC - 0xA0000000 + 0xa0000000 0x0 0x400 @@ -612,7 +612,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x000030D0 + 0x000030d0 CCLKEN @@ -708,7 +708,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0xFFFFFFFF + 0xffffffff ACCMOD @@ -762,7 +762,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x000030D0 + 0x000030d0 CBURSTRW @@ -855,10 +855,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BTR2 SRAM/NOR-Flash chip-select timing register 2 - 0xC + 0xc 0x20 read-write - 0xFFFFFFFF + 0xffffffff ACCMOD @@ -912,7 +912,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x000030D0 + 0x000030d0 CBURSTRW @@ -1008,7 +1008,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 read-write - 0xFFFFFFFF + 0xffffffff ACCMOD @@ -1062,7 +1062,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x18 0x20 read-write - 0x000030D0 + 0x000030d0 CBURSTRW @@ -1155,10 +1155,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BTR4 SRAM/NOR-Flash chip-select timing register 4 - 0x1C + 0x1c 0x20 read-write - 0xFFFFFFFF + 0xffffffff ACCMOD @@ -1332,7 +1332,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x68 0x20 read-write - 0xFCFCFCFC + 0xfcfcfcfc MEMHIZx @@ -1365,10 +1365,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PATT2 Attribute memory space timing register 2 - 0x6C + 0x6c 0x20 read-write - 0xFCFCFCFC + 0xfcfcfcfc ATTHIZx @@ -1541,7 +1541,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x88 0x20 read-write - 0xFCFCFCFC + 0xfcfcfcfc MEMHIZx @@ -1574,10 +1574,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PATT3 Attribute memory space timing register 3 - 0x8C + 0x8c 0x20 read-write - 0xFCFCFCFC + 0xfcfcfcfc ATTHIZx @@ -1627,7 +1627,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PCR4 PC Card/NAND Flash control register 4 - 0xA0 + 0xa0 0x20 read-write 0x00000018 @@ -1687,7 +1687,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR4 FIFO status and interrupt register 4 - 0xA4 + 0xa4 0x20 0x00000040 @@ -1747,10 +1747,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PMEM4 Common memory space timing register 4 - 0xA8 + 0xa8 0x20 read-write - 0xFCFCFCFC + 0xfcfcfcfc MEMHIZx @@ -1783,10 +1783,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PATT4 Attribute memory space timing register 4 - 0xAC + 0xac 0x20 read-write - 0xFCFCFCFC + 0xfcfcfcfc ATTHIZx @@ -1818,10 +1818,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PIO4 PIO4 I/O space timing register 4 - 0xB0 + 0xb0 0x20 read-write - 0xFCFCFCFC + 0xfcfcfcfc IOHIZx @@ -1857,7 +1857,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x104 0x20 read-write - 0x0FFFFFFF + 0x0fffffff ACCMOD @@ -1902,10 +1902,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BWTR2 SRAM/NOR-Flash write timing registers 2 - 0x10C + 0x10c 0x20 read-write - 0x0FFFFFFF + 0x0fffffff ACCMOD @@ -1953,7 +1953,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x114 0x20 read-write - 0x0FFFFFFF + 0x0fffffff ACCMOD @@ -1998,10 +1998,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BWTR4 SRAM/NOR-Flash write timing registers 4 - 0x11C + 0x11c 0x20 read-write - 0x0FFFFFFF + 0x0fffffff ACCMOD @@ -2048,7 +2048,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x140 0x20 read-write - 0x000002D0 + 0x000002d0 NC @@ -2114,7 +2114,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x144 0x20 read-write - 0x000002D0 + 0x000002d0 NC @@ -2180,7 +2180,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x148 0x20 read-write - 0x0FFFFFFF + 0x0fffffff TMRD @@ -2231,10 +2231,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SDTR2 SDTR2 SDRAM Timing register 2 - 0x14C + 0x14c 0x20 read-write - 0x0FFFFFFF + 0x0fffffff TMRD @@ -2398,7 +2398,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DBG Debug support DBG - 0xE0042000 + 0xe0042000 0x0 0x400 @@ -2580,7 +2580,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DBGMCU_APB2_FZ DBGMCU_APB2_FZ Debug MCU APB2 Freeze registe - 0xC + 0xc 0x20 read-write 0x00000000 @@ -3134,7 +3134,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> HIFCR high interrupt flag clear register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -3458,7 +3458,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S0M0AR stream x memory 0 address register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -3675,7 +3675,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S1NDTR stream x number of data register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -3748,7 +3748,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S1FCR S1FCR stream x FIFO control register - 0x3C + 0x3c 0x20 0x00000021 @@ -3966,7 +3966,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S2M0AR stream x memory 0 address register - 0x4C + 0x4c 0x20 read-write 0x00000000 @@ -4183,7 +4183,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S3NDTR stream x number of data register - 0x5C + 0x5c 0x20 read-write 0x00000000 @@ -4256,7 +4256,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S3FCR S3FCR stream x FIFO control register - 0x6C + 0x6c 0x20 0x00000021 @@ -4474,7 +4474,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S4M0AR stream x memory 0 address register - 0x7C + 0x7c 0x20 read-write 0x00000000 @@ -4691,7 +4691,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S5NDTR stream x number of data register - 0x8C + 0x8c 0x20 read-write 0x00000000 @@ -4764,7 +4764,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S5FCR S5FCR stream x FIFO control register - 0x9C + 0x9c 0x20 0x00000021 @@ -4804,7 +4804,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6CR stream x configuration register - 0xA0 + 0xa0 0x20 read-write 0x00000000 @@ -4945,7 +4945,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6NDTR stream x number of data register - 0xA4 + 0xa4 0x20 read-write 0x00000000 @@ -4964,7 +4964,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6PAR stream x peripheral address register - 0xA8 + 0xa8 0x20 read-write 0x00000000 @@ -4982,7 +4982,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6M0AR stream x memory 0 address register - 0xAC + 0xac 0x20 read-write 0x00000000 @@ -5000,7 +5000,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6M1AR stream x memory 1 address register - 0xB0 + 0xb0 0x20 read-write 0x00000000 @@ -5018,7 +5018,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6FCR S6FCR stream x FIFO control register - 0xB4 + 0xb4 0x20 0x00000021 @@ -5058,7 +5058,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7CR stream x configuration register - 0xB8 + 0xb8 0x20 read-write 0x00000000 @@ -5199,7 +5199,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7NDTR stream x number of data register - 0xBC + 0xbc 0x20 read-write 0x00000000 @@ -5218,7 +5218,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7PAR stream x peripheral address register - 0xC0 + 0xc0 0x20 read-write 0x00000000 @@ -5236,7 +5236,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7M0AR stream x memory 0 address register - 0xC4 + 0xc4 0x20 read-write 0x00000000 @@ -5254,7 +5254,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7M1AR stream x memory 1 address register - 0xC8 + 0xc8 0x20 read-write 0x00000000 @@ -5272,7 +5272,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7FCR S7FCR stream x FIFO control register - 0xCC + 0xcc 0x20 0x00000021 @@ -5748,7 +5748,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CIR CIR clock interrupt register - 0xC + 0xc 0x20 0x00000000 @@ -6853,7 +6853,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x50 0x20 read-write - 0x7E6791FF + 0x7e6791ff GPIOALPEN @@ -7047,7 +7047,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x54 0x20 read-write - 0x000000F1 + 0x000000f1 OTGFSLPEN @@ -7099,7 +7099,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x60 0x20 read-write - 0x36FEC9FF + 0x36fec9ff TIM2LPEN @@ -7286,7 +7286,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x64 0x20 read-write - 0x00075F33 + 0x00075f33 TIM1LPEN @@ -7484,7 +7484,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> register 0x74 0x20 - 0x0E000000 + 0x0e000000 LPWRRSTF @@ -7663,7 +7663,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCKCFGR DCKCFGR DCKCFGR - 0x8C + 0x8c 0x20 read-write 0x00000000 @@ -8095,7 +8095,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PUPDR GPIO port pull-up/pull-down register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -8701,7 +8701,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LCKR GPIO port configuration lock register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -8975,7 +8975,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> GPIOH - 0x40021C00 + 0x40021c00 GPIOG @@ -9262,7 +9262,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x000000C0 + 0x000000c0 OSPEEDR15 @@ -9383,7 +9383,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PUPDR GPIO port pull-up/pull-down register - 0xC + 0xc 0x20 read-write 0x00000100 @@ -9989,7 +9989,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LCKR GPIO port configuration lock register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -10271,7 +10271,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0xA8000000 + 0xa8000000 MODER15 @@ -10639,7 +10639,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PUPDR GPIO port pull-up/pull-down register - 0xC + 0xc 0x20 read-write 0x64000000 @@ -11245,7 +11245,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LCKR GPIO port configuration lock register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -11594,7 +11594,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 EXTI3 @@ -11631,10 +11631,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EXTICR2 external interrupt configuration register 2 - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 EXTI7 @@ -11674,7 +11674,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 EXTI11 @@ -11713,7 +11713,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 read-write - 0x0000 + 0x00 EXTI15 @@ -11795,7 +11795,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 BIDIMODE @@ -11893,7 +11893,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000 + 0x00 TXEIE @@ -11947,7 +11947,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> status register 0x8 0x20 - 0x0002 + 0x02 TIFRFE @@ -12018,10 +12018,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR DR data register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 DR @@ -12038,7 +12038,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0007 + 0x07 CRCPOLY @@ -12055,7 +12055,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 read-only - 0x0000 + 0x00 RxCRC @@ -12072,7 +12072,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x18 0x20 read-only - 0x0000 + 0x00 TxCRC @@ -12086,10 +12086,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> I2SCFGR I2SCFGR I2S configuration register - 0x1C + 0x1c 0x20 read-write - 0x0000 + 0x00 I2SMOD @@ -12187,7 +12187,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SPI3 - 0x40003C00 + 0x40003c00 SPI3 SPI3 global interrupt @@ -12234,7 +12234,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> Secure digital input/output interface SDIO - 0x40012C00 + 0x40012c00 0x0 0x400 @@ -12340,7 +12340,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CMD CMD command register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -12459,7 +12459,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RESP3 RESP3 response 1..4 register - 0x1C + 0x1c 0x20 read-only 0x00000000 @@ -12527,7 +12527,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCTRL DCTRL data control register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -12870,7 +12870,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MASK MASK mask register - 0x3C + 0x3c 0x20 read-write 0x00000000 @@ -13349,7 +13349,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SMPR1 SMPR1 sample time register 1 - 0xC + 0xc 0x20 read-write 0x00000000 @@ -13422,7 +13422,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JOFR3 injected channel data offset register x - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -13463,7 +13463,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x24 0x20 read-write - 0x00000FFF + 0x00000fff HT @@ -13497,7 +13497,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SQR1 SQR1 regular sequence register 1 - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -13694,7 +13694,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JDR1 JDR1 injected data register x - 0x3C + 0x3c 0x20 read-only 0x00000000 @@ -13762,7 +13762,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR DR regular data register - 0x4C + 0x4c 0x20 read-only 0x00000000 @@ -13818,7 +13818,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> Status register 0x0 0x20 - 0x00C00000 + 0x00c00000 CTS @@ -13918,7 +13918,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 DIV_Mantissa @@ -13938,10 +13938,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 CR1 Control register 1 - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 OVER8 @@ -14043,7 +14043,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 LINEN @@ -14109,7 +14109,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 read-write - 0x0000 + 0x00 ONEBIT @@ -14194,7 +14194,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x18 0x20 read-write - 0x0000 + 0x00 GT @@ -14250,7 +14250,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> UART8 - 0x40007C00 + 0x40007c00 UART8 UART 8 global interrupt @@ -14442,7 +14442,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR12L1 channel1 12-bit left aligned data holding register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -14518,7 +14518,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR8R2 channel2 8-bit right-aligned data holding register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -14614,7 +14614,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOR1 DOR1 channel1 data output register - 0x2C + 0x2c 0x20 read-only 0x00000000 @@ -14675,7 +14675,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> I2C3 Inter-integrated circuit I2C - 0x40005C00 + 0x40005c00 0x0 0x400 @@ -14699,7 +14699,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 SWRST @@ -14796,7 +14796,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000 + 0x00 LAST @@ -14843,7 +14843,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 ADDMODE @@ -14876,10 +14876,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OAR2 OAR2 Own address register 2 - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 ADD2 @@ -14903,7 +14903,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 DR @@ -14919,7 +14919,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> Status register 1 0x14 0x20 - 0x0000 + 0x00 SMBALERT @@ -15034,7 +15034,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x18 0x20 read-only - 0x0000 + 0x00 PEC @@ -15094,10 +15094,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR CCR Clock control register - 0x1C + 0x1c 0x20 read-write - 0x0000 + 0x00 F_S @@ -15127,7 +15127,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0002 + 0x02 TRISE @@ -15145,7 +15145,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x24 0x20 read-write - 0x0000 + 0x00 DNF @@ -15244,7 +15244,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x00000FFF + 0x00000fff RL @@ -15259,7 +15259,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR SR Status register - 0xC + 0xc 0x20 read-only 0x00000000 @@ -15286,7 +15286,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> WWDG Window watchdog WWDG - 0x40002C00 + 0x40002c00 0x0 0x400 @@ -15305,7 +15305,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x7F + 0x7f WDGA @@ -15328,7 +15328,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x7F + 0x7f EWI @@ -15363,7 +15363,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x00 + 0x0 EWIF @@ -15642,7 +15642,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISR initialization and status register - 0xC + 0xc 0x20 0x00000007 @@ -15768,7 +15768,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x007F00FF + 0x007f00ff PREDIV_A @@ -15793,7 +15793,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 read-write - 0x0000FFFF + 0x0000ffff WUT @@ -15831,7 +15831,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ALRMAR ALRMAR alarm A register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -16057,7 +16057,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SHIFTR SHIFTR shift control register - 0x2C + 0x2c 0x20 write-only 0x00000000 @@ -16186,7 +16186,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CALR CALR calibration register - 0x3C + 0x3c 0x20 read-write 0x00000000 @@ -16414,7 +16414,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP3R BKP3R backup register - 0x5C + 0x5c 0x20 read-write 0x00000000 @@ -16482,7 +16482,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP7R BKP7R backup register - 0x6C + 0x6c 0x20 read-write 0x00000000 @@ -16550,7 +16550,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP11R BKP11R backup register - 0x7C + 0x7c 0x20 read-write 0x00000000 @@ -16618,7 +16618,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP15R BKP15R backup register - 0x8C + 0x8c 0x20 read-write 0x00000000 @@ -16686,7 +16686,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP19R BKP19R backup register - 0x9C + 0x9c 0x20 read-write 0x00000000 @@ -16706,7 +16706,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> Universal synchronous asynchronous receiver transmitter USART - 0x40004C00 + 0x40004c00 0x0 0x400 @@ -16724,7 +16724,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> Status register 0x0 0x20 - 0x00C00000 + 0x00c00000 LBD @@ -16817,7 +16817,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 DIV_Mantissa @@ -16837,10 +16837,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 CR1 Control register 1 - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 OVER8 @@ -16942,7 +16942,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 LINEN @@ -16984,7 +16984,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 read-write - 0x0000 + 0x00 ONEBIT @@ -17310,7 +17310,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 CKD @@ -17370,7 +17370,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000 + 0x00 OIS4 @@ -17456,7 +17456,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 ETP @@ -17506,10 +17506,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER DIER DMA/Interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 TDE @@ -17618,7 +17618,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 CC4OF @@ -17709,7 +17709,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 BG @@ -17902,7 +17902,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCMR2_Output capture/compare mode register 2 (output mode) - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -17983,7 +17983,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 2 (input mode) CCMR2_Output - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -18036,7 +18036,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0000 + 0x00 CC4P @@ -18162,7 +18162,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x0000 + 0x00 PSC @@ -18176,7 +18176,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR ARR auto-reload register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -18227,7 +18227,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR3 CCR3 capture/compare register 3 - 0x3C + 0x3c 0x20 read-write 0x00000000 @@ -18264,7 +18264,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x48 0x20 read-write - 0x0000 + 0x00 DBL @@ -18284,10 +18284,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAR DMAR DMA address for full transfer - 0x4C + 0x4c 0x20 read-write - 0x0000 + 0x00 DMAB @@ -18305,7 +18305,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x30 0x20 read-write - 0x0000 + 0x00 REP @@ -18322,7 +18322,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x44 0x20 read-write - 0x0000 + 0x00 MOE @@ -18428,7 +18428,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 CKD @@ -18488,7 +18488,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000 + 0x00 TI1S @@ -18518,7 +18518,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 ETP @@ -18568,10 +18568,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER DIER DMA/Interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 TDE @@ -18662,7 +18662,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 CC4OF @@ -18741,7 +18741,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 TG @@ -18913,7 +18913,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCMR2_Output capture/compare mode register 2 (output mode) - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -18986,7 +18986,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 2 (input mode) CCMR2_Output - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -19039,7 +19039,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0000 + 0x00 CC4NP @@ -19157,7 +19157,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x0000 + 0x00 PSC @@ -19171,7 +19171,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR ARR auto-reload register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -19244,7 +19244,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR3 CCR3 capture/compare register 3 - 0x3C + 0x3c 0x20 read-write 0x00000000 @@ -19293,7 +19293,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x48 0x20 read-write - 0x0000 + 0x00 DBL @@ -19313,10 +19313,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAR DMAR DMA address for full transfer - 0x4C + 0x4c 0x20 read-write - 0x0000 + 0x00 DMAB @@ -19334,7 +19334,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x50 0x20 read-write - 0x0000 + 0x00 ITR1_RMP @@ -19369,7 +19369,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 CKD @@ -19429,7 +19429,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000 + 0x00 TI1S @@ -19459,7 +19459,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 ETP @@ -19509,10 +19509,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER DIER DMA/Interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 TDE @@ -19603,7 +19603,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 CC4OF @@ -19682,7 +19682,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 TG @@ -19854,7 +19854,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCMR2_Output capture/compare mode register 2 (output mode) - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -19927,7 +19927,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 2 (input mode) CCMR2_Output - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -19980,7 +19980,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0000 + 0x00 CC4NP @@ -20098,7 +20098,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x0000 + 0x00 PSC @@ -20112,7 +20112,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR ARR auto-reload register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -20185,7 +20185,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR3 CCR3 capture/compare register 3 - 0x3C + 0x3c 0x20 read-write 0x00000000 @@ -20234,7 +20234,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x48 0x20 read-write - 0x0000 + 0x00 DBL @@ -20254,10 +20254,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAR DMAR DMA address for full transfer - 0x4C + 0x4c 0x20 read-write - 0x0000 + 0x00 DMAB @@ -20283,7 +20283,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TIM5 General-purpose-timers TIM - 0x40000C00 + 0x40000c00 0x0 0x400 @@ -20302,7 +20302,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 CKD @@ -20362,7 +20362,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000 + 0x00 TI1S @@ -20392,7 +20392,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 ETP @@ -20442,10 +20442,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER DIER DMA/Interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 TDE @@ -20536,7 +20536,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 CC4OF @@ -20615,7 +20615,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 TG @@ -20787,7 +20787,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCMR2_Output capture/compare mode register 2 (output mode) - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -20860,7 +20860,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 2 (input mode) CCMR2_Output - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -20913,7 +20913,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0000 + 0x00 CC4NP @@ -21031,7 +21031,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x0000 + 0x00 PSC @@ -21045,7 +21045,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR ARR auto-reload register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -21118,7 +21118,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR3 CCR3 capture/compare register 3 - 0x3C + 0x3c 0x20 read-write 0x00000000 @@ -21167,7 +21167,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x48 0x20 read-write - 0x0000 + 0x00 DBL @@ -21187,10 +21187,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAR DMAR DMA address for full transfer - 0x4C + 0x4c 0x20 read-write - 0x0000 + 0x00 DMAB @@ -21208,7 +21208,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x50 0x20 read-write - 0x0000 + 0x00 IT4_RMP @@ -21244,7 +21244,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 CKD @@ -21291,7 +21291,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000 + 0x00 MMS @@ -21308,7 +21308,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-write - 0x0000 + 0x00 MSM @@ -21334,10 +21334,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER DIER DMA/Interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 TIE @@ -21374,7 +21374,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 CC2OF @@ -21425,7 +21425,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 TG @@ -21580,7 +21580,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0000 + 0x00 CC2NP @@ -21650,7 +21650,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x0000 + 0x00 PSC @@ -21664,7 +21664,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR ARR auto-reload register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -21747,7 +21747,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 CKD @@ -21785,10 +21785,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER DIER DMA/Interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 CC1IE @@ -21812,7 +21812,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 CC1OF @@ -21843,7 +21843,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 CC1G @@ -21939,7 +21939,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0000 + 0x00 CC1NP @@ -21988,7 +21988,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x0000 + 0x00 PSC @@ -22002,7 +22002,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR ARR auto-reload register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -22036,7 +22036,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TIM13 - 0x40001C00 + 0x40001c00 TIM8_UP_TIM13 TIM8 Update interrupt and TIM13 global @@ -22078,7 +22078,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 CKD @@ -22116,10 +22116,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER DIER DMA/Interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 CC1IE @@ -22143,7 +22143,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 CC1OF @@ -22174,7 +22174,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 CC1G @@ -22270,7 +22270,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x20 0x20 read-write - 0x0000 + 0x00 CC1NP @@ -22319,7 +22319,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x0000 + 0x00 PSC @@ -22333,7 +22333,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR ARR auto-reload register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -22407,7 +22407,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000 + 0x00 ARPE @@ -22448,7 +22448,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000 + 0x00 MMS @@ -22462,10 +22462,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER DIER DMA/Interrupt enable register - 0xC + 0xc 0x20 read-write - 0x0000 + 0x00 UDE @@ -22488,7 +22488,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x10 0x20 read-write - 0x0000 + 0x00 UIF @@ -22505,7 +22505,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 write-only - 0x0000 + 0x00 UG @@ -22539,7 +22539,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x0000 + 0x00 PSC @@ -22553,7 +22553,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR ARR auto-reload register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -22809,7 +22809,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACHTLR Ethernet MAC hash table low register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -22939,7 +22939,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACVLANTR MACVLANTR Ethernet MAC VLAN tag register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -22963,7 +22963,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACPMTCSR Ethernet MAC PMT control and status register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -23110,7 +23110,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACIMR Ethernet MAC interrupt mask register - 0x3C + 0x3c 0x20 read-write 0x00000000 @@ -23136,7 +23136,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> register 0x40 0x20 - 0x0010FFFF + 0x0010ffff MACA0H @@ -23162,7 +23162,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x44 0x20 read-write - 0xFFFFFFFF + 0xffffffff MACA0L @@ -23180,7 +23180,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x48 0x20 read-write - 0x0000FFFF + 0x0000ffff MACA1H @@ -23213,10 +23213,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA1LR Ethernet MAC address1 low register - 0x4C + 0x4c 0x20 read-write - 0xFFFFFFFF + 0xffffffff MACA1LR @@ -23234,7 +23234,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x50 0x20 read-write - 0x0000FFFF + 0x0000ffff MAC2AH @@ -23270,7 +23270,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x54 0x20 read-write - 0xFFFFFFFF + 0xffffffff MACA2L @@ -23288,7 +23288,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x58 0x20 read-write - 0x0000FFFF + 0x0000ffff MACA3H @@ -23321,10 +23321,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA3LR Ethernet MAC address 3 low register - 0x5C + 0x5c 0x20 read-write - 0xFFFFFFFF + 0xffffffff MBCA3L @@ -23459,7 +23459,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCRIMR Ethernet MMC receive interrupt mask register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -23519,7 +23519,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCTGFSCCR Ethernet MMC transmitted good frames after a single collision counter - 0x4C + 0x4c 0x20 read-only 0x00000000 @@ -23609,7 +23609,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCRGUFCR MMC received good unicast frames counter register - 0xC4 + 0xc4 0x20 read-only 0x00000000 @@ -23784,7 +23784,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTSLR Ethernet PTP time stamp low register - 0xC + 0xc 0x20 read-only 0x00000000 @@ -23868,7 +23868,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTTHR Ethernet PTP target time high register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -23928,7 +23928,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPPPSCR Ethernet PTP PPS control register - 0x2C + 0x2c 0x20 read-only 0x00000000 @@ -24084,7 +24084,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMARDLAR Ethernet DMA receive descriptor list address register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -24361,7 +24361,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAIER Ethernet DMA interrupt enable register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -24535,7 +24535,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMACHRDR Ethernet DMA current host receive descriptor register - 0x4C + 0x4c 0x20 read-only 0x00000000 @@ -24604,7 +24604,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0xFFFFFFFF + 0xffffffff DR @@ -24840,9 +24840,9 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_GUSBCFG OTG_FS USB configuration register (OTG_FS_GUSBCFG) - 0xC + 0xc 0x20 - 0x00000A00 + 0x00000a00 TOCAL @@ -25367,7 +25367,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_GRXSTSR_Device OTG_FS Receive status debug read(Device mode) - 0x1C + 0x1c 0x20 read-only 0x00000000 @@ -25410,7 +25410,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS Receive status debug read(Host mode) FS_GRXSTSR_Device - 0x1C + 0x1c 0x20 read-only 0x00000000 @@ -25521,7 +25521,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_GNPTXSTS OTG_FS non-periodic transmit FIFO/queue status register (OTG_FS_GNPTXSTS) - 0x2C + 0x2c 0x20 read-only 0x00080200 @@ -25591,7 +25591,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_CID FS_CID core ID register - 0x3C + 0x3c 0x20 read-write 0x00001000 @@ -25684,7 +25684,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_DIEPTXF3 OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF4) - 0x10C + 0x10c 0x20 read-write 0x02000400 @@ -25750,7 +25750,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 0x20 read-write - 0x0000EA60 + 0x0000ea60 FRIVL @@ -25768,7 +25768,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 0x20 read-only - 0x00003FFF + 0x00003fff FRNUM @@ -26322,7 +26322,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCCHAR5 OTG_FS host channel-5 characteristics register (OTG_FS_HCCHAR5) - 0x1A0 + 0x1a0 0x20 read-write 0x00000000 @@ -26394,7 +26394,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCCHAR6 OTG_FS host channel-6 characteristics register (OTG_FS_HCCHAR6) - 0x1C0 + 0x1c0 0x20 read-write 0x00000000 @@ -26466,7 +26466,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCCHAR7 OTG_FS host channel-7 characteristics register (OTG_FS_HCCHAR7) - 0x1E0 + 0x1e0 0x20 read-write 0x00000000 @@ -26883,7 +26883,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINT5 OTG_FS host channel-5 interrupt register (OTG_FS_HCINT5) - 0x1A8 + 0x1a8 0x20 read-write 0x00000000 @@ -26952,7 +26952,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINT6 OTG_FS host channel-6 interrupt register (OTG_FS_HCINT6) - 0x1C8 + 0x1c8 0x20 read-write 0x00000000 @@ -27021,7 +27021,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINT7 OTG_FS host channel-7 interrupt register (OTG_FS_HCINT7) - 0x1E8 + 0x1e8 0x20 read-write 0x00000000 @@ -27090,7 +27090,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINTMSK0 OTG_FS host channel-0 mask register (OTG_FS_HCINTMSK0) - 0x10C + 0x10c 0x20 read-write 0x00000000 @@ -27166,7 +27166,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINTMSK1 OTG_FS host channel-1 mask register (OTG_FS_HCINTMSK1) - 0x12C + 0x12c 0x20 read-write 0x00000000 @@ -27242,7 +27242,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINTMSK2 OTG_FS host channel-2 mask register (OTG_FS_HCINTMSK2) - 0x14C + 0x14c 0x20 read-write 0x00000000 @@ -27318,7 +27318,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINTMSK3 OTG_FS host channel-3 mask register (OTG_FS_HCINTMSK3) - 0x16C + 0x16c 0x20 read-write 0x00000000 @@ -27394,7 +27394,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINTMSK4 OTG_FS host channel-4 mask register (OTG_FS_HCINTMSK4) - 0x18C + 0x18c 0x20 read-write 0x00000000 @@ -27470,7 +27470,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINTMSK5 OTG_FS host channel-5 mask register (OTG_FS_HCINTMSK5) - 0x1AC + 0x1ac 0x20 read-write 0x00000000 @@ -27546,7 +27546,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINTMSK6 OTG_FS host channel-6 mask register (OTG_FS_HCINTMSK6) - 0x1CC + 0x1cc 0x20 read-write 0x00000000 @@ -27622,7 +27622,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCINTMSK7 OTG_FS host channel-7 mask register (OTG_FS_HCINTMSK7) - 0x1EC + 0x1ec 0x20 read-write 0x00000000 @@ -27848,7 +27848,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCTSIZ5 OTG_FS host channel-5 transfer size register - 0x1B0 + 0x1b0 0x20 read-write 0x00000000 @@ -27878,7 +27878,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCTSIZ6 OTG_FS host channel-6 transfer size register - 0x1D0 + 0x1d0 0x20 read-write 0x00000000 @@ -27908,7 +27908,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_HCTSIZ7 OTG_FS host channel-7 transfer size register - 0x1F0 + 0x1f0 0x20 read-write 0x00000000 @@ -28224,7 +28224,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_DAINTMSK OTG_FS all endpoints interrupt mask register (OTG_FS_DAINTMSK) - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -28252,7 +28252,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 0x20 read-write - 0x000017D7 + 0x000017d7 VBUSDT @@ -28267,10 +28267,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DVBUSPULSE OTG_FS device VBUS pulsing time register - 0x2C + 0x2c 0x20 read-write - 0x000005B8 + 0x000005b8 DVBUSP @@ -29772,7 +29772,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS_PWRCLK USB on the go full speed USB_OTG_FS - 0x50000E00 + 0x50000e00 0x0 0x400 @@ -29919,7 +29919,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> master status register 0x4 0x20 - 0x00000C02 + 0x00000c02 RX @@ -29992,7 +29992,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> transmit status register 0x8 0x20 - 0x1C000000 + 0x1c000000 LOW2 @@ -30160,7 +30160,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RF0R RF0R receive FIFO 0 register - 0xC + 0xc 0x20 0x00000000 @@ -30383,7 +30383,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BTR BTR bit timing register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -30536,7 +30536,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDH0R TDH0R mailbox data high register - 0x18C + 0x18c 0x20 read-write 0x00000000 @@ -30677,7 +30677,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDH1R TDH1R mailbox data high register - 0x19C + 0x19c 0x20 read-write 0x00000000 @@ -30712,7 +30712,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TI2R TI2R mailbox identifier register - 0x1A0 + 0x1a0 0x20 read-write 0x00000000 @@ -30754,7 +30754,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDT2R mailbox data length control and time stamp register - 0x1A4 + 0x1a4 0x20 read-write 0x00000000 @@ -30783,7 +30783,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDL2R TDL2R mailbox data low register - 0x1A8 + 0x1a8 0x20 read-write 0x00000000 @@ -30818,7 +30818,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDH2R TDH2R mailbox data high register - 0x1AC + 0x1ac 0x20 read-write 0x00000000 @@ -30854,7 +30854,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RI0R receive FIFO mailbox identifier register - 0x1B0 + 0x1b0 0x20 read-only 0x00000000 @@ -30889,7 +30889,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDT0R RDT0R mailbox data high register - 0x1B4 + 0x1b4 0x20 read-only 0x00000000 @@ -30918,7 +30918,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDL0R RDL0R mailbox data high register - 0x1B8 + 0x1b8 0x20 read-only 0x00000000 @@ -30954,7 +30954,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDH0R receive FIFO mailbox data high register - 0x1BC + 0x1bc 0x20 read-only 0x00000000 @@ -30989,7 +30989,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RI1R RI1R mailbox data high register - 0x1C0 + 0x1c0 0x20 read-only 0x00000000 @@ -31024,7 +31024,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDT1R RDT1R mailbox data high register - 0x1C4 + 0x1c4 0x20 read-only 0x00000000 @@ -31053,7 +31053,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDL1R RDL1R mailbox data high register - 0x1C8 + 0x1c8 0x20 read-only 0x00000000 @@ -31088,7 +31088,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDH1R RDH1R mailbox data high register - 0x1CC + 0x1cc 0x20 read-only 0x00000000 @@ -31126,7 +31126,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x200 0x20 read-write - 0x2A1C0E01 + 0x2a1c0e01 CAN2SB @@ -31325,7 +31325,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS1R FS1R filter scale register - 0x20C + 0x20c 0x20 read-write 0x00000000 @@ -31712,7 +31712,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FA1R FA1R filter activation register - 0x21C + 0x21c 0x20 read-write 0x00000000 @@ -32500,7 +32500,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F1R2 F1R2 Filter bank 1 register 2 - 0x24C + 0x24c 0x20 read-write 0x00000000 @@ -33312,7 +33312,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F3R2 F3R2 Filter bank 3 register 2 - 0x25C + 0x25c 0x20 read-write 0x00000000 @@ -34124,7 +34124,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F5R2 F5R2 Filter bank 5 register 2 - 0x26C + 0x26c 0x20 read-write 0x00000000 @@ -34936,7 +34936,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F7R2 F7R2 Filter bank 7 register 2 - 0x27C + 0x27c 0x20 read-write 0x00000000 @@ -35748,7 +35748,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F9R2 F9R2 Filter bank 9 register 2 - 0x28C + 0x28c 0x20 read-write 0x00000000 @@ -36560,7 +36560,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F11R2 F11R2 Filter bank 11 register 2 - 0x29C + 0x29c 0x20 read-write 0x00000000 @@ -36763,7 +36763,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F12R1 F12R1 Filter bank 4 register 1 - 0x2A0 + 0x2a0 0x20 read-write 0x00000000 @@ -36966,7 +36966,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F12R2 F12R2 Filter bank 12 register 2 - 0x2A4 + 0x2a4 0x20 read-write 0x00000000 @@ -37169,7 +37169,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F13R1 F13R1 Filter bank 13 register 1 - 0x2A8 + 0x2a8 0x20 read-write 0x00000000 @@ -37372,7 +37372,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F13R2 F13R2 Filter bank 13 register 2 - 0x2AC + 0x2ac 0x20 read-write 0x00000000 @@ -37575,7 +37575,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F14R1 F14R1 Filter bank 14 register 1 - 0x2B0 + 0x2b0 0x20 read-write 0x00000000 @@ -37778,7 +37778,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F14R2 F14R2 Filter bank 14 register 2 - 0x2B4 + 0x2b4 0x20 read-write 0x00000000 @@ -37981,7 +37981,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F15R1 F15R1 Filter bank 15 register 1 - 0x2B8 + 0x2b8 0x20 read-write 0x00000000 @@ -38184,7 +38184,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F15R2 F15R2 Filter bank 15 register 2 - 0x2BC + 0x2bc 0x20 read-write 0x00000000 @@ -38387,7 +38387,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F16R1 F16R1 Filter bank 16 register 1 - 0x2C0 + 0x2c0 0x20 read-write 0x00000000 @@ -38590,7 +38590,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F16R2 F16R2 Filter bank 16 register 2 - 0x2C4 + 0x2c4 0x20 read-write 0x00000000 @@ -38793,7 +38793,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F17R1 F17R1 Filter bank 17 register 1 - 0x2C8 + 0x2c8 0x20 read-write 0x00000000 @@ -38996,7 +38996,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F17R2 F17R2 Filter bank 17 register 2 - 0x2CC + 0x2cc 0x20 read-write 0x00000000 @@ -39199,7 +39199,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F18R1 F18R1 Filter bank 18 register 1 - 0x2D0 + 0x2d0 0x20 read-write 0x00000000 @@ -39402,7 +39402,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F18R2 F18R2 Filter bank 18 register 2 - 0x2D4 + 0x2d4 0x20 read-write 0x00000000 @@ -39605,7 +39605,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F19R1 F19R1 Filter bank 19 register 1 - 0x2D8 + 0x2d8 0x20 read-write 0x00000000 @@ -39808,7 +39808,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F19R2 F19R2 Filter bank 19 register 2 - 0x2DC + 0x2dc 0x20 read-write 0x00000000 @@ -40011,7 +40011,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F20R1 F20R1 Filter bank 20 register 1 - 0x2E0 + 0x2e0 0x20 read-write 0x00000000 @@ -40214,7 +40214,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F20R2 F20R2 Filter bank 20 register 2 - 0x2E4 + 0x2e4 0x20 read-write 0x00000000 @@ -40417,7 +40417,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F21R1 F21R1 Filter bank 21 register 1 - 0x2E8 + 0x2e8 0x20 read-write 0x00000000 @@ -40620,7 +40620,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F21R2 F21R2 Filter bank 21 register 2 - 0x2EC + 0x2ec 0x20 read-write 0x00000000 @@ -40823,7 +40823,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F22R1 F22R1 Filter bank 22 register 1 - 0x2F0 + 0x2f0 0x20 read-write 0x00000000 @@ -41026,7 +41026,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F22R2 F22R2 Filter bank 22 register 2 - 0x2F4 + 0x2f4 0x20 read-write 0x00000000 @@ -41229,7 +41229,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F23R1 F23R1 Filter bank 23 register 1 - 0x2F8 + 0x2f8 0x20 read-write 0x00000000 @@ -41432,7 +41432,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F23R2 F23R2 Filter bank 23 register 2 - 0x2FC + 0x2fc 0x20 read-write 0x00000000 @@ -42244,7 +42244,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F25R2 F25R2 Filter bank 25 register 2 - 0x30C + 0x30c 0x20 read-write 0x00000000 @@ -43056,7 +43056,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F27R2 F27R2 Filter bank 27 register 2 - 0x31C + 0x31c 0x20 read-write 0x00000000 @@ -43286,7 +43286,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> Nested Vectored Interrupt Controller NVIC - 0xE000E000 + 0xe000e000 0x0 0x1001 @@ -43317,7 +43317,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> STIR Software Triggered Interrupt Register - 0xF00 + 0xf00 0x20 write-only 0x00000000 @@ -43700,7 +43700,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR3 IPR3 Interrupt Priority Register - 0x40C + 0x40c 0x20 read-write 0x00000000 @@ -43840,7 +43840,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR7 IPR7 Interrupt Priority Register - 0x41C + 0x41c 0x20 read-write 0x00000000 @@ -43980,7 +43980,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR11 IPR11 Interrupt Priority Register - 0x42C + 0x42c 0x20 read-write 0x00000000 @@ -44120,7 +44120,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR15 IPR15 Interrupt Priority Register - 0x43C + 0x43c 0x20 read-write 0x00000000 @@ -44260,7 +44260,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR19 IPR19 Interrupt Priority Register - 0x44C + 0x44c 0x20 read-write 0x00000000 @@ -44332,7 +44332,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FLASH FLASH FLASH - 0x40023C00 + 0x40023c00 0x0 0x400 @@ -44434,7 +44434,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR SR Status register - 0xC + 0xc 0x20 0x00000000 @@ -44572,7 +44572,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x14 0x20 read-write - 0x0FFFAAED + 0x0fffaaed OPTLOCK @@ -44634,7 +44634,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x18 0x20 read-write - 0x0FFF0000 + 0x0fff0000 nWRP @@ -44651,7 +44651,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> External interrupt/event controller EXTI - 0x40013C00 + 0x40013c00 0x0 0x400 @@ -45176,7 +45176,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FTSR Falling Trigger selection register (EXTI_FTSR) - 0xC + 0xc 0x20 read-write 0x00000000 @@ -45881,9 +45881,9 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_GUSBCFG OTG_HS USB configuration register - 0xC + 0xc 32 - 0x00000A00 + 0x00000a00 TOCAL @@ -46496,7 +46496,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_GRXSTSR_Host OTG_HS Receive status debug read register (host mode) - 0x1C + 0x1c 32 read-only 0x0 @@ -46637,7 +46637,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_GNPTXSTS OTG_HS nonperiodic transmit FIFO/queue status register - 0x2C + 0x2c 32 read-only 0x00080200 @@ -46721,7 +46721,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_CID OTG_HS_CID OTG_HS core ID register - 0x3C + 0x3c 32 read-write 0x00001200 @@ -46814,7 +46814,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPTXF3 OTG_HS device IN endpoint transmit FIFO size register - 0x11C + 0x11c 32 read-write 0x02000400 @@ -46914,7 +46914,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPTXF7 OTG_HS device IN endpoint transmit FIFO size register - 0x12C + 0x12c 32 read-write 0x02000400 @@ -46940,7 +46940,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS Receive status debug read register (peripheral mode mode) OTG_HS_GRXSTSR_Host - 0x1C + 0x1c 32 read-only 0x0 @@ -47066,7 +47066,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x4 32 read-write - 0x0000EA60 + 0x0000ea60 FRIVL @@ -47084,7 +47084,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x8 32 read-only - 0x00003FFF + 0x00003fff FRNUM @@ -47643,7 +47643,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCCHAR5 OTG_HS host channel-5 characteristics register - 0x1A0 + 0x1a0 32 read-write 0x0 @@ -47716,7 +47716,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCCHAR6 OTG_HS host channel-6 characteristics register - 0x1C0 + 0x1c0 32 read-write 0x0 @@ -47789,7 +47789,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCCHAR7 OTG_HS host channel-7 characteristics register - 0x1E0 + 0x1e0 32 read-write 0x0 @@ -48364,7 +48364,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCSPLT5 OTG_HS host channel-5 split control register - 0x1A4 + 0x1a4 32 read-write 0x0 @@ -48406,7 +48406,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCSPLT6 OTG_HS host channel-6 split control register - 0x1C4 + 0x1c4 32 read-write 0x0 @@ -48448,7 +48448,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCSPLT7 OTG_HS host channel-7 split control register - 0x1E4 + 0x1e4 32 read-write 0x0 @@ -49068,7 +49068,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINT5 OTG_HS host channel-5 interrupt register - 0x1A8 + 0x1a8 32 read-write 0x0 @@ -49150,7 +49150,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINT6 OTG_HS host channel-6 interrupt register - 0x1C8 + 0x1c8 32 read-write 0x0 @@ -49232,7 +49232,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINT7 OTG_HS host channel-7 interrupt register - 0x1E8 + 0x1e8 32 read-write 0x0 @@ -49642,7 +49642,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK0 OTG_HS host channel-11 interrupt mask register - 0x10C + 0x10c 32 read-write 0x0 @@ -49724,7 +49724,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK1 OTG_HS host channel-1 interrupt mask register - 0x12C + 0x12c 32 read-write 0x0 @@ -49806,7 +49806,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK2 OTG_HS host channel-2 interrupt mask register - 0x14C + 0x14c 32 read-write 0x0 @@ -49888,7 +49888,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK3 OTG_HS host channel-3 interrupt mask register - 0x16C + 0x16c 32 read-write 0x0 @@ -49970,7 +49970,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK4 OTG_HS host channel-4 interrupt mask register - 0x18C + 0x18c 32 read-write 0x0 @@ -50052,7 +50052,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK5 OTG_HS host channel-5 interrupt mask register - 0x1AC + 0x1ac 32 read-write 0x0 @@ -50134,7 +50134,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK6 OTG_HS host channel-6 interrupt mask register - 0x1CC + 0x1cc 32 read-write 0x0 @@ -50216,7 +50216,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK7 OTG_HS host channel-7 interrupt mask register - 0x1EC + 0x1ec 32 read-write 0x0 @@ -50298,7 +50298,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK8 OTG_HS host channel-8 interrupt mask register - 0x20C + 0x20c 32 read-write 0x0 @@ -50380,7 +50380,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK9 OTG_HS host channel-9 interrupt mask register - 0x22C + 0x22c 32 read-write 0x0 @@ -50462,7 +50462,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK10 OTG_HS host channel-10 interrupt mask register - 0x24C + 0x24c 32 read-write 0x0 @@ -50544,7 +50544,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCINTMSK11 OTG_HS host channel-11 interrupt mask register - 0x26C + 0x26c 32 read-write 0x0 @@ -50776,7 +50776,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCTSIZ5 OTG_HS host channel-5 transfer size register - 0x1B0 + 0x1b0 32 read-write 0x0 @@ -50806,7 +50806,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCTSIZ6 OTG_HS host channel-6 transfer size register - 0x1D0 + 0x1d0 32 read-write 0x0 @@ -50836,7 +50836,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCTSIZ7 OTG_HS host channel-7 transfer size register - 0x1F0 + 0x1f0 32 read-write 0x0 @@ -51076,7 +51076,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCDMA5 OTG_HS host channel-5 DMA address register - 0x1B4 + 0x1b4 32 read-write 0x0 @@ -51094,7 +51094,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCDMA6 OTG_HS host channel-6 DMA address register - 0x1D4 + 0x1d4 32 read-write 0x0 @@ -51112,7 +51112,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_HCDMA7 OTG_HS host channel-7 DMA address register - 0x1F4 + 0x1f4 32 read-write 0x0 @@ -51525,7 +51525,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DAINTMSK OTG_HS all endpoints interrupt mask register - 0x1C + 0x1c 32 read-write 0x0 @@ -51552,7 +51552,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x28 32 read-write - 0x000017D7 + 0x000017d7 VBUSDT @@ -51567,10 +51567,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DVBUSPULSE OTG_HS device VBUS pulsing time register - 0x2C + 0x2c 32 read-write - 0x000005B8 + 0x000005b8 DVBUSP @@ -51679,7 +51679,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DEACHINTMSK OTG_HS device each endpoint interrupt register mask - 0x3C + 0x3c 32 read-write 0x0 @@ -52371,7 +52371,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPCTL5 OTG device endpoint-5 control register - 0x1A0 + 0x1a0 32 0x0 @@ -52473,7 +52473,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPCTL6 OTG device endpoint-6 control register - 0x1C0 + 0x1c0 32 0x0 @@ -52575,7 +52575,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPCTL7 OTG device endpoint-7 control register - 0x1E0 + 0x1e0 32 0x0 @@ -53137,7 +53137,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPINT5 OTG device endpoint-5 interrupt register - 0x1A8 + 0x1a8 32 0x0 @@ -53229,7 +53229,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPINT6 OTG device endpoint-6 interrupt register - 0x1C8 + 0x1c8 32 0x0 @@ -53321,7 +53321,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPINT7 OTG device endpoint-7 interrupt register - 0x1E8 + 0x1e8 32 0x0 @@ -53622,7 +53622,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DTXFSTS5 OTG_HS device IN endpoint transmit FIFO status register - 0x1B8 + 0x1b8 32 read-only 0x0 @@ -53761,7 +53761,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DIEPTSIZ5 OTG_HS device endpoint transfer size register - 0x1B0 + 0x1b0 32 read-write 0x0 @@ -54444,7 +54444,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DOEPINT5 OTG_HS device endpoint-5 interrupt register - 0x3A8 + 0x3a8 32 read-write 0x0 @@ -54496,7 +54496,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DOEPINT6 OTG_HS device endpoint-6 interrupt register - 0x3C8 + 0x3c8 32 read-write 0x0 @@ -54548,7 +54548,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_DOEPINT7 OTG_HS device endpoint-7 interrupt register - 0x3E8 + 0x3e8 32 read-write 0x0 @@ -54755,10 +54755,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_HS_PWRCLK USB on the go high speed USB_OTG_HS - 0x40040E00 + 0x40040e00 0x0 - 0x3F200 + 0x3f200 registers @@ -54846,7 +54846,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BPCR Back Porch Configuration Register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -55023,7 +55023,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCCR Background Color Configuration Register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -55116,7 +55116,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICR ICR Interrupt Clear Register - 0x3C + 0x3c 0x20 write-only 0x00000000 @@ -55201,7 +55201,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x48 0x20 read-only - 0x0000000F + 0x0000000f HSYNCS @@ -55293,7 +55293,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1WVPCR Layerx Window Vertical Position Configuration Register - 0x8C + 0x8c 0x20 read-write 0x00000000 @@ -55385,7 +55385,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1DCCR Layerx Default Color Configuration Register - 0x9C + 0x9c 0x20 read-write 0x00000000 @@ -55421,7 +55421,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1BFCR Layerx Blending Factors Configuration Register - 0xA0 + 0xa0 0x20 read-write 0x00000607 @@ -55445,7 +55445,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CFBAR Layerx Color Frame Buffer Address Register - 0xAC + 0xac 0x20 read-write 0x00000000 @@ -55464,7 +55464,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CFBLR Layerx Color Frame Buffer Length Register - 0xB0 + 0xb0 0x20 read-write 0x00000000 @@ -55490,7 +55490,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CFBLNR Layerx ColorFrame Buffer Line Number Register - 0xB4 + 0xb4 0x20 read-write 0x00000000 @@ -55507,7 +55507,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CLUTWR L1CLUTWR Layerx CLUT Write Register - 0xC4 + 0xc4 0x20 write-only 0x00000000 @@ -55598,7 +55598,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2WVPCR Layerx Window Vertical Position Configuration Register - 0x10C + 0x10c 0x20 read-write 0x00000000 @@ -55690,7 +55690,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2DCCR Layerx Default Color Configuration Register - 0x11C + 0x11c 0x20 read-write 0x00000000 @@ -55750,7 +55750,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2CFBAR Layerx Color Frame Buffer Address Register - 0x12C + 0x12c 0x20 read-write 0x00000000 @@ -56009,7 +56009,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BFRCR BFRCR BFRCR - 0x2C + 0x2c 0x20 read-write 0x00000007 @@ -56212,7 +56212,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCLRFR BCLRFR BClear flag register - 0x3C + 0x3c 0x20 write-only 0x00000000 @@ -56423,7 +56423,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AFRCR AFRCR AFRCR - 0xC + 0xc 0x20 read-write 0x00000007 @@ -56626,7 +56626,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ACLRFR ACLRFR AClear flag register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -56695,10 +56695,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMA2D DMA2D controller DMA2D - 0x4002B000 + 0x4002b000 0x0 - 0xC00 + 0xc00 registers @@ -56895,7 +56895,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGMAR foreground memory address register - 0xC + 0xc 0x20 read-write 0x00000000 @@ -56965,7 +56965,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGPFCCR foreground PFC control register - 0x1C + 0x1c 0x20 read-write 0x00000000 @@ -57119,7 +57119,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGCMAR foreground CLUT memory address register - 0x2C + 0x2c 0x20 read-write 0x00000000 @@ -57206,7 +57206,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OMAR OMAR output memory address register - 0x3C + 0x3c 0x20 read-write 0x00000000 @@ -57281,7 +57281,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AMTCR AHB master timer configuration register - 0x4C + 0x4c 0x20 read-write 0x00000000 @@ -57396,7 +57396,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 0x0 0x20 read-write - 0x0000C000 + 0x0000c000 LPDS diff --git a/src/addressblock.rs b/src/addressblock.rs new file mode 100644 index 00000000..07fd2f19 --- /dev/null +++ b/src/addressblock.rs @@ -0,0 +1,80 @@ +extern crate xmltree; + +use std::collections::HashMap; + +use xmltree::Element; + +use ElementExt; +use helpers::*; +use parse; + +macro_rules! try { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +#[derive(Clone, Debug, PartialEq)] +pub struct AddressBlock { + pub offset: u32, + pub size: u32, + pub usage: String, +} + +impl ParseElem for AddressBlock { + fn parse(tree: &Element) -> AddressBlock { + AddressBlock { + offset: try!(parse::u32(try!(tree.get_child("offset")))), + size: try!(parse::u32(try!(tree.get_child("size")))), + usage: try!(tree.get_child_text("usage")), + } + } +} + +impl EncodeElem for AddressBlock { + fn encode(&self) -> Element { + Element { + name: String::from("addressBlock"), + attributes: HashMap::new(), + children: vec![ + new_element("offset", Some(format!("{}", self.offset))), + new_element("size", Some(format!("0x{:08.x}", self.size))), + new_element("usage", Some(self.usage.clone())), + ], + text: None, + } + } +} + +#[cfg(test)] +mod tests { + use super::*; + + #[test] + fn decode_encode() { + let types = vec![ + ( + AddressBlock { + offset: 0, + size: 0x00000800, + usage: String::from("registers") + }, + String::from( + " + 0 + 0x00000800 + registers + " + ) + ), + ]; + + for (a, s) in types { + let tree1 = &try!(Element::parse(s.as_bytes())); + let v = AddressBlock::parse(tree1); + assert_eq!(v, a, "Parsing `{}` expected `{:?}`", s, a); + let tree2 = &v.encode(); + assert_eq!(tree1, tree2, "Encoding {:?} expected {}", a, s); + } + } +} diff --git a/src/device.rs b/src/device.rs index 6ceb7baa..b74a0d07 100644 --- a/src/device.rs +++ b/src/device.rs @@ -7,6 +7,7 @@ use ElementExt; use cpu::*; use defaults::*; use peripheral::*; +use parse; macro_rules! try { ($e:expr) => { @@ -17,6 +18,11 @@ macro_rules! try { #[derive(Clone, Debug)] pub struct Device { pub name: String, + schema_version: String, + pub version: String, + pub description: String, + pub address_unit_bits: u32, + pub width: u32, pub cpu: Option, pub peripherals: Vec, pub defaults: Defaults, @@ -27,7 +33,12 @@ pub struct Device { impl ParseElem for Device { fn parse(tree: &Element) -> Device { Device { + schema_version: tree.attributes.get("schemaVersion").unwrap().clone(), name: try!(tree.get_child_text("name")), + version: try!(tree.get_child_text("version")), + description: try!(tree.get_child_text("description")), + address_unit_bits: try!(parse::u32(try!(tree.get_child("addressUnitBits")))), + width: try!(parse::u32(try!(tree.get_child("width")))), cpu: tree.get_child("cpu").map(Cpu::parse), peripherals: try!(tree.get_child("peripherals")) .children @@ -45,13 +56,19 @@ impl EncodeElem for Device { let mut elem = Element { name: String::from("device"), attributes: HashMap::new(), - children: vec![new_element("name", Some(self.name.clone()))], + children: vec![ + new_element("name", Some(self.name.clone())), + new_element("version", Some(self.version.clone())), + new_element("description", Some(self.description.clone())), + new_element("addressUnitBits", Some(format!("{}", self.address_unit_bits))), + new_element("width", Some(format!("{}", self.width))), + ], text: None, }; elem.attributes.insert(String::from("xmlns:xs"), String::from("http://www.w3.org/2001/XMLSchema-instance")); - elem.attributes.insert(String::from("schemaVersion"), String::from("1.0")); - elem.attributes.insert(String::from("xs:noNamespaceSchemaLocation"), String::from("CMSIS-SVD_Schema_1.0.xsd")); + elem.attributes.insert(String::from("schemaVersion"), format!("{}", self.schema_version)); + elem.attributes.insert(String::from("xs:noNamespaceSchemaLocation"), format!("CMSIS-SVD_Schema_{}.xsd", self.schema_version)); match self.cpu { Some(ref v) => { diff --git a/src/lib.rs b/src/lib.rs index 3a5af58e..d671cc74 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -51,6 +51,8 @@ mod bitrange; pub use bitrange::*; mod interrupt; pub use interrupt::*; +mod addressblock; +pub use addressblock::*; mod field; pub use field::*; mod register; @@ -116,7 +118,7 @@ mod tests { use std::fs; use std::process::Command; - use std::fs::{File, OpenOptions}; + use std::fs::File; use std::io; use std::io::prelude::*; use std::path::Path; diff --git a/src/peripheral.rs b/src/peripheral.rs index 706c845e..a78af226 100644 --- a/src/peripheral.rs +++ b/src/peripheral.rs @@ -9,6 +9,7 @@ use parse; use helpers::*; use interrupt::*; use register::*; +use addressblock::*; macro_rules! try { ($e:expr) => { @@ -24,6 +25,7 @@ pub struct Peripheral { pub group_name: Option, pub description: Option, pub base_address: u32, + pub address_block: Option, pub interrupt: Vec, /// `None` indicates that the `` node is not present pub registers: Option>, @@ -43,6 +45,7 @@ impl ParseElem for Peripheral { group_name: tree.get_child_text("groupName"), description: tree.get_child_text("description"), base_address: try!(parse::u32(try!(tree.get_child("baseAddress")))), + address_block: tree.get_child("addressBlock").map(AddressBlock::parse), interrupt: tree.children .iter() .filter(|t| t.name == "interrupt") @@ -107,8 +110,15 @@ impl EncodeElem for Peripheral { }; elem.children.push(new_element( "baseAddress", - Some(format!("{:.08x}", self.base_address)), + Some(format!("0x{:.08x}", self.base_address)), )); + match self.address_block { + Some(ref v) => { + elem.children.push(v.encode()); + } + None => (), + }; + elem.children.append(&mut self.interrupt .iter() .map(Interrupt::encode) diff --git a/src/registerinfo.rs b/src/registerinfo.rs index 6bb6fab1..019e7b91 100644 --- a/src/registerinfo.rs +++ b/src/registerinfo.rs @@ -11,7 +11,6 @@ use parse; use Field; use writeconstraint::*; - macro_rules! try { ($e:expr) => { $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) @@ -67,7 +66,7 @@ impl EncodeElem for RegisterInfo { new_element("description", Some(self.description.clone())), new_element( "addressOffset", - Some(format!("0x{:03.x}", self.address_offset)) + Some(format!("0x{:x}", self.address_offset)) ), ], text: None, @@ -174,7 +173,7 @@ mod tests { WRITECTRL Write Control Register - 0x008 + 0x8 32 read-write 0x00000000 From 93df4725def7c199c5a5e333a2a3504158e22712 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 12 Sep 2017 17:10:25 +1200 Subject: [PATCH 19/25] Added notes on normalising files --- NOTES.md | 6 ++++++ 1 file changed, 6 insertions(+) create mode 100644 NOTES.md diff --git a/NOTES.md b/NOTES.md new file mode 100644 index 00000000..1675e234 --- /dev/null +++ b/NOTES.md @@ -0,0 +1,6 @@ + +End to end tests require some normalisation of files to correct for varying formatting by vendors (because the output format is static). + +- Normalise hexadecimal case: `gsed -i="" 's|\(0x[0-9a-fA-F]*\)|\L\1|g' FILENAME` +- Normalise hexadecimal lengths: `gsed -i"" 's|>0x[0]\{1,2\}\([0-9a-f]\{1,2\}\)<|>0x\1<|g' FILENAME` + From ed018a6d05dd050673e7a867044c44c44350c272 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 12 Sep 2017 17:35:37 +1200 Subject: [PATCH 20/25] Normalising example files, added script to help. Added derivedFrom attribute to peripheral outputs --- NOTES.md | 6 - examples/STM32F429x.svd | 3250 +++++++++++++++++++-------------------- normalise.sh | 21 + src/peripheral.rs | 6 + 4 files changed, 1652 insertions(+), 1631 deletions(-) delete mode 100644 NOTES.md create mode 100755 normalise.sh diff --git a/NOTES.md b/NOTES.md deleted file mode 100644 index 1675e234..00000000 --- a/NOTES.md +++ /dev/null @@ -1,6 +0,0 @@ - -End to end tests require some normalisation of files to correct for varying formatting by vendors (because the output format is static). - -- Normalise hexadecimal case: `gsed -i="" 's|\(0x[0-9a-fA-F]*\)|\L\1|g' FILENAME` -- Normalise hexadecimal lengths: `gsed -i"" 's|>0x[0]\{1,2\}\([0-9a-f]\{1,2\}\)<|>0x\1<|g' FILENAME` - diff --git a/examples/STM32F429x.svd b/examples/STM32F429x.svd index f9711f4f..a000c7fc 100644 --- a/examples/STM32F429x.svd +++ b/examples/STM32F429x.svd @@ -11,7 +11,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> 32 - 0x20 + 32 0x0 0xffffffff @@ -38,10 +38,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + control register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -62,10 +62,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x4 - 0x20 + 32 0x00000000 @@ -109,10 +109,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + data register 0x8 - 0x20 + 32 read-only 0x00000000 @@ -144,12 +144,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 ENABLE @@ -224,12 +224,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x4 - 0x20 + 32 read-only - 0x00 + 0x0 FNE @@ -253,12 +253,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RIS - RIS + raw interrupt status register 0x8 - 0x20 + 32 read-only - 0x00 + 0x0 LINE_RIS @@ -297,12 +297,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IER - IER + interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 LINE_IE @@ -340,13 +340,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MIS - MIS + masked interrupt status register 0x10 - 0x20 + 32 read-only - 0x00 + 0x0 LINE_MIS @@ -387,12 +387,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICR - ICR + interrupt clear register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 LINE_ISC @@ -433,13 +433,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ESCR - ESCR + embedded synchronization code register 0x18 - 0x20 + 32 read-write - 0x00 + 0x0 FEC @@ -469,13 +469,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ESUR - ESUR + embedded synchronization unmask register 0x1c - 0x20 + 32 read-write - 0x00 + 0x0 FEU @@ -507,12 +507,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CWSTRT - CWSTRT + crop window start 0x20 - 0x20 + 32 read-write - 0x00 + 0x0 VST @@ -530,12 +530,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CWSIZE - CWSIZE + crop window size 0x24 - 0x20 + 32 read-write - 0x00 + 0x0 VLINE @@ -553,12 +553,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + data register 0x28 - 0x20 + 32 read-only - 0x00 + 0x0 Byte3 @@ -606,11 +606,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCR1 - BCR1 + SRAM/NOR-Flash chip-select control register 1 0x0 - 0x20 + 32 read-write 0x000030d0 @@ -702,11 +702,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BTR1 - BTR1 + SRAM/NOR-Flash chip-select timing register 1 0x4 - 0x20 + 32 read-write 0xffffffff @@ -756,11 +756,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCR2 - BCR2 + SRAM/NOR-Flash chip-select control register 2 0x8 - 0x20 + 32 read-write 0x000030d0 @@ -852,11 +852,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BTR2 - BTR2 + SRAM/NOR-Flash chip-select timing register 2 0xc - 0x20 + 32 read-write 0xffffffff @@ -906,11 +906,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCR3 - BCR3 + SRAM/NOR-Flash chip-select control register 3 0x10 - 0x20 + 32 read-write 0x000030d0 @@ -1002,11 +1002,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BTR3 - BTR3 + SRAM/NOR-Flash chip-select timing register 3 0x14 - 0x20 + 32 read-write 0xffffffff @@ -1056,11 +1056,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCR4 - BCR4 + SRAM/NOR-Flash chip-select control register 4 0x18 - 0x20 + 32 read-write 0x000030d0 @@ -1152,11 +1152,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BTR4 - BTR4 + SRAM/NOR-Flash chip-select timing register 4 0x1c - 0x20 + 32 read-write 0xffffffff @@ -1206,11 +1206,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PCR2 - PCR2 + PC Card/NAND Flash control register 2 0x60 - 0x20 + 32 read-write 0x00000018 @@ -1266,11 +1266,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR2 - SR2 + FIFO status and interrupt register 2 0x64 - 0x20 + 32 0x00000040 @@ -1326,11 +1326,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PMEM2 - PMEM2 + Common memory space timing register 2 0x68 - 0x20 + 32 read-write 0xfcfcfcfc @@ -1362,11 +1362,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PATT2 - PATT2 + Attribute memory space timing register 2 0x6c - 0x20 + 32 read-write 0xfcfcfcfc @@ -1398,10 +1398,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ECCR2 - ECCR2 + ECC result register 2 0x74 - 0x20 + 32 read-only 0x00000000 @@ -1415,11 +1415,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PCR3 - PCR3 + PC Card/NAND Flash control register 3 0x80 - 0x20 + 32 read-write 0x00000018 @@ -1475,11 +1475,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR3 - SR3 + FIFO status and interrupt register 3 0x84 - 0x20 + 32 0x00000040 @@ -1535,11 +1535,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PMEM3 - PMEM3 + Common memory space timing register 3 0x88 - 0x20 + 32 read-write 0xfcfcfcfc @@ -1571,11 +1571,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PATT3 - PATT3 + Attribute memory space timing register 3 0x8c - 0x20 + 32 read-write 0xfcfcfcfc @@ -1607,10 +1607,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ECCR3 - ECCR3 + ECC result register 3 0x94 - 0x20 + 32 read-only 0x00000000 @@ -1624,11 +1624,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PCR4 - PCR4 + PC Card/NAND Flash control register 4 0xa0 - 0x20 + 32 read-write 0x00000018 @@ -1684,11 +1684,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR4 - SR4 + FIFO status and interrupt register 4 0xa4 - 0x20 + 32 0x00000040 @@ -1744,11 +1744,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PMEM4 - PMEM4 + Common memory space timing register 4 0xa8 - 0x20 + 32 read-write 0xfcfcfcfc @@ -1780,11 +1780,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PATT4 - PATT4 + Attribute memory space timing register 4 0xac - 0x20 + 32 read-write 0xfcfcfcfc @@ -1816,10 +1816,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PIO4 - PIO4 + I/O space timing register 4 0xb0 - 0x20 + 32 read-write 0xfcfcfcfc @@ -1851,11 +1851,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BWTR1 - BWTR1 + SRAM/NOR-Flash write timing registers 1 0x104 - 0x20 + 32 read-write 0x0fffffff @@ -1899,11 +1899,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BWTR2 - BWTR2 + SRAM/NOR-Flash write timing registers 2 0x10c - 0x20 + 32 read-write 0x0fffffff @@ -1947,11 +1947,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BWTR3 - BWTR3 + SRAM/NOR-Flash write timing registers 3 0x114 - 0x20 + 32 read-write 0x0fffffff @@ -1995,11 +1995,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BWTR4 - BWTR4 + SRAM/NOR-Flash write timing registers 4 0x11c - 0x20 + 32 read-write 0x0fffffff @@ -2043,10 +2043,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SDCR1 - SDCR1 + SDRAM Control Register 1 0x140 - 0x20 + 32 read-write 0x000002d0 @@ -2109,10 +2109,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SDCR2 - SDCR2 + SDRAM Control Register 2 0x144 - 0x20 + 32 read-write 0x000002d0 @@ -2175,10 +2175,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SDTR1 - SDTR1 + SDRAM Timing register 1 0x148 - 0x20 + 32 read-write 0x0fffffff @@ -2229,10 +2229,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SDTR2 - SDTR2 + SDRAM Timing register 2 0x14c - 0x20 + 32 read-write 0x0fffffff @@ -2283,10 +2283,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SDCMR - SDCMR + SDRAM Command Mode register 0x150 - 0x20 + 32 0x00000000 @@ -2328,10 +2328,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SDRTR - SDRTR + SDRAM Refresh Timer register 0x154 - 0x20 + 32 0x00000000 @@ -2359,10 +2359,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SDSR - SDSR + SDRAM Status register 0x158 - 0x20 + 32 read-only 0x00000000 @@ -2410,7 +2410,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DBGMCU_IDCODE IDCODE 0x0 - 0x20 + 32 read-only 0x10006411 @@ -2433,7 +2433,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DBGMCU_CR Control Register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -2474,7 +2474,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DBGMCU_APB1_FZ Debug MCU APB1 Freeze registe 0x8 - 0x20 + 32 read-write 0x00000000 @@ -2581,7 +2581,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DBGMCU_APB2_FZ Debug MCU APB2 Freeze registe 0xc - 0x20 + 32 read-write 0x00000000 @@ -2677,10 +2677,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LISR - LISR + low interrupt status register 0x0 - 0x20 + 32 read-only 0x00000000 @@ -2828,10 +2828,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> HISR - HISR + high interrupt status register 0x4 - 0x20 + 32 read-only 0x00000000 @@ -2979,11 +2979,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LIFCR - LIFCR + low interrupt flag clear register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -3131,11 +3131,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> HIFCR - HIFCR + high interrupt flag clear register 0xc - 0x20 + 32 read-write 0x00000000 @@ -3283,11 +3283,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S0CR - S0CR + stream x configuration register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -3418,11 +3418,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S0NDTR - S0NDTR + stream x number of data register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -3437,11 +3437,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S0PAR - S0PAR + stream x peripheral address register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -3455,11 +3455,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S0M0AR - S0M0AR + stream x memory 0 address register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -3473,11 +3473,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S0M1AR - S0M1AR + stream x memory 1 address register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -3492,10 +3492,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S0FCR - S0FCR + stream x FIFO control register 0x24 - 0x20 + 32 0x00000021 @@ -3531,11 +3531,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S1CR - S1CR + stream x configuration register 0x28 - 0x20 + 32 read-write 0x00000000 @@ -3672,11 +3672,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S1NDTR - S1NDTR + stream x number of data register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -3691,11 +3691,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S1PAR - S1PAR + stream x peripheral address register 0x30 - 0x20 + 32 read-write 0x00000000 @@ -3709,11 +3709,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S1M0AR - S1M0AR + stream x memory 0 address register 0x34 - 0x20 + 32 read-write 0x00000000 @@ -3727,11 +3727,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S1M1AR - S1M1AR + stream x memory 1 address register 0x38 - 0x20 + 32 read-write 0x00000000 @@ -3746,10 +3746,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S1FCR - S1FCR + stream x FIFO control register 0x3c - 0x20 + 32 0x00000021 @@ -3785,11 +3785,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S2CR - S2CR + stream x configuration register 0x40 - 0x20 + 32 read-write 0x00000000 @@ -3926,11 +3926,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S2NDTR - S2NDTR + stream x number of data register 0x44 - 0x20 + 32 read-write 0x00000000 @@ -3945,11 +3945,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S2PAR - S2PAR + stream x peripheral address register 0x48 - 0x20 + 32 read-write 0x00000000 @@ -3963,11 +3963,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S2M0AR - S2M0AR + stream x memory 0 address register 0x4c - 0x20 + 32 read-write 0x00000000 @@ -3981,11 +3981,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S2M1AR - S2M1AR + stream x memory 1 address register 0x50 - 0x20 + 32 read-write 0x00000000 @@ -4000,10 +4000,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S2FCR - S2FCR + stream x FIFO control register 0x54 - 0x20 + 32 0x00000021 @@ -4039,11 +4039,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S3CR - S3CR + stream x configuration register 0x58 - 0x20 + 32 read-write 0x00000000 @@ -4180,11 +4180,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S3NDTR - S3NDTR + stream x number of data register 0x5c - 0x20 + 32 read-write 0x00000000 @@ -4199,11 +4199,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S3PAR - S3PAR + stream x peripheral address register 0x60 - 0x20 + 32 read-write 0x00000000 @@ -4217,11 +4217,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S3M0AR - S3M0AR + stream x memory 0 address register 0x64 - 0x20 + 32 read-write 0x00000000 @@ -4235,11 +4235,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S3M1AR - S3M1AR + stream x memory 1 address register 0x68 - 0x20 + 32 read-write 0x00000000 @@ -4254,10 +4254,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S3FCR - S3FCR + stream x FIFO control register 0x6c - 0x20 + 32 0x00000021 @@ -4293,11 +4293,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S4CR - S4CR + stream x configuration register 0x70 - 0x20 + 32 read-write 0x00000000 @@ -4434,11 +4434,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S4NDTR - S4NDTR + stream x number of data register 0x74 - 0x20 + 32 read-write 0x00000000 @@ -4453,11 +4453,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S4PAR - S4PAR + stream x peripheral address register 0x78 - 0x20 + 32 read-write 0x00000000 @@ -4471,11 +4471,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S4M0AR - S4M0AR + stream x memory 0 address register 0x7c - 0x20 + 32 read-write 0x00000000 @@ -4489,11 +4489,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S4M1AR - S4M1AR + stream x memory 1 address register 0x80 - 0x20 + 32 read-write 0x00000000 @@ -4508,10 +4508,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S4FCR - S4FCR + stream x FIFO control register 0x84 - 0x20 + 32 0x00000021 @@ -4547,11 +4547,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S5CR - S5CR + stream x configuration register 0x88 - 0x20 + 32 read-write 0x00000000 @@ -4688,11 +4688,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S5NDTR - S5NDTR + stream x number of data register 0x8c - 0x20 + 32 read-write 0x00000000 @@ -4707,11 +4707,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S5PAR - S5PAR + stream x peripheral address register 0x90 - 0x20 + 32 read-write 0x00000000 @@ -4725,11 +4725,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S5M0AR - S5M0AR + stream x memory 0 address register 0x94 - 0x20 + 32 read-write 0x00000000 @@ -4743,11 +4743,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S5M1AR - S5M1AR + stream x memory 1 address register 0x98 - 0x20 + 32 read-write 0x00000000 @@ -4762,10 +4762,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S5FCR - S5FCR + stream x FIFO control register 0x9c - 0x20 + 32 0x00000021 @@ -4801,11 +4801,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6CR - S6CR + stream x configuration register 0xa0 - 0x20 + 32 read-write 0x00000000 @@ -4942,11 +4942,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6NDTR - S6NDTR + stream x number of data register 0xa4 - 0x20 + 32 read-write 0x00000000 @@ -4961,11 +4961,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6PAR - S6PAR + stream x peripheral address register 0xa8 - 0x20 + 32 read-write 0x00000000 @@ -4979,11 +4979,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6M0AR - S6M0AR + stream x memory 0 address register 0xac - 0x20 + 32 read-write 0x00000000 @@ -4997,11 +4997,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6M1AR - S6M1AR + stream x memory 1 address register 0xb0 - 0x20 + 32 read-write 0x00000000 @@ -5016,10 +5016,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S6FCR - S6FCR + stream x FIFO control register 0xb4 - 0x20 + 32 0x00000021 @@ -5055,11 +5055,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7CR - S7CR + stream x configuration register 0xb8 - 0x20 + 32 read-write 0x00000000 @@ -5196,11 +5196,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7NDTR - S7NDTR + stream x number of data register 0xbc - 0x20 + 32 read-write 0x00000000 @@ -5215,11 +5215,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7PAR - S7PAR + stream x peripheral address register 0xc0 - 0x20 + 32 read-write 0x00000000 @@ -5233,11 +5233,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7M0AR - S7M0AR + stream x memory 0 address register 0xc4 - 0x20 + 32 read-write 0x00000000 @@ -5251,11 +5251,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7M1AR - S7M1AR + stream x memory 1 address register 0xc8 - 0x20 + 32 read-write 0x00000000 @@ -5270,10 +5270,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> S7FCR - S7FCR + stream x FIFO control register 0xcc - 0x20 + 32 0x00000021 @@ -5371,10 +5371,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + clock control register 0x0 - 0x20 + 32 0x00000083 @@ -5471,10 +5471,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PLLCFGR - PLLCFGR + PLL configuration register 0x4 - 0x20 + 32 read-write 0x24003010 @@ -5640,10 +5640,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CFGR - CFGR + clock configuration register 0x8 - 0x20 + 32 0x00000000 @@ -5746,10 +5746,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CIR - CIR + clock interrupt register 0xc - 0x20 + 32 0x00000000 @@ -5928,10 +5928,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB1RSTR - AHB1RSTR + AHB1 peripheral reset register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -6041,10 +6041,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB2RSTR - AHB2RSTR + AHB2 peripheral reset register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -6071,10 +6071,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB3RSTR - AHB3RSTR + AHB3 peripheral reset register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -6089,10 +6089,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> APB1RSTR - APB1RSTR + APB1 peripheral reset register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -6250,10 +6250,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> APB2RSTR - APB2RSTR + APB2 peripheral reset register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -6359,10 +6359,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB1ENR - AHB1ENR + AHB1 peripheral clock register 0x30 - 0x20 + 32 read-write 0x00100000 @@ -6512,11 +6512,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB2ENR - AHB2ENR + AHB2 peripheral clock enable register 0x34 - 0x20 + 32 read-write 0x00000000 @@ -6543,11 +6543,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB3ENR - AHB3ENR + AHB3 peripheral clock enable register 0x38 - 0x20 + 32 read-write 0x00000000 @@ -6562,11 +6562,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> APB1ENR - APB1ENR + APB1 peripheral clock enable register 0x40 - 0x20 + 32 read-write 0x00000000 @@ -6726,11 +6726,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> APB2ENR - APB2ENR + APB2 peripheral clock enable register 0x44 - 0x20 + 32 read-write 0x00000000 @@ -6847,11 +6847,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB1LPENR - AHB1LPENR + AHB1 peripheral clock enable in low power mode register 0x50 - 0x20 + 32 read-write 0x7e6791ff @@ -7041,11 +7041,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB2LPENR - AHB2LPENR + AHB2 peripheral clock enable in low power mode register 0x54 - 0x20 + 32 read-write 0x000000f1 @@ -7074,11 +7074,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AHB3LPENR - AHB3LPENR + AHB3 peripheral clock enable in low power mode register 0x58 - 0x20 + 32 read-write 0x00000001 @@ -7093,11 +7093,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> APB1LPENR - APB1LPENR + APB1 peripheral clock enable in low power mode register 0x60 - 0x20 + 32 read-write 0x36fec9ff @@ -7280,11 +7280,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> APB2LPENR - APB2LPENR + APB2 peripheral clock enabled in low power mode register 0x64 - 0x20 + 32 read-write 0x00075f33 @@ -7416,10 +7416,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BDCR - BDCR + Backup domain control register 0x70 - 0x20 + 32 0x00000000 @@ -7479,11 +7479,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CSR - CSR + clock control & status register 0x74 - 0x20 + 32 0x0e000000 @@ -7563,11 +7563,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SSCGR - SSCGR + spread spectrum clock generation register 0x80 - 0x20 + 32 read-write 0x00000000 @@ -7600,10 +7600,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PLLI2SCFGR - PLLI2SCFGR + PLLI2S configuration register 0x84 - 0x20 + 32 read-write 0x20003000 @@ -7632,10 +7632,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PLLSAICFGR - PLLSAICFGR + PLLSAICFGR 0x88 - 0x20 + 32 read-write 0x24003000 @@ -7661,10 +7661,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCKCFGR - DCKCFGR + DCKCFGR 0x8c - 0x20 + 32 read-write 0x00000000 @@ -7722,10 +7722,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MODER - MODER + GPIO port mode register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -7845,10 +7845,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTYPER - OTYPER + GPIO port output type register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -7968,11 +7968,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OSPEEDR - OSPEEDR + GPIO port output speed register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -8092,11 +8092,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PUPDR - PUPDR + GPIO port pull-up/pull-down register 0xc - 0x20 + 32 read-write 0x00000000 @@ -8216,10 +8216,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IDR - IDR + GPIO port input data register 0x10 - 0x20 + 32 read-only 0x00000000 @@ -8339,10 +8339,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ODR - ODR + GPIO port output data register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -8462,11 +8462,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BSRR - BSRR + GPIO port bit set/reset register 0x18 - 0x20 + 32 write-only 0x00000000 @@ -8698,11 +8698,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LCKR - LCKR + GPIO port configuration lock register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -8829,11 +8829,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AFRL - AFRL + GPIO alternate function low register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -8897,11 +8897,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AFRH - AFRH + GPIO alternate function high register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -9010,10 +9010,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MODER - MODER + GPIO port mode register 0x0 - 0x20 + 32 read-write 0x00000280 @@ -9133,10 +9133,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTYPER - OTYPER + GPIO port output type register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -9256,11 +9256,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OSPEEDR - OSPEEDR + GPIO port output speed register 0x8 - 0x20 + 32 read-write 0x000000c0 @@ -9380,11 +9380,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PUPDR - PUPDR + GPIO port pull-up/pull-down register 0xc - 0x20 + 32 read-write 0x00000100 @@ -9504,10 +9504,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IDR - IDR + GPIO port input data register 0x10 - 0x20 + 32 read-only 0x00000000 @@ -9627,10 +9627,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ODR - ODR + GPIO port output data register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -9750,11 +9750,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BSRR - BSRR + GPIO port bit set/reset register 0x18 - 0x20 + 32 write-only 0x00000000 @@ -9986,11 +9986,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LCKR - LCKR + GPIO port configuration lock register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -10117,11 +10117,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AFRL - AFRL + GPIO alternate function low register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -10185,11 +10185,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AFRH - AFRH + GPIO alternate function high register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -10266,10 +10266,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MODER - MODER + GPIO port mode register 0x0 - 0x20 + 32 read-write 0xa8000000 @@ -10389,10 +10389,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTYPER - OTYPER + GPIO port output type register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -10512,11 +10512,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OSPEEDR - OSPEEDR + GPIO port output speed register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -10636,11 +10636,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PUPDR - PUPDR + GPIO port pull-up/pull-down register 0xc - 0x20 + 32 read-write 0x64000000 @@ -10760,10 +10760,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IDR - IDR + GPIO port input data register 0x10 - 0x20 + 32 read-only 0x00000000 @@ -10883,10 +10883,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ODR - ODR + GPIO port output data register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -11006,11 +11006,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BSRR - BSRR + GPIO port bit set/reset register 0x18 - 0x20 + 32 write-only 0x00000000 @@ -11242,11 +11242,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LCKR - LCKR + GPIO port configuration lock register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -11373,11 +11373,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AFRL - AFRL + GPIO alternate function low register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -11441,11 +11441,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AFRH - AFRH + GPIO alternate function high register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -11522,10 +11522,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MEMRM - MEMRM + memory remap register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -11551,11 +11551,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PMC - PMC + peripheral mode configuration register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -11588,13 +11588,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EXTICR1 - EXTICR1 + external interrupt configuration register 1 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 EXTI3 @@ -11628,13 +11628,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EXTICR2 - EXTICR2 + external interrupt configuration register 2 0xc - 0x20 + 32 read-write - 0x00 + 0x0 EXTI7 @@ -11668,13 +11668,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EXTICR3 - EXTICR3 + external interrupt configuration register 3 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 EXTI11 @@ -11707,13 +11707,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EXTICR4 - EXTICR4 + external interrupt configuration register 4 0x14 - 0x20 + 32 read-write - 0x00 + 0x0 EXTI15 @@ -11747,11 +11747,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CMPCR - CMPCR + Compensation cell control register 0x20 - 0x20 + 32 read-only 0x00000000 @@ -11790,12 +11790,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 BIDIMODE @@ -11888,12 +11888,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + control register 2 0x4 - 0x20 + 32 read-write - 0x00 + 0x0 TXEIE @@ -11943,11 +11943,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x8 - 0x20 - 0x02 + 32 + 0x2 TIFRFE @@ -12016,12 +12016,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + data register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 DR @@ -12033,12 +12033,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CRCPR - CRCPR + CRC polynomial register 0x10 - 0x20 + 32 read-write - 0x07 + 0x7 CRCPOLY @@ -12050,12 +12050,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RXCRCR - RXCRCR + RX CRC register 0x14 - 0x20 + 32 read-only - 0x00 + 0x0 RxCRC @@ -12067,12 +12067,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TXCRCR - TXCRCR + TX CRC register 0x18 - 0x20 + 32 read-only - 0x00 + 0x0 TxCRC @@ -12084,12 +12084,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> I2SCFGR - I2SCFGR + I2S configuration register 0x1c - 0x20 + 32 read-write - 0x00 + 0x0 I2SMOD @@ -12146,10 +12146,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> I2SPR - I2SPR + I2S prescaler register 0x20 - 0x20 + 32 read-write 00000010 @@ -12248,10 +12248,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> POWER - POWER + power control register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -12265,10 +12265,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CLKCR - CLKCR + SDI clock control register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -12321,10 +12321,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARG - ARG + argument register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -12338,10 +12338,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CMD - CMD + command register 0xc - 0x20 + 32 read-write 0x00000000 @@ -12406,10 +12406,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RESPCMD - RESPCMD + command response register 0x10 - 0x20 + 32 read-only 0x00000000 @@ -12423,10 +12423,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RESP1 - RESP1 + response 1..4 register 0x14 - 0x20 + 32 read-only 0x00000000 @@ -12440,10 +12440,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RESP2 - RESP2 + response 1..4 register 0x18 - 0x20 + 32 read-only 0x00000000 @@ -12457,10 +12457,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RESP3 - RESP3 + response 1..4 register 0x1c - 0x20 + 32 read-only 0x00000000 @@ -12474,10 +12474,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RESP4 - RESP4 + response 1..4 register 0x20 - 0x20 + 32 read-only 0x00000000 @@ -12491,10 +12491,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DTIMER - DTIMER + data timer register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -12508,10 +12508,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DLEN - DLEN + data length register 0x28 - 0x20 + 32 read-write 0x00000000 @@ -12525,10 +12525,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCTRL - DCTRL + data control register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -12592,10 +12592,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCOUNT - DCOUNT + data counter register 0x30 - 0x20 + 32 read-only 0x00000000 @@ -12609,10 +12609,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> STA - STA + status register 0x34 - 0x20 + 32 read-only 0x00000000 @@ -12779,10 +12779,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICR - ICR + interrupt clear register 0x38 - 0x20 + 32 read-write 0x00000000 @@ -12868,10 +12868,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MASK - MASK + mask register 0x3c - 0x20 + 32 read-write 0x00000000 @@ -13046,10 +13046,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FIFOCNT - FIFOCNT + FIFO counter register 0x48 - 0x20 + 32 read-only 0x00000000 @@ -13064,10 +13064,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FIFO - FIFO + data FIFO register 0x80 - 0x20 + 32 read-write 0x00000000 @@ -13100,10 +13100,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -13150,10 +13150,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x4 - 0x20 + 32 read-write 0x00000000 @@ -13255,10 +13255,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + control register 2 0x8 - 0x20 + 32 read-write 0x00000000 @@ -13347,10 +13347,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SMPR1 - SMPR1 + sample time register 1 0xc - 0x20 + 32 read-write 0x00000000 @@ -13364,10 +13364,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SMPR2 - SMPR2 + sample time register 2 0x10 - 0x20 + 32 read-write 0x00000000 @@ -13381,11 +13381,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JOFR1 - JOFR1 + injected channel data offset register x 0x14 - 0x20 + 32 read-write 0x00000000 @@ -13400,11 +13400,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JOFR2 - JOFR2 + injected channel data offset register x 0x18 - 0x20 + 32 read-write 0x00000000 @@ -13419,11 +13419,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JOFR3 - JOFR3 + injected channel data offset register x 0x1c - 0x20 + 32 read-write 0x00000000 @@ -13438,11 +13438,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JOFR4 - JOFR4 + injected channel data offset register x 0x20 - 0x20 + 32 read-write 0x00000000 @@ -13457,11 +13457,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> HTR - HTR + watchdog higher threshold register 0x24 - 0x20 + 32 read-write 0x00000fff @@ -13476,11 +13476,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LTR - LTR + watchdog lower threshold register 0x28 - 0x20 + 32 read-write 0x00000000 @@ -13495,10 +13495,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SQR1 - SQR1 + regular sequence register 1 0x2c - 0x20 + 32 read-write 0x00000000 @@ -13541,10 +13541,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SQR2 - SQR2 + regular sequence register 2 0x30 - 0x20 + 32 read-write 0x00000000 @@ -13594,10 +13594,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SQR3 - SQR3 + regular sequence register 3 0x34 - 0x20 + 32 read-write 0x00000000 @@ -13647,10 +13647,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JSQR - JSQR + injected sequence register 0x38 - 0x20 + 32 read-write 0x00000000 @@ -13692,10 +13692,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JDR1 - JDR1 + injected data register x 0x3c - 0x20 + 32 read-only 0x00000000 @@ -13709,10 +13709,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JDR2 - JDR2 + injected data register x 0x40 - 0x20 + 32 read-only 0x00000000 @@ -13726,10 +13726,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JDR3 - JDR3 + injected data register x 0x44 - 0x20 + 32 read-only 0x00000000 @@ -13743,10 +13743,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> JDR4 - JDR4 + injected data register x 0x48 - 0x20 + 32 read-only 0x00000000 @@ -13760,10 +13760,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + regular data register 0x4c - 0x20 + 32 read-only 0x00000000 @@ -13814,10 +13814,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + Status register 0x0 - 0x20 + 32 0x00c00000 @@ -13896,10 +13896,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + Data register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -13913,12 +13913,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BRR - BRR + Baud rate register 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 DIV_Mantissa @@ -13936,12 +13936,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + Control register 1 0xc - 0x20 + 32 read-write - 0x00 + 0x0 OVER8 @@ -14038,12 +14038,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + Control register 2 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 LINEN @@ -14104,12 +14104,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR3 - CR3 + Control register 3 0x14 - 0x20 + 32 read-write - 0x00 + 0x0 ONEBIT @@ -14188,13 +14188,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> GTPR - GTPR + Guard time and prescaler register 0x18 - 0x20 + 32 read-write - 0x00 + 0x0 GT @@ -14276,10 +14276,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + control register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -14395,10 +14395,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SWTRIGR - SWTRIGR + software trigger register 0x4 - 0x20 + 32 write-only 0x00000000 @@ -14420,11 +14420,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR12R1 - DHR12R1 + channel1 12-bit right-aligned data holding register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -14439,11 +14439,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR12L1 - DHR12L1 + channel1 12-bit left aligned data holding register 0xc - 0x20 + 32 read-write 0x00000000 @@ -14458,11 +14458,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR8R1 - DHR8R1 + channel1 8-bit right aligned data holding register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -14477,11 +14477,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR12R2 - DHR12R2 + channel2 12-bit right aligned data holding register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -14496,11 +14496,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR12L2 - DHR12L2 + channel2 12-bit left aligned data holding register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -14515,11 +14515,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR8R2 - DHR8R2 + channel2 8-bit right-aligned data holding register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -14534,11 +14534,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR12RD - DHR12RD + Dual DAC 12-bit right-aligned data holding register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -14560,11 +14560,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR12LD - DHR12LD + DUAL DAC 12-bit left aligned data holding register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -14586,11 +14586,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DHR8RD - DHR8RD + DUAL DAC 8-bit right aligned data holding register 0x28 - 0x20 + 32 read-write 0x00000000 @@ -14612,10 +14612,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOR1 - DOR1 + channel1 data output register 0x2c - 0x20 + 32 read-only 0x00000000 @@ -14629,10 +14629,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOR2 - DOR2 + channel2 data output register 0x30 - 0x20 + 32 read-only 0x00000000 @@ -14646,10 +14646,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x34 - 0x20 + 32 read-write 0x00000000 @@ -14694,12 +14694,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + Control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 SWRST @@ -14791,12 +14791,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + Control register 2 0x4 - 0x20 + 32 read-write - 0x00 + 0x0 LAST @@ -14838,12 +14838,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OAR1 - OAR1 + Own address register 1 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 ADDMODE @@ -14874,12 +14874,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OAR2 - OAR2 + Own address register 2 0xc - 0x20 + 32 read-write - 0x00 + 0x0 ADD2 @@ -14898,12 +14898,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + Data register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 DR @@ -14915,11 +14915,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR1 - SR1 + Status register 1 0x14 - 0x20 - 0x00 + 32 + 0x0 SMBALERT @@ -15029,12 +15029,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR2 - SR2 + Status register 2 0x18 - 0x20 + 32 read-only - 0x00 + 0x0 PEC @@ -15092,12 +15092,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR - CCR + Clock control register 0x1c - 0x20 + 32 read-write - 0x00 + 0x0 F_S @@ -15122,12 +15122,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TRISE - TRISE + TRISE register 0x20 - 0x20 + 32 read-write - 0x02 + 0x2 TRISE @@ -15140,12 +15140,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FLTR - FLTR + I2C FLTR register 0x24 - 0x20 + 32 read-write - 0x00 + 0x0 DNF @@ -15204,10 +15204,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> KR - KR + Key register 0x0 - 0x20 + 32 write-only 0x00000000 @@ -15222,10 +15222,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PR - PR + Prescaler register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -15239,10 +15239,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RLR - RLR + Reload register 0x8 - 0x20 + 32 read-write 0x00000fff @@ -15257,10 +15257,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + Status register 0xc - 0x20 + 32 read-only 0x00000000 @@ -15300,10 +15300,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + Control register 0x0 - 0x20 + 32 read-write 0x7f @@ -15323,10 +15323,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CFR - CFR + Configuration register 0x4 - 0x20 + 32 read-write 0x7f @@ -15358,10 +15358,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + Status register 0x8 - 0x20 + 32 read-write 0x0 @@ -15401,10 +15401,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TR - TR + time register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -15454,10 +15454,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + date register 0x4 - 0x20 + 32 read-write 0x00002101 @@ -15507,10 +15507,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + control register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -15639,11 +15639,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISR - ISR + initialization and status register 0xc - 0x20 + 32 0x00000007 @@ -15763,10 +15763,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PRER - PRER + prescaler register 0x10 - 0x20 + 32 read-write 0x007f00ff @@ -15788,10 +15788,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> WUTR - WUTR + wakeup timer register 0x14 - 0x20 + 32 read-write 0x0000ffff @@ -15806,10 +15806,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CALIBR - CALIBR + calibration register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -15829,10 +15829,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ALRMAR - ALRMAR + alarm A register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -15925,10 +15925,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ALRMBR - ALRMBR + alarm B register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -16021,10 +16021,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> WPR - WPR + write protection register 0x24 - 0x20 + 32 write-only 0x00000000 @@ -16038,10 +16038,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SSR - SSR + sub second register 0x28 - 0x20 + 32 read-only 0x00000000 @@ -16055,10 +16055,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SHIFTR - SHIFTR + shift control register 0x2c - 0x20 + 32 write-only 0x00000000 @@ -16079,10 +16079,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TSTR - TSTR + time stamp time register 0x30 - 0x20 + 32 read-only 0x00000000 @@ -16126,10 +16126,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TSDR - TSDR + time stamp date register 0x34 - 0x20 + 32 read-only 0x00000000 @@ -16167,10 +16167,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TSSSR - TSSSR + timestamp sub second register 0x38 - 0x20 + 32 read-only 0x00000000 @@ -16184,10 +16184,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CALR - CALR + calibration register 0x3c - 0x20 + 32 read-write 0x00000000 @@ -16222,11 +16222,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TAFCR - TAFCR + tamper and alternate function configuration register 0x40 - 0x20 + 32 read-write 0x00000000 @@ -16313,10 +16313,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ALRMASSR - ALRMASSR + alarm A sub second register 0x44 - 0x20 + 32 read-write 0x00000000 @@ -16337,10 +16337,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ALRMBSSR - ALRMBSSR + alarm B sub second register 0x48 - 0x20 + 32 read-write 0x00000000 @@ -16361,10 +16361,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP0R - BKP0R + backup register 0x50 - 0x20 + 32 read-write 0x00000000 @@ -16378,10 +16378,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP1R - BKP1R + backup register 0x54 - 0x20 + 32 read-write 0x00000000 @@ -16395,10 +16395,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP2R - BKP2R + backup register 0x58 - 0x20 + 32 read-write 0x00000000 @@ -16412,10 +16412,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP3R - BKP3R + backup register 0x5c - 0x20 + 32 read-write 0x00000000 @@ -16429,10 +16429,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP4R - BKP4R + backup register 0x60 - 0x20 + 32 read-write 0x00000000 @@ -16446,10 +16446,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP5R - BKP5R + backup register 0x64 - 0x20 + 32 read-write 0x00000000 @@ -16463,10 +16463,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP6R - BKP6R + backup register 0x68 - 0x20 + 32 read-write 0x00000000 @@ -16480,10 +16480,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP7R - BKP7R + backup register 0x6c - 0x20 + 32 read-write 0x00000000 @@ -16497,10 +16497,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP8R - BKP8R + backup register 0x70 - 0x20 + 32 read-write 0x00000000 @@ -16514,10 +16514,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP9R - BKP9R + backup register 0x74 - 0x20 + 32 read-write 0x00000000 @@ -16531,10 +16531,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP10R - BKP10R + backup register 0x78 - 0x20 + 32 read-write 0x00000000 @@ -16548,10 +16548,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP11R - BKP11R + backup register 0x7c - 0x20 + 32 read-write 0x00000000 @@ -16565,10 +16565,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP12R - BKP12R + backup register 0x80 - 0x20 + 32 read-write 0x00000000 @@ -16582,10 +16582,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP13R - BKP13R + backup register 0x84 - 0x20 + 32 read-write 0x00000000 @@ -16599,10 +16599,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP14R - BKP14R + backup register 0x88 - 0x20 + 32 read-write 0x00000000 @@ -16616,10 +16616,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP15R - BKP15R + backup register 0x8c - 0x20 + 32 read-write 0x00000000 @@ -16633,10 +16633,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP16R - BKP16R + backup register 0x90 - 0x20 + 32 read-write 0x00000000 @@ -16650,10 +16650,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP17R - BKP17R + backup register 0x94 - 0x20 + 32 read-write 0x00000000 @@ -16667,10 +16667,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP18R - BKP18R + backup register 0x98 - 0x20 + 32 read-write 0x00000000 @@ -16684,10 +16684,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BKP19R - BKP19R + backup register 0x9c - 0x20 + 32 read-write 0x00000000 @@ -16720,10 +16720,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + Status register 0x0 - 0x20 + 32 0x00c00000 @@ -16795,10 +16795,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + Data register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -16812,12 +16812,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BRR - BRR + Baud rate register 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 DIV_Mantissa @@ -16835,12 +16835,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + Control register 1 0xc - 0x20 + 32 read-write - 0x00 + 0x0 OVER8 @@ -16937,12 +16937,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + Control register 2 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 LINEN @@ -16979,12 +16979,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR3 - CR3 + Control register 3 0x14 - 0x20 + 32 read-write - 0x00 + 0x0 ONEBIT @@ -17055,10 +17055,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CSR - CSR + ADC Common status register 0x0 - 0x20 + 32 read-only 0x00000000 @@ -17186,10 +17186,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR - CCR + ADC common control register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -17243,11 +17243,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CDR - CDR + ADC common regular data register for dual and triple modes 0x8 - 0x20 + 32 read-only 0x00000000 @@ -17305,12 +17305,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 CKD @@ -17365,12 +17365,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + control register 2 0x4 - 0x20 + 32 read-write - 0x00 + 0x0 OIS4 @@ -17451,12 +17451,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SMCR - SMCR + slave mode control register 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 ETP @@ -17504,12 +17504,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER - DIER + DMA/Interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 TDE @@ -17613,12 +17613,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 CC4OF @@ -17704,12 +17704,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EGR - EGR + event generation register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 BG @@ -17772,7 +17772,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 1 (output mode) 0x18 - 0x20 + 32 read-write 0x00000000 @@ -17853,7 +17853,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR1_Output 0x18 - 0x20 + 32 read-write 0x00000000 @@ -17903,7 +17903,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 2 (output mode) 0x1c - 0x20 + 32 read-write 0x00000000 @@ -17984,7 +17984,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR2_Output 0x1c - 0x20 + 32 read-write 0x00000000 @@ -18030,13 +18030,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCER - CCER + capture/compare enable register 0x20 - 0x20 + 32 read-write - 0x00 + 0x0 CC4P @@ -18140,10 +18140,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CNT - CNT + counter 0x24 - 0x20 + 32 read-write 0x00000000 @@ -18157,12 +18157,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PSC - PSC + prescaler 0x28 - 0x20 + 32 read-write - 0x00 + 0x0 PSC @@ -18174,10 +18174,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR - ARR + auto-reload register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -18191,10 +18191,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR1 - CCR1 + capture/compare register 1 0x34 - 0x20 + 32 read-write 0x00000000 @@ -18208,10 +18208,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR2 - CCR2 + capture/compare register 2 0x38 - 0x20 + 32 read-write 0x00000000 @@ -18225,10 +18225,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR3 - CCR3 + capture/compare register 3 0x3c - 0x20 + 32 read-write 0x00000000 @@ -18242,10 +18242,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR4 - CCR4 + capture/compare register 4 0x40 - 0x20 + 32 read-write 0x00000000 @@ -18259,12 +18259,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCR - DCR + DMA control register 0x48 - 0x20 + 32 read-write - 0x00 + 0x0 DBL @@ -18282,12 +18282,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAR - DMAR + DMA address for full transfer 0x4c - 0x20 + 32 read-write - 0x00 + 0x0 DMAB @@ -18300,12 +18300,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RCR - RCR + repetition counter register 0x30 - 0x20 + 32 read-write - 0x00 + 0x0 REP @@ -18317,12 +18317,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BDTR - BDTR + break and dead-time register 0x44 - 0x20 + 32 read-write - 0x00 + 0x0 MOE @@ -18423,12 +18423,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 CKD @@ -18483,12 +18483,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + control register 2 0x4 - 0x20 + 32 read-write - 0x00 + 0x0 TI1S @@ -18513,12 +18513,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SMCR - SMCR + slave mode control register 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 ETP @@ -18566,12 +18566,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER - DIER + DMA/Interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 TDE @@ -18657,12 +18657,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 CC4OF @@ -18736,12 +18736,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EGR - EGR + event generation register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 TG @@ -18791,7 +18791,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 1 (output mode) 0x18 - 0x20 + 32 read-write 0x00000000 @@ -18864,7 +18864,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR1_Output 0x18 - 0x20 + 32 read-write 0x00000000 @@ -18914,7 +18914,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 2 (output mode) 0x1c - 0x20 + 32 read-write 0x00000000 @@ -18987,7 +18987,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR2_Output 0x1c - 0x20 + 32 read-write 0x00000000 @@ -19033,13 +19033,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCER - CCER + capture/compare enable register 0x20 - 0x20 + 32 read-write - 0x00 + 0x0 CC4NP @@ -19129,10 +19129,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CNT - CNT + counter 0x24 - 0x20 + 32 read-write 0x00000000 @@ -19152,12 +19152,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PSC - PSC + prescaler 0x28 - 0x20 + 32 read-write - 0x00 + 0x0 PSC @@ -19169,10 +19169,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR - ARR + auto-reload register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -19192,10 +19192,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR1 - CCR1 + capture/compare register 1 0x34 - 0x20 + 32 read-write 0x00000000 @@ -19217,10 +19217,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR2 - CCR2 + capture/compare register 2 0x38 - 0x20 + 32 read-write 0x00000000 @@ -19242,10 +19242,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR3 - CCR3 + capture/compare register 3 0x3c - 0x20 + 32 read-write 0x00000000 @@ -19265,10 +19265,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR4 - CCR4 + capture/compare register 4 0x40 - 0x20 + 32 read-write 0x00000000 @@ -19288,12 +19288,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCR - DCR + DMA control register 0x48 - 0x20 + 32 read-write - 0x00 + 0x0 DBL @@ -19311,12 +19311,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAR - DMAR + DMA address for full transfer 0x4c - 0x20 + 32 read-write - 0x00 + 0x0 DMAB @@ -19329,12 +19329,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OR - OR + TIM5 option register 0x50 - 0x20 + 32 read-write - 0x00 + 0x0 ITR1_RMP @@ -19364,12 +19364,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 CKD @@ -19424,12 +19424,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + control register 2 0x4 - 0x20 + 32 read-write - 0x00 + 0x0 TI1S @@ -19454,12 +19454,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SMCR - SMCR + slave mode control register 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 ETP @@ -19507,12 +19507,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER - DIER + DMA/Interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 TDE @@ -19598,12 +19598,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 CC4OF @@ -19677,12 +19677,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EGR - EGR + event generation register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 TG @@ -19732,7 +19732,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 1 (output mode) 0x18 - 0x20 + 32 read-write 0x00000000 @@ -19805,7 +19805,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR1_Output 0x18 - 0x20 + 32 read-write 0x00000000 @@ -19855,7 +19855,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 2 (output mode) 0x1c - 0x20 + 32 read-write 0x00000000 @@ -19928,7 +19928,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR2_Output 0x1c - 0x20 + 32 read-write 0x00000000 @@ -19974,13 +19974,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCER - CCER + capture/compare enable register 0x20 - 0x20 + 32 read-write - 0x00 + 0x0 CC4NP @@ -20070,10 +20070,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CNT - CNT + counter 0x24 - 0x20 + 32 read-write 0x00000000 @@ -20093,12 +20093,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PSC - PSC + prescaler 0x28 - 0x20 + 32 read-write - 0x00 + 0x0 PSC @@ -20110,10 +20110,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR - ARR + auto-reload register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -20133,10 +20133,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR1 - CCR1 + capture/compare register 1 0x34 - 0x20 + 32 read-write 0x00000000 @@ -20158,10 +20158,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR2 - CCR2 + capture/compare register 2 0x38 - 0x20 + 32 read-write 0x00000000 @@ -20183,10 +20183,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR3 - CCR3 + capture/compare register 3 0x3c - 0x20 + 32 read-write 0x00000000 @@ -20206,10 +20206,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR4 - CCR4 + capture/compare register 4 0x40 - 0x20 + 32 read-write 0x00000000 @@ -20229,12 +20229,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCR - DCR + DMA control register 0x48 - 0x20 + 32 read-write - 0x00 + 0x0 DBL @@ -20252,12 +20252,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAR - DMAR + DMA address for full transfer 0x4c - 0x20 + 32 read-write - 0x00 + 0x0 DMAB @@ -20297,12 +20297,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 CKD @@ -20357,12 +20357,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + control register 2 0x4 - 0x20 + 32 read-write - 0x00 + 0x0 TI1S @@ -20387,12 +20387,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SMCR - SMCR + slave mode control register 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 ETP @@ -20440,12 +20440,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER - DIER + DMA/Interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 TDE @@ -20531,12 +20531,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 CC4OF @@ -20610,12 +20610,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EGR - EGR + event generation register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 TG @@ -20665,7 +20665,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 1 (output mode) 0x18 - 0x20 + 32 read-write 0x00000000 @@ -20738,7 +20738,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR1_Output 0x18 - 0x20 + 32 read-write 0x00000000 @@ -20788,7 +20788,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 2 (output mode) 0x1c - 0x20 + 32 read-write 0x00000000 @@ -20861,7 +20861,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR2_Output 0x1c - 0x20 + 32 read-write 0x00000000 @@ -20907,13 +20907,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCER - CCER + capture/compare enable register 0x20 - 0x20 + 32 read-write - 0x00 + 0x0 CC4NP @@ -21003,10 +21003,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CNT - CNT + counter 0x24 - 0x20 + 32 read-write 0x00000000 @@ -21026,12 +21026,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PSC - PSC + prescaler 0x28 - 0x20 + 32 read-write - 0x00 + 0x0 PSC @@ -21043,10 +21043,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR - ARR + auto-reload register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -21066,10 +21066,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR1 - CCR1 + capture/compare register 1 0x34 - 0x20 + 32 read-write 0x00000000 @@ -21091,10 +21091,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR2 - CCR2 + capture/compare register 2 0x38 - 0x20 + 32 read-write 0x00000000 @@ -21116,10 +21116,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR3 - CCR3 + capture/compare register 3 0x3c - 0x20 + 32 read-write 0x00000000 @@ -21139,10 +21139,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR4 - CCR4 + capture/compare register 4 0x40 - 0x20 + 32 read-write 0x00000000 @@ -21162,12 +21162,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DCR - DCR + DMA control register 0x48 - 0x20 + 32 read-write - 0x00 + 0x0 DBL @@ -21185,12 +21185,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAR - DMAR + DMA address for full transfer 0x4c - 0x20 + 32 read-write - 0x00 + 0x0 DMAB @@ -21203,12 +21203,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OR - OR + TIM5 option register 0x50 - 0x20 + 32 read-write - 0x00 + 0x0 IT4_RMP @@ -21239,12 +21239,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 CKD @@ -21286,12 +21286,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + control register 2 0x4 - 0x20 + 32 read-write - 0x00 + 0x0 MMS @@ -21303,12 +21303,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SMCR - SMCR + slave mode control register 0x8 - 0x20 + 32 read-write - 0x00 + 0x0 MSM @@ -21332,12 +21332,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER - DIER + DMA/Interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 TIE @@ -21369,12 +21369,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 CC2OF @@ -21420,12 +21420,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EGR - EGR + event generation register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 TG @@ -21461,7 +21461,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 1 (output mode) 0x18 - 0x20 + 32 read-write 0x00000000 @@ -21528,7 +21528,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR1_Output 0x18 - 0x20 + 32 read-write 0x00000000 @@ -21574,13 +21574,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCER - CCER + capture/compare enable register 0x20 - 0x20 + 32 read-write - 0x00 + 0x0 CC2NP @@ -21628,10 +21628,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CNT - CNT + counter 0x24 - 0x20 + 32 read-write 0x00000000 @@ -21645,12 +21645,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PSC - PSC + prescaler 0x28 - 0x20 + 32 read-write - 0x00 + 0x0 PSC @@ -21662,10 +21662,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR - ARR + auto-reload register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -21679,10 +21679,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR1 - CCR1 + capture/compare register 1 0x34 - 0x20 + 32 read-write 0x00000000 @@ -21696,10 +21696,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR2 - CCR2 + capture/compare register 2 0x38 - 0x20 + 32 read-write 0x00000000 @@ -21742,12 +21742,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 CKD @@ -21783,12 +21783,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER - DIER + DMA/Interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 CC1IE @@ -21807,12 +21807,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 CC1OF @@ -21838,12 +21838,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EGR - EGR + event generation register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 CC1G @@ -21866,7 +21866,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 1 (output mode) 0x18 - 0x20 + 32 read-write 0x00000000 @@ -21906,7 +21906,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR1_Output 0x18 - 0x20 + 32 read-write 0x00000000 @@ -21933,13 +21933,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCER - CCER + capture/compare enable register 0x20 - 0x20 + 32 read-write - 0x00 + 0x0 CC1NP @@ -21966,10 +21966,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CNT - CNT + counter 0x24 - 0x20 + 32 read-write 0x00000000 @@ -21983,12 +21983,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PSC - PSC + prescaler 0x28 - 0x20 + 32 read-write - 0x00 + 0x0 PSC @@ -22000,10 +22000,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR - ARR + auto-reload register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -22017,10 +22017,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR1 - CCR1 + capture/compare register 1 0x34 - 0x20 + 32 read-write 0x00000000 @@ -22073,12 +22073,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 CKD @@ -22114,12 +22114,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER - DIER + DMA/Interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 CC1IE @@ -22138,12 +22138,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 CC1OF @@ -22169,12 +22169,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EGR - EGR + event generation register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 CC1G @@ -22197,7 +22197,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> capture/compare mode register 1 (output mode) 0x18 - 0x20 + 32 read-write 0x00000000 @@ -22237,7 +22237,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) CCMR1_Output 0x18 - 0x20 + 32 read-write 0x00000000 @@ -22264,13 +22264,13 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCER - CCER + capture/compare enable register 0x20 - 0x20 + 32 read-write - 0x00 + 0x0 CC1NP @@ -22297,10 +22297,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CNT - CNT + counter 0x24 - 0x20 + 32 read-write 0x00000000 @@ -22314,12 +22314,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PSC - PSC + prescaler 0x28 - 0x20 + 32 read-write - 0x00 + 0x0 PSC @@ -22331,10 +22331,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR - ARR + auto-reload register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -22348,10 +22348,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CCR1 - CCR1 + capture/compare register 1 0x34 - 0x20 + 32 read-write 0x00000000 @@ -22365,10 +22365,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OR - OR + option register 0x50 - 0x20 + 32 read-write 0x00000000 @@ -22402,12 +22402,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR1 - CR1 + control register 1 0x0 - 0x20 + 32 read-write - 0x00 + 0x0 ARPE @@ -22443,12 +22443,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR2 - CR2 + control register 2 0x4 - 0x20 + 32 read-write - 0x00 + 0x0 MMS @@ -22460,12 +22460,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIER - DIER + DMA/Interrupt enable register 0xc - 0x20 + 32 read-write - 0x00 + 0x0 UDE @@ -22483,12 +22483,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + status register 0x10 - 0x20 + 32 read-write - 0x00 + 0x0 UIF @@ -22500,12 +22500,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EGR - EGR + event generation register 0x14 - 0x20 + 32 write-only - 0x00 + 0x0 UG @@ -22517,10 +22517,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CNT - CNT + counter 0x24 - 0x20 + 32 read-write 0x00000000 @@ -22534,12 +22534,12 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PSC - PSC + prescaler 0x28 - 0x20 + 32 read-write - 0x00 + 0x0 PSC @@ -22551,10 +22551,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ARR - ARR + auto-reload register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -22602,11 +22602,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACCR - MACCR + Ethernet MAC configuration register 0x0 - 0x20 + 32 read-write 0x0008000 @@ -22710,11 +22710,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACFFR - MACFFR + Ethernet MAC frame filter register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -22788,11 +22788,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACHTHR - MACHTHR + Ethernet MAC hash table high register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -22806,11 +22806,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACHTLR - MACHTLR + Ethernet MAC hash table low register 0xc - 0x20 + 32 read-write 0x00000000 @@ -22824,11 +22824,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACMIIAR - MACMIIAR + Ethernet MAC MII address register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -22866,10 +22866,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACMIIDR - MACMIIDR + Ethernet MAC MII data register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -22883,11 +22883,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACFCR - MACFCR + Ethernet MAC flow control register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -22937,10 +22937,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACVLANTR - MACVLANTR + Ethernet MAC VLAN tag register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -22960,11 +22960,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACPMTCSR - MACPMTCSR + Ethernet MAC PMT control and status register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -23014,10 +23014,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACDBGR - MACDBGR + Ethernet MAC debug register 0x34 - 0x20 + 32 read-only 0x00000000 @@ -23061,11 +23061,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACSR - MACSR + Ethernet MAC interrupt status register 0x38 - 0x20 + 32 0x00000000 @@ -23107,11 +23107,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACIMR - MACIMR + Ethernet MAC interrupt mask register 0x3c - 0x20 + 32 read-write 0x00000000 @@ -23131,11 +23131,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA0HR - MACA0HR + Ethernet MAC address 0 high register 0x40 - 0x20 + 32 0x0010ffff @@ -23156,11 +23156,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA0LR - MACA0LR + Ethernet MAC address 0 low register 0x44 - 0x20 + 32 read-write 0xffffffff @@ -23174,11 +23174,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA1HR - MACA1HR + Ethernet MAC address 1 high register 0x48 - 0x20 + 32 read-write 0x0000ffff @@ -23210,11 +23210,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA1LR - MACA1LR + Ethernet MAC address1 low register 0x4c - 0x20 + 32 read-write 0xffffffff @@ -23228,11 +23228,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA2HR - MACA2HR + Ethernet MAC address 2 high register 0x50 - 0x20 + 32 read-write 0x0000ffff @@ -23264,11 +23264,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA2LR - MACA2LR + Ethernet MAC address 2 low register 0x54 - 0x20 + 32 read-write 0xffffffff @@ -23282,11 +23282,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA3HR - MACA3HR + Ethernet MAC address 3 high register 0x58 - 0x20 + 32 read-write 0x0000ffff @@ -23318,11 +23318,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MACA3LR - MACA3LR + Ethernet MAC address 3 low register 0x5c - 0x20 + 32 read-write 0xffffffff @@ -23349,10 +23349,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCCR - MMCCR + Ethernet MMC control register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -23396,11 +23396,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCRIR - MMCRIR + Ethernet MMC receive interrupt register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -23426,11 +23426,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCTIR - MMCTIR + Ethernet MMC transmit interrupt register 0x8 - 0x20 + 32 read-only 0x00000000 @@ -23456,11 +23456,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCRIMR - MMCRIMR + Ethernet MMC receive interrupt mask register 0xc - 0x20 + 32 read-write 0x00000000 @@ -23486,11 +23486,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCTIMR - MMCTIMR + Ethernet MMC transmit interrupt mask register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -23516,11 +23516,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCTGFSCCR - MMCTGFSCCR + Ethernet MMC transmitted good frames after a single collision counter 0x4c - 0x20 + 32 read-only 0x00000000 @@ -23534,11 +23534,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCTGFMSCCR - MMCTGFMSCCR + Ethernet MMC transmitted good frames after more than a single collision 0x50 - 0x20 + 32 read-only 0x00000000 @@ -23552,11 +23552,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCTGFCR - MMCTGFCR + Ethernet MMC transmitted good frames counter register 0x68 - 0x20 + 32 read-only 0x00000000 @@ -23570,11 +23570,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCRFCECR - MMCRFCECR + Ethernet MMC received frames with CRC error counter register 0x94 - 0x20 + 32 read-only 0x00000000 @@ -23588,11 +23588,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCRFAECR - MMCRFAECR + Ethernet MMC received frames with alignment error counter register 0x98 - 0x20 + 32 read-only 0x00000000 @@ -23606,11 +23606,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MMCRGUFCR - MMCRGUFCR + MMC received good unicast frames counter register 0xc4 - 0x20 + 32 read-only 0x00000000 @@ -23637,11 +23637,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTSCR - PTPTSCR + Ethernet PTP time stamp control register 0x0 - 0x20 + 32 read-write 0x00002000 @@ -23745,11 +23745,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPSSIR - PTPSSIR + Ethernet PTP subsecond increment register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -23763,11 +23763,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTSHR - PTPTSHR + Ethernet PTP time stamp high register 0x8 - 0x20 + 32 read-only 0x00000000 @@ -23781,11 +23781,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTSLR - PTPTSLR + Ethernet PTP time stamp low register 0xc - 0x20 + 32 read-only 0x00000000 @@ -23805,11 +23805,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTSHUR - PTPTSHUR + Ethernet PTP time stamp high update register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -23823,11 +23823,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTSLUR - PTPTSLUR + Ethernet PTP time stamp low update register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -23847,11 +23847,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTSAR - PTPTSAR + Ethernet PTP time stamp addend register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -23865,11 +23865,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTTHR - PTPTTHR + Ethernet PTP target time high register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -23883,11 +23883,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTTLR - PTPTTLR + Ethernet PTP target time low register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -23901,11 +23901,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPTSSR - PTPTSSR + Ethernet PTP time stamp status register 0x28 - 0x20 + 32 read-only 0x00000000 @@ -23925,11 +23925,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PTPPPSCR - PTPPPSCR + Ethernet PTP PPS control register 0x2c - 0x20 + 32 read-only 0x00000000 @@ -23962,10 +23962,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMABMR - DMABMR + Ethernet DMA bus mode register 0x0 - 0x20 + 32 read-write 0x00002101 @@ -24045,11 +24045,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMATPDR - DMATPDR + Ethernet DMA transmit poll demand register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -24063,11 +24063,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMARPDR - DMARPDR + EHERNET DMA receive poll demand register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -24081,11 +24081,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMARDLAR - DMARDLAR + Ethernet DMA receive descriptor list address register 0xc - 0x20 + 32 read-write 0x00000000 @@ -24099,11 +24099,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMATDLAR - DMATDLAR + Ethernet DMA transmit descriptor list address register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -24117,10 +24117,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMASR - DMASR + Ethernet DMA status register 0x14 - 0x20 + 32 0x00000000 @@ -24274,11 +24274,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAOMR - DMAOMR + Ethernet DMA operation mode register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -24358,11 +24358,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAIER - DMAIER + Ethernet DMA interrupt enable register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -24460,11 +24460,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMAMFBOCR - DMAMFBOCR + Ethernet DMA missed frame and buffer overflow counter register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -24496,11 +24496,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMARSWTR - DMARSWTR + Ethernet DMA receive status watchdog timer register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -24514,11 +24514,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMACHTDR - DMACHTDR + Ethernet DMA current host transmit descriptor register 0x48 - 0x20 + 32 read-only 0x00000000 @@ -24532,11 +24532,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMACHRDR - DMACHRDR + Ethernet DMA current host receive descriptor register 0x4c - 0x20 + 32 read-only 0x00000000 @@ -24550,11 +24550,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMACHTBAR - DMACHTBAR + Ethernet DMA current host transmit buffer address register 0x50 - 0x20 + 32 read-only 0x00000000 @@ -24568,11 +24568,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DMACHRBAR - DMACHRBAR + Ethernet DMA current host receive buffer address register 0x54 - 0x20 + 32 read-only 0x00000000 @@ -24599,10 +24599,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DR - DR + Data register 0x0 - 0x20 + 32 read-write 0xffffffff @@ -24616,10 +24616,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IDR - IDR + Independent Data register 0x4 - 0x20 + 32 read-write 0x00000000 @@ -24633,10 +24633,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + Control register 0x8 - 0x20 + 32 write-only 0x00000000 @@ -24679,7 +24679,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS control and status register (OTG_FS_GOTGCTL) 0x0 - 0x20 + 32 0x00000800 @@ -24760,7 +24760,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS interrupt register (OTG_FS_GOTGINT) 0x4 - 0x20 + 32 read-write 0x00000000 @@ -24810,7 +24810,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS AHB configuration register (OTG_FS_GAHBCFG) 0x8 - 0x20 + 32 read-write 0x00000000 @@ -24841,7 +24841,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS USB configuration register (OTG_FS_GUSBCFG) 0xc - 0x20 + 32 0x00000a00 @@ -24909,7 +24909,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS reset register (OTG_FS_GRSTCTL) 0x10 - 0x20 + 32 0x20000000 @@ -24969,7 +24969,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS core interrupt register (OTG_FS_GINTSTS) 0x14 - 0x20 + 32 0x04000020 @@ -25164,7 +25164,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS interrupt mask register (OTG_FS_GINTMSK) 0x18 - 0x20 + 32 0x00000000 @@ -25368,7 +25368,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS Receive status debug read(Device mode) 0x1c - 0x20 + 32 read-only 0x00000000 @@ -25411,7 +25411,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> mode) FS_GRXSTSR_Device 0x1c - 0x20 + 32 read-only 0x00000000 @@ -25453,7 +25453,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS Receive FIFO size register (OTG_FS_GRXFSIZ) 0x24 - 0x20 + 32 read-write 0x00000200 @@ -25471,7 +25471,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS non-periodic transmit FIFO size register (Device mode) 0x28 - 0x20 + 32 read-write 0x00000200 @@ -25497,7 +25497,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> register (Host mode) FS_GNPTXFSIZ_Device 0x28 - 0x20 + 32 read-write 0x00000200 @@ -25522,7 +25522,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS non-periodic transmit FIFO/queue status register (OTG_FS_GNPTXSTS) 0x2c - 0x20 + 32 read-only 0x00080200 @@ -25555,7 +25555,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS general core configuration register (OTG_FS_GCCFG) 0x38 - 0x20 + 32 read-write 0x00000000 @@ -25592,7 +25592,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS_CID core ID register 0x3c - 0x20 + 32 read-write 0x00001000 @@ -25610,7 +25610,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS Host periodic transmit FIFO size register (OTG_FS_HPTXFSIZ) 0x100 - 0x20 + 32 read-write 0x02000600 @@ -25635,7 +25635,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF2) 0x104 - 0x20 + 32 read-write 0x02000400 @@ -25660,7 +25660,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF3) 0x108 - 0x20 + 32 read-write 0x02000400 @@ -25685,7 +25685,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device IN endpoint transmit FIFO size register (OTG_FS_DIEPTXF4) 0x10c - 0x20 + 32 read-write 0x02000400 @@ -25723,7 +25723,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host configuration register (OTG_FS_HCFG) 0x0 - 0x20 + 32 0x00000000 @@ -25744,11 +25744,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> HFIR - HFIR + OTG_FS Host frame interval register 0x4 - 0x20 + 32 read-write 0x0000ea60 @@ -25766,7 +25766,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host frame number/frame time remaining register (OTG_FS_HFNUM) 0x8 - 0x20 + 32 read-only 0x00003fff @@ -25790,7 +25790,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS_Host periodic transmit FIFO/queue status register (OTG_FS_HPTXSTS) 0x10 - 0x20 + 32 0x00080100 @@ -25821,11 +25821,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> HAINT - HAINT + OTG_FS Host all channels interrupt register 0x14 - 0x20 + 32 read-only 0x00000000 @@ -25839,11 +25839,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> HAINTMSK - HAINTMSK + OTG_FS host all channels interrupt mask register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -25861,7 +25861,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host port control and status register (OTG_FS_HPRT) 0x40 - 0x20 + 32 0x00000000 @@ -25963,7 +25963,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-0 characteristics register (OTG_FS_HCCHAR0) 0x100 - 0x20 + 32 read-write 0x00000000 @@ -26035,7 +26035,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-1 characteristics register (OTG_FS_HCCHAR1) 0x120 - 0x20 + 32 read-write 0x00000000 @@ -26107,7 +26107,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-2 characteristics register (OTG_FS_HCCHAR2) 0x140 - 0x20 + 32 read-write 0x00000000 @@ -26179,7 +26179,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-3 characteristics register (OTG_FS_HCCHAR3) 0x160 - 0x20 + 32 read-write 0x00000000 @@ -26251,7 +26251,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-4 characteristics register (OTG_FS_HCCHAR4) 0x180 - 0x20 + 32 read-write 0x00000000 @@ -26323,7 +26323,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-5 characteristics register (OTG_FS_HCCHAR5) 0x1a0 - 0x20 + 32 read-write 0x00000000 @@ -26395,7 +26395,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-6 characteristics register (OTG_FS_HCCHAR6) 0x1c0 - 0x20 + 32 read-write 0x00000000 @@ -26467,7 +26467,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-7 characteristics register (OTG_FS_HCCHAR7) 0x1e0 - 0x20 + 32 read-write 0x00000000 @@ -26539,7 +26539,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-0 interrupt register (OTG_FS_HCINT0) 0x108 - 0x20 + 32 read-write 0x00000000 @@ -26608,7 +26608,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-1 interrupt register (OTG_FS_HCINT1) 0x128 - 0x20 + 32 read-write 0x00000000 @@ -26677,7 +26677,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-2 interrupt register (OTG_FS_HCINT2) 0x148 - 0x20 + 32 read-write 0x00000000 @@ -26746,7 +26746,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-3 interrupt register (OTG_FS_HCINT3) 0x168 - 0x20 + 32 read-write 0x00000000 @@ -26815,7 +26815,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-4 interrupt register (OTG_FS_HCINT4) 0x188 - 0x20 + 32 read-write 0x00000000 @@ -26884,7 +26884,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-5 interrupt register (OTG_FS_HCINT5) 0x1a8 - 0x20 + 32 read-write 0x00000000 @@ -26953,7 +26953,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-6 interrupt register (OTG_FS_HCINT6) 0x1c8 - 0x20 + 32 read-write 0x00000000 @@ -27022,7 +27022,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-7 interrupt register (OTG_FS_HCINT7) 0x1e8 - 0x20 + 32 read-write 0x00000000 @@ -27091,7 +27091,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-0 mask register (OTG_FS_HCINTMSK0) 0x10c - 0x20 + 32 read-write 0x00000000 @@ -27167,7 +27167,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-1 mask register (OTG_FS_HCINTMSK1) 0x12c - 0x20 + 32 read-write 0x00000000 @@ -27243,7 +27243,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-2 mask register (OTG_FS_HCINTMSK2) 0x14c - 0x20 + 32 read-write 0x00000000 @@ -27319,7 +27319,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-3 mask register (OTG_FS_HCINTMSK3) 0x16c - 0x20 + 32 read-write 0x00000000 @@ -27395,7 +27395,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-4 mask register (OTG_FS_HCINTMSK4) 0x18c - 0x20 + 32 read-write 0x00000000 @@ -27471,7 +27471,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-5 mask register (OTG_FS_HCINTMSK5) 0x1ac - 0x20 + 32 read-write 0x00000000 @@ -27547,7 +27547,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-6 mask register (OTG_FS_HCINTMSK6) 0x1cc - 0x20 + 32 read-write 0x00000000 @@ -27623,7 +27623,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-7 mask register (OTG_FS_HCINTMSK7) 0x1ec - 0x20 + 32 read-write 0x00000000 @@ -27699,7 +27699,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-0 transfer size register 0x110 - 0x20 + 32 read-write 0x00000000 @@ -27729,7 +27729,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-1 transfer size register 0x130 - 0x20 + 32 read-write 0x00000000 @@ -27759,7 +27759,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-2 transfer size register 0x150 - 0x20 + 32 read-write 0x00000000 @@ -27789,7 +27789,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-3 transfer size register 0x170 - 0x20 + 32 read-write 0x00000000 @@ -27819,7 +27819,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-x transfer size register 0x190 - 0x20 + 32 read-write 0x00000000 @@ -27849,7 +27849,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-5 transfer size register 0x1b0 - 0x20 + 32 read-write 0x00000000 @@ -27879,7 +27879,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-6 transfer size register 0x1d0 - 0x20 + 32 read-write 0x00000000 @@ -27909,7 +27909,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS host channel-7 transfer size register 0x1f0 - 0x20 + 32 read-write 0x00000000 @@ -27952,7 +27952,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device configuration register (OTG_FS_DCFG) 0x0 - 0x20 + 32 read-write 0x02200000 @@ -27989,7 +27989,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device control register (OTG_FS_DCTL) 0x4 - 0x20 + 32 0x00000000 @@ -28070,7 +28070,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device status register (OTG_FS_DSTS) 0x8 - 0x20 + 32 read-only 0x00000010 @@ -28107,7 +28107,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device IN endpoint common interrupt mask register (OTG_FS_DIEPMSK) 0x10 - 0x20 + 32 read-write 0x00000000 @@ -28161,7 +28161,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device OUT endpoint common interrupt mask register (OTG_FS_DOEPMSK) 0x14 - 0x20 + 32 read-write 0x00000000 @@ -28200,7 +28200,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device all endpoints interrupt register (OTG_FS_DAINT) 0x18 - 0x20 + 32 read-only 0x00000000 @@ -28225,7 +28225,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS all endpoints interrupt mask register (OTG_FS_DAINTMSK) 0x1c - 0x20 + 32 read-write 0x00000000 @@ -28246,11 +28246,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DVBUSDIS - DVBUSDIS + OTG_FS device VBUS discharge time register 0x28 - 0x20 + 32 read-write 0x000017d7 @@ -28264,11 +28264,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DVBUSPULSE - DVBUSPULSE + OTG_FS device VBUS pulsing time register 0x2c - 0x20 + 32 read-write 0x000005b8 @@ -28282,11 +28282,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPEMPMSK - DIEPEMPMSK + OTG_FS device IN endpoint FIFO empty interrupt mask register 0x34 - 0x20 + 32 read-write 0x00000000 @@ -28305,7 +28305,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS device control IN endpoint 0 control register (OTG_FS_DIEPCTL0) 0x100 - 0x20 + 32 0x00000000 @@ -28382,11 +28382,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPCTL1 - DIEPCTL1 + OTG device endpoint-1 control register 0x120 - 0x20 + 32 0x00000000 @@ -28484,11 +28484,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPCTL2 - DIEPCTL2 + OTG device endpoint-2 control register 0x140 - 0x20 + 32 0x00000000 @@ -28586,11 +28586,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPCTL3 - DIEPCTL3 + OTG device endpoint-3 control register 0x160 - 0x20 + 32 0x00000000 @@ -28688,11 +28688,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPCTL0 - DOEPCTL0 + device endpoint-0 control register 0x300 - 0x20 + 32 0x00008000 @@ -28769,11 +28769,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPCTL1 - DOEPCTL1 + device endpoint-1 control register 0x320 - 0x20 + 32 0x00000000 @@ -28871,11 +28871,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPCTL2 - DOEPCTL2 + device endpoint-2 control register 0x340 - 0x20 + 32 0x00000000 @@ -28973,11 +28973,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPCTL3 - DOEPCTL3 + device endpoint-3 control register 0x360 - 0x20 + 32 0x00000000 @@ -29075,11 +29075,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPINT0 - DIEPINT0 + device endpoint-x interrupt register 0x108 - 0x20 + 32 0x00000080 @@ -29128,11 +29128,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPINT1 - DIEPINT1 + device endpoint-1 interrupt register 0x128 - 0x20 + 32 0x00000080 @@ -29181,11 +29181,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPINT2 - DIEPINT2 + device endpoint-2 interrupt register 0x148 - 0x20 + 32 0x00000080 @@ -29234,11 +29234,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPINT3 - DIEPINT3 + device endpoint-3 interrupt register 0x168 - 0x20 + 32 0x00000080 @@ -29287,11 +29287,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPINT0 - DOEPINT0 + device endpoint-0 interrupt register 0x308 - 0x20 + 32 read-write 0x00000080 @@ -29329,11 +29329,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPINT1 - DOEPINT1 + device endpoint-1 interrupt register 0x328 - 0x20 + 32 read-write 0x00000080 @@ -29371,11 +29371,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPINT2 - DOEPINT2 + device endpoint-2 interrupt register 0x348 - 0x20 + 32 read-write 0x00000080 @@ -29413,11 +29413,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPINT3 - DOEPINT3 + device endpoint-3 interrupt register 0x368 - 0x20 + 32 read-write 0x00000080 @@ -29455,11 +29455,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPTSIZ0 - DIEPTSIZ0 + device endpoint-0 transfer size register 0x110 - 0x20 + 32 read-write 0x00000000 @@ -29479,11 +29479,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPTSIZ0 - DOEPTSIZ0 + device OUT endpoint-0 transfer size register 0x310 - 0x20 + 32 read-write 0x00000000 @@ -29509,11 +29509,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPTSIZ1 - DIEPTSIZ1 + device endpoint-1 transfer size register 0x130 - 0x20 + 32 read-write 0x00000000 @@ -29539,11 +29539,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPTSIZ2 - DIEPTSIZ2 + device endpoint-2 transfer size register 0x150 - 0x20 + 32 read-write 0x00000000 @@ -29569,11 +29569,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DIEPTSIZ3 - DIEPTSIZ3 + device endpoint-3 transfer size register 0x170 - 0x20 + 32 read-write 0x00000000 @@ -29599,11 +29599,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DTXFSTS0 - DTXFSTS0 + OTG_FS device IN endpoint transmit FIFO status register 0x118 - 0x20 + 32 read-only 0x00000000 @@ -29618,11 +29618,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DTXFSTS1 - DTXFSTS1 + OTG_FS device IN endpoint transmit FIFO status register 0x138 - 0x20 + 32 read-only 0x00000000 @@ -29637,11 +29637,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DTXFSTS2 - DTXFSTS2 + OTG_FS device IN endpoint transmit FIFO status register 0x158 - 0x20 + 32 read-only 0x00000000 @@ -29656,11 +29656,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DTXFSTS3 - DTXFSTS3 + OTG_FS device IN endpoint transmit FIFO status register 0x178 - 0x20 + 32 read-only 0x00000000 @@ -29675,11 +29675,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPTSIZ1 - DOEPTSIZ1 + device OUT endpoint-1 transfer size register 0x330 - 0x20 + 32 read-write 0x00000000 @@ -29706,11 +29706,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPTSIZ2 - DOEPTSIZ2 + device OUT endpoint-2 transfer size register 0x350 - 0x20 + 32 read-write 0x00000000 @@ -29737,11 +29737,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> DOEPTSIZ3 - DOEPTSIZ3 + device OUT endpoint-3 transfer size register 0x370 - 0x20 + 32 read-write 0x00000000 @@ -29785,7 +29785,7 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OTG_FS power and clock gating control register (OTG_FS_PCGCCTL) 0x0 - 0x20 + 32 read-write 0x00000000 @@ -29844,10 +29844,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MCR - MCR + master control register 0x0 - 0x20 + 32 read-write 0x00010002 @@ -29915,10 +29915,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> MSR - MSR + master status register 0x4 - 0x20 + 32 0x00000c02 @@ -29988,10 +29988,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TSR - TSR + transmit status register 0x8 - 0x20 + 32 0x1c000000 @@ -30158,10 +30158,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RF0R - RF0R + receive FIFO 0 register 0xc - 0x20 + 32 0x00000000 @@ -30196,10 +30196,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RF1R - RF1R + receive FIFO 1 register 0x10 - 0x20 + 32 0x00000000 @@ -30234,10 +30234,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IER - IER + interrupt enable register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -30329,10 +30329,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ESR - ESR + interrupt enable register 0x18 - 0x20 + 32 0x00000000 @@ -30381,10 +30381,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BTR - BTR + bit timing register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -30428,10 +30428,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TI0R - TI0R + TX mailbox identifier register 0x180 - 0x20 + 32 read-write 0x00000000 @@ -30469,11 +30469,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDT0R - TDT0R + mailbox data length control and time stamp register 0x184 - 0x20 + 32 read-write 0x00000000 @@ -30499,10 +30499,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDL0R - TDL0R + mailbox data low register 0x188 - 0x20 + 32 read-write 0x00000000 @@ -30534,10 +30534,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDH0R - TDH0R + mailbox data high register 0x18c - 0x20 + 32 read-write 0x00000000 @@ -30569,10 +30569,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TI1R - TI1R + mailbox identifier register 0x190 - 0x20 + 32 read-write 0x00000000 @@ -30610,11 +30610,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDT1R - TDT1R + mailbox data length control and time stamp register 0x194 - 0x20 + 32 read-write 0x00000000 @@ -30640,10 +30640,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDL1R - TDL1R + mailbox data low register 0x198 - 0x20 + 32 read-write 0x00000000 @@ -30675,10 +30675,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDH1R - TDH1R + mailbox data high register 0x19c - 0x20 + 32 read-write 0x00000000 @@ -30710,10 +30710,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TI2R - TI2R + mailbox identifier register 0x1a0 - 0x20 + 32 read-write 0x00000000 @@ -30751,11 +30751,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDT2R - TDT2R + mailbox data length control and time stamp register 0x1a4 - 0x20 + 32 read-write 0x00000000 @@ -30781,10 +30781,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDL2R - TDL2R + mailbox data low register 0x1a8 - 0x20 + 32 read-write 0x00000000 @@ -30816,10 +30816,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TDH2R - TDH2R + mailbox data high register 0x1ac - 0x20 + 32 read-write 0x00000000 @@ -30851,11 +30851,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RI0R - RI0R + receive FIFO mailbox identifier register 0x1b0 - 0x20 + 32 read-only 0x00000000 @@ -30887,10 +30887,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDT0R - RDT0R + mailbox data high register 0x1b4 - 0x20 + 32 read-only 0x00000000 @@ -30916,10 +30916,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDL0R - RDL0R + mailbox data high register 0x1b8 - 0x20 + 32 read-only 0x00000000 @@ -30951,11 +30951,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDH0R - RDH0R + receive FIFO mailbox data high register 0x1bc - 0x20 + 32 read-only 0x00000000 @@ -30987,10 +30987,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RI1R - RI1R + mailbox data high register 0x1c0 - 0x20 + 32 read-only 0x00000000 @@ -31022,10 +31022,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDT1R - RDT1R + mailbox data high register 0x1c4 - 0x20 + 32 read-only 0x00000000 @@ -31051,10 +31051,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDL1R - RDL1R + mailbox data high register 0x1c8 - 0x20 + 32 read-only 0x00000000 @@ -31086,10 +31086,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RDH1R - RDH1R + mailbox data high register 0x1cc - 0x20 + 32 read-only 0x00000000 @@ -31121,10 +31121,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FMR - FMR + filter master register 0x200 - 0x20 + 32 read-write 0x2a1c0e01 @@ -31144,10 +31144,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FM1R - FM1R + filter mode register 0x204 - 0x20 + 32 read-write 0x00000000 @@ -31323,10 +31323,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FS1R - FS1R + filter scale register 0x20c - 0x20 + 32 read-write 0x00000000 @@ -31502,11 +31502,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FFA1R - FFA1R + filter FIFO assignment register 0x214 - 0x20 + 32 read-write 0x00000000 @@ -31710,10 +31710,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FA1R - FA1R + filter activation register 0x21c - 0x20 + 32 read-write 0x00000000 @@ -31889,10 +31889,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F0R1 - F0R1 + Filter bank 0 register 1 0x240 - 0x20 + 32 read-write 0x00000000 @@ -32092,10 +32092,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F0R2 - F0R2 + Filter bank 0 register 2 0x244 - 0x20 + 32 read-write 0x00000000 @@ -32295,10 +32295,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F1R1 - F1R1 + Filter bank 1 register 1 0x248 - 0x20 + 32 read-write 0x00000000 @@ -32498,10 +32498,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F1R2 - F1R2 + Filter bank 1 register 2 0x24c - 0x20 + 32 read-write 0x00000000 @@ -32701,10 +32701,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F2R1 - F2R1 + Filter bank 2 register 1 0x250 - 0x20 + 32 read-write 0x00000000 @@ -32904,10 +32904,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F2R2 - F2R2 + Filter bank 2 register 2 0x254 - 0x20 + 32 read-write 0x00000000 @@ -33107,10 +33107,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F3R1 - F3R1 + Filter bank 3 register 1 0x258 - 0x20 + 32 read-write 0x00000000 @@ -33310,10 +33310,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F3R2 - F3R2 + Filter bank 3 register 2 0x25c - 0x20 + 32 read-write 0x00000000 @@ -33513,10 +33513,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F4R1 - F4R1 + Filter bank 4 register 1 0x260 - 0x20 + 32 read-write 0x00000000 @@ -33716,10 +33716,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F4R2 - F4R2 + Filter bank 4 register 2 0x264 - 0x20 + 32 read-write 0x00000000 @@ -33919,10 +33919,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F5R1 - F5R1 + Filter bank 5 register 1 0x268 - 0x20 + 32 read-write 0x00000000 @@ -34122,10 +34122,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F5R2 - F5R2 + Filter bank 5 register 2 0x26c - 0x20 + 32 read-write 0x00000000 @@ -34325,10 +34325,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F6R1 - F6R1 + Filter bank 6 register 1 0x270 - 0x20 + 32 read-write 0x00000000 @@ -34528,10 +34528,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F6R2 - F6R2 + Filter bank 6 register 2 0x274 - 0x20 + 32 read-write 0x00000000 @@ -34731,10 +34731,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F7R1 - F7R1 + Filter bank 7 register 1 0x278 - 0x20 + 32 read-write 0x00000000 @@ -34934,10 +34934,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F7R2 - F7R2 + Filter bank 7 register 2 0x27c - 0x20 + 32 read-write 0x00000000 @@ -35137,10 +35137,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F8R1 - F8R1 + Filter bank 8 register 1 0x280 - 0x20 + 32 read-write 0x00000000 @@ -35340,10 +35340,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F8R2 - F8R2 + Filter bank 8 register 2 0x284 - 0x20 + 32 read-write 0x00000000 @@ -35543,10 +35543,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F9R1 - F9R1 + Filter bank 9 register 1 0x288 - 0x20 + 32 read-write 0x00000000 @@ -35746,10 +35746,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F9R2 - F9R2 + Filter bank 9 register 2 0x28c - 0x20 + 32 read-write 0x00000000 @@ -35949,10 +35949,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F10R1 - F10R1 + Filter bank 10 register 1 0x290 - 0x20 + 32 read-write 0x00000000 @@ -36152,10 +36152,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F10R2 - F10R2 + Filter bank 10 register 2 0x294 - 0x20 + 32 read-write 0x00000000 @@ -36355,10 +36355,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F11R1 - F11R1 + Filter bank 11 register 1 0x298 - 0x20 + 32 read-write 0x00000000 @@ -36558,10 +36558,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F11R2 - F11R2 + Filter bank 11 register 2 0x29c - 0x20 + 32 read-write 0x00000000 @@ -36761,10 +36761,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F12R1 - F12R1 + Filter bank 4 register 1 0x2a0 - 0x20 + 32 read-write 0x00000000 @@ -36964,10 +36964,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F12R2 - F12R2 + Filter bank 12 register 2 0x2a4 - 0x20 + 32 read-write 0x00000000 @@ -37167,10 +37167,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F13R1 - F13R1 + Filter bank 13 register 1 0x2a8 - 0x20 + 32 read-write 0x00000000 @@ -37370,10 +37370,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F13R2 - F13R2 + Filter bank 13 register 2 0x2ac - 0x20 + 32 read-write 0x00000000 @@ -37573,10 +37573,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F14R1 - F14R1 + Filter bank 14 register 1 0x2b0 - 0x20 + 32 read-write 0x00000000 @@ -37776,10 +37776,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F14R2 - F14R2 + Filter bank 14 register 2 0x2b4 - 0x20 + 32 read-write 0x00000000 @@ -37979,10 +37979,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F15R1 - F15R1 + Filter bank 15 register 1 0x2b8 - 0x20 + 32 read-write 0x00000000 @@ -38182,10 +38182,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F15R2 - F15R2 + Filter bank 15 register 2 0x2bc - 0x20 + 32 read-write 0x00000000 @@ -38385,10 +38385,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F16R1 - F16R1 + Filter bank 16 register 1 0x2c0 - 0x20 + 32 read-write 0x00000000 @@ -38588,10 +38588,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F16R2 - F16R2 + Filter bank 16 register 2 0x2c4 - 0x20 + 32 read-write 0x00000000 @@ -38791,10 +38791,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F17R1 - F17R1 + Filter bank 17 register 1 0x2c8 - 0x20 + 32 read-write 0x00000000 @@ -38994,10 +38994,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F17R2 - F17R2 + Filter bank 17 register 2 0x2cc - 0x20 + 32 read-write 0x00000000 @@ -39197,10 +39197,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F18R1 - F18R1 + Filter bank 18 register 1 0x2d0 - 0x20 + 32 read-write 0x00000000 @@ -39400,10 +39400,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F18R2 - F18R2 + Filter bank 18 register 2 0x2d4 - 0x20 + 32 read-write 0x00000000 @@ -39603,10 +39603,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F19R1 - F19R1 + Filter bank 19 register 1 0x2d8 - 0x20 + 32 read-write 0x00000000 @@ -39806,10 +39806,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F19R2 - F19R2 + Filter bank 19 register 2 0x2dc - 0x20 + 32 read-write 0x00000000 @@ -40009,10 +40009,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F20R1 - F20R1 + Filter bank 20 register 1 0x2e0 - 0x20 + 32 read-write 0x00000000 @@ -40212,10 +40212,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F20R2 - F20R2 + Filter bank 20 register 2 0x2e4 - 0x20 + 32 read-write 0x00000000 @@ -40415,10 +40415,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F21R1 - F21R1 + Filter bank 21 register 1 0x2e8 - 0x20 + 32 read-write 0x00000000 @@ -40618,10 +40618,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F21R2 - F21R2 + Filter bank 21 register 2 0x2ec - 0x20 + 32 read-write 0x00000000 @@ -40821,10 +40821,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F22R1 - F22R1 + Filter bank 22 register 1 0x2f0 - 0x20 + 32 read-write 0x00000000 @@ -41024,10 +41024,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F22R2 - F22R2 + Filter bank 22 register 2 0x2f4 - 0x20 + 32 read-write 0x00000000 @@ -41227,10 +41227,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F23R1 - F23R1 + Filter bank 23 register 1 0x2f8 - 0x20 + 32 read-write 0x00000000 @@ -41430,10 +41430,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F23R2 - F23R2 + Filter bank 23 register 2 0x2fc - 0x20 + 32 read-write 0x00000000 @@ -41633,10 +41633,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F24R1 - F24R1 + Filter bank 24 register 1 0x300 - 0x20 + 32 read-write 0x00000000 @@ -41836,10 +41836,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F24R2 - F24R2 + Filter bank 24 register 2 0x304 - 0x20 + 32 read-write 0x00000000 @@ -42039,10 +42039,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F25R1 - F25R1 + Filter bank 25 register 1 0x308 - 0x20 + 32 read-write 0x00000000 @@ -42242,10 +42242,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F25R2 - F25R2 + Filter bank 25 register 2 0x30c - 0x20 + 32 read-write 0x00000000 @@ -42445,10 +42445,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F26R1 - F26R1 + Filter bank 26 register 1 0x310 - 0x20 + 32 read-write 0x00000000 @@ -42648,10 +42648,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F26R2 - F26R2 + Filter bank 26 register 2 0x314 - 0x20 + 32 read-write 0x00000000 @@ -42851,10 +42851,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F27R1 - F27R1 + Filter bank 27 register 1 0x318 - 0x20 + 32 read-write 0x00000000 @@ -43054,10 +43054,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> F27R2 - F27R2 + Filter bank 27 register 2 0x31c - 0x20 + 32 read-write 0x00000000 @@ -43295,11 +43295,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICTR - ICTR + Interrupt Controller Type Register 0x4 - 0x20 + 32 read-only 0x00000000 @@ -43314,11 +43314,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> STIR - STIR + Software Triggered Interrupt Register 0xf00 - 0x20 + 32 write-only 0x00000000 @@ -43332,10 +43332,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISER0 - ISER0 + Interrupt Set-Enable Register 0x100 - 0x20 + 32 read-write 0x00000000 @@ -43349,10 +43349,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISER1 - ISER1 + Interrupt Set-Enable Register 0x104 - 0x20 + 32 read-write 0x00000000 @@ -43366,10 +43366,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISER2 - ISER2 + Interrupt Set-Enable Register 0x108 - 0x20 + 32 read-write 0x00000000 @@ -43383,11 +43383,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICER0 - ICER0 + Interrupt Clear-Enable Register 0x180 - 0x20 + 32 read-write 0x00000000 @@ -43401,11 +43401,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICER1 - ICER1 + Interrupt Clear-Enable Register 0x184 - 0x20 + 32 read-write 0x00000000 @@ -43419,11 +43419,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICER2 - ICER2 + Interrupt Clear-Enable Register 0x188 - 0x20 + 32 read-write 0x00000000 @@ -43437,10 +43437,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISPR0 - ISPR0 + Interrupt Set-Pending Register 0x200 - 0x20 + 32 read-write 0x00000000 @@ -43454,10 +43454,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISPR1 - ISPR1 + Interrupt Set-Pending Register 0x204 - 0x20 + 32 read-write 0x00000000 @@ -43471,10 +43471,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISPR2 - ISPR2 + Interrupt Set-Pending Register 0x208 - 0x20 + 32 read-write 0x00000000 @@ -43488,11 +43488,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICPR0 - ICPR0 + Interrupt Clear-Pending Register 0x280 - 0x20 + 32 read-write 0x00000000 @@ -43506,11 +43506,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICPR1 - ICPR1 + Interrupt Clear-Pending Register 0x284 - 0x20 + 32 read-write 0x00000000 @@ -43524,11 +43524,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICPR2 - ICPR2 + Interrupt Clear-Pending Register 0x288 - 0x20 + 32 read-write 0x00000000 @@ -43542,10 +43542,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IABR0 - IABR0 + Interrupt Active Bit Register 0x300 - 0x20 + 32 read-only 0x00000000 @@ -43559,10 +43559,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IABR1 - IABR1 + Interrupt Active Bit Register 0x304 - 0x20 + 32 read-only 0x00000000 @@ -43576,10 +43576,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IABR2 - IABR2 + Interrupt Active Bit Register 0x308 - 0x20 + 32 read-only 0x00000000 @@ -43593,10 +43593,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR0 - IPR0 + Interrupt Priority Register 0x400 - 0x20 + 32 read-write 0x00000000 @@ -43628,10 +43628,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR1 - IPR1 + Interrupt Priority Register 0x404 - 0x20 + 32 read-write 0x00000000 @@ -43663,10 +43663,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR2 - IPR2 + Interrupt Priority Register 0x408 - 0x20 + 32 read-write 0x00000000 @@ -43698,10 +43698,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR3 - IPR3 + Interrupt Priority Register 0x40c - 0x20 + 32 read-write 0x00000000 @@ -43733,10 +43733,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR4 - IPR4 + Interrupt Priority Register 0x410 - 0x20 + 32 read-write 0x00000000 @@ -43768,10 +43768,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR5 - IPR5 + Interrupt Priority Register 0x414 - 0x20 + 32 read-write 0x00000000 @@ -43803,10 +43803,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR6 - IPR6 + Interrupt Priority Register 0x418 - 0x20 + 32 read-write 0x00000000 @@ -43838,10 +43838,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR7 - IPR7 + Interrupt Priority Register 0x41c - 0x20 + 32 read-write 0x00000000 @@ -43873,10 +43873,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR8 - IPR8 + Interrupt Priority Register 0x420 - 0x20 + 32 read-write 0x00000000 @@ -43908,10 +43908,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR9 - IPR9 + Interrupt Priority Register 0x424 - 0x20 + 32 read-write 0x00000000 @@ -43943,10 +43943,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR10 - IPR10 + Interrupt Priority Register 0x428 - 0x20 + 32 read-write 0x00000000 @@ -43978,10 +43978,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR11 - IPR11 + Interrupt Priority Register 0x42c - 0x20 + 32 read-write 0x00000000 @@ -44013,10 +44013,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR12 - IPR12 + Interrupt Priority Register 0x430 - 0x20 + 32 read-write 0x00000000 @@ -44048,10 +44048,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR13 - IPR13 + Interrupt Priority Register 0x434 - 0x20 + 32 read-write 0x00000000 @@ -44083,10 +44083,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR14 - IPR14 + Interrupt Priority Register 0x438 - 0x20 + 32 read-write 0x00000000 @@ -44118,10 +44118,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR15 - IPR15 + Interrupt Priority Register 0x43c - 0x20 + 32 read-write 0x00000000 @@ -44153,10 +44153,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR16 - IPR16 + Interrupt Priority Register 0x440 - 0x20 + 32 read-write 0x00000000 @@ -44188,10 +44188,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR17 - IPR17 + Interrupt Priority Register 0x444 - 0x20 + 32 read-write 0x00000000 @@ -44223,10 +44223,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR18 - IPR18 + Interrupt Priority Register 0x448 - 0x20 + 32 read-write 0x00000000 @@ -44258,10 +44258,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR19 - IPR19 + Interrupt Priority Register 0x44c - 0x20 + 32 read-write 0x00000000 @@ -44293,10 +44293,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IPR20 - IPR20 + Interrupt Priority Register 0x450 - 0x20 + 32 read-write 0x00000000 @@ -44346,10 +44346,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ACR - ACR + Flash access control register 0x0 - 0x20 + 32 0x00000000 @@ -44398,10 +44398,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> KEYR - KEYR + Flash key register 0x4 - 0x20 + 32 write-only 0x00000000 @@ -44415,10 +44415,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OPTKEYR - OPTKEYR + Flash option key register 0x8 - 0x20 + 32 write-only 0x00000000 @@ -44432,10 +44432,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SR - SR + Status register 0xc - 0x20 + 32 0x00000000 @@ -44493,10 +44493,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + Control register 0x10 - 0x20 + 32 read-write 0x80000000 @@ -44567,10 +44567,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OPTCR - OPTCR + Flash option control register 0x14 - 0x20 + 32 read-write 0x0fffaaed @@ -44628,11 +44628,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OPTCR1 - OPTCR1 + Flash option control register 1 0x18 - 0x20 + 32 read-write 0x0fff0000 @@ -44701,11 +44701,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IMR - IMR + Interrupt mask register (EXTI_IMR) 0x0 - 0x20 + 32 read-write 0x00000000 @@ -44851,10 +44851,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> EMR - EMR + Event mask register (EXTI_EMR) 0x4 - 0x20 + 32 read-write 0x00000000 @@ -45000,11 +45000,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> RTSR - RTSR + Rising Trigger selection register (EXTI_RTSR) 0x8 - 0x20 + 32 read-write 0x00000000 @@ -45173,11 +45173,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FTSR - FTSR + Falling Trigger selection register (EXTI_FTSR) 0xc - 0x20 + 32 read-write 0x00000000 @@ -45346,11 +45346,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SWIER - SWIER + Software interrupt event register (EXTI_SWIER) 0x10 - 0x20 + 32 read-write 0x00000000 @@ -45519,10 +45519,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> PR - PR + Pending register (EXTI_PR) 0x14 - 0x20 + 32 read-write 0x00000000 @@ -54817,11 +54817,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SSCR - SSCR + Synchronization Size Configuration Register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -54843,11 +54843,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BPCR - BPCR + Back Porch Configuration Register 0xc - 0x20 + 32 read-write 0x00000000 @@ -54869,11 +54869,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AWCR - AWCR + Active Width Configuration Register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -54894,11 +54894,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> TWCR - TWCR + Total Width Configuration Register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -54920,10 +54920,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> GCR - GCR + Global Control Register 0x18 - 0x20 + 32 0x00002220 @@ -54996,11 +54996,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> SRCR - SRCR + Shadow Reload Configuration Register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -55020,11 +55020,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCCR - BCCR + Background Color Configuration Register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -55038,10 +55038,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IER - IER + Interrupt Enable Register 0x34 - 0x20 + 32 read-write 0x00000000 @@ -55076,10 +55076,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISR - ISR + Interrupt Status Register 0x38 - 0x20 + 32 read-only 0x00000000 @@ -55114,10 +55114,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ICR - ICR + Interrupt Clear Register 0x3c - 0x20 + 32 write-only 0x00000000 @@ -55153,11 +55153,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LIPCR - LIPCR + Line Interrupt Position Configuration Register 0x40 - 0x20 + 32 read-write 0x00000000 @@ -55171,11 +55171,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CPSR - CPSR + Current Position Status Register 0x44 - 0x20 + 32 read-only 0x00000000 @@ -55195,11 +55195,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CDSR - CDSR + Current Display Status Register 0x48 - 0x20 + 32 read-only 0x0000000f @@ -55235,10 +55235,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CR - L1CR + Layerx Control Register 0x84 - 0x20 + 32 read-write 0x00000000 @@ -55264,11 +55264,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1WHPCR - L1WHPCR + Layerx Window Horizontal Position Configuration Register 0x88 - 0x20 + 32 read-write 0x00000000 @@ -55290,11 +55290,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1WVPCR - L1WVPCR + Layerx Window Vertical Position Configuration Register 0x8c - 0x20 + 32 read-write 0x00000000 @@ -55316,11 +55316,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CKCR - L1CKCR + Layerx Color Keying Configuration Register 0x90 - 0x20 + 32 read-write 0x00000000 @@ -55346,11 +55346,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1PFCR - L1PFCR + Layerx Pixel Format Configuration Register 0x94 - 0x20 + 32 read-write 0x00000000 @@ -55364,11 +55364,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CACR - L1CACR + Layerx Constant Alpha Configuration Register 0x98 - 0x20 + 32 read-write 0x00000000 @@ -55382,11 +55382,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1DCCR - L1DCCR + Layerx Default Color Configuration Register 0x9c - 0x20 + 32 read-write 0x00000000 @@ -55418,11 +55418,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1BFCR - L1BFCR + Layerx Blending Factors Configuration Register 0xa0 - 0x20 + 32 read-write 0x00000607 @@ -55442,11 +55442,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CFBAR - L1CFBAR + Layerx Color Frame Buffer Address Register 0xac - 0x20 + 32 read-write 0x00000000 @@ -55461,11 +55461,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CFBLR - L1CFBLR + Layerx Color Frame Buffer Length Register 0xb0 - 0x20 + 32 read-write 0x00000000 @@ -55487,11 +55487,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CFBLNR - L1CFBLNR + Layerx ColorFrame Buffer Line Number Register 0xb4 - 0x20 + 32 read-write 0x00000000 @@ -55505,10 +55505,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L1CLUTWR - L1CLUTWR + Layerx CLUT Write Register 0xc4 - 0x20 + 32 write-only 0x00000000 @@ -55540,10 +55540,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2CR - L2CR + Layerx Control Register 0x104 - 0x20 + 32 read-write 0x00000000 @@ -55569,11 +55569,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2WHPCR - L2WHPCR + Layerx Window Horizontal Position Configuration Register 0x108 - 0x20 + 32 read-write 0x00000000 @@ -55595,11 +55595,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2WVPCR - L2WVPCR + Layerx Window Vertical Position Configuration Register 0x10c - 0x20 + 32 read-write 0x00000000 @@ -55621,11 +55621,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2CKCR - L2CKCR + Layerx Color Keying Configuration Register 0x110 - 0x20 + 32 read-write 0x00000000 @@ -55651,11 +55651,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2PFCR - L2PFCR + Layerx Pixel Format Configuration Register 0x114 - 0x20 + 32 read-write 0x00000000 @@ -55669,11 +55669,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2CACR - L2CACR + Layerx Constant Alpha Configuration Register 0x118 - 0x20 + 32 read-write 0x00000000 @@ -55687,11 +55687,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2DCCR - L2DCCR + Layerx Default Color Configuration Register 0x11c - 0x20 + 32 read-write 0x00000000 @@ -55723,11 +55723,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2BFCR - L2BFCR + Layerx Blending Factors Configuration Register 0x120 - 0x20 + 32 read-write 0x00000607 @@ -55747,11 +55747,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2CFBAR - L2CFBAR + Layerx Color Frame Buffer Address Register 0x12c - 0x20 + 32 read-write 0x00000000 @@ -55766,11 +55766,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2CFBLR - L2CFBLR + Layerx Color Frame Buffer Length Register 0x130 - 0x20 + 32 read-write 0x00000000 @@ -55792,11 +55792,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2CFBLNR - L2CFBLNR + Layerx ColorFrame Buffer Line Number Register 0x134 - 0x20 + 32 read-write 0x00000000 @@ -55810,10 +55810,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> L2CLUTWR - L2CLUTWR + Layerx CLUT Write Register 0x144 - 0x20 + 32 write-only 0x00000000 @@ -55863,10 +55863,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCR1 - BCR1 + BConfiguration register 1 0x24 - 0x20 + 32 read-write 0x00000040 @@ -55947,10 +55947,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCR2 - BCR2 + BConfiguration register 2 0x28 - 0x20 + 32 read-write 0x00000000 @@ -56007,10 +56007,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BFRCR - BFRCR + BFRCR 0x2c - 0x20 + 32 read-write 0x00000007 @@ -56052,10 +56052,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BSLOTR - BSLOTR + BSlot register 0x30 - 0x20 + 32 read-write 0x00000000 @@ -56088,10 +56088,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BIM - BIM + BInterrupt mask register2 0x34 - 0x20 + 32 read-write 0x00000000 @@ -56148,10 +56148,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BSR - BSR + BStatus register 0x38 - 0x20 + 32 read-only 0x00000000 @@ -56210,10 +56210,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BCLRFR - BCLRFR + BClear flag register 0x3c - 0x20 + 32 write-only 0x00000000 @@ -56260,10 +56260,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BDR - BDR + BData register 0x40 - 0x20 + 32 read-write 0x00000000 @@ -56277,10 +56277,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ACR1 - ACR1 + AConfiguration register 1 0x4 - 0x20 + 32 read-write 0x00000040 @@ -56361,10 +56361,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ACR2 - ACR2 + AConfiguration register 2 0x8 - 0x20 + 32 read-write 0x00000000 @@ -56421,10 +56421,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AFRCR - AFRCR + AFRCR 0xc - 0x20 + 32 read-write 0x00000007 @@ -56466,10 +56466,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ASLOTR - ASLOTR + ASlot register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -56502,10 +56502,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AIM - AIM + AInterrupt mask register2 0x14 - 0x20 + 32 read-write 0x00000000 @@ -56562,10 +56562,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ASR - ASR + AStatus register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -56624,10 +56624,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ACLRFR - ACLRFR + AClear flag register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -56674,10 +56674,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ADR - ADR + AData register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -56709,10 +56709,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + control register 0x0 - 0x20 + 32 read-write 0x00000000 @@ -56786,10 +56786,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> ISR - ISR + Interrupt Status Register 0x4 - 0x20 + 32 read-only 0x00000000 @@ -56839,10 +56839,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> IFCR - IFCR + interrupt flag clear register 0x8 - 0x20 + 32 read-write 0x00000000 @@ -56892,11 +56892,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGMAR - FGMAR + foreground memory address register 0xc - 0x20 + 32 read-write 0x00000000 @@ -56910,10 +56910,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGOR - FGOR + foreground offset register 0x10 - 0x20 + 32 read-write 0x00000000 @@ -56927,11 +56927,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BGMAR - BGMAR + background memory address register 0x14 - 0x20 + 32 read-write 0x00000000 @@ -56945,10 +56945,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BGOR - BGOR + background offset register 0x18 - 0x20 + 32 read-write 0x00000000 @@ -56962,11 +56962,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGPFCCR - FGPFCCR + foreground PFC control register 0x1c - 0x20 + 32 read-write 0x00000000 @@ -57010,10 +57010,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGCOLR - FGCOLR + foreground color register 0x20 - 0x20 + 32 read-write 0x00000000 @@ -57039,11 +57039,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BGPFCCR - BGPFCCR + background PFC control register 0x24 - 0x20 + 32 read-write 0x00000000 @@ -57087,10 +57087,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BGCOLR - BGCOLR + background color register 0x28 - 0x20 + 32 read-write 0x00000000 @@ -57116,11 +57116,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGCMAR - FGCMAR + foreground CLUT memory address register 0x2c - 0x20 + 32 read-write 0x00000000 @@ -57134,11 +57134,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BGCMAR - BGCMAR + background CLUT memory address register 0x30 - 0x20 + 32 read-write 0x00000000 @@ -57152,10 +57152,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OPFCCR - OPFCCR + output PFC control register 0x34 - 0x20 + 32 read-write 0x00000000 @@ -57169,10 +57169,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OCOLR - OCOLR + output color register 0x38 - 0x20 + 32 read-write 0x00000000 @@ -57204,10 +57204,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OMAR - OMAR + output memory address register 0x3c - 0x20 + 32 read-write 0x00000000 @@ -57221,10 +57221,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> OOR - OOR + output offset register 0x40 - 0x20 + 32 read-write 0x00000000 @@ -57238,10 +57238,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> NLR - NLR + number of line register 0x44 - 0x20 + 32 read-write 0x00000000 @@ -57261,10 +57261,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> LWR - LWR + line watermark register 0x48 - 0x20 + 32 read-write 0x00000000 @@ -57278,11 +57278,11 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> AMTCR - AMTCR + AHB master timer configuration register 0x4c - 0x20 + 32 read-write 0x00000000 @@ -57302,10 +57302,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> FGCLUT - FGCLUT + FGCLUT 0x400 - 0x20 + 32 read-write 0x00000000 @@ -57337,10 +57337,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> BGCLUT - BGCLUT + BGCLUT 0x800 - 0x20 + 32 read-write 0x00000000 @@ -57391,10 +57391,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CR - CR + power control register 0x0 - 0x20 + 32 read-write 0x0000c000 @@ -57500,10 +57500,10 @@ xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd"> CSR - CSR + power control/status register 0x4 - 0x20 + 32 0x00000000 diff --git a/normalise.sh b/normalise.sh new file mode 100755 index 00000000..ec7c83ad --- /dev/null +++ b/normalise.sh @@ -0,0 +1,21 @@ +#!/bin/bash + +#End to end tests require some normalisation of files to correct for varying formatting by vendors (because the output format is static). + +# Normalise hexadecimal case: +gsed -i 's|\(0x[0-9a-fA-F]*\)|\L\1|g' $1 + +# Normalise hexadecimal lengths +gsed -i 's|>0x[0]\{1,2\}\([0-9a-f]\{1,2\}\)<|>0x\1<|g' $1 + +# Swap ST resets to full register width +gsed -i 's|0x00|0x00000000|g' $1 + +# Swap register sizes from hex to dec +gsed -i 's|0x20|32|g' $1 + +# Remove displayName props because we don't care +gsed -i 's|\(\s*[a-zA-Z0-9]*[\r\n]*\)||g' $1 + +# Remove empty descriptions +gsed -i 's|||g' $1 \ No newline at end of file diff --git a/src/peripheral.rs b/src/peripheral.rs index a78af226..b997966c 100644 --- a/src/peripheral.rs +++ b/src/peripheral.rs @@ -135,6 +135,12 @@ impl EncodeElem for Peripheral { None => (), }; + match self.derived_from { + Some(ref v) => { + elem.attributes.insert(String::from("derivedFrom"), format!("{}", v)); + }, None => (), + } + elem } } From 268dea2c14dec968260947fa1a86b41d42a7b2c7 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Tue, 12 Sep 2017 17:49:54 +1200 Subject: [PATCH 21/25] Removed examples from repo, should drop LOC lots --- examples/.keep | 0 examples/EFM32PG1B200F256GM48.svd | 65986 ------------------------ examples/STM32F429x.svd | 57586 --------------------- normalise.sh => examples/normalise.sh | 0 4 files changed, 123572 deletions(-) create mode 100644 examples/.keep delete mode 100644 examples/EFM32PG1B200F256GM48.svd delete mode 100644 examples/STM32F429x.svd rename normalise.sh => examples/normalise.sh (100%) diff --git a/examples/.keep b/examples/.keep new file mode 100644 index 00000000..e69de29b diff --git a/examples/EFM32PG1B200F256GM48.svd b/examples/EFM32PG1B200F256GM48.svd deleted file mode 100644 index 0909afc8..00000000 --- a/examples/EFM32PG1B200F256GM48.svd +++ /dev/null @@ -1,65986 +0,0 @@ - - - EFM32PG1B200F256GM48 - 4.2.0 - Silicon Labs EFM32PG1B200F256GM48 Cortex-M MCU - 8 - 32 - - - MSC - 1.6 - MSC - 0x400e0000 - - 0 - 0x00000800 - registers - - - MSC - 24 - - - - CTRL - Memory System Control Register - 0x0 - 32 - read-write - 0x00000001 - 0x0000000f - - - ADDRFAULTEN - Invalid Address Bus Fault Response Enable - 0 - 1 - read-write - - - CLKDISFAULTEN - Clock-disabled Bus Fault Response Enable - 1 - 1 - read-write - - - PWRUPONDEMAND - Power Up On Demand During Wake Up - 2 - 1 - read-write - - - IFCREADCLEAR - IFC Read Clears IF - 3 - 1 - read-write - - - - - READCTRL - Read Control Register - 0x4 - 32 - read-write - 0x01000100 - 0x13000338 - - - IFCDIS - Internal Flash Cache Disable - 3 - 1 - read-write - - - AIDIS - Automatic Invalidate Disable - 4 - 1 - read-write - - - ICCDIS - Interrupt Context Cache Disable - 5 - 1 - read-write - - - PREFETCH - Prefetch Mode - 8 - 1 - read-write - - - USEHPROT - AHB_HPROT Mode - 9 - 1 - read-write - - - MODE - Read Mode - 24 - 2 - read-write - - - WS0 - Zero wait-states inserted in fetch or read transfers - 0x00000000 - - - WS1 - One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details - 0x00000001 - - - - - SCBTP - Suppress Conditional Branch Target Perfetch - 28 - 1 - read-write - - - - - WRITECTRL - Write Control Register - 0x8 - 32 - read-write - 0x00000000 - 0x00000003 - - - WREN - Enable Write/Erase Controller - 0 - 1 - read-write - - - IRQERASEABORT - Abort Page Erase on Interrupt - 1 - 1 - read-write - - - - - WRITECMD - Write Command Register - 0xc - 32 - write-only - 0x00000000 - 0x0000113f - - - LADDRIM - Load MSC_ADDRB into ADDR - 0 - 1 - write-only - - - ERASEPAGE - Erase Page - 1 - 1 - write-only - - - WRITEEND - End Write Mode - 2 - 1 - write-only - - - WRITEONCE - Word Write-Once Trigger - 3 - 1 - write-only - - - WRITETRIG - Word Write Sequence Trigger - 4 - 1 - write-only - - - ERASEABORT - Abort erase sequence - 5 - 1 - write-only - - - ERASEMAIN0 - Mass erase region 0 - 8 - 1 - write-only - - - CLEARWDATA - Clear WDATA state - 12 - 1 - write-only - - - - - ADDRB - Page Erase/Write Address Buffer - 0x10 - 32 - read-write - 0x00000000 - 0xffffffff - - - ADDRB - Page Erase or Write Address Buffer - 0 - 32 - read-write - - - - - WDATA - Write Data Register - 0x18 - 32 - read-write - 0x00000000 - 0xffffffff - - - WDATA - Write Data - 0 - 32 - read-write - - - - - STATUS - Status Register - 0x1c - 32 - read-only - 0x00000008 - 0x0000007f - - - BUSY - Erase/Write Busy - 0 - 1 - read-only - - - LOCKED - Access Locked - 1 - 1 - read-only - - - INVADDR - Invalid Write Address or Erase Page - 2 - 1 - read-only - - - WDATAREADY - WDATA Write Ready - 3 - 1 - read-only - - - WORDTIMEOUT - Flash Write Word Timeout - 4 - 1 - read-only - - - ERASEABORTED - The Current Flash Erase Operation Aborted - 5 - 1 - read-only - - - PCRUNNING - Performance Counters Running - 6 - 1 - read-only - - - - - IF - Interrupt Flag Register - 0x30 - 32 - read-only - 0x00000000 - 0x0000003f - - - ERASE - Erase Done Interrupt Read Flag - 0 - 1 - read-only - - - WRITE - Write Done Interrupt Read Flag - 1 - 1 - read-only - - - CHOF - Cache Hits Overflow Interrupt Flag - 2 - 1 - read-only - - - CMOF - Cache Misses Overflow Interrupt Flag - 3 - 1 - read-only - - - PWRUPF - Flash Power Up Sequence Complete Flag - 4 - 1 - read-only - - - ICACHERR - iCache RAM Parity Error Flag - 5 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x34 - 32 - write-only - 0x00000000 - 0x0000003f - - - ERASE - Set ERASE Interrupt Flag - 0 - 1 - write-only - - - WRITE - Set WRITE Interrupt Flag - 1 - 1 - write-only - - - CHOF - Set CHOF Interrupt Flag - 2 - 1 - write-only - - - CMOF - Set CMOF Interrupt Flag - 3 - 1 - write-only - - - PWRUPF - Set PWRUPF Interrupt Flag - 4 - 1 - write-only - - - ICACHERR - Set ICACHERR Interrupt Flag - 5 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x38 - 32 - write-only - 0x00000000 - 0x0000003f - - - ERASE - Clear ERASE Interrupt Flag - 0 - 1 - write-only - - - WRITE - Clear WRITE Interrupt Flag - 1 - 1 - write-only - - - CHOF - Clear CHOF Interrupt Flag - 2 - 1 - write-only - - - CMOF - Clear CMOF Interrupt Flag - 3 - 1 - write-only - - - PWRUPF - Clear PWRUPF Interrupt Flag - 4 - 1 - write-only - - - ICACHERR - Clear ICACHERR Interrupt Flag - 5 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x3c - 32 - read-write - 0x00000000 - 0x0000003f - - - ERASE - ERASE Interrupt Enable - 0 - 1 - read-write - - - WRITE - WRITE Interrupt Enable - 1 - 1 - read-write - - - CHOF - CHOF Interrupt Enable - 2 - 1 - read-write - - - CMOF - CMOF Interrupt Enable - 3 - 1 - read-write - - - PWRUPF - PWRUPF Interrupt Enable - 4 - 1 - read-write - - - ICACHERR - ICACHERR Interrupt Enable - 5 - 1 - read-write - - - - - LOCK - Configuration Lock Register - 0x40 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - Configuration Lock - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - CACHECMD - Flash Cache Command Register - 0x44 - 32 - write-only - 0x00000000 - 0x00000007 - - - INVCACHE - Invalidate Instruction Cache - 0 - 1 - write-only - - - STARTPC - Start Performance Counters - 1 - 1 - write-only - - - STOPPC - Stop Performance Counters - 2 - 1 - write-only - - - - - CACHEHITS - Cache Hits Performance Counter - 0x48 - 32 - read-only - 0x00000000 - 0x000fffff - - - CACHEHITS - Cache hits since last performance counter start command. - 0 - 20 - read-only - - - - - CACHEMISSES - Cache Misses Performance Counter - 0x4c - 32 - read-only - 0x00000000 - 0x000fffff - - - CACHEMISSES - Cache misses since last performance counter start command. - 0 - 20 - read-only - - - - - MASSLOCK - Mass Erase Lock Register - 0x54 - 32 - read-write - 0x00000001 - 0x0000ffff - - - LOCKKEY - Mass Erase Lock - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - STARTUP - Startup Control - 0x5c - 32 - read-write - 0x1300104d - 0x773ff3ff - - - STDLY0 - Startup Delay 0 - 0 - 10 - read-write - - - STDLY1 - Startup Delay 0 - 12 - 10 - read-write - - - ASTWAIT - Active Startup Wait - 24 - 1 - read-write - - - STWSEN - Startup Waitstates Enable - 25 - 1 - read-write - - - STWSAEN - Startup Waitstates Always Enable - 26 - 1 - read-write - - - STWS - Startup Waitstates - 28 - 3 - read-write - - - - - CMD - Command Register - 0x74 - 32 - write-only - 0x00000000 - 0x00000001 - - - PWRUP - Flash Power Up Command - 0 - 1 - write-only - - - - - - - EMU - 1.6 - EMU - 0x400e3000 - - 0 - 0x00000400 - registers - - - EMU - 0 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x00000002 - - - EM2BLOCK - Energy Mode 2 Block - 1 - 1 - read-write - - - - - STATUS - Status Register - 0x4 - 32 - read-only - 0x00000000 - 0x0010011f - - - VMONRDY - VMON ready - 0 - 1 - read-only - - - VMONAVDD - VMON AVDD Channel. - 1 - 1 - read-only - - - VMONALTAVDD - Alternate VMON AVDD Channel. - 2 - 1 - read-only - - - VMONDVDD - VMON DVDD Channel. - 3 - 1 - read-only - - - VMONIO0 - VMON IOVDD0 Channel. - 4 - 1 - read-only - - - VMONFVDD - VMON VDDFLASH Channel. - 8 - 1 - read-only - - - EM4IORET - IO Retention Status - 20 - 1 - read-only - - - - - LOCK - Configuration Lock Register - 0x8 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - Configuration Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - RAM0CTRL - Memory Control Register - 0xc - 32 - read-write - 0x00000000 - 0x0000000f - - - RAMPOWERDOWN - RAM0 blockset power-down - 0 - 4 - read-write - - - NONE - None of the RAM blocks powered down - 0x00000000 - - - BLK4 - Power down RAM blocks 4 and above (address range 0x20006000-0x20007bff) - 0x00000008 - - - BLK3TO4 - Power down RAM blocks 3 and above (address range 0x20004000-0x20007bff) - 0x0000000c - - - BLK2TO4 - Power down RAM blocks 2 and above (address range 0x20002000-0x20007bff) - 0x0000000e - - - BLK1TO4 - Power down RAM blocks 1 and above (address range 0x20001000-0x20007bff) - 0x0000000f - - - - - - - CMD - Command Register - 0x10 - 32 - write-only - 0x00000000 - 0x00000001 - - - EM4UNLATCH - EM4 Unlatch - 0 - 1 - write-only - - - - - PERACTCONF - Peripheral to Peripheral Activation Clock Configuration - 0x14 - 32 - read-write - 0x00000000 - 0x00000001 - - - RACPER - Enable PER clock when RAC is activated - 0 - 1 - read-write - - - - - EM4CTRL - EM4 Control Register - 0x18 - 32 - read-write - 0x00000000 - 0x0003003f - - - EM4STATE - Energy Mode 4 State - 0 - 1 - read-write - - - RETAINLFRCO - LFRCO Retain during EM4 - 1 - 1 - read-write - - - RETAINLFXO - LFXO Retain during EM4 - 2 - 1 - read-write - - - RETAINULFRCO - ULFRCO Retain during EM4S - 3 - 1 - read-write - - - EM4IORETMODE - EM4 IO Retention Disable - 4 - 2 - read-write - - - DISABLE - No Retention: Pads enter reset state when entering EM4 - 0x00000000 - - - EM4EXIT - Retention through EM4: Pads enter reset state when exiting EM4 - 0x00000001 - - - SWUNLATCH - Retention through EM4 and Wakeup: software writes UNLATCH register to remove retention - 0x00000002 - - - - - EM4ENTRY - Energy Mode 4 Entry - 16 - 2 - write-only - - - - - TEMPLIMITS - Temperature limits for interrupt generation - 0x1c - 32 - read-write - 0x0000ff00 - 0x0001ffff - - - TEMPLOW - Temperature Low Limit - 0 - 8 - read-write - - - TEMPHIGH - Temperature High Limit - 8 - 8 - read-write - - - EM4WUEN - Enable EM4 Wakeup due to low/high temerature - 16 - 1 - read-write - - - - - TEMP - Value of last temperature measurement - 0x20 - 32 - read-only - 0x00000000 - 0x000000ff - - - TEMP - Temperature Measurement - 0 - 8 - read-only - - - - - IF - Interrupt Flag Register - 0x24 - 32 - read-only - 0x00000000 - 0xe11fc0ff - - - VMONAVDDFALL - VMON AVDD Channel Fall - 0 - 1 - read-only - - - VMONAVDDRISE - VMON AVDD Channel Rise - 1 - 1 - read-only - - - VMONALTAVDDFALL - Alternate VMON AVDD Channel Fall - 2 - 1 - read-only - - - VMONALTAVDDRISE - Alternate VMON AVDD Channel Rise - 3 - 1 - read-only - - - VMONDVDDFALL - VMON DVDD Channel Fall - 4 - 1 - read-only - - - VMONDVDDRISE - VMON DVDD Channel Rise - 5 - 1 - read-only - - - VMONIO0FALL - VMON IOVDD0 Channel Fall - 6 - 1 - read-only - - - VMONIO0RISE - VMON IOVDD0 Channel Rise - 7 - 1 - read-only - - - VMONFVDDFALL - VMON VDDFLASH Channel Fall - 14 - 1 - read-only - - - VMONFVDDRISE - VMON VDDFLASH Channel Rise - 15 - 1 - read-only - - - PFETOVERCURRENTLIMIT - PFET current limit hit - 16 - 1 - read-only - - - NFETOVERCURRENTLIMIT - NFET current limit hit - 17 - 1 - read-only - - - DCDCLPRUNNING - LP mode is running - 18 - 1 - read-only - - - DCDCLNRUNNING - LN mode is running - 19 - 1 - read-only - - - DCDCINBYPASS - DCDC is in bypass - 20 - 1 - read-only - - - EM23WAKEUP - Wakeup IRQ from EM2 and EM3 - 24 - 1 - read-only - - - TEMP - New Temperature Measurement Valid - 29 - 1 - read-only - - - TEMPLOW - Temperature Low Limit Reached - 30 - 1 - read-only - - - TEMPHIGH - Temperature High Limit Reached - 31 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x28 - 32 - write-only - 0x00000000 - 0xe11ff0ff - - - VMONAVDDFALL - Set VMONAVDDFALL Interrupt Flag - 0 - 1 - write-only - - - VMONAVDDRISE - Set VMONAVDDRISE Interrupt Flag - 1 - 1 - write-only - - - VMONALTAVDDFALL - Set VMONALTAVDDFALL Interrupt Flag - 2 - 1 - write-only - - - VMONALTAVDDRISE - Set VMONALTAVDDRISE Interrupt Flag - 3 - 1 - write-only - - - VMONDVDDFALL - Set VMONDVDDFALL Interrupt Flag - 4 - 1 - write-only - - - VMONDVDDRISE - Set VMONDVDDRISE Interrupt Flag - 5 - 1 - write-only - - - VMONIO0FALL - Set VMONIO0FALL Interrupt Flag - 6 - 1 - write-only - - - VMONIO0RISE - Set VMONIO0RISE Interrupt Flag - 7 - 1 - write-only - - - VMONPAVDDFALL - Set VMONPAVDDFALL Interrupt Flag - 12 - 1 - write-only - - - VMONPAVDDRISE - Set VMONPAVDDRISE Interrupt Flag - 13 - 1 - write-only - - - VMONFVDDFALL - Set VMONFVDDFALL Interrupt Flag - 14 - 1 - write-only - - - VMONFVDDRISE - Set VMONFVDDRISE Interrupt Flag - 15 - 1 - write-only - - - PFETOVERCURRENTLIMIT - Set PFETOVERCURRENTLIMIT Interrupt Flag - 16 - 1 - write-only - - - NFETOVERCURRENTLIMIT - Set NFETOVERCURRENTLIMIT Interrupt Flag - 17 - 1 - write-only - - - DCDCLPRUNNING - Set DCDCLPRUNNING Interrupt Flag - 18 - 1 - write-only - - - DCDCLNRUNNING - Set DCDCLNRUNNING Interrupt Flag - 19 - 1 - write-only - - - DCDCINBYPASS - Set DCDCINBYPASS Interrupt Flag - 20 - 1 - write-only - - - EM23WAKEUP - Set EM23WAKEUP Interrupt Flag - 24 - 1 - write-only - - - TEMP - Set TEMP Interrupt Flag - 29 - 1 - write-only - - - TEMPLOW - Set TEMPLOW Interrupt Flag - 30 - 1 - write-only - - - TEMPHIGH - Set TEMPHIGH Interrupt Flag - 31 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x2c - 32 - write-only - 0x00000000 - 0xe11ff0ff - - - VMONAVDDFALL - Clear VMONAVDDFALL Interrupt Flag - 0 - 1 - write-only - - - VMONAVDDRISE - Clear VMONAVDDRISE Interrupt Flag - 1 - 1 - write-only - - - VMONALTAVDDFALL - Clear VMONALTAVDDFALL Interrupt Flag - 2 - 1 - write-only - - - VMONALTAVDDRISE - Clear VMONALTAVDDRISE Interrupt Flag - 3 - 1 - write-only - - - VMONDVDDFALL - Clear VMONDVDDFALL Interrupt Flag - 4 - 1 - write-only - - - VMONDVDDRISE - Clear VMONDVDDRISE Interrupt Flag - 5 - 1 - write-only - - - VMONIO0FALL - Clear VMONIO0FALL Interrupt Flag - 6 - 1 - write-only - - - VMONIO0RISE - Clear VMONIO0RISE Interrupt Flag - 7 - 1 - write-only - - - VMONPAVDDFALL - Clear VMONPAVDDFALL Interrupt Flag - 12 - 1 - write-only - - - VMONPAVDDRISE - Clear VMONPAVDDRISE Interrupt Flag - 13 - 1 - write-only - - - VMONFVDDFALL - Clear VMONFVDDFALL Interrupt Flag - 14 - 1 - write-only - - - VMONFVDDRISE - Clear VMONFVDDRISE Interrupt Flag - 15 - 1 - write-only - - - PFETOVERCURRENTLIMIT - Clear PFETOVERCURRENTLIMIT Interrupt Flag - 16 - 1 - write-only - - - NFETOVERCURRENTLIMIT - Clear NFETOVERCURRENTLIMIT Interrupt Flag - 17 - 1 - write-only - - - DCDCLPRUNNING - Clear DCDCLPRUNNING Interrupt Flag - 18 - 1 - write-only - - - DCDCLNRUNNING - Clear DCDCLNRUNNING Interrupt Flag - 19 - 1 - write-only - - - DCDCINBYPASS - Clear DCDCINBYPASS Interrupt Flag - 20 - 1 - write-only - - - EM23WAKEUP - Clear EM23WAKEUP Interrupt Flag - 24 - 1 - write-only - - - TEMP - Clear TEMP Interrupt Flag - 29 - 1 - write-only - - - TEMPLOW - Clear TEMPLOW Interrupt Flag - 30 - 1 - write-only - - - TEMPHIGH - Clear TEMPHIGH Interrupt Flag - 31 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x30 - 32 - read-write - 0x00000000 - 0xe11ff0ff - - - VMONAVDDFALL - VMONAVDDFALL Interrupt Enable - 0 - 1 - read-write - - - VMONAVDDRISE - VMONAVDDRISE Interrupt Enable - 1 - 1 - read-write - - - VMONALTAVDDFALL - VMONALTAVDDFALL Interrupt Enable - 2 - 1 - read-write - - - VMONALTAVDDRISE - VMONALTAVDDRISE Interrupt Enable - 3 - 1 - read-write - - - VMONDVDDFALL - VMONDVDDFALL Interrupt Enable - 4 - 1 - read-write - - - VMONDVDDRISE - VMONDVDDRISE Interrupt Enable - 5 - 1 - read-write - - - VMONIO0FALL - VMONIO0FALL Interrupt Enable - 6 - 1 - read-write - - - VMONIO0RISE - VMONIO0RISE Interrupt Enable - 7 - 1 - read-write - - - VMONPAVDDFALL - VMONPAVDDFALL Interrupt Enable - 12 - 1 - read-write - - - VMONPAVDDRISE - VMONPAVDDRISE Interrupt Enable - 13 - 1 - read-write - - - VMONFVDDFALL - VMONFVDDFALL Interrupt Enable - 14 - 1 - read-write - - - VMONFVDDRISE - VMONFVDDRISE Interrupt Enable - 15 - 1 - read-write - - - PFETOVERCURRENTLIMIT - PFETOVERCURRENTLIMIT Interrupt Enable - 16 - 1 - read-write - - - NFETOVERCURRENTLIMIT - NFETOVERCURRENTLIMIT Interrupt Enable - 17 - 1 - read-write - - - DCDCLPRUNNING - DCDCLPRUNNING Interrupt Enable - 18 - 1 - read-write - - - DCDCLNRUNNING - DCDCLNRUNNING Interrupt Enable - 19 - 1 - read-write - - - DCDCINBYPASS - DCDCINBYPASS Interrupt Enable - 20 - 1 - read-write - - - EM23WAKEUP - EM23WAKEUP Interrupt Enable - 24 - 1 - read-write - - - TEMP - TEMP Interrupt Enable - 29 - 1 - read-write - - - TEMPLOW - TEMPLOW Interrupt Enable - 30 - 1 - read-write - - - TEMPHIGH - TEMPHIGH Interrupt Enable - 31 - 1 - read-write - - - - - PWRLOCK - Regulator and Supply Lock Register - 0x34 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - Regulator and Supply Configuration Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - PWRCFG - Power Configuration Register. - 0x38 - 32 - read-write - 0x00000000 - 0x0000000f - - - PWRCFG - Power Configuration - 0 - 4 - read-write - - - STARTUP - Power up configuration. Works with any external configuration. - 0x00000000 - - - NODCDC - DCDC Disabled. AVDD Bypassed to DVDD internally - 0x00000001 - - - DCDCTODVDD - DCDC filterred and routed to DVDD - 0x00000002 - - - - - - - PWRCTRL - Power Control Register. - 0x3c - 32 - read-write - 0x00000000 - 0x00000020 - - - ANASW - Analog Switch Selection - 5 - 1 - read-write - - - - - DCDCCTRL - DCDC Control - 0x40 - 32 - read-write - 0x00000030 - 0x00000033 - - - DCDCMODE - Regulator Mode - 0 - 2 - read-write - - - BYPASS - DCDC regulator is operating in bypass mode. - 0x00000000 - - - LOWNOISE - DCDC regulator is operating in low noise mode. - 0x00000001 - - - LOWPOWER - DCDC regulator is operating in low power mode. - 0x00000002 - - - OFF - DCDC regulator is off. Note: DVDD must be supplied externally - 0x00000003 - - - - - DCDCMODEEM23 - Reserved for internal use. Do not change. - 4 - 1 - read-write - - - DCDCMODEEM4 - Reserved for internal use. Do not change. - 5 - 1 - read-write - - - - - DCDCMISCCTRL - DCDC Miscellaneous Control Register - 0x4c - 32 - read-write - 0x33307700 - 0x377fff01 - - - LNFORCECCM - Force DCDC into CCM mode in low noise operation - 0 - 1 - read-write - - - PFETCNT - PFET switch number selection - 8 - 4 - read-write - - - NFETCNT - NFET switch number selection - 12 - 4 - read-write - - - BYPLIMSEL - Current Limit In Bypass Mode - 16 - 4 - read-write - - - LPCLIMILIMSEL - Current limiter current threshold selection during low power mode - 20 - 3 - read-write - - - LNCLIMILIMSEL - Current limiter current threshold selection during low noise mode - 24 - 3 - read-write - - - LPCMPBIAS - LP mode comparator bias selection - 28 - 2 - read-write - - - BIAS0 - Nominal load current less than 10uA. - 0x00000000 - - - BIAS1 - Nominal load current less than 100uA. - 0x00000001 - - - BIAS2 - Nominal load current less than 1mA. - 0x00000002 - - - BIAS3 - Nominal load current less than 10mA. - 0x00000003 - - - - - - - DCDCZDETCTRL - DCDC Power Train NFET Zero Current Detector Control Register - 0x50 - 32 - read-write - 0x00000130 - 0x00000370 - - - ZDETILIMSEL - Reverse current limit level for zero detector - 4 - 3 - read-write - - - ZDETBLANKDLY - Reserved for internal use. Do not change. - 8 - 2 - read-write - - - - - DCDCCLIMCTRL - DCDC Power Train PFET Current Limiter Control Register - 0x54 - 32 - read-write - 0x00002100 - 0x00002300 - - - CLIMBLANKDLY - Reserved for internal use. Do not change. - 8 - 2 - read-write - - - BYPLIMEN - Bypass Current Limit Enable - 13 - 1 - read-write - - - - - DCDCLNVCTRL - DCDC Low Noise Voltage Register - 0x5c - 32 - read-write - 0x00007100 - 0x00007f02 - - - LNATT - Low Noise Mode Feedback Attenuation - 1 - 1 - read-write - - - LNVREF - Low Noise Mode VREF Trim - 8 - 7 - read-write - - - - - DCDCTIMING - DCDC Controller Timing Value Register - 0x60 - 32 - read-write - 0x0ff1f8ff - 0x6ff1f8ff - - - LPINITWAIT - Low power initialization wait time - 0 - 8 - read-write - - - COMPENPRCHGEN - LN mode precharge enable - 11 - 1 - read-write - - - LNWAIT - Low Noise Controller Initialization wait time - 12 - 5 - read-write - - - BYPWAIT - Bypass mode transition from low power or low noise modes wait - 20 - 8 - read-write - - - DUTYSCALE - Select bias duty cycle clock. - 29 - 2 - read-write - - - - - DCDCLPVCTRL - DCDC Low Power Voltage Register - 0x64 - 32 - read-write - 0x00000168 - 0x000001ff - - - LPATT - Low power feedback attenuation - 0 - 1 - read-write - - - LPVREF - LP mode vref trim - 1 - 8 - read-write - - - - - DCDCLPCTRL - DCDC Low Power Control Register - 0x6c - 32 - read-write - 0x00007000 - 0x0700f000 - - - LPCMPHYSSEL - LP mode hysteresis selection - 12 - 4 - read-write - - - LPVREFDUTYEN - Lp mode duty cycling enable - 24 - 1 - read-write - - - LPBLANK - Reserved for internal use. Do not change. - 25 - 2 - read-write - - - - - DCDCLNFREQCTRL - DCDC Low Noise Controller Frequency Control - 0x70 - 32 - read-write - 0x10000000 - 0x1f000007 - - - RCOBAND - LN mode RCO frequency band selection - 0 - 3 - read-write - - - RCOTRIM - Reserved for internal use. Do not change. - 24 - 5 - read-write - - - - - DCDCSYNC - DCDC Read Status Register - 0x78 - 32 - read-only - 0x00000000 - 0x00000001 - - - DCDCCTRLBUSY - DCDC CTRL Register Transfer Busy. - 0 - 1 - read-only - - - - - VMONAVDDCTRL - VMON AVDD Channel Control - 0x90 - 32 - read-write - 0x00000000 - 0x00ffff0d - - - EN - Enable - 0 - 1 - read-write - - - RISEWU - Rise Wakeup - 2 - 1 - read-write - - - FALLWU - Fall Wakeup - 3 - 1 - read-write - - - FALLTHRESFINE - Falling Threshold Fine Adjust - 8 - 4 - read-write - - - FALLTHRESCOARSE - Falling Threshold Coarse Adjust - 12 - 4 - read-write - - - RISETHRESFINE - Rising Threshold Fine Adjust - 16 - 4 - read-write - - - RISETHRESCOARSE - Rising Threshold Coarse Adjust - 20 - 4 - read-write - - - - - VMONALTAVDDCTRL - Alternate VMON AVDD Channel Control - 0x94 - 32 - read-write - 0x00000000 - 0x0000ff0d - - - EN - Enable - 0 - 1 - read-write - - - RISEWU - Rise Wakeup - 2 - 1 - read-write - - - FALLWU - Fall Wakeup - 3 - 1 - read-write - - - THRESFINE - Threshold Fine Adjust - 8 - 4 - read-write - - - THRESCOARSE - Threshold Coarse Adjust - 12 - 4 - read-write - - - - - VMONDVDDCTRL - VMON DVDD Channel Control - 0x98 - 32 - read-write - 0x00000000 - 0x0000ff0d - - - EN - Enable - 0 - 1 - read-write - - - RISEWU - Rise Wakeup - 2 - 1 - read-write - - - FALLWU - Fall Wakeup - 3 - 1 - read-write - - - THRESFINE - Threshold Fine Adjust - 8 - 4 - read-write - - - THRESCOARSE - Threshold Coarse Adjust - 12 - 4 - read-write - - - - - VMONIO0CTRL - VMON IOVDD0 Channel Control - 0x9c - 32 - read-write - 0x00000000 - 0x0000ff1d - - - EN - Enable - 0 - 1 - read-write - - - RISEWU - Rise Wakeup - 2 - 1 - read-write - - - FALLWU - Fall Wakeup - 3 - 1 - read-write - - - RETDIS - EM4 IO0 Retention disable - 4 - 1 - read-write - - - THRESFINE - Threshold Fine Adjust - 8 - 4 - read-write - - - THRESCOARSE - Threshold Coarse Adjust - 12 - 4 - read-write - - - - - - - RMU - 1.6 - RMU - 0x400e5000 - - 0 - 0x00000400 - registers - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00004224 - 0x03007777 - - - WDOGRMODE - WDOG Reset Mode - 0 - 3 - read-write - - - DISABLED - Reset request is blocked. This disable bit is redundant with enable/disable bit in WDOG - 0x00000000 - - - LIMITED - The CRYOTIMER, DEBUGGER, RTCC, are not reset. - 0x00000001 - - - EXTENDED - The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. - 0x00000002 - - - FULL - The entire device is reset except some EMU and RMU registers. - 0x00000004 - - - - - LOCKUPRMODE - Core LOCKUP Reset Mode - 4 - 3 - read-write - - - DISABLED - Reset request is blocked. - 0x00000000 - - - LIMITED - The CRYOTIMER, DEBUGGER, RTCC, are not reset. - 0x00000001 - - - EXTENDED - The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. - 0x00000002 - - - FULL - The entire device is reset except some EMU and RMU registers. - 0x00000004 - - - - - SYSRMODE - Core Sysreset Reset Mode - 8 - 3 - read-write - - - DISABLED - Reset request is blocked. - 0x00000000 - - - LIMITED - The CRYOTIMER, DEBUGGER, RTCC, are not reset. - 0x00000001 - - - EXTENDED - The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. - 0x00000002 - - - FULL - The entire device is reset except some EMU and RMU registers. - 0x00000004 - - - - - PINRMODE - PIN Reset Mode - 12 - 3 - read-write - - - DISABLED - Reset request is blocked. - 0x00000000 - - - LIMITED - The CRYOTIMER, DEBUGGER, RTCC, are not reset. - 0x00000001 - - - EXTENDED - The CRYOTIMER, DEBUGGER are not reset. RTCC is reset. - 0x00000002 - - - FULL - The entire device is reset except some EMU and RMU registers. - 0x00000004 - - - - - RESETSTATE - System Software Reset State - 24 - 2 - read-write - - - - - RSTCAUSE - Reset Cause Register - 0x4 - 32 - read-only - 0x00000000 - 0x00010f1d - - - PORST - Power On Reset - 0 - 1 - read-only - - - AVDDBOD - Brown Out Detector AVDD Reset - 2 - 1 - read-only - - - DVDDBOD - Brown Out Detector DVDD Reset - 3 - 1 - read-only - - - DECBOD - Brown Out Detector Decouple Domain Reset - 4 - 1 - read-only - - - EXTRST - External Pin Reset - 8 - 1 - read-only - - - LOCKUPRST - LOCKUP Reset - 9 - 1 - read-only - - - SYSREQRST - System Request Reset - 10 - 1 - read-only - - - WDOGRST - Watchdog Reset - 11 - 1 - read-only - - - EM4RST - EM4 Reset - 16 - 1 - read-only - - - - - CMD - Command Register - 0x8 - 32 - write-only - 0x00000000 - 0x00000001 - - - RCCLR - Reset Cause Clear - 0 - 1 - write-only - - - - - RST - Reset Control Register - 0xc - 32 - read-write - 0x00000000 - 0x00000000 - - - LOCK - Configuration Lock Register - 0x10 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - Configuration Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - - - CMU - 1.6 - CMU - 0x400e4000 - - 0 - 0x00000400 - registers - - - CMU - 23 - - - - CTRL - CMU Control Register - 0x0 - 32 - read-write - 0x00300000 - 0x001101ef - - - CLKOUTSEL0 - Clock Output Select 0 - 0 - 4 - read-write - - - DISABLED - Disabled - 0x00000000 - - - ULFRCO - ULFRCO (directly from oscillator) - 0x00000001 - - - LFRCO - LFRCO (directly from oscillator) - 0x00000002 - - - LFXO - LFXO (directly from oscillator) - 0x00000003 - - - HFXO - HFXO (directly from oscillator) - 0x00000006 - - - HFEXPCLK - HFEXPCLK - 0x00000007 - - - ULFRCOQ - ULFRCO (qualified) - 0x00000009 - - - LFRCOQ - LFRCO (qualified) - 0x0000000a - - - LFXOQ - LFXO (qualified) - 0x0000000b - - - HFRCOQ - HFRCO (qualified) - 0x0000000c - - - AUXHFRCOQ - AUXHFRCO (qualified) - 0x0000000d - - - HFXOQ - HFXO (qualified) - 0x0000000e - - - HFSRCCLK - HFSRCCLK - 0x0000000f - - - - - CLKOUTSEL1 - Clock Output Select 1 - 5 - 4 - read-write - - - DISABLED - Disabled - 0x00000000 - - - ULFRCO - ULFRCO (directly from oscillator) - 0x00000001 - - - LFRCO - LFRCO (directly from oscillator) - 0x00000002 - - - LFXO - LFXO (directly from oscillator) - 0x00000003 - - - HFXO - HFXO (directly from oscillator) - 0x00000006 - - - HFEXPCLK - HFEXPCLK - 0x00000007 - - - ULFRCOQ - ULFRCO (qualified) - 0x00000009 - - - LFRCOQ - LFRCO (qualified) - 0x0000000a - - - LFXOQ - LFXO (qualified) - 0x0000000b - - - HFRCOQ - HFRCO (qualified) - 0x0000000c - - - AUXHFRCOQ - AUXHFRCO (qualified) - 0x0000000d - - - HFXOQ - HFXO (qualified) - 0x0000000e - - - HFSRCCLK - HFSRCCLK - 0x0000000f - - - - - WSHFLE - Wait State for High-Frequency LE Interface - 16 - 1 - read-write - - - HFPERCLKEN - HFPERCLK Enable - 20 - 1 - read-write - - - - - HFRCOCTRL - HFRCO Control Register - 0x10 - 32 - read-write - 0xb1481f3c - 0xffff3f7f - - - TUNING - HFRCO Tuning Value - 0 - 7 - read-write - - - FINETUNING - HFRCO Fine Tuning Value - 8 - 6 - read-write - - - FREQRANGE - HFRCO Frequency Range - 16 - 5 - read-write - - - CMPBIAS - HFRCO Comparator Bias Current - 21 - 3 - read-write - - - LDOHP - HFRCO LDO High Power Mode - 24 - 1 - read-write - - - CLKDIV - Locally divide HFRCO Clock Output - 25 - 2 - read-write - - - DIV1 - Divide by 1. - 0x00000000 - - - DIV2 - Divide by 2. - 0x00000001 - - - DIV4 - Divide by 4. - 0x00000002 - - - - - FINETUNINGEN - Enable reference for fine tuning - 27 - 1 - read-write - - - VREFTC - HFRCO Temperature Coefficient Trim on Comparator Reference - 28 - 4 - read-write - - - - - AUXHFRCOCTRL - AUXHFRCO Control Register - 0x18 - 32 - read-write - 0xb1481f3c - 0xffff3f7f - - - TUNING - AUXHFRCO Tuning Value - 0 - 7 - read-write - - - FINETUNING - AUXHFRCO Fine Tuning Value - 8 - 6 - read-write - - - FREQRANGE - AUXHFRCO Frequency Range - 16 - 5 - read-write - - - CMPBIAS - AUXHFRCO Comparator Bias Current - 21 - 3 - read-write - - - LDOHP - AUXHFRCO LDO High Power Mode - 24 - 1 - read-write - - - CLKDIV - Locally divide AUXHFRCO Clock Output - 25 - 2 - read-write - - - DIV1 - Divide by 1. - 0x00000000 - - - DIV2 - Divide by 2. - 0x00000001 - - - DIV4 - Divide by 4. - 0x00000002 - - - - - FINETUNINGEN - Enable reference for fine tuning - 27 - 1 - read-write - - - VREFTC - AUXHFRCO Temperature Coefficient Trim on Comparator Reference - 28 - 4 - read-write - - - - - LFRCOCTRL - LFRCO Control Register - 0x20 - 32 - read-write - 0x81060100 - 0xf30701ff - - - TUNING - LFRCO Tuning Value - 0 - 9 - read-write - - - ENVREF - Enable duty cycling of vref - 16 - 1 - read-write - - - ENCHOP - Enable comparator chopping - 17 - 1 - read-write - - - ENDEM - Enable dynamic element matching - 18 - 1 - read-write - - - TIMEOUT - LFRCO Timeout - 24 - 2 - read-write - - - 2CYCLES - Timeout period of 2 cycles - 0x00000000 - - - 16CYCLES - Timeout period of 16 cycles - 0x00000001 - - - 32CYCLES - Timeout period of 32 cycles - 0x00000002 - - - - - GMCCURTUNE - Tuning of gmc current - 28 - 4 - read-write - - - - - HFXOCTRL - HFXO Control Register - 0x24 - 32 - read-write - 0x00000000 - 0x77000f31 - - - MODE - HFXO Mode - 0 - 1 - read-write - - - PEAKDETSHUNTOPTMODE - HFXO Automatic Peak Detection and shunt current optimization mode - 4 - 2 - read-write - - - AUTOCMD - Automatic control of HFXO peak detection and shunt optimization sequences. CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can also be used. - 0x00000000 - - - CMD - CMU_CMD HFXOPEAKDETSTART and HFXOSHUNTOPTSTART can be used to trigger peak detection and shunt optimization sequences. - 0x00000001 - - - MANUAL - CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE, REGISH, REGSELILOW, and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready. - 0x00000002 - - - - - LOWPOWER - Low power mode control. PSR performance is reduced to enable low current consumption. - 8 - 1 - read-write - - - XTI2GND - Clamp HFXTAL_N pin to ground when HFXO oscillator is off and KEEPWARM=0. - 9 - 1 - read-write - - - XTO2GND - Clamp HFXTAL_P pin to ground when HFXO oscillator is off and KEEPWARM=0. - 10 - 1 - read-write - - - KEEPWARM - Keep HFXO warm when turning off HFXO. - 11 - 1 - read-write - - - LFTIMEOUT - HFXO Low Frequency Timeout - 24 - 3 - read-write - - - 0CYCLES - Timeout period of 0 cycles (disabled) - 0x00000000 - - - 2CYCLES - Timeout period of 2 cycles - 0x00000001 - - - 4CYCLES - Timeout period of 4 cycles - 0x00000002 - - - 16CYCLES - Timeout period of 16 cycles - 0x00000003 - - - 32CYCLES - Timeout period of 32 cycles - 0x00000004 - - - 64CYCLES - Timeout period of 64 cycles - 0x00000005 - - - 1KCYCLES - Timeout period of 1024 cycles - 0x00000006 - - - 4KCYCLES - Timeout period of 4096 cycles - 0x00000007 - - - - - AUTOSTARTEM0EM1 - Automatically start of HFXO upon EM0/EM1 entry from EM2/EM3 - 28 - 1 - read-write - - - AUTOSTARTSELEM0EM1 - Automatically start and select of HFXO upon EM0/EM1 entry from EM2/EM3 - 29 - 1 - read-write - - - AUTOSTARTRDYSELRAC - Automatically start HFXO on RAC wake-up and select it upon HFXO Ready - 30 - 1 - read-write - - - - - HFXOCTRL1 - HFXO Control 1 - 0x28 - 32 - read-write - 0x00000240 - 0x00000277 - - - PEAKDETTHR - Sets the Peak Detector amplitude detection threshold levels - 0 - 3 - read-write - - - REGLVL - Reserved for internal use. Do not change. - 4 - 3 - read-write - - - XTIBIASEN - Reserved for internal use. Do not change. - 9 - 1 - read-write - - - - - HFXOSTARTUPCTRL - HFXO Startup Control - 0x2c - 32 - read-write - 0xa1250060 - 0xffeff87f - - - IBTRIMXOCORE - Sets the startup oscillator core bias current. Current (uA) = IBTRIMXOCORE x 40uA. Bits 6 and 5 may only be high in the crystal oscillator startup phase - 0 - 7 - read-write - - - CTUNE - Sets oscillator tuning capacitance. Capacitance on HFXTAL_N and HFXTAL_P (pF) = Ctune = Cpar + CTUNE<8:0> x 40fF. Max Ctune 25pF (CLmax ~12.5pF). CL(DNLmax)=50fF ~ 0.6ppm (12.5ppm/pF) - 11 - 9 - read-write - - - IBTRIMXOCOREWARM - Sets the oscillator core bias current. Current (uA) = IBTRIMXOCOREWARM x 40uA. Bits 6 and 5 may only be high in the crystal oscillator startup phase - 21 - 7 - read-write - - - REGISHWARM - Sets the regulator output current level (shunt regulator). Ish = 120uA + REGISHWARM x 120uA - 28 - 4 - read-write - - - - - HFXOSTEADYSTATECTRL - HFXO Steady State control - 0x30 - 32 - read-write - 0xa30aad09 - 0xf70fffff - - - IBTRIMXOCORE - Sets the steady state oscillator core bias current. Current (uA) = IBTRIMXOCORE x 40uA. Bits 6 and 5 may only be high in the crystal oscillator startup phase - 0 - 7 - read-write - - - REGISH - Sets the steady state regulator output current level (shunt regulator). Ish = 120uA + REGISH x 120uA - 7 - 4 - read-write - - - CTUNE - Sets oscillator tuning capacitance. Capacitance on HFXTAL_N and HFXTAL_P (pF) = Ctune = Cpar + CTUNE<8:0> x 40fF. Max Ctune 25pF (CLmax ~12.5pF). CL(DNLmax)=50fF ~ 0.6ppm (12.5ppm/pF) - 11 - 9 - read-write - - - REGSELILOW - Controls regulator minimum shunt current detection relative to nominal - 24 - 2 - read-write - - - PEAKDETEN - Enables oscillator peak detectors - 26 - 1 - read-write - - - REGISHUPPER - Set regulator output current level (shunt regulator). Ish = 120uA + REGISHUPPER x 120uA - 28 - 4 - read-write - - - - - HFXOTIMEOUTCTRL - HFXO Timeout Control - 0x34 - 32 - read-write - 0x00026667 - 0x000fffff - - - STARTUPTIMEOUT - Wait duration in HFXO startup enable wait state - 0 - 4 - read-write - - - 2CYCLES - Timeout period of 2 cycles - 0x00000000 - - - 4CYCLES - Timeout period of 4 cycles - 0x00000001 - - - 16CYCLES - Timeout period of 16 cycles - 0x00000002 - - - 32CYCLES - Timeout period of 32 cycles - 0x00000003 - - - 256CYCLES - Timeout period of 256 cycles - 0x00000004 - - - 1KCYCLES - Timeout period of 1024 cycles - 0x00000005 - - - 2KCYCLES - Timeout period of 2048 cycles - 0x00000006 - - - 4KCYCLES - Timeout period of 4096 cycles - 0x00000007 - - - 8KCYCLES - Timeout period of 8192 cycles - 0x00000008 - - - 16KCYCLES - Timeout period of 16384 cycles - 0x00000009 - - - 32KCYCLES - Timeout period of 32768 cycles - 0x0000000a - - - - - STEADYTIMEOUT - Wait duration in HFXO startup steady wait state - 4 - 4 - read-write - - - 2CYCLES - Timeout period of 2 cycles - 0x00000000 - - - 4CYCLES - Timeout period of 4 cycles - 0x00000001 - - - 16CYCLES - Timeout period of 16 cycles - 0x00000002 - - - 32CYCLES - Timeout period of 32 cycles - 0x00000003 - - - 256CYCLES - Timeout period of 256 cycles - 0x00000004 - - - 1KCYCLES - Timeout period of 1024 cycles - 0x00000005 - - - 2KCYCLES - Timeout period of 2048 cycles - 0x00000006 - - - 4KCYCLES - Timeout period of 4096 cycles - 0x00000007 - - - 8KCYCLES - Timeout period of 8192 cycles - 0x00000008 - - - 16KCYCLES - Timeout period of 16384 cycles - 0x00000009 - - - 32KCYCLES - Timeout period of 32768 cycles - 0x0000000a - - - - - WARMSTEADYTIMEOUT - Wait duration in HFXO warm startup steady wait state - 8 - 4 - read-write - - - 2CYCLES - Timeout period of 2 cycles - 0x00000000 - - - 4CYCLES - Timeout period of 4 cycles - 0x00000001 - - - 16CYCLES - Timeout period of 16 cycles - 0x00000002 - - - 32CYCLES - Timeout period of 32 cycles - 0x00000003 - - - 256CYCLES - Timeout period of 256 cycles - 0x00000004 - - - 1KCYCLES - Timeout period of 1024 cycles - 0x00000005 - - - 2KCYCLES - Timeout period of 2048 cycles - 0x00000006 - - - 4KCYCLES - Timeout period of 4096 cycles - 0x00000007 - - - 8KCYCLES - Timeout period of 8192 cycles - 0x00000008 - - - 16KCYCLES - Timeout period of 16384 cycles - 0x00000009 - - - 32KCYCLES - Timeout period of 32768 cycles - 0x0000000a - - - - - PEAKDETTIMEOUT - Wait duration in HFXO peak detection wait state - 12 - 4 - read-write - - - 2CYCLES - Timeout period of 2 cycles - 0x00000000 - - - 4CYCLES - Timeout period of 4 cycles - 0x00000001 - - - 16CYCLES - Timeout period of 16 cycles - 0x00000002 - - - 32CYCLES - Timeout period of 32 cycles - 0x00000003 - - - 256CYCLES - Timeout period of 256 cycles - 0x00000004 - - - 1KCYCLES - Timeout period of 1024 cycles - 0x00000005 - - - 2KCYCLES - Timeout period of 2048 cycles - 0x00000006 - - - 4KCYCLES - Timeout period of 4096 cycles - 0x00000007 - - - 8KCYCLES - Timeout period of 8192 cycles - 0x00000008 - - - 16KCYCLES - Timeout period of 16384 cycles - 0x00000009 - - - 32KCYCLES - Timeout period of 32768 cycles - 0x0000000a - - - - - SHUNTOPTTIMEOUT - Wait duration in HFXO shunt current optimization wait state - 16 - 4 - read-write - - - 2CYCLES - Timeout period of 2 cycles - 0x00000000 - - - 4CYCLES - Timeout period of 4 cycles - 0x00000001 - - - 16CYCLES - Timeout period of 16 cycles - 0x00000002 - - - 32CYCLES - Timeout period of 32 cycles - 0x00000003 - - - 256CYCLES - Timeout period of 256 cycles - 0x00000004 - - - 1KCYCLES - Timeout period of 1024 cycles - 0x00000005 - - - 2KCYCLES - Timeout period of 2048 cycles - 0x00000006 - - - 4KCYCLES - Timeout period of 4096 cycles - 0x00000007 - - - 8KCYCLES - Timeout period of 8192 cycles - 0x00000008 - - - 16KCYCLES - Timeout period of 16384 cycles - 0x00000009 - - - 32KCYCLES - Timeout period of 32768 cycles - 0x0000000a - - - - - - - LFXOCTRL - LFXO Control Register - 0x38 - 32 - read-write - 0x07009000 - 0x0713db7f - - - TUNING - LFXO Internal Capacitor Array Tuning Value - 0 - 7 - read-write - - - MODE - LFXO Mode - 8 - 2 - read-write - - - XTAL - 32768 Hz crystal oscillator - 0x00000000 - - - BUFEXTCLK - An AC coupled buffer is coupled in series with LFXTAL_N pin, suitable for external sinus wave (32768 Hz). - 0x00000001 - - - DIGEXTCLK - Digital external clock on LFXTAL_N pin. Oscillator is effectively bypassed. - 0x00000002 - - - - - GAIN - LFXO Startup Gain - 11 - 2 - read-write - - - HIGHAMPL - LFXO High XTAL Oscillation Amplitude Enable - 14 - 1 - read-write - - - AGC - LFXO AGC Enable - 15 - 1 - read-write - - - CUR - LFXO Current Trim - 16 - 2 - read-write - - - BUFCUR - LFXO Buffer Bias Current - 20 - 1 - read-write - - - TIMEOUT - LFXO Timeout - 24 - 3 - read-write - - - 2CYCLES - Timeout period of 2 cycles - 0x00000000 - - - 256CYCLES - Timeout period of 256 cycles - 0x00000001 - - - 1KCYCLES - Timeout period of 1024 cycles - 0x00000002 - - - 2KCYCLES - Timeout period of 2048 cycles - 0x00000003 - - - 4KCYCLES - Timeout period of 4096 cycles - 0x00000004 - - - 8KCYCLES - Timeout period of 8192 cycles - 0x00000005 - - - 16KCYCLES - Timeout period of 16384 cycles - 0x00000006 - - - 32KCYCLES - Timeout period of 32768 cycles - 0x00000007 - - - - - - - CALCTRL - Calibration Control Register - 0x50 - 32 - read-write - 0x00000000 - 0x0f0f0177 - - - UPSEL - Calibration Up-counter Select - 0 - 3 - read-write - - - HFXO - Select HFXO as up-counter - 0x00000000 - - - LFXO - Select LFXO as up-counter - 0x00000001 - - - HFRCO - Select HFRCO as up-counter - 0x00000002 - - - LFRCO - Select LFRCO as up-counter - 0x00000003 - - - AUXHFRCO - Select AUXHFRCO as up-counter - 0x00000004 - - - PRS - Select PRS input selected by PRSUPSEL as up-counter - 0x00000005 - - - - - DOWNSEL - Calibration Down-counter Select - 4 - 3 - read-write - - - HFCLK - Select HFCLK for down-counter - 0x00000000 - - - HFXO - Select HFXO for down-counter - 0x00000001 - - - LFXO - Select LFXO for down-counter - 0x00000002 - - - HFRCO - Select HFRCO for down-counter - 0x00000003 - - - LFRCO - Select LFRCO for down-counter - 0x00000004 - - - AUXHFRCO - Select AUXHFRCO for down-counter - 0x00000005 - - - PRS - Select PRS input selected by PRSDOWNSEL as down-counter - 0x00000006 - - - - - CONT - Continuous Calibration - 8 - 1 - read-write - - - PRSUPSEL - PRS Select for PRS Input when selected in UPSEL - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - PRSDOWNSEL - PRS Select for PRS Input when selected in DOWNSEL - 24 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - - - CALCNT - Calibration Counter Register - 0x54 - 32 - read-write - 0x00000000 - 0x000fffff - - - CALCNT - Calibration Counter - 0 - 20 - read-write - - - - - OSCENCMD - Oscillator Enable/Disable Command Register - 0x60 - 32 - write-only - 0x00000000 - 0x000003ff - - - HFRCOEN - HFRCO Enable - 0 - 1 - write-only - - - HFRCODIS - HFRCO Disable - 1 - 1 - write-only - - - HFXOEN - HFXO Enable - 2 - 1 - write-only - - - HFXODIS - HFXO Disable - 3 - 1 - write-only - - - AUXHFRCOEN - AUXHFRCO Enable - 4 - 1 - write-only - - - AUXHFRCODIS - AUXHFRCO Disable - 5 - 1 - write-only - - - LFRCOEN - LFRCO Enable - 6 - 1 - write-only - - - LFRCODIS - LFRCO Disable - 7 - 1 - write-only - - - LFXOEN - LFXO Enable - 8 - 1 - write-only - - - LFXODIS - LFXO Disable - 9 - 1 - write-only - - - - - CMD - Command Register - 0x64 - 32 - write-only - 0x00000000 - 0x00000033 - - - CALSTART - Calibration Start - 0 - 1 - write-only - - - CALSTOP - Calibration Stop - 1 - 1 - write-only - - - HFXOPEAKDETSTART - HFXO Peak Detection Start - 4 - 1 - write-only - - - HFXOSHUNTOPTSTART - HFXO Shunt Current Optimization Start - 5 - 1 - write-only - - - - - DBGCLKSEL - Debug Trace Clock Select - 0x70 - 32 - read-write - 0x00000000 - 0x00000001 - - - DBG - Debug Trace Clock - 0 - 1 - read-write - - - AUXHFRCO - AUXHFRCO is the debug trace clock - 0x00000000 - - - HFCLK - HFCLK is the debug trace clock - 0x00000001 - - - - - - - HFCLKSEL - High Frequency Clock Select Command Register - 0x74 - 32 - write-only - 0x00000000 - 0x00000007 - - - HF - HFCLK Select - 0 - 3 - write-only - - - HFRCO - Select HFRCO as HFCLK - 0x00000001 - - - HFXO - Select HFXO as HFCLK - 0x00000002 - - - LFRCO - Select LFRCO as HFCLK - 0x00000003 - - - LFXO - Select LFXO as HFCLK - 0x00000004 - - - - - - - LFACLKSEL - Low Frequency A Clock Select Register - 0x80 - 32 - read-write - 0x00000000 - 0x00000007 - - - LFA - Clock Select for LFA - 0 - 3 - read-write - - - DISABLED - LFACLK is disabled - 0x00000000 - - - LFRCO - LFRCO selected as LFACLK - 0x00000001 - - - LFXO - LFXO selected as LFACLK - 0x00000002 - - - ULFRCO - ULFRCO selected as LFACLK - 0x00000004 - - - - - - - LFBCLKSEL - Low Frequency B Clock Select Register - 0x84 - 32 - read-write - 0x00000000 - 0x00000007 - - - LFB - Clock Select for LFB - 0 - 3 - read-write - - - DISABLED - LFBCLK is disabled - 0x00000000 - - - LFRCO - LFRCO selected as LFBCLK - 0x00000001 - - - LFXO - LFXO selected as LFBCLK - 0x00000002 - - - HFCLKLE - HFCLK divided by two/four is selected as LFBCLK - 0x00000003 - - - ULFRCO - ULFRCO selected as LFBCLK - 0x00000004 - - - - - - - LFECLKSEL - Low Frequency E Clock Select Register - 0x88 - 32 - read-write - 0x00000000 - 0x00000007 - - - LFE - Clock Select for LFE - 0 - 3 - read-write - - - DISABLED - LFECLK is disabled - 0x00000000 - - - LFRCO - LFRCO selected as LFECLK - 0x00000001 - - - LFXO - LFXO selected as LFECLK - 0x00000002 - - - ULFRCO - ULFRCO selected as LFECLK - 0x00000004 - - - - - - - STATUS - Status Register - 0x90 - 32 - read-only - 0x00010003 - 0x07d103ff - - - HFRCOENS - HFRCO Enable Status - 0 - 1 - read-only - - - HFRCORDY - HFRCO Ready - 1 - 1 - read-only - - - HFXOENS - HFXO Enable Status - 2 - 1 - read-only - - - HFXORDY - HFXO Ready - 3 - 1 - read-only - - - AUXHFRCOENS - AUXHFRCO Enable Status - 4 - 1 - read-only - - - AUXHFRCORDY - AUXHFRCO Ready - 5 - 1 - read-only - - - LFRCOENS - LFRCO Enable Status - 6 - 1 - read-only - - - LFRCORDY - LFRCO Ready - 7 - 1 - read-only - - - LFXOENS - LFXO Enable Status - 8 - 1 - read-only - - - LFXORDY - LFXO Ready - 9 - 1 - read-only - - - CALRDY - Calibration Ready - 16 - 1 - read-only - - - HFXOWARMS - HFXO Warm Status - 20 - 1 - read-only - - - HFXOPEAKDETRDY - HFXO Peak Detection Ready - 22 - 1 - read-only - - - HFXOSHUNTOPTRDY - HFXO Shunt Current Optimization ready - 23 - 1 - read-only - - - HFXOAMPHIGH - HFXO oscillation amplitude is too high - 24 - 1 - read-only - - - HFXOAMPLOW - HFXO amplitude tuning value too low - 25 - 1 - read-only - - - HFXOREGILOW - HFXO regulator shunt current too low - 26 - 1 - read-only - - - - - HFCLKSTATUS - HFCLK Status Register - 0x94 - 32 - read-only - 0x00000001 - 0x00000007 - - - SELECTED - HFCLK Selected - 0 - 3 - read-only - - - HFRCO - HFRCO is selected as HFCLK clock source - 0x00000001 - - - HFXO - HFXO is selected as HFCLK clock source - 0x00000002 - - - LFRCO - LFRCO is selected as HFCLK clock source - 0x00000003 - - - LFXO - LFXO is selected as HFCLK clock source - 0x00000004 - - - - - - - HFXOTRIMSTATUS - HFXO Trim Status - 0x9c - 32 - read-only - 0x00000500 - 0x000007ff - - - IBTRIMXOCORE - Value of IBTRIMXOCORE found by automatic HFXO peak detection algorithm. Can be used as initial value for IBTRIMXOCORE in the CMU_HFXOSTEADYSTATECTRL register if HFXO is to be started again. - 0 - 7 - read-only - - - REGISH - Value of REGISH found by automatic HFXO shunt current optimization algorithm. Can be used as initial value for REGISH value in the CMU_HFXOSTEADYSTATECTRL register if HFXO is to be started again. - 7 - 4 - read-only - - - - - IF - Interrupt Flag Register - 0xa0 - 32 - read-only - 0x00000001 - 0x80007f7f - - - HFRCORDY - HFRCO Ready Interrupt Flag - 0 - 1 - read-only - - - HFXORDY - HFXO Ready Interrupt Flag - 1 - 1 - read-only - - - LFRCORDY - LFRCO Ready Interrupt Flag - 2 - 1 - read-only - - - LFXORDY - LFXO Ready Interrupt Flag - 3 - 1 - read-only - - - AUXHFRCORDY - AUXHFRCO Ready Interrupt Flag - 4 - 1 - read-only - - - CALRDY - Calibration Ready Interrupt Flag - 5 - 1 - read-only - - - CALOF - Calibration Overflow Interrupt Flag - 6 - 1 - read-only - - - HFXODISERR - HFXO Disable Error Interrupt Flag - 8 - 1 - read-only - - - HFXOAUTOSW - HFXO Automatic Switch Interrupt Flag - 9 - 1 - read-only - - - HFXOPEAKDETERR - HFXO Automatic Peak Detection Error Interrupt Flag - 10 - 1 - read-only - - - HFXOPEAKDETRDY - HFXO Automatic Peak Detection Ready Interrupt Flag - 11 - 1 - read-only - - - HFXOSHUNTOPTRDY - HFXO Automatic Shunt Current Optimization Ready Interrupt Flag - 12 - 1 - read-only - - - HFRCODIS - HFRCO Disable Interrupt Flag - 13 - 1 - read-only - - - LFTIMEOUTERR - Low Frequency Timeout Error Interrupt Flag - 14 - 1 - read-only - - - CMUERR - CMU Error Interrupt Flag - 31 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0xa4 - 32 - write-only - 0x00000000 - 0x80007f7f - - - HFRCORDY - Set HFRCORDY Interrupt Flag - 0 - 1 - write-only - - - HFXORDY - Set HFXORDY Interrupt Flag - 1 - 1 - write-only - - - LFRCORDY - Set LFRCORDY Interrupt Flag - 2 - 1 - write-only - - - LFXORDY - Set LFXORDY Interrupt Flag - 3 - 1 - write-only - - - AUXHFRCORDY - Set AUXHFRCORDY Interrupt Flag - 4 - 1 - write-only - - - CALRDY - Set CALRDY Interrupt Flag - 5 - 1 - write-only - - - CALOF - Set CALOF Interrupt Flag - 6 - 1 - write-only - - - HFXODISERR - Set HFXODISERR Interrupt Flag - 8 - 1 - write-only - - - HFXOAUTOSW - Set HFXOAUTOSW Interrupt Flag - 9 - 1 - write-only - - - HFXOPEAKDETERR - Set HFXOPEAKDETERR Interrupt Flag - 10 - 1 - write-only - - - HFXOPEAKDETRDY - Set HFXOPEAKDETRDY Interrupt Flag - 11 - 1 - write-only - - - HFXOSHUNTOPTRDY - Set HFXOSHUNTOPTRDY Interrupt Flag - 12 - 1 - write-only - - - HFRCODIS - Set HFRCODIS Interrupt Flag - 13 - 1 - write-only - - - LFTIMEOUTERR - Set LFTIMEOUTERR Interrupt Flag - 14 - 1 - write-only - - - CMUERR - Set CMUERR Interrupt Flag - 31 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0xa8 - 32 - write-only - 0x00000000 - 0x80007f7f - - - HFRCORDY - Clear HFRCORDY Interrupt Flag - 0 - 1 - write-only - - - HFXORDY - Clear HFXORDY Interrupt Flag - 1 - 1 - write-only - - - LFRCORDY - Clear LFRCORDY Interrupt Flag - 2 - 1 - write-only - - - LFXORDY - Clear LFXORDY Interrupt Flag - 3 - 1 - write-only - - - AUXHFRCORDY - Clear AUXHFRCORDY Interrupt Flag - 4 - 1 - write-only - - - CALRDY - Clear CALRDY Interrupt Flag - 5 - 1 - write-only - - - CALOF - Clear CALOF Interrupt Flag - 6 - 1 - write-only - - - HFXODISERR - Clear HFXODISERR Interrupt Flag - 8 - 1 - write-only - - - HFXOAUTOSW - Clear HFXOAUTOSW Interrupt Flag - 9 - 1 - write-only - - - HFXOPEAKDETERR - Clear HFXOPEAKDETERR Interrupt Flag - 10 - 1 - write-only - - - HFXOPEAKDETRDY - Clear HFXOPEAKDETRDY Interrupt Flag - 11 - 1 - write-only - - - HFXOSHUNTOPTRDY - Clear HFXOSHUNTOPTRDY Interrupt Flag - 12 - 1 - write-only - - - HFRCODIS - Clear HFRCODIS Interrupt Flag - 13 - 1 - write-only - - - LFTIMEOUTERR - Clear LFTIMEOUTERR Interrupt Flag - 14 - 1 - write-only - - - CMUERR - Clear CMUERR Interrupt Flag - 31 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0xac - 32 - read-write - 0x00000000 - 0x80007f7f - - - HFRCORDY - HFRCORDY Interrupt Enable - 0 - 1 - read-write - - - HFXORDY - HFXORDY Interrupt Enable - 1 - 1 - read-write - - - LFRCORDY - LFRCORDY Interrupt Enable - 2 - 1 - read-write - - - LFXORDY - LFXORDY Interrupt Enable - 3 - 1 - read-write - - - AUXHFRCORDY - AUXHFRCORDY Interrupt Enable - 4 - 1 - read-write - - - CALRDY - CALRDY Interrupt Enable - 5 - 1 - read-write - - - CALOF - CALOF Interrupt Enable - 6 - 1 - read-write - - - HFXODISERR - HFXODISERR Interrupt Enable - 8 - 1 - read-write - - - HFXOAUTOSW - HFXOAUTOSW Interrupt Enable - 9 - 1 - read-write - - - HFXOPEAKDETERR - HFXOPEAKDETERR Interrupt Enable - 10 - 1 - read-write - - - HFXOPEAKDETRDY - HFXOPEAKDETRDY Interrupt Enable - 11 - 1 - read-write - - - HFXOSHUNTOPTRDY - HFXOSHUNTOPTRDY Interrupt Enable - 12 - 1 - read-write - - - HFRCODIS - HFRCODIS Interrupt Enable - 13 - 1 - read-write - - - LFTIMEOUTERR - LFTIMEOUTERR Interrupt Enable - 14 - 1 - read-write - - - CMUERR - CMUERR Interrupt Enable - 31 - 1 - read-write - - - - - HFBUSCLKEN0 - High Frequency Bus Clock Enable Register 0 - 0xb0 - 32 - read-write - 0x00000000 - 0x0000003f - - - LE - Low Energy Peripheral Interface Clock Enable - 0 - 1 - read-write - - - CRYPTO - Advanced Encryption Standard Accelerator Clock Enable - 1 - 1 - read-write - - - GPIO - General purpose Input/Output Clock Enable - 2 - 1 - read-write - - - PRS - Peripheral Reflex System Clock Enable - 3 - 1 - read-write - - - LDMA - Linked Direct Memory Access Controller Clock Enable - 4 - 1 - read-write - - - GPCRC - General Purpose CRC Clock Enable - 5 - 1 - read-write - - - - - HFPERCLKEN0 - High Frequency Peripheral Clock Enable Register 0 - 0xc0 - 32 - read-write - 0x00000000 - 0x000003ff - - - TIMER0 - Timer 0 Clock Enable - 0 - 1 - read-write - - - TIMER1 - Timer 1 Clock Enable - 1 - 1 - read-write - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 Clock Enable - 2 - 1 - read-write - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 Clock Enable - 3 - 1 - read-write - - - ACMP0 - Analog Comparator 0 Clock Enable - 4 - 1 - read-write - - - ACMP1 - Analog Comparator 1 Clock Enable - 5 - 1 - read-write - - - CRYOTIMER - CryoTimer Clock Enable - 6 - 1 - read-write - - - I2C0 - I2C 0 Clock Enable - 7 - 1 - read-write - - - ADC0 - Analog to Digital Converter 0 Clock Enable - 8 - 1 - read-write - - - IDAC0 - Current Digital to Analog Converter 0 Clock Enable - 9 - 1 - read-write - - - - - LFACLKEN0 - Low Frequency A Clock Enable Register 0 (Async Reg) - 0xe0 - 32 - read-write - 0x00000000 - 0x00000001 - - - LETIMER0 - Low Energy Timer 0 Clock Enable - 0 - 1 - read-write - - - - - LFBCLKEN0 - Low Frequency B Clock Enable Register 0 (Async Reg) - 0xe8 - 32 - read-write - 0x00000000 - 0x00000001 - - - LEUART0 - Low Energy UART 0 Clock Enable - 0 - 1 - read-write - - - - - LFECLKEN0 - Low Frequency E Clock Enable Register 0 (Async Reg) - 0xf0 - 32 - read-write - 0x00000000 - 0x00000001 - - - RTCC - Real-Time Counter and Calendar Clock Enable - 0 - 1 - read-write - - - - - HFPRESC - High Frequency Clock Prescaler Register - 0x100 - 32 - read-write - 0x00000000 - 0x01001f00 - - - PRESC - HFCLK Prescaler - 8 - 5 - read-write - - - NODIVISION - "" - 0x00000000 - - - - - HFCLKLEPRESC - HFCLKLE prescaler - 24 - 1 - read-write - - - DIV2 - HFCLKLE is HFBUSCLKLE divided by 2. - 0x00000000 - - - DIV4 - HFCLKLE is HFBUSCLKLE divided by 4. - 0x00000001 - - - - - - - HFCOREPRESC - High Frequency Core Clock Prescaler Register - 0x108 - 32 - read-write - 0x00000000 - 0x0001ff00 - - - PRESC - HFCORECLK Prescaler - 8 - 9 - read-write - - - NODIVISION - "" - 0x00000000 - - - - - - - HFPERPRESC - High Frequency Peripheral Clock Prescaler Register - 0x10c - 32 - read-write - 0x00000000 - 0x0001ff00 - - - PRESC - HFPERCLK Prescaler - 8 - 9 - read-write - - - NODIVISION - "" - 0x00000000 - - - - - - - HFEXPPRESC - High Frequency Export Clock Prescaler Register - 0x114 - 32 - read-write - 0x00000000 - 0x00001f00 - - - PRESC - HFEXPCLK Prescaler - 8 - 5 - read-write - - - NODIVISION - "" - 0x00000000 - - - - - - - LFAPRESC0 - Low Frequency A Prescaler Register 0 (Async Reg) - 0x120 - 32 - read-write - 0x00000000 - 0x0000000f - - - LETIMER0 - Low Energy Timer 0 Prescaler - 0 - 4 - read-write - - - DIV1 - LFACLKLETIMER0 = LFACLK - 0x00000000 - - - DIV2 - LFACLKLETIMER0 = LFACLK/2 - 0x00000001 - - - DIV4 - LFACLKLETIMER0 = LFACLK/4 - 0x00000002 - - - DIV8 - LFACLKLETIMER0 = LFACLK/8 - 0x00000003 - - - DIV16 - LFACLKLETIMER0 = LFACLK/16 - 0x00000004 - - - DIV32 - LFACLKLETIMER0 = LFACLK/32 - 0x00000005 - - - DIV64 - LFACLKLETIMER0 = LFACLK/64 - 0x00000006 - - - DIV128 - LFACLKLETIMER0 = LFACLK/128 - 0x00000007 - - - DIV256 - LFACLKLETIMER0 = LFACLK/256 - 0x00000008 - - - DIV512 - LFACLKLETIMER0 = LFACLK/512 - 0x00000009 - - - DIV1024 - LFACLKLETIMER0 = LFACLK/1024 - 0x0000000a - - - DIV2048 - LFACLKLETIMER0 = LFACLK/2048 - 0x0000000b - - - DIV4096 - LFACLKLETIMER0 = LFACLK/4096 - 0x0000000c - - - DIV8192 - LFACLKLETIMER0 = LFACLK/8192 - 0x0000000d - - - DIV16384 - LFACLKLETIMER0 = LFACLK/16384 - 0x0000000e - - - DIV32768 - LFACLKLETIMER0 = LFACLK/32768 - 0x0000000f - - - - - - - LFBPRESC0 - Low Frequency B Prescaler Register 0 (Async Reg) - 0x128 - 32 - read-write - 0x00000000 - 0x00000003 - - - LEUART0 - Low Energy UART 0 Prescaler - 0 - 2 - read-write - - - DIV1 - LFBCLKLEUART0 = LFBCLK - 0x00000000 - - - DIV2 - LFBCLKLEUART0 = LFBCLK/2 - 0x00000001 - - - DIV4 - LFBCLKLEUART0 = LFBCLK/4 - 0x00000002 - - - DIV8 - LFBCLKLEUART0 = LFBCLK/8 - 0x00000003 - - - - - - - LFEPRESC0 - Low Frequency E Prescaler Register 0 (Async Reg) - 0x130 - 32 - read-write - 0x00000000 - 0x0000000f - - - RTCC - Real-Time Counter and Calendar Prescaler - 0 - 4 - read-only - - - DIV1 - LFECLKRTCC = LFECLK - 0x00000000 - - - - - - - SYNCBUSY - Synchronization Busy Register - 0x140 - 32 - read-only - 0x00000000 - 0x3f050055 - - - LFACLKEN0 - Low Frequency A Clock Enable 0 Busy - 0 - 1 - read-only - - - LFAPRESC0 - Low Frequency A Prescaler 0 Busy - 2 - 1 - read-only - - - LFBCLKEN0 - Low Frequency B Clock Enable 0 Busy - 4 - 1 - read-only - - - LFBPRESC0 - Low Frequency B Prescaler 0 Busy - 6 - 1 - read-only - - - LFECLKEN0 - Low Frequency E Clock Enable 0 Busy - 16 - 1 - read-only - - - LFEPRESC0 - Low Frequency E Prescaler 0 Busy - 18 - 1 - read-only - - - HFRCOBSY - HFRCO Busy - 24 - 1 - read-only - - - AUXHFRCOBSY - AUXHFRCO Busy - 25 - 1 - read-only - - - LFRCOBSY - LFRCO Busy - 26 - 1 - read-only - - - LFRCOVREFBSY - LFRCO VREF Busy - 27 - 1 - read-only - - - HFXOBSY - HFXO Busy - 28 - 1 - read-only - - - LFXOBSY - LFXO Busy - 29 - 1 - read-only - - - - - FREEZE - Freeze Register - 0x144 - 32 - read-write - 0x00000000 - 0x00000001 - - - REGFREEZE - Register Update Freeze - 0 - 1 - read-write - - - - - PCNTCTRL - PCNT Control Register - 0x150 - 32 - read-write - 0x00000000 - 0x00000003 - - - PCNT0CLKEN - PCNT0 Clock Enable - 0 - 1 - read-write - - - PCNT0CLKSEL - PCNT0 Clock Select - 1 - 1 - read-write - - - - - ADCCTRL - ADC Control Register - 0x15c - 32 - read-write - 0x00000000 - 0x00000130 - - - ADC0CLKSEL - ADC0 Clock Select - 4 - 2 - read-write - - - DISABLED - ADC0 is not clocked - 0x00000000 - - - AUXHFRCO - AUXHFRCO is clocking ADC0 - 0x00000001 - - - HFXO - HFXO is clocking ADC0 - 0x00000002 - - - HFSRCCLK - HFSRCCLK is clocking ADC0 - 0x00000003 - - - - - ADC0CLKINV - Invert clock selected by ADC0CLKSEL - 8 - 1 - read-write - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x170 - 32 - read-write - 0x00000000 - 0x00000003 - - - CLKOUT0PEN - CLKOUT0 Pin Enable - 0 - 1 - read-write - - - CLKOUT1PEN - CLKOUT1 Pin Enable - 1 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x174 - 32 - read-write - 0x00000000 - 0x00003f3f - - - CLKOUT0LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - - - CLKOUT1LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - - - - - LOCK - Configuration Lock Register - 0x180 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - Configuration Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - - - CRYPTO - 1.6 - CRYPTO - 0x400f0000 - - 0 - 0x00000400 - registers - - - CRYPTO - 25 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0xb333c407 - - - AES - AES Mode - 0 - 1 - read-write - - - KEYBUFDIS - Key Buffer Disable - 1 - 1 - read-write - - - SHA - SHA Mode - 2 - 1 - read-write - - - NOBUSYSTALL - No Stalling of Bus When Busy - 10 - 1 - read-write - - - INCWIDTH - Increment Width - 14 - 2 - read-write - - - INCWIDTH1 - Byte 15 in DATA1 is used for the increment function. - 0x00000000 - - - INCWIDTH2 - Bytes 14 and 15 in DATA1 are used for the increment function. - 0x00000001 - - - INCWIDTH3 - Bytes 13 to 15 in DATA1 are used for the increment function. - 0x00000002 - - - INCWIDTH4 - Bytes 12 to 15 in DATA1 are used for the increment function. - 0x00000003 - - - - - DMA0MODE - DMA0 Read Mode - 16 - 2 - read-write - - - FULL - Target register is fully read/written during every DMA transaction - 0x00000000 - - - LENLIMIT - Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + necessary zero padding is read. Zero padding is automatically added when writing. - 0x00000001 - - - FULLBYTE - Target register is fully read/written during every DMA transaction. Bytewise DMA. - 0x00000002 - - - LENLIMITBYTE - Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + necessary zero padding is read. Bytewise DMA. Zero padding is automatically added when writing. - 0x00000003 - - - - - DMA0RSEL - DMA0 Read Register Select - 20 - 2 - read-write - - - DATA0 - "" - 0x00000000 - - - DDATA0 - "" - 0x00000001 - - - DDATA0BIG - "" - 0x00000002 - - - QDATA0 - "" - 0x00000003 - - - - - DMA1MODE - DMA1 Read Mode - 24 - 2 - read-write - - - FULL - Target register is fully read/written during every DMA transaction - 0x00000000 - - - LENLIMIT - Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + 1 bytes + necessary zero padding is read. Zero padding is automatically added when writing. - 0x00000001 - - - FULLBYTE - Target register is fully read/written during every DMA transaction. Bytewise DMA. - 0x00000002 - - - LENLIMITBYTE - Length Limited. When the current length, i.e. LENGTHA or LENGTHB indicates that there are less bytes available than the register size, only length + 1 bytes + necessary zero padding is read. Bytewise DMA. Zero padding is automatically added when writing. - 0x00000003 - - - - - DMA1RSEL - DATA0 DMA Unaligned Read Register Select - 28 - 2 - read-write - - - DATA1 - "" - 0x00000000 - - - DDATA1 - "" - 0x00000001 - - - QDATA1 - "" - 0x00000002 - - - QDATA1BIG - "" - 0x00000003 - - - - - COMBDMA0WEREQ - Combined Data0 Write DMA Request - 31 - 1 - read-write - - - - - WAC - Wide Arithmetic Configuration - 0x4 - 32 - read-write - 0x00000000 - 0x00000f1f - - - MODULUS - Modular Operation Modulus - 0 - 4 - read-write - - - BIN256 - Generic modulus. p = 2^256 - 0x00000000 - - - BIN128 - Generic modulus. p = 2^128 - 0x00000001 - - - ECCBIN233P - Modulus for B-233 and K-233 ECC curves. p(t) = t^233 + t^74 + 1 - 0x00000002 - - - ECCBIN163P - Modulus for B-163 and K-163 ECC curves. p(t) = t^163 + t^7 + t^6 + t^3 + 1 - 0x00000003 - - - GCMBIN128 - Modulus for GCM. P(t) = t^128 + t^7 + t^2 + t + 1 - 0x00000004 - - - ECCPRIME256P - Modulus for P-256 ECC curve. p = 2^256 - 2^224 + 2^192 + 2^96 - 1 - 0x00000005 - - - ECCPRIME224P - Modulus for P-224 ECC curve. p = 2^224 - 2^96 - 1 - 0x00000006 - - - ECCPRIME192P - Modulus for P-192 ECC curve. p = 2^192 - 2^64 - 1 - 0x00000007 - - - ECCBIN233N - P modulus for B-233 ECC curve - 0x00000008 - - - ECCBIN233KN - P modulus for K-233 ECC curve - 0x00000009 - - - ECCBIN163N - P modulus for B-163 ECC curve - 0x0000000a - - - ECCBIN163KN - P modulus for K-163 ECC curve - 0x0000000b - - - ECCPRIME256N - P modulus for P-256 ECC curve - 0x0000000c - - - ECCPRIME224N - P modulus for P-224 ECC curve - 0x0000000d - - - ECCPRIME192N - P modulus for P-192 ECC curve - 0x0000000e - - - - - MODOP - Modular Operation Field Type - 4 - 1 - read-write - - - MULWIDTH - Multiply Width - 8 - 2 - read-write - - - MUL256 - Multiply 256 bits - 0x00000000 - - - MUL128 - Multiply 128 bits - 0x00000001 - - - MULMOD - Same number of bits as specified by MODULUS - 0x00000002 - - - - - RESULTWIDTH - Result Width - 10 - 2 - read-write - - - 256BIT - Results have 256 bits - 0x00000000 - - - 128BIT - Results have 128 bits - 0x00000001 - - - 260BIT - Results have 260 bits. Upper bits of result can be read through DDATA0MSBS in CRYPTO_STATUS - 0x00000002 - - - - - - - CMD - Command Register - 0x8 - 32 - read-write - 0x00000000 - 0x00000eff - - - INSTR - Execute Instruction - 0 - 8 - read-write - - - SEQSTART - Encryption/Decryption SEQUENCE Start - 9 - 1 - write-only - - - SEQSTOP - Sequence Stop - 10 - 1 - write-only - - - SEQSTEP - Sequence Step - 11 - 1 - write-only - - - - - STATUS - Status Register - 0x10 - 32 - read-only - 0x00000000 - 0x00000007 - - - SEQRUNNING - AES SEQUENCE Running - 0 - 1 - read-only - - - INSTRRUNNING - Action is active - 1 - 1 - read-only - - - DMAACTIVE - DMA Action is active - 2 - 1 - read-only - - - - - DSTATUS - Data Status Register - 0x14 - 32 - read-only - 0x00000000 - 0x011f0f0f - - - DATA0ZERO - Data 0 Zero - 0 - 4 - read-only - - - ZERO0TO31 - In DATA0 bits 0 to 31 are all zero. - 0x00000001 - - - ZERO32TO63 - In DATA0 bits 32 to 63 are all zero. - 0x00000002 - - - ZERO64TO95 - In DATA0 bits 64 to 95 are all zero. - 0x00000004 - - - ZERO96TO127 - In DATA0 bits 96 to 127 are all zero. - 0x00000008 - - - - - DDATA0LSBS - LSBs in DDATA0 - 8 - 4 - read-only - - - DDATA0MSBS - MSB in DDATA0 - 16 - 4 - read-only - - - DDATA1MSB - MSB in DDATA1 - 20 - 1 - read-only - - - CARRY - Carry From Arithmetic Operation - 24 - 1 - read-only - - - - - CSTATUS - Control Status Register - 0x18 - 32 - read-only - 0x00000201 - 0x01f30707 - - - V0 - Selected ALU Operand 0 - 0 - 3 - read-only - - - DDATA0 - "" - 0x00000000 - - - DDATA1 - "" - 0x00000001 - - - DDATA2 - "" - 0x00000002 - - - DDATA3 - "" - 0x00000003 - - - DDATA4 - "" - 0x00000004 - - - DATA0 - "" - 0x00000005 - - - DATA1 - "" - 0x00000006 - - - DATA2 - "" - 0x00000007 - - - - - V1 - Selected ALU Operand 1 - 8 - 3 - read-only - - - DDATA0 - "" - 0x00000000 - - - DDATA1 - "" - 0x00000001 - - - DDATA2 - "" - 0x00000002 - - - DDATA3 - "" - 0x00000003 - - - DDATA4 - "" - 0x00000004 - - - DATA0 - "" - 0x00000005 - - - DATA1 - "" - 0x00000006 - - - DATA2 - "" - 0x00000007 - - - - - SEQPART - Sequence Part - 16 - 1 - read-only - - - SEQSKIP - Sequence Skip Next Instruction - 17 - 1 - read-only - - - SEQIP - Sequence Next Instruction Pointer - 20 - 5 - read-only - - - - - KEY - KEY Register Access - 0x20 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - KEY - Key Access - 0 - 32 - read-write - - - - - KEYBUF - KEY Buffer Register Access - 0x24 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - KEYBUF - Key Buffer Access - 0 - 32 - read-write - - - - - SEQCTRL - Sequence Control - 0x30 - 32 - read-write - 0x00000000 - 0xbf303fff - - - LENGTHA - Buffer length A in bytes - 0 - 14 - read-write - - - BLOCKSIZE - Size of data blocks - 20 - 2 - read-write - - - 16BYTES - A block is 16 bytes long - 0x00000000 - - - 32BYTES - A block is 32 bytes long - 0x00000001 - - - 64BYTES - A block is 64 bytes long - 0x00000002 - - - - - DMA0SKIP - DMA0 Skip - 24 - 2 - read-write - - - DMA1SKIP - DMA1 Skip - 26 - 2 - read-write - - - DMA0PRESA - DMA0 Preserve A - 28 - 1 - read-write - - - DMA1PRESA - DMA1 Preserve A - 29 - 1 - read-write - - - HALT - Halt Sequence - 31 - 1 - read-write - - - - - SEQCTRLB - Sequence Control B - 0x34 - 32 - read-write - 0x00000000 - 0x30003fff - - - LENGTHB - Buffer length B in bytes - 0 - 14 - read-write - - - DMA0PRESB - DMA0 Preserve B - 28 - 1 - read-write - - - DMA1PRESB - DMA1 Preserve B - 29 - 1 - read-write - - - - - IF - AES Interrupt Flags - 0x40 - 32 - read-only - 0x00000000 - 0x00000003 - - - INSTRDONE - Instruction done - 0 - 1 - read-only - - - SEQDONE - Sequence Done - 1 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x44 - 32 - write-only - 0x00000000 - 0x0000000f - - - INSTRDONE - Set INSTRDONE Interrupt Flag - 0 - 1 - write-only - - - SEQDONE - Set SEQDONE Interrupt Flag - 1 - 1 - write-only - - - BUFOF - Set BUFOF Interrupt Flag - 2 - 1 - write-only - - - BUFUF - Set BUFUF Interrupt Flag - 3 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x48 - 32 - write-only - 0x00000000 - 0x0000000f - - - INSTRDONE - Clear INSTRDONE Interrupt Flag - 0 - 1 - write-only - - - SEQDONE - Clear SEQDONE Interrupt Flag - 1 - 1 - write-only - - - BUFOF - Clear BUFOF Interrupt Flag - 2 - 1 - write-only - - - BUFUF - Clear BUFUF Interrupt Flag - 3 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x4c - 32 - read-write - 0x00000000 - 0x0000000f - - - INSTRDONE - INSTRDONE Interrupt Enable - 0 - 1 - read-write - - - SEQDONE - SEQDONE Interrupt Enable - 1 - 1 - read-write - - - BUFOF - BUFOF Interrupt Enable - 2 - 1 - read-write - - - BUFUF - BUFUF Interrupt Enable - 3 - 1 - read-write - - - - - SEQ0 - Sequence register 0 - 0x50 - 32 - read-write - 0x00000000 - 0xffffffff - - - INSTR0 - Sequence Instruction 0 - 0 - 8 - read-write - - - INSTR1 - Sequence Instruction 1 - 8 - 8 - read-write - - - INSTR2 - Sequence Instruction 2 - 16 - 8 - read-write - - - INSTR3 - Sequence Instruction 3 - 24 - 8 - read-write - - - - - SEQ1 - Sequence Register 1 - 0x54 - 32 - read-write - 0x00000000 - 0xffffffff - - - INSTR4 - Sequence Instruction 4 - 0 - 8 - read-write - - - INSTR5 - Sequence Instruction 5 - 8 - 8 - read-write - - - INSTR6 - Sequence Instruction 6 - 16 - 8 - read-write - - - INSTR7 - Sequence Instruction 7 - 24 - 8 - read-write - - - - - SEQ2 - Sequence Register 2 - 0x58 - 32 - read-write - 0x00000000 - 0xffffffff - - - INSTR8 - Sequence Instruction 8 - 0 - 8 - read-write - - - INSTR9 - Sequence Instruction 9 - 8 - 8 - read-write - - - INSTR10 - Sequence Instruction 10 - 16 - 8 - read-write - - - INSTR11 - Sequence Instruction 11 - 24 - 8 - read-write - - - - - SEQ3 - Sequence Register 3 - 0x5c - 32 - read-write - 0x00000000 - 0xffffffff - - - INSTR12 - Sequence Instruction 12 - 0 - 8 - read-write - - - INSTR13 - Sequence Instruction 13 - 8 - 8 - read-write - - - INSTR14 - Sequence Instruction 14 - 16 - 8 - read-write - - - INSTR15 - Sequence Instruction 15 - 24 - 8 - read-write - - - - - SEQ4 - Sequence Register 4 - 0x60 - 32 - read-write - 0x00000000 - 0xffffffff - - - INSTR16 - Sequence Instruction 16 - 0 - 8 - read-write - - - INSTR17 - Sequence Instruction 17 - 8 - 8 - read-write - - - INSTR18 - Sequence Instruction 18 - 16 - 8 - read-write - - - INSTR19 - Sequence Instruction 19 - 24 - 8 - read-write - - - - - DATA0 - DATA0 Register Access - 0x80 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DATA0 - Data 0 Access - 0 - 32 - read-write - - - - - DATA1 - DATA1 Register Access - 0x84 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DATA1 - Data 1 Access - 0 - 32 - read-write - - - - - DATA2 - DATA2 Register Access - 0x88 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DATA2 - Data 2 Access - 0 - 32 - read-write - - - - - DATA3 - DATA3 Register Access - 0x8c - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DATA3 - Data 3 Access - 0 - 32 - read-write - - - - - DATA0XOR - DATA0XOR Register Access - 0xa0 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DATA0XOR - XOR Data 0 Access - 0 - 32 - read-write - - - - - DATA0BYTE - DATA0 Register Byte Access - 0xb0 - 32 - read-write - 0x00000000 - 0x000000ff - modifyExternal - - - DATA0BYTE - Data 0 Byte Access - 0 - 8 - read-write - - - - - DATA1BYTE - DATA1 Register Byte Access - 0xb4 - 32 - read-write - 0x00000000 - 0x000000ff - modifyExternal - - - DATA1BYTE - Data 1 Byte Access - 0 - 8 - read-write - - - - - DATA0XORBYTE - DATA0 Register Byte XOR Access - 0xbc - 32 - read-write - 0x00000000 - 0x000000ff - modifyExternal - - - DATA0XORBYTE - Data 0 XOR Byte Access - 0 - 8 - read-write - - - - - DATA0BYTE12 - DATA0 Register Byte 12 Access - 0xc0 - 32 - read-write - 0x00000000 - 0x000000ff - - - DATA0BYTE12 - Data 0 Byte 12 Access - 0 - 8 - read-write - - - - - DATA0BYTE13 - DATA0 Register Byte 13 Access - 0xc4 - 32 - read-write - 0x00000000 - 0x000000ff - - - DATA0BYTE13 - Data 0 Byte 13 Access - 0 - 8 - read-write - - - - - DATA0BYTE14 - DATA0 Register Byte 14 Access - 0xc8 - 32 - read-write - 0x00000000 - 0x000000ff - - - DATA0BYTE14 - Data 0 Byte 14 Access - 0 - 8 - read-write - - - - - DATA0BYTE15 - DATA0 Register Byte 15 Access - 0xcc - 32 - read-write - 0x00000000 - 0x000000ff - - - DATA0BYTE15 - Data 0 Byte 15 Access - 0 - 8 - read-write - - - - - DDATA0 - DDATA0 Register Access - 0x100 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DDATA0 - Double Data 0 Access - 0 - 32 - read-write - - - - - DDATA1 - DDATA1 Register Access - 0x104 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DDATA1 - Double Data 0 Access - 0 - 32 - read-write - - - - - DDATA2 - DDATA2 Register Access - 0x108 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DDATA2 - Double Data 0 Access - 0 - 32 - read-write - - - - - DDATA3 - DDATA3 Register Access - 0x10c - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DDATA3 - Double Data 0 Access - 0 - 32 - read-write - - - - - DDATA4 - DDATA4 Register Access - 0x110 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DDATA4 - Double Data 0 Access - 0 - 32 - read-write - - - - - DDATA0BIG - DDATA0 Register Big Endian Access - 0x130 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - DDATA0BIG - Double Data 0 Big Endian Access - 0 - 32 - read-write - - - - - DDATA0BYTE - DDATA0 Register Byte Access - 0x140 - 32 - read-write - 0x00000000 - 0x000000ff - modifyExternal - - - DDATA0BYTE - Ddata 0 Byte Access - 0 - 8 - read-write - - - - - DDATA1BYTE - DDATA1 Register Byte Access - 0x144 - 32 - read-write - 0x00000000 - 0x000000ff - modifyExternal - - - DDATA1BYTE - Ddata 1 Byte Access - 0 - 8 - read-write - - - - - DDATA0BYTE32 - DDATA0 Register Byte 32 access. - 0x148 - 32 - read-write - 0x00000000 - 0x0000000f - - - DDATA0BYTE32 - Ddata 0 Byte 32 Access - 0 - 4 - read-write - - - - - QDATA0 - QDATA0 Register Access - 0x180 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - QDATA0 - Quad Data 0 Access - 0 - 32 - read-write - - - - - QDATA1 - QDATA1 Register Access - 0x184 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - QDATA1 - Quad Data 1 Access - 0 - 32 - read-write - - - - - QDATA1BIG - QDATA1 Register Big Endian Access - 0x1a4 - 32 - read-write - 0x00000000 - 0xffffffff - modifyExternal - - - QDATA1BIG - Quad Data 1 Big Endian Access - 0 - 32 - read-write - - - - - QDATA0BYTE - QDATA0 Register Byte Access - 0x1c0 - 32 - read-write - 0x00000000 - 0x000000ff - modifyExternal - - - QDATA0BYTE - Qdata 0 Byte Access - 0 - 8 - read-write - - - - - QDATA1BYTE - QDATA1 Register Byte Access - 0x1c4 - 32 - read-write - 0x00000000 - 0x000000ff - modifyExternal - - - QDATA1BYTE - Qdata 1 Byte Access - 0 - 8 - read-write - - - - - - - GPIO - 1.6 - GPIO - 0x4000a000 - - 0 - 0x00001000 - registers - - - GPIO_EVEN - 9 - - - GPIO_ODD - 17 - - - - PA_CTRL - Port Control Register - 0x0 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PA_MODEL - Port Pin Mode Low Register - 0x4 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PA_MODEH - Port Pin Mode High Register - 0x8 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PA_DOUT - Port Data Out Register - 0xc - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PA_DOUTTGL - Port Data Out Toggle Register - 0x18 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PA_DIN - Port Data In Register - 0x1c - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PA_PINLOCKN - Port Unlocked Pins Register - 0x20 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PA_OVTDIS - Over Voltage Disable for all modes - 0x28 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PB_CTRL - Port Control Register - 0x30 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PB_MODEL - Port Pin Mode Low Register - 0x34 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PB_MODEH - Port Pin Mode High Register - 0x38 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PB_DOUT - Port Data Out Register - 0x3c - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PB_DOUTTGL - Port Data Out Toggle Register - 0x48 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PB_DIN - Port Data In Register - 0x4c - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PB_PINLOCKN - Port Unlocked Pins Register - 0x50 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PB_OVTDIS - Over Voltage Disable for all modes - 0x58 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PC_CTRL - Port Control Register - 0x60 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PC_MODEL - Port Pin Mode Low Register - 0x64 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PC_MODEH - Port Pin Mode High Register - 0x68 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PC_DOUT - Port Data Out Register - 0x6c - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PC_DOUTTGL - Port Data Out Toggle Register - 0x78 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PC_DIN - Port Data In Register - 0x7c - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PC_PINLOCKN - Port Unlocked Pins Register - 0x80 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PC_OVTDIS - Over Voltage Disable for all modes - 0x88 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PD_CTRL - Port Control Register - 0x90 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PD_MODEL - Port Pin Mode Low Register - 0x94 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PD_MODEH - Port Pin Mode High Register - 0x98 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PD_DOUT - Port Data Out Register - 0x9c - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PD_DOUTTGL - Port Data Out Toggle Register - 0xa8 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PD_DIN - Port Data In Register - 0xac - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PD_PINLOCKN - Port Unlocked Pins Register - 0xb0 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PD_OVTDIS - Over Voltage Disable for all modes - 0xb8 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PE_CTRL - Port Control Register - 0xc0 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PE_MODEL - Port Pin Mode Low Register - 0xc4 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PE_MODEH - Port Pin Mode High Register - 0xc8 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PE_DOUT - Port Data Out Register - 0xcc - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PE_DOUTTGL - Port Data Out Toggle Register - 0xd8 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PE_DIN - Port Data In Register - 0xdc - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PE_PINLOCKN - Port Unlocked Pins Register - 0xe0 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PE_OVTDIS - Over Voltage Disable for all modes - 0xe8 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PF_CTRL - Port Control Register - 0xf0 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PF_MODEL - Port Pin Mode Low Register - 0xf4 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PF_MODEH - Port Pin Mode High Register - 0xf8 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PF_DOUT - Port Data Out Register - 0xfc - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PF_DOUTTGL - Port Data Out Toggle Register - 0x108 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PF_DIN - Port Data In Register - 0x10c - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PF_PINLOCKN - Port Unlocked Pins Register - 0x110 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PF_OVTDIS - Over Voltage Disable for all modes - 0x118 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PG_CTRL - Port Control Register - 0x120 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PG_MODEL - Port Pin Mode Low Register - 0x124 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PG_MODEH - Port Pin Mode High Register - 0x128 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PG_DOUT - Port Data Out Register - 0x12c - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PG_DOUTTGL - Port Data Out Toggle Register - 0x138 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PG_DIN - Port Data In Register - 0x13c - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PG_PINLOCKN - Port Unlocked Pins Register - 0x140 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PG_OVTDIS - Over Voltage Disable for all modes - 0x148 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PH_CTRL - Port Control Register - 0x150 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PH_MODEL - Port Pin Mode Low Register - 0x154 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PH_MODEH - Port Pin Mode High Register - 0x158 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PH_DOUT - Port Data Out Register - 0x15c - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PH_DOUTTGL - Port Data Out Toggle Register - 0x168 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PH_DIN - Port Data In Register - 0x16c - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PH_PINLOCKN - Port Unlocked Pins Register - 0x170 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PH_OVTDIS - Over Voltage Disable for all modes - 0x178 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PI_CTRL - Port Control Register - 0x180 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PI_MODEL - Port Pin Mode Low Register - 0x184 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PI_MODEH - Port Pin Mode High Register - 0x188 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PI_DOUT - Port Data Out Register - 0x18c - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PI_DOUTTGL - Port Data Out Toggle Register - 0x198 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PI_DIN - Port Data In Register - 0x19c - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PI_PINLOCKN - Port Unlocked Pins Register - 0x1a0 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PI_OVTDIS - Over Voltage Disable for all modes - 0x1a8 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PJ_CTRL - Port Control Register - 0x1b0 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PJ_MODEL - Port Pin Mode Low Register - 0x1b4 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PJ_MODEH - Port Pin Mode High Register - 0x1b8 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PJ_DOUT - Port Data Out Register - 0x1bc - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PJ_DOUTTGL - Port Data Out Toggle Register - 0x1c8 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PJ_DIN - Port Data In Register - 0x1cc - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PJ_PINLOCKN - Port Unlocked Pins Register - 0x1d0 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PJ_OVTDIS - Over Voltage Disable for all modes - 0x1d8 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PK_CTRL - Port Control Register - 0x1e0 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PK_MODEL - Port Pin Mode Low Register - 0x1e4 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PK_MODEH - Port Pin Mode High Register - 0x1e8 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PK_DOUT - Port Data Out Register - 0x1ec - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PK_DOUTTGL - Port Data Out Toggle Register - 0x1f8 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PK_DIN - Port Data In Register - 0x1fc - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PK_PINLOCKN - Port Unlocked Pins Register - 0x200 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PK_OVTDIS - Over Voltage Disable for all modes - 0x208 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - PL_CTRL - Port Control Register - 0x210 - 32 - read-write - 0x00600060 - 0x10711071 - - - DRIVESTRENGTH - Drive strength for port - 0 - 1 - read-write - - - SLEWRATE - Slewrate limit for port - 4 - 3 - read-write - - - DINDIS - Data In Disable - 12 - 1 - read-write - - - DRIVESTRENGTHALT - Alternate drive strength for port - 16 - 1 - read-write - - - SLEWRATEALT - Alternate slewrate limit for port - 20 - 3 - read-write - - - DINDISALT - Alternate Data In Disable - 28 - 1 - read-write - - - - - PL_MODEL - Port Pin Mode Low Register - 0x214 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE0 - Pin 0 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE1 - Pin 1 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE2 - Pin 2 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE3 - Pin 3 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE4 - Pin 4 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE5 - Pin 5 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE6 - Pin 6 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE7 - Pin 7 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PL_MODEH - Port Pin Mode High Register - 0x218 - 32 - read-write - 0x00000000 - 0xffffffff - - - MODE8 - Pin 8 Mode - 0 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE9 - Pin 9 Mode - 4 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE10 - Pin 10 Mode - 8 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE11 - Pin 11 Mode - 12 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE12 - Pin 12 Mode - 16 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE13 - Pin 13 Mode - 20 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE14 - Pin 14 Mode - 24 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - MODE15 - Pin 15 Mode - 28 - 4 - read-write - - - DISABLED - Input disabled. Pullup if DOUT is set. - 0x00000000 - - - INPUT - Input enabled. Filter if DOUT is set - 0x00000001 - - - INPUTPULL - Input enabled. DOUT determines pull direction - 0x00000002 - - - INPUTPULLFILTER - Input enabled with filter. DOUT determines pull direction - 0x00000003 - - - PUSHPULL - Push-pull output - 0x00000004 - - - PUSHPULLALT - Push-pull using alternate control - 0x00000005 - - - WIREDOR - Wired-or output - 0x00000006 - - - WIREDORPULLDOWN - Wired-or output with pull-down - 0x00000007 - - - WIREDAND - Open-drain output - 0x00000008 - - - WIREDANDFILTER - Open-drain output with filter - 0x00000009 - - - WIREDANDPULLUP - Open-drain output with pullup - 0x0000000a - - - WIREDANDPULLUPFILTER - Open-drain output with filter and pullup - 0x0000000b - - - WIREDANDALT - Open-drain output using alternate control - 0x0000000c - - - WIREDANDALTFILTER - Open-drain output using alternate control with filter - 0x0000000d - - - WIREDANDALTPULLUP - Open-drain output using alternate control with pullup - 0x0000000e - - - WIREDANDALTPULLUPFILTER - Open-drain output uisng alternate control with filter and pullup - 0x0000000f - - - - - - - PL_DOUT - Port Data Out Register - 0x21c - 32 - read-write - 0x00000000 - 0x0000ffff - - - DOUT - Data Out - 0 - 16 - read-write - - - - - PL_DOUTTGL - Port Data Out Toggle Register - 0x228 - 32 - write-only - 0x00000000 - 0x0000ffff - - - DOUTTGL - Data Out Toggle - 0 - 16 - write-only - - - - - PL_DIN - Port Data In Register - 0x22c - 32 - read-only - 0x00000000 - 0x0000ffff - - - DIN - Data In - 0 - 16 - read-only - - - - - PL_PINLOCKN - Port Unlocked Pins Register - 0x230 - 32 - read-write - 0x0000ffff - 0x0000ffff - - - PINLOCKN - Unlocked Pins - 0 - 16 - read-write - - - - - PL_OVTDIS - Over Voltage Disable for all modes - 0x238 - 32 - read-write - 0x00000000 - 0x0000ffff - - - OVTDIS - Disable Over Voltage capability - 0 - 16 - read-write - - - - - EXTIPSELL - External Interrupt Port Select Low Register - 0x400 - 32 - read-write - 0x00000000 - 0xffffffff - - - EXTIPSEL0 - External Interrupt 0 Port Select - 0 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 0 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 0 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 0 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 0 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 0 - 0x00000005 - - - - - EXTIPSEL1 - External Interrupt 1 Port Select - 4 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 1 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 1 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 1 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 1 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 1 - 0x00000005 - - - - - EXTIPSEL2 - External Interrupt 2 Port Select - 8 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 2 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 2 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 2 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 2 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 2 - 0x00000005 - - - - - EXTIPSEL3 - External Interrupt 3 Port Select - 12 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 3 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 3 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 3 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 3 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 3 - 0x00000005 - - - - - EXTIPSEL4 - External Interrupt 4 Port Select - 16 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 4 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 4 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 4 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 4 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 4 - 0x00000005 - - - - - EXTIPSEL5 - External Interrupt 5 Port Select - 20 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 5 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 5 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 5 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 5 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 5 - 0x00000005 - - - - - EXTIPSEL6 - External Interrupt 6 Port Select - 24 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 6 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 6 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 6 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 6 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 6 - 0x00000005 - - - - - EXTIPSEL7 - External Interrupt 7 Port Select - 28 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 7 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 7 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 7 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 7 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 7 - 0x00000005 - - - - - - - EXTIPSELH - External Interrupt Port Select High Register - 0x404 - 32 - read-write - 0x00000000 - 0xffffffff - - - EXTIPSEL8 - External Interrupt 8 Port Select - 0 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 8 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 8 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 8 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 8 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 8 - 0x00000005 - - - - - EXTIPSEL9 - External Interrupt 9 Port Select - 4 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 9 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 9 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 9 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 9 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 9 - 0x00000005 - - - - - EXTIPSEL10 - External Interrupt 10 Port Select - 8 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 10 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 10 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 10 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 10 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 10 - 0x00000005 - - - - - EXTIPSEL11 - External Interrupt 11 Port Select - 12 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 11 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 11 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 11 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 11 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 11 - 0x00000005 - - - - - EXTIPSEL12 - External Interrupt 12 Port Select - 16 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 12 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 12 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 12 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 12 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 12 - 0x00000005 - - - - - EXTIPSEL13 - External Interrupt 13 Port Select - 20 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 13 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 13 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 13 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 13 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 13 - 0x00000005 - - - - - EXTIPSEL14 - External Interrupt 14 Port Select - 24 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 14 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 14 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 14 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 14 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 14 - 0x00000005 - - - - - EXTIPSEL15 - External Interrupt 15 Port Select - 28 - 4 - read-write - - - PORTA - Port A group selected for external interrupt 15 - 0x00000000 - - - PORTB - Port B group selected for external interrupt 15 - 0x00000001 - - - PORTC - Port C group selected for external interrupt 15 - 0x00000002 - - - PORTD - Port D group selected for external interrupt 15 - 0x00000003 - - - PORTF - Port F group selected for external interrupt 15 - 0x00000005 - - - - - - - EXTIPINSELL - External Interrupt Pin Select Low Register - 0x408 - 32 - read-write - 0x32103210 - 0x33333333 - - - EXTIPINSEL0 - External Interrupt 0 Pin Select - 0 - 2 - read-write - - - PIN0 - Pin 0 - 0x00000000 - - - PIN1 - Pin 1 - 0x00000001 - - - PIN2 - Pin 2 - 0x00000002 - - - PIN3 - Pin 3 - 0x00000003 - - - - - EXTIPINSEL1 - External Interrupt 1 Pin Select - 4 - 2 - read-write - - - PIN0 - Pin 0 - 0x00000000 - - - PIN1 - Pin 1 - 0x00000001 - - - PIN2 - Pin 2 - 0x00000002 - - - PIN3 - Pin 3 - 0x00000003 - - - - - EXTIPINSEL2 - External Interrupt 2 Pin Select - 8 - 2 - read-write - - - PIN0 - Pin 0 - 0x00000000 - - - PIN1 - Pin 1 - 0x00000001 - - - PIN2 - Pin 2 - 0x00000002 - - - PIN3 - Pin 3 - 0x00000003 - - - - - EXTIPINSEL3 - External Interrupt 3 Pin Select - 12 - 2 - read-write - - - PIN0 - Pin 0 - 0x00000000 - - - PIN1 - Pin 1 - 0x00000001 - - - PIN2 - Pin 2 - 0x00000002 - - - PIN3 - Pin 3 - 0x00000003 - - - - - EXTIPINSEL4 - External Interrupt 4 Pin Select - 16 - 2 - read-write - - - PIN4 - Pin 4 - 0x00000000 - - - PIN5 - Pin 5 - 0x00000001 - - - PIN6 - Pin 6 - 0x00000002 - - - PIN7 - Pin 7 - 0x00000003 - - - - - EXTIPINSEL5 - External Interrupt 5 Pin Select - 20 - 2 - read-write - - - PIN4 - Pin 4 - 0x00000000 - - - PIN5 - Pin 5 - 0x00000001 - - - PIN6 - Pin 6 - 0x00000002 - - - PIN7 - Pin 7 - 0x00000003 - - - - - EXTIPINSEL6 - External Interrupt 6 Pin Select - 24 - 2 - read-write - - - PIN4 - Pin 4 - 0x00000000 - - - PIN5 - Pin 5 - 0x00000001 - - - PIN6 - Pin 6 - 0x00000002 - - - PIN7 - Pin 7 - 0x00000003 - - - - - EXTIPINSEL7 - External Interrupt 7 Pin Select - 28 - 2 - read-write - - - PIN4 - Pin 4 - 0x00000000 - - - PIN5 - Pin 5 - 0x00000001 - - - PIN6 - Pin 6 - 0x00000002 - - - PIN7 - Pin 7 - 0x00000003 - - - - - - - EXTIPINSELH - External Interrupt Pin Select High Register - 0x40c - 32 - read-write - 0x32103210 - 0x33333333 - - - EXTIPINSEL8 - External Interrupt 8 Pin Select - 0 - 2 - read-write - - - PIN8 - Pin 8 - 0x00000000 - - - PIN9 - Pin 9 - 0x00000001 - - - PIN10 - Pin 10 - 0x00000002 - - - PIN11 - Pin 11 - 0x00000003 - - - - - EXTIPINSEL9 - External Interrupt 9 Pin Select - 4 - 2 - read-write - - - PIN8 - Pin 8 - 0x00000000 - - - PIN9 - Pin 9 - 0x00000001 - - - PIN10 - Pin 10 - 0x00000002 - - - PIN11 - Pin 11 - 0x00000003 - - - - - EXTIPINSEL10 - External Interrupt 10 Pin Select - 8 - 2 - read-write - - - PIN8 - Pin 8 - 0x00000000 - - - PIN9 - Pin 9 - 0x00000001 - - - PIN10 - Pin 10 - 0x00000002 - - - PIN11 - Pin 11 - 0x00000003 - - - - - EXTIPINSEL11 - External Interrupt 11 Pin Select - 12 - 2 - read-write - - - PIN8 - Pin 8 - 0x00000000 - - - PIN9 - Pin 9 - 0x00000001 - - - PIN10 - Pin 10 - 0x00000002 - - - PIN11 - Pin 11 - 0x00000003 - - - - - EXTIPINSEL12 - External Interrupt 12 Pin Select - 16 - 2 - read-write - - - PIN12 - Pin 12 - 0x00000000 - - - PIN13 - Pin 13 - 0x00000001 - - - PIN14 - Pin 14 - 0x00000002 - - - PIN15 - Pin 15 - 0x00000003 - - - - - EXTIPINSEL13 - External Interrupt 13 Pin Select - 20 - 2 - read-write - - - PIN12 - Pin 12 - 0x00000000 - - - PIN13 - Pin 13 - 0x00000001 - - - PIN14 - Pin 14 - 0x00000002 - - - PIN15 - Pin 15 - 0x00000003 - - - - - EXTIPINSEL14 - External Interrupt 14 Pin Select - 24 - 2 - read-write - - - PIN12 - Pin 12 - 0x00000000 - - - PIN13 - Pin 13 - 0x00000001 - - - PIN14 - Pin 14 - 0x00000002 - - - PIN15 - Pin 15 - 0x00000003 - - - - - EXTIPINSEL15 - External Interrupt 15 Pin Select - 28 - 2 - read-write - - - PIN12 - Pin 12 - 0x00000000 - - - PIN13 - Pin 13 - 0x00000001 - - - PIN14 - Pin 14 - 0x00000002 - - - PIN15 - Pin 15 - 0x00000003 - - - - - - - EXTIRISE - External Interrupt Rising Edge Trigger Register - 0x410 - 32 - read-write - 0x00000000 - 0x0000ffff - - - EXTIRISE - External Interrupt n Rising Edge Trigger Enable - 0 - 16 - read-write - - - - - EXTIFALL - External Interrupt Falling Edge Trigger Register - 0x414 - 32 - read-write - 0x00000000 - 0x0000ffff - - - EXTIFALL - External Interrupt n Falling Edge Trigger Enable - 0 - 16 - read-write - - - - - EXTILEVEL - External Interrupt Level Register - 0x418 - 32 - read-write - 0x00000000 - 0x13130000 - - - EM4WU0 - EM4 Wake Up Level for EM4WU0 Pin - 16 - 1 - read-write - - - EM4WU1 - EM4 Wake Up Level for EM4WU1 Pin - 17 - 1 - read-write - - - EM4WU4 - EM4 Wake Up Level for EM4WU4 Pin - 20 - 1 - read-write - - - EM4WU8 - EM4 Wake Up Level for EM4WU8 Pin - 24 - 1 - read-write - - - EM4WU9 - EM4 Wake Up Level for EM4WU9 Pin - 25 - 1 - read-write - - - EM4WU12 - EM4 Wake Up Level for EM4WU12 Pin - 28 - 1 - read-write - - - - - IF - Interrupt Flag Register - 0x41c - 32 - read-only - 0x00000000 - 0xffffffff - - - EXT - External Pin Interrupt Flag - 0 - 16 - read-only - - - EM4WU - EM4 wake up Pin Interrupt Flag - 16 - 16 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x420 - 32 - write-only - 0x00000000 - 0xffffffff - - - EXT - Set EXT Interrupt Flag - 0 - 16 - write-only - - - EM4WU - Set EM4WU Interrupt Flag - 16 - 16 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x424 - 32 - write-only - 0x00000000 - 0xffffffff - - - EXT - Clear EXT Interrupt Flag - 0 - 16 - write-only - - - EM4WU - Clear EM4WU Interrupt Flag - 16 - 16 - write-only - - - - - IEN - Interrupt Enable Register - 0x428 - 32 - read-write - 0x00000000 - 0xffffffff - - - EXT - EXT Interrupt Enable - 0 - 16 - read-write - - - EM4WU - EM4WU Interrupt Enable - 16 - 16 - read-write - - - - - EM4WUEN - EM4 wake up Enable Register - 0x42c - 32 - read-write - 0x00000000 - 0xffff0000 - - - EM4WUEN - EM4 wake up enable - 16 - 16 - read-write - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x440 - 32 - read-write - 0x0000000f - 0x0000001f - - - SWCLKTCKPEN - Serial Wire Clock and JTAG Test Clock Pin Enable - 0 - 1 - read-write - - - SWDIOTMSPEN - Serial Wire Data and JTAG Test Mode Select Pin Enable - 1 - 1 - read-write - - - TDOPEN - JTAG Test Debug Output Pin Enable - 2 - 1 - read-write - - - TDIPEN - JTAG Test Debug Input Pin Enable - 3 - 1 - read-write - - - SWVPEN - Serial Wire Viewer Output Pin Enable - 4 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x444 - 32 - read-write - 0x00000000 - 0x0000003f - - - SWVLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - - - - - INSENSE - Input Sense Register - 0x450 - 32 - read-write - 0x00000003 - 0x00000003 - - - INT - Interrupt Sense Enable - 0 - 1 - read-write - - - EM4WU - EM4WU Interrupt Sense Enable - 1 - 1 - read-write - - - - - LOCK - Configuration Lock Register - 0x454 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - Configuration Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - - - PRS - 1.6 - PRS - 0x400e6000 - - 0 - 0x00000400 - registers - - - - SWPULSE - Software Pulse Register - 0x0 - 32 - write-only - 0x00000000 - 0x00000fff - - - CH0PULSE - Channel 0 Pulse Generation - 0 - 1 - write-only - - - CH1PULSE - Channel 1 Pulse Generation - 1 - 1 - write-only - - - CH2PULSE - Channel 2 Pulse Generation - 2 - 1 - write-only - - - CH3PULSE - Channel 3 Pulse Generation - 3 - 1 - write-only - - - CH4PULSE - Channel 4 Pulse Generation - 4 - 1 - write-only - - - CH5PULSE - Channel 5 Pulse Generation - 5 - 1 - write-only - - - CH6PULSE - Channel 6 Pulse Generation - 6 - 1 - write-only - - - CH7PULSE - Channel 7 Pulse Generation - 7 - 1 - write-only - - - CH8PULSE - Channel 8 Pulse Generation - 8 - 1 - write-only - - - CH9PULSE - Channel 9 Pulse Generation - 9 - 1 - write-only - - - CH10PULSE - Channel 10 Pulse Generation - 10 - 1 - write-only - - - CH11PULSE - Channel 11 Pulse Generation - 11 - 1 - write-only - - - - - SWLEVEL - Software Level Register - 0x4 - 32 - read-write - 0x00000000 - 0x00000fff - - - CH0LEVEL - Channel 0 Software Level - 0 - 1 - read-write - - - CH1LEVEL - Channel 1 Software Level - 1 - 1 - read-write - - - CH2LEVEL - Channel 2 Software Level - 2 - 1 - read-write - - - CH3LEVEL - Channel 3 Software Level - 3 - 1 - read-write - - - CH4LEVEL - Channel 4 Software Level - 4 - 1 - read-write - - - CH5LEVEL - Channel 5 Software Level - 5 - 1 - read-write - - - CH6LEVEL - Channel 6 Software Level - 6 - 1 - read-write - - - CH7LEVEL - Channel 7 Software Level - 7 - 1 - read-write - - - CH8LEVEL - Channel 8 Software Level - 8 - 1 - read-write - - - CH9LEVEL - Channel 9 Software Level - 9 - 1 - read-write - - - CH10LEVEL - Channel 10 Software Level - 10 - 1 - read-write - - - CH11LEVEL - Channel 11 Software Level - 11 - 1 - read-write - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x8 - 32 - read-write - 0x00000000 - 0x00000fff - - - CH0PEN - CH0 Pin Enable - 0 - 1 - read-write - - - CH1PEN - CH1 Pin Enable - 1 - 1 - read-write - - - CH2PEN - CH2 Pin Enable - 2 - 1 - read-write - - - CH3PEN - CH3 Pin Enable - 3 - 1 - read-write - - - CH4PEN - CH4 Pin Enable - 4 - 1 - read-write - - - CH5PEN - CH5 Pin Enable - 5 - 1 - read-write - - - CH6PEN - CH6 Pin Enable - 6 - 1 - read-write - - - CH7PEN - CH7 Pin Enable - 7 - 1 - read-write - - - CH8PEN - CH8 Pin Enable - 8 - 1 - read-write - - - CH9PEN - CH9 Pin Enable - 9 - 1 - read-write - - - CH10PEN - CH10 Pin Enable - 10 - 1 - read-write - - - CH11PEN - CH11 Pin Enable - 11 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x10 - 32 - read-write - 0x00000000 - 0x3f3f3f3f - - - CH0LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - - - CH1LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - - - CH2LOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - - - CH3LOC - I/O Location - 24 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - - - - - ROUTELOC1 - I/O Routing Location Register - 0x14 - 32 - read-write - 0x00000000 - 0x3f3f3f3f - - - CH4LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - - - CH5LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - - - CH6LOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - - - CH7LOC - I/O Location - 24 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - - - - - ROUTELOC2 - I/O Routing Location Register - 0x18 - 32 - read-write - 0x00000000 - 0x3f3f3f3f - - - CH8LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - - - CH9LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - - - CH10LOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - - - CH11LOC - I/O Location - 24 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - - - - - CTRL - Control Register - 0x20 - 32 - read-write - 0x00000000 - 0x0000001f - - - SEVONPRS - Set Event on PRS - 0 - 1 - read-write - - - SEVONPRSSEL - SEVONPRS PRS Channel Select - 1 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - - - DMAREQ0 - DMA Request 0 Register - 0x24 - 32 - read-write - 0x00000000 - 0x000003c0 - - - PRSSEL - DMA Request 0 PRS Channel Select - 6 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - - - DMAREQ1 - DMA Request 1 Register - 0x28 - 32 - read-write - 0x00000000 - 0x000003c0 - - - PRSSEL - DMA Request 1 PRS Channel Select - 6 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - - - PEEK - PRS Channel Values - 0x30 - 32 - read-only - 0x00000000 - 0x00000fff - - - CH0VAL - Channel 0 Current Value - 0 - 1 - read-only - - - CH1VAL - Channel 1 Current Value - 1 - 1 - read-only - - - CH2VAL - Channel 2 Current Value - 2 - 1 - read-only - - - CH3VAL - Channel 3 Current Value - 3 - 1 - read-only - - - CH4VAL - Channel 4 Current Value - 4 - 1 - read-only - - - CH5VAL - Channel 5 Current Value - 5 - 1 - read-only - - - CH6VAL - Channel 6 Current Value - 6 - 1 - read-only - - - CH7VAL - Channel 7 Current Value - 7 - 1 - read-only - - - CH8VAL - Channel 8 Current Value - 8 - 1 - read-only - - - CH9VAL - Channel 9 Current Value - 9 - 1 - read-only - - - CH10VAL - Channel 10 Current Value - 10 - 1 - read-only - - - CH11VAL - Channel 11 Current Value - 11 - 1 - read-only - - - - - CH0_CTRL - Channel Control Register - 0x40 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH1_CTRL - Channel Control Register - 0x44 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH2_CTRL - Channel Control Register - 0x48 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH3_CTRL - Channel Control Register - 0x4c - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH4_CTRL - Channel Control Register - 0x50 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH5_CTRL - Channel Control Register - 0x54 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH6_CTRL - Channel Control Register - 0x58 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH7_CTRL - Channel Control Register - 0x5c - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH8_CTRL - Channel Control Register - 0x60 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH9_CTRL - Channel Control Register - 0x64 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH10_CTRL - Channel Control Register - 0x68 - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - CH11_CTRL - Channel Control Register - 0x6c - 32 - read-write - 0x00000000 - 0x5e307f07 - - - SIGSEL - Signal Select - 0 - 3 - read-write - - - SOURCESEL - Source Select - 8 - 7 - read-write - - - NONE - No source selected - 0x00000000 - - - PRSL - Peripheral Reflex System - 0x00000001 - - - PRSH - Peripheral Reflex System - 0x00000002 - - - ACMP0 - Analog Comparator 0 - 0x00000006 - - - ACMP1 - Analog Comparator 1 - 0x00000007 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x00000010 - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x00000011 - - - TIMER0 - Timer 0 - 0x0000001c - - - TIMER1 - Timer 1 - 0x0000001d - - - RTCC - Real-Time Counter and Calendar - 0x00000029 - - - GPIOL - General purpose Input/Output - 0x00000030 - - - GPIOH - General purpose Input/Output - 0x00000031 - - - LETIMER0 - Low Energy Timer 0 - 0x00000034 - - - PCNT0 - Pulse Counter 0 - 0x00000036 - - - CRYOTIMER - CryoTimer - 0x0000003c - - - CMU - Clock Management Unit - 0x0000003d - - - - - EDSEL - Edge Detect Select - 20 - 2 - read-write - - - OFF - Signal is left as it is - 0x00000000 - - - POSEDGE - A one HFPERCLK cycle pulse is generated for every positive edge of the incoming signal - 0x00000001 - - - NEGEDGE - A one HFPERCLK clock cycle pulse is generated for every negative edge of the incoming signal - 0x00000002 - - - BOTHEDGES - A one HFPERCLK clock cycle pulse is generated for every edge of the incoming signal - 0x00000003 - - - - - STRETCH - Stretch Channel Output - 25 - 1 - read-write - - - INV - Invert Channel - 26 - 1 - read-write - - - ORPREV - Or Previous - 27 - 1 - read-write - - - ANDNEXT - And Next - 28 - 1 - read-write - - - ASYNC - Asynchronous reflex - 30 - 1 - read-write - - - - - - - LDMA - 1.6 - LDMA - 0x400e2000 - - 0 - 0x00001000 - registers - - - LDMA - 8 - - - - CTRL - DMA Control Register - 0x0 - 32 - read-write - 0x07000000 - 0x0700ffff - - - SYNCPRSSETEN - Synchronization PRS Set Enable - 0 - 8 - read-write - - - SYNCPRSCLREN - Synchronization PRS Clear Enable - 8 - 8 - read-write - - - NUMFIXED - Number of Fixed Priority Channels - 24 - 3 - read-write - - - - - STATUS - DMA Status Register - 0x4 - 32 - read-only - 0x08100000 - 0x1f1f073b - - - ANYBUSY - Any DMA Channel Busy - 0 - 1 - read-only - - - ANYREQ - Any DMA Channel Request Pending - 1 - 1 - read-only - - - CHGRANT - Granted Channel Number - 3 - 3 - read-only - - - CHERROR - Errant Channel Number - 8 - 3 - read-only - - - FIFOLEVEL - FIFO Level - 16 - 5 - read-only - - - CHNUM - Number of Channels - 24 - 5 - read-only - - - - - SYNC - DMA Synchronization Trigger Register (Single-Cycle RMW) - 0x8 - 32 - read-write - 0x00000000 - 0x000000ff - - - SYNCTRIG - Synchronization Trigger - 0 - 8 - read-write - - - - - CHEN - DMA Channel Enable Register (Single-Cycle RMW) - 0x20 - 32 - read-write - 0x00000000 - 0x000000ff - - - CHEN - Channel Enables - 0 - 8 - read-write - - - - - CHBUSY - DMA Channel Busy Register - 0x24 - 32 - read-only - 0x00000000 - 0x000000ff - - - BUSY - Channels Busy - 0 - 8 - read-only - - - - - CHDONE - DMA Channel Linking Done Register (Single-Cycle RMW) - 0x28 - 32 - read-write - 0x00000000 - 0x000000ff - - - CHDONE - DMA Channel Linking or Done - 0 - 8 - read-write - - - - - DBGHALT - DMA Channel Debug Halt Register - 0x2c - 32 - read-write - 0x00000000 - 0x000000ff - - - DBGHALT - DMA Debug Halt - 0 - 8 - read-write - - - - - SWREQ - DMA Channel Software Transfer Request Register - 0x30 - 32 - write-only - 0x00000000 - 0x000000ff - - - SWREQ - Software Transfer Requests - 0 - 8 - write-only - - - - - REQDIS - DMA Channel Request Disable Register - 0x34 - 32 - read-write - 0x00000000 - 0x000000ff - - - REQDIS - DMA Request Disables - 0 - 8 - read-write - - - - - REQPEND - DMA Channel Requests Pending Register - 0x38 - 32 - read-only - 0x00000000 - 0x000000ff - - - REQPEND - DMA Requests Pending - 0 - 8 - read-only - - - - - LINKLOAD - DMA Channel Link Load Register - 0x3c - 32 - write-only - 0x00000000 - 0x000000ff - - - LINKLOAD - DMA Link Loads - 0 - 8 - write-only - - - - - REQCLEAR - DMA Channel Request Clear Register - 0x40 - 32 - write-only - 0x00000000 - 0x000000ff - - - REQCLEAR - DMA Request Clear - 0 - 8 - write-only - - - - - IF - Interrupt Flag Register - 0x60 - 32 - read-only - 0x00000000 - 0x800000ff - - - DONE - DMA Structure Operation Done Interrupt Flag - 0 - 8 - read-only - - - ERROR - Transfer Error Interrupt Flag - 31 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x64 - 32 - write-only - 0x00000000 - 0x800000ff - - - DONE - Set DONE Interrupt Flag - 0 - 8 - write-only - - - ERROR - Set ERROR Interrupt Flag - 31 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x68 - 32 - write-only - 0x00000000 - 0x800000ff - - - DONE - Clear DONE Interrupt Flag - 0 - 8 - write-only - - - ERROR - Clear ERROR Interrupt Flag - 31 - 1 - write-only - - - - - IEN - Interrupt Enable register - 0x6c - 32 - read-write - 0x00000000 - 0x800000ff - - - DONE - DONE Interrupt Enable - 0 - 8 - read-write - - - ERROR - ERROR Interrupt Enable - 31 - 1 - read-write - - - - - CH0_REQSEL - Channel Peripheral Request Select Register - 0x80 - 32 - read-write - 0x00000000 - 0x003f000f - - - SIGSEL - Signal Select - 0 - 4 - read-write - - - SOURCESEL - Source Select - 16 - 6 - read-write - - - NONE - No source selected - 0x00000000 - - - PRS - Peripheral Reflex System - 0x00000001 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000c - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000d - - - LEUART0 - Low Energy UART 0 - 0x00000010 - - - I2C0 - I2C 0 - 0x00000014 - - - TIMER0 - Timer 0 - 0x00000018 - - - TIMER1 - Timer 1 - 0x00000019 - - - MSC - "" - 0x00000030 - - - CRYPTO - Advanced Encryption Standard Accelerator - 0x00000031 - - - - - - - CH0_CFG - Channel Configuration Register - 0x84 - 32 - read-write - 0x00000000 - 0x00330000 - - - ARBSLOTS - Arbitration Slot Number Select - 16 - 2 - read-write - - - ONE - One arbitration slot selected - 0x00000000 - - - TWO - Two arbitration slots selected - 0x00000001 - - - FOUR - Four arbitration slots selected - 0x00000002 - - - EIGHT - Eight arbitration slots selected - 0x00000003 - - - - - SRCINCSIGN - Source Address Increment Sign - 20 - 1 - read-write - - - DSTINCSIGN - Destination Address Increment Sign - 21 - 1 - read-write - - - - - CH0_LOOP - Channel Loop Counter Register - 0x88 - 32 - read-write - 0x00000000 - 0x000000ff - - - LOOPCNT - Linked Structure Sequence Loop Counter - 0 - 8 - read-write - - - - - CH0_CTRL - Channel Descriptor Control Word Register - 0x8c - 32 - read-write - 0x00000000 - 0xfffffffb - - - STRUCTTYPE - DMA Structure Type - 0 - 2 - read-only - - - TRANSFER - DMA transfer structure type selected. - 0x00000000 - - - SYNCHRONIZE - Synchronization structure type selected. - 0x00000001 - - - WRITE - Write immediate value structure type selected. - 0x00000002 - - - - - STRUCTREQ - Structure DMA Transfer Request - 3 - 1 - write-only - - - XFERCNT - DMA Unit Data Transfer Count - 4 - 11 - read-write - - - BYTESWAP - Endian Byte Swap - 15 - 1 - read-write - - - BLOCKSIZE - Block Transfer Size - 16 - 4 - read-write - - - UNIT1 - One unit transfer per arbitration - 0x00000000 - - - UNIT2 - Two unit transfers per arbitration - 0x00000001 - - - UNIT3 - Three unit transfers per arbitration - 0x00000002 - - - UNIT4 - Four unit transfers per arbitration - 0x00000003 - - - UNIT6 - Six unit transfers per arbitration - 0x00000004 - - - UNIT8 - Eight unit transfers per arbitration - 0x00000005 - - - UNIT16 - Sixteen unit transfers per arbitration - 0x00000007 - - - UNIT32 - 32 unit transfers per arbitration - 0x00000009 - - - UNIT64 - 64 unit transfers per arbitration - 0x0000000a - - - UNIT128 - 128 unit transfers per arbitration - 0x0000000b - - - UNIT256 - 256 unit transfers per arbitration - 0x0000000c - - - UNIT512 - 512 unit transfers per arbitration - 0x0000000d - - - UNIT1024 - 1024 unit transfers per arbitration - 0x0000000e - - - ALL - Transfer all units as specified by the XFRCNT field - 0x0000000f - - - - - DONEIFSEN - DMA Operation Done Interrupt Flag Set Enable - 20 - 1 - read-write - - - REQMODE - DMA Request Transfer Mode Select - 21 - 1 - read-write - - - DECLOOPCNT - Decrement Loop Count - 22 - 1 - read-write - - - IGNORESREQ - Ignore Sreq - 23 - 1 - read-write - - - SRCINC - Source Address Increment Size - 24 - 2 - read-write - - - ONE - Increment source address by one unit data size after each read - 0x00000000 - - - TWO - Increment source address by two unit data sizes after each read - 0x00000001 - - - FOUR - Increment source address by four unit data sizes after each read - 0x00000002 - - - NONE - Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. - 0x00000003 - - - - - SIZE - Unit Data Transfer Size - 26 - 2 - read-write - - - BYTE - Each unit transfer is a byte - 0x00000000 - - - HALFWORD - Each unit transfer is a half-word - 0x00000001 - - - WORD - Each unit transfer is a word - 0x00000002 - - - - - DSTINC - Destination Address Increment Size - 28 - 2 - read-write - - - ONE - Increment destination address by one unit data size after each write - 0x00000000 - - - TWO - Increment destination address by two unit data sizes after each write - 0x00000001 - - - FOUR - Increment destination address by four unit data sizes after each write - 0x00000002 - - - NONE - Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. - 0x00000003 - - - - - SRCMODE - Source Addressing Mode - 30 - 1 - read-only - - - DSTMODE - Destination Addressing Mode - 31 - 1 - read-only - - - - - CH0_SRC - Channel Descriptor Source Data Address Register - 0x90 - 32 - read-write - 0x00000000 - 0xffffffff - - - SRCADDR - Source Data Address - 0 - 32 - read-write - - - - - CH0_DST - Channel Descriptor Destination Data Address Register - 0x94 - 32 - read-write - 0x00000000 - 0xffffffff - - - DSTADDR - Destination Data Address - 0 - 32 - read-write - - - - - CH0_LINK - Channel Descriptor Link Structure Address Register - 0x98 - 32 - read-write - 0x00000000 - 0xffffffff - - - LINKMODE - Link Structure Addressing Mode - 0 - 1 - read-only - - - LINK - Link Next Structure - 1 - 1 - read-write - - - LINKADDR - Link Structure Address - 2 - 30 - read-write - - - - - CH1_REQSEL - Channel Peripheral Request Select Register - 0xb0 - 32 - read-write - 0x00000000 - 0x003f000f - - - SIGSEL - Signal Select - 0 - 4 - read-write - - - SOURCESEL - Source Select - 16 - 6 - read-write - - - NONE - No source selected - 0x00000000 - - - PRS - Peripheral Reflex System - 0x00000001 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000c - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000d - - - LEUART0 - Low Energy UART 0 - 0x00000010 - - - I2C0 - I2C 0 - 0x00000014 - - - TIMER0 - Timer 0 - 0x00000018 - - - TIMER1 - Timer 1 - 0x00000019 - - - MSC - "" - 0x00000030 - - - CRYPTO - Advanced Encryption Standard Accelerator - 0x00000031 - - - - - - - CH1_CFG - Channel Configuration Register - 0xb4 - 32 - read-write - 0x00000000 - 0x00330000 - - - ARBSLOTS - Arbitration Slot Number Select - 16 - 2 - read-write - - - ONE - One arbitration slot selected - 0x00000000 - - - TWO - Two arbitration slots selected - 0x00000001 - - - FOUR - Four arbitration slots selected - 0x00000002 - - - EIGHT - Eight arbitration slots selected - 0x00000003 - - - - - SRCINCSIGN - Source Address Increment Sign - 20 - 1 - read-write - - - DSTINCSIGN - Destination Address Increment Sign - 21 - 1 - read-write - - - - - CH1_LOOP - Channel Loop Counter Register - 0xb8 - 32 - read-write - 0x00000000 - 0x000000ff - - - LOOPCNT - Linked Structure Sequence Loop Counter - 0 - 8 - read-write - - - - - CH1_CTRL - Channel Descriptor Control Word Register - 0xbc - 32 - read-write - 0x00000000 - 0xfffffffb - - - STRUCTTYPE - DMA Structure Type - 0 - 2 - read-only - - - TRANSFER - DMA transfer structure type selected. - 0x00000000 - - - SYNCHRONIZE - Synchronization structure type selected. - 0x00000001 - - - WRITE - Write immediate value structure type selected. - 0x00000002 - - - - - STRUCTREQ - Structure DMA Transfer Request - 3 - 1 - write-only - - - XFERCNT - DMA Unit Data Transfer Count - 4 - 11 - read-write - - - BYTESWAP - Endian Byte Swap - 15 - 1 - read-write - - - BLOCKSIZE - Block Transfer Size - 16 - 4 - read-write - - - UNIT1 - One unit transfer per arbitration - 0x00000000 - - - UNIT2 - Two unit transfers per arbitration - 0x00000001 - - - UNIT3 - Three unit transfers per arbitration - 0x00000002 - - - UNIT4 - Four unit transfers per arbitration - 0x00000003 - - - UNIT6 - Six unit transfers per arbitration - 0x00000004 - - - UNIT8 - Eight unit transfers per arbitration - 0x00000005 - - - UNIT16 - Sixteen unit transfers per arbitration - 0x00000007 - - - UNIT32 - 32 unit transfers per arbitration - 0x00000009 - - - UNIT64 - 64 unit transfers per arbitration - 0x0000000a - - - UNIT128 - 128 unit transfers per arbitration - 0x0000000b - - - UNIT256 - 256 unit transfers per arbitration - 0x0000000c - - - UNIT512 - 512 unit transfers per arbitration - 0x0000000d - - - UNIT1024 - 1024 unit transfers per arbitration - 0x0000000e - - - ALL - Transfer all units as specified by the XFRCNT field - 0x0000000f - - - - - DONEIFSEN - DMA Operation Done Interrupt Flag Set Enable - 20 - 1 - read-write - - - REQMODE - DMA Request Transfer Mode Select - 21 - 1 - read-write - - - DECLOOPCNT - Decrement Loop Count - 22 - 1 - read-write - - - IGNORESREQ - Ignore Sreq - 23 - 1 - read-write - - - SRCINC - Source Address Increment Size - 24 - 2 - read-write - - - ONE - Increment source address by one unit data size after each read - 0x00000000 - - - TWO - Increment source address by two unit data sizes after each read - 0x00000001 - - - FOUR - Increment source address by four unit data sizes after each read - 0x00000002 - - - NONE - Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. - 0x00000003 - - - - - SIZE - Unit Data Transfer Size - 26 - 2 - read-write - - - BYTE - Each unit transfer is a byte - 0x00000000 - - - HALFWORD - Each unit transfer is a half-word - 0x00000001 - - - WORD - Each unit transfer is a word - 0x00000002 - - - - - DSTINC - Destination Address Increment Size - 28 - 2 - read-write - - - ONE - Increment destination address by one unit data size after each write - 0x00000000 - - - TWO - Increment destination address by two unit data sizes after each write - 0x00000001 - - - FOUR - Increment destination address by four unit data sizes after each write - 0x00000002 - - - NONE - Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. - 0x00000003 - - - - - SRCMODE - Source Addressing Mode - 30 - 1 - read-only - - - DSTMODE - Destination Addressing Mode - 31 - 1 - read-only - - - - - CH1_SRC - Channel Descriptor Source Data Address Register - 0xc0 - 32 - read-write - 0x00000000 - 0xffffffff - - - SRCADDR - Source Data Address - 0 - 32 - read-write - - - - - CH1_DST - Channel Descriptor Destination Data Address Register - 0xc4 - 32 - read-write - 0x00000000 - 0xffffffff - - - DSTADDR - Destination Data Address - 0 - 32 - read-write - - - - - CH1_LINK - Channel Descriptor Link Structure Address Register - 0xc8 - 32 - read-write - 0x00000000 - 0xffffffff - - - LINKMODE - Link Structure Addressing Mode - 0 - 1 - read-only - - - LINK - Link Next Structure - 1 - 1 - read-write - - - LINKADDR - Link Structure Address - 2 - 30 - read-write - - - - - CH2_REQSEL - Channel Peripheral Request Select Register - 0xe0 - 32 - read-write - 0x00000000 - 0x003f000f - - - SIGSEL - Signal Select - 0 - 4 - read-write - - - SOURCESEL - Source Select - 16 - 6 - read-write - - - NONE - No source selected - 0x00000000 - - - PRS - Peripheral Reflex System - 0x00000001 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000c - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000d - - - LEUART0 - Low Energy UART 0 - 0x00000010 - - - I2C0 - I2C 0 - 0x00000014 - - - TIMER0 - Timer 0 - 0x00000018 - - - TIMER1 - Timer 1 - 0x00000019 - - - MSC - "" - 0x00000030 - - - CRYPTO - Advanced Encryption Standard Accelerator - 0x00000031 - - - - - - - CH2_CFG - Channel Configuration Register - 0xe4 - 32 - read-write - 0x00000000 - 0x00330000 - - - ARBSLOTS - Arbitration Slot Number Select - 16 - 2 - read-write - - - ONE - One arbitration slot selected - 0x00000000 - - - TWO - Two arbitration slots selected - 0x00000001 - - - FOUR - Four arbitration slots selected - 0x00000002 - - - EIGHT - Eight arbitration slots selected - 0x00000003 - - - - - SRCINCSIGN - Source Address Increment Sign - 20 - 1 - read-write - - - DSTINCSIGN - Destination Address Increment Sign - 21 - 1 - read-write - - - - - CH2_LOOP - Channel Loop Counter Register - 0xe8 - 32 - read-write - 0x00000000 - 0x000000ff - - - LOOPCNT - Linked Structure Sequence Loop Counter - 0 - 8 - read-write - - - - - CH2_CTRL - Channel Descriptor Control Word Register - 0xec - 32 - read-write - 0x00000000 - 0xfffffffb - - - STRUCTTYPE - DMA Structure Type - 0 - 2 - read-only - - - TRANSFER - DMA transfer structure type selected. - 0x00000000 - - - SYNCHRONIZE - Synchronization structure type selected. - 0x00000001 - - - WRITE - Write immediate value structure type selected. - 0x00000002 - - - - - STRUCTREQ - Structure DMA Transfer Request - 3 - 1 - write-only - - - XFERCNT - DMA Unit Data Transfer Count - 4 - 11 - read-write - - - BYTESWAP - Endian Byte Swap - 15 - 1 - read-write - - - BLOCKSIZE - Block Transfer Size - 16 - 4 - read-write - - - UNIT1 - One unit transfer per arbitration - 0x00000000 - - - UNIT2 - Two unit transfers per arbitration - 0x00000001 - - - UNIT3 - Three unit transfers per arbitration - 0x00000002 - - - UNIT4 - Four unit transfers per arbitration - 0x00000003 - - - UNIT6 - Six unit transfers per arbitration - 0x00000004 - - - UNIT8 - Eight unit transfers per arbitration - 0x00000005 - - - UNIT16 - Sixteen unit transfers per arbitration - 0x00000007 - - - UNIT32 - 32 unit transfers per arbitration - 0x00000009 - - - UNIT64 - 64 unit transfers per arbitration - 0x0000000a - - - UNIT128 - 128 unit transfers per arbitration - 0x0000000b - - - UNIT256 - 256 unit transfers per arbitration - 0x0000000c - - - UNIT512 - 512 unit transfers per arbitration - 0x0000000d - - - UNIT1024 - 1024 unit transfers per arbitration - 0x0000000e - - - ALL - Transfer all units as specified by the XFRCNT field - 0x0000000f - - - - - DONEIFSEN - DMA Operation Done Interrupt Flag Set Enable - 20 - 1 - read-write - - - REQMODE - DMA Request Transfer Mode Select - 21 - 1 - read-write - - - DECLOOPCNT - Decrement Loop Count - 22 - 1 - read-write - - - IGNORESREQ - Ignore Sreq - 23 - 1 - read-write - - - SRCINC - Source Address Increment Size - 24 - 2 - read-write - - - ONE - Increment source address by one unit data size after each read - 0x00000000 - - - TWO - Increment source address by two unit data sizes after each read - 0x00000001 - - - FOUR - Increment source address by four unit data sizes after each read - 0x00000002 - - - NONE - Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. - 0x00000003 - - - - - SIZE - Unit Data Transfer Size - 26 - 2 - read-write - - - BYTE - Each unit transfer is a byte - 0x00000000 - - - HALFWORD - Each unit transfer is a half-word - 0x00000001 - - - WORD - Each unit transfer is a word - 0x00000002 - - - - - DSTINC - Destination Address Increment Size - 28 - 2 - read-write - - - ONE - Increment destination address by one unit data size after each write - 0x00000000 - - - TWO - Increment destination address by two unit data sizes after each write - 0x00000001 - - - FOUR - Increment destination address by four unit data sizes after each write - 0x00000002 - - - NONE - Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. - 0x00000003 - - - - - SRCMODE - Source Addressing Mode - 30 - 1 - read-only - - - DSTMODE - Destination Addressing Mode - 31 - 1 - read-only - - - - - CH2_SRC - Channel Descriptor Source Data Address Register - 0xf0 - 32 - read-write - 0x00000000 - 0xffffffff - - - SRCADDR - Source Data Address - 0 - 32 - read-write - - - - - CH2_DST - Channel Descriptor Destination Data Address Register - 0xf4 - 32 - read-write - 0x00000000 - 0xffffffff - - - DSTADDR - Destination Data Address - 0 - 32 - read-write - - - - - CH2_LINK - Channel Descriptor Link Structure Address Register - 0xf8 - 32 - read-write - 0x00000000 - 0xffffffff - - - LINKMODE - Link Structure Addressing Mode - 0 - 1 - read-only - - - LINK - Link Next Structure - 1 - 1 - read-write - - - LINKADDR - Link Structure Address - 2 - 30 - read-write - - - - - CH3_REQSEL - Channel Peripheral Request Select Register - 0x110 - 32 - read-write - 0x00000000 - 0x003f000f - - - SIGSEL - Signal Select - 0 - 4 - read-write - - - SOURCESEL - Source Select - 16 - 6 - read-write - - - NONE - No source selected - 0x00000000 - - - PRS - Peripheral Reflex System - 0x00000001 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000c - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000d - - - LEUART0 - Low Energy UART 0 - 0x00000010 - - - I2C0 - I2C 0 - 0x00000014 - - - TIMER0 - Timer 0 - 0x00000018 - - - TIMER1 - Timer 1 - 0x00000019 - - - MSC - "" - 0x00000030 - - - CRYPTO - Advanced Encryption Standard Accelerator - 0x00000031 - - - - - - - CH3_CFG - Channel Configuration Register - 0x114 - 32 - read-write - 0x00000000 - 0x00330000 - - - ARBSLOTS - Arbitration Slot Number Select - 16 - 2 - read-write - - - ONE - One arbitration slot selected - 0x00000000 - - - TWO - Two arbitration slots selected - 0x00000001 - - - FOUR - Four arbitration slots selected - 0x00000002 - - - EIGHT - Eight arbitration slots selected - 0x00000003 - - - - - SRCINCSIGN - Source Address Increment Sign - 20 - 1 - read-write - - - DSTINCSIGN - Destination Address Increment Sign - 21 - 1 - read-write - - - - - CH3_LOOP - Channel Loop Counter Register - 0x118 - 32 - read-write - 0x00000000 - 0x000000ff - - - LOOPCNT - Linked Structure Sequence Loop Counter - 0 - 8 - read-write - - - - - CH3_CTRL - Channel Descriptor Control Word Register - 0x11c - 32 - read-write - 0x00000000 - 0xfffffffb - - - STRUCTTYPE - DMA Structure Type - 0 - 2 - read-only - - - TRANSFER - DMA transfer structure type selected. - 0x00000000 - - - SYNCHRONIZE - Synchronization structure type selected. - 0x00000001 - - - WRITE - Write immediate value structure type selected. - 0x00000002 - - - - - STRUCTREQ - Structure DMA Transfer Request - 3 - 1 - write-only - - - XFERCNT - DMA Unit Data Transfer Count - 4 - 11 - read-write - - - BYTESWAP - Endian Byte Swap - 15 - 1 - read-write - - - BLOCKSIZE - Block Transfer Size - 16 - 4 - read-write - - - UNIT1 - One unit transfer per arbitration - 0x00000000 - - - UNIT2 - Two unit transfers per arbitration - 0x00000001 - - - UNIT3 - Three unit transfers per arbitration - 0x00000002 - - - UNIT4 - Four unit transfers per arbitration - 0x00000003 - - - UNIT6 - Six unit transfers per arbitration - 0x00000004 - - - UNIT8 - Eight unit transfers per arbitration - 0x00000005 - - - UNIT16 - Sixteen unit transfers per arbitration - 0x00000007 - - - UNIT32 - 32 unit transfers per arbitration - 0x00000009 - - - UNIT64 - 64 unit transfers per arbitration - 0x0000000a - - - UNIT128 - 128 unit transfers per arbitration - 0x0000000b - - - UNIT256 - 256 unit transfers per arbitration - 0x0000000c - - - UNIT512 - 512 unit transfers per arbitration - 0x0000000d - - - UNIT1024 - 1024 unit transfers per arbitration - 0x0000000e - - - ALL - Transfer all units as specified by the XFRCNT field - 0x0000000f - - - - - DONEIFSEN - DMA Operation Done Interrupt Flag Set Enable - 20 - 1 - read-write - - - REQMODE - DMA Request Transfer Mode Select - 21 - 1 - read-write - - - DECLOOPCNT - Decrement Loop Count - 22 - 1 - read-write - - - IGNORESREQ - Ignore Sreq - 23 - 1 - read-write - - - SRCINC - Source Address Increment Size - 24 - 2 - read-write - - - ONE - Increment source address by one unit data size after each read - 0x00000000 - - - TWO - Increment source address by two unit data sizes after each read - 0x00000001 - - - FOUR - Increment source address by four unit data sizes after each read - 0x00000002 - - - NONE - Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. - 0x00000003 - - - - - SIZE - Unit Data Transfer Size - 26 - 2 - read-write - - - BYTE - Each unit transfer is a byte - 0x00000000 - - - HALFWORD - Each unit transfer is a half-word - 0x00000001 - - - WORD - Each unit transfer is a word - 0x00000002 - - - - - DSTINC - Destination Address Increment Size - 28 - 2 - read-write - - - ONE - Increment destination address by one unit data size after each write - 0x00000000 - - - TWO - Increment destination address by two unit data sizes after each write - 0x00000001 - - - FOUR - Increment destination address by four unit data sizes after each write - 0x00000002 - - - NONE - Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. - 0x00000003 - - - - - SRCMODE - Source Addressing Mode - 30 - 1 - read-only - - - DSTMODE - Destination Addressing Mode - 31 - 1 - read-only - - - - - CH3_SRC - Channel Descriptor Source Data Address Register - 0x120 - 32 - read-write - 0x00000000 - 0xffffffff - - - SRCADDR - Source Data Address - 0 - 32 - read-write - - - - - CH3_DST - Channel Descriptor Destination Data Address Register - 0x124 - 32 - read-write - 0x00000000 - 0xffffffff - - - DSTADDR - Destination Data Address - 0 - 32 - read-write - - - - - CH3_LINK - Channel Descriptor Link Structure Address Register - 0x128 - 32 - read-write - 0x00000000 - 0xffffffff - - - LINKMODE - Link Structure Addressing Mode - 0 - 1 - read-only - - - LINK - Link Next Structure - 1 - 1 - read-write - - - LINKADDR - Link Structure Address - 2 - 30 - read-write - - - - - CH4_REQSEL - Channel Peripheral Request Select Register - 0x140 - 32 - read-write - 0x00000000 - 0x003f000f - - - SIGSEL - Signal Select - 0 - 4 - read-write - - - SOURCESEL - Source Select - 16 - 6 - read-write - - - NONE - No source selected - 0x00000000 - - - PRS - Peripheral Reflex System - 0x00000001 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000c - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000d - - - LEUART0 - Low Energy UART 0 - 0x00000010 - - - I2C0 - I2C 0 - 0x00000014 - - - TIMER0 - Timer 0 - 0x00000018 - - - TIMER1 - Timer 1 - 0x00000019 - - - MSC - "" - 0x00000030 - - - CRYPTO - Advanced Encryption Standard Accelerator - 0x00000031 - - - - - - - CH4_CFG - Channel Configuration Register - 0x144 - 32 - read-write - 0x00000000 - 0x00330000 - - - ARBSLOTS - Arbitration Slot Number Select - 16 - 2 - read-write - - - ONE - One arbitration slot selected - 0x00000000 - - - TWO - Two arbitration slots selected - 0x00000001 - - - FOUR - Four arbitration slots selected - 0x00000002 - - - EIGHT - Eight arbitration slots selected - 0x00000003 - - - - - SRCINCSIGN - Source Address Increment Sign - 20 - 1 - read-write - - - DSTINCSIGN - Destination Address Increment Sign - 21 - 1 - read-write - - - - - CH4_LOOP - Channel Loop Counter Register - 0x148 - 32 - read-write - 0x00000000 - 0x000000ff - - - LOOPCNT - Linked Structure Sequence Loop Counter - 0 - 8 - read-write - - - - - CH4_CTRL - Channel Descriptor Control Word Register - 0x14c - 32 - read-write - 0x00000000 - 0xfffffffb - - - STRUCTTYPE - DMA Structure Type - 0 - 2 - read-only - - - TRANSFER - DMA transfer structure type selected. - 0x00000000 - - - SYNCHRONIZE - Synchronization structure type selected. - 0x00000001 - - - WRITE - Write immediate value structure type selected. - 0x00000002 - - - - - STRUCTREQ - Structure DMA Transfer Request - 3 - 1 - write-only - - - XFERCNT - DMA Unit Data Transfer Count - 4 - 11 - read-write - - - BYTESWAP - Endian Byte Swap - 15 - 1 - read-write - - - BLOCKSIZE - Block Transfer Size - 16 - 4 - read-write - - - UNIT1 - One unit transfer per arbitration - 0x00000000 - - - UNIT2 - Two unit transfers per arbitration - 0x00000001 - - - UNIT3 - Three unit transfers per arbitration - 0x00000002 - - - UNIT4 - Four unit transfers per arbitration - 0x00000003 - - - UNIT6 - Six unit transfers per arbitration - 0x00000004 - - - UNIT8 - Eight unit transfers per arbitration - 0x00000005 - - - UNIT16 - Sixteen unit transfers per arbitration - 0x00000007 - - - UNIT32 - 32 unit transfers per arbitration - 0x00000009 - - - UNIT64 - 64 unit transfers per arbitration - 0x0000000a - - - UNIT128 - 128 unit transfers per arbitration - 0x0000000b - - - UNIT256 - 256 unit transfers per arbitration - 0x0000000c - - - UNIT512 - 512 unit transfers per arbitration - 0x0000000d - - - UNIT1024 - 1024 unit transfers per arbitration - 0x0000000e - - - ALL - Transfer all units as specified by the XFRCNT field - 0x0000000f - - - - - DONEIFSEN - DMA Operation Done Interrupt Flag Set Enable - 20 - 1 - read-write - - - REQMODE - DMA Request Transfer Mode Select - 21 - 1 - read-write - - - DECLOOPCNT - Decrement Loop Count - 22 - 1 - read-write - - - IGNORESREQ - Ignore Sreq - 23 - 1 - read-write - - - SRCINC - Source Address Increment Size - 24 - 2 - read-write - - - ONE - Increment source address by one unit data size after each read - 0x00000000 - - - TWO - Increment source address by two unit data sizes after each read - 0x00000001 - - - FOUR - Increment source address by four unit data sizes after each read - 0x00000002 - - - NONE - Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. - 0x00000003 - - - - - SIZE - Unit Data Transfer Size - 26 - 2 - read-write - - - BYTE - Each unit transfer is a byte - 0x00000000 - - - HALFWORD - Each unit transfer is a half-word - 0x00000001 - - - WORD - Each unit transfer is a word - 0x00000002 - - - - - DSTINC - Destination Address Increment Size - 28 - 2 - read-write - - - ONE - Increment destination address by one unit data size after each write - 0x00000000 - - - TWO - Increment destination address by two unit data sizes after each write - 0x00000001 - - - FOUR - Increment destination address by four unit data sizes after each write - 0x00000002 - - - NONE - Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. - 0x00000003 - - - - - SRCMODE - Source Addressing Mode - 30 - 1 - read-only - - - DSTMODE - Destination Addressing Mode - 31 - 1 - read-only - - - - - CH4_SRC - Channel Descriptor Source Data Address Register - 0x150 - 32 - read-write - 0x00000000 - 0xffffffff - - - SRCADDR - Source Data Address - 0 - 32 - read-write - - - - - CH4_DST - Channel Descriptor Destination Data Address Register - 0x154 - 32 - read-write - 0x00000000 - 0xffffffff - - - DSTADDR - Destination Data Address - 0 - 32 - read-write - - - - - CH4_LINK - Channel Descriptor Link Structure Address Register - 0x158 - 32 - read-write - 0x00000000 - 0xffffffff - - - LINKMODE - Link Structure Addressing Mode - 0 - 1 - read-only - - - LINK - Link Next Structure - 1 - 1 - read-write - - - LINKADDR - Link Structure Address - 2 - 30 - read-write - - - - - CH5_REQSEL - Channel Peripheral Request Select Register - 0x170 - 32 - read-write - 0x00000000 - 0x003f000f - - - SIGSEL - Signal Select - 0 - 4 - read-write - - - SOURCESEL - Source Select - 16 - 6 - read-write - - - NONE - No source selected - 0x00000000 - - - PRS - Peripheral Reflex System - 0x00000001 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000c - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000d - - - LEUART0 - Low Energy UART 0 - 0x00000010 - - - I2C0 - I2C 0 - 0x00000014 - - - TIMER0 - Timer 0 - 0x00000018 - - - TIMER1 - Timer 1 - 0x00000019 - - - MSC - "" - 0x00000030 - - - CRYPTO - Advanced Encryption Standard Accelerator - 0x00000031 - - - - - - - CH5_CFG - Channel Configuration Register - 0x174 - 32 - read-write - 0x00000000 - 0x00330000 - - - ARBSLOTS - Arbitration Slot Number Select - 16 - 2 - read-write - - - ONE - One arbitration slot selected - 0x00000000 - - - TWO - Two arbitration slots selected - 0x00000001 - - - FOUR - Four arbitration slots selected - 0x00000002 - - - EIGHT - Eight arbitration slots selected - 0x00000003 - - - - - SRCINCSIGN - Source Address Increment Sign - 20 - 1 - read-write - - - DSTINCSIGN - Destination Address Increment Sign - 21 - 1 - read-write - - - - - CH5_LOOP - Channel Loop Counter Register - 0x178 - 32 - read-write - 0x00000000 - 0x000000ff - - - LOOPCNT - Linked Structure Sequence Loop Counter - 0 - 8 - read-write - - - - - CH5_CTRL - Channel Descriptor Control Word Register - 0x17c - 32 - read-write - 0x00000000 - 0xfffffffb - - - STRUCTTYPE - DMA Structure Type - 0 - 2 - read-only - - - TRANSFER - DMA transfer structure type selected. - 0x00000000 - - - SYNCHRONIZE - Synchronization structure type selected. - 0x00000001 - - - WRITE - Write immediate value structure type selected. - 0x00000002 - - - - - STRUCTREQ - Structure DMA Transfer Request - 3 - 1 - write-only - - - XFERCNT - DMA Unit Data Transfer Count - 4 - 11 - read-write - - - BYTESWAP - Endian Byte Swap - 15 - 1 - read-write - - - BLOCKSIZE - Block Transfer Size - 16 - 4 - read-write - - - UNIT1 - One unit transfer per arbitration - 0x00000000 - - - UNIT2 - Two unit transfers per arbitration - 0x00000001 - - - UNIT3 - Three unit transfers per arbitration - 0x00000002 - - - UNIT4 - Four unit transfers per arbitration - 0x00000003 - - - UNIT6 - Six unit transfers per arbitration - 0x00000004 - - - UNIT8 - Eight unit transfers per arbitration - 0x00000005 - - - UNIT16 - Sixteen unit transfers per arbitration - 0x00000007 - - - UNIT32 - 32 unit transfers per arbitration - 0x00000009 - - - UNIT64 - 64 unit transfers per arbitration - 0x0000000a - - - UNIT128 - 128 unit transfers per arbitration - 0x0000000b - - - UNIT256 - 256 unit transfers per arbitration - 0x0000000c - - - UNIT512 - 512 unit transfers per arbitration - 0x0000000d - - - UNIT1024 - 1024 unit transfers per arbitration - 0x0000000e - - - ALL - Transfer all units as specified by the XFRCNT field - 0x0000000f - - - - - DONEIFSEN - DMA Operation Done Interrupt Flag Set Enable - 20 - 1 - read-write - - - REQMODE - DMA Request Transfer Mode Select - 21 - 1 - read-write - - - DECLOOPCNT - Decrement Loop Count - 22 - 1 - read-write - - - IGNORESREQ - Ignore Sreq - 23 - 1 - read-write - - - SRCINC - Source Address Increment Size - 24 - 2 - read-write - - - ONE - Increment source address by one unit data size after each read - 0x00000000 - - - TWO - Increment source address by two unit data sizes after each read - 0x00000001 - - - FOUR - Increment source address by four unit data sizes after each read - 0x00000002 - - - NONE - Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. - 0x00000003 - - - - - SIZE - Unit Data Transfer Size - 26 - 2 - read-write - - - BYTE - Each unit transfer is a byte - 0x00000000 - - - HALFWORD - Each unit transfer is a half-word - 0x00000001 - - - WORD - Each unit transfer is a word - 0x00000002 - - - - - DSTINC - Destination Address Increment Size - 28 - 2 - read-write - - - ONE - Increment destination address by one unit data size after each write - 0x00000000 - - - TWO - Increment destination address by two unit data sizes after each write - 0x00000001 - - - FOUR - Increment destination address by four unit data sizes after each write - 0x00000002 - - - NONE - Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. - 0x00000003 - - - - - SRCMODE - Source Addressing Mode - 30 - 1 - read-only - - - DSTMODE - Destination Addressing Mode - 31 - 1 - read-only - - - - - CH5_SRC - Channel Descriptor Source Data Address Register - 0x180 - 32 - read-write - 0x00000000 - 0xffffffff - - - SRCADDR - Source Data Address - 0 - 32 - read-write - - - - - CH5_DST - Channel Descriptor Destination Data Address Register - 0x184 - 32 - read-write - 0x00000000 - 0xffffffff - - - DSTADDR - Destination Data Address - 0 - 32 - read-write - - - - - CH5_LINK - Channel Descriptor Link Structure Address Register - 0x188 - 32 - read-write - 0x00000000 - 0xffffffff - - - LINKMODE - Link Structure Addressing Mode - 0 - 1 - read-only - - - LINK - Link Next Structure - 1 - 1 - read-write - - - LINKADDR - Link Structure Address - 2 - 30 - read-write - - - - - CH6_REQSEL - Channel Peripheral Request Select Register - 0x1a0 - 32 - read-write - 0x00000000 - 0x003f000f - - - SIGSEL - Signal Select - 0 - 4 - read-write - - - SOURCESEL - Source Select - 16 - 6 - read-write - - - NONE - No source selected - 0x00000000 - - - PRS - Peripheral Reflex System - 0x00000001 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000c - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000d - - - LEUART0 - Low Energy UART 0 - 0x00000010 - - - I2C0 - I2C 0 - 0x00000014 - - - TIMER0 - Timer 0 - 0x00000018 - - - TIMER1 - Timer 1 - 0x00000019 - - - MSC - "" - 0x00000030 - - - CRYPTO - Advanced Encryption Standard Accelerator - 0x00000031 - - - - - - - CH6_CFG - Channel Configuration Register - 0x1a4 - 32 - read-write - 0x00000000 - 0x00330000 - - - ARBSLOTS - Arbitration Slot Number Select - 16 - 2 - read-write - - - ONE - One arbitration slot selected - 0x00000000 - - - TWO - Two arbitration slots selected - 0x00000001 - - - FOUR - Four arbitration slots selected - 0x00000002 - - - EIGHT - Eight arbitration slots selected - 0x00000003 - - - - - SRCINCSIGN - Source Address Increment Sign - 20 - 1 - read-write - - - DSTINCSIGN - Destination Address Increment Sign - 21 - 1 - read-write - - - - - CH6_LOOP - Channel Loop Counter Register - 0x1a8 - 32 - read-write - 0x00000000 - 0x000000ff - - - LOOPCNT - Linked Structure Sequence Loop Counter - 0 - 8 - read-write - - - - - CH6_CTRL - Channel Descriptor Control Word Register - 0x1ac - 32 - read-write - 0x00000000 - 0xfffffffb - - - STRUCTTYPE - DMA Structure Type - 0 - 2 - read-only - - - TRANSFER - DMA transfer structure type selected. - 0x00000000 - - - SYNCHRONIZE - Synchronization structure type selected. - 0x00000001 - - - WRITE - Write immediate value structure type selected. - 0x00000002 - - - - - STRUCTREQ - Structure DMA Transfer Request - 3 - 1 - write-only - - - XFERCNT - DMA Unit Data Transfer Count - 4 - 11 - read-write - - - BYTESWAP - Endian Byte Swap - 15 - 1 - read-write - - - BLOCKSIZE - Block Transfer Size - 16 - 4 - read-write - - - UNIT1 - One unit transfer per arbitration - 0x00000000 - - - UNIT2 - Two unit transfers per arbitration - 0x00000001 - - - UNIT3 - Three unit transfers per arbitration - 0x00000002 - - - UNIT4 - Four unit transfers per arbitration - 0x00000003 - - - UNIT6 - Six unit transfers per arbitration - 0x00000004 - - - UNIT8 - Eight unit transfers per arbitration - 0x00000005 - - - UNIT16 - Sixteen unit transfers per arbitration - 0x00000007 - - - UNIT32 - 32 unit transfers per arbitration - 0x00000009 - - - UNIT64 - 64 unit transfers per arbitration - 0x0000000a - - - UNIT128 - 128 unit transfers per arbitration - 0x0000000b - - - UNIT256 - 256 unit transfers per arbitration - 0x0000000c - - - UNIT512 - 512 unit transfers per arbitration - 0x0000000d - - - UNIT1024 - 1024 unit transfers per arbitration - 0x0000000e - - - ALL - Transfer all units as specified by the XFRCNT field - 0x0000000f - - - - - DONEIFSEN - DMA Operation Done Interrupt Flag Set Enable - 20 - 1 - read-write - - - REQMODE - DMA Request Transfer Mode Select - 21 - 1 - read-write - - - DECLOOPCNT - Decrement Loop Count - 22 - 1 - read-write - - - IGNORESREQ - Ignore Sreq - 23 - 1 - read-write - - - SRCINC - Source Address Increment Size - 24 - 2 - read-write - - - ONE - Increment source address by one unit data size after each read - 0x00000000 - - - TWO - Increment source address by two unit data sizes after each read - 0x00000001 - - - FOUR - Increment source address by four unit data sizes after each read - 0x00000002 - - - NONE - Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. - 0x00000003 - - - - - SIZE - Unit Data Transfer Size - 26 - 2 - read-write - - - BYTE - Each unit transfer is a byte - 0x00000000 - - - HALFWORD - Each unit transfer is a half-word - 0x00000001 - - - WORD - Each unit transfer is a word - 0x00000002 - - - - - DSTINC - Destination Address Increment Size - 28 - 2 - read-write - - - ONE - Increment destination address by one unit data size after each write - 0x00000000 - - - TWO - Increment destination address by two unit data sizes after each write - 0x00000001 - - - FOUR - Increment destination address by four unit data sizes after each write - 0x00000002 - - - NONE - Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. - 0x00000003 - - - - - SRCMODE - Source Addressing Mode - 30 - 1 - read-only - - - DSTMODE - Destination Addressing Mode - 31 - 1 - read-only - - - - - CH6_SRC - Channel Descriptor Source Data Address Register - 0x1b0 - 32 - read-write - 0x00000000 - 0xffffffff - - - SRCADDR - Source Data Address - 0 - 32 - read-write - - - - - CH6_DST - Channel Descriptor Destination Data Address Register - 0x1b4 - 32 - read-write - 0x00000000 - 0xffffffff - - - DSTADDR - Destination Data Address - 0 - 32 - read-write - - - - - CH6_LINK - Channel Descriptor Link Structure Address Register - 0x1b8 - 32 - read-write - 0x00000000 - 0xffffffff - - - LINKMODE - Link Structure Addressing Mode - 0 - 1 - read-only - - - LINK - Link Next Structure - 1 - 1 - read-write - - - LINKADDR - Link Structure Address - 2 - 30 - read-write - - - - - CH7_REQSEL - Channel Peripheral Request Select Register - 0x1d0 - 32 - read-write - 0x00000000 - 0x003f000f - - - SIGSEL - Signal Select - 0 - 4 - read-write - - - SOURCESEL - Source Select - 16 - 6 - read-write - - - NONE - No source selected - 0x00000000 - - - PRS - Peripheral Reflex System - 0x00000001 - - - ADC0 - Analog to Digital Converter 0 - 0x00000008 - - - USART0 - Universal Synchronous/Asynchronous Receiver/Transmitter 0 - 0x0000000c - - - USART1 - Universal Synchronous/Asynchronous Receiver/Transmitter 1 - 0x0000000d - - - LEUART0 - Low Energy UART 0 - 0x00000010 - - - I2C0 - I2C 0 - 0x00000014 - - - TIMER0 - Timer 0 - 0x00000018 - - - TIMER1 - Timer 1 - 0x00000019 - - - MSC - "" - 0x00000030 - - - CRYPTO - Advanced Encryption Standard Accelerator - 0x00000031 - - - - - - - CH7_CFG - Channel Configuration Register - 0x1d4 - 32 - read-write - 0x00000000 - 0x00330000 - - - ARBSLOTS - Arbitration Slot Number Select - 16 - 2 - read-write - - - ONE - One arbitration slot selected - 0x00000000 - - - TWO - Two arbitration slots selected - 0x00000001 - - - FOUR - Four arbitration slots selected - 0x00000002 - - - EIGHT - Eight arbitration slots selected - 0x00000003 - - - - - SRCINCSIGN - Source Address Increment Sign - 20 - 1 - read-write - - - DSTINCSIGN - Destination Address Increment Sign - 21 - 1 - read-write - - - - - CH7_LOOP - Channel Loop Counter Register - 0x1d8 - 32 - read-write - 0x00000000 - 0x000000ff - - - LOOPCNT - Linked Structure Sequence Loop Counter - 0 - 8 - read-write - - - - - CH7_CTRL - Channel Descriptor Control Word Register - 0x1dc - 32 - read-write - 0x00000000 - 0xfffffffb - - - STRUCTTYPE - DMA Structure Type - 0 - 2 - read-only - - - TRANSFER - DMA transfer structure type selected. - 0x00000000 - - - SYNCHRONIZE - Synchronization structure type selected. - 0x00000001 - - - WRITE - Write immediate value structure type selected. - 0x00000002 - - - - - STRUCTREQ - Structure DMA Transfer Request - 3 - 1 - write-only - - - XFERCNT - DMA Unit Data Transfer Count - 4 - 11 - read-write - - - BYTESWAP - Endian Byte Swap - 15 - 1 - read-write - - - BLOCKSIZE - Block Transfer Size - 16 - 4 - read-write - - - UNIT1 - One unit transfer per arbitration - 0x00000000 - - - UNIT2 - Two unit transfers per arbitration - 0x00000001 - - - UNIT3 - Three unit transfers per arbitration - 0x00000002 - - - UNIT4 - Four unit transfers per arbitration - 0x00000003 - - - UNIT6 - Six unit transfers per arbitration - 0x00000004 - - - UNIT8 - Eight unit transfers per arbitration - 0x00000005 - - - UNIT16 - Sixteen unit transfers per arbitration - 0x00000007 - - - UNIT32 - 32 unit transfers per arbitration - 0x00000009 - - - UNIT64 - 64 unit transfers per arbitration - 0x0000000a - - - UNIT128 - 128 unit transfers per arbitration - 0x0000000b - - - UNIT256 - 256 unit transfers per arbitration - 0x0000000c - - - UNIT512 - 512 unit transfers per arbitration - 0x0000000d - - - UNIT1024 - 1024 unit transfers per arbitration - 0x0000000e - - - ALL - Transfer all units as specified by the XFRCNT field - 0x0000000f - - - - - DONEIFSEN - DMA Operation Done Interrupt Flag Set Enable - 20 - 1 - read-write - - - REQMODE - DMA Request Transfer Mode Select - 21 - 1 - read-write - - - DECLOOPCNT - Decrement Loop Count - 22 - 1 - read-write - - - IGNORESREQ - Ignore Sreq - 23 - 1 - read-write - - - SRCINC - Source Address Increment Size - 24 - 2 - read-write - - - ONE - Increment source address by one unit data size after each read - 0x00000000 - - - TWO - Increment source address by two unit data sizes after each read - 0x00000001 - - - FOUR - Increment source address by four unit data sizes after each read - 0x00000002 - - - NONE - Do not increment the source address. In this mode reads are made from a fixed source address, for example reading FIFO. - 0x00000003 - - - - - SIZE - Unit Data Transfer Size - 26 - 2 - read-write - - - BYTE - Each unit transfer is a byte - 0x00000000 - - - HALFWORD - Each unit transfer is a half-word - 0x00000001 - - - WORD - Each unit transfer is a word - 0x00000002 - - - - - DSTINC - Destination Address Increment Size - 28 - 2 - read-write - - - ONE - Increment destination address by one unit data size after each write - 0x00000000 - - - TWO - Increment destination address by two unit data sizes after each write - 0x00000001 - - - FOUR - Increment destination address by four unit data sizes after each write - 0x00000002 - - - NONE - Do not increment the destination address. Writes are made to a fixed destination address, for example writing to a FIFO. - 0x00000003 - - - - - SRCMODE - Source Addressing Mode - 30 - 1 - read-only - - - DSTMODE - Destination Addressing Mode - 31 - 1 - read-only - - - - - CH7_SRC - Channel Descriptor Source Data Address Register - 0x1e0 - 32 - read-write - 0x00000000 - 0xffffffff - - - SRCADDR - Source Data Address - 0 - 32 - read-write - - - - - CH7_DST - Channel Descriptor Destination Data Address Register - 0x1e4 - 32 - read-write - 0x00000000 - 0xffffffff - - - DSTADDR - Destination Data Address - 0 - 32 - read-write - - - - - CH7_LINK - Channel Descriptor Link Structure Address Register - 0x1e8 - 32 - read-write - 0x00000000 - 0xffffffff - - - LINKMODE - Link Structure Addressing Mode - 0 - 1 - read-only - - - LINK - Link Next Structure - 1 - 1 - read-write - - - LINKADDR - Link Structure Address - 2 - 30 - read-write - - - - - - - FPUEH - 1.6 - FPUEH - 0x400e1000 - - 0 - 0x00000400 - registers - - - FPUEH - 33 - - - - IF - Interrupt Flag Register - 0x0 - 32 - read-only - 0x00000000 - 0x0000003f - - - FPIOC - FPU invalid operation - 0 - 1 - read-only - - - FPDZC - FPU divide-by-zero exception - 1 - 1 - read-only - - - FPUFC - FPU underflow exception - 2 - 1 - read-only - - - FPOFC - FPU overflow exception - 3 - 1 - read-only - - - FPIDC - FPU input denormal exception - 4 - 1 - read-only - - - FPIXC - FPU inexact exception - 5 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x4 - 32 - write-only - 0x00000000 - 0x0000003f - - - FPIOC - Set FPIOC Interrupt Flag - 0 - 1 - write-only - - - FPDZC - Set FPDZC Interrupt Flag - 1 - 1 - write-only - - - FPUFC - Set FPUFC Interrupt Flag - 2 - 1 - write-only - - - FPOFC - Set FPOFC Interrupt Flag - 3 - 1 - write-only - - - FPIDC - Set FPIDC Interrupt Flag - 4 - 1 - write-only - - - FPIXC - Set FPIXC Interrupt Flag - 5 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x8 - 32 - write-only - 0x00000000 - 0x0000003f - - - FPIOC - Clear FPIOC Interrupt Flag - 0 - 1 - write-only - - - FPDZC - Clear FPDZC Interrupt Flag - 1 - 1 - write-only - - - FPUFC - Clear FPUFC Interrupt Flag - 2 - 1 - write-only - - - FPOFC - Clear FPOFC Interrupt Flag - 3 - 1 - write-only - - - FPIDC - Clear FPIDC Interrupt Flag - 4 - 1 - write-only - - - FPIXC - Clear FPIXC Interrupt Flag - 5 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0xc - 32 - read-write - 0x00000000 - 0x0000003f - - - FPIOC - FPIOC Interrupt Enable - 0 - 1 - read-write - - - FPDZC - FPDZC Interrupt Enable - 1 - 1 - read-write - - - FPUFC - FPUFC Interrupt Enable - 2 - 1 - read-write - - - FPOFC - FPOFC Interrupt Enable - 3 - 1 - read-write - - - FPIDC - FPIDC Interrupt Enable - 4 - 1 - read-write - - - FPIXC - FPIXC Interrupt Enable - 5 - 1 - read-write - - - - - - - GPCRC - 1.6 - GPCRC - 0x4001c000 - - 0 - 0x00000400 - registers - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x00002711 - - - EN - CRC Functionality Enable - 0 - 1 - read-write - - - POLYSEL - Polynomial Select - 4 - 1 - read-write - - - BYTEMODE - Byte Mode Enable - 8 - 1 - read-write - - - BITREVERSE - Byte-level Bit Reverse Enable - 9 - 1 - read-write - - - BYTEREVERSE - Byte Reverse Mode - 10 - 1 - read-write - - - AUTOINIT - Auto Init Enable - 13 - 1 - read-write - - - - - CMD - Command Register - 0x4 - 32 - write-only - 0x00000000 - 0x00000001 - - - INIT - Initialization Enable - 0 - 1 - write-only - - - - - INIT - CRC Init Value - 0x8 - 32 - read-write - 0x00000000 - 0xffffffff - - - INIT - CRC Initialization Value - 0 - 32 - read-write - - - - - POLY - CRC Polynomial Value - 0xc - 32 - read-write - 0x00000000 - 0x0000ffff - - - POLY - CRC Polynomial Value - 0 - 16 - read-write - - - - - INPUTDATA - Input 32-bit Data Register - 0x10 - 32 - read-write - 0x00000000 - 0xffffffff - - - INPUTDATA - Input Data for 32-bit - 0 - 32 - read-write - - - - - INPUTDATAHWORD - Input 16-bit Data Register - 0x14 - 32 - read-write - 0x00000000 - 0x0000ffff - - - INPUTDATAHWORD - Input Data for 16-bit - 0 - 16 - read-write - - - - - INPUTDATABYTE - Input 8-bit Data Register - 0x18 - 32 - read-write - 0x00000000 - 0x000000ff - - - INPUTDATABYTE - Input Data for 8-bit - 0 - 8 - read-write - - - - - DATA - CRC Data Register - 0x1c - 32 - read-only - 0x00000000 - 0xffffffff - - - DATA - CRC Data Register - 0 - 32 - read-only - - - - - DATAREV - CRC Data Reverse Register - 0x20 - 32 - read-only - 0x00000000 - 0xffffffff - - - DATAREV - Data Reverse Value - 0 - 32 - read-only - - - - - DATABYTEREV - CRC Data Byte Reverse Register - 0x24 - 32 - read-only - 0x00000000 - 0xffffffff - - - DATABYTEREV - Data Byte Reverse Value - 0 - 32 - read-only - - - - - - - TIMER0 - 1.6 - TIMER0 - 0x40018000 - - 0 - 0x00000400 - registers - - - TIMER0 - 10 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x3f032ffb - - - MODE - Timer Mode - 0 - 2 - read-write - - - UP - Up-count mode - 0x00000000 - - - DOWN - Down-count mode - 0x00000001 - - - UPDOWN - Up/down-count mode - 0x00000002 - - - QDEC - Quadrature decoder mode - 0x00000003 - - - - - SYNC - Timer Start/Stop/Reload Synchronization - 3 - 1 - read-write - - - OSMEN - One-shot Mode Enable - 4 - 1 - read-write - - - QDM - Quadrature Decoder Mode Selection - 5 - 1 - read-write - - - DEBUGRUN - Debug Mode Run Enable - 6 - 1 - read-write - - - DMACLRACT - DMA Request Clear on Active - 7 - 1 - read-write - - - RISEA - Timer Rising Input Edge Action - 8 - 2 - read-write - - - NONE - No action - 0x00000000 - - - START - Start counter without reload - 0x00000001 - - - STOP - Stop counter without reload - 0x00000002 - - - RELOADSTART - Reload and start counter - 0x00000003 - - - - - FALLA - Timer Falling Input Edge Action - 10 - 2 - read-write - - - NONE - No action - 0x00000000 - - - START - Start counter without reload - 0x00000001 - - - STOP - Stop counter without reload - 0x00000002 - - - RELOADSTART - Reload and start counter - 0x00000003 - - - - - X2CNT - 2x Count Mode - 13 - 1 - read-write - - - CLKSEL - Clock Source Select - 16 - 2 - read-write - - - PRESCHFPERCLK - Prescaled HFPERCLK - 0x00000000 - - - CC1 - Compare/Capture Channel 1 Input - 0x00000001 - - - TIMEROUF - Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer - 0x00000002 - - - - - PRESC - Prescaler Setting - 24 - 4 - read-write - - - DIV1 - The HFPERCLK is undivided - 0x00000000 - - - DIV2 - The HFPERCLK is divided by 2 - 0x00000001 - - - DIV4 - The HFPERCLK is divided by 4 - 0x00000002 - - - DIV8 - The HFPERCLK is divided by 8 - 0x00000003 - - - DIV16 - The HFPERCLK is divided by 16 - 0x00000004 - - - DIV32 - The HFPERCLK is divided by 32 - 0x00000005 - - - DIV64 - The HFPERCLK is divided by 64 - 0x00000006 - - - DIV128 - The HFPERCLK is divided by 128 - 0x00000007 - - - DIV256 - The HFPERCLK is divided by 256 - 0x00000008 - - - DIV512 - The HFPERCLK is divided by 512 - 0x00000009 - - - DIV1024 - The HFPERCLK is divided by 1024 - 0x0000000a - - - - - ATI - Always Track Inputs - 28 - 1 - read-write - - - RSSCOIST - Reload-Start Sets Compare Ouptut initial State - 29 - 1 - read-write - - - - - CMD - Command Register - 0x4 - 32 - write-only - 0x00000000 - 0x00000003 - - - START - Start Timer - 0 - 1 - write-only - - - STOP - Stop Timer - 1 - 1 - write-only - - - - - STATUS - Status Register - 0x8 - 32 - read-only - 0x00000000 - 0x0f0f0f07 - - - RUNNING - Running - 0 - 1 - read-only - - - DIR - Direction - 1 - 1 - read-only - - - TOPBV - TOPB Valid - 2 - 1 - read-only - - - CCVBV0 - CC0 CCVB Valid - 8 - 1 - read-only - - - CCVBV1 - CC1 CCVB Valid - 9 - 1 - read-only - - - CCVBV2 - CC2 CCVB Valid - 10 - 1 - read-only - - - CCVBV3 - CC3 CCVB Valid - 11 - 1 - read-only - - - ICV0 - CC0 Input Capture Valid - 16 - 1 - read-only - - - ICV1 - CC1 Input Capture Valid - 17 - 1 - read-only - - - ICV2 - CC2 Input Capture Valid - 18 - 1 - read-only - - - ICV3 - CC3 Input Capture Valid - 19 - 1 - read-only - - - CCPOL0 - CC0 Polarity - 24 - 1 - read-only - - - CCPOL1 - CC1 Polarity - 25 - 1 - read-only - - - CCPOL2 - CC2 Polarity - 26 - 1 - read-only - - - CCPOL3 - CC3 Polarity - 27 - 1 - read-only - - - - - IF - Interrupt Flag Register - 0xc - 32 - read-only - 0x00000000 - 0x00000ff7 - - - OF - Overflow Interrupt Flag - 0 - 1 - read-only - - - UF - Underflow Interrupt Flag - 1 - 1 - read-only - - - DIRCHG - Direction Change Detect Interrupt Flag - 2 - 1 - read-only - - - CC0 - CC Channel 0 Interrupt Flag - 4 - 1 - read-only - - - CC1 - CC Channel 1 Interrupt Flag - 5 - 1 - read-only - - - CC2 - CC Channel 2 Interrupt Flag - 6 - 1 - read-only - - - CC3 - CC Channel 3 Interrupt Flag - 7 - 1 - read-only - - - ICBOF0 - CC Channel 0 Input Capture Buffer Overflow Interrupt Flag - 8 - 1 - read-only - - - ICBOF1 - CC Channel 1 Input Capture Buffer Overflow Interrupt Flag - 9 - 1 - read-only - - - ICBOF2 - CC Channel 2 Input Capture Buffer Overflow Interrupt Flag - 10 - 1 - read-only - - - ICBOF3 - CC Channel 3 Input Capture Buffer Overflow Interrupt Flag - 11 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x10 - 32 - write-only - 0x00000000 - 0x00000ff7 - - - OF - Set OF Interrupt Flag - 0 - 1 - write-only - - - UF - Set UF Interrupt Flag - 1 - 1 - write-only - - - DIRCHG - Set DIRCHG Interrupt Flag - 2 - 1 - write-only - - - CC0 - Set CC0 Interrupt Flag - 4 - 1 - write-only - - - CC1 - Set CC1 Interrupt Flag - 5 - 1 - write-only - - - CC2 - Set CC2 Interrupt Flag - 6 - 1 - write-only - - - CC3 - Set CC3 Interrupt Flag - 7 - 1 - write-only - - - ICBOF0 - Set ICBOF0 Interrupt Flag - 8 - 1 - write-only - - - ICBOF1 - Set ICBOF1 Interrupt Flag - 9 - 1 - write-only - - - ICBOF2 - Set ICBOF2 Interrupt Flag - 10 - 1 - write-only - - - ICBOF3 - Set ICBOF3 Interrupt Flag - 11 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x14 - 32 - write-only - 0x00000000 - 0x00000ff7 - - - OF - Clear OF Interrupt Flag - 0 - 1 - write-only - - - UF - Clear UF Interrupt Flag - 1 - 1 - write-only - - - DIRCHG - Clear DIRCHG Interrupt Flag - 2 - 1 - write-only - - - CC0 - Clear CC0 Interrupt Flag - 4 - 1 - write-only - - - CC1 - Clear CC1 Interrupt Flag - 5 - 1 - write-only - - - CC2 - Clear CC2 Interrupt Flag - 6 - 1 - write-only - - - CC3 - Clear CC3 Interrupt Flag - 7 - 1 - write-only - - - ICBOF0 - Clear ICBOF0 Interrupt Flag - 8 - 1 - write-only - - - ICBOF1 - Clear ICBOF1 Interrupt Flag - 9 - 1 - write-only - - - ICBOF2 - Clear ICBOF2 Interrupt Flag - 10 - 1 - write-only - - - ICBOF3 - Clear ICBOF3 Interrupt Flag - 11 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x18 - 32 - read-write - 0x00000000 - 0x00000ff7 - - - OF - OF Interrupt Enable - 0 - 1 - read-write - - - UF - UF Interrupt Enable - 1 - 1 - read-write - - - DIRCHG - DIRCHG Interrupt Enable - 2 - 1 - read-write - - - CC0 - CC0 Interrupt Enable - 4 - 1 - read-write - - - CC1 - CC1 Interrupt Enable - 5 - 1 - read-write - - - CC2 - CC2 Interrupt Enable - 6 - 1 - read-write - - - CC3 - CC3 Interrupt Enable - 7 - 1 - read-write - - - ICBOF0 - ICBOF0 Interrupt Enable - 8 - 1 - read-write - - - ICBOF1 - ICBOF1 Interrupt Enable - 9 - 1 - read-write - - - ICBOF2 - ICBOF2 Interrupt Enable - 10 - 1 - read-write - - - ICBOF3 - ICBOF3 Interrupt Enable - 11 - 1 - read-write - - - - - TOP - Counter Top Value Register - 0x1c - 32 - read-write - 0x0000ffff - 0x0000ffff - - - TOP - Counter Top Value - 0 - 16 - read-write - - - - - TOPB - Counter Top Value Buffer Register - 0x20 - 32 - read-write - 0x00000000 - 0x0000ffff - - - TOPB - Counter Top Value Buffer - 0 - 16 - read-write - - - - - CNT - Counter Value Register - 0x24 - 32 - read-write - 0x00000000 - 0x0000ffff - - - CNT - Counter Value - 0 - 16 - read-write - - - - - LOCK - TIMER Configuration Lock Register - 0x2c - 32 - read-write - 0x00000000 - 0x0000ffff - - - TIMERLOCKKEY - Timer Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x30 - 32 - read-write - 0x00000000 - 0x0000070f - - - CC0PEN - CC Channel 0 Pin Enable - 0 - 1 - read-write - - - CC1PEN - CC Channel 1 Pin Enable - 1 - 1 - read-write - - - CC2PEN - CC Channel 2 Pin Enable - 2 - 1 - read-write - - - CC3PEN - CC Channel 3 Pin Enable - 3 - 1 - read-write - - - CDTI0PEN - CC Channel 0 Complementary Dead-Time Insertion Pin Enable - 8 - 1 - read-write - - - CDTI1PEN - CC Channel 1 Complementary Dead-Time Insertion Pin Enable - 9 - 1 - read-write - - - CDTI2PEN - CC Channel 2 Complementary Dead-Time Insertion Pin Enable - 10 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x34 - 32 - read-write - 0x00000000 - 0x3f3f3f3f - - - CC0LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CC1LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CC2LOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CC3LOC - I/O Location - 24 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - ROUTELOC2 - I/O Routing Location Register - 0x3c - 32 - read-write - 0x00000000 - 0x003f3f3f - - - CDTI0LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CDTI1LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CDTI2LOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - CC0_CTRL - CC Channel Control Register - 0x60 - 32 - read-write - 0x00000000 - 0x7f0f3f17 - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - PWM - Pulse-Width Modulation - 0x00000003 - - - - - OUTINV - Output Invert - 2 - 1 - read-write - - - COIST - Compare Output Initial State - 4 - 1 - read-write - - - CMOA - Compare Match Output Action - 8 - 2 - read-write - - - NONE - No action on compare match - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - COFOA - Counter Overflow Output Action - 10 - 2 - read-write - - - NONE - No action on counter overflow - 0x00000000 - - - TOGGLE - Toggle output on counter overflow - 0x00000001 - - - CLEAR - Clear output on counter overflow - 0x00000002 - - - SET - Set output on counter overflow - 0x00000003 - - - - - CUFOA - Counter Underflow Output Action - 12 - 2 - read-write - - - NONE - No action on counter underflow - 0x00000000 - - - TOGGLE - Toggle output on counter underflow - 0x00000001 - - - CLEAR - Clear output on counter underflow - 0x00000002 - - - SET - Set output on counter underflow - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - ICEDGE - Input Capture Edge Select - 24 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - ICEVCTRL - Input Capture Event Control - 26 - 2 - read-write - - - EVERYEDGE - PRS output pulse and interrupt flag set on every capture - 0x00000000 - - - EVERYSECONDEDGE - PRS output pulse and interrupt flag set on every second capture - 0x00000001 - - - RISING - PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) - 0x00000002 - - - FALLING - PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) - 0x00000003 - - - - - PRSCONF - PRS Configuration - 28 - 1 - read-write - - - INSEL - Input Selection - 29 - 1 - read-write - - - FILT - Digital Filter - 30 - 1 - read-write - - - - - CC0_CCV - CC Channel Value Register - 0x64 - 32 - read-write - 0x00000000 - 0x0000ffff - modifyExternal - - - CCV - CC Channel Value - 0 - 16 - read-write - - - - - CC0_CCVP - CC Channel Value Peek Register - 0x68 - 32 - read-only - 0x00000000 - 0x0000ffff - - - CCVP - CC Channel Value Peek - 0 - 16 - read-only - - - - - CC0_CCVB - CC Channel Buffer Register - 0x6c - 32 - read-write - 0x00000000 - 0x0000ffff - - - CCVB - CC Channel Value Buffer - 0 - 16 - read-write - - - - - CC1_CTRL - CC Channel Control Register - 0x70 - 32 - read-write - 0x00000000 - 0x7f0f3f17 - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - PWM - Pulse-Width Modulation - 0x00000003 - - - - - OUTINV - Output Invert - 2 - 1 - read-write - - - COIST - Compare Output Initial State - 4 - 1 - read-write - - - CMOA - Compare Match Output Action - 8 - 2 - read-write - - - NONE - No action on compare match - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - COFOA - Counter Overflow Output Action - 10 - 2 - read-write - - - NONE - No action on counter overflow - 0x00000000 - - - TOGGLE - Toggle output on counter overflow - 0x00000001 - - - CLEAR - Clear output on counter overflow - 0x00000002 - - - SET - Set output on counter overflow - 0x00000003 - - - - - CUFOA - Counter Underflow Output Action - 12 - 2 - read-write - - - NONE - No action on counter underflow - 0x00000000 - - - TOGGLE - Toggle output on counter underflow - 0x00000001 - - - CLEAR - Clear output on counter underflow - 0x00000002 - - - SET - Set output on counter underflow - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - ICEDGE - Input Capture Edge Select - 24 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - ICEVCTRL - Input Capture Event Control - 26 - 2 - read-write - - - EVERYEDGE - PRS output pulse and interrupt flag set on every capture - 0x00000000 - - - EVERYSECONDEDGE - PRS output pulse and interrupt flag set on every second capture - 0x00000001 - - - RISING - PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) - 0x00000002 - - - FALLING - PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) - 0x00000003 - - - - - PRSCONF - PRS Configuration - 28 - 1 - read-write - - - INSEL - Input Selection - 29 - 1 - read-write - - - FILT - Digital Filter - 30 - 1 - read-write - - - - - CC1_CCV - CC Channel Value Register - 0x74 - 32 - read-write - 0x00000000 - 0x0000ffff - modifyExternal - - - CCV - CC Channel Value - 0 - 16 - read-write - - - - - CC1_CCVP - CC Channel Value Peek Register - 0x78 - 32 - read-only - 0x00000000 - 0x0000ffff - - - CCVP - CC Channel Value Peek - 0 - 16 - read-only - - - - - CC1_CCVB - CC Channel Buffer Register - 0x7c - 32 - read-write - 0x00000000 - 0x0000ffff - - - CCVB - CC Channel Value Buffer - 0 - 16 - read-write - - - - - CC2_CTRL - CC Channel Control Register - 0x80 - 32 - read-write - 0x00000000 - 0x7f0f3f17 - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - PWM - Pulse-Width Modulation - 0x00000003 - - - - - OUTINV - Output Invert - 2 - 1 - read-write - - - COIST - Compare Output Initial State - 4 - 1 - read-write - - - CMOA - Compare Match Output Action - 8 - 2 - read-write - - - NONE - No action on compare match - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - COFOA - Counter Overflow Output Action - 10 - 2 - read-write - - - NONE - No action on counter overflow - 0x00000000 - - - TOGGLE - Toggle output on counter overflow - 0x00000001 - - - CLEAR - Clear output on counter overflow - 0x00000002 - - - SET - Set output on counter overflow - 0x00000003 - - - - - CUFOA - Counter Underflow Output Action - 12 - 2 - read-write - - - NONE - No action on counter underflow - 0x00000000 - - - TOGGLE - Toggle output on counter underflow - 0x00000001 - - - CLEAR - Clear output on counter underflow - 0x00000002 - - - SET - Set output on counter underflow - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - ICEDGE - Input Capture Edge Select - 24 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - ICEVCTRL - Input Capture Event Control - 26 - 2 - read-write - - - EVERYEDGE - PRS output pulse and interrupt flag set on every capture - 0x00000000 - - - EVERYSECONDEDGE - PRS output pulse and interrupt flag set on every second capture - 0x00000001 - - - RISING - PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) - 0x00000002 - - - FALLING - PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) - 0x00000003 - - - - - PRSCONF - PRS Configuration - 28 - 1 - read-write - - - INSEL - Input Selection - 29 - 1 - read-write - - - FILT - Digital Filter - 30 - 1 - read-write - - - - - CC2_CCV - CC Channel Value Register - 0x84 - 32 - read-write - 0x00000000 - 0x0000ffff - modifyExternal - - - CCV - CC Channel Value - 0 - 16 - read-write - - - - - CC2_CCVP - CC Channel Value Peek Register - 0x88 - 32 - read-only - 0x00000000 - 0x0000ffff - - - CCVP - CC Channel Value Peek - 0 - 16 - read-only - - - - - CC2_CCVB - CC Channel Buffer Register - 0x8c - 32 - read-write - 0x00000000 - 0x0000ffff - - - CCVB - CC Channel Value Buffer - 0 - 16 - read-write - - - - - CC3_CTRL - CC Channel Control Register - 0x90 - 32 - read-write - 0x00000000 - 0x7f0f3f17 - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - PWM - Pulse-Width Modulation - 0x00000003 - - - - - OUTINV - Output Invert - 2 - 1 - read-write - - - COIST - Compare Output Initial State - 4 - 1 - read-write - - - CMOA - Compare Match Output Action - 8 - 2 - read-write - - - NONE - No action on compare match - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - COFOA - Counter Overflow Output Action - 10 - 2 - read-write - - - NONE - No action on counter overflow - 0x00000000 - - - TOGGLE - Toggle output on counter overflow - 0x00000001 - - - CLEAR - Clear output on counter overflow - 0x00000002 - - - SET - Set output on counter overflow - 0x00000003 - - - - - CUFOA - Counter Underflow Output Action - 12 - 2 - read-write - - - NONE - No action on counter underflow - 0x00000000 - - - TOGGLE - Toggle output on counter underflow - 0x00000001 - - - CLEAR - Clear output on counter underflow - 0x00000002 - - - SET - Set output on counter underflow - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - ICEDGE - Input Capture Edge Select - 24 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - ICEVCTRL - Input Capture Event Control - 26 - 2 - read-write - - - EVERYEDGE - PRS output pulse and interrupt flag set on every capture - 0x00000000 - - - EVERYSECONDEDGE - PRS output pulse and interrupt flag set on every second capture - 0x00000001 - - - RISING - PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) - 0x00000002 - - - FALLING - PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) - 0x00000003 - - - - - PRSCONF - PRS Configuration - 28 - 1 - read-write - - - INSEL - Input Selection - 29 - 1 - read-write - - - FILT - Digital Filter - 30 - 1 - read-write - - - - - CC3_CCV - CC Channel Value Register - 0x94 - 32 - read-write - 0x00000000 - 0x0000ffff - modifyExternal - - - CCV - CC Channel Value - 0 - 16 - read-write - - - - - CC3_CCVP - CC Channel Value Peek Register - 0x98 - 32 - read-only - 0x00000000 - 0x0000ffff - - - CCVP - CC Channel Value Peek - 0 - 16 - read-only - - - - - CC3_CCVB - CC Channel Buffer Register - 0x9c - 32 - read-write - 0x00000000 - 0x0000ffff - - - CCVB - CC Channel Value Buffer - 0 - 16 - read-write - - - - - DTCTRL - DTI Control Register - 0xa0 - 32 - read-write - 0x00000000 - 0x010006ff - - - DTEN - DTI Enable - 0 - 1 - read-write - - - DTDAS - DTI Automatic Start-up Functionality - 1 - 1 - read-write - - - DTIPOL - DTI Inactive Polarity - 2 - 1 - read-write - - - DTCINV - DTI Complementary Output Invert. - 3 - 1 - read-write - - - DTPRSSEL - DTI PRS Source Channel Select - 4 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - DTAR - DTI Always Run - 9 - 1 - read-write - - - DTFATS - DTI Fault Action on Timer Stop - 10 - 1 - read-write - - - DTPRSEN - DTI PRS Source Enable - 24 - 1 - read-write - - - - - DTTIME - DTI Time Control Register - 0xa4 - 32 - read-write - 0x00000000 - 0x003f3f0f - - - DTPRESC - DTI Prescaler Setting - 0 - 4 - read-write - - - DIV1 - The HFPERCLK is undivided - 0x00000000 - - - DIV2 - The HFPERCLK is divided by 2 - 0x00000001 - - - DIV4 - The HFPERCLK is divided by 4 - 0x00000002 - - - DIV8 - The HFPERCLK is divided by 8 - 0x00000003 - - - DIV16 - The HFPERCLK is divided by 16 - 0x00000004 - - - DIV32 - The HFPERCLK is divided by 32 - 0x00000005 - - - DIV64 - The HFPERCLK is divided by 64 - 0x00000006 - - - DIV128 - The HFPERCLK is divided by 128 - 0x00000007 - - - DIV256 - The HFPERCLK is divided by 256 - 0x00000008 - - - DIV512 - The HFPERCLK is divided by 512 - 0x00000009 - - - DIV1024 - The HFPERCLK is divided by 1024 - 0x0000000a - - - - - DTRISET - DTI Rise-time - 8 - 6 - read-write - - - DTFALLT - DTI Fall-time - 16 - 6 - read-write - - - - - DTFC - DTI Fault Configuration Register - 0xa8 - 32 - read-write - 0x00000000 - 0x0f030f0f - - - DTPRS0FSEL - DTI PRS Fault Source 0 Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as fault source 0 - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as fault source 1 - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as fault source 2 - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as fault source 3 - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as fault source 4 - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as fault source 5 - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as fault source 6 - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as fault source 7 - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as fault source 8 - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as fault source 9 - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as fault source 10 - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as fault source 11 - 0x0000000b - - - - - DTPRS1FSEL - DTI PRS Fault Source 1 Select - 8 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as fault source 1 - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as fault source 1 - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as fault source 1 - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as fault source 1 - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as fault source 1 - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as fault source 1 - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as fault source 1 - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as fault source 1 - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as fault source 1 - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as fault source 1 - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as fault source 1 - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as fault source 1 - 0x0000000b - - - - - DTFA - DTI Fault Action - 16 - 2 - read-write - - - NONE - No action on fault - 0x00000000 - - - INACTIVE - Set outputs inactive - 0x00000001 - - - CLEAR - Clear outputs - 0x00000002 - - - TRISTATE - Tristate outputs - 0x00000003 - - - - - DTPRS0FEN - DTI PRS 0 Fault Enable - 24 - 1 - read-write - - - DTPRS1FEN - DTI PRS 1 Fault Enable - 25 - 1 - read-write - - - DTDBGFEN - DTI Debugger Fault Enable - 26 - 1 - read-write - - - DTLOCKUPFEN - DTI Lockup Fault Enable - 27 - 1 - read-write - - - - - DTOGEN - DTI Output Generation Enable Register - 0xac - 32 - read-write - 0x00000000 - 0x0000003f - - - DTOGCC0EN - DTI CC0 Output Generation Enable - 0 - 1 - read-write - - - DTOGCC1EN - DTI CC1 Output Generation Enable - 1 - 1 - read-write - - - DTOGCC2EN - DTI CC2 Output Generation Enable - 2 - 1 - read-write - - - DTOGCDTI0EN - DTI CDTI0 Output Generation Enable - 3 - 1 - read-write - - - DTOGCDTI1EN - DTI CDTI1 Output Generation Enable - 4 - 1 - read-write - - - DTOGCDTI2EN - DTI CDTI2 Output Generation Enable - 5 - 1 - read-write - - - - - DTFAULT - DTI Fault Register - 0xb0 - 32 - read-only - 0x00000000 - 0x0000000f - - - DTPRS0F - DTI PRS 0 Fault - 0 - 1 - read-only - - - DTPRS1F - DTI PRS 1 Fault - 1 - 1 - read-only - - - DTDBGF - DTI Debugger Fault - 2 - 1 - read-only - - - DTLOCKUPF - DTI Lockup Fault - 3 - 1 - read-only - - - - - DTFAULTC - DTI Fault Clear Register - 0xb4 - 32 - write-only - 0x00000000 - 0x0000000f - - - DTPRS0FC - DTI PRS0 Fault Clear - 0 - 1 - write-only - - - DTPRS1FC - DTI PRS1 Fault Clear - 1 - 1 - write-only - - - DTDBGFC - DTI Debugger Fault Clear - 2 - 1 - write-only - - - TLOCKUPFC - DTI Lockup Fault Clear - 3 - 1 - write-only - - - - - DTLOCK - DTI Configuration Lock Register - 0xb8 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - DTI Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - - - TIMER1 - 1.6 - TIMER1 - 0x40018400 - - 0 - 0x00000400 - registers - - - TIMER1 - 18 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x3f032ffb - - - MODE - Timer Mode - 0 - 2 - read-write - - - UP - Up-count mode - 0x00000000 - - - DOWN - Down-count mode - 0x00000001 - - - UPDOWN - Up/down-count mode - 0x00000002 - - - QDEC - Quadrature decoder mode - 0x00000003 - - - - - SYNC - Timer Start/Stop/Reload Synchronization - 3 - 1 - read-write - - - OSMEN - One-shot Mode Enable - 4 - 1 - read-write - - - QDM - Quadrature Decoder Mode Selection - 5 - 1 - read-write - - - DEBUGRUN - Debug Mode Run Enable - 6 - 1 - read-write - - - DMACLRACT - DMA Request Clear on Active - 7 - 1 - read-write - - - RISEA - Timer Rising Input Edge Action - 8 - 2 - read-write - - - NONE - No action - 0x00000000 - - - START - Start counter without reload - 0x00000001 - - - STOP - Stop counter without reload - 0x00000002 - - - RELOADSTART - Reload and start counter - 0x00000003 - - - - - FALLA - Timer Falling Input Edge Action - 10 - 2 - read-write - - - NONE - No action - 0x00000000 - - - START - Start counter without reload - 0x00000001 - - - STOP - Stop counter without reload - 0x00000002 - - - RELOADSTART - Reload and start counter - 0x00000003 - - - - - X2CNT - 2x Count Mode - 13 - 1 - read-write - - - CLKSEL - Clock Source Select - 16 - 2 - read-write - - - PRESCHFPERCLK - Prescaled HFPERCLK - 0x00000000 - - - CC1 - Compare/Capture Channel 1 Input - 0x00000001 - - - TIMEROUF - Timer is clocked by underflow(down-count) or overflow(up-count) in the lower numbered neighbor Timer - 0x00000002 - - - - - PRESC - Prescaler Setting - 24 - 4 - read-write - - - DIV1 - The HFPERCLK is undivided - 0x00000000 - - - DIV2 - The HFPERCLK is divided by 2 - 0x00000001 - - - DIV4 - The HFPERCLK is divided by 4 - 0x00000002 - - - DIV8 - The HFPERCLK is divided by 8 - 0x00000003 - - - DIV16 - The HFPERCLK is divided by 16 - 0x00000004 - - - DIV32 - The HFPERCLK is divided by 32 - 0x00000005 - - - DIV64 - The HFPERCLK is divided by 64 - 0x00000006 - - - DIV128 - The HFPERCLK is divided by 128 - 0x00000007 - - - DIV256 - The HFPERCLK is divided by 256 - 0x00000008 - - - DIV512 - The HFPERCLK is divided by 512 - 0x00000009 - - - DIV1024 - The HFPERCLK is divided by 1024 - 0x0000000a - - - - - ATI - Always Track Inputs - 28 - 1 - read-write - - - RSSCOIST - Reload-Start Sets Compare Ouptut initial State - 29 - 1 - read-write - - - - - CMD - Command Register - 0x4 - 32 - write-only - 0x00000000 - 0x00000003 - - - START - Start Timer - 0 - 1 - write-only - - - STOP - Stop Timer - 1 - 1 - write-only - - - - - STATUS - Status Register - 0x8 - 32 - read-only - 0x00000000 - 0x0f0f0f07 - - - RUNNING - Running - 0 - 1 - read-only - - - DIR - Direction - 1 - 1 - read-only - - - TOPBV - TOPB Valid - 2 - 1 - read-only - - - CCVBV0 - CC0 CCVB Valid - 8 - 1 - read-only - - - CCVBV1 - CC1 CCVB Valid - 9 - 1 - read-only - - - CCVBV2 - CC2 CCVB Valid - 10 - 1 - read-only - - - CCVBV3 - CC3 CCVB Valid - 11 - 1 - read-only - - - ICV0 - CC0 Input Capture Valid - 16 - 1 - read-only - - - ICV1 - CC1 Input Capture Valid - 17 - 1 - read-only - - - ICV2 - CC2 Input Capture Valid - 18 - 1 - read-only - - - ICV3 - CC3 Input Capture Valid - 19 - 1 - read-only - - - CCPOL0 - CC0 Polarity - 24 - 1 - read-only - - - CCPOL1 - CC1 Polarity - 25 - 1 - read-only - - - CCPOL2 - CC2 Polarity - 26 - 1 - read-only - - - CCPOL3 - CC3 Polarity - 27 - 1 - read-only - - - - - IF - Interrupt Flag Register - 0xc - 32 - read-only - 0x00000000 - 0x00000ff7 - - - OF - Overflow Interrupt Flag - 0 - 1 - read-only - - - UF - Underflow Interrupt Flag - 1 - 1 - read-only - - - DIRCHG - Direction Change Detect Interrupt Flag - 2 - 1 - read-only - - - CC0 - CC Channel 0 Interrupt Flag - 4 - 1 - read-only - - - CC1 - CC Channel 1 Interrupt Flag - 5 - 1 - read-only - - - CC2 - CC Channel 2 Interrupt Flag - 6 - 1 - read-only - - - CC3 - CC Channel 3 Interrupt Flag - 7 - 1 - read-only - - - ICBOF0 - CC Channel 0 Input Capture Buffer Overflow Interrupt Flag - 8 - 1 - read-only - - - ICBOF1 - CC Channel 1 Input Capture Buffer Overflow Interrupt Flag - 9 - 1 - read-only - - - ICBOF2 - CC Channel 2 Input Capture Buffer Overflow Interrupt Flag - 10 - 1 - read-only - - - ICBOF3 - CC Channel 3 Input Capture Buffer Overflow Interrupt Flag - 11 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x10 - 32 - write-only - 0x00000000 - 0x00000ff7 - - - OF - Set OF Interrupt Flag - 0 - 1 - write-only - - - UF - Set UF Interrupt Flag - 1 - 1 - write-only - - - DIRCHG - Set DIRCHG Interrupt Flag - 2 - 1 - write-only - - - CC0 - Set CC0 Interrupt Flag - 4 - 1 - write-only - - - CC1 - Set CC1 Interrupt Flag - 5 - 1 - write-only - - - CC2 - Set CC2 Interrupt Flag - 6 - 1 - write-only - - - CC3 - Set CC3 Interrupt Flag - 7 - 1 - write-only - - - ICBOF0 - Set ICBOF0 Interrupt Flag - 8 - 1 - write-only - - - ICBOF1 - Set ICBOF1 Interrupt Flag - 9 - 1 - write-only - - - ICBOF2 - Set ICBOF2 Interrupt Flag - 10 - 1 - write-only - - - ICBOF3 - Set ICBOF3 Interrupt Flag - 11 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x14 - 32 - write-only - 0x00000000 - 0x00000ff7 - - - OF - Clear OF Interrupt Flag - 0 - 1 - write-only - - - UF - Clear UF Interrupt Flag - 1 - 1 - write-only - - - DIRCHG - Clear DIRCHG Interrupt Flag - 2 - 1 - write-only - - - CC0 - Clear CC0 Interrupt Flag - 4 - 1 - write-only - - - CC1 - Clear CC1 Interrupt Flag - 5 - 1 - write-only - - - CC2 - Clear CC2 Interrupt Flag - 6 - 1 - write-only - - - CC3 - Clear CC3 Interrupt Flag - 7 - 1 - write-only - - - ICBOF0 - Clear ICBOF0 Interrupt Flag - 8 - 1 - write-only - - - ICBOF1 - Clear ICBOF1 Interrupt Flag - 9 - 1 - write-only - - - ICBOF2 - Clear ICBOF2 Interrupt Flag - 10 - 1 - write-only - - - ICBOF3 - Clear ICBOF3 Interrupt Flag - 11 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x18 - 32 - read-write - 0x00000000 - 0x00000ff7 - - - OF - OF Interrupt Enable - 0 - 1 - read-write - - - UF - UF Interrupt Enable - 1 - 1 - read-write - - - DIRCHG - DIRCHG Interrupt Enable - 2 - 1 - read-write - - - CC0 - CC0 Interrupt Enable - 4 - 1 - read-write - - - CC1 - CC1 Interrupt Enable - 5 - 1 - read-write - - - CC2 - CC2 Interrupt Enable - 6 - 1 - read-write - - - CC3 - CC3 Interrupt Enable - 7 - 1 - read-write - - - ICBOF0 - ICBOF0 Interrupt Enable - 8 - 1 - read-write - - - ICBOF1 - ICBOF1 Interrupt Enable - 9 - 1 - read-write - - - ICBOF2 - ICBOF2 Interrupt Enable - 10 - 1 - read-write - - - ICBOF3 - ICBOF3 Interrupt Enable - 11 - 1 - read-write - - - - - TOP - Counter Top Value Register - 0x1c - 32 - read-write - 0x0000ffff - 0x0000ffff - - - TOP - Counter Top Value - 0 - 16 - read-write - - - - - TOPB - Counter Top Value Buffer Register - 0x20 - 32 - read-write - 0x00000000 - 0x0000ffff - - - TOPB - Counter Top Value Buffer - 0 - 16 - read-write - - - - - CNT - Counter Value Register - 0x24 - 32 - read-write - 0x00000000 - 0x0000ffff - - - CNT - Counter Value - 0 - 16 - read-write - - - - - LOCK - TIMER Configuration Lock Register - 0x2c - 32 - read-write - 0x00000000 - 0x0000ffff - - - TIMERLOCKKEY - Timer Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x30 - 32 - read-write - 0x00000000 - 0x0000070f - - - CC0PEN - CC Channel 0 Pin Enable - 0 - 1 - read-write - - - CC1PEN - CC Channel 1 Pin Enable - 1 - 1 - read-write - - - CC2PEN - CC Channel 2 Pin Enable - 2 - 1 - read-write - - - CC3PEN - CC Channel 3 Pin Enable - 3 - 1 - read-write - - - CDTI0PEN - CC Channel 0 Complementary Dead-Time Insertion Pin Enable - 8 - 1 - read-write - - - CDTI1PEN - CC Channel 1 Complementary Dead-Time Insertion Pin Enable - 9 - 1 - read-write - - - CDTI2PEN - CC Channel 2 Complementary Dead-Time Insertion Pin Enable - 10 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x34 - 32 - read-write - 0x00000000 - 0x3f3f3f3f - - - CC0LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CC1LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CC2LOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CC3LOC - I/O Location - 24 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - ROUTELOC2 - I/O Routing Location Register - 0x3c - 32 - read-write - 0x00000000 - 0x003f3f3f - - - CDTI0LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CDTI1LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CDTI2LOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - CC0_CTRL - CC Channel Control Register - 0x60 - 32 - read-write - 0x00000000 - 0x7f0f3f17 - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - PWM - Pulse-Width Modulation - 0x00000003 - - - - - OUTINV - Output Invert - 2 - 1 - read-write - - - COIST - Compare Output Initial State - 4 - 1 - read-write - - - CMOA - Compare Match Output Action - 8 - 2 - read-write - - - NONE - No action on compare match - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - COFOA - Counter Overflow Output Action - 10 - 2 - read-write - - - NONE - No action on counter overflow - 0x00000000 - - - TOGGLE - Toggle output on counter overflow - 0x00000001 - - - CLEAR - Clear output on counter overflow - 0x00000002 - - - SET - Set output on counter overflow - 0x00000003 - - - - - CUFOA - Counter Underflow Output Action - 12 - 2 - read-write - - - NONE - No action on counter underflow - 0x00000000 - - - TOGGLE - Toggle output on counter underflow - 0x00000001 - - - CLEAR - Clear output on counter underflow - 0x00000002 - - - SET - Set output on counter underflow - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - ICEDGE - Input Capture Edge Select - 24 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - ICEVCTRL - Input Capture Event Control - 26 - 2 - read-write - - - EVERYEDGE - PRS output pulse and interrupt flag set on every capture - 0x00000000 - - - EVERYSECONDEDGE - PRS output pulse and interrupt flag set on every second capture - 0x00000001 - - - RISING - PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) - 0x00000002 - - - FALLING - PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) - 0x00000003 - - - - - PRSCONF - PRS Configuration - 28 - 1 - read-write - - - INSEL - Input Selection - 29 - 1 - read-write - - - FILT - Digital Filter - 30 - 1 - read-write - - - - - CC0_CCV - CC Channel Value Register - 0x64 - 32 - read-write - 0x00000000 - 0x0000ffff - modifyExternal - - - CCV - CC Channel Value - 0 - 16 - read-write - - - - - CC0_CCVP - CC Channel Value Peek Register - 0x68 - 32 - read-only - 0x00000000 - 0x0000ffff - - - CCVP - CC Channel Value Peek - 0 - 16 - read-only - - - - - CC0_CCVB - CC Channel Buffer Register - 0x6c - 32 - read-write - 0x00000000 - 0x0000ffff - - - CCVB - CC Channel Value Buffer - 0 - 16 - read-write - - - - - CC1_CTRL - CC Channel Control Register - 0x70 - 32 - read-write - 0x00000000 - 0x7f0f3f17 - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - PWM - Pulse-Width Modulation - 0x00000003 - - - - - OUTINV - Output Invert - 2 - 1 - read-write - - - COIST - Compare Output Initial State - 4 - 1 - read-write - - - CMOA - Compare Match Output Action - 8 - 2 - read-write - - - NONE - No action on compare match - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - COFOA - Counter Overflow Output Action - 10 - 2 - read-write - - - NONE - No action on counter overflow - 0x00000000 - - - TOGGLE - Toggle output on counter overflow - 0x00000001 - - - CLEAR - Clear output on counter overflow - 0x00000002 - - - SET - Set output on counter overflow - 0x00000003 - - - - - CUFOA - Counter Underflow Output Action - 12 - 2 - read-write - - - NONE - No action on counter underflow - 0x00000000 - - - TOGGLE - Toggle output on counter underflow - 0x00000001 - - - CLEAR - Clear output on counter underflow - 0x00000002 - - - SET - Set output on counter underflow - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - ICEDGE - Input Capture Edge Select - 24 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - ICEVCTRL - Input Capture Event Control - 26 - 2 - read-write - - - EVERYEDGE - PRS output pulse and interrupt flag set on every capture - 0x00000000 - - - EVERYSECONDEDGE - PRS output pulse and interrupt flag set on every second capture - 0x00000001 - - - RISING - PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) - 0x00000002 - - - FALLING - PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) - 0x00000003 - - - - - PRSCONF - PRS Configuration - 28 - 1 - read-write - - - INSEL - Input Selection - 29 - 1 - read-write - - - FILT - Digital Filter - 30 - 1 - read-write - - - - - CC1_CCV - CC Channel Value Register - 0x74 - 32 - read-write - 0x00000000 - 0x0000ffff - modifyExternal - - - CCV - CC Channel Value - 0 - 16 - read-write - - - - - CC1_CCVP - CC Channel Value Peek Register - 0x78 - 32 - read-only - 0x00000000 - 0x0000ffff - - - CCVP - CC Channel Value Peek - 0 - 16 - read-only - - - - - CC1_CCVB - CC Channel Buffer Register - 0x7c - 32 - read-write - 0x00000000 - 0x0000ffff - - - CCVB - CC Channel Value Buffer - 0 - 16 - read-write - - - - - CC2_CTRL - CC Channel Control Register - 0x80 - 32 - read-write - 0x00000000 - 0x7f0f3f17 - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - PWM - Pulse-Width Modulation - 0x00000003 - - - - - OUTINV - Output Invert - 2 - 1 - read-write - - - COIST - Compare Output Initial State - 4 - 1 - read-write - - - CMOA - Compare Match Output Action - 8 - 2 - read-write - - - NONE - No action on compare match - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - COFOA - Counter Overflow Output Action - 10 - 2 - read-write - - - NONE - No action on counter overflow - 0x00000000 - - - TOGGLE - Toggle output on counter overflow - 0x00000001 - - - CLEAR - Clear output on counter overflow - 0x00000002 - - - SET - Set output on counter overflow - 0x00000003 - - - - - CUFOA - Counter Underflow Output Action - 12 - 2 - read-write - - - NONE - No action on counter underflow - 0x00000000 - - - TOGGLE - Toggle output on counter underflow - 0x00000001 - - - CLEAR - Clear output on counter underflow - 0x00000002 - - - SET - Set output on counter underflow - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - ICEDGE - Input Capture Edge Select - 24 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - ICEVCTRL - Input Capture Event Control - 26 - 2 - read-write - - - EVERYEDGE - PRS output pulse and interrupt flag set on every capture - 0x00000000 - - - EVERYSECONDEDGE - PRS output pulse and interrupt flag set on every second capture - 0x00000001 - - - RISING - PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) - 0x00000002 - - - FALLING - PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) - 0x00000003 - - - - - PRSCONF - PRS Configuration - 28 - 1 - read-write - - - INSEL - Input Selection - 29 - 1 - read-write - - - FILT - Digital Filter - 30 - 1 - read-write - - - - - CC2_CCV - CC Channel Value Register - 0x84 - 32 - read-write - 0x00000000 - 0x0000ffff - modifyExternal - - - CCV - CC Channel Value - 0 - 16 - read-write - - - - - CC2_CCVP - CC Channel Value Peek Register - 0x88 - 32 - read-only - 0x00000000 - 0x0000ffff - - - CCVP - CC Channel Value Peek - 0 - 16 - read-only - - - - - CC2_CCVB - CC Channel Buffer Register - 0x8c - 32 - read-write - 0x00000000 - 0x0000ffff - - - CCVB - CC Channel Value Buffer - 0 - 16 - read-write - - - - - CC3_CTRL - CC Channel Control Register - 0x90 - 32 - read-write - 0x00000000 - 0x7f0f3f17 - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - PWM - Pulse-Width Modulation - 0x00000003 - - - - - OUTINV - Output Invert - 2 - 1 - read-write - - - COIST - Compare Output Initial State - 4 - 1 - read-write - - - CMOA - Compare Match Output Action - 8 - 2 - read-write - - - NONE - No action on compare match - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - COFOA - Counter Overflow Output Action - 10 - 2 - read-write - - - NONE - No action on counter overflow - 0x00000000 - - - TOGGLE - Toggle output on counter overflow - 0x00000001 - - - CLEAR - Clear output on counter overflow - 0x00000002 - - - SET - Set output on counter overflow - 0x00000003 - - - - - CUFOA - Counter Underflow Output Action - 12 - 2 - read-write - - - NONE - No action on counter underflow - 0x00000000 - - - TOGGLE - Toggle output on counter underflow - 0x00000001 - - - CLEAR - Clear output on counter underflow - 0x00000002 - - - SET - Set output on counter underflow - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - ICEDGE - Input Capture Edge Select - 24 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - ICEVCTRL - Input Capture Event Control - 26 - 2 - read-write - - - EVERYEDGE - PRS output pulse and interrupt flag set on every capture - 0x00000000 - - - EVERYSECONDEDGE - PRS output pulse and interrupt flag set on every second capture - 0x00000001 - - - RISING - PRS output pulse and interrupt flag set on rising edge only (if ICEDGE = BOTH) - 0x00000002 - - - FALLING - PRS output pulse and interrupt flag set on falling edge only (if ICEDGE = BOTH) - 0x00000003 - - - - - PRSCONF - PRS Configuration - 28 - 1 - read-write - - - INSEL - Input Selection - 29 - 1 - read-write - - - FILT - Digital Filter - 30 - 1 - read-write - - - - - CC3_CCV - CC Channel Value Register - 0x94 - 32 - read-write - 0x00000000 - 0x0000ffff - modifyExternal - - - CCV - CC Channel Value - 0 - 16 - read-write - - - - - CC3_CCVP - CC Channel Value Peek Register - 0x98 - 32 - read-only - 0x00000000 - 0x0000ffff - - - CCVP - CC Channel Value Peek - 0 - 16 - read-only - - - - - CC3_CCVB - CC Channel Buffer Register - 0x9c - 32 - read-write - 0x00000000 - 0x0000ffff - - - CCVB - CC Channel Value Buffer - 0 - 16 - read-write - - - - - DTCTRL - DTI Control Register - 0xa0 - 32 - read-write - 0x00000000 - 0x010006ff - - - DTEN - DTI Enable - 0 - 1 - read-write - - - DTDAS - DTI Automatic Start-up Functionality - 1 - 1 - read-write - - - DTIPOL - DTI Inactive Polarity - 2 - 1 - read-write - - - DTCINV - DTI Complementary Output Invert. - 3 - 1 - read-write - - - DTPRSSEL - DTI PRS Source Channel Select - 4 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - DTAR - DTI Always Run - 9 - 1 - read-write - - - DTFATS - DTI Fault Action on Timer Stop - 10 - 1 - read-write - - - DTPRSEN - DTI PRS Source Enable - 24 - 1 - read-write - - - - - DTTIME - DTI Time Control Register - 0xa4 - 32 - read-write - 0x00000000 - 0x003f3f0f - - - DTPRESC - DTI Prescaler Setting - 0 - 4 - read-write - - - DIV1 - The HFPERCLK is undivided - 0x00000000 - - - DIV2 - The HFPERCLK is divided by 2 - 0x00000001 - - - DIV4 - The HFPERCLK is divided by 4 - 0x00000002 - - - DIV8 - The HFPERCLK is divided by 8 - 0x00000003 - - - DIV16 - The HFPERCLK is divided by 16 - 0x00000004 - - - DIV32 - The HFPERCLK is divided by 32 - 0x00000005 - - - DIV64 - The HFPERCLK is divided by 64 - 0x00000006 - - - DIV128 - The HFPERCLK is divided by 128 - 0x00000007 - - - DIV256 - The HFPERCLK is divided by 256 - 0x00000008 - - - DIV512 - The HFPERCLK is divided by 512 - 0x00000009 - - - DIV1024 - The HFPERCLK is divided by 1024 - 0x0000000a - - - - - DTRISET - DTI Rise-time - 8 - 6 - read-write - - - DTFALLT - DTI Fall-time - 16 - 6 - read-write - - - - - DTFC - DTI Fault Configuration Register - 0xa8 - 32 - read-write - 0x00000000 - 0x0f030f0f - - - DTPRS0FSEL - DTI PRS Fault Source 0 Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as fault source 0 - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as fault source 1 - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as fault source 2 - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as fault source 3 - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as fault source 4 - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as fault source 5 - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as fault source 6 - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as fault source 7 - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as fault source 8 - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as fault source 9 - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as fault source 10 - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as fault source 11 - 0x0000000b - - - - - DTPRS1FSEL - DTI PRS Fault Source 1 Select - 8 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as fault source 1 - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as fault source 1 - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as fault source 1 - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as fault source 1 - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as fault source 1 - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as fault source 1 - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as fault source 1 - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as fault source 1 - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as fault source 1 - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as fault source 1 - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as fault source 1 - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as fault source 1 - 0x0000000b - - - - - DTFA - DTI Fault Action - 16 - 2 - read-write - - - NONE - No action on fault - 0x00000000 - - - INACTIVE - Set outputs inactive - 0x00000001 - - - CLEAR - Clear outputs - 0x00000002 - - - TRISTATE - Tristate outputs - 0x00000003 - - - - - DTPRS0FEN - DTI PRS 0 Fault Enable - 24 - 1 - read-write - - - DTPRS1FEN - DTI PRS 1 Fault Enable - 25 - 1 - read-write - - - DTDBGFEN - DTI Debugger Fault Enable - 26 - 1 - read-write - - - DTLOCKUPFEN - DTI Lockup Fault Enable - 27 - 1 - read-write - - - - - DTOGEN - DTI Output Generation Enable Register - 0xac - 32 - read-write - 0x00000000 - 0x0000003f - - - DTOGCC0EN - DTI CC0 Output Generation Enable - 0 - 1 - read-write - - - DTOGCC1EN - DTI CC1 Output Generation Enable - 1 - 1 - read-write - - - DTOGCC2EN - DTI CC2 Output Generation Enable - 2 - 1 - read-write - - - DTOGCDTI0EN - DTI CDTI0 Output Generation Enable - 3 - 1 - read-write - - - DTOGCDTI1EN - DTI CDTI1 Output Generation Enable - 4 - 1 - read-write - - - DTOGCDTI2EN - DTI CDTI2 Output Generation Enable - 5 - 1 - read-write - - - - - DTFAULT - DTI Fault Register - 0xb0 - 32 - read-only - 0x00000000 - 0x0000000f - - - DTPRS0F - DTI PRS 0 Fault - 0 - 1 - read-only - - - DTPRS1F - DTI PRS 1 Fault - 1 - 1 - read-only - - - DTDBGF - DTI Debugger Fault - 2 - 1 - read-only - - - DTLOCKUPF - DTI Lockup Fault - 3 - 1 - read-only - - - - - DTFAULTC - DTI Fault Clear Register - 0xb4 - 32 - write-only - 0x00000000 - 0x0000000f - - - DTPRS0FC - DTI PRS0 Fault Clear - 0 - 1 - write-only - - - DTPRS1FC - DTI PRS1 Fault Clear - 1 - 1 - write-only - - - DTDBGFC - DTI Debugger Fault Clear - 2 - 1 - write-only - - - TLOCKUPFC - DTI Lockup Fault Clear - 3 - 1 - write-only - - - - - DTLOCK - DTI Configuration Lock Register - 0xb8 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - DTI Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - - - USART0 - 1.6 - USART0 - 0x40010000 - - 0 - 0x00000400 - registers - - - USART0_RX - 11 - - - USART0_TX - 12 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0xf3ffff7f - - - SYNC - USART Synchronous Mode - 0 - 1 - read-write - - - LOOPBK - Loopback Enable - 1 - 1 - read-write - - - CCEN - Collision Check Enable - 2 - 1 - read-write - - - MPM - Multi-Processor Mode - 3 - 1 - read-write - - - MPAB - Multi-Processor Address-Bit - 4 - 1 - read-write - - - OVS - Oversampling - 5 - 2 - read-write - - - X16 - Regular UART mode with 16X oversampling in asynchronous mode - 0x00000000 - - - X8 - Double speed with 8X oversampling in asynchronous mode - 0x00000001 - - - X6 - 6X oversampling in asynchronous mode - 0x00000002 - - - X4 - Quadruple speed with 4X oversampling in asynchronous mode - 0x00000003 - - - - - CLKPOL - Clock Polarity - 8 - 1 - read-write - - - CLKPHA - Clock Edge For Setup/Sample - 9 - 1 - read-write - - - MSBF - Most Significant Bit First - 10 - 1 - read-write - - - CSMA - Action On Slave-Select In Master Mode - 11 - 1 - read-write - - - TXBIL - TX Buffer Interrupt Level - 12 - 1 - read-write - - - RXINV - Receiver Input Invert - 13 - 1 - read-write - - - TXINV - Transmitter output Invert - 14 - 1 - read-write - - - CSINV - Chip Select Invert - 15 - 1 - read-write - - - AUTOCS - Automatic Chip Select - 16 - 1 - read-write - - - AUTOTRI - Automatic TX Tristate - 17 - 1 - read-write - - - SCMODE - SmartCard Mode - 18 - 1 - read-write - - - SCRETRANS - SmartCard Retransmit - 19 - 1 - read-write - - - SKIPPERRF - Skip Parity Error Frames - 20 - 1 - read-write - - - BIT8DV - Bit 8 Default Value - 21 - 1 - read-write - - - ERRSDMA - Halt DMA On Error - 22 - 1 - read-write - - - ERRSRX - Disable RX On Error - 23 - 1 - read-write - - - ERRSTX - Disable TX On Error - 24 - 1 - read-write - - - SSSEARLY - Synchronous Slave Setup Early - 25 - 1 - read-write - - - BYTESWAP - Byteswap In Double Accesses - 28 - 1 - read-write - - - AUTOTX - Always Transmit When RX Not Full - 29 - 1 - read-write - - - MVDIS - Majority Vote Disable - 30 - 1 - read-write - - - SMSDELAY - Synchronous Master Sample Delay - 31 - 1 - read-write - - - - - FRAME - USART Frame Format Register - 0x4 - 32 - read-write - 0x00001005 - 0x0000330f - - - DATABITS - Data-Bit Mode - 0 - 4 - read-write - - - FOUR - Each frame contains 4 data bits - 0x00000001 - - - FIVE - Each frame contains 5 data bits - 0x00000002 - - - SIX - Each frame contains 6 data bits - 0x00000003 - - - SEVEN - Each frame contains 7 data bits - 0x00000004 - - - EIGHT - Each frame contains 8 data bits - 0x00000005 - - - NINE - Each frame contains 9 data bits - 0x00000006 - - - TEN - Each frame contains 10 data bits - 0x00000007 - - - ELEVEN - Each frame contains 11 data bits - 0x00000008 - - - TWELVE - Each frame contains 12 data bits - 0x00000009 - - - THIRTEEN - Each frame contains 13 data bits - 0x0000000a - - - FOURTEEN - Each frame contains 14 data bits - 0x0000000b - - - FIFTEEN - Each frame contains 15 data bits - 0x0000000c - - - SIXTEEN - Each frame contains 16 data bits - 0x0000000d - - - - - PARITY - Parity-Bit Mode - 8 - 2 - read-write - - - NONE - Parity bits are not used - 0x00000000 - - - EVEN - Even parity are used. Parity bits are automatically generated and checked by hardware. - 0x00000002 - - - ODD - Odd parity is used. Parity bits are automatically generated and checked by hardware. - 0x00000003 - - - - - STOPBITS - Stop-Bit Mode - 12 - 2 - read-write - - - HALF - The transmitter generates a half stop bit. Stop-bits are not verified by receiver - 0x00000000 - - - ONE - One stop bit is generated and verified - 0x00000001 - - - ONEANDAHALF - The transmitter generates one and a half stop bit. The receiver verifies the first stop bit - 0x00000002 - - - TWO - The transmitter generates two stop bits. The receiver checks the first stop-bit only - 0x00000003 - - - - - - - TRIGCTRL - USART Trigger Control register - 0x8 - 32 - read-write - 0x00000000 - 0x000f1ff0 - - - RXTEN - Receive Trigger Enable - 4 - 1 - read-write - - - TXTEN - Transmit Trigger Enable - 5 - 1 - read-write - - - AUTOTXTEN - AUTOTX Trigger Enable - 6 - 1 - read-write - - - TXARX0EN - Enable Transmit Trigger after RX End of Frame plus TCMP0VAL - 7 - 1 - read-write - - - TXARX1EN - Enable Transmit Trigger after RX End of Frame plus TCMP1VAL - 8 - 1 - read-write - - - TXARX2EN - Enable Transmit Trigger after RX End of Frame plus TCMP2VAL - 9 - 1 - read-write - - - RXATX0EN - Enable Receive Trigger after TX end of frame plus TCMPVAL0 baud-times - 10 - 1 - read-write - - - RXATX1EN - Enable Receive Trigger after TX end of frame plus TCMPVAL1 baud-times - 11 - 1 - read-write - - - RXATX2EN - Enable Receive Trigger after TX end of frame plus TCMPVAL2 baud-times - 12 - 1 - read-write - - - TSEL - Trigger PRS Channel Select - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - - - CMD - Command Register - 0xc - 32 - write-only - 0x00000000 - 0x00000fff - - - RXEN - Receiver Enable - 0 - 1 - write-only - - - RXDIS - Receiver Disable - 1 - 1 - write-only - - - TXEN - Transmitter Enable - 2 - 1 - write-only - - - TXDIS - Transmitter Disable - 3 - 1 - write-only - - - MASTEREN - Master Enable - 4 - 1 - write-only - - - MASTERDIS - Master Disable - 5 - 1 - write-only - - - RXBLOCKEN - Receiver Block Enable - 6 - 1 - write-only - - - RXBLOCKDIS - Receiver Block Disable - 7 - 1 - write-only - - - TXTRIEN - Transmitter Tristate Enable - 8 - 1 - write-only - - - TXTRIDIS - Transmitter Tristate Disable - 9 - 1 - write-only - - - CLEARTX - Clear TX - 10 - 1 - write-only - - - CLEARRX - Clear RX - 11 - 1 - write-only - - - - - STATUS - USART Status Register - 0x10 - 32 - read-only - 0x00002040 - 0x00037fff - - - RXENS - Receiver Enable Status - 0 - 1 - read-only - - - TXENS - Transmitter Enable Status - 1 - 1 - read-only - - - MASTER - SPI Master Mode - 2 - 1 - read-only - - - RXBLOCK - Block Incoming Data - 3 - 1 - read-only - - - TXTRI - Transmitter Tristated - 4 - 1 - read-only - - - TXC - TX Complete - 5 - 1 - read-only - - - TXBL - TX Buffer Level - 6 - 1 - read-only - - - RXDATAV - RX Data Valid - 7 - 1 - read-only - - - RXFULL - RX FIFO Full - 8 - 1 - read-only - - - TXBDRIGHT - TX Buffer Expects Double Right Data - 9 - 1 - read-only - - - TXBSRIGHT - TX Buffer Expects Single Right Data - 10 - 1 - read-only - - - RXDATAVRIGHT - RX Data Right - 11 - 1 - read-only - - - RXFULLRIGHT - RX Full of Right Data - 12 - 1 - read-only - - - TXIDLE - TX Idle - 13 - 1 - read-only - - - TIMERRESTARTED - The USART Timer restarted itself - 14 - 1 - read-only - - - TXBUFCNT - TX Buffer Count - 16 - 2 - read-only - - - - - CLKDIV - Clock Control Register - 0x14 - 32 - read-write - 0x00000000 - 0x807ffff8 - - - DIV - Fractional Clock Divider - 3 - 20 - read-write - - - AUTOBAUDEN - AUTOBAUD detection enable - 31 - 1 - read-write - - - - - RXDATAX - RX Buffer Data Extended Register - 0x18 - 32 - read-only - 0x00000000 - 0x0000c1ff - modifyExternal - - - RXDATA - RX Data - 0 - 9 - read-only - - - PERR - Data Parity Error - 14 - 1 - read-only - - - FERR - Data Framing Error - 15 - 1 - read-only - - - - - RXDATA - RX Buffer Data Register - 0x1c - 32 - read-only - 0x00000000 - 0x000000ff - modifyExternal - - - RXDATA - RX Data - 0 - 8 - read-only - - - - - RXDOUBLEX - RX Buffer Double Data Extended Register - 0x20 - 32 - read-only - 0x00000000 - 0xc1ffc1ff - modifyExternal - - - RXDATA0 - RX Data 0 - 0 - 9 - read-only - - - PERR0 - Data Parity Error 0 - 14 - 1 - read-only - - - FERR0 - Data Framing Error 0 - 15 - 1 - read-only - - - RXDATA1 - RX Data 1 - 16 - 9 - read-only - - - PERR1 - Data Parity Error 1 - 30 - 1 - read-only - - - FERR1 - Data Framing Error 1 - 31 - 1 - read-only - - - - - RXDOUBLE - RX FIFO Double Data Register - 0x24 - 32 - read-only - 0x00000000 - 0x0000ffff - modifyExternal - - - RXDATA0 - RX Data 0 - 0 - 8 - read-only - - - RXDATA1 - RX Data 1 - 8 - 8 - read-only - - - - - RXDATAXP - RX Buffer Data Extended Peek Register - 0x28 - 32 - read-only - 0x00000000 - 0x0000c1ff - - - RXDATAP - RX Data Peek - 0 - 9 - read-only - - - PERRP - Data Parity Error Peek - 14 - 1 - read-only - - - FERRP - Data Framing Error Peek - 15 - 1 - read-only - - - - - RXDOUBLEXP - RX Buffer Double Data Extended Peek Register - 0x2c - 32 - read-only - 0x00000000 - 0xc1ffc1ff - - - RXDATAP0 - RX Data 0 Peek - 0 - 9 - read-only - - - PERRP0 - Data Parity Error 0 Peek - 14 - 1 - read-only - - - FERRP0 - Data Framing Error 0 Peek - 15 - 1 - read-only - - - RXDATAP1 - RX Data 1 Peek - 16 - 9 - read-only - - - PERRP1 - Data Parity Error 1 Peek - 30 - 1 - read-only - - - FERRP1 - Data Framing Error 1 Peek - 31 - 1 - read-only - - - - - TXDATAX - TX Buffer Data Extended Register - 0x30 - 32 - read-write - 0x00000000 - 0x0000f9ff - - - TXDATAX - TX Data - 0 - 9 - read-write - - - UBRXAT - Unblock RX After Transmission - 11 - 1 - read-write - - - TXTRIAT - Set TXTRI After Transmission - 12 - 1 - read-write - - - TXBREAK - Transmit Data As Break - 13 - 1 - read-write - - - TXDISAT - Clear TXEN After Transmission - 14 - 1 - read-write - - - RXENAT - Enable RX After Transmission - 15 - 1 - read-write - - - - - TXDATA - TX Buffer Data Register - 0x34 - 32 - read-write - 0x00000000 - 0x000000ff - - - TXDATA - TX Data - 0 - 8 - read-write - - - - - TXDOUBLEX - TX Buffer Double Data Extended Register - 0x38 - 32 - read-write - 0x00000000 - 0xf9fff9ff - - - TXDATA0 - TX Data - 0 - 9 - read-write - - - UBRXAT0 - Unblock RX After Transmission - 11 - 1 - read-write - - - TXTRIAT0 - Set TXTRI After Transmission - 12 - 1 - read-write - - - TXBREAK0 - Transmit Data As Break - 13 - 1 - read-write - - - TXDISAT0 - Clear TXEN After Transmission - 14 - 1 - read-write - - - RXENAT0 - Enable RX After Transmission - 15 - 1 - read-write - - - TXDATA1 - TX Data - 16 - 9 - read-write - - - UBRXAT1 - Unblock RX After Transmission - 27 - 1 - read-write - - - TXTRIAT1 - Set TXTRI After Transmission - 28 - 1 - read-write - - - TXBREAK1 - Transmit Data As Break - 29 - 1 - read-write - - - TXDISAT1 - Clear TXEN After Transmission - 30 - 1 - read-write - - - RXENAT1 - Enable RX After Transmission - 31 - 1 - read-write - - - - - TXDOUBLE - TX Buffer Double Data Register - 0x3c - 32 - read-write - 0x00000000 - 0x0000ffff - - - TXDATA0 - TX Data - 0 - 8 - read-write - - - TXDATA1 - TX Data - 8 - 8 - read-write - - - - - IF - Interrupt Flag Register - 0x40 - 32 - read-only - 0x00000002 - 0x0001ffff - - - TXC - TX Complete Interrupt Flag - 0 - 1 - read-only - - - TXBL - TX Buffer Level Interrupt Flag - 1 - 1 - read-only - - - RXDATAV - RX Data Valid Interrupt Flag - 2 - 1 - read-only - - - RXFULL - RX Buffer Full Interrupt Flag - 3 - 1 - read-only - - - RXOF - RX Overflow Interrupt Flag - 4 - 1 - read-only - - - RXUF - RX Underflow Interrupt Flag - 5 - 1 - read-only - - - TXOF - TX Overflow Interrupt Flag - 6 - 1 - read-only - - - TXUF - TX Underflow Interrupt Flag - 7 - 1 - read-only - - - PERR - Parity Error Interrupt Flag - 8 - 1 - read-only - - - FERR - Framing Error Interrupt Flag - 9 - 1 - read-only - - - MPAF - Multi-Processor Address Frame Interrupt Flag - 10 - 1 - read-only - - - SSM - Slave-Select In Master Mode Interrupt Flag - 11 - 1 - read-only - - - CCF - Collision Check Fail Interrupt Flag - 12 - 1 - read-only - - - TXIDLE - TX Idle Interrupt Flag - 13 - 1 - read-only - - - TCMP0 - Timer comparator 0 Interrupt Flag - 14 - 1 - read-only - - - TCMP1 - Timer comparator 1 Interrupt Flag - 15 - 1 - read-only - - - TCMP2 - Timer comparator 2 Interrupt Flag - 16 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x44 - 32 - write-only - 0x00000000 - 0x0001fff9 - - - TXC - Set TXC Interrupt Flag - 0 - 1 - write-only - - - RXFULL - Set RXFULL Interrupt Flag - 3 - 1 - write-only - - - RXOF - Set RXOF Interrupt Flag - 4 - 1 - write-only - - - RXUF - Set RXUF Interrupt Flag - 5 - 1 - write-only - - - TXOF - Set TXOF Interrupt Flag - 6 - 1 - write-only - - - TXUF - Set TXUF Interrupt Flag - 7 - 1 - write-only - - - PERR - Set PERR Interrupt Flag - 8 - 1 - write-only - - - FERR - Set FERR Interrupt Flag - 9 - 1 - write-only - - - MPAF - Set MPAF Interrupt Flag - 10 - 1 - write-only - - - SSM - Set SSM Interrupt Flag - 11 - 1 - write-only - - - CCF - Set CCF Interrupt Flag - 12 - 1 - write-only - - - TXIDLE - Set TXIDLE Interrupt Flag - 13 - 1 - write-only - - - TCMP0 - Set TCMP0 Interrupt Flag - 14 - 1 - write-only - - - TCMP1 - Set TCMP1 Interrupt Flag - 15 - 1 - write-only - - - TCMP2 - Set TCMP2 Interrupt Flag - 16 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x48 - 32 - write-only - 0x00000000 - 0x0001fff9 - - - TXC - Clear TXC Interrupt Flag - 0 - 1 - write-only - - - RXFULL - Clear RXFULL Interrupt Flag - 3 - 1 - write-only - - - RXOF - Clear RXOF Interrupt Flag - 4 - 1 - write-only - - - RXUF - Clear RXUF Interrupt Flag - 5 - 1 - write-only - - - TXOF - Clear TXOF Interrupt Flag - 6 - 1 - write-only - - - TXUF - Clear TXUF Interrupt Flag - 7 - 1 - write-only - - - PERR - Clear PERR Interrupt Flag - 8 - 1 - write-only - - - FERR - Clear FERR Interrupt Flag - 9 - 1 - write-only - - - MPAF - Clear MPAF Interrupt Flag - 10 - 1 - write-only - - - SSM - Clear SSM Interrupt Flag - 11 - 1 - write-only - - - CCF - Clear CCF Interrupt Flag - 12 - 1 - write-only - - - TXIDLE - Clear TXIDLE Interrupt Flag - 13 - 1 - write-only - - - TCMP0 - Clear TCMP0 Interrupt Flag - 14 - 1 - write-only - - - TCMP1 - Clear TCMP1 Interrupt Flag - 15 - 1 - write-only - - - TCMP2 - Clear TCMP2 Interrupt Flag - 16 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x4c - 32 - read-write - 0x00000000 - 0x0001ffff - - - TXC - TXC Interrupt Enable - 0 - 1 - read-write - - - TXBL - TXBL Interrupt Enable - 1 - 1 - read-write - - - RXDATAV - RXDATAV Interrupt Enable - 2 - 1 - read-write - - - RXFULL - RXFULL Interrupt Enable - 3 - 1 - read-write - - - RXOF - RXOF Interrupt Enable - 4 - 1 - read-write - - - RXUF - RXUF Interrupt Enable - 5 - 1 - read-write - - - TXOF - TXOF Interrupt Enable - 6 - 1 - read-write - - - TXUF - TXUF Interrupt Enable - 7 - 1 - read-write - - - PERR - PERR Interrupt Enable - 8 - 1 - read-write - - - FERR - FERR Interrupt Enable - 9 - 1 - read-write - - - MPAF - MPAF Interrupt Enable - 10 - 1 - read-write - - - SSM - SSM Interrupt Enable - 11 - 1 - read-write - - - CCF - CCF Interrupt Enable - 12 - 1 - read-write - - - TXIDLE - TXIDLE Interrupt Enable - 13 - 1 - read-write - - - TCMP0 - TCMP0 Interrupt Enable - 14 - 1 - read-write - - - TCMP1 - TCMP1 Interrupt Enable - 15 - 1 - read-write - - - TCMP2 - TCMP2 Interrupt Enable - 16 - 1 - read-write - - - - - IRCTRL - IrDA Control Register - 0x50 - 32 - read-write - 0x00000000 - 0x00000f8f - - - IREN - Enable IrDA Module - 0 - 1 - read-write - - - IRPW - IrDA TX Pulse Width - 1 - 2 - read-write - - - ONE - IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 - 0x00000000 - - - TWO - IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 - 0x00000001 - - - THREE - IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 - 0x00000002 - - - FOUR - IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 - 0x00000003 - - - - - IRFILT - IrDA RX Filter - 3 - 1 - read-write - - - IRPRSEN - IrDA PRS Channel Enable - 7 - 1 - read-write - - - IRPRSSEL - IrDA PRS Channel Select - 8 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - - - INPUT - USART Input Register - 0x58 - 32 - read-write - 0x00000000 - 0x00008f8f - - - RXPRSSEL - RX PRS Channel Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - RXPRS - PRS RX Enable - 7 - 1 - read-write - - - CLKPRSSEL - CLK PRS Channel Select - 8 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - CLKPRS - PRS CLK Enable - 15 - 1 - read-write - - - - - I2SCTRL - I2S Control Register - 0x5c - 32 - read-write - 0x00000000 - 0x0000071f - - - EN - Enable I2S Mode - 0 - 1 - read-write - - - MONO - Stero or Mono - 1 - 1 - read-write - - - JUSTIFY - Justification of I2S Data - 2 - 1 - read-write - - - DMASPLIT - Separate DMA Request For Left/Right Data - 3 - 1 - read-write - - - DELAY - Delay on I2S data - 4 - 1 - read-write - - - FORMAT - I2S Word Format - 8 - 3 - read-write - - - W32D32 - 32-bit word, 32-bit data - 0x00000000 - - - W32D24M - 32-bit word, 32-bit data with 8 lsb masked - 0x00000001 - - - W32D24 - 32-bit word, 24-bit data - 0x00000002 - - - W32D16 - 32-bit word, 16-bit data - 0x00000003 - - - W32D8 - 32-bit word, 8-bit data - 0x00000004 - - - W16D16 - 16-bit word, 16-bit data - 0x00000005 - - - W16D8 - 16-bit word, 8-bit data - 0x00000006 - - - W8D8 - 8-bit word, 8-bit data - 0x00000007 - - - - - - - TIMING - Timing Register - 0x60 - 32 - read-write - 0x00000000 - 0x77770000 - - - TXDELAY - TX frame start delay - 16 - 3 - read-write - - - DISABLE - Disable - TXDELAY in USARTn_CTRL can be used for legacy - 0x00000000 - - - ONE - Start of transmission is delayed for 1 baud-times - 0x00000001 - - - TWO - Start of transmission is delayed for 2 baud-times - 0x00000002 - - - THREE - Start of transmission is delayed for 3 baud-times - 0x00000003 - - - SEVEN - Start of transmission is delayed for 7 baud-times - 0x00000004 - - - TCMP0 - Start of transmission is delayed for TCMPVAL0 baud-times - 0x00000005 - - - TCMP1 - Start of transmission is delayed for TCMPVAL1 baud-times - 0x00000006 - - - TCMP2 - Start of transmission is delayed for TCMPVAL2 baud-times - 0x00000007 - - - - - CSSETUP - Chip Select Setup - 20 - 3 - read-write - - - ZERO - CS is not asserted before start of transmission - 0x00000000 - - - ONE - CS is asserted for 1 baud-times before start of transmission - 0x00000001 - - - TWO - CS is asserted for 2 baud-times before start of transmission - 0x00000002 - - - THREE - CS is asserted for 3 baud-times before start of transmission - 0x00000003 - - - SEVEN - CS is asserted for 7 baud-times before start of transmission - 0x00000004 - - - TCMP0 - CS is asserted before the start of transmission for TCMPVAL0 baud-times - 0x00000005 - - - TCMP1 - CS is asserted before the start of transmission for TCMPVAL1 baud-times - 0x00000006 - - - TCMP2 - CS is asserted before the start of transmission for TCMPVAL2 baud-times - 0x00000007 - - - - - ICS - Inter-character spacing - 24 - 3 - read-write - - - ZERO - There is no space between charcters - 0x00000000 - - - ONE - Create a space of 1 baud-times before start of transmission - 0x00000001 - - - TWO - Create a space of 2 baud-times before start of transmission - 0x00000002 - - - THREE - Create a space of 3 baud-times before start of transmission - 0x00000003 - - - SEVEN - Create a space of 7 baud-times before start of transmission - 0x00000004 - - - TCMP0 - Create a space of before the start of transmission for TCMPVAL0 baud-times - 0x00000005 - - - TCMP1 - Create a space of before the start of transmission for TCMPVAL1 baud-times - 0x00000006 - - - TCMP2 - Create a space of before the start of transmission for TCMPVAL2 baud-times - 0x00000007 - - - - - CSHOLD - Chip Select Hold - 28 - 3 - read-write - - - ZERO - Disable CS being asserted after the end of transmission - 0x00000000 - - - ONE - CS is asserted for 1 baud-times after the end of transmission - 0x00000001 - - - TWO - CS is asserted for 2 baud-times after the end of transmission - 0x00000002 - - - THREE - CS is asserted for 3 baud-times after the end of transmission - 0x00000003 - - - SEVEN - CS is asserted for 7 baud-times after the end of transmission - 0x00000004 - - - TCMP0 - CS is asserted after the end of transmission for TCMPVAL0 baud-times - 0x00000005 - - - TCMP1 - CS is asserted after the end of transmission for TCMPVAL1 baud-times - 0x00000006 - - - TCMP2 - CS is asserted after the end of transmission for TCMPVAL2 baud-times - 0x00000007 - - - - - - - CTRLX - Control Register Extended - 0x64 - 32 - read-write - 0x00000000 - 0x0000000f - - - DBGHALT - Debug halt - 0 - 1 - read-write - - - CTSINV - CTS Pin Inversion - 1 - 1 - read-write - - - CTSEN - CTS Function enabled - 2 - 1 - read-write - - - RTSINV - RTS Pin Inversion - 3 - 1 - read-write - - - - - TIMECMP0 - Used to generate interrupts and various delays - 0x68 - 32 - read-write - 0x00000000 - 0x017700ff - - - TCMPVAL - Timer comparator 0. - 0 - 8 - read-write - - - TSTART - Timer start source - 16 - 3 - read-write - - - DISABLE - Comparator 0 is disabled - 0x00000000 - - - TXEOF - Comparator 0 and timer are started at TX end of frame - 0x00000001 - - - TXC - Comparator 0 and timer are started at TX Complete - 0x00000002 - - - RXACT - Comparator 0 and timer are started at RX going Active (default: low) - 0x00000003 - - - RXEOF - Comparator 0 and timer are started at RX end of frame - 0x00000004 - - - - - TSTOP - Source used to disable comparator 0 - 20 - 3 - read-write - - - TCMP0 - Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event - 0x00000000 - - - TXST - Comparator 0 is disabled at the start of transmission - 0x00000001 - - - RXACT - Comparator 0 is disabled on RX going going Active (default: low) - 0x00000002 - - - RXACTN - Comparator 0 is disabled on RX going Inactive - 0x00000003 - - - - - RESTARTEN - Restart Timer on TCMP0 - 24 - 1 - read-write - - - - - TIMECMP1 - Used to generate interrupts and various delays - 0x6c - 32 - read-write - 0x00000000 - 0x017700ff - - - TCMPVAL - Timer comparator 1. - 0 - 8 - read-write - - - TSTART - Timer start source - 16 - 3 - read-write - - - DISABLE - Comparator 1 is disabled - 0x00000000 - - - TXEOF - Comparator 1 and timer are started at TX end of frame - 0x00000001 - - - TXC - Comparator 1 and timer are started at TX Complete - 0x00000002 - - - RXACT - Comparator 1 and timer are started at RX going going Active (default: low) - 0x00000003 - - - RXEOF - Comparator 1 and timer are started at RX end of frame - 0x00000004 - - - - - TSTOP - Source used to disable comparator 1 - 20 - 3 - read-write - - - TCMP1 - Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event - 0x00000000 - - - TXST - Comparator 1 is disabled at TX start TX Engine - 0x00000001 - - - RXACT - Comparator 1 is disabled on RX going going Active (default: low) - 0x00000002 - - - RXACTN - Comparator 1 is disabled on RX going Inactive - 0x00000003 - - - - - RESTARTEN - Restart Timer on TCMP1 - 24 - 1 - read-write - - - - - TIMECMP2 - Used to generate interrupts and various delays - 0x70 - 32 - read-write - 0x00000000 - 0x017700ff - - - TCMPVAL - Timer comparator 2. - 0 - 8 - read-write - - - TSTART - Timer start source - 16 - 3 - read-write - - - DISABLE - Comparator 2 is disabled - 0x00000000 - - - TXEOF - Comparator 2 and timer are started at TX end of frame - 0x00000001 - - - TXC - Comparator 2 and timer are started at TX Complete - 0x00000002 - - - RXACT - Comparator 2 and timer are started at RX going going Active (default: low) - 0x00000003 - - - RXEOF - Comparator 2 and timer are started at RX end of frame - 0x00000004 - - - - - TSTOP - Source used to disable comparator 2 - 20 - 3 - read-write - - - TCMP2 - Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event - 0x00000000 - - - TXST - Comparator 2 is disabled at TX start TX Engine - 0x00000001 - - - RXACT - Comparator 2 is disabled on RX going going Active (default: low) - 0x00000002 - - - RXACTN - Comparator 2 is disabled on RX going Inactive - 0x00000003 - - - - - RESTARTEN - Restart Timer on TCMP2 - 24 - 1 - read-write - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x74 - 32 - read-write - 0x00000000 - 0x0000003f - - - RXPEN - RX Pin Enable - 0 - 1 - read-write - - - TXPEN - TX Pin Enable - 1 - 1 - read-write - - - CSPEN - CS Pin Enable - 2 - 1 - read-write - - - CLKPEN - CLK Pin Enable - 3 - 1 - read-write - - - CTSPEN - CTS Pin Enable - 4 - 1 - read-write - - - RTSPEN - RTS Pin Enable - 5 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x78 - 32 - read-write - 0x00000000 - 0x3f3f3f3f - - - RXLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - TXLOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CSLOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CLKLOC - I/O Location - 24 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - ROUTELOC1 - I/O Routing Location Register - 0x7c - 32 - read-write - 0x00000000 - 0x00003f3f - - - CTSLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - RTSLOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - - - USART1 - 1.6 - USART1 - 0x40010400 - - 0 - 0x00000400 - registers - - - USART1_RX - 19 - - - USART1_TX - 20 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0xf3ffff7f - - - SYNC - USART Synchronous Mode - 0 - 1 - read-write - - - LOOPBK - Loopback Enable - 1 - 1 - read-write - - - CCEN - Collision Check Enable - 2 - 1 - read-write - - - MPM - Multi-Processor Mode - 3 - 1 - read-write - - - MPAB - Multi-Processor Address-Bit - 4 - 1 - read-write - - - OVS - Oversampling - 5 - 2 - read-write - - - X16 - Regular UART mode with 16X oversampling in asynchronous mode - 0x00000000 - - - X8 - Double speed with 8X oversampling in asynchronous mode - 0x00000001 - - - X6 - 6X oversampling in asynchronous mode - 0x00000002 - - - X4 - Quadruple speed with 4X oversampling in asynchronous mode - 0x00000003 - - - - - CLKPOL - Clock Polarity - 8 - 1 - read-write - - - CLKPHA - Clock Edge For Setup/Sample - 9 - 1 - read-write - - - MSBF - Most Significant Bit First - 10 - 1 - read-write - - - CSMA - Action On Slave-Select In Master Mode - 11 - 1 - read-write - - - TXBIL - TX Buffer Interrupt Level - 12 - 1 - read-write - - - RXINV - Receiver Input Invert - 13 - 1 - read-write - - - TXINV - Transmitter output Invert - 14 - 1 - read-write - - - CSINV - Chip Select Invert - 15 - 1 - read-write - - - AUTOCS - Automatic Chip Select - 16 - 1 - read-write - - - AUTOTRI - Automatic TX Tristate - 17 - 1 - read-write - - - SCMODE - SmartCard Mode - 18 - 1 - read-write - - - SCRETRANS - SmartCard Retransmit - 19 - 1 - read-write - - - SKIPPERRF - Skip Parity Error Frames - 20 - 1 - read-write - - - BIT8DV - Bit 8 Default Value - 21 - 1 - read-write - - - ERRSDMA - Halt DMA On Error - 22 - 1 - read-write - - - ERRSRX - Disable RX On Error - 23 - 1 - read-write - - - ERRSTX - Disable TX On Error - 24 - 1 - read-write - - - SSSEARLY - Synchronous Slave Setup Early - 25 - 1 - read-write - - - BYTESWAP - Byteswap In Double Accesses - 28 - 1 - read-write - - - AUTOTX - Always Transmit When RX Not Full - 29 - 1 - read-write - - - MVDIS - Majority Vote Disable - 30 - 1 - read-write - - - SMSDELAY - Synchronous Master Sample Delay - 31 - 1 - read-write - - - - - FRAME - USART Frame Format Register - 0x4 - 32 - read-write - 0x00001005 - 0x0000330f - - - DATABITS - Data-Bit Mode - 0 - 4 - read-write - - - FOUR - Each frame contains 4 data bits - 0x00000001 - - - FIVE - Each frame contains 5 data bits - 0x00000002 - - - SIX - Each frame contains 6 data bits - 0x00000003 - - - SEVEN - Each frame contains 7 data bits - 0x00000004 - - - EIGHT - Each frame contains 8 data bits - 0x00000005 - - - NINE - Each frame contains 9 data bits - 0x00000006 - - - TEN - Each frame contains 10 data bits - 0x00000007 - - - ELEVEN - Each frame contains 11 data bits - 0x00000008 - - - TWELVE - Each frame contains 12 data bits - 0x00000009 - - - THIRTEEN - Each frame contains 13 data bits - 0x0000000a - - - FOURTEEN - Each frame contains 14 data bits - 0x0000000b - - - FIFTEEN - Each frame contains 15 data bits - 0x0000000c - - - SIXTEEN - Each frame contains 16 data bits - 0x0000000d - - - - - PARITY - Parity-Bit Mode - 8 - 2 - read-write - - - NONE - Parity bits are not used - 0x00000000 - - - EVEN - Even parity are used. Parity bits are automatically generated and checked by hardware. - 0x00000002 - - - ODD - Odd parity is used. Parity bits are automatically generated and checked by hardware. - 0x00000003 - - - - - STOPBITS - Stop-Bit Mode - 12 - 2 - read-write - - - HALF - The transmitter generates a half stop bit. Stop-bits are not verified by receiver - 0x00000000 - - - ONE - One stop bit is generated and verified - 0x00000001 - - - ONEANDAHALF - The transmitter generates one and a half stop bit. The receiver verifies the first stop bit - 0x00000002 - - - TWO - The transmitter generates two stop bits. The receiver checks the first stop-bit only - 0x00000003 - - - - - - - TRIGCTRL - USART Trigger Control register - 0x8 - 32 - read-write - 0x00000000 - 0x000f1ff0 - - - RXTEN - Receive Trigger Enable - 4 - 1 - read-write - - - TXTEN - Transmit Trigger Enable - 5 - 1 - read-write - - - AUTOTXTEN - AUTOTX Trigger Enable - 6 - 1 - read-write - - - TXARX0EN - Enable Transmit Trigger after RX End of Frame plus TCMP0VAL - 7 - 1 - read-write - - - TXARX1EN - Enable Transmit Trigger after RX End of Frame plus TCMP1VAL - 8 - 1 - read-write - - - TXARX2EN - Enable Transmit Trigger after RX End of Frame plus TCMP2VAL - 9 - 1 - read-write - - - RXATX0EN - Enable Receive Trigger after TX end of frame plus TCMPVAL0 baud-times - 10 - 1 - read-write - - - RXATX1EN - Enable Receive Trigger after TX end of frame plus TCMPVAL1 baud-times - 11 - 1 - read-write - - - RXATX2EN - Enable Receive Trigger after TX end of frame plus TCMPVAL2 baud-times - 12 - 1 - read-write - - - TSEL - Trigger PRS Channel Select - 16 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - - - CMD - Command Register - 0xc - 32 - write-only - 0x00000000 - 0x00000fff - - - RXEN - Receiver Enable - 0 - 1 - write-only - - - RXDIS - Receiver Disable - 1 - 1 - write-only - - - TXEN - Transmitter Enable - 2 - 1 - write-only - - - TXDIS - Transmitter Disable - 3 - 1 - write-only - - - MASTEREN - Master Enable - 4 - 1 - write-only - - - MASTERDIS - Master Disable - 5 - 1 - write-only - - - RXBLOCKEN - Receiver Block Enable - 6 - 1 - write-only - - - RXBLOCKDIS - Receiver Block Disable - 7 - 1 - write-only - - - TXTRIEN - Transmitter Tristate Enable - 8 - 1 - write-only - - - TXTRIDIS - Transmitter Tristate Disable - 9 - 1 - write-only - - - CLEARTX - Clear TX - 10 - 1 - write-only - - - CLEARRX - Clear RX - 11 - 1 - write-only - - - - - STATUS - USART Status Register - 0x10 - 32 - read-only - 0x00002040 - 0x00037fff - - - RXENS - Receiver Enable Status - 0 - 1 - read-only - - - TXENS - Transmitter Enable Status - 1 - 1 - read-only - - - MASTER - SPI Master Mode - 2 - 1 - read-only - - - RXBLOCK - Block Incoming Data - 3 - 1 - read-only - - - TXTRI - Transmitter Tristated - 4 - 1 - read-only - - - TXC - TX Complete - 5 - 1 - read-only - - - TXBL - TX Buffer Level - 6 - 1 - read-only - - - RXDATAV - RX Data Valid - 7 - 1 - read-only - - - RXFULL - RX FIFO Full - 8 - 1 - read-only - - - TXBDRIGHT - TX Buffer Expects Double Right Data - 9 - 1 - read-only - - - TXBSRIGHT - TX Buffer Expects Single Right Data - 10 - 1 - read-only - - - RXDATAVRIGHT - RX Data Right - 11 - 1 - read-only - - - RXFULLRIGHT - RX Full of Right Data - 12 - 1 - read-only - - - TXIDLE - TX Idle - 13 - 1 - read-only - - - TIMERRESTARTED - The USART Timer restarted itself - 14 - 1 - read-only - - - TXBUFCNT - TX Buffer Count - 16 - 2 - read-only - - - - - CLKDIV - Clock Control Register - 0x14 - 32 - read-write - 0x00000000 - 0x807ffff8 - - - DIV - Fractional Clock Divider - 3 - 20 - read-write - - - AUTOBAUDEN - AUTOBAUD detection enable - 31 - 1 - read-write - - - - - RXDATAX - RX Buffer Data Extended Register - 0x18 - 32 - read-only - 0x00000000 - 0x0000c1ff - modifyExternal - - - RXDATA - RX Data - 0 - 9 - read-only - - - PERR - Data Parity Error - 14 - 1 - read-only - - - FERR - Data Framing Error - 15 - 1 - read-only - - - - - RXDATA - RX Buffer Data Register - 0x1c - 32 - read-only - 0x00000000 - 0x000000ff - modifyExternal - - - RXDATA - RX Data - 0 - 8 - read-only - - - - - RXDOUBLEX - RX Buffer Double Data Extended Register - 0x20 - 32 - read-only - 0x00000000 - 0xc1ffc1ff - modifyExternal - - - RXDATA0 - RX Data 0 - 0 - 9 - read-only - - - PERR0 - Data Parity Error 0 - 14 - 1 - read-only - - - FERR0 - Data Framing Error 0 - 15 - 1 - read-only - - - RXDATA1 - RX Data 1 - 16 - 9 - read-only - - - PERR1 - Data Parity Error 1 - 30 - 1 - read-only - - - FERR1 - Data Framing Error 1 - 31 - 1 - read-only - - - - - RXDOUBLE - RX FIFO Double Data Register - 0x24 - 32 - read-only - 0x00000000 - 0x0000ffff - modifyExternal - - - RXDATA0 - RX Data 0 - 0 - 8 - read-only - - - RXDATA1 - RX Data 1 - 8 - 8 - read-only - - - - - RXDATAXP - RX Buffer Data Extended Peek Register - 0x28 - 32 - read-only - 0x00000000 - 0x0000c1ff - - - RXDATAP - RX Data Peek - 0 - 9 - read-only - - - PERRP - Data Parity Error Peek - 14 - 1 - read-only - - - FERRP - Data Framing Error Peek - 15 - 1 - read-only - - - - - RXDOUBLEXP - RX Buffer Double Data Extended Peek Register - 0x2c - 32 - read-only - 0x00000000 - 0xc1ffc1ff - - - RXDATAP0 - RX Data 0 Peek - 0 - 9 - read-only - - - PERRP0 - Data Parity Error 0 Peek - 14 - 1 - read-only - - - FERRP0 - Data Framing Error 0 Peek - 15 - 1 - read-only - - - RXDATAP1 - RX Data 1 Peek - 16 - 9 - read-only - - - PERRP1 - Data Parity Error 1 Peek - 30 - 1 - read-only - - - FERRP1 - Data Framing Error 1 Peek - 31 - 1 - read-only - - - - - TXDATAX - TX Buffer Data Extended Register - 0x30 - 32 - read-write - 0x00000000 - 0x0000f9ff - - - TXDATAX - TX Data - 0 - 9 - read-write - - - UBRXAT - Unblock RX After Transmission - 11 - 1 - read-write - - - TXTRIAT - Set TXTRI After Transmission - 12 - 1 - read-write - - - TXBREAK - Transmit Data As Break - 13 - 1 - read-write - - - TXDISAT - Clear TXEN After Transmission - 14 - 1 - read-write - - - RXENAT - Enable RX After Transmission - 15 - 1 - read-write - - - - - TXDATA - TX Buffer Data Register - 0x34 - 32 - read-write - 0x00000000 - 0x000000ff - - - TXDATA - TX Data - 0 - 8 - read-write - - - - - TXDOUBLEX - TX Buffer Double Data Extended Register - 0x38 - 32 - read-write - 0x00000000 - 0xf9fff9ff - - - TXDATA0 - TX Data - 0 - 9 - read-write - - - UBRXAT0 - Unblock RX After Transmission - 11 - 1 - read-write - - - TXTRIAT0 - Set TXTRI After Transmission - 12 - 1 - read-write - - - TXBREAK0 - Transmit Data As Break - 13 - 1 - read-write - - - TXDISAT0 - Clear TXEN After Transmission - 14 - 1 - read-write - - - RXENAT0 - Enable RX After Transmission - 15 - 1 - read-write - - - TXDATA1 - TX Data - 16 - 9 - read-write - - - UBRXAT1 - Unblock RX After Transmission - 27 - 1 - read-write - - - TXTRIAT1 - Set TXTRI After Transmission - 28 - 1 - read-write - - - TXBREAK1 - Transmit Data As Break - 29 - 1 - read-write - - - TXDISAT1 - Clear TXEN After Transmission - 30 - 1 - read-write - - - RXENAT1 - Enable RX After Transmission - 31 - 1 - read-write - - - - - TXDOUBLE - TX Buffer Double Data Register - 0x3c - 32 - read-write - 0x00000000 - 0x0000ffff - - - TXDATA0 - TX Data - 0 - 8 - read-write - - - TXDATA1 - TX Data - 8 - 8 - read-write - - - - - IF - Interrupt Flag Register - 0x40 - 32 - read-only - 0x00000002 - 0x0001ffff - - - TXC - TX Complete Interrupt Flag - 0 - 1 - read-only - - - TXBL - TX Buffer Level Interrupt Flag - 1 - 1 - read-only - - - RXDATAV - RX Data Valid Interrupt Flag - 2 - 1 - read-only - - - RXFULL - RX Buffer Full Interrupt Flag - 3 - 1 - read-only - - - RXOF - RX Overflow Interrupt Flag - 4 - 1 - read-only - - - RXUF - RX Underflow Interrupt Flag - 5 - 1 - read-only - - - TXOF - TX Overflow Interrupt Flag - 6 - 1 - read-only - - - TXUF - TX Underflow Interrupt Flag - 7 - 1 - read-only - - - PERR - Parity Error Interrupt Flag - 8 - 1 - read-only - - - FERR - Framing Error Interrupt Flag - 9 - 1 - read-only - - - MPAF - Multi-Processor Address Frame Interrupt Flag - 10 - 1 - read-only - - - SSM - Slave-Select In Master Mode Interrupt Flag - 11 - 1 - read-only - - - CCF - Collision Check Fail Interrupt Flag - 12 - 1 - read-only - - - TXIDLE - TX Idle Interrupt Flag - 13 - 1 - read-only - - - TCMP0 - Timer comparator 0 Interrupt Flag - 14 - 1 - read-only - - - TCMP1 - Timer comparator 1 Interrupt Flag - 15 - 1 - read-only - - - TCMP2 - Timer comparator 2 Interrupt Flag - 16 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x44 - 32 - write-only - 0x00000000 - 0x0001fff9 - - - TXC - Set TXC Interrupt Flag - 0 - 1 - write-only - - - RXFULL - Set RXFULL Interrupt Flag - 3 - 1 - write-only - - - RXOF - Set RXOF Interrupt Flag - 4 - 1 - write-only - - - RXUF - Set RXUF Interrupt Flag - 5 - 1 - write-only - - - TXOF - Set TXOF Interrupt Flag - 6 - 1 - write-only - - - TXUF - Set TXUF Interrupt Flag - 7 - 1 - write-only - - - PERR - Set PERR Interrupt Flag - 8 - 1 - write-only - - - FERR - Set FERR Interrupt Flag - 9 - 1 - write-only - - - MPAF - Set MPAF Interrupt Flag - 10 - 1 - write-only - - - SSM - Set SSM Interrupt Flag - 11 - 1 - write-only - - - CCF - Set CCF Interrupt Flag - 12 - 1 - write-only - - - TXIDLE - Set TXIDLE Interrupt Flag - 13 - 1 - write-only - - - TCMP0 - Set TCMP0 Interrupt Flag - 14 - 1 - write-only - - - TCMP1 - Set TCMP1 Interrupt Flag - 15 - 1 - write-only - - - TCMP2 - Set TCMP2 Interrupt Flag - 16 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x48 - 32 - write-only - 0x00000000 - 0x0001fff9 - - - TXC - Clear TXC Interrupt Flag - 0 - 1 - write-only - - - RXFULL - Clear RXFULL Interrupt Flag - 3 - 1 - write-only - - - RXOF - Clear RXOF Interrupt Flag - 4 - 1 - write-only - - - RXUF - Clear RXUF Interrupt Flag - 5 - 1 - write-only - - - TXOF - Clear TXOF Interrupt Flag - 6 - 1 - write-only - - - TXUF - Clear TXUF Interrupt Flag - 7 - 1 - write-only - - - PERR - Clear PERR Interrupt Flag - 8 - 1 - write-only - - - FERR - Clear FERR Interrupt Flag - 9 - 1 - write-only - - - MPAF - Clear MPAF Interrupt Flag - 10 - 1 - write-only - - - SSM - Clear SSM Interrupt Flag - 11 - 1 - write-only - - - CCF - Clear CCF Interrupt Flag - 12 - 1 - write-only - - - TXIDLE - Clear TXIDLE Interrupt Flag - 13 - 1 - write-only - - - TCMP0 - Clear TCMP0 Interrupt Flag - 14 - 1 - write-only - - - TCMP1 - Clear TCMP1 Interrupt Flag - 15 - 1 - write-only - - - TCMP2 - Clear TCMP2 Interrupt Flag - 16 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x4c - 32 - read-write - 0x00000000 - 0x0001ffff - - - TXC - TXC Interrupt Enable - 0 - 1 - read-write - - - TXBL - TXBL Interrupt Enable - 1 - 1 - read-write - - - RXDATAV - RXDATAV Interrupt Enable - 2 - 1 - read-write - - - RXFULL - RXFULL Interrupt Enable - 3 - 1 - read-write - - - RXOF - RXOF Interrupt Enable - 4 - 1 - read-write - - - RXUF - RXUF Interrupt Enable - 5 - 1 - read-write - - - TXOF - TXOF Interrupt Enable - 6 - 1 - read-write - - - TXUF - TXUF Interrupt Enable - 7 - 1 - read-write - - - PERR - PERR Interrupt Enable - 8 - 1 - read-write - - - FERR - FERR Interrupt Enable - 9 - 1 - read-write - - - MPAF - MPAF Interrupt Enable - 10 - 1 - read-write - - - SSM - SSM Interrupt Enable - 11 - 1 - read-write - - - CCF - CCF Interrupt Enable - 12 - 1 - read-write - - - TXIDLE - TXIDLE Interrupt Enable - 13 - 1 - read-write - - - TCMP0 - TCMP0 Interrupt Enable - 14 - 1 - read-write - - - TCMP1 - TCMP1 Interrupt Enable - 15 - 1 - read-write - - - TCMP2 - TCMP2 Interrupt Enable - 16 - 1 - read-write - - - - - IRCTRL - IrDA Control Register - 0x50 - 32 - read-write - 0x00000000 - 0x00000f8f - - - IREN - Enable IrDA Module - 0 - 1 - read-write - - - IRPW - IrDA TX Pulse Width - 1 - 2 - read-write - - - ONE - IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 - 0x00000000 - - - TWO - IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 - 0x00000001 - - - THREE - IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 - 0x00000002 - - - FOUR - IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 - 0x00000003 - - - - - IRFILT - IrDA RX Filter - 3 - 1 - read-write - - - IRPRSEN - IrDA PRS Channel Enable - 7 - 1 - read-write - - - IRPRSSEL - IrDA PRS Channel Select - 8 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - - - INPUT - USART Input Register - 0x58 - 32 - read-write - 0x00000000 - 0x00008f8f - - - RXPRSSEL - RX PRS Channel Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - RXPRS - PRS RX Enable - 7 - 1 - read-write - - - CLKPRSSEL - CLK PRS Channel Select - 8 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - CLKPRS - PRS CLK Enable - 15 - 1 - read-write - - - - - I2SCTRL - I2S Control Register - 0x5c - 32 - read-write - 0x00000000 - 0x0000071f - - - EN - Enable I2S Mode - 0 - 1 - read-write - - - MONO - Stero or Mono - 1 - 1 - read-write - - - JUSTIFY - Justification of I2S Data - 2 - 1 - read-write - - - DMASPLIT - Separate DMA Request For Left/Right Data - 3 - 1 - read-write - - - DELAY - Delay on I2S data - 4 - 1 - read-write - - - FORMAT - I2S Word Format - 8 - 3 - read-write - - - W32D32 - 32-bit word, 32-bit data - 0x00000000 - - - W32D24M - 32-bit word, 32-bit data with 8 lsb masked - 0x00000001 - - - W32D24 - 32-bit word, 24-bit data - 0x00000002 - - - W32D16 - 32-bit word, 16-bit data - 0x00000003 - - - W32D8 - 32-bit word, 8-bit data - 0x00000004 - - - W16D16 - 16-bit word, 16-bit data - 0x00000005 - - - W16D8 - 16-bit word, 8-bit data - 0x00000006 - - - W8D8 - 8-bit word, 8-bit data - 0x00000007 - - - - - - - TIMING - Timing Register - 0x60 - 32 - read-write - 0x00000000 - 0x77770000 - - - TXDELAY - TX frame start delay - 16 - 3 - read-write - - - DISABLE - Disable - TXDELAY in USARTn_CTRL can be used for legacy - 0x00000000 - - - ONE - Start of transmission is delayed for 1 baud-times - 0x00000001 - - - TWO - Start of transmission is delayed for 2 baud-times - 0x00000002 - - - THREE - Start of transmission is delayed for 3 baud-times - 0x00000003 - - - SEVEN - Start of transmission is delayed for 7 baud-times - 0x00000004 - - - TCMP0 - Start of transmission is delayed for TCMPVAL0 baud-times - 0x00000005 - - - TCMP1 - Start of transmission is delayed for TCMPVAL1 baud-times - 0x00000006 - - - TCMP2 - Start of transmission is delayed for TCMPVAL2 baud-times - 0x00000007 - - - - - CSSETUP - Chip Select Setup - 20 - 3 - read-write - - - ZERO - CS is not asserted before start of transmission - 0x00000000 - - - ONE - CS is asserted for 1 baud-times before start of transmission - 0x00000001 - - - TWO - CS is asserted for 2 baud-times before start of transmission - 0x00000002 - - - THREE - CS is asserted for 3 baud-times before start of transmission - 0x00000003 - - - SEVEN - CS is asserted for 7 baud-times before start of transmission - 0x00000004 - - - TCMP0 - CS is asserted before the start of transmission for TCMPVAL0 baud-times - 0x00000005 - - - TCMP1 - CS is asserted before the start of transmission for TCMPVAL1 baud-times - 0x00000006 - - - TCMP2 - CS is asserted before the start of transmission for TCMPVAL2 baud-times - 0x00000007 - - - - - ICS - Inter-character spacing - 24 - 3 - read-write - - - ZERO - There is no space between charcters - 0x00000000 - - - ONE - Create a space of 1 baud-times before start of transmission - 0x00000001 - - - TWO - Create a space of 2 baud-times before start of transmission - 0x00000002 - - - THREE - Create a space of 3 baud-times before start of transmission - 0x00000003 - - - SEVEN - Create a space of 7 baud-times before start of transmission - 0x00000004 - - - TCMP0 - Create a space of before the start of transmission for TCMPVAL0 baud-times - 0x00000005 - - - TCMP1 - Create a space of before the start of transmission for TCMPVAL1 baud-times - 0x00000006 - - - TCMP2 - Create a space of before the start of transmission for TCMPVAL2 baud-times - 0x00000007 - - - - - CSHOLD - Chip Select Hold - 28 - 3 - read-write - - - ZERO - Disable CS being asserted after the end of transmission - 0x00000000 - - - ONE - CS is asserted for 1 baud-times after the end of transmission - 0x00000001 - - - TWO - CS is asserted for 2 baud-times after the end of transmission - 0x00000002 - - - THREE - CS is asserted for 3 baud-times after the end of transmission - 0x00000003 - - - SEVEN - CS is asserted for 7 baud-times after the end of transmission - 0x00000004 - - - TCMP0 - CS is asserted after the end of transmission for TCMPVAL0 baud-times - 0x00000005 - - - TCMP1 - CS is asserted after the end of transmission for TCMPVAL1 baud-times - 0x00000006 - - - TCMP2 - CS is asserted after the end of transmission for TCMPVAL2 baud-times - 0x00000007 - - - - - - - CTRLX - Control Register Extended - 0x64 - 32 - read-write - 0x00000000 - 0x0000000f - - - DBGHALT - Debug halt - 0 - 1 - read-write - - - CTSINV - CTS Pin Inversion - 1 - 1 - read-write - - - CTSEN - CTS Function enabled - 2 - 1 - read-write - - - RTSINV - RTS Pin Inversion - 3 - 1 - read-write - - - - - TIMECMP0 - Used to generate interrupts and various delays - 0x68 - 32 - read-write - 0x00000000 - 0x017700ff - - - TCMPVAL - Timer comparator 0. - 0 - 8 - read-write - - - TSTART - Timer start source - 16 - 3 - read-write - - - DISABLE - Comparator 0 is disabled - 0x00000000 - - - TXEOF - Comparator 0 and timer are started at TX end of frame - 0x00000001 - - - TXC - Comparator 0 and timer are started at TX Complete - 0x00000002 - - - RXACT - Comparator 0 and timer are started at RX going Active (default: low) - 0x00000003 - - - RXEOF - Comparator 0 and timer are started at RX end of frame - 0x00000004 - - - - - TSTOP - Source used to disable comparator 0 - 20 - 3 - read-write - - - TCMP0 - Comparator 0 is disabled when the counter equals TCMPVAL and triggers a TCMP0 event - 0x00000000 - - - TXST - Comparator 0 is disabled at the start of transmission - 0x00000001 - - - RXACT - Comparator 0 is disabled on RX going going Active (default: low) - 0x00000002 - - - RXACTN - Comparator 0 is disabled on RX going Inactive - 0x00000003 - - - - - RESTARTEN - Restart Timer on TCMP0 - 24 - 1 - read-write - - - - - TIMECMP1 - Used to generate interrupts and various delays - 0x6c - 32 - read-write - 0x00000000 - 0x017700ff - - - TCMPVAL - Timer comparator 1. - 0 - 8 - read-write - - - TSTART - Timer start source - 16 - 3 - read-write - - - DISABLE - Comparator 1 is disabled - 0x00000000 - - - TXEOF - Comparator 1 and timer are started at TX end of frame - 0x00000001 - - - TXC - Comparator 1 and timer are started at TX Complete - 0x00000002 - - - RXACT - Comparator 1 and timer are started at RX going going Active (default: low) - 0x00000003 - - - RXEOF - Comparator 1 and timer are started at RX end of frame - 0x00000004 - - - - - TSTOP - Source used to disable comparator 1 - 20 - 3 - read-write - - - TCMP1 - Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event - 0x00000000 - - - TXST - Comparator 1 is disabled at TX start TX Engine - 0x00000001 - - - RXACT - Comparator 1 is disabled on RX going going Active (default: low) - 0x00000002 - - - RXACTN - Comparator 1 is disabled on RX going Inactive - 0x00000003 - - - - - RESTARTEN - Restart Timer on TCMP1 - 24 - 1 - read-write - - - - - TIMECMP2 - Used to generate interrupts and various delays - 0x70 - 32 - read-write - 0x00000000 - 0x017700ff - - - TCMPVAL - Timer comparator 2. - 0 - 8 - read-write - - - TSTART - Timer start source - 16 - 3 - read-write - - - DISABLE - Comparator 2 is disabled - 0x00000000 - - - TXEOF - Comparator 2 and timer are started at TX end of frame - 0x00000001 - - - TXC - Comparator 2 and timer are started at TX Complete - 0x00000002 - - - RXACT - Comparator 2 and timer are started at RX going going Active (default: low) - 0x00000003 - - - RXEOF - Comparator 2 and timer are started at RX end of frame - 0x00000004 - - - - - TSTOP - Source used to disable comparator 2 - 20 - 3 - read-write - - - TCMP2 - Comparator 2 is disabled when the counter equals TCMPVAL and triggers a TCMP2 event - 0x00000000 - - - TXST - Comparator 2 is disabled at TX start TX Engine - 0x00000001 - - - RXACT - Comparator 2 is disabled on RX going going Active (default: low) - 0x00000002 - - - RXACTN - Comparator 2 is disabled on RX going Inactive - 0x00000003 - - - - - RESTARTEN - Restart Timer on TCMP2 - 24 - 1 - read-write - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x74 - 32 - read-write - 0x00000000 - 0x0000003f - - - RXPEN - RX Pin Enable - 0 - 1 - read-write - - - TXPEN - TX Pin Enable - 1 - 1 - read-write - - - CSPEN - CS Pin Enable - 2 - 1 - read-write - - - CLKPEN - CLK Pin Enable - 3 - 1 - read-write - - - CTSPEN - CTS Pin Enable - 4 - 1 - read-write - - - RTSPEN - RTS Pin Enable - 5 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x78 - 32 - read-write - 0x00000000 - 0x3f3f3f3f - - - RXLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - TXLOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CSLOC - I/O Location - 16 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - CLKLOC - I/O Location - 24 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - ROUTELOC1 - I/O Routing Location Register - 0x7c - 32 - read-write - 0x00000000 - 0x00003f3f - - - CTSLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - RTSLOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - - - LEUART0 - 1.6 - LEUART0 - 0x4004a000 - - 0 - 0x00000400 - registers - - - LEUART0 - 21 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x0000ffff - - - AUTOTRI - Automatic Transmitter Tristate - 0 - 1 - read-write - - - DATABITS - Data-Bit Mode - 1 - 1 - read-write - - - PARITY - Parity-Bit Mode - 2 - 2 - read-write - - - NONE - Parity bits are not used - 0x00000000 - - - EVEN - Even parity are used. Parity bits are automatically generated and checked by hardware. - 0x00000002 - - - ODD - Odd parity is used. Parity bits are automatically generated and checked by hardware. - 0x00000003 - - - - - STOPBITS - Stop-Bit Mode - 4 - 1 - read-write - - - INV - Invert Input And Output - 5 - 1 - read-write - - - ERRSDMA - Clear RX DMA On Error - 6 - 1 - read-write - - - LOOPBK - Loopback Enable - 7 - 1 - read-write - - - SFUBRX - Start-Frame UnBlock RX - 8 - 1 - read-write - - - MPM - Multi-Processor Mode - 9 - 1 - read-write - - - MPAB - Multi-Processor Address-Bit - 10 - 1 - read-write - - - BIT8DV - Bit 8 Default Value - 11 - 1 - read-write - - - RXDMAWU - RX DMA Wakeup - 12 - 1 - read-write - - - TXDMAWU - TX DMA Wakeup - 13 - 1 - read-write - - - TXDELAY - TX Delay Transmission - 14 - 2 - read-write - - - NONE - Frames are transmitted immediately - 0x00000000 - - - SINGLE - Transmission of new frames are delayed by a single baud period - 0x00000001 - - - DOUBLE - Transmission of new frames are delayed by two baud periods - 0x00000002 - - - TRIPLE - Transmission of new frames are delayed by three baud periods - 0x00000003 - - - - - - - CMD - Command Register - 0x4 - 32 - write-only - 0x00000000 - 0x000000ff - - - RXEN - Receiver Enable - 0 - 1 - write-only - - - RXDIS - Receiver Disable - 1 - 1 - write-only - - - TXEN - Transmitter Enable - 2 - 1 - write-only - - - TXDIS - Transmitter Disable - 3 - 1 - write-only - - - RXBLOCKEN - Receiver Block Enable - 4 - 1 - write-only - - - RXBLOCKDIS - Receiver Block Disable - 5 - 1 - write-only - - - CLEARTX - Clear TX - 6 - 1 - write-only - - - CLEARRX - Clear RX - 7 - 1 - write-only - - - - - STATUS - Status Register - 0x8 - 32 - read-only - 0x00000050 - 0x0000007f - - - RXENS - Receiver Enable Status - 0 - 1 - read-only - - - TXENS - Transmitter Enable Status - 1 - 1 - read-only - - - RXBLOCK - Block Incoming Data - 2 - 1 - read-only - - - TXC - TX Complete - 3 - 1 - read-only - - - TXBL - TX Buffer Level - 4 - 1 - read-only - - - RXDATAV - RX Data Valid - 5 - 1 - read-only - - - TXIDLE - TX Idle - 6 - 1 - read-only - - - - - CLKDIV - Clock Control Register - 0xc - 32 - read-write - 0x00000000 - 0x0001fff8 - - - DIV - Fractional Clock Divider - 3 - 14 - read-write - - - - - STARTFRAME - Start Frame Register - 0x10 - 32 - read-write - 0x00000000 - 0x000001ff - - - STARTFRAME - Start Frame - 0 - 9 - read-write - - - - - SIGFRAME - Signal Frame Register - 0x14 - 32 - read-write - 0x00000000 - 0x000001ff - - - SIGFRAME - Signal Frame - 0 - 9 - read-write - - - - - RXDATAX - Receive Buffer Data Extended Register - 0x18 - 32 - read-only - 0x00000000 - 0x0000c1ff - modifyExternal - - - RXDATA - RX Data - 0 - 9 - read-only - - - PERR - Receive Data Parity Error - 14 - 1 - read-only - - - FERR - Receive Data Framing Error - 15 - 1 - read-only - - - - - RXDATA - Receive Buffer Data Register - 0x1c - 32 - read-only - 0x00000000 - 0x000000ff - modifyExternal - - - RXDATA - RX Data - 0 - 8 - read-only - - - - - RXDATAXP - Receive Buffer Data Extended Peek Register - 0x20 - 32 - read-only - 0x00000000 - 0x0000c1ff - - - RXDATAP - RX Data Peek - 0 - 9 - read-only - - - PERRP - Receive Data Parity Error Peek - 14 - 1 - read-only - - - FERRP - Receive Data Framing Error Peek - 15 - 1 - read-only - - - - - TXDATAX - Transmit Buffer Data Extended Register - 0x24 - 32 - read-write - 0x00000000 - 0x0000e1ff - - - TXDATA - TX Data - 0 - 9 - read-write - - - TXBREAK - Transmit Data As Break - 13 - 1 - read-write - - - TXDISAT - Disable TX After Transmission - 14 - 1 - read-write - - - RXENAT - Enable RX After Transmission - 15 - 1 - read-write - - - - - TXDATA - Transmit Buffer Data Register - 0x28 - 32 - read-write - 0x00000000 - 0x000000ff - - - TXDATA - TX Data - 0 - 8 - read-write - - - - - IF - Interrupt Flag Register - 0x2c - 32 - read-only - 0x00000002 - 0x000007ff - - - TXC - TX Complete Interrupt Flag - 0 - 1 - read-only - - - TXBL - TX Buffer Level Interrupt Flag - 1 - 1 - read-only - - - RXDATAV - RX Data Valid Interrupt Flag - 2 - 1 - read-only - - - RXOF - RX Overflow Interrupt Flag - 3 - 1 - read-only - - - RXUF - RX Underflow Interrupt Flag - 4 - 1 - read-only - - - TXOF - TX Overflow Interrupt Flag - 5 - 1 - read-only - - - PERR - Parity Error Interrupt Flag - 6 - 1 - read-only - - - FERR - Framing Error Interrupt Flag - 7 - 1 - read-only - - - MPAF - Multi-Processor Address Frame Interrupt Flag - 8 - 1 - read-only - - - STARTF - Start Frame Interrupt Flag - 9 - 1 - read-only - - - SIGF - Signal Frame Interrupt Flag - 10 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x30 - 32 - write-only - 0x00000000 - 0x000007f9 - - - TXC - Set TXC Interrupt Flag - 0 - 1 - write-only - - - RXOF - Set RXOF Interrupt Flag - 3 - 1 - write-only - - - RXUF - Set RXUF Interrupt Flag - 4 - 1 - write-only - - - TXOF - Set TXOF Interrupt Flag - 5 - 1 - write-only - - - PERR - Set PERR Interrupt Flag - 6 - 1 - write-only - - - FERR - Set FERR Interrupt Flag - 7 - 1 - write-only - - - MPAF - Set MPAF Interrupt Flag - 8 - 1 - write-only - - - STARTF - Set STARTF Interrupt Flag - 9 - 1 - write-only - - - SIGF - Set SIGF Interrupt Flag - 10 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x34 - 32 - write-only - 0x00000000 - 0x000007f9 - - - TXC - Clear TXC Interrupt Flag - 0 - 1 - write-only - - - RXOF - Clear RXOF Interrupt Flag - 3 - 1 - write-only - - - RXUF - Clear RXUF Interrupt Flag - 4 - 1 - write-only - - - TXOF - Clear TXOF Interrupt Flag - 5 - 1 - write-only - - - PERR - Clear PERR Interrupt Flag - 6 - 1 - write-only - - - FERR - Clear FERR Interrupt Flag - 7 - 1 - write-only - - - MPAF - Clear MPAF Interrupt Flag - 8 - 1 - write-only - - - STARTF - Clear STARTF Interrupt Flag - 9 - 1 - write-only - - - SIGF - Clear SIGF Interrupt Flag - 10 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x38 - 32 - read-write - 0x00000000 - 0x000007ff - - - TXC - TXC Interrupt Enable - 0 - 1 - read-write - - - TXBL - TXBL Interrupt Enable - 1 - 1 - read-write - - - RXDATAV - RXDATAV Interrupt Enable - 2 - 1 - read-write - - - RXOF - RXOF Interrupt Enable - 3 - 1 - read-write - - - RXUF - RXUF Interrupt Enable - 4 - 1 - read-write - - - TXOF - TXOF Interrupt Enable - 5 - 1 - read-write - - - PERR - PERR Interrupt Enable - 6 - 1 - read-write - - - FERR - FERR Interrupt Enable - 7 - 1 - read-write - - - MPAF - MPAF Interrupt Enable - 8 - 1 - read-write - - - STARTF - STARTF Interrupt Enable - 9 - 1 - read-write - - - SIGF - SIGF Interrupt Enable - 10 - 1 - read-write - - - - - PULSECTRL - Pulse Control Register - 0x3c - 32 - read-write - 0x00000000 - 0x0000003f - - - PULSEW - Pulse Width - 0 - 4 - read-write - - - PULSEEN - Pulse Generator/Extender Enable - 4 - 1 - read-write - - - PULSEFILT - Pulse Filter - 5 - 1 - read-write - - - - - FREEZE - Freeze Register - 0x40 - 32 - read-write - 0x00000000 - 0x00000001 - - - REGFREEZE - Register Update Freeze - 0 - 1 - read-write - - - - - SYNCBUSY - Synchronization Busy Register - 0x44 - 32 - read-only - 0x00000000 - 0x000000ff - - - CTRL - CTRL Register Busy - 0 - 1 - read-only - - - CMD - CMD Register Busy - 1 - 1 - read-only - - - CLKDIV - CLKDIV Register Busy - 2 - 1 - read-only - - - STARTFRAME - STARTFRAME Register Busy - 3 - 1 - read-only - - - SIGFRAME - SIGFRAME Register Busy - 4 - 1 - read-only - - - TXDATAX - TXDATAX Register Busy - 5 - 1 - read-only - - - TXDATA - TXDATA Register Busy - 6 - 1 - read-only - - - PULSECTRL - PULSECTRL Register Busy - 7 - 1 - read-only - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x54 - 32 - read-write - 0x00000000 - 0x00000003 - - - RXPEN - RX Pin Enable - 0 - 1 - read-write - - - TXPEN - TX Pin Enable - 1 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x58 - 32 - read-write - 0x00000000 - 0x00003f3f - - - RXLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - TXLOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - INPUT - LEUART Input Register - 0x64 - 32 - read-write - 0x00000000 - 0x0000002f - - - RXPRSSEL - RX PRS Channel Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected - 0x0000000b - - - - - RXPRS - PRS RX Enable - 5 - 1 - read-write - - - - - - - LETIMER0 - 1.6 - LETIMER0 - 0x40046000 - - 0 - 0x00000400 - registers - - - LETIMER0 - 26 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x000013ff - - - REPMODE - Repeat Mode - 0 - 2 - read-write - - - FREE - When started, the LETIMER counts down until it is stopped by software. - 0x00000000 - - - ONESHOT - The counter counts REP0 times. When REP0 reaches zero, the counter stops. - 0x00000001 - - - BUFFERED - The counter counts REP0 times. If REP1 has been written, it is loaded into REP0 when REP0 reaches zero. Else the counter stops - 0x00000002 - - - DOUBLE - Both REP0 and REP1 are decremented when the LETIMER wraps around. The LETIMER counts until both REP0 and REP1 are zero - 0x00000003 - - - - - UFOA0 - Underflow Output Action 0 - 2 - 2 - read-write - - - NONE - LETn_O0 is held at its idle value as defined by OPOL0. - 0x00000000 - - - TOGGLE - LETn_O0 is toggled on CNT underflow. - 0x00000001 - - - PULSE - LETn_O0 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL0. - 0x00000002 - - - PWM - LETn_O0 is set idle on CNT underflow, and active on compare match with COMP1 - 0x00000003 - - - - - UFOA1 - Underflow Output Action 1 - 4 - 2 - read-write - - - NONE - LETn_O1 is held at its idle value as defined by OPOL1. - 0x00000000 - - - TOGGLE - LETn_O1 is toggled on CNT underflow. - 0x00000001 - - - PULSE - LETn_O1 is held active for one LFACLKLETIMER0 clock cycle on CNT underflow. The output then returns to its idle value as defined by OPOL1. - 0x00000002 - - - PWM - LETn_O1 is set idle on CNT underflow, and active on compare match with COMP1 - 0x00000003 - - - - - OPOL0 - Output 0 Polarity - 6 - 1 - read-write - - - OPOL1 - Output 1 Polarity - 7 - 1 - read-write - - - BUFTOP - Buffered Top - 8 - 1 - read-write - - - COMP0TOP - Compare Value 0 Is Top Value - 9 - 1 - read-write - - - DEBUGRUN - Debug Mode Run Enable - 12 - 1 - read-write - - - - - CMD - Command Register - 0x4 - 32 - write-only - 0x00000000 - 0x0000001f - - - START - Start LETIMER - 0 - 1 - write-only - - - STOP - Stop LETIMER - 1 - 1 - write-only - - - CLEAR - Clear LETIMER - 2 - 1 - write-only - - - CTO0 - Clear Toggle Output 0 - 3 - 1 - write-only - - - CTO1 - Clear Toggle Output 1 - 4 - 1 - write-only - - - - - STATUS - Status Register - 0x8 - 32 - read-only - 0x00000000 - 0x00000001 - - - RUNNING - LETIMER Running - 0 - 1 - read-only - - - - - CNT - Counter Value Register - 0xc - 32 - read-write - 0x00000000 - 0x0000ffff - - - CNT - Counter Value - 0 - 16 - read-write - - - - - COMP0 - Compare Value Register 0 - 0x10 - 32 - read-write - 0x00000000 - 0x0000ffff - - - COMP0 - Compare Value 0 - 0 - 16 - read-write - - - - - COMP1 - Compare Value Register 1 - 0x14 - 32 - read-write - 0x00000000 - 0x0000ffff - - - COMP1 - Compare Value 1 - 0 - 16 - read-write - - - - - REP0 - Repeat Counter Register 0 - 0x18 - 32 - read-write - 0x00000000 - 0x000000ff - - - REP0 - Repeat Counter 0 - 0 - 8 - read-write - - - - - REP1 - Repeat Counter Register 1 - 0x1c - 32 - read-write - 0x00000000 - 0x000000ff - - - REP1 - Repeat Counter 1 - 0 - 8 - read-write - - - - - IF - Interrupt Flag Register - 0x20 - 32 - read-only - 0x00000000 - 0x0000001f - - - COMP0 - Compare Match 0 Interrupt Flag - 0 - 1 - read-only - - - COMP1 - Compare Match 1 Interrupt Flag - 1 - 1 - read-only - - - UF - Underflow Interrupt Flag - 2 - 1 - read-only - - - REP0 - Repeat Counter 0 Interrupt Flag - 3 - 1 - read-only - - - REP1 - Repeat Counter 1 Interrupt Flag - 4 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x24 - 32 - write-only - 0x00000000 - 0x0000001f - - - COMP0 - Set COMP0 Interrupt Flag - 0 - 1 - write-only - - - COMP1 - Set COMP1 Interrupt Flag - 1 - 1 - write-only - - - UF - Set UF Interrupt Flag - 2 - 1 - write-only - - - REP0 - Set REP0 Interrupt Flag - 3 - 1 - write-only - - - REP1 - Set REP1 Interrupt Flag - 4 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x28 - 32 - write-only - 0x00000000 - 0x0000001f - - - COMP0 - Clear COMP0 Interrupt Flag - 0 - 1 - write-only - - - COMP1 - Clear COMP1 Interrupt Flag - 1 - 1 - write-only - - - UF - Clear UF Interrupt Flag - 2 - 1 - write-only - - - REP0 - Clear REP0 Interrupt Flag - 3 - 1 - write-only - - - REP1 - Clear REP1 Interrupt Flag - 4 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x2c - 32 - read-write - 0x00000000 - 0x0000001f - - - COMP0 - COMP0 Interrupt Enable - 0 - 1 - read-write - - - COMP1 - COMP1 Interrupt Enable - 1 - 1 - read-write - - - UF - UF Interrupt Enable - 2 - 1 - read-write - - - REP0 - REP0 Interrupt Enable - 3 - 1 - read-write - - - REP1 - REP1 Interrupt Enable - 4 - 1 - read-write - - - - - SYNCBUSY - Synchronization Busy Register - 0x34 - 32 - read-only - 0x00000000 - 0x00000002 - - - CMD - CMD Register Busy - 1 - 1 - read-only - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x40 - 32 - read-write - 0x00000000 - 0x00000003 - - - OUT0PEN - Output 0 Pin Enable - 0 - 1 - read-write - - - OUT1PEN - Output 1 Pin Enable - 1 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x44 - 32 - read-write - 0x00000000 - 0x00003f3f - - - OUT0LOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - OUT1LOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - PRSSEL - PRS Input Select Register - 0x50 - 32 - read-write - 0x00000000 - 0x0cccf3cf - - - PRSSTARTSEL - PRS Start Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - PRSSTOPSEL - PRS Stop Select - 6 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - PRSCLEARSEL - PRS Clear Select - 12 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - PRSSTARTMODE - PRS Start Mode - 18 - 2 - read-write - - - NONE - PRS cannot start the LETIMER - 0x00000000 - - - RISING - Rising edge of selected PRS input can start the LETIMER - 0x00000001 - - - FALLING - Falling edge of selected PRS input can start the LETIMER - 0x00000002 - - - BOTH - Both the rising or falling edge of the selected PRS input can start the LETIMER - 0x00000003 - - - - - PRSSTOPMODE - PRS Stop Mode - 22 - 2 - read-write - - - NONE - PRS cannot stop the LETIMER - 0x00000000 - - - RISING - Rising edge of selected PRS input can stop the LETIMER - 0x00000001 - - - FALLING - Falling edge of selected PRS input can stop the LETIMER - 0x00000002 - - - BOTH - Both the rising or falling edge of the selected PRS input can stop the LETIMER - 0x00000003 - - - - - PRSCLEARMODE - PRS Clear Mode - 26 - 2 - read-write - - - NONE - PRS cannot clear the LETIMER - 0x00000000 - - - RISING - Rising edge of selected PRS input can clear the LETIMER - 0x00000001 - - - FALLING - Falling edge of selected PRS input can clear the LETIMER - 0x00000002 - - - BOTH - Both the rising or falling edge of the selected PRS input can clear the LETIMER - 0x00000003 - - - - - - - - - CRYOTIMER - 1.6 - CRYOTIMER - 0x4001e000 - - 0 - 0x00000400 - registers - - - CRYOTIMER - 31 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x000000ef - - - EN - Enable CRYOTIMER - 0 - 1 - read-write - - - DEBUGRUN - Debug Mode Run Enable - 1 - 1 - read-write - - - OSCSEL - Select Low frequency oscillator - 2 - 2 - read-write - - - LFRCO - Select Low Frequency RC Oscillator - 0x00000000 - - - LFXO - Select Low Frequency Crystal Oscillator - 0x00000001 - - - ULFRCO - Select Ultra Low Frequency RC Oscillator - 0x00000002 - - - - - PRESC - Prescaler Setting - 5 - 3 - read-write - - - DIV1 - LF Oscillator frequency undivided - 0x00000000 - - - DIV2 - LF Oscillator frequency divided by 2 - 0x00000001 - - - DIV4 - LF Oscillator frequency divided by 4 - 0x00000002 - - - DIV8 - LF Oscillator frequency divided by 8 - 0x00000003 - - - DIV16 - LF Oscillator frequency divided by 16 - 0x00000004 - - - DIV32 - LF Oscillator frequency divided by 32 - 0x00000005 - - - DIV64 - LF Oscillator frequency divided by 64 - 0x00000006 - - - DIV128 - LF Oscillator frequency divided by 128 - 0x00000007 - - - - - - - PERIODSEL - Interrupt Duration - 0x4 - 32 - read-write - 0x00000020 - 0x0000003f - - - PERIODSEL - Interrupts/Wakeup events period setting - 0 - 6 - read-write - - - - - CNT - Counter Value - 0x8 - 32 - read-only - 0x00000000 - 0xffffffff - - - CNT - Counter Value - 0 - 32 - read-only - - - - - EM4WUEN - Wake Up Enable - 0xc - 32 - read-write - 0x00000000 - 0x00000001 - - - EM4WU - EM4 Wake-up enable - 0 - 1 - read-write - - - - - IF - Interrupt Flag Register - 0x10 - 32 - read-only - 0x00000000 - 0x00000001 - - - PERIOD - Wakeup event/Interrupt - 0 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x14 - 32 - write-only - 0x00000000 - 0x00000001 - - - PERIOD - Set PERIOD Interrupt Flag - 0 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x18 - 32 - write-only - 0x00000000 - 0x00000001 - - - PERIOD - Clear PERIOD Interrupt Flag - 0 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x1c - 32 - read-write - 0x00000000 - 0x00000001 - - - PERIOD - PERIOD Interrupt Enable - 0 - 1 - read-write - - - - - - - PCNT0 - 1.6 - PCNT0 - 0x4004e000 - - 0 - 0x00000400 - registers - - - PCNT0 - 22 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0xbfdbffff - - - MODE - Mode Select - 0 - 3 - read-write - - - DISABLE - The module is disabled. - 0x00000000 - - - OVSSINGLE - Single input LFACLK oversampling mode (available in EM0-EM2). - 0x00000001 - - - EXTCLKSINGLE - Externally clocked single input counter mode (available in EM0-EM3). - 0x00000002 - - - EXTCLKQUAD - Externally clocked quadrature decoder mode (available in EM0-EM3). - 0x00000003 - - - OVSQUAD1X - LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM2). - 0x00000004 - - - OVSQUAD2X - LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM2). - 0x00000005 - - - OVSQUAD4X - LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM2). - 0x00000006 - - - - - FILT - Enable Digital Pulse Width Filter - 3 - 1 - read-write - - - RSTEN - Enable PCNT Clock Domain Reset - 4 - 1 - read-write - - - CNTRSTEN - Enable CNT Reset - 5 - 1 - read-write - - - AUXCNTRSTEN - Enable AUXCNT Reset - 6 - 1 - read-write - - - DEBUGHALT - Debug Mode Halt Enable - 7 - 1 - read-write - - - HYST - Enable Hysteresis - 8 - 1 - read-write - - - S1CDIR - Count direction determined by S1 - 9 - 1 - read-write - - - CNTEV - Controls when the counter counts - 10 - 2 - read-write - - - BOTH - Counts up on up-count and down on down-count events. - 0x00000000 - - - UP - Only counts up on up-count events. - 0x00000001 - - - DOWN - Only counts down on down-count events. - 0x00000002 - - - NONE - Never counts. - 0x00000003 - - - - - AUXCNTEV - Controls when the auxiliary counter counts - 12 - 2 - read-write - - - NONE - Never counts. - 0x00000000 - - - UP - Counts up on up-count events. - 0x00000001 - - - DOWN - Counts up on down-count events. - 0x00000002 - - - BOTH - Counts up on both up-count and down-count events. - 0x00000003 - - - - - CNTDIR - Non-Quadrature Mode Counter Direction Control - 14 - 1 - read-write - - - EDGE - Edge Select - 15 - 1 - read-write - - - TCCMODE - Sets the mode for triggered compare and clear - 16 - 2 - read-write - - - DISABLED - Triggered compare and clear not enabled. - 0x00000000 - - - LFA - Compare and clear performed on each (optionally prescaled) LFA clock cycle. - 0x00000001 - - - PRS - Compare and clear performed on positive PRS edges. - 0x00000002 - - - - - TCCPRESC - Set the LFA prescaler for triggered compare and clear - 19 - 2 - read-write - - - DIV1 - Compare and clear event each LFA cycle. - 0x00000000 - - - DIV2 - Compare and clear performed on every other LFA cycle. - 0x00000001 - - - DIV4 - Compare and clear performed on every 4th LFA cycle. - 0x00000002 - - - DIV8 - Compare and clear performed on every 8th LFA cycle. - 0x00000003 - - - - - TCCCOMP - Triggered compare and clear compare mode - 22 - 2 - read-write - - - LTOE - Compare match if PCNT_CNT is less than, or equal to PCNT_TOP. - 0x00000000 - - - GTOE - Compare match if PCNT_CNT is greater than or equal to PCNT_TOP. - 0x00000001 - - - RANGE - Compare match if PCNT_CNT is less than, or equal to PCNT_TOP[15:8]], and greater than, or equal to PCNT_TOP[7:0]. - 0x00000002 - - - - - PRSGATEEN - PRS gate enable - 24 - 1 - read-write - - - TCCPRSPOL - TCC PRS polarity select - 25 - 1 - read-write - - - TCCPRSSEL - TCC PRS Channel Select - 26 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected. - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected. - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected. - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected. - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected. - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected. - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected. - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected. - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected. - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected. - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected. - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected. - 0x0000000b - - - - - TOPBHFSEL - TOPB High frequency value select - 31 - 1 - read-write - - - - - CMD - Command Register - 0x4 - 32 - write-only - 0x00000000 - 0x00000003 - - - LCNTIM - Load CNT Immediately - 0 - 1 - write-only - - - LTOPBIM - Load TOPB Immediately - 1 - 1 - write-only - - - - - STATUS - Status Register - 0x8 - 32 - read-only - 0x00000000 - 0x00000001 - - - DIR - Current Counter Direction - 0 - 1 - read-only - - - - - CNT - Counter Value Register - 0xc - 32 - read-only - 0x00000000 - 0x0000ffff - - - CNT - Counter Value - 0 - 16 - read-only - - - - - TOP - Top Value Register - 0x10 - 32 - read-only - 0x000000ff - 0x0000ffff - - - TOP - Counter Top Value - 0 - 16 - read-only - - - - - TOPB - Top Value Buffer Register - 0x14 - 32 - read-write - 0x000000ff - 0x0000ffff - - - TOPB - Counter Top Buffer - 0 - 16 - read-write - - - - - IF - Interrupt Flag Register - 0x18 - 32 - read-only - 0x00000000 - 0x0000003f - - - UF - Underflow Interrupt Read Flag - 0 - 1 - read-only - - - OF - Overflow Interrupt Read Flag - 1 - 1 - read-only - - - DIRCNG - Direction Change Detect Interrupt Flag - 2 - 1 - read-only - - - AUXOF - Overflow Interrupt Read Flag - 3 - 1 - read-only - - - TCC - Triggered compare Interrupt Read Flag - 4 - 1 - read-only - - - OQSTERR - Oversampling Quadrature State Error Interrupt - 5 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x1c - 32 - write-only - 0x00000000 - 0x0000003f - - - UF - Set UF Interrupt Flag - 0 - 1 - write-only - - - OF - Set OF Interrupt Flag - 1 - 1 - write-only - - - DIRCNG - Set DIRCNG Interrupt Flag - 2 - 1 - write-only - - - AUXOF - Set AUXOF Interrupt Flag - 3 - 1 - write-only - - - TCC - Set TCC Interrupt Flag - 4 - 1 - write-only - - - OQSTERR - Set OQSTERR Interrupt Flag - 5 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x20 - 32 - write-only - 0x00000000 - 0x0000003f - - - UF - Clear UF Interrupt Flag - 0 - 1 - write-only - - - OF - Clear OF Interrupt Flag - 1 - 1 - write-only - - - DIRCNG - Clear DIRCNG Interrupt Flag - 2 - 1 - write-only - - - AUXOF - Clear AUXOF Interrupt Flag - 3 - 1 - write-only - - - TCC - Clear TCC Interrupt Flag - 4 - 1 - write-only - - - OQSTERR - Clear OQSTERR Interrupt Flag - 5 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x24 - 32 - read-write - 0x00000000 - 0x0000003f - - - UF - UF Interrupt Enable - 0 - 1 - read-write - - - OF - OF Interrupt Enable - 1 - 1 - read-write - - - DIRCNG - DIRCNG Interrupt Enable - 2 - 1 - read-write - - - AUXOF - AUXOF Interrupt Enable - 3 - 1 - read-write - - - TCC - TCC Interrupt Enable - 4 - 1 - read-write - - - OQSTERR - OQSTERR Interrupt Enable - 5 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x2c - 32 - read-write - 0x00000000 - 0x00003f3f - - - S0INLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - S1INLOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - FREEZE - Freeze Register - 0x40 - 32 - read-write - 0x00000000 - 0x00000001 - - - REGFREEZE - Register Update Freeze - 0 - 1 - read-write - - - - - SYNCBUSY - Synchronization Busy Register - 0x44 - 32 - read-only - 0x00000000 - 0x0000000f - - - CTRL - CTRL Register Busy - 0 - 1 - read-only - - - CMD - CMD Register Busy - 1 - 1 - read-only - - - TOPB - TOPB Register Busy - 2 - 1 - read-only - - - OVSCFG - OVSCFG Register Busy - 3 - 1 - read-only - - - - - AUXCNT - Auxiliary Counter Value Register - 0x64 - 32 - read-only - 0x00000000 - 0x0000ffff - - - AUXCNT - Auxiliary Counter Value - 0 - 16 - read-only - - - - - INPUT - PCNT Input Register - 0x68 - 32 - read-write - 0x00000000 - 0x00000bef - - - S0PRSSEL - S0IN PRS Channel Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected. - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected. - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected. - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected. - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected. - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected. - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected. - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected. - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected. - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected. - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected. - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected. - 0x0000000b - - - - - S0PRSEN - S0IN PRS Enable - 5 - 1 - read-write - - - S1PRSSEL - S1IN PRS Channel Select - 6 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected. - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected. - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected. - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected. - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected. - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected. - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected. - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected. - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected. - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected. - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected. - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected. - 0x0000000b - - - - - S1PRSEN - S1IN PRS Enable - 11 - 1 - read-write - - - - - OVSCFG - Oversampling Config Register - 0x6c - 32 - read-write - 0x00000000 - 0x000010ff - - - FILTLEN - Configure filter length for inputs S0IN and S1IN - 0 - 8 - read-write - - - FLUTTERRM - Flutter Remove - 12 - 1 - read-write - - - - - - - I2C0 - 1.6 - I2C0 - 0x4000c000 - - 0 - 0x00000400 - registers - - - I2C0 - 16 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x0007b3ff - - - EN - I2C Enable - 0 - 1 - read-write - - - SLAVE - Addressable as Slave - 1 - 1 - read-write - - - AUTOACK - Automatic Acknowledge - 2 - 1 - read-write - - - AUTOSE - Automatic STOP when Empty - 3 - 1 - read-write - - - AUTOSN - Automatic STOP on NACK - 4 - 1 - read-write - - - ARBDIS - Arbitration Disable - 5 - 1 - read-write - - - GCAMEN - General Call Address Match Enable - 6 - 1 - read-write - - - TXBIL - TX Buffer Interrupt Level - 7 - 1 - read-write - - - CLHR - Clock Low High Ratio - 8 - 2 - read-write - - - STANDARD - The ratio between low period and high period counters (Nlow:Nhigh) is 4:4 - 0x00000000 - - - ASYMMETRIC - The ratio between low period and high period counters (Nlow:Nhigh) is 6:3 - 0x00000001 - - - FAST - The ratio between low period and high period counters (Nlow:Nhigh) is 11:6 - 0x00000002 - - - - - BITO - Bus Idle Timeout - 12 - 2 - read-write - - - OFF - Timeout disabled - 0x00000000 - - - 40PCC - Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. - 0x00000001 - - - 80PCC - Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. - 0x00000002 - - - 160PCC - Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. - 0x00000003 - - - - - GIBITO - Go Idle on Bus Idle Timeout - 15 - 1 - read-write - - - CLTO - Clock Low Timeout - 16 - 3 - read-write - - - OFF - Timeout disabled - 0x00000000 - - - 40PCC - Timeout after 40 prescaled clock cycles. In standard mode at 100 kHz, this results in a 50us timeout. - 0x00000001 - - - 80PCC - Timeout after 80 prescaled clock cycles. In standard mode at 100 kHz, this results in a 100us timeout. - 0x00000002 - - - 160PCC - Timeout after 160 prescaled clock cycles. In standard mode at 100 kHz, this results in a 200us timeout. - 0x00000003 - - - 320PCC - Timeout after 320 prescaled clock cycles. In standard mode at 100 kHz, this results in a 400us timeout. - 0x00000004 - - - 1024PCC - Timeout after 1024 prescaled clock cycles. In standard mode at 100 kHz, this results in a 1280us timeout. - 0x00000005 - - - - - - - CMD - Command Register - 0x4 - 32 - write-only - 0x00000000 - 0x000000ff - - - START - Send start condition - 0 - 1 - write-only - - - STOP - Send stop condition - 1 - 1 - write-only - - - ACK - Send ACK - 2 - 1 - write-only - - - NACK - Send NACK - 3 - 1 - write-only - - - CONT - Continue transmission - 4 - 1 - write-only - - - ABORT - Abort transmission - 5 - 1 - write-only - - - CLEARTX - Clear TX - 6 - 1 - write-only - - - CLEARPC - Clear Pending Commands - 7 - 1 - write-only - - - - - STATE - State Register - 0x8 - 32 - read-only - 0x00000001 - 0x000000ff - - - BUSY - Bus Busy - 0 - 1 - read-only - - - MASTER - Master - 1 - 1 - read-only - - - TRANSMITTER - Transmitter - 2 - 1 - read-only - - - NACKED - Nack Received - 3 - 1 - read-only - - - BUSHOLD - Bus Held - 4 - 1 - read-only - - - STATE - Transmission State - 5 - 3 - read-only - - - IDLE - No transmission is being performed. - 0x00000000 - - - WAIT - Waiting for idle. Will send a start condition as soon as the bus is idle. - 0x00000001 - - - START - Start transmitted or received - 0x00000002 - - - ADDR - Address transmitted or received - 0x00000003 - - - ADDRACK - Address ack/nack transmitted or received - 0x00000004 - - - DATA - Data transmitted or received - 0x00000005 - - - DATAACK - Data ack/nack transmitted or received - 0x00000006 - - - - - - - STATUS - Status Register - 0xc - 32 - read-only - 0x00000080 - 0x000003ff - - - PSTART - Pending START - 0 - 1 - read-only - - - PSTOP - Pending STOP - 1 - 1 - read-only - - - PACK - Pending ACK - 2 - 1 - read-only - - - PNACK - Pending NACK - 3 - 1 - read-only - - - PCONT - Pending continue - 4 - 1 - read-only - - - PABORT - Pending abort - 5 - 1 - read-only - - - TXC - TX Complete - 6 - 1 - read-only - - - TXBL - TX Buffer Level - 7 - 1 - read-only - - - RXDATAV - RX Data Valid - 8 - 1 - read-only - - - RXFULL - RX FIFO Full - 9 - 1 - read-only - - - - - CLKDIV - Clock Division Register - 0x10 - 32 - read-write - 0x00000000 - 0x000001ff - - - DIV - Clock Divider - 0 - 9 - read-write - - - - - SADDR - Slave Address Register - 0x14 - 32 - read-write - 0x00000000 - 0x000000fe - - - ADDR - Slave address - 1 - 7 - read-write - - - - - SADDRMASK - Slave Address Mask Register - 0x18 - 32 - read-write - 0x00000000 - 0x000000fe - - - MASK - Slave Address Mask - 1 - 7 - read-write - - - - - RXDATA - Receive Buffer Data Register - 0x1c - 32 - read-only - 0x00000000 - 0x000000ff - modifyExternal - - - RXDATA - RX Data - 0 - 8 - read-only - - - - - RXDOUBLE - Receive Buffer Double Data Register - 0x20 - 32 - read-only - 0x00000000 - 0x0000ffff - modifyExternal - - - RXDATA0 - RX Data 0 - 0 - 8 - read-only - - - RXDATA1 - RX Data 1 - 8 - 8 - read-only - - - - - RXDATAP - Receive Buffer Data Peek Register - 0x24 - 32 - read-only - 0x00000000 - 0x000000ff - - - RXDATAP - RX Data Peek - 0 - 8 - read-only - - - - - RXDOUBLEP - Receive Buffer Double Data Peek Register - 0x28 - 32 - read-only - 0x00000000 - 0x0000ffff - - - RXDATAP0 - RX Data 0 Peek - 0 - 8 - read-only - - - RXDATAP1 - RX Data 1 Peek - 8 - 8 - read-only - - - - - TXDATA - Transmit Buffer Data Register - 0x2c - 32 - read-write - 0x00000000 - 0x000000ff - - - TXDATA - TX Data - 0 - 8 - read-write - - - - - TXDOUBLE - Transmit Buffer Double Data Register - 0x30 - 32 - read-write - 0x00000000 - 0x0000ffff - - - TXDATA0 - TX Data - 0 - 8 - read-write - - - TXDATA1 - TX Data - 8 - 8 - read-write - - - - - IF - Interrupt Flag Register - 0x34 - 32 - read-only - 0x00000010 - 0x0007ffff - - - START - START condition Interrupt Flag - 0 - 1 - read-only - - - RSTART - Repeated START condition Interrupt Flag - 1 - 1 - read-only - - - ADDR - Address Interrupt Flag - 2 - 1 - read-only - - - TXC - Transfer Completed Interrupt Flag - 3 - 1 - read-only - - - TXBL - Transmit Buffer Level Interrupt Flag - 4 - 1 - read-only - - - RXDATAV - Receive Data Valid Interrupt Flag - 5 - 1 - read-only - - - ACK - Acknowledge Received Interrupt Flag - 6 - 1 - read-only - - - NACK - Not Acknowledge Received Interrupt Flag - 7 - 1 - read-only - - - MSTOP - Master STOP Condition Interrupt Flag - 8 - 1 - read-only - - - ARBLOST - Arbitration Lost Interrupt Flag - 9 - 1 - read-only - - - BUSERR - Bus Error Interrupt Flag - 10 - 1 - read-only - - - BUSHOLD - Bus Held Interrupt Flag - 11 - 1 - read-only - - - TXOF - Transmit Buffer Overflow Interrupt Flag - 12 - 1 - read-only - - - RXUF - Receive Buffer Underflow Interrupt Flag - 13 - 1 - read-only - - - BITO - Bus Idle Timeout Interrupt Flag - 14 - 1 - read-only - - - CLTO - Clock Low Timeout Interrupt Flag - 15 - 1 - read-only - - - SSTOP - Slave STOP condition Interrupt Flag - 16 - 1 - read-only - - - RXFULL - Receive Buffer Full Interrupt Flag - 17 - 1 - read-only - - - CLERR - Clock Low Error Interrupt Flag - 18 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x38 - 32 - write-only - 0x00000000 - 0x0007ffcf - - - START - Set START Interrupt Flag - 0 - 1 - write-only - - - RSTART - Set RSTART Interrupt Flag - 1 - 1 - write-only - - - ADDR - Set ADDR Interrupt Flag - 2 - 1 - write-only - - - TXC - Set TXC Interrupt Flag - 3 - 1 - write-only - - - ACK - Set ACK Interrupt Flag - 6 - 1 - write-only - - - NACK - Set NACK Interrupt Flag - 7 - 1 - write-only - - - MSTOP - Set MSTOP Interrupt Flag - 8 - 1 - write-only - - - ARBLOST - Set ARBLOST Interrupt Flag - 9 - 1 - write-only - - - BUSERR - Set BUSERR Interrupt Flag - 10 - 1 - write-only - - - BUSHOLD - Set BUSHOLD Interrupt Flag - 11 - 1 - write-only - - - TXOF - Set TXOF Interrupt Flag - 12 - 1 - write-only - - - RXUF - Set RXUF Interrupt Flag - 13 - 1 - write-only - - - BITO - Set BITO Interrupt Flag - 14 - 1 - write-only - - - CLTO - Set CLTO Interrupt Flag - 15 - 1 - write-only - - - SSTOP - Set SSTOP Interrupt Flag - 16 - 1 - write-only - - - RXFULL - Set RXFULL Interrupt Flag - 17 - 1 - write-only - - - CLERR - Set CLERR Interrupt Flag - 18 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x3c - 32 - write-only - 0x00000000 - 0x0007ffcf - - - START - Clear START Interrupt Flag - 0 - 1 - write-only - - - RSTART - Clear RSTART Interrupt Flag - 1 - 1 - write-only - - - ADDR - Clear ADDR Interrupt Flag - 2 - 1 - write-only - - - TXC - Clear TXC Interrupt Flag - 3 - 1 - write-only - - - ACK - Clear ACK Interrupt Flag - 6 - 1 - write-only - - - NACK - Clear NACK Interrupt Flag - 7 - 1 - write-only - - - MSTOP - Clear MSTOP Interrupt Flag - 8 - 1 - write-only - - - ARBLOST - Clear ARBLOST Interrupt Flag - 9 - 1 - write-only - - - BUSERR - Clear BUSERR Interrupt Flag - 10 - 1 - write-only - - - BUSHOLD - Clear BUSHOLD Interrupt Flag - 11 - 1 - write-only - - - TXOF - Clear TXOF Interrupt Flag - 12 - 1 - write-only - - - RXUF - Clear RXUF Interrupt Flag - 13 - 1 - write-only - - - BITO - Clear BITO Interrupt Flag - 14 - 1 - write-only - - - CLTO - Clear CLTO Interrupt Flag - 15 - 1 - write-only - - - SSTOP - Clear SSTOP Interrupt Flag - 16 - 1 - write-only - - - RXFULL - Clear RXFULL Interrupt Flag - 17 - 1 - write-only - - - CLERR - Clear CLERR Interrupt Flag - 18 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x40 - 32 - read-write - 0x00000000 - 0x0007ffff - - - START - START Interrupt Enable - 0 - 1 - read-write - - - RSTART - RSTART Interrupt Enable - 1 - 1 - read-write - - - ADDR - ADDR Interrupt Enable - 2 - 1 - read-write - - - TXC - TXC Interrupt Enable - 3 - 1 - read-write - - - TXBL - TXBL Interrupt Enable - 4 - 1 - read-write - - - RXDATAV - RXDATAV Interrupt Enable - 5 - 1 - read-write - - - ACK - ACK Interrupt Enable - 6 - 1 - read-write - - - NACK - NACK Interrupt Enable - 7 - 1 - read-write - - - MSTOP - MSTOP Interrupt Enable - 8 - 1 - read-write - - - ARBLOST - ARBLOST Interrupt Enable - 9 - 1 - read-write - - - BUSERR - BUSERR Interrupt Enable - 10 - 1 - read-write - - - BUSHOLD - BUSHOLD Interrupt Enable - 11 - 1 - read-write - - - TXOF - TXOF Interrupt Enable - 12 - 1 - read-write - - - RXUF - RXUF Interrupt Enable - 13 - 1 - read-write - - - BITO - BITO Interrupt Enable - 14 - 1 - read-write - - - CLTO - CLTO Interrupt Enable - 15 - 1 - read-write - - - SSTOP - SSTOP Interrupt Enable - 16 - 1 - read-write - - - RXFULL - RXFULL Interrupt Enable - 17 - 1 - read-write - - - CLERR - CLERR Interrupt Enable - 18 - 1 - read-write - - - - - ROUTEPEN - I/O Routing Pin Enable Register - 0x44 - 32 - read-write - 0x00000000 - 0x00000003 - - - SDAPEN - SDA Pin Enable - 0 - 1 - read-write - - - SCLPEN - SCL Pin Enable - 1 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x48 - 32 - read-write - 0x00000000 - 0x00003f3f - - - SDALOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - SCLLOC - I/O Location - 8 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - - - ADC0 - 1.6 - ADC0 - 0x40002000 - - 0 - 0x00000400 - registers - - - ADC0 - 14 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x001f0000 - 0x2f7f7fdf - - - WARMUPMODE - Warm-up Mode - 0 - 2 - read-write - - - NORMAL - ADC is shut down after each conversion. 5us warmup time needed before next conversion - 0x00000000 - - - KEEPINSTANDBY - ADC is kept in standby mode between conversion.1us warmup time needed before next conversion - 0x00000001 - - - KEEPINSLOWACC - ADC is kept in slow acquisition mode between conversions. 1us warmup time needed before next conversion - 0x00000002 - - - KEEPADCWARM - ADC is kept warmed up, allowing continuous conversion - 0x00000003 - - - - - SINGLEDMAWU - SINGLEFIFO DMA Wakeup - 2 - 1 - read-write - - - SCANDMAWU - SCANFIFO DMA Wakeup - 3 - 1 - read-write - - - TAILGATE - Conversion Tailgating - 4 - 1 - read-write - - - ASYNCCLKEN - Selects ASYNC CLK enable mode when ADCCLKMODE=1 - 6 - 1 - read-write - - - ADCCLKMODE - ADC Clock Mode - 7 - 1 - read-write - - - PRESC - Prescalar Setting for ADC Sample and Conversion clock - 8 - 7 - read-write - - - NODIVISION - "" - 0x00000000 - - - - - TIMEBASE - 1us Time Base - 16 - 7 - read-write - - - OVSRSEL - Oversample Rate Select - 24 - 4 - read-write - - - X2 - 2 samples for each conversion result - 0x00000000 - - - X4 - 4 samples for each conversion result - 0x00000001 - - - X8 - 8 samples for each conversion result - 0x00000002 - - - X16 - 16 samples for each conversion result - 0x00000003 - - - X32 - 32 samples for each conversion result - 0x00000004 - - - X64 - 64 samples for each conversion result - 0x00000005 - - - X128 - 128 samples for each conversion result - 0x00000006 - - - X256 - 256 samples for each conversion result - 0x00000007 - - - X512 - 512 samples for each conversion result - 0x00000008 - - - X1024 - 1024 samples for each conversion result - 0x00000009 - - - X2048 - 2048 samples for each conversion result - 0x0000000a - - - X4096 - 4096 samples for each conversion result - 0x0000000b - - - - - CHCONMODE - Channel Connect - 29 - 1 - read-write - - - - - CMD - Command Register - 0x8 - 32 - write-only - 0x00000000 - 0x0000000f - - - SINGLESTART - Single Conversion Start - 0 - 1 - write-only - - - SINGLESTOP - Single Conversion Stop - 1 - 1 - write-only - - - SCANSTART - Scan Sequence Start - 2 - 1 - write-only - - - SCANSTOP - Scan Sequence Stop - 3 - 1 - write-only - - - - - STATUS - Status Register - 0xc - 32 - read-only - 0x00000000 - 0x00031f03 - - - SINGLEACT - Single Conversion Active - 0 - 1 - read-only - - - SCANACT - Scan Conversion Active - 1 - 1 - read-only - - - SINGLEREFWARM - Single Reference Warmed Up - 8 - 1 - read-only - - - SCANREFWARM - Scan Reference Warmed Up - 9 - 1 - read-only - - - PROGERR - Programming Error Status - 10 - 2 - read-only - - - BUSCONF - "" - 0x00000001 - - - NEGSELCONF - "" - 0x00000002 - - - - - WARM - ADC Warmed Up - 12 - 1 - read-only - - - SINGLEDV - Single Channel Data Valid - 16 - 1 - read-only - - - SCANDV - Scan Data Valid - 17 - 1 - read-only - - - - - SINGLECTRL - Single Channel Control Register - 0x10 - 32 - read-write - 0x00ffff00 - 0xafffffff - - - REP - Single Channel Repetitive Mode - 0 - 1 - read-write - - - DIFF - Single Channel Differential Mode - 1 - 1 - read-write - - - ADJ - Single Channel Result Adjustment - 2 - 1 - read-write - - - RES - Single Channel Resolution Select - 3 - 2 - read-write - - - 12BIT - 12-bit resolution - 0x00000000 - - - 8BIT - 8-bit resolution - 0x00000001 - - - 6BIT - 6-bit resolution - 0x00000002 - - - OVS - Oversampling enabled. Oversampling rate is set in OVSRSEL - 0x00000003 - - - - - REF - Single Channel Reference Selection - 5 - 3 - read-write - - - 1V25 - VFS = 1.25V with internal VBGR reference - 0x00000000 - - - 2V5 - VFS = 2.5V with internal VBGR reference - 0x00000001 - - - VDD - VFS = AVDD with AVDD as reference source - 0x00000002 - - - 5VDIFF - VFS = 2.5V with internal differential reference - 0x00000003 - - - EXTSINGLE - Single ended external reference - 0x00000004 - - - 2XEXTDIFF - Differential external reference, 2x - 0x00000005 - - - 2XVDD - VFS=2xAVDD with AVDD as the reference source - 0x00000006 - - - CONF - Use SINGLECTRLX to configure reference - 0x00000007 - - - - - POSSEL - Single Channel Positive Input Selection - 8 - 8 - read-write - - - NEGSEL - Single Channel Negative Input Selection - 16 - 8 - read-write - - - AT - Single Channel Acquisition Time - 24 - 4 - read-write - - - 1CYCLE - 1 conversion clock cycle acquisition time for single channel - 0x00000000 - - - 2CYCLES - 2 conversion clock cycles acquisition time for single channel - 0x00000001 - - - 3CYCLES - 3 conversion clock cycles acquisition time for single channel - 0x00000002 - - - 4CYCLES - 4 conversion clock cycles acquisition time for single channel - 0x00000003 - - - 8CYCLES - 8 conversion clock cycles acquisition time for single channel - 0x00000004 - - - 16CYCLES - 16 conversion clock cycles acquisition time for single channel - 0x00000005 - - - 32CYCLES - 32 conversion clock cycles acquisition time for single channel - 0x00000006 - - - 64CYCLES - 64 conversion clock cycles acquisition time for single channel - 0x00000007 - - - 128CYCLES - 128 conversion clock cycles acquisition time for single channel - 0x00000008 - - - 256CYCLES - 256 conversion clock cycles acquisition time for single channel - 0x00000009 - - - - - PRSEN - Single Channel PRS Trigger Enable - 29 - 1 - read-write - - - CMPEN - Compare Logic Enable for Single Channel - 31 - 1 - read-write - - - - - SINGLECTRLX - Single Channel Control Register continued - 0x14 - 32 - read-write - 0x00000000 - 0x0f1f7fff - - - VREFSEL - Single Channel Reference Selection - 0 - 3 - read-write - - - VBGR - Internal 0.83V Bandgap reference - 0x00000000 - - - VDDXWATT - Scaled AVDD: AVDD*(the VREF attenuation factor) - 0x00000001 - - - VREFPWATT - Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) - 0x00000002 - - - VREFP - Raw single ended external Vref: ADCn_EXTP - 0x00000003 - - - VENTROPY - Special mode used to generate ENTROPY. - 0x00000004 - - - VREFPNWATT - Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) - 0x00000005 - - - VREFPN - Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) - 0x00000006 - - - VBGRLOW - Internal Bandgap reference at low setting 0.78V - 0x00000007 - - - - - VREFATTFIX - Enable 1/3 scaling on VREF - 3 - 1 - read-write - - - VREFATT - Code for VREF attenuation factor when VREFSEL is 1, 2 or 5 - 4 - 4 - read-write - - - VINATT - Code for VIN attenuation factor. - 8 - 4 - read-write - - - DVL - Single Channel DV Level Select - 12 - 2 - read-write - - - FIFOOFACT - Single Channel FIFO Overflow Action - 14 - 1 - read-write - - - PRSMODE - Single Channel PRS Trigger Mode - 16 - 1 - read-write - - - PRSSEL - Single Channel PRS Trigger Select - 17 - 4 - read-write - - - PRSCH0 - PRS ch 0 triggers single channel - 0x00000000 - - - PRSCH1 - PRS ch 1 triggers single channel - 0x00000001 - - - PRSCH2 - PRS ch 2 triggers single channel - 0x00000002 - - - PRSCH3 - PRS ch 3 triggers single channel - 0x00000003 - - - PRSCH4 - PRS ch 4 triggers single channel - 0x00000004 - - - PRSCH5 - PRS ch 5 triggers single channel - 0x00000005 - - - PRSCH6 - PRS ch 6 triggers single channel - 0x00000006 - - - PRSCH7 - PRS ch 7 triggers single channel - 0x00000007 - - - PRSCH8 - PRS ch 8 triggers single channel - 0x00000008 - - - PRSCH9 - PRS ch 9 triggers single channel - 0x00000009 - - - PRSCH10 - PRS ch 10 triggers single channel - 0x0000000a - - - PRSCH11 - PRS ch 11 triggers single channel - 0x0000000b - - - - - CONVSTARTDELAY - Delay value for next conversion start if CONVSTARTDELAYEN is set. - 24 - 3 - read-write - - - CONVSTARTDELAYEN - Enable delaying next conversion start - 27 - 1 - read-write - - - - - SCANCTRL - Scan Control Register - 0x18 - 32 - read-write - 0x00000000 - 0xaf0000ff - - - REP - Scan Sequence Repetitive Mode - 0 - 1 - read-write - - - DIFF - Scan Sequence Differential Mode - 1 - 1 - read-write - - - ADJ - Scan Sequence Result Adjustment - 2 - 1 - read-write - - - RES - Scan Sequence Resolution Select - 3 - 2 - read-write - - - 12BIT - 12-bit resolution - 0x00000000 - - - 8BIT - 8-bit resolution - 0x00000001 - - - 6BIT - 6-bit resolution - 0x00000002 - - - OVS - Oversampling enabled. Oversampling rate is set in OVSRSEL - 0x00000003 - - - - - REF - Scan Sequence Reference Selection - 5 - 3 - read-write - - - 1V25 - VFS = 1.25V with internal VBGR reference - 0x00000000 - - - 2V5 - VFS = 2.5V with internal VBGR reference - 0x00000001 - - - VDD - VFS = AVDD with AVDD as reference source - 0x00000002 - - - 5VDIFF - VFS = 2.5V with internal differential reference - 0x00000003 - - - EXTSINGLE - Single ended external reference - 0x00000004 - - - 2XEXTDIFF - Differential external reference, 2x - 0x00000005 - - - 2XVDD - VFS=2xAVDD with AVDD as the reference source - 0x00000006 - - - CONF - Use SCANCTRLX to configure reference - 0x00000007 - - - - - AT - Scan Acquisition Time - 24 - 4 - read-write - - - 1CYCLE - 1 conversion clock cycle acquisition time for scan - 0x00000000 - - - 2CYCLES - 2 conversion clock cycles acquisition time for scan - 0x00000001 - - - 3CYCLES - 3 conversion clock cycles acquisition time for scan - 0x00000002 - - - 4CYCLES - 4 conversion clock cycles acquisition time for scan - 0x00000003 - - - 8CYCLES - 8 conversion clock cycles acquisition time for scan - 0x00000004 - - - 16CYCLES - 16 conversion clock cycles acquisition time for scan - 0x00000005 - - - 32CYCLES - 32 conversion clock cycles acquisition time for scan - 0x00000006 - - - 64CYCLES - 64 conversion clock cycles acquisition time for scan - 0x00000007 - - - 128CYCLES - 128 conversion clock cycles acquisition time for scan - 0x00000008 - - - 256CYCLES - 256 conversion clock cycles acquisition time for scan - 0x00000009 - - - - - PRSEN - Scan Sequence PRS Trigger Enable - 29 - 1 - read-write - - - CMPEN - Compare Logic Enable for Scan - 31 - 1 - read-write - - - - - SCANCTRLX - Scan Control Register continued - 0x1c - 32 - read-write - 0x00000000 - 0x0f1f7fff - - - VREFSEL - Scan Channel Reference Selection - 0 - 3 - read-write - - - VBGR - Internal 0.83V Bandgap reference - 0x00000000 - - - VDDXWATT - Scaled AVDD: AVDD*(the VREF attenuation factor) - 0x00000001 - - - VREFPWATT - Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor) - 0x00000002 - - - VREFP - Raw single ended external Vref: ADCn_EXTP - 0x00000003 - - - VENTROPY - Special mode used to generate ENTROPY. - 0x00000004 - - - VREFPNWATT - Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor) - 0x00000005 - - - VREFPN - Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN) - 0x00000006 - - - VBGRLOW - Internal Bandgap reference at low setting 0.78V - 0x00000007 - - - - - VREFATTFIX - Enable fixed 1/3 scaling on VREF - 3 - 1 - read-write - - - VREFATT - Code for VREF attenuation factor when VREFSEL is 1, 2 or 5 - 4 - 4 - read-write - - - VINATT - Code for VIN attenuation factor. - 8 - 4 - read-write - - - DVL - Scan DV Level Select - 12 - 2 - read-write - - - FIFOOFACT - Scan FIFO Overflow Action - 14 - 1 - read-write - - - PRSMODE - Scan PRS Trigger Mode - 16 - 1 - read-write - - - PRSSEL - Scan Sequence PRS Trigger Select - 17 - 4 - read-write - - - PRSCH0 - PRS ch 0 triggers scan sequence - 0x00000000 - - - PRSCH1 - PRS ch 1 triggers scan sequence - 0x00000001 - - - PRSCH2 - PRS ch 2 triggers scan sequence - 0x00000002 - - - PRSCH3 - PRS ch 3 triggers scan sequence - 0x00000003 - - - PRSCH4 - PRS ch 4 triggers scan sequence - 0x00000004 - - - PRSCH5 - PRS ch 5 triggers scan sequence - 0x00000005 - - - PRSCH6 - PRS ch 6 triggers scan sequence - 0x00000006 - - - PRSCH7 - PRS ch 7 triggers scan sequence - 0x00000007 - - - PRSCH8 - PRS ch 8 triggers scan sequence - 0x00000008 - - - PRSCH9 - PRS ch 9 triggers scan sequence - 0x00000009 - - - PRSCH10 - PRS ch 10 triggers scan sequence - 0x0000000a - - - PRSCH11 - PRS ch 11 triggers scan sequence - 0x0000000b - - - - - CONVSTARTDELAY - Delay next conversion start if CONVSTARTDELAYEN is set. - 24 - 3 - read-write - - - CONVSTARTDELAYEN - Enable delaying next conversion start - 27 - 1 - read-write - - - - - SCANMASK - Scan Sequence Input Mask Register - 0x20 - 32 - read-write - 0x00000000 - 0xffffffff - - - SCANINPUTEN - Scan Sequence Input Mask - 0 - 32 - read-write - - - INPUT0INPUT0NEGSEL - "" - 0x00000001 - - - INPUT0 - "" - 0x00000001 - - - INPUT1 - "" - 0x00000002 - - - INPUT1INPUT2 - "" - 0x00000002 - - - INPUT2 - "" - 0x00000004 - - - INPUT2INPUT2NEGSEL - "" - 0x00000004 - - - INPUT3 - "" - 0x00000008 - - - INPUT3INPUT4 - "" - 0x00000008 - - - INPUT4 - "" - 0x00000010 - - - INPUT4INPUT4NEGSEL - "" - 0x00000010 - - - INPUT5INPUT6 - "" - 0x00000020 - - - INPUT5 - "" - 0x00000020 - - - INPUT6INPUT6NEGSEL - "" - 0x00000040 - - - INPUT6 - "" - 0x00000040 - - - INPUT7 - "" - 0x00000080 - - - INPUT7INPUT0 - "" - 0x00000080 - - - INPUT8INPUT9 - "" - 0x00000100 - - - INPUT8 - "" - 0x00000100 - - - INPUT9 - "" - 0x00000200 - - - INPUT9INPUT9NEGSEL - "" - 0x00000200 - - - INPUT10INPUT11 - "" - 0x00000400 - - - INPUT10 - "" - 0x00000400 - - - INPUT11INPUT11NEGSEL - "" - 0x00000800 - - - INPUT11 - "" - 0x00000800 - - - INPUT12INPUT13 - "" - 0x00001000 - - - INPUT12 - "" - 0x00001000 - - - INPUT13INPUT13NEGSEL - "" - 0x00002000 - - - INPUT13 - "" - 0x00002000 - - - INPUT14INPUT15 - "" - 0x00004000 - - - INPUT14 - "" - 0x00004000 - - - INPUT15INPUT15NEGSEL - "" - 0x00008000 - - - INPUT15 - "" - 0x00008000 - - - INPUT16INPUT17 - "" - 0x00010000 - - - INPUT16 - "" - 0x00010000 - - - INPUT17INPUT18 - "" - 0x00020000 - - - INPUT17 - "" - 0x00020000 - - - INPUT18INPUT19 - "" - 0x00040000 - - - INPUT18 - "" - 0x00040000 - - - INPUT19 - "" - 0x00080000 - - - INPUT19INPUT20 - "" - 0x00080000 - - - INPUT20INPUT21 - "" - 0x00100000 - - - INPUT20 - "" - 0x00100000 - - - INPUT21 - "" - 0x00200000 - - - INPUT21INPUT22 - "" - 0x00200000 - - - INPUT22INPUT23 - "" - 0x00400000 - - - INPUT22 - "" - 0x00400000 - - - INPUT23INPUT16 - "" - 0x00800000 - - - INPUT23 - "" - 0x00800000 - - - INPUT24 - "" - 0x01000000 - - - INPUT24INPUT25 - "" - 0x01000000 - - - INPUT25INPUT26 - "" - 0x02000000 - - - INPUT25 - "" - 0x02000000 - - - INPUT26 - "" - 0x04000000 - - - INPUT26INPUT27 - "" - 0x04000000 - - - INPUT27INPUT28 - "" - 0x08000000 - - - INPUT27 - "" - 0x08000000 - - - INPUT28INPUT29 - "" - 0x10000000 - - - INPUT28 - "" - 0x10000000 - - - INPUT29 - "" - 0x20000000 - - - INPUT29INPUT30 - "" - 0x20000000 - - - INPUT30 - "" - 0x40000000 - - - INPUT30INPUT31 - "" - 0x40000000 - - - INPUT31INPUT24 - "" - 0x80000000 - - - INPUT31 - "" - 0x80000000 - - - - - - - SCANINPUTSEL - Input Selection register for Scan mode - 0x24 - 32 - read-write - 0x00000000 - 0x1f1f1f1f - - - INPUT0TO7SEL - Inputs chosen for ADCn_INPUT7-ADCn_INPUT0 as referred in SCANMASK - 0 - 5 - read-write - - - APORT0CH0TO7 - "" - 0x00000000 - - - APORT0CH8TO15 - "" - 0x00000001 - - - APORT1CH0TO7 - "" - 0x00000004 - - - APORT1CH8TO15 - "" - 0x00000005 - - - APORT1CH16TO23 - "" - 0x00000006 - - - APORT1CH24TO31 - "" - 0x00000007 - - - APORT2CH0TO7 - "" - 0x00000008 - - - APORT2CH8TO15 - "" - 0x00000009 - - - APORT2CH16TO23 - "" - 0x0000000a - - - APORT2CH24TO31 - "" - 0x0000000b - - - APORT3CH0TO7 - "" - 0x0000000c - - - APORT3CH8TO15 - "" - 0x0000000d - - - APORT3CH16TO23 - "" - 0x0000000e - - - APORT3CH24TO31 - "" - 0x0000000f - - - APORT4CH0TO7 - "" - 0x00000010 - - - APORT4CH8TO15 - "" - 0x00000011 - - - APORT4CH16TO23 - "" - 0x00000012 - - - APORT4CH24TO31 - "" - 0x00000013 - - - - - INPUT8TO15SEL - Inputs chosen for ADCn_INPUT8-ADCn_INPUT15 as referred in SCANMASK - 8 - 5 - read-write - - - APORT0CH0TO7 - "" - 0x00000000 - - - APORT0CH8TO15 - "" - 0x00000001 - - - APORT1CH0TO7 - "" - 0x00000004 - - - APORT1CH8TO15 - "" - 0x00000005 - - - APORT1CH16TO23 - "" - 0x00000006 - - - APORT1CH24TO31 - "" - 0x00000007 - - - APORT2CH0TO7 - "" - 0x00000008 - - - APORT2CH8TO15 - "" - 0x00000009 - - - APORT2CH16TO23 - "" - 0x0000000a - - - APORT2CH24TO31 - "" - 0x0000000b - - - APORT3CH0TO7 - "" - 0x0000000c - - - APORT3CH8TO15 - "" - 0x0000000d - - - APORT3CH16TO23 - "" - 0x0000000e - - - APORT3CH24TO31 - "" - 0x0000000f - - - APORT4CH0TO7 - "" - 0x00000010 - - - APORT4CH8TO15 - "" - 0x00000011 - - - APORT4CH16TO23 - "" - 0x00000012 - - - APORT4CH24TO31 - "" - 0x00000013 - - - - - INPUT16TO23SEL - Inputs chosen for ADCn_INPUT16-ADCn_INPUT23 as referred in SCANMASK - 16 - 5 - read-write - - - APORT0CH0TO7 - "" - 0x00000000 - - - APORT0CH8TO15 - "" - 0x00000001 - - - APORT1CH0TO7 - "" - 0x00000004 - - - APORT1CH8TO15 - "" - 0x00000005 - - - APORT1CH16TO23 - "" - 0x00000006 - - - APORT1CH24TO31 - "" - 0x00000007 - - - APORT2CH0TO7 - "" - 0x00000008 - - - APORT2CH8TO15 - "" - 0x00000009 - - - APORT2CH16TO23 - "" - 0x0000000a - - - APORT2CH24TO31 - "" - 0x0000000b - - - APORT3CH0TO7 - "" - 0x0000000c - - - APORT3CH8TO15 - "" - 0x0000000d - - - APORT3CH16TO23 - "" - 0x0000000e - - - APORT3CH24TO31 - "" - 0x0000000f - - - APORT4CH0TO7 - "" - 0x00000010 - - - APORT4CH8TO15 - "" - 0x00000011 - - - APORT4CH16TO23 - "" - 0x00000012 - - - APORT4CH24TO31 - "" - 0x00000013 - - - - - INPUT24TO31SEL - Inputs chosen for ADCn_INPUT24-ADCn_INPUT31 as referred in SCANMASK - 24 - 5 - read-write - - - APORT0CH0TO7 - "" - 0x00000000 - - - APORT0CH8TO15 - "" - 0x00000001 - - - APORT1CH0TO7 - "" - 0x00000004 - - - APORT1CH8TO15 - "" - 0x00000005 - - - APORT1CH16TO23 - "" - 0x00000006 - - - APORT1CH24TO31 - "" - 0x00000007 - - - APORT2CH0TO7 - "" - 0x00000008 - - - APORT2CH8TO15 - "" - 0x00000009 - - - APORT2CH16TO23 - "" - 0x0000000a - - - APORT2CH24TO31 - "" - 0x0000000b - - - APORT3CH0TO7 - "" - 0x0000000c - - - APORT3CH8TO15 - "" - 0x0000000d - - - APORT3CH16TO23 - "" - 0x0000000e - - - APORT3CH24TO31 - "" - 0x0000000f - - - APORT4CH0TO7 - "" - 0x00000010 - - - APORT4CH8TO15 - "" - 0x00000011 - - - APORT4CH16TO23 - "" - 0x00000012 - - - APORT4CH24TO31 - "" - 0x00000013 - - - - - - - SCANNEGSEL - Negative Input select register for Scan - 0x28 - 32 - read-write - 0x000039e4 - 0x0000ffff - - - INPUT0NEGSEL - Negative Input select Register for ADCn_INPUT0 in Differential Scan mode - 0 - 2 - read-write - - - INPUT1 - Selects ADCn_INPUT1 as negative channel input - 0x00000000 - - - INPUT3 - Selects ADCn_INPUT3 as negative channel input - 0x00000001 - - - INPUT5 - Selects ADCn_INPUT5 as negative channel input - 0x00000002 - - - INPUT7 - Selects ADCn_INPUT7 as negative channel input - 0x00000003 - - - - - INPUT2NEGSEL - Negative Input select Register for ADCn_INPUT2 in Differential Scan mode - 2 - 2 - read-write - - - INPUT1 - Selects ADCn_INPUT1 as negative channel input - 0x00000000 - - - INPUT3 - Selects ADCn_INPUT3 as negative channel input - 0x00000001 - - - INPUT5 - Selects ADCn_INPUT5 as negative channel input - 0x00000002 - - - INPUT7 - Selects ADCn_INPUT7 as negative channel input - 0x00000003 - - - - - INPUT4NEGSEL - Negative Input select Register for ADCn_INPUT4 in Differential Scan mode - 4 - 2 - read-write - - - INPUT1 - Selects ADCn_INPUT1 as negative channel input - 0x00000000 - - - INPUT3 - Selects ADCn_INPUT3 as negative channel input - 0x00000001 - - - INPUT5 - Selects ADCn_INPUT5 as negative channel input - 0x00000002 - - - INPUT7 - Selects ADCn_INPUT7 as negative channel input - 0x00000003 - - - - - INPUT6NEGSEL - Negative Input select Register for ADCn_INPUT1 in Differential Scan mode - 6 - 2 - read-write - - - INPUT1 - Selects ADCn_INPUT1 as negative channel input - 0x00000000 - - - INPUT3 - Selects ADCn_INPUT3 as negative channel input - 0x00000001 - - - INPUT5 - Selects ADCn_INPUT5 as negative channel input - 0x00000002 - - - INPUT7 - Selects ADCn_INPUT7 as negative channel input - 0x00000003 - - - - - INPUT9NEGSEL - Negative Input select Register for ADCn_INPUT9 in Differential Scan mode - 8 - 2 - read-write - - - INPUT8 - Selects ADCn_INPUT8 as negative channel input - 0x00000000 - - - INPUT10 - Selects ADCn_INPUT10 as negative channel input - 0x00000001 - - - INPUT12 - Selects ADCn_INPUT12 as negative channel input - 0x00000002 - - - INPUT14 - Selects ADCn_INPUT14 as negative channel input - 0x00000003 - - - - - INPUT11NEGSEL - Negative Input select Register for ADCn_INPUT11 in Differential Scan mode - 10 - 2 - read-write - - - INPUT8 - Selects ADCn_INPUT8 as negative channel input - 0x00000000 - - - INPUT10 - Selects ADCn_INPUT10 as negative channel input - 0x00000001 - - - INPUT12 - Selects ADCn_INPUT12 as negative channel input - 0x00000002 - - - INPUT14 - Selects ADCn_INPUT14 as negative channel input - 0x00000003 - - - - - INPUT13NEGSEL - Negative Input select Register for ADCn_INPUT13 in Differential Scan mode - 12 - 2 - read-write - - - INPUT8 - Selects ADCn_INPUT8 as negative channel input - 0x00000000 - - - INPUT10 - Selects ADCn_INPUT10 as negative channel input - 0x00000001 - - - INPUT12 - Selects ADCn_INPUT12 as negative channel input - 0x00000002 - - - INPUT14 - Selects ADCn_INPUT14 as negative channel input - 0x00000003 - - - - - INPUT15NEGSEL - Negative Input select Register for ADCn_INPUT15 in Differential Scan mode - 14 - 2 - read-write - - - INPUT8 - Selects ADCn_INPUT8 as negative channel input - 0x00000000 - - - INPUT10 - Selects ADCn_INPUT10 as negative channel input - 0x00000001 - - - INPUT12 - Selects ADCn_INPUT12 as negative channel input - 0x00000002 - - - INPUT14 - Selects ADCn_INPUT14 as negative channel input - 0x00000003 - - - - - - - CMPTHR - Compare Threshold Register - 0x2c - 32 - read-write - 0x00000000 - 0xffffffff - - - ADLT - Less Than Compare Threshold - 0 - 16 - read-write - - - ADGT - Greater Than Compare Threshold - 16 - 16 - read-write - - - - - BIASPROG - Bias Programming Register for various analog blocks used in ADC operation - 0x30 - 32 - read-write - 0x00000000 - 0x0000100f - - - ADCBIASPROG - Bias Programming Value of analog ADC block - 0 - 4 - read-write - - - NORMAL - Normal power for 1Msps operation - 0x00000000 - - - SCALE2 - Scaling bias to 1/2 - 0x00000004 - - - SCALE4 - Scaling bias to 1/4 - 0x00000008 - - - SCALE8 - Scaling bias to 1/8 - 0x0000000c - - - SCALE16 - Scaling bias to 1/16 - 0x0000000e - - - SCALE32 - Scaling bias to 1/32 - 0x0000000f - - - - - VFAULTCLR - Set Vfault_clr flag - 12 - 1 - read-write - - - - - CAL - Calibration Register - 0x34 - 32 - read-write - 0x40784078 - 0xffffffff - - - SINGLEOFFSET - Single Mode Offset Calibration Value for differential or positive single-ended mode - 0 - 4 - read-write - - - SINGLEOFFSETINV - Single Mode Offset Calibration Value for negative single-ended mode - 4 - 4 - read-write - - - SINGLEGAIN - Single Mode Gain Calibration Value - 8 - 7 - read-write - - - OFFSETINVMODE - Negative single-ended offset calibration is enabled - 15 - 1 - read-write - - - SCANOFFSET - Scan Mode Offset Calibration Value for differential or positive single-ended mode - 16 - 4 - read-write - - - SCANOFFSETINV - Scan Mode Offset Calibration Value for negative single-ended mode - 20 - 4 - read-write - - - SCANGAIN - Scan Mode Gain Calibration Value - 24 - 7 - read-write - - - CALEN - Calibration mode is enabled - 31 - 1 - read-write - - - - - IF - Interrupt Flag Register - 0x38 - 32 - read-only - 0x00000000 - 0x03030f03 - - - SINGLE - Single Conversion Complete Interrupt Flag - 0 - 1 - read-only - - - SCAN - Scan Conversion Complete Interrupt Flag - 1 - 1 - read-only - - - SINGLEOF - Single Result Overflow Interrupt Flag - 8 - 1 - read-only - - - SCANOF - Scan Result Overflow Interrupt Flag - 9 - 1 - read-only - - - SINGLEUF - Single Result Underflow Interrupt Flag - 10 - 1 - read-only - - - SCANUF - Scan Result Underflow Interrupt Flag - 11 - 1 - read-only - - - SINGLECMP - Single Result Compare Match Interrupt Flag - 16 - 1 - read-only - - - SCANCMP - Scan Result Compare Match Interrupt Flag - 17 - 1 - read-only - - - VREFOV - VREF OverVoltage Interrupt Flag - 24 - 1 - read-only - - - PROGERR - Programming Error Interrupt Flag - 25 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x3c - 32 - write-only - 0x00000000 - 0x03030f00 - - - SINGLEOF - Set SINGLEOF Interrupt Flag - 8 - 1 - write-only - - - SCANOF - Set SCANOF Interrupt Flag - 9 - 1 - write-only - - - SINGLEUF - Set SINGLEUF Interrupt Flag - 10 - 1 - write-only - - - SCANUF - Set SCANUF Interrupt Flag - 11 - 1 - write-only - - - SINGLECMP - Set SINGLECMP Interrupt Flag - 16 - 1 - write-only - - - SCANCMP - Set SCANCMP Interrupt Flag - 17 - 1 - write-only - - - VREFOV - Set VREFOV Interrupt Flag - 24 - 1 - write-only - - - PROGERR - Set PROGERR Interrupt Flag - 25 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x40 - 32 - write-only - 0x00000000 - 0x03030f00 - - - SINGLEOF - Clear SINGLEOF Interrupt Flag - 8 - 1 - write-only - - - SCANOF - Clear SCANOF Interrupt Flag - 9 - 1 - write-only - - - SINGLEUF - Clear SINGLEUF Interrupt Flag - 10 - 1 - write-only - - - SCANUF - Clear SCANUF Interrupt Flag - 11 - 1 - write-only - - - SINGLECMP - Clear SINGLECMP Interrupt Flag - 16 - 1 - write-only - - - SCANCMP - Clear SCANCMP Interrupt Flag - 17 - 1 - write-only - - - VREFOV - Clear VREFOV Interrupt Flag - 24 - 1 - write-only - - - PROGERR - Clear PROGERR Interrupt Flag - 25 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x44 - 32 - read-write - 0x00000000 - 0x03030f03 - - - SINGLE - SINGLE Interrupt Enable - 0 - 1 - read-write - - - SCAN - SCAN Interrupt Enable - 1 - 1 - read-write - - - SINGLEOF - SINGLEOF Interrupt Enable - 8 - 1 - read-write - - - SCANOF - SCANOF Interrupt Enable - 9 - 1 - read-write - - - SINGLEUF - SINGLEUF Interrupt Enable - 10 - 1 - read-write - - - SCANUF - SCANUF Interrupt Enable - 11 - 1 - read-write - - - SINGLECMP - SINGLECMP Interrupt Enable - 16 - 1 - read-write - - - SCANCMP - SCANCMP Interrupt Enable - 17 - 1 - read-write - - - VREFOV - VREFOV Interrupt Enable - 24 - 1 - read-write - - - PROGERR - PROGERR Interrupt Enable - 25 - 1 - read-write - - - - - SINGLEDATA - Single Conversion Result Data - 0x48 - 32 - read-only - 0x00000000 - 0xffffffff - modifyExternal - - - DATA - Single Conversion Result Data - 0 - 32 - read-only - - - - - SCANDATA - Scan Conversion Result Data - 0x4c - 32 - read-only - 0x00000000 - 0xffffffff - - - DATA - Scan Conversion Result Data - 0 - 32 - read-only - - - - - SINGLEDATAP - Single Conversion Result Data Peek Register - 0x50 - 32 - read-only - 0x00000000 - 0xffffffff - modifyExternal - - - DATAP - Single Conversion Result Data Peek - 0 - 32 - read-only - - - - - SCANDATAP - Scan Sequence Result Data Peek Register - 0x54 - 32 - read-only - 0x00000000 - 0xffffffff - - - DATAP - Scan Conversion Result Data Peek - 0 - 32 - read-only - - - - - SCANDATAX - Scan Sequence Result Data + Data Source Register - 0x68 - 32 - read-only - 0x00000000 - 0x001fffff - - - DATA - Scan Conversion Result Data - 0 - 16 - read-only - - - SCANINPUTID - Scan Conversion Input ID - 16 - 5 - read-only - - - - - SCANDATAXP - Scan Sequence Result Data + Data Source Peek Register - 0x6c - 32 - read-only - 0x00000000 - 0x001fffff - - - DATAP - Scan Conversion Result Data Peek - 0 - 16 - read-only - - - SCANINPUTIDPEEK - Scan Conversion Data Source Peek - 16 - 5 - read-only - - - - - APORTREQ - APORT Request Status Register - 0x7c - 32 - read-only - 0x00000000 - 0x000003ff - - - APORT0XREQ - 1 if the bus connected to APORT0X is requested - 0 - 1 - read-only - - - APORT0YREQ - 1 if the bus connected to APORT0Y is requested - 1 - 1 - read-only - - - APORT1XREQ - 1 if the bus connected to APORT1X is requested - 2 - 1 - read-only - - - APORT1YREQ - 1 if the bus connected to APORT1Y is requested - 3 - 1 - read-only - - - APORT2XREQ - 1 if the bus connected to APORT2X is requested - 4 - 1 - read-only - - - APORT2YREQ - 1 if the bus connected to APORT2Y is requested - 5 - 1 - read-only - - - APORT3XREQ - 1 if the bus connected to APORT3X is requested - 6 - 1 - read-only - - - APORT3YREQ - 1 if the bus connected to APORT3Y is requested - 7 - 1 - read-only - - - APORT4XREQ - 1 if the bus connected to APORT4X is requested - 8 - 1 - read-only - - - APORT4YREQ - 1 if the bus connected to APORT4Y is requested - 9 - 1 - read-only - - - - - APORTCONFLICT - APORT BUS Request Status Register - 0x80 - 32 - read-only - 0x00000000 - 0x000003ff - - - APORT0XCONFLICT - 1 if the bus connected to APORT0X is in conflict with another peripheral - 0 - 1 - read-only - - - APORT0YCONFLICT - 1 if the bus connected to APORT0Y is in conflict with another peripheral - 1 - 1 - read-only - - - APORT1XCONFLICT - 1 if the bus connected to APORT1X is in conflict with another peripheral - 2 - 1 - read-only - - - APORT1YCONFLICT - 1 if the bus connected to APORT1Y is in conflict with another peripheral - 3 - 1 - read-only - - - APORT2XCONFLICT - 1 if the bus connected to APORT2X is in conflict with another peripheral - 4 - 1 - read-only - - - APORT2YCONFLICT - 1 if the bus connected to APORT2Y is in conflict with another peripheral - 5 - 1 - read-only - - - APORT3XCONFLICT - 1 if the bus connected to APORT3X is in conflict with another peripheral - 6 - 1 - read-only - - - APORT3YCONFLICT - 1 if the bus connected to APORT3Y is in conflict with another peripheral - 7 - 1 - read-only - - - APORT4XCONFLICT - 1 if the bus connected to APORT4X is in conflict with another peripheral - 8 - 1 - read-only - - - APORT4YCONFLICT - 1 if the bus connected to APORT4Y is in conflict with another peripheral - 9 - 1 - read-only - - - - - SINGLEFIFOCOUNT - Single FIFO Count Register - 0x84 - 32 - read-only - 0x00000000 - 0x00000007 - - - SINGLEDC - Single Data count - 0 - 3 - read-only - - - - - SCANFIFOCOUNT - Scan FIFO Count Register - 0x88 - 32 - read-only - 0x00000000 - 0x00000007 - - - SCANDC - Scan Data count - 0 - 3 - read-only - - - - - SINGLEFIFOCLEAR - Single FIFO Clear Register - 0x8c - 32 - write-only - 0x00000000 - 0x00000001 - - - SINGLEFIFOCLEAR - Clear Single FIFO content - 0 - 1 - write-only - - - - - SCANFIFOCLEAR - Scan FIFO Clear Register - 0x90 - 32 - write-only - 0x00000000 - 0x00000001 - - - SCANFIFOCLEAR - Clear Scan FIFO content - 0 - 1 - write-only - - - - - APORTMASTERDIS - APORT Bus Master Disable Register - 0x94 - 32 - read-write - 0x00000000 - 0x000003fc - - - APORT1XMASTERDIS - APORT1X Master Disable - 2 - 1 - read-write - - - APORT1YMASTERDIS - APORT1Y Master Disable - 3 - 1 - read-write - - - APORT2XMASTERDIS - APORT2X Master Disable - 4 - 1 - read-write - - - APORT2YMASTERDIS - APORT2Y Master Disable - 5 - 1 - read-write - - - APORT3XMASTERDIS - APORT3X Master Disable - 6 - 1 - read-write - - - APORT3YMASTERDIS - APORT3Y Master Disable - 7 - 1 - read-write - - - APORT4XMASTERDIS - APORT4X Master Disable - 8 - 1 - read-write - - - APORT4YMASTERDIS - APORT4Y Master Disable - 9 - 1 - read-write - - - - - - - ACMP0 - 1.6 - ACMP0 - 0x40000000 - - 0 - 0x00000400 - registers - - - ACMP0 - 13 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x07000000 - 0xbf3cf70d - - - EN - Analog Comparator Enable - 0 - 1 - read-write - - - INACTVAL - Inactive Value - 2 - 1 - read-write - - - GPIOINV - Comparator GPIO Output Invert - 3 - 1 - read-write - - - APORTXMASTERDIS - APORT Bus X Master Disable - 8 - 1 - read-write - - - APORTYMASTERDIS - APORT Bus Y Master Disable - 9 - 1 - read-write - - - APORTVMASTERDIS - APORT Bus Master Disable for Bus selected by VASEL - 10 - 1 - read-write - - - PWRSEL - Power Select - 12 - 3 - read-write - - - AVDD - AVDD supply - 0x00000000 - - - VREGVDD - VREGVDD supply - 0x00000001 - - - IOVDD0 - IOVDD/IOVDD0 supply - 0x00000002 - - - IOVDD1 - IOVDD1 supply (if part has two I/O voltages) - 0x00000004 - - - - - ACCURACY - ACMP accuracy mode - 15 - 1 - read-write - - - INPUTRANGE - Input Range - 18 - 2 - read-write - - - FULL - Setting when the input can be from 0 to VDD. - 0x00000000 - - - GTVDDDIV2 - Setting when the input will always be greater than VDD/2. - 0x00000001 - - - LTVDDDIV2 - Setting when the input will always be less than VDD/2. - 0x00000002 - - - - - IRISE - Rising Edge Interrupt Sense - 20 - 1 - read-write - - - IFALL - Falling Edge Interrupt Sense - 21 - 1 - read-write - - - BIASPROG - Bias Configuration - 24 - 6 - read-write - - - FULLBIAS - Full Bias Current - 31 - 1 - read-write - - - - - INPUTSEL - Input Selection Register - 0x4 - 32 - read-write - 0x00000000 - 0x757fffff - - - POSSEL - Positive Input Select - 0 - 8 - read-write - - - NEGSEL - Negative Input Select - 8 - 8 - read-write - - - VASEL - VA Selection - 16 - 6 - read-write - - - VDD - VDD - 0x00000000 - - - APORT2YCH0 - APORT2Y Channel 0 - 0x00000001 - - - APORT2YCH2 - APORT2Y Channel 2 - 0x00000003 - - - APORT2YCH4 - APORT2Y Channel 4 - 0x00000005 - - - APORT2YCH6 - APORT2Y Channel 6 - 0x00000007 - - - APORT2YCH8 - APORT2Y Channel 8 - 0x00000009 - - - APORT2YCH10 - APORT2Y Channel 10 - 0x0000000b - - - APORT2YCH12 - APORT2Y Channel 12 - 0x0000000d - - - APORT2YCH14 - APORT2Y Channel 14 - 0x0000000f - - - APORT2YCH16 - APORT2Y Channel 16 - 0x00000011 - - - APORT2YCH18 - APORT2Y Channel 18 - 0x00000013 - - - APORT2YCH20 - APORT2Y Channel 20 - 0x00000015 - - - APORT2YCH22 - APORT2Y Channel 22 - 0x00000017 - - - APORT2YCH24 - APORT2Y Channel 24 - 0x00000019 - - - APORT2YCH26 - APORT2Y Channel 26 - 0x0000001b - - - APORT2YCH28 - APORT2Y Channel 28 - 0x0000001d - - - APORT2YCH30 - APORT2Y Channel 30 - 0x0000001f - - - APORT1XCH0 - APORT1X Channel 0 - 0x00000020 - - - APORT1YCH1 - APORT1Y Channel 1 - 0x00000021 - - - APORT1XCH2 - APORT1X Channel 2 - 0x00000022 - - - APORT1YCH3 - APORT1Y Channel 3 - 0x00000023 - - - APORT1XCH4 - APORT1X Channel 4 - 0x00000024 - - - APORT1YCH5 - APORT1Y Channel 5 - 0x00000025 - - - APORT1XCH6 - APORT1X Channel 6 - 0x00000026 - - - APORT1YCH7 - APORT1Y Channel 7 - 0x00000027 - - - APORT1XCH8 - APORT1X Channel 8 - 0x00000028 - - - APORT1YCH9 - APORT1Y Channel 9 - 0x00000029 - - - APORT1XCH10 - APORT1X Channel 10 - 0x0000002a - - - APORT1YCH11 - APORT1Y Channel 11 - 0x0000002b - - - APORT1XCH12 - APORT1X Channel 12 - 0x0000002c - - - APORT1YCH13 - APORT1Y Channel 13 - 0x0000002d - - - APORT1XCH14 - APORT1X Channel 14 - 0x0000002e - - - APORT1YCH15 - APORT1Y Channel 15 - 0x0000002f - - - APORT1XCH16 - APORT1X Channel 16 - 0x00000030 - - - APORT1YCH17 - APORT1Y Channel 17 - 0x00000031 - - - APORT1XCH18 - APORT1X Channel 18 - 0x00000032 - - - APORT1YCH19 - APORT1Y Channel 19 - 0x00000033 - - - APORT1XCH20 - APORT1X Channel 20 - 0x00000034 - - - APORT1YCH21 - APORT1Y Channel 21 - 0x00000035 - - - APORT1XCH22 - APORT1X Channel 22 - 0x00000036 - - - APORT1YCH23 - APORT1Y Channel 23 - 0x00000037 - - - APORT1XCH24 - APORT1X Channel 24 - 0x00000038 - - - APORT1YCH25 - APORT1Y Channel 25 - 0x00000039 - - - APORT1XCH26 - APORT1X Channel 26 - 0x0000003a - - - APORT1YCH27 - APORT1Y Channel 27 - 0x0000003b - - - APORT1XCH28 - APORT1X Channel 28 - 0x0000003c - - - APORT1YCH29 - APORT1Y Channel 29 - 0x0000003d - - - APORT1XCH30 - APORT1X Channel 30 - 0x0000003e - - - APORT1YCH31 - APORT1Y Channel 31 - 0x0000003f - - - - - VBSEL - VB Selection - 22 - 1 - read-write - - - VLPSEL - Low-Power Sampled Voltage Selection - 24 - 1 - read-write - - - CSRESEN - Capacitive Sense Mode Internal Resistor Enable - 26 - 1 - read-write - - - CSRESSEL - Capacitive Sense Mode Internal Resistor Select - 28 - 3 - read-write - - - RES0 - Internal capacitive sense resistor value 0 - 0x00000000 - - - RES1 - Internal capacitive sense resistor value 1 - 0x00000001 - - - RES2 - Internal capacitive sense resistor value 2 - 0x00000002 - - - RES3 - Internal capacitive sense resistor value 3 - 0x00000003 - - - RES4 - Internal capacitive sense resistor value 4 - 0x00000004 - - - RES5 - Internal capacitive sense resistor value 5 - 0x00000005 - - - RES6 - Internal capacitive sense resistor value 6 - 0x00000006 - - - RES7 - Internal capacitive sense resistor value 7 - 0x00000007 - - - - - - - STATUS - Status Register - 0x8 - 32 - read-only - 0x00000000 - 0x00000007 - - - ACMPACT - Analog Comparator Active - 0 - 1 - read-only - - - ACMPOUT - Analog Comparator Output - 1 - 1 - read-only - - - APORTCONFLICT - APORT Conflict Output - 2 - 1 - read-only - - - - - IF - Interrupt Flag Register - 0xc - 32 - read-only - 0x00000000 - 0x00000007 - - - EDGE - Edge Triggered Interrupt Flag - 0 - 1 - read-only - - - WARMUP - Warm-up Interrupt Flag - 1 - 1 - read-only - - - APORTCONFLICT - APORT Conflict Interrupt Flag - 2 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x10 - 32 - write-only - 0x00000000 - 0x00000007 - - - EDGE - Set EDGE Interrupt Flag - 0 - 1 - write-only - - - WARMUP - Set WARMUP Interrupt Flag - 1 - 1 - write-only - - - APORTCONFLICT - Set APORTCONFLICT Interrupt Flag - 2 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x14 - 32 - write-only - 0x00000000 - 0x00000007 - - - EDGE - Clear EDGE Interrupt Flag - 0 - 1 - write-only - - - WARMUP - Clear WARMUP Interrupt Flag - 1 - 1 - write-only - - - APORTCONFLICT - Clear APORTCONFLICT Interrupt Flag - 2 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x18 - 32 - read-write - 0x00000000 - 0x00000007 - - - EDGE - EDGE Interrupt Enable - 0 - 1 - read-write - - - WARMUP - WARMUP Interrupt Enable - 1 - 1 - read-write - - - APORTCONFLICT - APORTCONFLICT Interrupt Enable - 2 - 1 - read-write - - - - - APORTREQ - APORT Request Status Register - 0x20 - 32 - read-only - 0x00000000 - 0x000003ff - - - APORT0XREQ - 1 if the bus connected to APORT0X is requested - 0 - 1 - read-only - - - APORT0YREQ - 1 if the bus connected to APORT0Y is requested - 1 - 1 - read-only - - - APORT1XREQ - 1 if the bus connected to APORT2X is requested - 2 - 1 - read-only - - - APORT1YREQ - 1 if the bus connected to APORT1X is requested - 3 - 1 - read-only - - - APORT2XREQ - 1 if the bus connected to APORT2X is requested - 4 - 1 - read-only - - - APORT2YREQ - 1 if the bus connected to APORT2Y is requested - 5 - 1 - read-only - - - APORT3XREQ - 1 if the bus connected to APORT3X is requested - 6 - 1 - read-only - - - APORT3YREQ - 1 if the bus connected to APORT3Y is requested - 7 - 1 - read-only - - - APORT4XREQ - 1 if the bus connected to APORT4X is requested - 8 - 1 - read-only - - - APORT4YREQ - 1 if the bus connected to APORT4Y is requested - 9 - 1 - read-only - - - - - APORTCONFLICT - APORT Request Status Register - 0x24 - 32 - read-only - 0x00000000 - 0x000003ff - - - APORT0XCONFLICT - 1 if the bus connected to APORT0X is in conflict with another peripheral - 0 - 1 - read-only - - - APORT0YCONFLICT - 1 if the bus connected to APORT0Y is in conflict with another peripheral - 1 - 1 - read-only - - - APORT1XCONFLICT - 1 if the bus connected to APORT1X is in conflict with another peripheral - 2 - 1 - read-only - - - APORT1YCONFLICT - 1 if the bus connected to APORT1X is in conflict with another peripheral - 3 - 1 - read-only - - - APORT2XCONFLICT - 1 if the bus connected to APORT2X is in conflict with another peripheral - 4 - 1 - read-only - - - APORT2YCONFLICT - 1 if the bus connected to APORT2Y is in conflict with another peripheral - 5 - 1 - read-only - - - APORT3XCONFLICT - 1 if the bus connected to APORT3X is in conflict with another peripheral - 6 - 1 - read-only - - - APORT3YCONFLICT - 1 if the bus connected to APORT3Y is in conflict with another peripheral - 7 - 1 - read-only - - - APORT4XCONFLICT - 1 if the bus connected to APORT4X is in conflict with another peripheral - 8 - 1 - read-only - - - APORT4YCONFLICT - 1 if the bus connected to APORT4Y is in conflict with another peripheral - 9 - 1 - read-only - - - - - HYSTERESIS0 - Hysteresis 0 Register - 0x28 - 32 - read-write - 0x00000000 - 0x3f3f000f - - - HYST - Hysteresis Select when ACMPOUT=0 - 0 - 4 - read-write - - - HYST0 - No hysteresis - 0x00000000 - - - HYST1 - 14 mV hysteresis - 0x00000001 - - - HYST2 - 25 mV hysteresis - 0x00000002 - - - HYST3 - 30 mV hysteresis - 0x00000003 - - - HYST4 - 35 mV hysteresis - 0x00000004 - - - HYST5 - 39 mV hysteresis - 0x00000005 - - - HYST6 - 42 mV hysteresis - 0x00000006 - - - HYST7 - 45 mV hysteresis - 0x00000007 - - - HYST8 - No hysteresis - 0x00000008 - - - HYST9 - -14 mV hysteresis - 0x00000009 - - - HYST10 - -25 mV hysteresis - 0x0000000a - - - HYST11 - -30 mV hysteresis - 0x0000000b - - - HYST12 - -35 mV hysteresis - 0x0000000c - - - HYST13 - -39 mV hysteresis - 0x0000000d - - - HYST14 - -42 mV hysteresis - 0x0000000e - - - HYST15 - -45 mV hysteresis - 0x0000000f - - - - - DIVVA - Divider for VA Voltage when ACMPOUT=0 - 16 - 6 - read-write - - - DIVVB - Divider for VB Voltage when ACMPOUT=0 - 24 - 6 - read-write - - - - - HYSTERESIS1 - Hysteresis 1 Register - 0x2c - 32 - read-write - 0x00000000 - 0x3f3f000f - - - HYST - Hysteresis Select when ACMPOUT=1 - 0 - 4 - read-write - - - HYST0 - No hysteresis - 0x00000000 - - - HYST1 - 14 mV hysteresis - 0x00000001 - - - HYST2 - 25 mV hysteresis - 0x00000002 - - - HYST3 - 30 mV hysteresis - 0x00000003 - - - HYST4 - 35 mV hysteresis - 0x00000004 - - - HYST5 - 39 mV hysteresis - 0x00000005 - - - HYST6 - 42 mV hysteresis - 0x00000006 - - - HYST7 - 45 mV hysteresis - 0x00000007 - - - HYST8 - No hysteresis - 0x00000008 - - - HYST9 - -14 mV hysteresis - 0x00000009 - - - HYST10 - -25 mV hysteresis - 0x0000000a - - - HYST11 - -30 mV hysteresis - 0x0000000b - - - HYST12 - -35 mV hysteresis - 0x0000000c - - - HYST13 - -39 mV hysteresis - 0x0000000d - - - HYST14 - -42 mV hysteresis - 0x0000000e - - - HYST15 - -45 mV hysteresis - 0x0000000f - - - - - DIVVA - Divider for VA Voltage when ACMPOUT=1 - 16 - 6 - read-write - - - DIVVB - Divider for VB Voltage when ACMPOUT=1 - 24 - 6 - read-write - - - - - ROUTEPEN - I/O Routing Pine Enable Register - 0x40 - 32 - read-write - 0x00000000 - 0x00000001 - - - OUTPEN - ACMP Output Pin Enable - 0 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x44 - 32 - read-write - 0x00000000 - 0x0000003f - - - OUTLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - - - ACMP1 - 1.6 - ACMP1 - 0x40000400 - - 0 - 0x00000400 - registers - - - ACMP0 - 13 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x07000000 - 0xbf3cf70d - - - EN - Analog Comparator Enable - 0 - 1 - read-write - - - INACTVAL - Inactive Value - 2 - 1 - read-write - - - GPIOINV - Comparator GPIO Output Invert - 3 - 1 - read-write - - - APORTXMASTERDIS - APORT Bus X Master Disable - 8 - 1 - read-write - - - APORTYMASTERDIS - APORT Bus Y Master Disable - 9 - 1 - read-write - - - APORTVMASTERDIS - APORT Bus Master Disable for Bus selected by VASEL - 10 - 1 - read-write - - - PWRSEL - Power Select - 12 - 3 - read-write - - - AVDD - AVDD supply - 0x00000000 - - - VREGVDD - VREGVDD supply - 0x00000001 - - - IOVDD0 - IOVDD/IOVDD0 supply - 0x00000002 - - - IOVDD1 - IOVDD1 supply (if part has two I/O voltages) - 0x00000004 - - - - - ACCURACY - ACMP accuracy mode - 15 - 1 - read-write - - - INPUTRANGE - Input Range - 18 - 2 - read-write - - - FULL - Setting when the input can be from 0 to VDD. - 0x00000000 - - - GTVDDDIV2 - Setting when the input will always be greater than VDD/2. - 0x00000001 - - - LTVDDDIV2 - Setting when the input will always be less than VDD/2. - 0x00000002 - - - - - IRISE - Rising Edge Interrupt Sense - 20 - 1 - read-write - - - IFALL - Falling Edge Interrupt Sense - 21 - 1 - read-write - - - BIASPROG - Bias Configuration - 24 - 6 - read-write - - - FULLBIAS - Full Bias Current - 31 - 1 - read-write - - - - - INPUTSEL - Input Selection Register - 0x4 - 32 - read-write - 0x00000000 - 0x757fffff - - - POSSEL - Positive Input Select - 0 - 8 - read-write - - - NEGSEL - Negative Input Select - 8 - 8 - read-write - - - VASEL - VA Selection - 16 - 6 - read-write - - - VDD - VDD - 0x00000000 - - - APORT2YCH0 - APORT2Y Channel 0 - 0x00000001 - - - APORT2YCH2 - APORT2Y Channel 2 - 0x00000003 - - - APORT2YCH4 - APORT2Y Channel 4 - 0x00000005 - - - APORT2YCH6 - APORT2Y Channel 6 - 0x00000007 - - - APORT2YCH8 - APORT2Y Channel 8 - 0x00000009 - - - APORT2YCH10 - APORT2Y Channel 10 - 0x0000000b - - - APORT2YCH12 - APORT2Y Channel 12 - 0x0000000d - - - APORT2YCH14 - APORT2Y Channel 14 - 0x0000000f - - - APORT2YCH16 - APORT2Y Channel 16 - 0x00000011 - - - APORT2YCH18 - APORT2Y Channel 18 - 0x00000013 - - - APORT2YCH20 - APORT2Y Channel 20 - 0x00000015 - - - APORT2YCH22 - APORT2Y Channel 22 - 0x00000017 - - - APORT2YCH24 - APORT2Y Channel 24 - 0x00000019 - - - APORT2YCH26 - APORT2Y Channel 26 - 0x0000001b - - - APORT2YCH28 - APORT2Y Channel 28 - 0x0000001d - - - APORT2YCH30 - APORT2Y Channel 30 - 0x0000001f - - - APORT1XCH0 - APORT1X Channel 0 - 0x00000020 - - - APORT1YCH1 - APORT1Y Channel 1 - 0x00000021 - - - APORT1XCH2 - APORT1X Channel 2 - 0x00000022 - - - APORT1YCH3 - APORT1Y Channel 3 - 0x00000023 - - - APORT1XCH4 - APORT1X Channel 4 - 0x00000024 - - - APORT1YCH5 - APORT1Y Channel 5 - 0x00000025 - - - APORT1XCH6 - APORT1X Channel 6 - 0x00000026 - - - APORT1YCH7 - APORT1Y Channel 7 - 0x00000027 - - - APORT1XCH8 - APORT1X Channel 8 - 0x00000028 - - - APORT1YCH9 - APORT1Y Channel 9 - 0x00000029 - - - APORT1XCH10 - APORT1X Channel 10 - 0x0000002a - - - APORT1YCH11 - APORT1Y Channel 11 - 0x0000002b - - - APORT1XCH12 - APORT1X Channel 12 - 0x0000002c - - - APORT1YCH13 - APORT1Y Channel 13 - 0x0000002d - - - APORT1XCH14 - APORT1X Channel 14 - 0x0000002e - - - APORT1YCH15 - APORT1Y Channel 15 - 0x0000002f - - - APORT1XCH16 - APORT1X Channel 16 - 0x00000030 - - - APORT1YCH17 - APORT1Y Channel 17 - 0x00000031 - - - APORT1XCH18 - APORT1X Channel 18 - 0x00000032 - - - APORT1YCH19 - APORT1Y Channel 19 - 0x00000033 - - - APORT1XCH20 - APORT1X Channel 20 - 0x00000034 - - - APORT1YCH21 - APORT1Y Channel 21 - 0x00000035 - - - APORT1XCH22 - APORT1X Channel 22 - 0x00000036 - - - APORT1YCH23 - APORT1Y Channel 23 - 0x00000037 - - - APORT1XCH24 - APORT1X Channel 24 - 0x00000038 - - - APORT1YCH25 - APORT1Y Channel 25 - 0x00000039 - - - APORT1XCH26 - APORT1X Channel 26 - 0x0000003a - - - APORT1YCH27 - APORT1Y Channel 27 - 0x0000003b - - - APORT1XCH28 - APORT1X Channel 28 - 0x0000003c - - - APORT1YCH29 - APORT1Y Channel 29 - 0x0000003d - - - APORT1XCH30 - APORT1X Channel 30 - 0x0000003e - - - APORT1YCH31 - APORT1Y Channel 31 - 0x0000003f - - - - - VBSEL - VB Selection - 22 - 1 - read-write - - - VLPSEL - Low-Power Sampled Voltage Selection - 24 - 1 - read-write - - - CSRESEN - Capacitive Sense Mode Internal Resistor Enable - 26 - 1 - read-write - - - CSRESSEL - Capacitive Sense Mode Internal Resistor Select - 28 - 3 - read-write - - - RES0 - Internal capacitive sense resistor value 0 - 0x00000000 - - - RES1 - Internal capacitive sense resistor value 1 - 0x00000001 - - - RES2 - Internal capacitive sense resistor value 2 - 0x00000002 - - - RES3 - Internal capacitive sense resistor value 3 - 0x00000003 - - - RES4 - Internal capacitive sense resistor value 4 - 0x00000004 - - - RES5 - Internal capacitive sense resistor value 5 - 0x00000005 - - - RES6 - Internal capacitive sense resistor value 6 - 0x00000006 - - - RES7 - Internal capacitive sense resistor value 7 - 0x00000007 - - - - - - - STATUS - Status Register - 0x8 - 32 - read-only - 0x00000000 - 0x00000007 - - - ACMPACT - Analog Comparator Active - 0 - 1 - read-only - - - ACMPOUT - Analog Comparator Output - 1 - 1 - read-only - - - APORTCONFLICT - APORT Conflict Output - 2 - 1 - read-only - - - - - IF - Interrupt Flag Register - 0xc - 32 - read-only - 0x00000000 - 0x00000007 - - - EDGE - Edge Triggered Interrupt Flag - 0 - 1 - read-only - - - WARMUP - Warm-up Interrupt Flag - 1 - 1 - read-only - - - APORTCONFLICT - APORT Conflict Interrupt Flag - 2 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x10 - 32 - write-only - 0x00000000 - 0x00000007 - - - EDGE - Set EDGE Interrupt Flag - 0 - 1 - write-only - - - WARMUP - Set WARMUP Interrupt Flag - 1 - 1 - write-only - - - APORTCONFLICT - Set APORTCONFLICT Interrupt Flag - 2 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x14 - 32 - write-only - 0x00000000 - 0x00000007 - - - EDGE - Clear EDGE Interrupt Flag - 0 - 1 - write-only - - - WARMUP - Clear WARMUP Interrupt Flag - 1 - 1 - write-only - - - APORTCONFLICT - Clear APORTCONFLICT Interrupt Flag - 2 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x18 - 32 - read-write - 0x00000000 - 0x00000007 - - - EDGE - EDGE Interrupt Enable - 0 - 1 - read-write - - - WARMUP - WARMUP Interrupt Enable - 1 - 1 - read-write - - - APORTCONFLICT - APORTCONFLICT Interrupt Enable - 2 - 1 - read-write - - - - - APORTREQ - APORT Request Status Register - 0x20 - 32 - read-only - 0x00000000 - 0x000003ff - - - APORT0XREQ - 1 if the bus connected to APORT0X is requested - 0 - 1 - read-only - - - APORT0YREQ - 1 if the bus connected to APORT0Y is requested - 1 - 1 - read-only - - - APORT1XREQ - 1 if the bus connected to APORT2X is requested - 2 - 1 - read-only - - - APORT1YREQ - 1 if the bus connected to APORT1X is requested - 3 - 1 - read-only - - - APORT2XREQ - 1 if the bus connected to APORT2X is requested - 4 - 1 - read-only - - - APORT2YREQ - 1 if the bus connected to APORT2Y is requested - 5 - 1 - read-only - - - APORT3XREQ - 1 if the bus connected to APORT3X is requested - 6 - 1 - read-only - - - APORT3YREQ - 1 if the bus connected to APORT3Y is requested - 7 - 1 - read-only - - - APORT4XREQ - 1 if the bus connected to APORT4X is requested - 8 - 1 - read-only - - - APORT4YREQ - 1 if the bus connected to APORT4Y is requested - 9 - 1 - read-only - - - - - APORTCONFLICT - APORT Request Status Register - 0x24 - 32 - read-only - 0x00000000 - 0x000003ff - - - APORT0XCONFLICT - 1 if the bus connected to APORT0X is in conflict with another peripheral - 0 - 1 - read-only - - - APORT0YCONFLICT - 1 if the bus connected to APORT0Y is in conflict with another peripheral - 1 - 1 - read-only - - - APORT1XCONFLICT - 1 if the bus connected to APORT1X is in conflict with another peripheral - 2 - 1 - read-only - - - APORT1YCONFLICT - 1 if the bus connected to APORT1X is in conflict with another peripheral - 3 - 1 - read-only - - - APORT2XCONFLICT - 1 if the bus connected to APORT2X is in conflict with another peripheral - 4 - 1 - read-only - - - APORT2YCONFLICT - 1 if the bus connected to APORT2Y is in conflict with another peripheral - 5 - 1 - read-only - - - APORT3XCONFLICT - 1 if the bus connected to APORT3X is in conflict with another peripheral - 6 - 1 - read-only - - - APORT3YCONFLICT - 1 if the bus connected to APORT3Y is in conflict with another peripheral - 7 - 1 - read-only - - - APORT4XCONFLICT - 1 if the bus connected to APORT4X is in conflict with another peripheral - 8 - 1 - read-only - - - APORT4YCONFLICT - 1 if the bus connected to APORT4Y is in conflict with another peripheral - 9 - 1 - read-only - - - - - HYSTERESIS0 - Hysteresis 0 Register - 0x28 - 32 - read-write - 0x00000000 - 0x3f3f000f - - - HYST - Hysteresis Select when ACMPOUT=0 - 0 - 4 - read-write - - - HYST0 - No hysteresis - 0x00000000 - - - HYST1 - 14 mV hysteresis - 0x00000001 - - - HYST2 - 25 mV hysteresis - 0x00000002 - - - HYST3 - 30 mV hysteresis - 0x00000003 - - - HYST4 - 35 mV hysteresis - 0x00000004 - - - HYST5 - 39 mV hysteresis - 0x00000005 - - - HYST6 - 42 mV hysteresis - 0x00000006 - - - HYST7 - 45 mV hysteresis - 0x00000007 - - - HYST8 - No hysteresis - 0x00000008 - - - HYST9 - -14 mV hysteresis - 0x00000009 - - - HYST10 - -25 mV hysteresis - 0x0000000a - - - HYST11 - -30 mV hysteresis - 0x0000000b - - - HYST12 - -35 mV hysteresis - 0x0000000c - - - HYST13 - -39 mV hysteresis - 0x0000000d - - - HYST14 - -42 mV hysteresis - 0x0000000e - - - HYST15 - -45 mV hysteresis - 0x0000000f - - - - - DIVVA - Divider for VA Voltage when ACMPOUT=0 - 16 - 6 - read-write - - - DIVVB - Divider for VB Voltage when ACMPOUT=0 - 24 - 6 - read-write - - - - - HYSTERESIS1 - Hysteresis 1 Register - 0x2c - 32 - read-write - 0x00000000 - 0x3f3f000f - - - HYST - Hysteresis Select when ACMPOUT=1 - 0 - 4 - read-write - - - HYST0 - No hysteresis - 0x00000000 - - - HYST1 - 14 mV hysteresis - 0x00000001 - - - HYST2 - 25 mV hysteresis - 0x00000002 - - - HYST3 - 30 mV hysteresis - 0x00000003 - - - HYST4 - 35 mV hysteresis - 0x00000004 - - - HYST5 - 39 mV hysteresis - 0x00000005 - - - HYST6 - 42 mV hysteresis - 0x00000006 - - - HYST7 - 45 mV hysteresis - 0x00000007 - - - HYST8 - No hysteresis - 0x00000008 - - - HYST9 - -14 mV hysteresis - 0x00000009 - - - HYST10 - -25 mV hysteresis - 0x0000000a - - - HYST11 - -30 mV hysteresis - 0x0000000b - - - HYST12 - -35 mV hysteresis - 0x0000000c - - - HYST13 - -39 mV hysteresis - 0x0000000d - - - HYST14 - -42 mV hysteresis - 0x0000000e - - - HYST15 - -45 mV hysteresis - 0x0000000f - - - - - DIVVA - Divider for VA Voltage when ACMPOUT=1 - 16 - 6 - read-write - - - DIVVB - Divider for VB Voltage when ACMPOUT=1 - 24 - 6 - read-write - - - - - ROUTEPEN - I/O Routing Pine Enable Register - 0x40 - 32 - read-write - 0x00000000 - 0x00000001 - - - OUTPEN - ACMP Output Pin Enable - 0 - 1 - read-write - - - - - ROUTELOC0 - I/O Routing Location Register - 0x44 - 32 - read-write - 0x00000000 - 0x0000003f - - - OUTLOC - I/O Location - 0 - 6 - read-write - - - LOC0 - Location 0 - 0x00000000 - - - LOC1 - Location 1 - 0x00000001 - - - LOC2 - Location 2 - 0x00000002 - - - LOC3 - Location 3 - 0x00000003 - - - LOC4 - Location 4 - 0x00000004 - - - LOC5 - Location 5 - 0x00000005 - - - LOC6 - Location 6 - 0x00000006 - - - LOC7 - Location 7 - 0x00000007 - - - LOC8 - Location 8 - 0x00000008 - - - LOC9 - Location 9 - 0x00000009 - - - LOC10 - Location 10 - 0x0000000a - - - LOC11 - Location 11 - 0x0000000b - - - LOC12 - Location 12 - 0x0000000c - - - LOC13 - Location 13 - 0x0000000d - - - LOC14 - Location 14 - 0x0000000e - - - LOC15 - Location 15 - 0x0000000f - - - LOC16 - Location 16 - 0x00000010 - - - LOC17 - Location 17 - 0x00000011 - - - LOC18 - Location 18 - 0x00000012 - - - LOC19 - Location 19 - 0x00000013 - - - LOC20 - Location 20 - 0x00000014 - - - LOC21 - Location 21 - 0x00000015 - - - LOC22 - Location 22 - 0x00000016 - - - LOC23 - Location 23 - 0x00000017 - - - LOC24 - Location 24 - 0x00000018 - - - LOC25 - Location 25 - 0x00000019 - - - LOC26 - Location 26 - 0x0000001a - - - LOC27 - Location 27 - 0x0000001b - - - LOC28 - Location 28 - 0x0000001c - - - LOC29 - Location 29 - 0x0000001d - - - LOC30 - Location 30 - 0x0000001e - - - LOC31 - Location 31 - 0x0000001f - - - - - - - - - IDAC0 - 1.6 - IDAC0 - 0x40006000 - - 0 - 0x00000400 - registers - - - IDAC0 - 15 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x00f17fff - - - EN - Current DAC Enable - 0 - 1 - read-write - - - CURSINK - Current Sink Enable - 1 - 1 - read-write - - - MINOUTTRANS - Minimum Output Transition Enable - 2 - 1 - read-write - - - OUTEN - Output Enable - 3 - 1 - read-write - - - APORTOUTSEL - APORT Output Select - 4 - 8 - read-write - - - APORT1XCH0 - APORT1X Channel 0 - 0x00000020 - - - APORT1YCH1 - APORT1Y Channel 1 - 0x00000021 - - - APORT1XCH2 - APORT1X Channel 2 - 0x00000022 - - - APORT1YCH3 - APORT1Y Channel 3 - 0x00000023 - - - APORT1XCH4 - APORT1X Channel 4 - 0x00000024 - - - APORT1YCH5 - APORT1Y Channel 5 - 0x00000025 - - - APORT1XCH6 - APORT1X Channel 6 - 0x00000026 - - - APORT1YCH7 - APORT1Y Channel 7 - 0x00000027 - - - APORT1XCH8 - APORT1X Channel 8 - 0x00000028 - - - APORT1YCH9 - APORT1Y Channel 9 - 0x00000029 - - - APORT1XCH10 - APORT1X Channel 10 - 0x0000002a - - - APORT1YCH11 - APORT1Y Channel 11 - 0x0000002b - - - APORT1XCH12 - APORT1X Channel 12 - 0x0000002c - - - APORT1YCH13 - APORT1Y Channel 13 - 0x0000002d - - - APORT1XCH14 - APORT1X Channel 14 - 0x0000002e - - - APORT1YCH15 - APORT1Y Channel 15 - 0x0000002f - - - APORT1XCH16 - APORT1X Channel 16 - 0x00000030 - - - APORT1YCH17 - APORT1Y Channel 17 - 0x00000031 - - - APORT1XCH18 - APORT1X Channel 18 - 0x00000032 - - - APORT1YCH19 - APORT1Y Channel 19 - 0x00000033 - - - APORT1XCH20 - APORT1X Channel 20 - 0x00000034 - - - APORT1YCH21 - APORT1Y Channel 21 - 0x00000035 - - - APORT1XCH22 - APORT1X Channel 22 - 0x00000036 - - - APORT1YCH23 - APORT1Y Channel 23 - 0x00000037 - - - APORT1XCH24 - APORT1X Channel 24 - 0x00000038 - - - APORT1YCH25 - APORT1Y Channel 25 - 0x00000039 - - - APORT1XCH26 - APORT1X Channel 26 - 0x0000003a - - - APORT1YCH27 - APORT1Y Channel 27 - 0x0000003b - - - APORT1XCH28 - APORT1X Channel 28 - 0x0000003c - - - APORT1YCH29 - APORT1Y Channel 29 - 0x0000003d - - - APORT1XCH30 - APORT1X Channel 30 - 0x0000003e - - - APORT1YCH31 - APORT1Y Channel 31 - 0x0000003f - - - - - PWRSEL - Power Select - 12 - 1 - read-write - - - EM2DELAY - EM2 Delay - 13 - 1 - read-write - - - APORTMASTERDIS - APORT Bus Master Disable - 14 - 1 - read-write - - - OUTENPRS - PRS Controlled Output Enable - 16 - 1 - read-write - - - PRSSEL - IDAC Output PRS channnel Select - 20 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected. - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected. - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected. - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected. - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected. - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected. - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected. - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected. - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected. - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected. - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected. - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected. - 0x0000000b - - - - - - - CURPROG - Current Programming Register - 0x4 - 32 - read-write - 0x009b0000 - 0x00ff1f03 - - - RANGESEL - Current Range Select - 0 - 2 - read-write - - - RANGE0 - Current range set to 0 - 1.6 uA. - 0x00000000 - - - RANGE1 - Current range set to 1.6 - 4.7 uA. - 0x00000001 - - - RANGE2 - Current range set to 0.5 - 16 uA. - 0x00000002 - - - RANGE3 - Current range set to 2 - 64 uA. - 0x00000003 - - - - - STEPSEL - Current Step Size Select - 8 - 5 - read-write - - - TUNING - Tune the current to given accuracy - 16 - 8 - read-write - - - - - DUTYCONFIG - Duty Cycle Configauration Register - 0xc - 32 - read-write - 0x00000000 - 0x00000002 - - - EM2DUTYCYCLEDIS - Duty Cycle Enable. - 1 - 1 - read-write - - - - - STATUS - Status Register - 0x18 - 32 - read-only - 0x00000000 - 0x00000002 - - - APORTCONFLICT - APORT Conflict Output - 1 - 1 - read-only - - - - - IF - Interrupt Flag Register - 0x20 - 32 - read-only - 0x00000000 - 0x00000002 - - - APORTCONFLICT - APORT Conflict Interrupt Flag - 1 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x24 - 32 - write-only - 0x00000000 - 0x00000003 - - - CURSTABLE - Set CURSTABLE Interrupt Flag - 0 - 1 - write-only - - - APORTCONFLICT - Set APORTCONFLICT Interrupt Flag - 1 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x28 - 32 - write-only - 0x00000000 - 0x00000003 - - - CURSTABLE - Clear CURSTABLE Interrupt Flag - 0 - 1 - write-only - - - APORTCONFLICT - Clear APORTCONFLICT Interrupt Flag - 1 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x2c - 32 - read-write - 0x00000000 - 0x00000003 - - - CURSTABLE - CURSTABLE Interrupt Enable - 0 - 1 - read-write - - - APORTCONFLICT - APORTCONFLICT Interrupt Enable - 1 - 1 - read-write - - - - - APORTREQ - APORT Request Status Register - 0x34 - 32 - read-only - 0x00000000 - 0x0000000c - - - APORT1XREQ - 1 if the APORT bus connected to APORT1X is requested - 2 - 1 - read-only - - - APORT1YREQ - 1 if the bus connected to APORT1Y is requested - 3 - 1 - read-only - - - - - APORTCONFLICT - APORT Request Status Register - 0x38 - 32 - read-only - 0x00000000 - 0x0000000c - - - APORT1XCONFLICT - 1 if the bus connected to APORT1X is in conflict with another peripheral - 2 - 1 - read-only - - - APORT1YCONFLICT - 1 if the bus connected to APORT1Y is in conflict with another peripheral - 3 - 1 - read-only - - - - - - - RTCC - 1.6 - RTCC - 0x40042000 - - 0 - 0x00000400 - registers - - - RTCC - 29 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000000 - 0x00039f35 - - - ENABLE - RTCC Enable - 0 - 1 - read-write - - - DEBUGRUN - Debug Mode Run Enable - 2 - 1 - read-write - - - PRECCV0TOP - Pre-counter CCV0 top value enable. - 4 - 1 - read-write - - - CCV1TOP - CCV1 top value enable - 5 - 1 - read-write - - - CNTPRESC - Counter prescaler value. - 8 - 4 - read-write - - - DIV1 - CLKCNT = LFECLKRTCC/1 - 0x00000000 - - - DIV2 - CLKCNT = LFECLKRTCC/2 - 0x00000001 - - - DIV4 - CLKCNT = LFECLKRTCC/4 - 0x00000002 - - - DIV8 - CLKCNT = LFECLKRTCC/8 - 0x00000003 - - - DIV16 - CLKCNT = LFECLKRTCC/16 - 0x00000004 - - - DIV32 - CLKCNT = LFECLKRTCC/32 - 0x00000005 - - - DIV64 - CLKCNT = LFECLKRTCC/64 - 0x00000006 - - - DIV128 - CLKCNT = LFECLKRTCC/128 - 0x00000007 - - - DIV256 - CLKCNT = LFECLKRTCC/256 - 0x00000008 - - - DIV512 - CLKCNT = LFECLKRTCC/512 - 0x00000009 - - - DIV1024 - CLKCNT = LFECLKRTCC/1024 - 0x0000000a - - - DIV2048 - CLKCNT = LFECLKRTCC/2048 - 0x0000000b - - - DIV4096 - CLKCNT = LFECLKRTCC/4096 - 0x0000000c - - - DIV8192 - CLKCNT = LFECLKRTCC/8192 - 0x0000000d - - - DIV16384 - CLKCNT = LFECLKRTCC/16384 - 0x0000000e - - - DIV32768 - CLKCNT = LFECLKRTCC/32768 - 0x0000000f - - - - - CNTTICK - Counter prescaler mode. - 12 - 1 - read-write - - - OSCFDETEN - Oscillator failure detection enable - 15 - 1 - read-write - - - CNTMODE - Main counter mode - 16 - 1 - read-write - - - LYEARCORRDIS - Leap year correction disabled. - 17 - 1 - read-write - - - - - PRECNT - Pre-Counter Value Register - 0x4 - 32 - read-write - 0x00000000 - 0x00007fff - - - PRECNT - Pre-Counter Value - 0 - 15 - read-write - - - - - CNT - Counter Value Register - 0x8 - 32 - read-write - 0x00000000 - 0xffffffff - - - CNT - Counter Value - 0 - 32 - read-write - - - - - COMBCNT - Combined Pre-Counter and Counter Value Register - 0xc - 32 - read-only - 0x00000000 - 0xffffffff - - - PRECNT - Pre-Counter Value - 0 - 15 - read-only - - - CNTLSB - Counter Value - 15 - 17 - read-only - - - - - TIME - Time of day register - 0x10 - 32 - read-write - 0x00000000 - 0x003f7f7f - - - SECU - Seconds, units. - 0 - 4 - read-write - - - SECT - Seconds, tens. - 4 - 3 - read-write - - - MINU - Minutes, units. - 8 - 4 - read-write - - - MINT - Minutes, tens. - 12 - 3 - read-write - - - HOURU - Hours, units. - 16 - 4 - read-write - - - HOURT - Hours, tens. - 20 - 2 - read-write - - - - - DATE - Date register - 0x14 - 32 - read-write - 0x00000000 - 0x07ff1f3f - - - DAYOMU - Day of month, units. - 0 - 4 - read-write - - - DAYOMT - Day of month, tens. - 4 - 2 - read-write - - - MONTHU - Month, units. - 8 - 4 - read-write - - - MONTHT - Month, tens. - 12 - 1 - read-write - - - YEARU - Year, units. - 16 - 4 - read-write - - - YEART - Year, tens. - 20 - 4 - read-write - - - DAYOW - Day of week. - 24 - 3 - read-write - - - - - IF - RTCC Interrupt Flags - 0x18 - 32 - read-only - 0x00000000 - 0x000007ff - - - OF - Overflow Interrupt Flag - 0 - 1 - read-only - - - CC0 - Channel 0 Interrupt Flag - 1 - 1 - read-only - - - CC1 - Channel 1 Interrupt Flag - 2 - 1 - read-only - - - CC2 - Channel 2 Interrupt Flag - 3 - 1 - read-only - - - OSCFAIL - Oscillator failure Interrupt Flag - 4 - 1 - read-only - - - CNTTICK - Main counter tick - 5 - 1 - read-only - - - MINTICK - Minute tick - 6 - 1 - read-only - - - HOURTICK - Hour tick - 7 - 1 - read-only - - - DAYTICK - Day tick - 8 - 1 - read-only - - - DAYOWOF - Day of week overflow - 9 - 1 - read-only - - - MONTHTICK - Month tick - 10 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x1c - 32 - write-only - 0x00000000 - 0x000007ff - - - OF - Set OF Interrupt Flag - 0 - 1 - write-only - - - CC0 - Set CC0 Interrupt Flag - 1 - 1 - write-only - - - CC1 - Set CC1 Interrupt Flag - 2 - 1 - write-only - - - CC2 - Set CC2 Interrupt Flag - 3 - 1 - write-only - - - OSCFAIL - Set OSCFAIL Interrupt Flag - 4 - 1 - write-only - - - CNTTICK - Set CNTTICK Interrupt Flag - 5 - 1 - write-only - - - MINTICK - Set MINTICK Interrupt Flag - 6 - 1 - write-only - - - HOURTICK - Set HOURTICK Interrupt Flag - 7 - 1 - write-only - - - DAYTICK - Set DAYTICK Interrupt Flag - 8 - 1 - write-only - - - DAYOWOF - Set DAYOWOF Interrupt Flag - 9 - 1 - write-only - - - MONTHTICK - Set MONTHTICK Interrupt Flag - 10 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x20 - 32 - write-only - 0x00000000 - 0x000007ff - - - OF - Clear OF Interrupt Flag - 0 - 1 - write-only - - - CC0 - Clear CC0 Interrupt Flag - 1 - 1 - write-only - - - CC1 - Clear CC1 Interrupt Flag - 2 - 1 - write-only - - - CC2 - Clear CC2 Interrupt Flag - 3 - 1 - write-only - - - OSCFAIL - Clear OSCFAIL Interrupt Flag - 4 - 1 - write-only - - - CNTTICK - Clear CNTTICK Interrupt Flag - 5 - 1 - write-only - - - MINTICK - Clear MINTICK Interrupt Flag - 6 - 1 - write-only - - - HOURTICK - Clear HOURTICK Interrupt Flag - 7 - 1 - write-only - - - DAYTICK - Clear DAYTICK Interrupt Flag - 8 - 1 - write-only - - - DAYOWOF - Clear DAYOWOF Interrupt Flag - 9 - 1 - write-only - - - MONTHTICK - Clear MONTHTICK Interrupt Flag - 10 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x24 - 32 - read-write - 0x00000000 - 0x000007ff - - - OF - OF Interrupt Enable - 0 - 1 - read-write - - - CC0 - CC0 Interrupt Enable - 1 - 1 - read-write - - - CC1 - CC1 Interrupt Enable - 2 - 1 - read-write - - - CC2 - CC2 Interrupt Enable - 3 - 1 - read-write - - - OSCFAIL - OSCFAIL Interrupt Enable - 4 - 1 - read-write - - - CNTTICK - CNTTICK Interrupt Enable - 5 - 1 - read-write - - - MINTICK - MINTICK Interrupt Enable - 6 - 1 - read-write - - - HOURTICK - HOURTICK Interrupt Enable - 7 - 1 - read-write - - - DAYTICK - DAYTICK Interrupt Enable - 8 - 1 - read-write - - - DAYOWOF - DAYOWOF Interrupt Enable - 9 - 1 - read-write - - - MONTHTICK - MONTHTICK Interrupt Enable - 10 - 1 - read-write - - - - - STATUS - Status register - 0x28 - 32 - read-only - 0x00000000 - 0x00000000 - - - CMD - Command Register - 0x2c - 32 - write-only - 0x00000000 - 0x00000001 - - - CLRSTATUS - Clear RTCC_STATUS register. - 0 - 1 - write-only - - - - - SYNCBUSY - Synchronization Busy Register - 0x30 - 32 - read-only - 0x00000000 - 0x00000020 - - - CMD - CMD Register Busy - 5 - 1 - read-only - - - - - POWERDOWN - Retention RAM power-down register - 0x34 - 32 - read-write - 0x00000000 - 0x00000001 - - - RAM - Retention RAM power-down - 0 - 1 - read-write - - - - - LOCK - Configuration Lock Register - 0x38 - 32 - read-write - 0x00000000 - 0x0000ffff - - - LOCKKEY - Configuration Lock Key - 0 - 16 - read-write - - - UNLOCKED - "" - 0x00000000 - - - LOCKED - "" - 0x00000001 - - - - - - - EM4WUEN - Wake Up Enable - 0x3c - 32 - read-write - 0x00000000 - 0x00000001 - - - EM4WU - EM4 Wake-up enable - 0 - 1 - read-write - - - - - CC0_CTRL - CC Channel Control Register - 0x40 - 32 - read-write - 0x00000000 - 0x0003fbff - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - - - CMOA - Compare Match Output Action - 2 - 2 - read-write - - - PULSE - A single clock cycle pulse is generated on output - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - ICEDGE - Input Capture Edge Select - 4 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 6 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - COMPBASE - Capture compare channel comparison base. - 11 - 1 - read-write - - - COMPMASK - Capture compare channel comparison mask. - 12 - 5 - read-write - - - DAYCC - Day Capture/Compare selection - 17 - 1 - read-write - - - - - CC0_CCV - Capture/Compare Value Register - 0x44 - 32 - read-write - 0x00000000 - 0xffffffff - - - CCV - Capture/Compare Value - 0 - 32 - read-write - - - - - CC0_TIME - Capture/Compare Time Register - 0x48 - 32 - read-write - 0x00000000 - 0x003f7f7f - - - SECU - Seconds, units. - 0 - 4 - read-write - - - SECT - Seconds, tens. - 4 - 3 - read-write - - - MINU - Minutes, units. - 8 - 4 - read-write - - - MINT - Minutes, tens. - 12 - 3 - read-write - - - HOURU - Hours, units. - 16 - 4 - read-write - - - HOURT - Hours, tens. - 20 - 2 - read-write - - - - - CC0_DATE - Capture/Compare Date Register - 0x4c - 32 - read-write - 0x00000000 - 0x00001f3f - - - DAYU - Day of month/week, units. - 0 - 4 - read-write - - - DAYT - Day of month/week, tens. - 4 - 2 - read-write - - - MONTHU - Month, units. - 8 - 4 - read-write - - - MONTHT - Month, tens. - 12 - 1 - read-write - - - - - CC1_CTRL - CC Channel Control Register - 0x50 - 32 - read-write - 0x00000000 - 0x0003fbff - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - - - CMOA - Compare Match Output Action - 2 - 2 - read-write - - - PULSE - A single clock cycle pulse is generated on output - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - ICEDGE - Input Capture Edge Select - 4 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 6 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - COMPBASE - Capture compare channel comparison base. - 11 - 1 - read-write - - - COMPMASK - Capture compare channel comparison mask. - 12 - 5 - read-write - - - DAYCC - Day Capture/Compare selection - 17 - 1 - read-write - - - - - CC1_CCV - Capture/Compare Value Register - 0x54 - 32 - read-write - 0x00000000 - 0xffffffff - - - CCV - Capture/Compare Value - 0 - 32 - read-write - - - - - CC1_TIME - Capture/Compare Time Register - 0x58 - 32 - read-write - 0x00000000 - 0x003f7f7f - - - SECU - Seconds, units. - 0 - 4 - read-write - - - SECT - Seconds, tens. - 4 - 3 - read-write - - - MINU - Minutes, units. - 8 - 4 - read-write - - - MINT - Minutes, tens. - 12 - 3 - read-write - - - HOURU - Hours, units. - 16 - 4 - read-write - - - HOURT - Hours, tens. - 20 - 2 - read-write - - - - - CC1_DATE - Capture/Compare Date Register - 0x5c - 32 - read-write - 0x00000000 - 0x00001f3f - - - DAYU - Day of month/week, units. - 0 - 4 - read-write - - - DAYT - Day of month/week, tens. - 4 - 2 - read-write - - - MONTHU - Month, units. - 8 - 4 - read-write - - - MONTHT - Month, tens. - 12 - 1 - read-write - - - - - CC2_CTRL - CC Channel Control Register - 0x60 - 32 - read-write - 0x00000000 - 0x0003fbff - - - MODE - CC Channel Mode - 0 - 2 - read-write - - - OFF - Compare/Capture channel turned off - 0x00000000 - - - INPUTCAPTURE - Input capture - 0x00000001 - - - OUTPUTCOMPARE - Output compare - 0x00000002 - - - - - CMOA - Compare Match Output Action - 2 - 2 - read-write - - - PULSE - A single clock cycle pulse is generated on output - 0x00000000 - - - TOGGLE - Toggle output on compare match - 0x00000001 - - - CLEAR - Clear output on compare match - 0x00000002 - - - SET - Set output on compare match - 0x00000003 - - - - - ICEDGE - Input Capture Edge Select - 4 - 2 - read-write - - - RISING - Rising edges detected - 0x00000000 - - - FALLING - Falling edges detected - 0x00000001 - - - BOTH - Both edges detected - 0x00000002 - - - NONE - No edge detection, signal is left as it is - 0x00000003 - - - - - PRSSEL - Compare/Capture Channel PRS Input Channel Selection - 6 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - COMPBASE - Capture compare channel comparison base. - 11 - 1 - read-write - - - COMPMASK - Capture compare channel comparison mask. - 12 - 5 - read-write - - - DAYCC - Day Capture/Compare selection - 17 - 1 - read-write - - - - - CC2_CCV - Capture/Compare Value Register - 0x64 - 32 - read-write - 0x00000000 - 0xffffffff - - - CCV - Capture/Compare Value - 0 - 32 - read-write - - - - - CC2_TIME - Capture/Compare Time Register - 0x68 - 32 - read-write - 0x00000000 - 0x003f7f7f - - - SECU - Seconds, units. - 0 - 4 - read-write - - - SECT - Seconds, tens. - 4 - 3 - read-write - - - MINU - Minutes, units. - 8 - 4 - read-write - - - MINT - Minutes, tens. - 12 - 3 - read-write - - - HOURU - Hours, units. - 16 - 4 - read-write - - - HOURT - Hours, tens. - 20 - 2 - read-write - - - - - CC2_DATE - Capture/Compare Date Register - 0x6c - 32 - read-write - 0x00000000 - 0x00001f3f - - - DAYU - Day of month/week, units. - 0 - 4 - read-write - - - DAYT - Day of month/week, tens. - 4 - 2 - read-write - - - MONTHU - Month, units. - 8 - 4 - read-write - - - MONTHT - Month, tens. - 12 - 1 - read-write - - - - - RET0_REG - Retention register - 0x104 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET1_REG - Retention register - 0x108 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET2_REG - Retention register - 0x10c - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET3_REG - Retention register - 0x110 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET4_REG - Retention register - 0x114 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET5_REG - Retention register - 0x118 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET6_REG - Retention register - 0x11c - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET7_REG - Retention register - 0x120 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET8_REG - Retention register - 0x124 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET9_REG - Retention register - 0x128 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET10_REG - Retention register - 0x12c - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET11_REG - Retention register - 0x130 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET12_REG - Retention register - 0x134 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET13_REG - Retention register - 0x138 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET14_REG - Retention register - 0x13c - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET15_REG - Retention register - 0x140 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET16_REG - Retention register - 0x144 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET17_REG - Retention register - 0x148 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET18_REG - Retention register - 0x14c - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET19_REG - Retention register - 0x150 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET20_REG - Retention register - 0x154 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET21_REG - Retention register - 0x158 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET22_REG - Retention register - 0x15c - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET23_REG - Retention register - 0x160 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET24_REG - Retention register - 0x164 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET25_REG - Retention register - 0x168 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET26_REG - Retention register - 0x16c - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET27_REG - Retention register - 0x170 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET28_REG - Retention register - 0x174 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET29_REG - Retention register - 0x178 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET30_REG - Retention register - 0x17c - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - RET31_REG - Retention register - 0x180 - 32 - read-write - 0x00000000 - 0xffffffff - - - REG - General Purpose Retention Register - 0 - 32 - read-write - - - - - - - WDOG0 - 1.6 - WDOG0 - 0x40052000 - - 0 - 0x00000400 - registers - - - WDOG0 - 2 - - - - CTRL - Control Register - 0x0 - 32 - read-write - 0x00000f00 - 0xc7033f7f - - - EN - Watchdog Timer Enable - 0 - 1 - read-write - - - DEBUGRUN - Debug Mode Run Enable - 1 - 1 - read-write - - - EM2RUN - Energy Mode 2 Run Enable - 2 - 1 - read-write - - - EM3RUN - Energy Mode 3 Run Enable - 3 - 1 - read-write - - - LOCK - Configuration lock - 4 - 1 - read-write - - - EM4BLOCK - Energy Mode 4 Block - 5 - 1 - read-write - - - SWOSCBLOCK - Software Oscillator Disable Block - 6 - 1 - read-write - - - PERSEL - Watchdog Timeout Period Select - 8 - 4 - read-write - - - CLKSEL - Watchdog Clock Select - 12 - 2 - read-write - - - ULFRCO - ULFRCO - 0x00000000 - - - LFRCO - LFRCO - 0x00000001 - - - LFXO - LFXO - 0x00000002 - - - - - WARNSEL - Watchdog Timeout Period Select - 16 - 2 - read-write - - - WINSEL - Watchdog Illegal Window Select - 24 - 3 - read-write - - - CLRSRC - Watchdog Clear Source - 30 - 1 - read-write - - - WDOGRSTDIS - Watchdog Reset Disable - 31 - 1 - read-write - - - - - CMD - Command Register - 0x4 - 32 - write-only - 0x00000000 - 0x00000001 - - - CLEAR - Watchdog Timer Clear - 0 - 1 - write-only - - - - - SYNCBUSY - Synchronization Busy Register - 0x8 - 32 - read-only - 0x00000000 - 0x0000000f - - - CTRL - CTRL Register Busy - 0 - 1 - read-only - - - CMD - CMD Register Busy - 1 - 1 - read-only - - - PCH0_PRSCTRL - PCH0_PRSCTRL Register Busy - 2 - 1 - read-only - - - PCH1_PRSCTRL - PCH1_PRSCTRL Register Busy - 3 - 1 - read-only - - - - - PCH0_PRSCTRL - PRS Control Register - 0xc - 32 - read-write - 0x00000000 - 0x0000010f - - - PRSSEL - PRS Channel PRS Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - PRSMISSRSTEN - PRS missing event will trigger a watchdog reset - 8 - 1 - read-write - - - - - PCH1_PRSCTRL - PRS Control Register - 0x10 - 32 - read-write - 0x00000000 - 0x0000010f - - - PRSSEL - PRS Channel PRS Select - 0 - 4 - read-write - - - PRSCH0 - PRS Channel 0 selected as input - 0x00000000 - - - PRSCH1 - PRS Channel 1 selected as input - 0x00000001 - - - PRSCH2 - PRS Channel 2 selected as input - 0x00000002 - - - PRSCH3 - PRS Channel 3 selected as input - 0x00000003 - - - PRSCH4 - PRS Channel 4 selected as input - 0x00000004 - - - PRSCH5 - PRS Channel 5 selected as input - 0x00000005 - - - PRSCH6 - PRS Channel 6 selected as input - 0x00000006 - - - PRSCH7 - PRS Channel 7 selected as input - 0x00000007 - - - PRSCH8 - PRS Channel 8 selected as input - 0x00000008 - - - PRSCH9 - PRS Channel 9 selected as input - 0x00000009 - - - PRSCH10 - PRS Channel 10 selected as input - 0x0000000a - - - PRSCH11 - PRS Channel 11 selected as input - 0x0000000b - - - - - PRSMISSRSTEN - PRS missing event will trigger a watchdog reset - 8 - 1 - read-write - - - - - IF - Watchdog Interrupt Flags - 0x1c - 32 - read-only - 0x00000000 - 0x0000001f - - - TOUT - Wdog Timeout Interrupt Flag - 0 - 1 - read-only - - - WARN - Wdog Warning Timeout Interrupt Flag - 1 - 1 - read-only - - - WIN - Wdog Window Interrupt Flag - 2 - 1 - read-only - - - PEM0 - PRS Channel Zero Event Missing Interrupt Flag - 3 - 1 - read-only - - - PEM1 - PRS Channel One Event Missing Interrupt Flag - 4 - 1 - read-only - - - - - IFS - Interrupt Flag Set Register - 0x20 - 32 - write-only - 0x00000000 - 0x0000001f - - - TOUT - Set TOUT Interrupt Flag - 0 - 1 - write-only - - - WARN - Set WARN Interrupt Flag - 1 - 1 - write-only - - - WIN - Set WIN Interrupt Flag - 2 - 1 - write-only - - - PEM0 - Set PEM0 Interrupt Flag - 3 - 1 - write-only - - - PEM1 - Set PEM1 Interrupt Flag - 4 - 1 - write-only - - - - - IFC - Interrupt Flag Clear Register - 0x24 - 32 - write-only - 0x00000000 - 0x0000001f - - - TOUT - Clear TOUT Interrupt Flag - 0 - 1 - write-only - - - WARN - Clear WARN Interrupt Flag - 1 - 1 - write-only - - - WIN - Clear WIN Interrupt Flag - 2 - 1 - write-only - - - PEM0 - Clear PEM0 Interrupt Flag - 3 - 1 - write-only - - - PEM1 - Clear PEM1 Interrupt Flag - 4 - 1 - write-only - - - - - IEN - Interrupt Enable Register - 0x28 - 32 - read-write - 0x00000000 - 0x0000001f - - - TOUT - TOUT Interrupt Enable - 0 - 1 - read-write - - - WARN - WARN Interrupt Enable - 1 - 1 - read-write - - - WIN - WIN Interrupt Enable - 2 - 1 - read-write - - - PEM0 - PEM0 Interrupt Enable - 3 - 1 - read-write - - - PEM1 - PEM1 Interrupt Enable - 4 - 1 - read-write - - - - - - - - - (C) Copyright Silicon Laboratories, Inc. 2015 - - diff --git a/examples/STM32F429x.svd b/examples/STM32F429x.svd deleted file mode 100644 index a000c7fc..00000000 --- a/examples/STM32F429x.svd +++ /dev/null @@ -1,57586 +0,0 @@ - - - STM32F429x - 1.0 - STM32F429x - - - 8 - - 32 - - 32 - 0x0 - 0xffffffff - - - RNG - Random number generator - RNG - 0x50060800 - - 0x0 - 0x400 - registers - - - FPU - FPU interrupt - 81 - - - RNG - Rng global interrupt - 80 - - - - CR - - control register - 0x0 - 32 - read-write - 0x00000000 - - - IE - Interrupt enable - 3 - 1 - - - RNGEN - Random number generator - enable - 2 - 1 - - - - - SR - - status register - 0x4 - 32 - 0x00000000 - - - SEIS - Seed error interrupt - status - 6 - 1 - read-write - - - CEIS - Clock error interrupt - status - 5 - 1 - read-write - - - SECS - Seed error current status - 2 - 1 - read-only - - - CECS - Clock error current status - 1 - 1 - read-only - - - DRDY - Data ready - 0 - 1 - read-only - - - - - DR - - data register - 0x8 - 32 - read-only - 0x00000000 - - - RNDATA - Random data - 0 - 32 - - - - - - - DCMI - Digital camera interface - DCMI - 0x50050000 - - 0x0 - 0x400 - registers - - - DCMI - DCMI global interrupt - 78 - - - - CR - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - ENABLE - DCMI enable - 14 - 1 - - - EDM - Extended data mode - 10 - 2 - - - FCRC - Frame capture rate control - 8 - 2 - - - VSPOL - Vertical synchronization - polarity - 7 - 1 - - - HSPOL - Horizontal synchronization - polarity - 6 - 1 - - - PCKPOL - Pixel clock polarity - 5 - 1 - - - ESS - Embedded synchronization - select - 4 - 1 - - - JPEG - JPEG format - 3 - 1 - - - CROP - Crop feature - 2 - 1 - - - CM - Capture mode - 1 - 1 - - - CAPTURE - Capture enable - 0 - 1 - - - - - SR - - status register - 0x4 - 32 - read-only - 0x0 - - - FNE - FIFO not empty - 2 - 1 - - - VSYNC - VSYNC - 1 - 1 - - - HSYNC - HSYNC - 0 - 1 - - - - - RIS - - raw interrupt status register - 0x8 - 32 - read-only - 0x0 - - - LINE_RIS - Line raw interrupt status - 4 - 1 - - - VSYNC_RIS - VSYNC raw interrupt status - 3 - 1 - - - ERR_RIS - Synchronization error raw interrupt - status - 2 - 1 - - - OVR_RIS - Overrun raw interrupt - status - 1 - 1 - - - FRAME_RIS - Capture complete raw interrupt - status - 0 - 1 - - - - - IER - - interrupt enable register - 0xc - 32 - read-write - 0x0 - - - LINE_IE - Line interrupt enable - 4 - 1 - - - VSYNC_IE - VSYNC interrupt enable - 3 - 1 - - - ERR_IE - Synchronization error interrupt - enable - 2 - 1 - - - OVR_IE - Overrun interrupt enable - 1 - 1 - - - FRAME_IE - Capture complete interrupt - enable - 0 - 1 - - - - - MIS - - masked interrupt status - register - 0x10 - 32 - read-only - 0x0 - - - LINE_MIS - Line masked interrupt - status - 4 - 1 - - - VSYNC_MIS - VSYNC masked interrupt - status - 3 - 1 - - - ERR_MIS - Synchronization error masked interrupt - status - 2 - 1 - - - OVR_MIS - Overrun masked interrupt - status - 1 - 1 - - - FRAME_MIS - Capture complete masked interrupt - status - 0 - 1 - - - - - ICR - - interrupt clear register - 0x14 - 32 - write-only - 0x0 - - - LINE_ISC - line interrupt status - clear - 4 - 1 - - - VSYNC_ISC - Vertical synch interrupt status - clear - 3 - 1 - - - ERR_ISC - Synchronization error interrupt status - clear - 2 - 1 - - - OVR_ISC - Overrun interrupt status - clear - 1 - 1 - - - FRAME_ISC - Capture complete interrupt status - clear - 0 - 1 - - - - - ESCR - - embedded synchronization code - register - 0x18 - 32 - read-write - 0x0 - - - FEC - Frame end delimiter code - 24 - 8 - - - LEC - Line end delimiter code - 16 - 8 - - - LSC - Line start delimiter code - 8 - 8 - - - FSC - Frame start delimiter code - 0 - 8 - - - - - ESUR - - embedded synchronization unmask - register - 0x1c - 32 - read-write - 0x0 - - - FEU - Frame end delimiter unmask - 24 - 8 - - - LEU - Line end delimiter unmask - 16 - 8 - - - LSU - Line start delimiter - unmask - 8 - 8 - - - FSU - Frame start delimiter - unmask - 0 - 8 - - - - - CWSTRT - - crop window start - 0x20 - 32 - read-write - 0x0 - - - VST - Vertical start line count - 16 - 13 - - - HOFFCNT - Horizontal offset count - 0 - 14 - - - - - CWSIZE - - crop window size - 0x24 - 32 - read-write - 0x0 - - - VLINE - Vertical line count - 16 - 14 - - - CAPCNT - Capture count - 0 - 14 - - - - - DR - - data register - 0x28 - 32 - read-only - 0x0 - - - Byte3 - Data byte 3 - 24 - 8 - - - Byte2 - Data byte 2 - 16 - 8 - - - Byte1 - Data byte 1 - 8 - 8 - - - Byte0 - Data byte 0 - 0 - 8 - - - - - - - FMC - Flexible memory controller - FSMC - 0xa0000000 - - 0x0 - 0x400 - registers - - - FMC - FMC global interrupt - 48 - - - - BCR1 - - SRAM/NOR-Flash chip-select control register - 1 - 0x0 - 32 - read-write - 0x000030d0 - - - CCLKEN - CCLKEN - 20 - 1 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR1 - - SRAM/NOR-Flash chip-select timing register - 1 - 0x4 - 32 - read-write - 0xffffffff - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR2 - - SRAM/NOR-Flash chip-select control register - 2 - 0x8 - 32 - read-write - 0x000030d0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR2 - - SRAM/NOR-Flash chip-select timing register - 2 - 0xc - 32 - read-write - 0xffffffff - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR3 - - SRAM/NOR-Flash chip-select control register - 3 - 0x10 - 32 - read-write - 0x000030d0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR3 - - SRAM/NOR-Flash chip-select timing register - 3 - 0x14 - 32 - read-write - 0xffffffff - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BCR4 - - SRAM/NOR-Flash chip-select control register - 4 - 0x18 - 32 - read-write - 0x000030d0 - - - CBURSTRW - CBURSTRW - 19 - 1 - - - ASYNCWAIT - ASYNCWAIT - 15 - 1 - - - EXTMOD - EXTMOD - 14 - 1 - - - WAITEN - WAITEN - 13 - 1 - - - WREN - WREN - 12 - 1 - - - WAITCFG - WAITCFG - 11 - 1 - - - WRAPMOD - WRAPMOD - 10 - 1 - - - WAITPOL - WAITPOL - 9 - 1 - - - BURSTEN - BURSTEN - 8 - 1 - - - FACCEN - FACCEN - 6 - 1 - - - MWID - MWID - 4 - 2 - - - MTYP - MTYP - 2 - 2 - - - MUXEN - MUXEN - 1 - 1 - - - MBKEN - MBKEN - 0 - 1 - - - - - BTR4 - - SRAM/NOR-Flash chip-select timing register - 4 - 0x1c - 32 - read-write - 0xffffffff - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - BUSTURN - BUSTURN - 16 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - PCR2 - - PC Card/NAND Flash control register - 2 - 0x60 - 32 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR2 - - FIFO status and interrupt register - 2 - 0x64 - 32 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM2 - - Common memory space timing register - 2 - 0x68 - 32 - read-write - 0xfcfcfcfc - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT2 - - Attribute memory space timing register - 2 - 0x6c - 32 - read-write - 0xfcfcfcfc - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - ECCR2 - - ECC result register 2 - 0x74 - 32 - read-only - 0x00000000 - - - ECCx - ECCx - 0 - 32 - - - - - PCR3 - - PC Card/NAND Flash control register - 3 - 0x80 - 32 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR3 - - FIFO status and interrupt register - 3 - 0x84 - 32 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM3 - - Common memory space timing register - 3 - 0x88 - 32 - read-write - 0xfcfcfcfc - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT3 - - Attribute memory space timing register - 3 - 0x8c - 32 - read-write - 0xfcfcfcfc - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - ECCR3 - - ECC result register 3 - 0x94 - 32 - read-only - 0x00000000 - - - ECCx - ECCx - 0 - 32 - - - - - PCR4 - - PC Card/NAND Flash control register - 4 - 0xa0 - 32 - read-write - 0x00000018 - - - ECCPS - ECCPS - 17 - 3 - - - TAR - TAR - 13 - 4 - - - TCLR - TCLR - 9 - 4 - - - ECCEN - ECCEN - 6 - 1 - - - PWID - PWID - 4 - 2 - - - PTYP - PTYP - 3 - 1 - - - PBKEN - PBKEN - 2 - 1 - - - PWAITEN - PWAITEN - 1 - 1 - - - - - SR4 - - FIFO status and interrupt register - 4 - 0xa4 - 32 - 0x00000040 - - - FEMPT - FEMPT - 6 - 1 - read-only - - - IFEN - IFEN - 5 - 1 - read-write - - - ILEN - ILEN - 4 - 1 - read-write - - - IREN - IREN - 3 - 1 - read-write - - - IFS - IFS - 2 - 1 - read-write - - - ILS - ILS - 1 - 1 - read-write - - - IRS - IRS - 0 - 1 - read-write - - - - - PMEM4 - - Common memory space timing register - 4 - 0xa8 - 32 - read-write - 0xfcfcfcfc - - - MEMHIZx - MEMHIZx - 24 - 8 - - - MEMHOLDx - MEMHOLDx - 16 - 8 - - - MEMWAITx - MEMWAITx - 8 - 8 - - - MEMSETx - MEMSETx - 0 - 8 - - - - - PATT4 - - Attribute memory space timing register - 4 - 0xac - 32 - read-write - 0xfcfcfcfc - - - ATTHIZx - ATTHIZx - 24 - 8 - - - ATTHOLDx - ATTHOLDx - 16 - 8 - - - ATTWAITx - ATTWAITx - 8 - 8 - - - ATTSETx - ATTSETx - 0 - 8 - - - - - PIO4 - - I/O space timing register 4 - 0xb0 - 32 - read-write - 0xfcfcfcfc - - - IOHIZx - IOHIZx - 24 - 8 - - - IOHOLDx - IOHOLDx - 16 - 8 - - - IOWAITx - IOWAITx - 8 - 8 - - - IOSETx - IOSETx - 0 - 8 - - - - - BWTR1 - - SRAM/NOR-Flash write timing registers - 1 - 0x104 - 32 - read-write - 0x0fffffff - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR2 - - SRAM/NOR-Flash write timing registers - 2 - 0x10c - 32 - read-write - 0x0fffffff - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR3 - - SRAM/NOR-Flash write timing registers - 3 - 0x114 - 32 - read-write - 0x0fffffff - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - BWTR4 - - SRAM/NOR-Flash write timing registers - 4 - 0x11c - 32 - read-write - 0x0fffffff - - - ACCMOD - ACCMOD - 28 - 2 - - - DATLAT - DATLAT - 24 - 4 - - - CLKDIV - CLKDIV - 20 - 4 - - - DATAST - DATAST - 8 - 8 - - - ADDHLD - ADDHLD - 4 - 4 - - - ADDSET - ADDSET - 0 - 4 - - - - - SDCR1 - - SDRAM Control Register 1 - 0x140 - 32 - read-write - 0x000002d0 - - - NC - Number of column address - bits - 0 - 2 - - - NR - Number of row address bits - 2 - 2 - - - MWID - Memory data bus width - 4 - 2 - - - NB - Number of internal banks - 6 - 1 - - - CAS - CAS latency - 7 - 2 - - - WP - Write protection - 9 - 1 - - - SDCLK - SDRAM clock configuration - 10 - 2 - - - RBURST - Burst read - 12 - 1 - - - RPIPE - Read pipe - 13 - 2 - - - - - SDCR2 - - SDRAM Control Register 2 - 0x144 - 32 - read-write - 0x000002d0 - - - NC - Number of column address - bits - 0 - 2 - - - NR - Number of row address bits - 2 - 2 - - - MWID - Memory data bus width - 4 - 2 - - - NB - Number of internal banks - 6 - 1 - - - CAS - CAS latency - 7 - 2 - - - WP - Write protection - 9 - 1 - - - SDCLK - SDRAM clock configuration - 10 - 2 - - - RBURST - Burst read - 12 - 1 - - - RPIPE - Read pipe - 13 - 2 - - - - - SDTR1 - - SDRAM Timing register 1 - 0x148 - 32 - read-write - 0x0fffffff - - - TMRD - Load Mode Register to - Active - 0 - 4 - - - TXSR - Exit self-refresh delay - 4 - 4 - - - TRAS - Self refresh time - 8 - 4 - - - TRC - Row cycle delay - 12 - 4 - - - TWR - Recovery delay - 16 - 4 - - - TRP - Row precharge delay - 20 - 4 - - - TRCD - Row to column delay - 24 - 4 - - - - - SDTR2 - - SDRAM Timing register 2 - 0x14c - 32 - read-write - 0x0fffffff - - - TMRD - Load Mode Register to - Active - 0 - 4 - - - TXSR - Exit self-refresh delay - 4 - 4 - - - TRAS - Self refresh time - 8 - 4 - - - TRC - Row cycle delay - 12 - 4 - - - TWR - Recovery delay - 16 - 4 - - - TRP - Row precharge delay - 20 - 4 - - - TRCD - Row to column delay - 24 - 4 - - - - - SDCMR - - SDRAM Command Mode register - 0x150 - 32 - 0x00000000 - - - MODE - Command mode - 0 - 3 - write-only - - - CTB2 - Command target bank 2 - 3 - 1 - write-only - - - CTB1 - Command target bank 1 - 4 - 1 - write-only - - - NRFS - Number of Auto-refresh - 5 - 4 - read-write - - - MRD - Mode Register definition - 9 - 13 - read-write - - - - - SDRTR - - SDRAM Refresh Timer register - 0x154 - 32 - 0x00000000 - - - CRE - Clear Refresh error flag - 0 - 1 - write-only - - - COUNT - Refresh Timer Count - 1 - 13 - read-write - - - REIE - RES Interrupt Enable - 14 - 1 - read-write - - - - - SDSR - - SDRAM Status register - 0x158 - 32 - read-only - 0x00000000 - - - RE - Refresh error flag - 0 - 1 - - - MODES1 - Status Mode for Bank 1 - 1 - 2 - - - MODES2 - Status Mode for Bank 2 - 3 - 2 - - - BUSY - Busy status - 5 - 1 - - - - - - - DBG - Debug support - DBG - 0xe0042000 - - 0x0 - 0x400 - registers - - - - DBGMCU_IDCODE - DBGMCU_IDCODE - IDCODE - 0x0 - 32 - read-only - 0x10006411 - - - DEV_ID - DEV_ID - 0 - 12 - - - REV_ID - REV_ID - 16 - 16 - - - - - DBGMCU_CR - DBGMCU_CR - Control Register - 0x4 - 32 - read-write - 0x00000000 - - - DBG_SLEEP - DBG_SLEEP - 0 - 1 - - - DBG_STOP - DBG_STOP - 1 - 1 - - - DBG_STANDBY - DBG_STANDBY - 2 - 1 - - - TRACE_IOEN - TRACE_IOEN - 5 - 1 - - - TRACE_MODE - TRACE_MODE - 6 - 2 - - - - - DBGMCU_APB1_FZ - DBGMCU_APB1_FZ - Debug MCU APB1 Freeze registe - 0x8 - 32 - read-write - 0x00000000 - - - DBG_TIM2_STOP - DBG_TIM2_STOP - 0 - 1 - - - DBG_TIM3_STOP - DBG_TIM3 _STOP - 1 - 1 - - - DBG_TIM4_STOP - DBG_TIM4_STOP - 2 - 1 - - - DBG_TIM5_STOP - DBG_TIM5_STOP - 3 - 1 - - - DBG_TIM6_STOP - DBG_TIM6_STOP - 4 - 1 - - - DBG_TIM7_STOP - DBG_TIM7_STOP - 5 - 1 - - - DBG_TIM12_STOP - DBG_TIM12_STOP - 6 - 1 - - - DBG_TIM13_STOP - DBG_TIM13_STOP - 7 - 1 - - - DBG_TIM14_STOP - DBG_TIM14_STOP - 8 - 1 - - - DBG_WWDG_STOP - DBG_WWDG_STOP - 11 - 1 - - - DBG_IWDEG_STOP - DBG_IWDEG_STOP - 12 - 1 - - - DBG_J2C1_SMBUS_TIMEOUT - DBG_J2C1_SMBUS_TIMEOUT - 21 - 1 - - - DBG_J2C2_SMBUS_TIMEOUT - DBG_J2C2_SMBUS_TIMEOUT - 22 - 1 - - - DBG_J2C3SMBUS_TIMEOUT - DBG_J2C3SMBUS_TIMEOUT - 23 - 1 - - - DBG_CAN1_STOP - DBG_CAN1_STOP - 25 - 1 - - - DBG_CAN2_STOP - DBG_CAN2_STOP - 26 - 1 - - - - - DBGMCU_APB2_FZ - DBGMCU_APB2_FZ - Debug MCU APB2 Freeze registe - 0xc - 32 - read-write - 0x00000000 - - - DBG_TIM1_STOP - TIM1 counter stopped when core is - halted - 0 - 1 - - - DBG_TIM8_STOP - TIM8 counter stopped when core is - halted - 1 - 1 - - - DBG_TIM9_STOP - TIM9 counter stopped when core is - halted - 16 - 1 - - - DBG_TIM10_STOP - TIM10 counter stopped when core is - halted - 17 - 1 - - - DBG_TIM11_STOP - TIM11 counter stopped when core is - halted - 18 - 1 - - - - - - - DMA2 - DMA controller - DMA - 0x40026400 - - 0x0 - 0x400 - registers - - - DMA2_Stream0 - DMA2 Stream0 global interrupt - 56 - - - DMA2_Stream1 - DMA2 Stream1 global interrupt - 57 - - - DMA2_Stream2 - DMA2 Stream2 global interrupt - 58 - - - DMA2_Stream3 - DMA2 Stream3 global interrupt - 59 - - - DMA2_Stream4 - DMA2 Stream4 global interrupt - 60 - - - DMA2_Stream5 - DMA2 Stream5 global interrupt - 68 - - - DMA2_Stream6 - DMA2 Stream6 global interrupt - 69 - - - DMA2_Stream7 - DMA2 Stream7 global interrupt - 70 - - - - LISR - - low interrupt status register - 0x0 - 32 - read-only - 0x00000000 - - - TCIF3 - Stream x transfer complete interrupt - flag (x = 3..0) - 27 - 1 - - - HTIF3 - Stream x half transfer interrupt flag - (x=3..0) - 26 - 1 - - - TEIF3 - Stream x transfer error interrupt flag - (x=3..0) - 25 - 1 - - - DMEIF3 - Stream x direct mode error interrupt - flag (x=3..0) - 24 - 1 - - - FEIF3 - Stream x FIFO error interrupt flag - (x=3..0) - 22 - 1 - - - TCIF2 - Stream x transfer complete interrupt - flag (x = 3..0) - 21 - 1 - - - HTIF2 - Stream x half transfer interrupt flag - (x=3..0) - 20 - 1 - - - TEIF2 - Stream x transfer error interrupt flag - (x=3..0) - 19 - 1 - - - DMEIF2 - Stream x direct mode error interrupt - flag (x=3..0) - 18 - 1 - - - FEIF2 - Stream x FIFO error interrupt flag - (x=3..0) - 16 - 1 - - - TCIF1 - Stream x transfer complete interrupt - flag (x = 3..0) - 11 - 1 - - - HTIF1 - Stream x half transfer interrupt flag - (x=3..0) - 10 - 1 - - - TEIF1 - Stream x transfer error interrupt flag - (x=3..0) - 9 - 1 - - - DMEIF1 - Stream x direct mode error interrupt - flag (x=3..0) - 8 - 1 - - - FEIF1 - Stream x FIFO error interrupt flag - (x=3..0) - 6 - 1 - - - TCIF0 - Stream x transfer complete interrupt - flag (x = 3..0) - 5 - 1 - - - HTIF0 - Stream x half transfer interrupt flag - (x=3..0) - 4 - 1 - - - TEIF0 - Stream x transfer error interrupt flag - (x=3..0) - 3 - 1 - - - DMEIF0 - Stream x direct mode error interrupt - flag (x=3..0) - 2 - 1 - - - FEIF0 - Stream x FIFO error interrupt flag - (x=3..0) - 0 - 1 - - - - - HISR - - high interrupt status register - 0x4 - 32 - read-only - 0x00000000 - - - TCIF7 - Stream x transfer complete interrupt - flag (x=7..4) - 27 - 1 - - - HTIF7 - Stream x half transfer interrupt flag - (x=7..4) - 26 - 1 - - - TEIF7 - Stream x transfer error interrupt flag - (x=7..4) - 25 - 1 - - - DMEIF7 - Stream x direct mode error interrupt - flag (x=7..4) - 24 - 1 - - - FEIF7 - Stream x FIFO error interrupt flag - (x=7..4) - 22 - 1 - - - TCIF6 - Stream x transfer complete interrupt - flag (x=7..4) - 21 - 1 - - - HTIF6 - Stream x half transfer interrupt flag - (x=7..4) - 20 - 1 - - - TEIF6 - Stream x transfer error interrupt flag - (x=7..4) - 19 - 1 - - - DMEIF6 - Stream x direct mode error interrupt - flag (x=7..4) - 18 - 1 - - - FEIF6 - Stream x FIFO error interrupt flag - (x=7..4) - 16 - 1 - - - TCIF5 - Stream x transfer complete interrupt - flag (x=7..4) - 11 - 1 - - - HTIF5 - Stream x half transfer interrupt flag - (x=7..4) - 10 - 1 - - - TEIF5 - Stream x transfer error interrupt flag - (x=7..4) - 9 - 1 - - - DMEIF5 - Stream x direct mode error interrupt - flag (x=7..4) - 8 - 1 - - - FEIF5 - Stream x FIFO error interrupt flag - (x=7..4) - 6 - 1 - - - TCIF4 - Stream x transfer complete interrupt - flag (x=7..4) - 5 - 1 - - - HTIF4 - Stream x half transfer interrupt flag - (x=7..4) - 4 - 1 - - - TEIF4 - Stream x transfer error interrupt flag - (x=7..4) - 3 - 1 - - - DMEIF4 - Stream x direct mode error interrupt - flag (x=7..4) - 2 - 1 - - - FEIF4 - Stream x FIFO error interrupt flag - (x=7..4) - 0 - 1 - - - - - LIFCR - - low interrupt flag clear - register - 0x8 - 32 - read-write - 0x00000000 - - - CTCIF3 - Stream x clear transfer complete - interrupt flag (x = 3..0) - 27 - 1 - - - CHTIF3 - Stream x clear half transfer interrupt - flag (x = 3..0) - 26 - 1 - - - CTEIF3 - Stream x clear transfer error interrupt - flag (x = 3..0) - 25 - 1 - - - CDMEIF3 - Stream x clear direct mode error - interrupt flag (x = 3..0) - 24 - 1 - - - CFEIF3 - Stream x clear FIFO error interrupt flag - (x = 3..0) - 22 - 1 - - - CTCIF2 - Stream x clear transfer complete - interrupt flag (x = 3..0) - 21 - 1 - - - CHTIF2 - Stream x clear half transfer interrupt - flag (x = 3..0) - 20 - 1 - - - CTEIF2 - Stream x clear transfer error interrupt - flag (x = 3..0) - 19 - 1 - - - CDMEIF2 - Stream x clear direct mode error - interrupt flag (x = 3..0) - 18 - 1 - - - CFEIF2 - Stream x clear FIFO error interrupt flag - (x = 3..0) - 16 - 1 - - - CTCIF1 - Stream x clear transfer complete - interrupt flag (x = 3..0) - 11 - 1 - - - CHTIF1 - Stream x clear half transfer interrupt - flag (x = 3..0) - 10 - 1 - - - CTEIF1 - Stream x clear transfer error interrupt - flag (x = 3..0) - 9 - 1 - - - CDMEIF1 - Stream x clear direct mode error - interrupt flag (x = 3..0) - 8 - 1 - - - CFEIF1 - Stream x clear FIFO error interrupt flag - (x = 3..0) - 6 - 1 - - - CTCIF0 - Stream x clear transfer complete - interrupt flag (x = 3..0) - 5 - 1 - - - CHTIF0 - Stream x clear half transfer interrupt - flag (x = 3..0) - 4 - 1 - - - CTEIF0 - Stream x clear transfer error interrupt - flag (x = 3..0) - 3 - 1 - - - CDMEIF0 - Stream x clear direct mode error - interrupt flag (x = 3..0) - 2 - 1 - - - CFEIF0 - Stream x clear FIFO error interrupt flag - (x = 3..0) - 0 - 1 - - - - - HIFCR - - high interrupt flag clear - register - 0xc - 32 - read-write - 0x00000000 - - - CTCIF7 - Stream x clear transfer complete - interrupt flag (x = 7..4) - 27 - 1 - - - CHTIF7 - Stream x clear half transfer interrupt - flag (x = 7..4) - 26 - 1 - - - CTEIF7 - Stream x clear transfer error interrupt - flag (x = 7..4) - 25 - 1 - - - CDMEIF7 - Stream x clear direct mode error - interrupt flag (x = 7..4) - 24 - 1 - - - CFEIF7 - Stream x clear FIFO error interrupt flag - (x = 7..4) - 22 - 1 - - - CTCIF6 - Stream x clear transfer complete - interrupt flag (x = 7..4) - 21 - 1 - - - CHTIF6 - Stream x clear half transfer interrupt - flag (x = 7..4) - 20 - 1 - - - CTEIF6 - Stream x clear transfer error interrupt - flag (x = 7..4) - 19 - 1 - - - CDMEIF6 - Stream x clear direct mode error - interrupt flag (x = 7..4) - 18 - 1 - - - CFEIF6 - Stream x clear FIFO error interrupt flag - (x = 7..4) - 16 - 1 - - - CTCIF5 - Stream x clear transfer complete - interrupt flag (x = 7..4) - 11 - 1 - - - CHTIF5 - Stream x clear half transfer interrupt - flag (x = 7..4) - 10 - 1 - - - CTEIF5 - Stream x clear transfer error interrupt - flag (x = 7..4) - 9 - 1 - - - CDMEIF5 - Stream x clear direct mode error - interrupt flag (x = 7..4) - 8 - 1 - - - CFEIF5 - Stream x clear FIFO error interrupt flag - (x = 7..4) - 6 - 1 - - - CTCIF4 - Stream x clear transfer complete - interrupt flag (x = 7..4) - 5 - 1 - - - CHTIF4 - Stream x clear half transfer interrupt - flag (x = 7..4) - 4 - 1 - - - CTEIF4 - Stream x clear transfer error interrupt - flag (x = 7..4) - 3 - 1 - - - CDMEIF4 - Stream x clear direct mode error - interrupt flag (x = 7..4) - 2 - 1 - - - CFEIF4 - Stream x clear FIFO error interrupt flag - (x = 7..4) - 0 - 1 - - - - - S0CR - - stream x configuration - register - 0x10 - 32 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S0NDTR - - stream x number of data - register - 0x14 - 32 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S0PAR - - stream x peripheral address - register - 0x18 - 32 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S0M0AR - - stream x memory 0 address - register - 0x1c - 32 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S0M1AR - - stream x memory 1 address - register - 0x20 - 32 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S0FCR - - stream x FIFO control register - 0x24 - 32 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S1CR - - stream x configuration - register - 0x28 - 32 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S1NDTR - - stream x number of data - register - 0x2c - 32 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S1PAR - - stream x peripheral address - register - 0x30 - 32 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S1M0AR - - stream x memory 0 address - register - 0x34 - 32 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S1M1AR - - stream x memory 1 address - register - 0x38 - 32 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S1FCR - - stream x FIFO control register - 0x3c - 32 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S2CR - - stream x configuration - register - 0x40 - 32 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S2NDTR - - stream x number of data - register - 0x44 - 32 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S2PAR - - stream x peripheral address - register - 0x48 - 32 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S2M0AR - - stream x memory 0 address - register - 0x4c - 32 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S2M1AR - - stream x memory 1 address - register - 0x50 - 32 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S2FCR - - stream x FIFO control register - 0x54 - 32 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S3CR - - stream x configuration - register - 0x58 - 32 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S3NDTR - - stream x number of data - register - 0x5c - 32 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S3PAR - - stream x peripheral address - register - 0x60 - 32 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S3M0AR - - stream x memory 0 address - register - 0x64 - 32 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S3M1AR - - stream x memory 1 address - register - 0x68 - 32 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S3FCR - - stream x FIFO control register - 0x6c - 32 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S4CR - - stream x configuration - register - 0x70 - 32 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S4NDTR - - stream x number of data - register - 0x74 - 32 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S4PAR - - stream x peripheral address - register - 0x78 - 32 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S4M0AR - - stream x memory 0 address - register - 0x7c - 32 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S4M1AR - - stream x memory 1 address - register - 0x80 - 32 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S4FCR - - stream x FIFO control register - 0x84 - 32 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S5CR - - stream x configuration - register - 0x88 - 32 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S5NDTR - - stream x number of data - register - 0x8c - 32 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S5PAR - - stream x peripheral address - register - 0x90 - 32 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S5M0AR - - stream x memory 0 address - register - 0x94 - 32 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S5M1AR - - stream x memory 1 address - register - 0x98 - 32 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S5FCR - - stream x FIFO control register - 0x9c - 32 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S6CR - - stream x configuration - register - 0xa0 - 32 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S6NDTR - - stream x number of data - register - 0xa4 - 32 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S6PAR - - stream x peripheral address - register - 0xa8 - 32 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S6M0AR - - stream x memory 0 address - register - 0xac - 32 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S6M1AR - - stream x memory 1 address - register - 0xb0 - 32 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S6FCR - - stream x FIFO control register - 0xb4 - 32 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - S7CR - - stream x configuration - register - 0xb8 - 32 - read-write - 0x00000000 - - - CHSEL - Channel selection - 25 - 3 - - - MBURST - Memory burst transfer - configuration - 23 - 2 - - - PBURST - Peripheral burst transfer - configuration - 21 - 2 - - - ACK - ACK - 20 - 1 - - - CT - Current target (only in double buffer - mode) - 19 - 1 - - - DBM - Double buffer mode - 18 - 1 - - - PL - Priority level - 16 - 2 - - - PINCOS - Peripheral increment offset - size - 15 - 1 - - - MSIZE - Memory data size - 13 - 2 - - - PSIZE - Peripheral data size - 11 - 2 - - - MINC - Memory increment mode - 10 - 1 - - - PINC - Peripheral increment mode - 9 - 1 - - - CIRC - Circular mode - 8 - 1 - - - DIR - Data transfer direction - 6 - 2 - - - PFCTRL - Peripheral flow controller - 5 - 1 - - - TCIE - Transfer complete interrupt - enable - 4 - 1 - - - HTIE - Half transfer interrupt - enable - 3 - 1 - - - TEIE - Transfer error interrupt - enable - 2 - 1 - - - DMEIE - Direct mode error interrupt - enable - 1 - 1 - - - EN - Stream enable / flag stream ready when - read low - 0 - 1 - - - - - S7NDTR - - stream x number of data - register - 0xbc - 32 - read-write - 0x00000000 - - - NDT - Number of data items to - transfer - 0 - 16 - - - - - S7PAR - - stream x peripheral address - register - 0xc0 - 32 - read-write - 0x00000000 - - - PA - Peripheral address - 0 - 32 - - - - - S7M0AR - - stream x memory 0 address - register - 0xc4 - 32 - read-write - 0x00000000 - - - M0A - Memory 0 address - 0 - 32 - - - - - S7M1AR - - stream x memory 1 address - register - 0xc8 - 32 - read-write - 0x00000000 - - - M1A - Memory 1 address (used in case of Double - buffer mode) - 0 - 32 - - - - - S7FCR - - stream x FIFO control register - 0xcc - 32 - 0x00000021 - - - FEIE - FIFO error interrupt - enable - 7 - 1 - read-write - - - FS - FIFO status - 3 - 3 - read-only - - - DMDIS - Direct mode disable - 2 - 1 - read-write - - - FTH - FIFO threshold selection - 0 - 2 - read-write - - - - - - - DMA1 - 0x40026000 - - DMA1_Stream0 - DMA1 Stream0 global interrupt - 11 - - - DMA1_Stream1 - DMA1 Stream1 global interrupt - 12 - - - DMA1_Stream2 - DMA1 Stream2 global interrupt - 13 - - - DMA1_Stream3 - DMA1 Stream3 global interrupt - 14 - - - DMA1_Stream4 - DMA1 Stream4 global interrupt - 15 - - - DMA1_Stream5 - DMA1 Stream5 global interrupt - 16 - - - DMA1_Stream6 - DMA1 Stream6 global interrupt - 17 - - - DMA1_Stream7 - DMA1 Stream7 global interrupt - 47 - - - - RCC - Reset and clock control - RCC - 0x40023800 - - 0x0 - 0x400 - registers - - - RCC - RCC global interrupt - 5 - - - - CR - - clock control register - 0x0 - 32 - 0x00000083 - - - PLLI2SRDY - PLLI2S clock ready flag - 27 - 1 - read-only - - - PLLI2SON - PLLI2S enable - 26 - 1 - read-write - - - PLLRDY - Main PLL (PLL) clock ready - flag - 25 - 1 - read-only - - - PLLON - Main PLL (PLL) enable - 24 - 1 - read-write - - - CSSON - Clock security system - enable - 19 - 1 - read-write - - - HSEBYP - HSE clock bypass - 18 - 1 - read-write - - - HSERDY - HSE clock ready flag - 17 - 1 - read-only - - - HSEON - HSE clock enable - 16 - 1 - read-write - - - HSICAL - Internal high-speed clock - calibration - 8 - 8 - read-only - - - HSITRIM - Internal high-speed clock - trimming - 3 - 5 - read-write - - - HSIRDY - Internal high-speed clock ready - flag - 1 - 1 - read-only - - - HSION - Internal high-speed clock - enable - 0 - 1 - read-write - - - - - PLLCFGR - - PLL configuration register - 0x4 - 32 - read-write - 0x24003010 - - - PLLQ3 - Main PLL (PLL) division factor for USB - OTG FS, SDIO and random number generator - clocks - 27 - 1 - - - PLLQ2 - Main PLL (PLL) division factor for USB - OTG FS, SDIO and random number generator - clocks - 26 - 1 - - - PLLQ1 - Main PLL (PLL) division factor for USB - OTG FS, SDIO and random number generator - clocks - 25 - 1 - - - PLLQ0 - Main PLL (PLL) division factor for USB - OTG FS, SDIO and random number generator - clocks - 24 - 1 - - - PLLSRC - Main PLL(PLL) and audio PLL (PLLI2S) - entry clock source - 22 - 1 - - - PLLP1 - Main PLL (PLL) division factor for main - system clock - 17 - 1 - - - PLLP0 - Main PLL (PLL) division factor for main - system clock - 16 - 1 - - - PLLN8 - Main PLL (PLL) multiplication factor for - VCO - 14 - 1 - - - PLLN7 - Main PLL (PLL) multiplication factor for - VCO - 13 - 1 - - - PLLN6 - Main PLL (PLL) multiplication factor for - VCO - 12 - 1 - - - PLLN5 - Main PLL (PLL) multiplication factor for - VCO - 11 - 1 - - - PLLN4 - Main PLL (PLL) multiplication factor for - VCO - 10 - 1 - - - PLLN3 - Main PLL (PLL) multiplication factor for - VCO - 9 - 1 - - - PLLN2 - Main PLL (PLL) multiplication factor for - VCO - 8 - 1 - - - PLLN1 - Main PLL (PLL) multiplication factor for - VCO - 7 - 1 - - - PLLN0 - Main PLL (PLL) multiplication factor for - VCO - 6 - 1 - - - PLLM5 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 5 - 1 - - - PLLM4 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 4 - 1 - - - PLLM3 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 3 - 1 - - - PLLM2 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 2 - 1 - - - PLLM1 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 1 - 1 - - - PLLM0 - Division factor for the main PLL (PLL) - and audio PLL (PLLI2S) input clock - 0 - 1 - - - - - CFGR - - clock configuration register - 0x8 - 32 - 0x00000000 - - - MCO2 - Microcontroller clock output - 2 - 30 - 2 - read-write - - - MCO2PRE - MCO2 prescaler - 27 - 3 - read-write - - - MCO1PRE - MCO1 prescaler - 24 - 3 - read-write - - - I2SSRC - I2S clock selection - 23 - 1 - read-write - - - MCO1 - Microcontroller clock output - 1 - 21 - 2 - read-write - - - RTCPRE - HSE division factor for RTC - clock - 16 - 5 - read-write - - - PPRE2 - APB high-speed prescaler - (APB2) - 13 - 3 - read-write - - - PPRE1 - APB Low speed prescaler - (APB1) - 10 - 3 - read-write - - - HPRE - AHB prescaler - 4 - 4 - read-write - - - SWS1 - System clock switch status - 3 - 1 - read-only - - - SWS0 - System clock switch status - 2 - 1 - read-only - - - SW1 - System clock switch - 1 - 1 - read-write - - - SW0 - System clock switch - 0 - 1 - read-write - - - - - CIR - - clock interrupt register - 0xc - 32 - 0x00000000 - - - CSSC - Clock security system interrupt - clear - 23 - 1 - write-only - - - PLLSAIRDYC - PLLSAI Ready Interrupt - Clear - 22 - 1 - write-only - - - PLLI2SRDYC - PLLI2S ready interrupt - clear - 21 - 1 - write-only - - - PLLRDYC - Main PLL(PLL) ready interrupt - clear - 20 - 1 - write-only - - - HSERDYC - HSE ready interrupt clear - 19 - 1 - write-only - - - HSIRDYC - HSI ready interrupt clear - 18 - 1 - write-only - - - LSERDYC - LSE ready interrupt clear - 17 - 1 - write-only - - - LSIRDYC - LSI ready interrupt clear - 16 - 1 - write-only - - - PLLSAIRDYIE - PLLSAI Ready Interrupt - Enable - 14 - 1 - read-write - - - PLLI2SRDYIE - PLLI2S ready interrupt - enable - 13 - 1 - read-write - - - PLLRDYIE - Main PLL (PLL) ready interrupt - enable - 12 - 1 - read-write - - - HSERDYIE - HSE ready interrupt enable - 11 - 1 - read-write - - - HSIRDYIE - HSI ready interrupt enable - 10 - 1 - read-write - - - LSERDYIE - LSE ready interrupt enable - 9 - 1 - read-write - - - LSIRDYIE - LSI ready interrupt enable - 8 - 1 - read-write - - - CSSF - Clock security system interrupt - flag - 7 - 1 - read-only - - - PLLSAIRDYF - PLLSAI ready interrupt - flag - 6 - 1 - read-only - - - PLLI2SRDYF - PLLI2S ready interrupt - flag - 5 - 1 - read-only - - - PLLRDYF - Main PLL (PLL) ready interrupt - flag - 4 - 1 - read-only - - - HSERDYF - HSE ready interrupt flag - 3 - 1 - read-only - - - HSIRDYF - HSI ready interrupt flag - 2 - 1 - read-only - - - LSERDYF - LSE ready interrupt flag - 1 - 1 - read-only - - - LSIRDYF - LSI ready interrupt flag - 0 - 1 - read-only - - - - - AHB1RSTR - - AHB1 peripheral reset register - 0x10 - 32 - read-write - 0x00000000 - - - OTGHSRST - USB OTG HS module reset - 29 - 1 - - - ETHMACRST - Ethernet MAC reset - 25 - 1 - - - DMA2DRST - DMA2D reset - 23 - 1 - - - DMA2RST - DMA2 reset - 22 - 1 - - - DMA1RST - DMA2 reset - 21 - 1 - - - CRCRST - CRC reset - 12 - 1 - - - GPIOKRST - IO port K reset - 10 - 1 - - - GPIOJRST - IO port J reset - 9 - 1 - - - GPIOIRST - IO port I reset - 8 - 1 - - - GPIOHRST - IO port H reset - 7 - 1 - - - GPIOGRST - IO port G reset - 6 - 1 - - - GPIOFRST - IO port F reset - 5 - 1 - - - GPIOERST - IO port E reset - 4 - 1 - - - GPIODRST - IO port D reset - 3 - 1 - - - GPIOCRST - IO port C reset - 2 - 1 - - - GPIOBRST - IO port B reset - 1 - 1 - - - GPIOARST - IO port A reset - 0 - 1 - - - - - AHB2RSTR - - AHB2 peripheral reset register - 0x14 - 32 - read-write - 0x00000000 - - - OTGFSRST - USB OTG FS module reset - 7 - 1 - - - RNGRST - Random number generator module - reset - 6 - 1 - - - DCMIRST - Camera interface reset - 0 - 1 - - - - - AHB3RSTR - - AHB3 peripheral reset register - 0x18 - 32 - read-write - 0x00000000 - - - FMCRST - Flexible memory controller module - reset - 0 - 1 - - - - - APB1RSTR - - APB1 peripheral reset register - 0x20 - 32 - read-write - 0x00000000 - - - TIM2RST - TIM2 reset - 0 - 1 - - - TIM3RST - TIM3 reset - 1 - 1 - - - TIM4RST - TIM4 reset - 2 - 1 - - - TIM5RST - TIM5 reset - 3 - 1 - - - TIM6RST - TIM6 reset - 4 - 1 - - - TIM7RST - TIM7 reset - 5 - 1 - - - TIM12RST - TIM12 reset - 6 - 1 - - - TIM13RST - TIM13 reset - 7 - 1 - - - TIM14RST - TIM14 reset - 8 - 1 - - - WWDGRST - Window watchdog reset - 11 - 1 - - - SPI2RST - SPI 2 reset - 14 - 1 - - - SPI3RST - SPI 3 reset - 15 - 1 - - - UART2RST - USART 2 reset - 17 - 1 - - - UART3RST - USART 3 reset - 18 - 1 - - - UART4RST - USART 4 reset - 19 - 1 - - - UART5RST - USART 5 reset - 20 - 1 - - - I2C1RST - I2C 1 reset - 21 - 1 - - - I2C2RST - I2C 2 reset - 22 - 1 - - - I2C3RST - I2C3 reset - 23 - 1 - - - CAN1RST - CAN1 reset - 25 - 1 - - - CAN2RST - CAN2 reset - 26 - 1 - - - PWRRST - Power interface reset - 28 - 1 - - - DACRST - DAC reset - 29 - 1 - - - UART7RST - UART7 reset - 30 - 1 - - - UART8RST - UART8 reset - 31 - 1 - - - - - APB2RSTR - - APB2 peripheral reset register - 0x24 - 32 - read-write - 0x00000000 - - - TIM1RST - TIM1 reset - 0 - 1 - - - TIM8RST - TIM8 reset - 1 - 1 - - - USART1RST - USART1 reset - 4 - 1 - - - USART6RST - USART6 reset - 5 - 1 - - - ADCRST - ADC interface reset (common to all - ADCs) - 8 - 1 - - - SDIORST - SDIO reset - 11 - 1 - - - SPI1RST - SPI 1 reset - 12 - 1 - - - SPI4RST - SPI4 reset - 13 - 1 - - - SYSCFGRST - System configuration controller - reset - 14 - 1 - - - TIM9RST - TIM9 reset - 16 - 1 - - - TIM10RST - TIM10 reset - 17 - 1 - - - TIM11RST - TIM11 reset - 18 - 1 - - - SPI5RST - SPI5 reset - 20 - 1 - - - SPI6RST - SPI6 reset - 21 - 1 - - - SAI1RST - SAI1 reset - 22 - 1 - - - LTDCRST - LTDC reset - 26 - 1 - - - - - AHB1ENR - - AHB1 peripheral clock register - 0x30 - 32 - read-write - 0x00100000 - - - OTGHSULPIEN - USB OTG HSULPI clock - enable - 30 - 1 - - - OTGHSEN - USB OTG HS clock enable - 29 - 1 - - - ETHMACPTPEN - Ethernet PTP clock enable - 28 - 1 - - - ETHMACRXEN - Ethernet Reception clock - enable - 27 - 1 - - - ETHMACTXEN - Ethernet Transmission clock - enable - 26 - 1 - - - ETHMACEN - Ethernet MAC clock enable - 25 - 1 - - - DMA2DEN - DMA2D clock enable - 23 - 1 - - - DMA2EN - DMA2 clock enable - 22 - 1 - - - DMA1EN - DMA1 clock enable - 21 - 1 - - - CCMDATARAMEN - CCM data RAM clock enable - 20 - 1 - - - BKPSRAMEN - Backup SRAM interface clock - enable - 18 - 1 - - - CRCEN - CRC clock enable - 12 - 1 - - - GPIOKEN - IO port K clock enable - 10 - 1 - - - GPIOJEN - IO port J clock enable - 9 - 1 - - - GPIOIEN - IO port I clock enable - 8 - 1 - - - GPIOHEN - IO port H clock enable - 7 - 1 - - - GPIOGEN - IO port G clock enable - 6 - 1 - - - GPIOFEN - IO port F clock enable - 5 - 1 - - - GPIOEEN - IO port E clock enable - 4 - 1 - - - GPIODEN - IO port D clock enable - 3 - 1 - - - GPIOCEN - IO port C clock enable - 2 - 1 - - - GPIOBEN - IO port B clock enable - 1 - 1 - - - GPIOAEN - IO port A clock enable - 0 - 1 - - - - - AHB2ENR - - AHB2 peripheral clock enable - register - 0x34 - 32 - read-write - 0x00000000 - - - OTGFSEN - USB OTG FS clock enable - 7 - 1 - - - RNGEN - Random number generator clock - enable - 6 - 1 - - - DCMIEN - Camera interface enable - 0 - 1 - - - - - AHB3ENR - - AHB3 peripheral clock enable - register - 0x38 - 32 - read-write - 0x00000000 - - - FMCEN - Flexible memory controller module clock - enable - 0 - 1 - - - - - APB1ENR - - APB1 peripheral clock enable - register - 0x40 - 32 - read-write - 0x00000000 - - - TIM2EN - TIM2 clock enable - 0 - 1 - - - TIM3EN - TIM3 clock enable - 1 - 1 - - - TIM4EN - TIM4 clock enable - 2 - 1 - - - TIM5EN - TIM5 clock enable - 3 - 1 - - - TIM6EN - TIM6 clock enable - 4 - 1 - - - TIM7EN - TIM7 clock enable - 5 - 1 - - - TIM12EN - TIM12 clock enable - 6 - 1 - - - TIM13EN - TIM13 clock enable - 7 - 1 - - - TIM14EN - TIM14 clock enable - 8 - 1 - - - WWDGEN - Window watchdog clock - enable - 11 - 1 - - - SPI2EN - SPI2 clock enable - 14 - 1 - - - SPI3EN - SPI3 clock enable - 15 - 1 - - - USART2EN - USART 2 clock enable - 17 - 1 - - - USART3EN - USART3 clock enable - 18 - 1 - - - UART4EN - UART4 clock enable - 19 - 1 - - - UART5EN - UART5 clock enable - 20 - 1 - - - I2C1EN - I2C1 clock enable - 21 - 1 - - - I2C2EN - I2C2 clock enable - 22 - 1 - - - I2C3EN - I2C3 clock enable - 23 - 1 - - - CAN1EN - CAN 1 clock enable - 25 - 1 - - - CAN2EN - CAN 2 clock enable - 26 - 1 - - - PWREN - Power interface clock - enable - 28 - 1 - - - DACEN - DAC interface clock enable - 29 - 1 - - - UART7ENR - UART7 clock enable - 30 - 1 - - - UART8ENR - UART8 clock enable - 31 - 1 - - - - - APB2ENR - - APB2 peripheral clock enable - register - 0x44 - 32 - read-write - 0x00000000 - - - TIM1EN - TIM1 clock enable - 0 - 1 - - - TIM8EN - TIM8 clock enable - 1 - 1 - - - USART1EN - USART1 clock enable - 4 - 1 - - - USART6EN - USART6 clock enable - 5 - 1 - - - ADC1EN - ADC1 clock enable - 8 - 1 - - - ADC2EN - ADC2 clock enable - 9 - 1 - - - ADC3EN - ADC3 clock enable - 10 - 1 - - - SDIOEN - SDIO clock enable - 11 - 1 - - - SPI1EN - SPI1 clock enable - 12 - 1 - - - SPI4ENR - SPI4 clock enable - 13 - 1 - - - SYSCFGEN - System configuration controller clock - enable - 14 - 1 - - - TIM9EN - TIM9 clock enable - 16 - 1 - - - TIM10EN - TIM10 clock enable - 17 - 1 - - - TIM11EN - TIM11 clock enable - 18 - 1 - - - SPI5ENR - SPI5 clock enable - 20 - 1 - - - SPI6ENR - SPI6 clock enable - 21 - 1 - - - SAI1EN - SAI1 clock enable - 22 - 1 - - - LTDCEN - LTDC clock enable - 26 - 1 - - - - - AHB1LPENR - - AHB1 peripheral clock enable in low power - mode register - 0x50 - 32 - read-write - 0x7e6791ff - - - GPIOALPEN - IO port A clock enable during sleep - mode - 0 - 1 - - - GPIOBLPEN - IO port B clock enable during Sleep - mode - 1 - 1 - - - GPIOCLPEN - IO port C clock enable during Sleep - mode - 2 - 1 - - - GPIODLPEN - IO port D clock enable during Sleep - mode - 3 - 1 - - - GPIOELPEN - IO port E clock enable during Sleep - mode - 4 - 1 - - - GPIOFLPEN - IO port F clock enable during Sleep - mode - 5 - 1 - - - GPIOGLPEN - IO port G clock enable during Sleep - mode - 6 - 1 - - - GPIOHLPEN - IO port H clock enable during Sleep - mode - 7 - 1 - - - GPIOILPEN - IO port I clock enable during Sleep - mode - 8 - 1 - - - GPIOJLPEN - IO port J clock enable during Sleep - mode - 9 - 1 - - - GPIOKLPEN - IO port K clock enable during Sleep - mode - 10 - 1 - - - CRCLPEN - CRC clock enable during Sleep - mode - 12 - 1 - - - FLITFLPEN - Flash interface clock enable during - Sleep mode - 15 - 1 - - - SRAM1LPEN - SRAM 1interface clock enable during - Sleep mode - 16 - 1 - - - SRAM2LPEN - SRAM 2 interface clock enable during - Sleep mode - 17 - 1 - - - BKPSRAMLPEN - Backup SRAM interface clock enable - during Sleep mode - 18 - 1 - - - SRAM3LPEN - SRAM 3 interface clock enable during - Sleep mode - 19 - 1 - - - DMA1LPEN - DMA1 clock enable during Sleep - mode - 21 - 1 - - - DMA2LPEN - DMA2 clock enable during Sleep - mode - 22 - 1 - - - DMA2DLPEN - DMA2D clock enable during Sleep - mode - 23 - 1 - - - ETHMACLPEN - Ethernet MAC clock enable during Sleep - mode - 25 - 1 - - - ETHMACTXLPEN - Ethernet transmission clock enable - during Sleep mode - 26 - 1 - - - ETHMACRXLPEN - Ethernet reception clock enable during - Sleep mode - 27 - 1 - - - ETHMACPTPLPEN - Ethernet PTP clock enable during Sleep - mode - 28 - 1 - - - OTGHSLPEN - USB OTG HS clock enable during Sleep - mode - 29 - 1 - - - OTGHSULPILPEN - USB OTG HS ULPI clock enable during - Sleep mode - 30 - 1 - - - - - AHB2LPENR - - AHB2 peripheral clock enable in low power - mode register - 0x54 - 32 - read-write - 0x000000f1 - - - OTGFSLPEN - USB OTG FS clock enable during Sleep - mode - 7 - 1 - - - RNGLPEN - Random number generator clock enable - during Sleep mode - 6 - 1 - - - DCMILPEN - Camera interface enable during Sleep - mode - 0 - 1 - - - - - AHB3LPENR - - AHB3 peripheral clock enable in low power - mode register - 0x58 - 32 - read-write - 0x00000001 - - - FMCLPEN - Flexible memory controller module clock - enable during Sleep mode - 0 - 1 - - - - - APB1LPENR - - APB1 peripheral clock enable in low power - mode register - 0x60 - 32 - read-write - 0x36fec9ff - - - TIM2LPEN - TIM2 clock enable during Sleep - mode - 0 - 1 - - - TIM3LPEN - TIM3 clock enable during Sleep - mode - 1 - 1 - - - TIM4LPEN - TIM4 clock enable during Sleep - mode - 2 - 1 - - - TIM5LPEN - TIM5 clock enable during Sleep - mode - 3 - 1 - - - TIM6LPEN - TIM6 clock enable during Sleep - mode - 4 - 1 - - - TIM7LPEN - TIM7 clock enable during Sleep - mode - 5 - 1 - - - TIM12LPEN - TIM12 clock enable during Sleep - mode - 6 - 1 - - - TIM13LPEN - TIM13 clock enable during Sleep - mode - 7 - 1 - - - TIM14LPEN - TIM14 clock enable during Sleep - mode - 8 - 1 - - - WWDGLPEN - Window watchdog clock enable during - Sleep mode - 11 - 1 - - - SPI2LPEN - SPI2 clock enable during Sleep - mode - 14 - 1 - - - SPI3LPEN - SPI3 clock enable during Sleep - mode - 15 - 1 - - - USART2LPEN - USART2 clock enable during Sleep - mode - 17 - 1 - - - USART3LPEN - USART3 clock enable during Sleep - mode - 18 - 1 - - - UART4LPEN - UART4 clock enable during Sleep - mode - 19 - 1 - - - UART5LPEN - UART5 clock enable during Sleep - mode - 20 - 1 - - - I2C1LPEN - I2C1 clock enable during Sleep - mode - 21 - 1 - - - I2C2LPEN - I2C2 clock enable during Sleep - mode - 22 - 1 - - - I2C3LPEN - I2C3 clock enable during Sleep - mode - 23 - 1 - - - CAN1LPEN - CAN 1 clock enable during Sleep - mode - 25 - 1 - - - CAN2LPEN - CAN 2 clock enable during Sleep - mode - 26 - 1 - - - PWRLPEN - Power interface clock enable during - Sleep mode - 28 - 1 - - - DACLPEN - DAC interface clock enable during Sleep - mode - 29 - 1 - - - UART7LPEN - UART7 clock enable during Sleep - mode - 30 - 1 - - - UART8LPEN - UART8 clock enable during Sleep - mode - 31 - 1 - - - - - APB2LPENR - - APB2 peripheral clock enabled in low power - mode register - 0x64 - 32 - read-write - 0x00075f33 - - - TIM1LPEN - TIM1 clock enable during Sleep - mode - 0 - 1 - - - TIM8LPEN - TIM8 clock enable during Sleep - mode - 1 - 1 - - - USART1LPEN - USART1 clock enable during Sleep - mode - 4 - 1 - - - USART6LPEN - USART6 clock enable during Sleep - mode - 5 - 1 - - - ADC1LPEN - ADC1 clock enable during Sleep - mode - 8 - 1 - - - ADC2LPEN - ADC2 clock enable during Sleep - mode - 9 - 1 - - - ADC3LPEN - ADC 3 clock enable during Sleep - mode - 10 - 1 - - - SDIOLPEN - SDIO clock enable during Sleep - mode - 11 - 1 - - - SPI1LPEN - SPI 1 clock enable during Sleep - mode - 12 - 1 - - - SPI4LPEN - SPI 4 clock enable during Sleep - mode - 13 - 1 - - - SYSCFGLPEN - System configuration controller clock - enable during Sleep mode - 14 - 1 - - - TIM9LPEN - TIM9 clock enable during sleep - mode - 16 - 1 - - - TIM10LPEN - TIM10 clock enable during Sleep - mode - 17 - 1 - - - TIM11LPEN - TIM11 clock enable during Sleep - mode - 18 - 1 - - - SPI5LPEN - SPI 5 clock enable during Sleep - mode - 20 - 1 - - - SPI6LPEN - SPI 6 clock enable during Sleep - mode - 21 - 1 - - - SAI1LPEN - SAI1 clock enable - 22 - 1 - - - LTDCLPEN - LTDC clock enable - 26 - 1 - - - - - BDCR - - Backup domain control register - 0x70 - 32 - 0x00000000 - - - BDRST - Backup domain software - reset - 16 - 1 - read-write - - - RTCEN - RTC clock enable - 15 - 1 - read-write - - - RTCSEL1 - RTC clock source selection - 9 - 1 - read-write - - - RTCSEL0 - RTC clock source selection - 8 - 1 - read-write - - - LSEBYP - External low-speed oscillator - bypass - 2 - 1 - read-write - - - LSERDY - External low-speed oscillator - ready - 1 - 1 - read-only - - - LSEON - External low-speed oscillator - enable - 0 - 1 - read-write - - - - - CSR - - clock control & status - register - 0x74 - 32 - 0x0e000000 - - - LPWRRSTF - Low-power reset flag - 31 - 1 - read-write - - - WWDGRSTF - Window watchdog reset flag - 30 - 1 - read-write - - - WDGRSTF - Independent watchdog reset - flag - 29 - 1 - read-write - - - SFTRSTF - Software reset flag - 28 - 1 - read-write - - - PORRSTF - POR/PDR reset flag - 27 - 1 - read-write - - - PADRSTF - PIN reset flag - 26 - 1 - read-write - - - BORRSTF - BOR reset flag - 25 - 1 - read-write - - - RMVF - Remove reset flag - 24 - 1 - read-write - - - LSIRDY - Internal low-speed oscillator - ready - 1 - 1 - read-only - - - LSION - Internal low-speed oscillator - enable - 0 - 1 - read-write - - - - - SSCGR - - spread spectrum clock generation - register - 0x80 - 32 - read-write - 0x00000000 - - - SSCGEN - Spread spectrum modulation - enable - 31 - 1 - - - SPREADSEL - Spread Select - 30 - 1 - - - INCSTEP - Incrementation step - 13 - 15 - - - MODPER - Modulation period - 0 - 13 - - - - - PLLI2SCFGR - - PLLI2S configuration register - 0x84 - 32 - read-write - 0x20003000 - - - PLLI2SR - PLLI2S division factor for I2S - clocks - 28 - 3 - - - PLLI2SQ - PLLI2S division factor for SAI1 - clock - 24 - 4 - - - PLLI2SN - PLLI2S multiplication factor for - VCO - 6 - 9 - - - - - PLLSAICFGR - - PLLSAICFGR - 0x88 - 32 - read-write - 0x24003000 - - - PLLSAIN - PLLSAIN - 6 - 9 - - - PLLSAIQ - PLLSAIN - 24 - 4 - - - PLLSAIR - PLLSAIN - 28 - 3 - - - - - DCKCFGR - - DCKCFGR - 0x8c - 32 - read-write - 0x00000000 - - - PLLI2SDIVQ - PLLI2SDIVQ - 0 - 5 - - - PLLSAIDIVQ - PLLSAIDIVQ - 8 - 5 - - - PLLSAIDIVR - PLLSAIDIVR - 16 - 2 - - - SAI1ASRC - SAI1ASRC - 20 - 2 - - - SAI1BSRC - SAI1BSRC - 22 - 2 - - - TIMPRE - TIMPRE - 24 - 1 - - - - - - - - GPIOK - General-purpose I/Os - GPIO - 0x40022800 - - 0x0 - 0x400 - registers - - - - MODER - - GPIO port mode register - 0x0 - 32 - read-write - 0x00000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - - GPIO port output type register - 0x4 - 32 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - - GPIO port output speed - register - 0x8 - 32 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - - GPIO port pull-up/pull-down - register - 0xc - 32 - read-write - 0x00000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - - GPIO port input data register - 0x10 - 32 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - - GPIO port output data register - 0x14 - 32 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - - GPIO port bit set/reset - register - 0x18 - 32 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - - GPIO port configuration lock - register - 0x1c - 32 - read-write - 0x00000000 - - - LCKK - Port x lock bit y (y= - 0..15) - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - - GPIO alternate function low - register - 0x20 - 32 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - - GPIO alternate function high - register - 0x24 - 32 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - - - GPIOJ - 0x40022400 - - - GPIOI - 0x40022000 - - - GPIOH - 0x40021c00 - - - GPIOG - 0x40021800 - - - GPIOF - 0x40021400 - - - GPIOE - 0x40021000 - - - GPIOD - 0X40020C00 - - - GPIOC - 0x40020800 - - - GPIOB - General-purpose I/Os - GPIO - 0x40020400 - - 0x0 - 0x400 - registers - - - - MODER - - GPIO port mode register - 0x0 - 32 - read-write - 0x00000280 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - - GPIO port output type register - 0x4 - 32 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - - GPIO port output speed - register - 0x8 - 32 - read-write - 0x000000c0 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - - GPIO port pull-up/pull-down - register - 0xc - 32 - read-write - 0x00000100 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - - GPIO port input data register - 0x10 - 32 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - - GPIO port output data register - 0x14 - 32 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - - GPIO port bit set/reset - register - 0x18 - 32 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - - GPIO port configuration lock - register - 0x1c - 32 - read-write - 0x00000000 - - - LCKK - Port x lock bit y (y= - 0..15) - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - - GPIO alternate function low - register - 0x20 - 32 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - - GPIO alternate function high - register - 0x24 - 32 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - - - GPIOA - General-purpose I/Os - GPIO - 0x40020000 - - 0x0 - 0x400 - registers - - - - MODER - - GPIO port mode register - 0x0 - 32 - read-write - 0xa8000000 - - - MODER15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - MODER14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - MODER13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - MODER12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - MODER11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - MODER10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - MODER9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - MODER8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - MODER7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - MODER6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - MODER5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - MODER4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - MODER3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - MODER2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - MODER1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - MODER0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - OTYPER - - GPIO port output type register - 0x4 - 32 - read-write - 0x00000000 - - - OT15 - Port x configuration bits (y = - 0..15) - 15 - 1 - - - OT14 - Port x configuration bits (y = - 0..15) - 14 - 1 - - - OT13 - Port x configuration bits (y = - 0..15) - 13 - 1 - - - OT12 - Port x configuration bits (y = - 0..15) - 12 - 1 - - - OT11 - Port x configuration bits (y = - 0..15) - 11 - 1 - - - OT10 - Port x configuration bits (y = - 0..15) - 10 - 1 - - - OT9 - Port x configuration bits (y = - 0..15) - 9 - 1 - - - OT8 - Port x configuration bits (y = - 0..15) - 8 - 1 - - - OT7 - Port x configuration bits (y = - 0..15) - 7 - 1 - - - OT6 - Port x configuration bits (y = - 0..15) - 6 - 1 - - - OT5 - Port x configuration bits (y = - 0..15) - 5 - 1 - - - OT4 - Port x configuration bits (y = - 0..15) - 4 - 1 - - - OT3 - Port x configuration bits (y = - 0..15) - 3 - 1 - - - OT2 - Port x configuration bits (y = - 0..15) - 2 - 1 - - - OT1 - Port x configuration bits (y = - 0..15) - 1 - 1 - - - OT0 - Port x configuration bits (y = - 0..15) - 0 - 1 - - - - - OSPEEDR - - GPIO port output speed - register - 0x8 - 32 - read-write - 0x00000000 - - - OSPEEDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - OSPEEDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - OSPEEDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - OSPEEDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - OSPEEDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - OSPEEDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - OSPEEDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - OSPEEDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - OSPEEDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - OSPEEDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - OSPEEDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - OSPEEDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - OSPEEDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - OSPEEDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - OSPEEDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - OSPEEDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - PUPDR - - GPIO port pull-up/pull-down - register - 0xc - 32 - read-write - 0x64000000 - - - PUPDR15 - Port x configuration bits (y = - 0..15) - 30 - 2 - - - PUPDR14 - Port x configuration bits (y = - 0..15) - 28 - 2 - - - PUPDR13 - Port x configuration bits (y = - 0..15) - 26 - 2 - - - PUPDR12 - Port x configuration bits (y = - 0..15) - 24 - 2 - - - PUPDR11 - Port x configuration bits (y = - 0..15) - 22 - 2 - - - PUPDR10 - Port x configuration bits (y = - 0..15) - 20 - 2 - - - PUPDR9 - Port x configuration bits (y = - 0..15) - 18 - 2 - - - PUPDR8 - Port x configuration bits (y = - 0..15) - 16 - 2 - - - PUPDR7 - Port x configuration bits (y = - 0..15) - 14 - 2 - - - PUPDR6 - Port x configuration bits (y = - 0..15) - 12 - 2 - - - PUPDR5 - Port x configuration bits (y = - 0..15) - 10 - 2 - - - PUPDR4 - Port x configuration bits (y = - 0..15) - 8 - 2 - - - PUPDR3 - Port x configuration bits (y = - 0..15) - 6 - 2 - - - PUPDR2 - Port x configuration bits (y = - 0..15) - 4 - 2 - - - PUPDR1 - Port x configuration bits (y = - 0..15) - 2 - 2 - - - PUPDR0 - Port x configuration bits (y = - 0..15) - 0 - 2 - - - - - IDR - - GPIO port input data register - 0x10 - 32 - read-only - 0x00000000 - - - IDR15 - Port input data (y = - 0..15) - 15 - 1 - - - IDR14 - Port input data (y = - 0..15) - 14 - 1 - - - IDR13 - Port input data (y = - 0..15) - 13 - 1 - - - IDR12 - Port input data (y = - 0..15) - 12 - 1 - - - IDR11 - Port input data (y = - 0..15) - 11 - 1 - - - IDR10 - Port input data (y = - 0..15) - 10 - 1 - - - IDR9 - Port input data (y = - 0..15) - 9 - 1 - - - IDR8 - Port input data (y = - 0..15) - 8 - 1 - - - IDR7 - Port input data (y = - 0..15) - 7 - 1 - - - IDR6 - Port input data (y = - 0..15) - 6 - 1 - - - IDR5 - Port input data (y = - 0..15) - 5 - 1 - - - IDR4 - Port input data (y = - 0..15) - 4 - 1 - - - IDR3 - Port input data (y = - 0..15) - 3 - 1 - - - IDR2 - Port input data (y = - 0..15) - 2 - 1 - - - IDR1 - Port input data (y = - 0..15) - 1 - 1 - - - IDR0 - Port input data (y = - 0..15) - 0 - 1 - - - - - ODR - - GPIO port output data register - 0x14 - 32 - read-write - 0x00000000 - - - ODR15 - Port output data (y = - 0..15) - 15 - 1 - - - ODR14 - Port output data (y = - 0..15) - 14 - 1 - - - ODR13 - Port output data (y = - 0..15) - 13 - 1 - - - ODR12 - Port output data (y = - 0..15) - 12 - 1 - - - ODR11 - Port output data (y = - 0..15) - 11 - 1 - - - ODR10 - Port output data (y = - 0..15) - 10 - 1 - - - ODR9 - Port output data (y = - 0..15) - 9 - 1 - - - ODR8 - Port output data (y = - 0..15) - 8 - 1 - - - ODR7 - Port output data (y = - 0..15) - 7 - 1 - - - ODR6 - Port output data (y = - 0..15) - 6 - 1 - - - ODR5 - Port output data (y = - 0..15) - 5 - 1 - - - ODR4 - Port output data (y = - 0..15) - 4 - 1 - - - ODR3 - Port output data (y = - 0..15) - 3 - 1 - - - ODR2 - Port output data (y = - 0..15) - 2 - 1 - - - ODR1 - Port output data (y = - 0..15) - 1 - 1 - - - ODR0 - Port output data (y = - 0..15) - 0 - 1 - - - - - BSRR - - GPIO port bit set/reset - register - 0x18 - 32 - write-only - 0x00000000 - - - BR15 - Port x reset bit y (y = - 0..15) - 31 - 1 - - - BR14 - Port x reset bit y (y = - 0..15) - 30 - 1 - - - BR13 - Port x reset bit y (y = - 0..15) - 29 - 1 - - - BR12 - Port x reset bit y (y = - 0..15) - 28 - 1 - - - BR11 - Port x reset bit y (y = - 0..15) - 27 - 1 - - - BR10 - Port x reset bit y (y = - 0..15) - 26 - 1 - - - BR9 - Port x reset bit y (y = - 0..15) - 25 - 1 - - - BR8 - Port x reset bit y (y = - 0..15) - 24 - 1 - - - BR7 - Port x reset bit y (y = - 0..15) - 23 - 1 - - - BR6 - Port x reset bit y (y = - 0..15) - 22 - 1 - - - BR5 - Port x reset bit y (y = - 0..15) - 21 - 1 - - - BR4 - Port x reset bit y (y = - 0..15) - 20 - 1 - - - BR3 - Port x reset bit y (y = - 0..15) - 19 - 1 - - - BR2 - Port x reset bit y (y = - 0..15) - 18 - 1 - - - BR1 - Port x reset bit y (y = - 0..15) - 17 - 1 - - - BR0 - Port x set bit y (y= - 0..15) - 16 - 1 - - - BS15 - Port x set bit y (y= - 0..15) - 15 - 1 - - - BS14 - Port x set bit y (y= - 0..15) - 14 - 1 - - - BS13 - Port x set bit y (y= - 0..15) - 13 - 1 - - - BS12 - Port x set bit y (y= - 0..15) - 12 - 1 - - - BS11 - Port x set bit y (y= - 0..15) - 11 - 1 - - - BS10 - Port x set bit y (y= - 0..15) - 10 - 1 - - - BS9 - Port x set bit y (y= - 0..15) - 9 - 1 - - - BS8 - Port x set bit y (y= - 0..15) - 8 - 1 - - - BS7 - Port x set bit y (y= - 0..15) - 7 - 1 - - - BS6 - Port x set bit y (y= - 0..15) - 6 - 1 - - - BS5 - Port x set bit y (y= - 0..15) - 5 - 1 - - - BS4 - Port x set bit y (y= - 0..15) - 4 - 1 - - - BS3 - Port x set bit y (y= - 0..15) - 3 - 1 - - - BS2 - Port x set bit y (y= - 0..15) - 2 - 1 - - - BS1 - Port x set bit y (y= - 0..15) - 1 - 1 - - - BS0 - Port x set bit y (y= - 0..15) - 0 - 1 - - - - - LCKR - - GPIO port configuration lock - register - 0x1c - 32 - read-write - 0x00000000 - - - LCKK - Port x lock bit y (y= - 0..15) - 16 - 1 - - - LCK15 - Port x lock bit y (y= - 0..15) - 15 - 1 - - - LCK14 - Port x lock bit y (y= - 0..15) - 14 - 1 - - - LCK13 - Port x lock bit y (y= - 0..15) - 13 - 1 - - - LCK12 - Port x lock bit y (y= - 0..15) - 12 - 1 - - - LCK11 - Port x lock bit y (y= - 0..15) - 11 - 1 - - - LCK10 - Port x lock bit y (y= - 0..15) - 10 - 1 - - - LCK9 - Port x lock bit y (y= - 0..15) - 9 - 1 - - - LCK8 - Port x lock bit y (y= - 0..15) - 8 - 1 - - - LCK7 - Port x lock bit y (y= - 0..15) - 7 - 1 - - - LCK6 - Port x lock bit y (y= - 0..15) - 6 - 1 - - - LCK5 - Port x lock bit y (y= - 0..15) - 5 - 1 - - - LCK4 - Port x lock bit y (y= - 0..15) - 4 - 1 - - - LCK3 - Port x lock bit y (y= - 0..15) - 3 - 1 - - - LCK2 - Port x lock bit y (y= - 0..15) - 2 - 1 - - - LCK1 - Port x lock bit y (y= - 0..15) - 1 - 1 - - - LCK0 - Port x lock bit y (y= - 0..15) - 0 - 1 - - - - - AFRL - - GPIO alternate function low - register - 0x20 - 32 - read-write - 0x00000000 - - - AFRL7 - Alternate function selection for port x - bit y (y = 0..7) - 28 - 4 - - - AFRL6 - Alternate function selection for port x - bit y (y = 0..7) - 24 - 4 - - - AFRL5 - Alternate function selection for port x - bit y (y = 0..7) - 20 - 4 - - - AFRL4 - Alternate function selection for port x - bit y (y = 0..7) - 16 - 4 - - - AFRL3 - Alternate function selection for port x - bit y (y = 0..7) - 12 - 4 - - - AFRL2 - Alternate function selection for port x - bit y (y = 0..7) - 8 - 4 - - - AFRL1 - Alternate function selection for port x - bit y (y = 0..7) - 4 - 4 - - - AFRL0 - Alternate function selection for port x - bit y (y = 0..7) - 0 - 4 - - - - - AFRH - - GPIO alternate function high - register - 0x24 - 32 - read-write - 0x00000000 - - - AFRH15 - Alternate function selection for port x - bit y (y = 8..15) - 28 - 4 - - - AFRH14 - Alternate function selection for port x - bit y (y = 8..15) - 24 - 4 - - - AFRH13 - Alternate function selection for port x - bit y (y = 8..15) - 20 - 4 - - - AFRH12 - Alternate function selection for port x - bit y (y = 8..15) - 16 - 4 - - - AFRH11 - Alternate function selection for port x - bit y (y = 8..15) - 12 - 4 - - - AFRH10 - Alternate function selection for port x - bit y (y = 8..15) - 8 - 4 - - - AFRH9 - Alternate function selection for port x - bit y (y = 8..15) - 4 - 4 - - - AFRH8 - Alternate function selection for port x - bit y (y = 8..15) - 0 - 4 - - - - - - - SYSCFG - System configuration controller - SYSCFG - 0x40013800 - - 0x0 - 0x400 - registers - - - - MEMRM - - memory remap register - 0x0 - 32 - read-write - 0x00000000 - - - MEM_MODE - Memory mapping selection - 0 - 3 - - - FB_MODE - Flash bank mode selection - 8 - 1 - - - SWP_FMC - FMC memory mapping swap - 10 - 2 - - - - - PMC - - peripheral mode configuration - register - 0x4 - 32 - read-write - 0x00000000 - - - MII_RMII_SEL - Ethernet PHY interface - selection - 23 - 1 - - - ADC1DC2 - ADC1DC2 - 16 - 1 - - - ADC2DC2 - ADC2DC2 - 17 - 1 - - - ADC3DC2 - ADC3DC2 - 18 - 1 - - - - - EXTICR1 - - external interrupt configuration register - 1 - 0x8 - 32 - read-write - 0x0 - - - EXTI3 - EXTI x configuration (x = 0 to - 3) - 12 - 4 - - - EXTI2 - EXTI x configuration (x = 0 to - 3) - 8 - 4 - - - EXTI1 - EXTI x configuration (x = 0 to - 3) - 4 - 4 - - - EXTI0 - EXTI x configuration (x = 0 to - 3) - 0 - 4 - - - - - EXTICR2 - - external interrupt configuration register - 2 - 0xc - 32 - read-write - 0x0 - - - EXTI7 - EXTI x configuration (x = 4 to - 7) - 12 - 4 - - - EXTI6 - EXTI x configuration (x = 4 to - 7) - 8 - 4 - - - EXTI5 - EXTI x configuration (x = 4 to - 7) - 4 - 4 - - - EXTI4 - EXTI x configuration (x = 4 to - 7) - 0 - 4 - - - - - EXTICR3 - - external interrupt configuration register - 3 - 0x10 - 32 - read-write - 0x0 - - - EXTI11 - EXTI x configuration (x = 8 to - 11) - 12 - 4 - - - EXTI10 - EXTI10 - 8 - 4 - - - EXTI9 - EXTI x configuration (x = 8 to - 11) - 4 - 4 - - - EXTI8 - EXTI x configuration (x = 8 to - 11) - 0 - 4 - - - - - EXTICR4 - - external interrupt configuration register - 4 - 0x14 - 32 - read-write - 0x0 - - - EXTI15 - EXTI x configuration (x = 12 to - 15) - 12 - 4 - - - EXTI14 - EXTI x configuration (x = 12 to - 15) - 8 - 4 - - - EXTI13 - EXTI x configuration (x = 12 to - 15) - 4 - 4 - - - EXTI12 - EXTI x configuration (x = 12 to - 15) - 0 - 4 - - - - - CMPCR - - Compensation cell control - register - 0x20 - 32 - read-only - 0x00000000 - - - READY - READY - 8 - 1 - - - CMP_PD - Compensation cell - power-down - 0 - 1 - - - - - - - SPI1 - Serial peripheral interface - SPI - 0x40013000 - - 0x0 - 0x400 - registers - - - SPI1 - SPI1 global interrupt - 35 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - BIDIMODE - Bidirectional data mode - enable - 15 - 1 - - - BIDIOE - Output enable in bidirectional - mode - 14 - 1 - - - CRCEN - Hardware CRC calculation - enable - 13 - 1 - - - CRCNEXT - CRC transfer next - 12 - 1 - - - DFF - Data frame format - 11 - 1 - - - RXONLY - Receive only - 10 - 1 - - - SSM - Software slave management - 9 - 1 - - - SSI - Internal slave select - 8 - 1 - - - LSBFIRST - Frame format - 7 - 1 - - - SPE - SPI enable - 6 - 1 - - - BR - Baud rate control - 3 - 3 - - - MSTR - Master selection - 2 - 1 - - - CPOL - Clock polarity - 1 - 1 - - - CPHA - Clock phase - 0 - 1 - - - - - CR2 - - control register 2 - 0x4 - 32 - read-write - 0x0 - - - TXEIE - Tx buffer empty interrupt - enable - 7 - 1 - - - RXNEIE - RX buffer not empty interrupt - enable - 6 - 1 - - - ERRIE - Error interrupt enable - 5 - 1 - - - FRF - Frame format - 4 - 1 - - - SSOE - SS output enable - 2 - 1 - - - TXDMAEN - Tx buffer DMA enable - 1 - 1 - - - RXDMAEN - Rx buffer DMA enable - 0 - 1 - - - - - SR - - status register - 0x8 - 32 - 0x2 - - - TIFRFE - TI frame format error - 8 - 1 - read-only - - - BSY - Busy flag - 7 - 1 - read-only - - - OVR - Overrun flag - 6 - 1 - read-only - - - MODF - Mode fault - 5 - 1 - read-only - - - CRCERR - CRC error flag - 4 - 1 - read-write - - - UDR - Underrun flag - 3 - 1 - read-only - - - CHSIDE - Channel side - 2 - 1 - read-only - - - TXE - Transmit buffer empty - 1 - 1 - read-only - - - RXNE - Receive buffer not empty - 0 - 1 - read-only - - - - - DR - - data register - 0xc - 32 - read-write - 0x0 - - - DR - Data register - 0 - 16 - - - - - CRCPR - - CRC polynomial register - 0x10 - 32 - read-write - 0x7 - - - CRCPOLY - CRC polynomial register - 0 - 16 - - - - - RXCRCR - - RX CRC register - 0x14 - 32 - read-only - 0x0 - - - RxCRC - Rx CRC register - 0 - 16 - - - - - TXCRCR - - TX CRC register - 0x18 - 32 - read-only - 0x0 - - - TxCRC - Tx CRC register - 0 - 16 - - - - - I2SCFGR - - I2S configuration register - 0x1c - 32 - read-write - 0x0 - - - I2SMOD - I2S mode selection - 11 - 1 - - - I2SE - I2S Enable - 10 - 1 - - - I2SCFG - I2S configuration mode - 8 - 2 - - - PCMSYNC - PCM frame synchronization - 7 - 1 - - - I2SSTD - I2S standard selection - 4 - 2 - - - CKPOL - Steady state clock - polarity - 3 - 1 - - - DATLEN - Data length to be - transferred - 1 - 2 - - - CHLEN - Channel length (number of bits per audio - channel) - 0 - 1 - - - - - I2SPR - - I2S prescaler register - 0x20 - 32 - read-write - 00000010 - - - MCKOE - Master clock output enable - 9 - 1 - - - ODD - Odd factor for the - prescaler - 8 - 1 - - - I2SDIV - I2S Linear prescaler - 0 - 8 - - - - - - - SPI2 - 0x40003800 - - SPI2 - SPI2 global interrupt - 36 - - - - SPI3 - 0x40003c00 - - SPI3 - SPI3 global interrupt - 51 - - - - I2S2ext - 0x40003400 - - - I2S3ext - 0x40004000 - - - SPI4 - 0x40013400 - - SPI4 - SPI 4 global interrupt - 84 - - - - SPI5 - 0x40015000 - - SPI5 - SPI 5 global interrupt - 85 - - - - SPI6 - 0x40015400 - - SPI6 - SPI 6 global interrupt - 86 - - - - SDIO - Secure digital input/output - interface - SDIO - 0x40012c00 - - 0x0 - 0x400 - registers - - - SDIO - SDIO global interrupt - 49 - - - - POWER - - power control register - 0x0 - 32 - read-write - 0x00000000 - - - PWRCTRL - PWRCTRL - 0 - 2 - - - - - CLKCR - - SDI clock control register - 0x4 - 32 - read-write - 0x00000000 - - - HWFC_EN - HW Flow Control enable - 14 - 1 - - - NEGEDGE - SDIO_CK dephasing selection - bit - 13 - 1 - - - WIDBUS - Wide bus mode enable bit - 11 - 2 - - - BYPASS - Clock divider bypass enable - bit - 10 - 1 - - - PWRSAV - Power saving configuration - bit - 9 - 1 - - - CLKEN - Clock enable bit - 8 - 1 - - - CLKDIV - Clock divide factor - 0 - 8 - - - - - ARG - - argument register - 0x8 - 32 - read-write - 0x00000000 - - - CMDARG - Command argument - 0 - 32 - - - - - CMD - - command register - 0xc - 32 - read-write - 0x00000000 - - - CE_ATACMD - CE-ATA command - 14 - 1 - - - nIEN - not Interrupt Enable - 13 - 1 - - - ENCMDcompl - Enable CMD completion - 12 - 1 - - - SDIOSuspend - SD I/O suspend command - 11 - 1 - - - CPSMEN - Command path state machine (CPSM) Enable - bit - 10 - 1 - - - WAITPEND - CPSM Waits for ends of data transfer - (CmdPend internal signal). - 9 - 1 - - - WAITINT - CPSM waits for interrupt - request - 8 - 1 - - - WAITRESP - Wait for response bits - 6 - 2 - - - CMDINDEX - Command index - 0 - 6 - - - - - RESPCMD - - command response register - 0x10 - 32 - read-only - 0x00000000 - - - RESPCMD - Response command index - 0 - 6 - - - - - RESP1 - - response 1..4 register - 0x14 - 32 - read-only - 0x00000000 - - - CARDSTATUS1 - see Table 132. - 0 - 32 - - - - - RESP2 - - response 1..4 register - 0x18 - 32 - read-only - 0x00000000 - - - CARDSTATUS2 - see Table 132. - 0 - 32 - - - - - RESP3 - - response 1..4 register - 0x1c - 32 - read-only - 0x00000000 - - - CARDSTATUS3 - see Table 132. - 0 - 32 - - - - - RESP4 - - response 1..4 register - 0x20 - 32 - read-only - 0x00000000 - - - CARDSTATUS4 - see Table 132. - 0 - 32 - - - - - DTIMER - - data timer register - 0x24 - 32 - read-write - 0x00000000 - - - DATATIME - Data timeout period - 0 - 32 - - - - - DLEN - - data length register - 0x28 - 32 - read-write - 0x00000000 - - - DATALENGTH - Data length value - 0 - 25 - - - - - DCTRL - - data control register - 0x2c - 32 - read-write - 0x00000000 - - - SDIOEN - SD I/O enable functions - 11 - 1 - - - RWMOD - Read wait mode - 10 - 1 - - - RWSTOP - Read wait stop - 9 - 1 - - - RWSTART - Read wait start - 8 - 1 - - - DBLOCKSIZE - Data block size - 4 - 4 - - - DMAEN - DMA enable bit - 3 - 1 - - - DTMODE - Data transfer mode selection 1: Stream - or SDIO multibyte data transfer. - 2 - 1 - - - DTDIR - Data transfer direction - selection - 1 - 1 - - - DTEN - DTEN - 0 - 1 - - - - - DCOUNT - - data counter register - 0x30 - 32 - read-only - 0x00000000 - - - DATACOUNT - Data count value - 0 - 25 - - - - - STA - - status register - 0x34 - 32 - read-only - 0x00000000 - - - CEATAEND - CE-ATA command completion signal - received for CMD61 - 23 - 1 - - - SDIOIT - SDIO interrupt received - 22 - 1 - - - RXDAVL - Data available in receive - FIFO - 21 - 1 - - - TXDAVL - Data available in transmit - FIFO - 20 - 1 - - - RXFIFOE - Receive FIFO empty - 19 - 1 - - - TXFIFOE - Transmit FIFO empty - 18 - 1 - - - RXFIFOF - Receive FIFO full - 17 - 1 - - - TXFIFOF - Transmit FIFO full - 16 - 1 - - - RXFIFOHF - Receive FIFO half full: there are at - least 8 words in the FIFO - 15 - 1 - - - TXFIFOHE - Transmit FIFO half empty: at least 8 - words can be written into the FIFO - 14 - 1 - - - RXACT - Data receive in progress - 13 - 1 - - - TXACT - Data transmit in progress - 12 - 1 - - - CMDACT - Command transfer in - progress - 11 - 1 - - - DBCKEND - Data block sent/received (CRC check - passed) - 10 - 1 - - - STBITERR - Start bit not detected on all data - signals in wide bus mode - 9 - 1 - - - DATAEND - Data end (data counter, SDIDCOUNT, is - zero) - 8 - 1 - - - CMDSENT - Command sent (no response - required) - 7 - 1 - - - CMDREND - Command response received (CRC check - passed) - 6 - 1 - - - RXOVERR - Received FIFO overrun - error - 5 - 1 - - - TXUNDERR - Transmit FIFO underrun - error - 4 - 1 - - - DTIMEOUT - Data timeout - 3 - 1 - - - CTIMEOUT - Command response timeout - 2 - 1 - - - DCRCFAIL - Data block sent/received (CRC check - failed) - 1 - 1 - - - CCRCFAIL - Command response received (CRC check - failed) - 0 - 1 - - - - - ICR - - interrupt clear register - 0x38 - 32 - read-write - 0x00000000 - - - CEATAENDC - CEATAEND flag clear bit - 23 - 1 - - - SDIOITC - SDIOIT flag clear bit - 22 - 1 - - - DBCKENDC - DBCKEND flag clear bit - 10 - 1 - - - STBITERRC - STBITERR flag clear bit - 9 - 1 - - - DATAENDC - DATAEND flag clear bit - 8 - 1 - - - CMDSENTC - CMDSENT flag clear bit - 7 - 1 - - - CMDRENDC - CMDREND flag clear bit - 6 - 1 - - - RXOVERRC - RXOVERR flag clear bit - 5 - 1 - - - TXUNDERRC - TXUNDERR flag clear bit - 4 - 1 - - - DTIMEOUTC - DTIMEOUT flag clear bit - 3 - 1 - - - CTIMEOUTC - CTIMEOUT flag clear bit - 2 - 1 - - - DCRCFAILC - DCRCFAIL flag clear bit - 1 - 1 - - - CCRCFAILC - CCRCFAIL flag clear bit - 0 - 1 - - - - - MASK - - mask register - 0x3c - 32 - read-write - 0x00000000 - - - CEATAENDIE - CE-ATA command completion signal - received interrupt enable - 23 - 1 - - - SDIOITIE - SDIO mode interrupt received interrupt - enable - 22 - 1 - - - RXDAVLIE - Data available in Rx FIFO interrupt - enable - 21 - 1 - - - TXDAVLIE - Data available in Tx FIFO interrupt - enable - 20 - 1 - - - RXFIFOEIE - Rx FIFO empty interrupt - enable - 19 - 1 - - - TXFIFOEIE - Tx FIFO empty interrupt - enable - 18 - 1 - - - RXFIFOFIE - Rx FIFO full interrupt - enable - 17 - 1 - - - TXFIFOFIE - Tx FIFO full interrupt - enable - 16 - 1 - - - RXFIFOHFIE - Rx FIFO half full interrupt - enable - 15 - 1 - - - TXFIFOHEIE - Tx FIFO half empty interrupt - enable - 14 - 1 - - - RXACTIE - Data receive acting interrupt - enable - 13 - 1 - - - TXACTIE - Data transmit acting interrupt - enable - 12 - 1 - - - CMDACTIE - Command acting interrupt - enable - 11 - 1 - - - DBCKENDIE - Data block end interrupt - enable - 10 - 1 - - - STBITERRIE - Start bit error interrupt - enable - 9 - 1 - - - DATAENDIE - Data end interrupt enable - 8 - 1 - - - CMDSENTIE - Command sent interrupt - enable - 7 - 1 - - - CMDRENDIE - Command response received interrupt - enable - 6 - 1 - - - RXOVERRIE - Rx FIFO overrun error interrupt - enable - 5 - 1 - - - TXUNDERRIE - Tx FIFO underrun error interrupt - enable - 4 - 1 - - - DTIMEOUTIE - Data timeout interrupt - enable - 3 - 1 - - - CTIMEOUTIE - Command timeout interrupt - enable - 2 - 1 - - - DCRCFAILIE - Data CRC fail interrupt - enable - 1 - 1 - - - CCRCFAILIE - Command CRC fail interrupt - enable - 0 - 1 - - - - - FIFOCNT - - FIFO counter register - 0x48 - 32 - read-only - 0x00000000 - - - FIFOCOUNT - Remaining number of words to be written - to or read from the FIFO. - 0 - 24 - - - - - FIFO - - data FIFO register - 0x80 - 32 - read-write - 0x00000000 - - - FIFOData - Receive and transmit FIFO - data - 0 - 32 - - - - - - - ADC1 - Analog-to-digital converter - ADC - 0x40012000 - - 0x0 - 0x400 - registers - - - ADC - ADC1 global interrupt - 18 - - - - SR - - status register - 0x0 - 32 - read-write - 0x00000000 - - - OVR - Overrun - 5 - 1 - - - STRT - Regular channel start flag - 4 - 1 - - - JSTRT - Injected channel start - flag - 3 - 1 - - - JEOC - Injected channel end of - conversion - 2 - 1 - - - EOC - Regular channel end of - conversion - 1 - 1 - - - AWD - Analog watchdog flag - 0 - 1 - - - - - CR1 - - control register 1 - 0x4 - 32 - read-write - 0x00000000 - - - OVRIE - Overrun interrupt enable - 26 - 1 - - - RES - Resolution - 24 - 2 - - - AWDEN - Analog watchdog enable on regular - channels - 23 - 1 - - - JAWDEN - Analog watchdog enable on injected - channels - 22 - 1 - - - DISCNUM - Discontinuous mode channel - count - 13 - 3 - - - JDISCEN - Discontinuous mode on injected - channels - 12 - 1 - - - DISCEN - Discontinuous mode on regular - channels - 11 - 1 - - - JAUTO - Automatic injected group - conversion - 10 - 1 - - - AWDSGL - Enable the watchdog on a single channel - in scan mode - 9 - 1 - - - SCAN - Scan mode - 8 - 1 - - - JEOCIE - Interrupt enable for injected - channels - 7 - 1 - - - AWDIE - Analog watchdog interrupt - enable - 6 - 1 - - - EOCIE - Interrupt enable for EOC - 5 - 1 - - - AWDCH - Analog watchdog channel select - bits - 0 - 5 - - - - - CR2 - - control register 2 - 0x8 - 32 - read-write - 0x00000000 - - - SWSTART - Start conversion of regular - channels - 30 - 1 - - - EXTEN - External trigger enable for regular - channels - 28 - 2 - - - EXTSEL - External event select for regular - group - 24 - 4 - - - JSWSTART - Start conversion of injected - channels - 22 - 1 - - - JEXTEN - External trigger enable for injected - channels - 20 - 2 - - - JEXTSEL - External event select for injected - group - 16 - 4 - - - ALIGN - Data alignment - 11 - 1 - - - EOCS - End of conversion - selection - 10 - 1 - - - DDS - DMA disable selection (for single ADC - mode) - 9 - 1 - - - DMA - Direct memory access mode (for single - ADC mode) - 8 - 1 - - - CONT - Continuous conversion - 1 - 1 - - - ADON - A/D Converter ON / OFF - 0 - 1 - - - - - SMPR1 - - sample time register 1 - 0xc - 32 - read-write - 0x00000000 - - - SMPx_x - Sample time bits - 0 - 32 - - - - - SMPR2 - - sample time register 2 - 0x10 - 32 - read-write - 0x00000000 - - - SMPx_x - Sample time bits - 0 - 32 - - - - - JOFR1 - - injected channel data offset register - x - 0x14 - 32 - read-write - 0x00000000 - - - JOFFSET1 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR2 - - injected channel data offset register - x - 0x18 - 32 - read-write - 0x00000000 - - - JOFFSET2 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR3 - - injected channel data offset register - x - 0x1c - 32 - read-write - 0x00000000 - - - JOFFSET3 - Data offset for injected channel - x - 0 - 12 - - - - - JOFR4 - - injected channel data offset register - x - 0x20 - 32 - read-write - 0x00000000 - - - JOFFSET4 - Data offset for injected channel - x - 0 - 12 - - - - - HTR - - watchdog higher threshold - register - 0x24 - 32 - read-write - 0x00000fff - - - HT - Analog watchdog higher - threshold - 0 - 12 - - - - - LTR - - watchdog lower threshold - register - 0x28 - 32 - read-write - 0x00000000 - - - LT - Analog watchdog lower - threshold - 0 - 12 - - - - - SQR1 - - regular sequence register 1 - 0x2c - 32 - read-write - 0x00000000 - - - L - Regular channel sequence - length - 20 - 4 - - - SQ16 - 16th conversion in regular - sequence - 15 - 5 - - - SQ15 - 15th conversion in regular - sequence - 10 - 5 - - - SQ14 - 14th conversion in regular - sequence - 5 - 5 - - - SQ13 - 13th conversion in regular - sequence - 0 - 5 - - - - - SQR2 - - regular sequence register 2 - 0x30 - 32 - read-write - 0x00000000 - - - SQ12 - 12th conversion in regular - sequence - 25 - 5 - - - SQ11 - 11th conversion in regular - sequence - 20 - 5 - - - SQ10 - 10th conversion in regular - sequence - 15 - 5 - - - SQ9 - 9th conversion in regular - sequence - 10 - 5 - - - SQ8 - 8th conversion in regular - sequence - 5 - 5 - - - SQ7 - 7th conversion in regular - sequence - 0 - 5 - - - - - SQR3 - - regular sequence register 3 - 0x34 - 32 - read-write - 0x00000000 - - - SQ6 - 6th conversion in regular - sequence - 25 - 5 - - - SQ5 - 5th conversion in regular - sequence - 20 - 5 - - - SQ4 - 4th conversion in regular - sequence - 15 - 5 - - - SQ3 - 3rd conversion in regular - sequence - 10 - 5 - - - SQ2 - 2nd conversion in regular - sequence - 5 - 5 - - - SQ1 - 1st conversion in regular - sequence - 0 - 5 - - - - - JSQR - - injected sequence register - 0x38 - 32 - read-write - 0x00000000 - - - JL - Injected sequence length - 20 - 2 - - - JSQ4 - 4th conversion in injected - sequence - 15 - 5 - - - JSQ3 - 3rd conversion in injected - sequence - 10 - 5 - - - JSQ2 - 2nd conversion in injected - sequence - 5 - 5 - - - JSQ1 - 1st conversion in injected - sequence - 0 - 5 - - - - - JDR1 - - injected data register x - 0x3c - 32 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR2 - - injected data register x - 0x40 - 32 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR3 - - injected data register x - 0x44 - 32 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - JDR4 - - injected data register x - 0x48 - 32 - read-only - 0x00000000 - - - JDATA - Injected data - 0 - 16 - - - - - DR - - regular data register - 0x4c - 32 - read-only - 0x00000000 - - - DATA - Regular data - 0 - 16 - - - - - - - ADC2 - 0x40012100 - - ADC - ADC2 global interrupts - 18 - - - - ADC3 - 0x40012200 - - ADC - ADC3 global interrupts - 18 - - - - USART6 - Universal synchronous asynchronous receiver - transmitter - USART - 0x40011400 - - 0x0 - 0x400 - registers - - - USART6 - USART6 global interrupt - 71 - - - - SR - - Status register - 0x0 - 32 - 0x00c00000 - - - CTS - CTS flag - 9 - 1 - read-write - - - LBD - LIN break detection flag - 8 - 1 - read-write - - - TXE - Transmit data register - empty - 7 - 1 - read-only - - - TC - Transmission complete - 6 - 1 - read-write - - - RXNE - Read data register not - empty - 5 - 1 - read-write - - - IDLE - IDLE line detected - 4 - 1 - read-only - - - ORE - Overrun error - 3 - 1 - read-only - - - NF - Noise detected flag - 2 - 1 - read-only - - - FE - Framing error - 1 - 1 - read-only - - - PE - Parity error - 0 - 1 - read-only - - - - - DR - - Data register - 0x4 - 32 - read-write - 0x00000000 - - - DR - Data value - 0 - 9 - - - - - BRR - - Baud rate register - 0x8 - 32 - read-write - 0x0 - - - DIV_Mantissa - mantissa of USARTDIV - 4 - 12 - - - DIV_Fraction - fraction of USARTDIV - 0 - 4 - - - - - CR1 - - Control register 1 - 0xc - 32 - read-write - 0x0 - - - OVER8 - Oversampling mode - 15 - 1 - - - UE - USART enable - 13 - 1 - - - M - Word length - 12 - 1 - - - WAKE - Wakeup method - 11 - 1 - - - PCE - Parity control enable - 10 - 1 - - - PS - Parity selection - 9 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - TXEIE - TXE interrupt enable - 7 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - TE - Transmitter enable - 3 - 1 - - - RE - Receiver enable - 2 - 1 - - - RWU - Receiver wakeup - 1 - 1 - - - SBK - Send break - 0 - 1 - - - - - CR2 - - Control register 2 - 0x10 - 32 - read-write - 0x0 - - - LINEN - LIN mode enable - 14 - 1 - - - STOP - STOP bits - 12 - 2 - - - CLKEN - Clock enable - 11 - 1 - - - CPOL - Clock polarity - 10 - 1 - - - CPHA - Clock phase - 9 - 1 - - - LBCL - Last bit clock pulse - 8 - 1 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - LBDL - lin break detection length - 5 - 1 - - - ADD - Address of the USART node - 0 - 4 - - - - - CR3 - - Control register 3 - 0x14 - 32 - read-write - 0x0 - - - ONEBIT - One sample bit method - enable - 11 - 1 - - - CTSIE - CTS interrupt enable - 10 - 1 - - - CTSE - CTS enable - 9 - 1 - - - RTSE - RTS enable - 8 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - SCEN - Smartcard mode enable - 5 - 1 - - - NACK - Smartcard NACK enable - 4 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - EIE - Error interrupt enable - 0 - 1 - - - - - GTPR - - Guard time and prescaler - register - 0x18 - 32 - read-write - 0x0 - - - GT - Guard time value - 8 - 8 - - - PSC - Prescaler value - 0 - 8 - - - - - - - USART1 - 0x40011000 - - USART1 - USART1 global interrupt - 37 - - - - USART2 - 0x40004400 - - USART2 - USART2 global interrupt - 38 - - - - USART3 - 0x40004800 - - USART3 - USART3 global interrupt - 39 - - - - UART7 - 0x40007800 - - UART7 - UART 7 global interrupt - 82 - - - - UART8 - 0x40007c00 - - UART8 - UART 8 global interrupt - 83 - - - - DAC - Digital-to-analog converter - DAC - 0x40007400 - - 0x0 - 0x400 - registers - - - TIM6_DAC - TIM6 global interrupt, DAC1 and DAC2 underrun - error interrupt - 54 - - - - CR - - control register - 0x0 - 32 - read-write - 0x00000000 - - - DMAUDRIE2 - DAC channel2 DMA underrun interrupt - enable - 29 - 1 - - - DMAEN2 - DAC channel2 DMA enable - 28 - 1 - - - MAMP2 - DAC channel2 mask/amplitude - selector - 24 - 4 - - - WAVE2 - DAC channel2 noise/triangle wave - generation enable - 22 - 2 - - - TSEL2 - DAC channel2 trigger - selection - 19 - 3 - - - TEN2 - DAC channel2 trigger - enable - 18 - 1 - - - BOFF2 - DAC channel2 output buffer - disable - 17 - 1 - - - EN2 - DAC channel2 enable - 16 - 1 - - - DMAUDRIE1 - DAC channel1 DMA Underrun Interrupt - enable - 13 - 1 - - - DMAEN1 - DAC channel1 DMA enable - 12 - 1 - - - MAMP1 - DAC channel1 mask/amplitude - selector - 8 - 4 - - - WAVE1 - DAC channel1 noise/triangle wave - generation enable - 6 - 2 - - - TSEL1 - DAC channel1 trigger - selection - 3 - 3 - - - TEN1 - DAC channel1 trigger - enable - 2 - 1 - - - BOFF1 - DAC channel1 output buffer - disable - 1 - 1 - - - EN1 - DAC channel1 enable - 0 - 1 - - - - - SWTRIGR - - software trigger register - 0x4 - 32 - write-only - 0x00000000 - - - SWTRIG2 - DAC channel2 software - trigger - 1 - 1 - - - SWTRIG1 - DAC channel1 software - trigger - 0 - 1 - - - - - DHR12R1 - - channel1 12-bit right-aligned data holding - register - 0x8 - 32 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L1 - - channel1 12-bit left aligned data holding - register - 0xc - 32 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R1 - - channel1 8-bit right aligned data holding - register - 0x10 - 32 - read-write - 0x00000000 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DHR12R2 - - channel2 12-bit right aligned data holding - register - 0x14 - 32 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 0 - 12 - - - - - DHR12L2 - - channel2 12-bit left aligned data holding - register - 0x18 - 32 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit left-aligned - data - 4 - 12 - - - - - DHR8R2 - - channel2 8-bit right-aligned data holding - register - 0x1c - 32 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 8-bit right-aligned - data - 0 - 8 - - - - - DHR12RD - - Dual DAC 12-bit right-aligned data holding - register - 0x20 - 32 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit right-aligned - data - 16 - 12 - - - DACC1DHR - DAC channel1 12-bit right-aligned - data - 0 - 12 - - - - - DHR12LD - - DUAL DAC 12-bit left aligned data holding - register - 0x24 - 32 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 12-bit left-aligned - data - 20 - 12 - - - DACC1DHR - DAC channel1 12-bit left-aligned - data - 4 - 12 - - - - - DHR8RD - - DUAL DAC 8-bit right aligned data holding - register - 0x28 - 32 - read-write - 0x00000000 - - - DACC2DHR - DAC channel2 8-bit right-aligned - data - 8 - 8 - - - DACC1DHR - DAC channel1 8-bit right-aligned - data - 0 - 8 - - - - - DOR1 - - channel1 data output register - 0x2c - 32 - read-only - 0x00000000 - - - DACC1DOR - DAC channel1 data output - 0 - 12 - - - - - DOR2 - - channel2 data output register - 0x30 - 32 - read-only - 0x00000000 - - - DACC2DOR - DAC channel2 data output - 0 - 12 - - - - - SR - - status register - 0x34 - 32 - read-write - 0x00000000 - - - DMAUDR2 - DAC channel2 DMA underrun - flag - 29 - 1 - - - DMAUDR1 - DAC channel1 DMA underrun - flag - 13 - 1 - - - - - - - I2C3 - Inter-integrated circuit - I2C - 0x40005c00 - - 0x0 - 0x400 - registers - - - I2C3_EV - I2C3 event interrupt - 72 - - - I2C3_ER - I2C3 error interrupt - 73 - - - - CR1 - - Control register 1 - 0x0 - 32 - read-write - 0x0 - - - SWRST - Software reset - 15 - 1 - - - ALERT - SMBus alert - 13 - 1 - - - PEC - Packet error checking - 12 - 1 - - - POS - Acknowledge/PEC Position (for data - reception) - 11 - 1 - - - ACK - Acknowledge enable - 10 - 1 - - - STOP - Stop generation - 9 - 1 - - - START - Start generation - 8 - 1 - - - NOSTRETCH - Clock stretching disable (Slave - mode) - 7 - 1 - - - ENGC - General call enable - 6 - 1 - - - ENPEC - PEC enable - 5 - 1 - - - ENARP - ARP enable - 4 - 1 - - - SMBTYPE - SMBus type - 3 - 1 - - - SMBUS - SMBus mode - 1 - 1 - - - PE - Peripheral enable - 0 - 1 - - - - - CR2 - - Control register 2 - 0x4 - 32 - read-write - 0x0 - - - LAST - DMA last transfer - 12 - 1 - - - DMAEN - DMA requests enable - 11 - 1 - - - ITBUFEN - Buffer interrupt enable - 10 - 1 - - - ITEVTEN - Event interrupt enable - 9 - 1 - - - ITERREN - Error interrupt enable - 8 - 1 - - - FREQ - Peripheral clock frequency - 0 - 6 - - - - - OAR1 - - Own address register 1 - 0x8 - 32 - read-write - 0x0 - - - ADDMODE - Addressing mode (slave - mode) - 15 - 1 - - - ADD10 - Interface address - 8 - 2 - - - ADD7 - Interface address - 1 - 7 - - - ADD0 - Interface address - 0 - 1 - - - - - OAR2 - - Own address register 2 - 0xc - 32 - read-write - 0x0 - - - ADD2 - Interface address - 1 - 7 - - - ENDUAL - Dual addressing mode - enable - 0 - 1 - - - - - DR - - Data register - 0x10 - 32 - read-write - 0x0 - - - DR - 8-bit data register - 0 - 8 - - - - - SR1 - - Status register 1 - 0x14 - 32 - 0x0 - - - SMBALERT - SMBus alert - 15 - 1 - read-write - - - TIMEOUT - Timeout or Tlow error - 14 - 1 - read-write - - - PECERR - PEC Error in reception - 12 - 1 - read-write - - - OVR - Overrun/Underrun - 11 - 1 - read-write - - - AF - Acknowledge failure - 10 - 1 - read-write - - - ARLO - Arbitration lost (master - mode) - 9 - 1 - read-write - - - BERR - Bus error - 8 - 1 - read-write - - - TxE - Data register empty - (transmitters) - 7 - 1 - read-only - - - RxNE - Data register not empty - (receivers) - 6 - 1 - read-only - - - STOPF - Stop detection (slave - mode) - 4 - 1 - read-only - - - ADD10 - 10-bit header sent (Master - mode) - 3 - 1 - read-only - - - BTF - Byte transfer finished - 2 - 1 - read-only - - - ADDR - Address sent (master mode)/matched - (slave mode) - 1 - 1 - read-only - - - SB - Start bit (Master mode) - 0 - 1 - read-only - - - - - SR2 - - Status register 2 - 0x18 - 32 - read-only - 0x0 - - - PEC - acket error checking - register - 8 - 8 - - - DUALF - Dual flag (Slave mode) - 7 - 1 - - - SMBHOST - SMBus host header (Slave - mode) - 6 - 1 - - - SMBDEFAULT - SMBus device default address (Slave - mode) - 5 - 1 - - - GENCALL - General call address (Slave - mode) - 4 - 1 - - - TRA - Transmitter/receiver - 2 - 1 - - - BUSY - Bus busy - 1 - 1 - - - MSL - Master/slave - 0 - 1 - - - - - CCR - - Clock control register - 0x1c - 32 - read-write - 0x0 - - - F_S - I2C master mode selection - 15 - 1 - - - DUTY - Fast mode duty cycle - 14 - 1 - - - CCR - Clock control register in Fast/Standard - mode (Master mode) - 0 - 12 - - - - - TRISE - - TRISE register - 0x20 - 32 - read-write - 0x2 - - - TRISE - Maximum rise time in Fast/Standard mode - (Master mode) - 0 - 6 - - - - - FLTR - - I2C FLTR register - 0x24 - 32 - read-write - 0x0 - - - DNF - Digital noise filter - 0 - 4 - - - ANOFF - Analog noise filter OFF - 4 - 1 - - - - - - - I2C2 - 0x40005800 - - I2C2_EV - I2C2 event interrupt - 33 - - - I2C2_ER - I2C2 error interrupt - 34 - - - - I2C1 - 0x40005400 - - I2C1_EV - I2C1 event interrupt - 31 - - - I2C1_ER - I2C1 error interrupt - 32 - - - - IWDG - Independent watchdog - IWDG - 0x40003000 - - 0x0 - 0x400 - registers - - - - KR - - Key register - 0x0 - 32 - write-only - 0x00000000 - - - KEY - Key value (write only, read - 0000h) - 0 - 16 - - - - - PR - - Prescaler register - 0x4 - 32 - read-write - 0x00000000 - - - PR - Prescaler divider - 0 - 3 - - - - - RLR - - Reload register - 0x8 - 32 - read-write - 0x00000fff - - - RL - Watchdog counter reload - value - 0 - 12 - - - - - SR - - Status register - 0xc - 32 - read-only - 0x00000000 - - - RVU - Watchdog counter reload value - update - 1 - 1 - - - PVU - Watchdog prescaler value - update - 0 - 1 - - - - - - - WWDG - Window watchdog - WWDG - 0x40002c00 - - 0x0 - 0x400 - registers - - - WWDG - Window Watchdog interrupt - 0 - - - - CR - - Control register - 0x0 - 32 - read-write - 0x7f - - - WDGA - Activation bit - 7 - 1 - - - T - 7-bit counter (MSB to LSB) - 0 - 7 - - - - - CFR - - Configuration register - 0x4 - 32 - read-write - 0x7f - - - EWI - Early wakeup interrupt - 9 - 1 - - - WDGTB1 - Timer base - 8 - 1 - - - WDGTB0 - Timer base - 7 - 1 - - - W - 7-bit window value - 0 - 7 - - - - - SR - - Status register - 0x8 - 32 - read-write - 0x0 - - - EWIF - Early wakeup interrupt - flag - 0 - 1 - - - - - - - RTC - Real-time clock - RTC - 0x40002800 - - 0x0 - 0x400 - registers - - - RTC_WKUP - RTC Wakeup interrupt through the EXTI - line - 3 - - - RTC_Alarm - RTC Alarms (A and B) through EXTI line - interrupt - 41 - - - - TR - - time register - 0x0 - 32 - read-write - 0x00000000 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - DR - - date register - 0x4 - 32 - read-write - 0x00002101 - - - YT - Year tens in BCD format - 20 - 4 - - - YU - Year units in BCD format - 16 - 4 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - CR - - control register - 0x8 - 32 - read-write - 0x00000000 - - - COE - Calibration output enable - 23 - 1 - - - OSEL - Output selection - 21 - 2 - - - POL - Output polarity - 20 - 1 - - - BKP - Backup - 18 - 1 - - - SUB1H - Subtract 1 hour (winter time - change) - 17 - 1 - - - ADD1H - Add 1 hour (summer time - change) - 16 - 1 - - - TSIE - Time-stamp interrupt - enable - 15 - 1 - - - WUTIE - Wakeup timer interrupt - enable - 14 - 1 - - - ALRBIE - Alarm B interrupt enable - 13 - 1 - - - ALRAIE - Alarm A interrupt enable - 12 - 1 - - - TSE - Time stamp enable - 11 - 1 - - - WUTE - Wakeup timer enable - 10 - 1 - - - ALRBE - Alarm B enable - 9 - 1 - - - ALRAE - Alarm A enable - 8 - 1 - - - DCE - Coarse digital calibration - enable - 7 - 1 - - - FMT - Hour format - 6 - 1 - - - REFCKON - Reference clock detection enable (50 or - 60 Hz) - 4 - 1 - - - TSEDGE - Time-stamp event active - edge - 3 - 1 - - - WCKSEL - Wakeup clock selection - 0 - 3 - - - - - ISR - - initialization and status - register - 0xc - 32 - 0x00000007 - - - ALRAWF - Alarm A write flag - 0 - 1 - read-only - - - ALRBWF - Alarm B write flag - 1 - 1 - read-only - - - WUTWF - Wakeup timer write flag - 2 - 1 - read-only - - - SHPF - Shift operation pending - 3 - 1 - read-write - - - INITS - Initialization status flag - 4 - 1 - read-only - - - RSF - Registers synchronization - flag - 5 - 1 - read-write - - - INITF - Initialization flag - 6 - 1 - read-only - - - INIT - Initialization mode - 7 - 1 - read-write - - - ALRAF - Alarm A flag - 8 - 1 - read-write - - - ALRBF - Alarm B flag - 9 - 1 - read-write - - - WUTF - Wakeup timer flag - 10 - 1 - read-write - - - TSF - Time-stamp flag - 11 - 1 - read-write - - - TSOVF - Time-stamp overflow flag - 12 - 1 - read-write - - - TAMP1F - Tamper detection flag - 13 - 1 - read-write - - - TAMP2F - TAMPER2 detection flag - 14 - 1 - read-write - - - RECALPF - Recalibration pending Flag - 16 - 1 - read-only - - - - - PRER - - prescaler register - 0x10 - 32 - read-write - 0x007f00ff - - - PREDIV_A - Asynchronous prescaler - factor - 16 - 7 - - - PREDIV_S - Synchronous prescaler - factor - 0 - 15 - - - - - WUTR - - wakeup timer register - 0x14 - 32 - read-write - 0x0000ffff - - - WUT - Wakeup auto-reload value - bits - 0 - 16 - - - - - CALIBR - - calibration register - 0x18 - 32 - read-write - 0x00000000 - - - DCS - Digital calibration sign - 7 - 1 - - - DC - Digital calibration - 0 - 5 - - - - - ALRMAR - - alarm A register - 0x1c - 32 - read-write - 0x00000000 - - - MSK4 - Alarm A date mask - 31 - 1 - - - WDSEL - Week day selection - 30 - 1 - - - DT - Date tens in BCD format - 28 - 2 - - - DU - Date units or day in BCD - format - 24 - 4 - - - MSK3 - Alarm A hours mask - 23 - 1 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MSK2 - Alarm A minutes mask - 15 - 1 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - MSK1 - Alarm A seconds mask - 7 - 1 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - ALRMBR - - alarm B register - 0x20 - 32 - read-write - 0x00000000 - - - MSK4 - Alarm B date mask - 31 - 1 - - - WDSEL - Week day selection - 30 - 1 - - - DT - Date tens in BCD format - 28 - 2 - - - DU - Date units or day in BCD - format - 24 - 4 - - - MSK3 - Alarm B hours mask - 23 - 1 - - - PM - AM/PM notation - 22 - 1 - - - HT - Hour tens in BCD format - 20 - 2 - - - HU - Hour units in BCD format - 16 - 4 - - - MSK2 - Alarm B minutes mask - 15 - 1 - - - MNT - Minute tens in BCD format - 12 - 3 - - - MNU - Minute units in BCD format - 8 - 4 - - - MSK1 - Alarm B seconds mask - 7 - 1 - - - ST - Second tens in BCD format - 4 - 3 - - - SU - Second units in BCD format - 0 - 4 - - - - - WPR - - write protection register - 0x24 - 32 - write-only - 0x00000000 - - - KEY - Write protection key - 0 - 8 - - - - - SSR - - sub second register - 0x28 - 32 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - SHIFTR - - shift control register - 0x2c - 32 - write-only - 0x00000000 - - - ADD1S - Add one second - 31 - 1 - - - SUBFS - Subtract a fraction of a - second - 0 - 15 - - - - - TSTR - - time stamp time register - 0x30 - 32 - read-only - 0x00000000 - - - ALARMOUTTYPE - AFO_ALARM output type - 18 - 1 - - - TSINSEL - TIMESTAMP mapping - 17 - 1 - - - TAMP1INSEL - TAMPER1 mapping - 16 - 1 - - - TAMPIE - Tamper interrupt enable - 2 - 1 - - - TAMP1TRG - Active level for tamper 1 - 1 - 1 - - - TAMP1E - Tamper 1 detection enable - 0 - 1 - - - - - TSDR - - time stamp date register - 0x34 - 32 - read-only - 0x00000000 - - - WDU - Week day units - 13 - 3 - - - MT - Month tens in BCD format - 12 - 1 - - - MU - Month units in BCD format - 8 - 4 - - - DT - Date tens in BCD format - 4 - 2 - - - DU - Date units in BCD format - 0 - 4 - - - - - TSSSR - - timestamp sub second register - 0x38 - 32 - read-only - 0x00000000 - - - SS - Sub second value - 0 - 16 - - - - - CALR - - calibration register - 0x3c - 32 - read-write - 0x00000000 - - - CALP - Increase frequency of RTC by 488.5 - ppm - 15 - 1 - - - CALW8 - Use an 8-second calibration cycle - period - 14 - 1 - - - CALW16 - Use a 16-second calibration cycle - period - 13 - 1 - - - CALM - Calibration minus - 0 - 9 - - - - - TAFCR - - tamper and alternate function configuration - register - 0x40 - 32 - read-write - 0x00000000 - - - ALARMOUTTYPE - AFO_ALARM output type - 18 - 1 - - - TSINSEL - TIMESTAMP mapping - 17 - 1 - - - TAMP1INSEL - TAMPER1 mapping - 16 - 1 - - - TAMPPUDIS - TAMPER pull-up disable - 15 - 1 - - - TAMPPRCH - Tamper precharge duration - 13 - 2 - - - TAMPFLT - Tamper filter count - 11 - 2 - - - TAMPFREQ - Tamper sampling frequency - 8 - 3 - - - TAMPTS - Activate timestamp on tamper detection - event - 7 - 1 - - - TAMP2TRG - Active level for tamper 2 - 4 - 1 - - - TAMP2E - Tamper 2 detection enable - 3 - 1 - - - TAMPIE - Tamper interrupt enable - 2 - 1 - - - TAMP1TRG - Active level for tamper 1 - 1 - 1 - - - TAMP1E - Tamper 1 detection enable - 0 - 1 - - - - - ALRMASSR - - alarm A sub second register - 0x44 - 32 - read-write - 0x00000000 - - - MASKSS - Mask the most-significant bits starting - at this bit - 24 - 4 - - - SS - Sub seconds value - 0 - 15 - - - - - ALRMBSSR - - alarm B sub second register - 0x48 - 32 - read-write - 0x00000000 - - - MASKSS - Mask the most-significant bits starting - at this bit - 24 - 4 - - - SS - Sub seconds value - 0 - 15 - - - - - BKP0R - - backup register - 0x50 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP1R - - backup register - 0x54 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP2R - - backup register - 0x58 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP3R - - backup register - 0x5c - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP4R - - backup register - 0x60 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP5R - - backup register - 0x64 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP6R - - backup register - 0x68 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP7R - - backup register - 0x6c - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP8R - - backup register - 0x70 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP9R - - backup register - 0x74 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP10R - - backup register - 0x78 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP11R - - backup register - 0x7c - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP12R - - backup register - 0x80 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP13R - - backup register - 0x84 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP14R - - backup register - 0x88 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP15R - - backup register - 0x8c - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP16R - - backup register - 0x90 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP17R - - backup register - 0x94 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP18R - - backup register - 0x98 - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - BKP19R - - backup register - 0x9c - 32 - read-write - 0x00000000 - - - BKP - BKP - 0 - 32 - - - - - - - UART4 - Universal synchronous asynchronous receiver - transmitter - USART - 0x40004c00 - - 0x0 - 0x400 - registers - - - UART4 - UART4 global interrupt - 52 - - - - SR - - Status register - 0x0 - 32 - 0x00c00000 - - - LBD - LIN break detection flag - 8 - 1 - read-write - - - TXE - Transmit data register - empty - 7 - 1 - read-only - - - TC - Transmission complete - 6 - 1 - read-write - - - RXNE - Read data register not - empty - 5 - 1 - read-write - - - IDLE - IDLE line detected - 4 - 1 - read-only - - - ORE - Overrun error - 3 - 1 - read-only - - - NF - Noise detected flag - 2 - 1 - read-only - - - FE - Framing error - 1 - 1 - read-only - - - PE - Parity error - 0 - 1 - read-only - - - - - DR - - Data register - 0x4 - 32 - read-write - 0x00000000 - - - DR - Data value - 0 - 9 - - - - - BRR - - Baud rate register - 0x8 - 32 - read-write - 0x0 - - - DIV_Mantissa - mantissa of USARTDIV - 4 - 12 - - - DIV_Fraction - fraction of USARTDIV - 0 - 4 - - - - - CR1 - - Control register 1 - 0xc - 32 - read-write - 0x0 - - - OVER8 - Oversampling mode - 15 - 1 - - - UE - USART enable - 13 - 1 - - - M - Word length - 12 - 1 - - - WAKE - Wakeup method - 11 - 1 - - - PCE - Parity control enable - 10 - 1 - - - PS - Parity selection - 9 - 1 - - - PEIE - PE interrupt enable - 8 - 1 - - - TXEIE - TXE interrupt enable - 7 - 1 - - - TCIE - Transmission complete interrupt - enable - 6 - 1 - - - RXNEIE - RXNE interrupt enable - 5 - 1 - - - IDLEIE - IDLE interrupt enable - 4 - 1 - - - TE - Transmitter enable - 3 - 1 - - - RE - Receiver enable - 2 - 1 - - - RWU - Receiver wakeup - 1 - 1 - - - SBK - Send break - 0 - 1 - - - - - CR2 - - Control register 2 - 0x10 - 32 - read-write - 0x0 - - - LINEN - LIN mode enable - 14 - 1 - - - STOP - STOP bits - 12 - 2 - - - LBDIE - LIN break detection interrupt - enable - 6 - 1 - - - LBDL - lin break detection length - 5 - 1 - - - ADD - Address of the USART node - 0 - 4 - - - - - CR3 - - Control register 3 - 0x14 - 32 - read-write - 0x0 - - - ONEBIT - One sample bit method - enable - 11 - 1 - - - DMAT - DMA enable transmitter - 7 - 1 - - - DMAR - DMA enable receiver - 6 - 1 - - - HDSEL - Half-duplex selection - 3 - 1 - - - IRLP - IrDA low-power - 2 - 1 - - - IREN - IrDA mode enable - 1 - 1 - - - EIE - Error interrupt enable - 0 - 1 - - - - - - - UART5 - 0x40005000 - - UART5 - UART5 global interrupt - 53 - - - - C_ADC - Common ADC registers - ADC - 0x40012300 - - 0x0 - 0x400 - registers - - - - CSR - - ADC Common status register - 0x0 - 32 - read-only - 0x00000000 - - - OVR3 - Overrun flag of ADC3 - 21 - 1 - - - STRT3 - Regular channel Start flag of ADC - 3 - 20 - 1 - - - JSTRT3 - Injected channel Start flag of ADC - 3 - 19 - 1 - - - JEOC3 - Injected channel end of conversion of - ADC 3 - 18 - 1 - - - EOC3 - End of conversion of ADC 3 - 17 - 1 - - - AWD3 - Analog watchdog flag of ADC - 3 - 16 - 1 - - - OVR2 - Overrun flag of ADC 2 - 13 - 1 - - - STRT2 - Regular channel Start flag of ADC - 2 - 12 - 1 - - - JSTRT2 - Injected channel Start flag of ADC - 2 - 11 - 1 - - - JEOC2 - Injected channel end of conversion of - ADC 2 - 10 - 1 - - - EOC2 - End of conversion of ADC 2 - 9 - 1 - - - AWD2 - Analog watchdog flag of ADC - 2 - 8 - 1 - - - OVR1 - Overrun flag of ADC 1 - 5 - 1 - - - STRT1 - Regular channel Start flag of ADC - 1 - 4 - 1 - - - JSTRT1 - Injected channel Start flag of ADC - 1 - 3 - 1 - - - JEOC1 - Injected channel end of conversion of - ADC 1 - 2 - 1 - - - EOC1 - End of conversion of ADC 1 - 1 - 1 - - - AWD1 - Analog watchdog flag of ADC - 1 - 0 - 1 - - - - - CCR - - ADC common control register - 0x4 - 32 - read-write - 0x00000000 - - - TSVREFE - Temperature sensor and VREFINT - enable - 23 - 1 - - - VBATE - VBAT enable - 22 - 1 - - - ADCPRE - ADC prescaler - 16 - 2 - - - DMA - Direct memory access mode for multi ADC - mode - 14 - 2 - - - DDS - DMA disable selection for multi-ADC - mode - 13 - 1 - - - DELAY - Delay between 2 sampling - phases - 8 - 4 - - - MULT - Multi ADC mode selection - 0 - 5 - - - - - CDR - - ADC common regular data register for dual - and triple modes - 0x8 - 32 - read-only - 0x00000000 - - - DATA2 - 2nd data item of a pair of regular - conversions - 16 - 16 - - - DATA1 - 1st data item of a pair of regular - conversions - 0 - 16 - - - - - - - TIM1 - Advanced-timers - TIM - 0x40010000 - - 0x0 - 0x400 - registers - - - TIM1_BRK_TIM9 - TIM1 Break interrupt and TIM9 global - interrupt - 24 - - - TIM1_UP_TIM10 - TIM1 Update interrupt and TIM10 global - interrupt - 25 - - - TIM1_TRG_COM_TIM11 - TIM1 Trigger and Commutation interrupts and - TIM11 global interrupt - 26 - - - TIM1_CC - TIM1 Capture Compare interrupt - 27 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - - control register 2 - 0x4 - 32 - read-write - 0x0 - - - OIS4 - Output Idle state 4 - 14 - 1 - - - OIS3N - Output Idle state 3 - 13 - 1 - - - OIS3 - Output Idle state 3 - 12 - 1 - - - OIS2N - Output Idle state 2 - 11 - 1 - - - OIS2 - Output Idle state 2 - 10 - 1 - - - OIS1N - Output Idle state 1 - 9 - 1 - - - OIS1 - Output Idle state 1 - 8 - 1 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - CCUS - Capture/compare control update - selection - 2 - 1 - - - CCPC - Capture/compare preloaded - control - 0 - 1 - - - - - SMCR - - slave mode control register - 0x8 - 32 - read-write - 0x0 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - - DMA/Interrupt enable register - 0xc - 32 - read-write - 0x0 - - - TDE - Trigger DMA request enable - 14 - 1 - - - COMDE - COM DMA request enable - 13 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - BIE - Break interrupt enable - 7 - 1 - - - COMIE - COM interrupt enable - 5 - 1 - - - - - SR - - status register - 0x10 - 32 - read-write - 0x0 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - BIF - Break interrupt flag - 7 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - COMIF - COM interrupt flag - 5 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - - event generation register - 0x14 - 32 - write-only - 0x0 - - - BG - Break generation - 7 - 1 - - - TG - Trigger generation - 6 - 1 - - - COMG - Capture/Compare control update - generation - 5 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 32 - read-write - 0x00000000 - - - OC2CE - Output Compare 2 clear - enable - 15 - 1 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1CE - Output Compare 1 clear - enable - 7 - 1 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 32 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1c - 32 - read-write - 0x00000000 - - - OC4CE - Output compare 4 clear - enable - 15 - 1 - - - OC4M - Output compare 4 mode - 12 - 3 - - - OC4PE - Output compare 4 preload - enable - 11 - 1 - - - OC4FE - Output compare 4 fast - enable - 10 - 1 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - OC3CE - Output compare 3 clear - enable - 7 - 1 - - - OC3M - Output compare 3 mode - 4 - 3 - - - OC3PE - Output compare 3 preload - enable - 3 - 1 - - - OC3FE - Output compare 3 fast - enable - 2 - 1 - - - CC3S - Capture/Compare 3 - selection - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1c - 32 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - - capture/compare enable - register - 0x20 - 32 - read-write - 0x0 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3NE - Capture/Compare 3 complementary output - enable - 10 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2NE - Capture/Compare 2 complementary output - enable - 6 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1NE - Capture/Compare 1 complementary output - enable - 2 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - - counter - 0x24 - 32 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - - prescaler - 0x28 - 32 - read-write - 0x0 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - - auto-reload register - 0x2c - 32 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - - capture/compare register 1 - 0x34 - 32 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - - capture/compare register 2 - 0x38 - 32 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - CCR3 - - capture/compare register 3 - 0x3c - 32 - read-write - 0x00000000 - - - CCR3 - Capture/Compare value - 0 - 16 - - - - - CCR4 - - capture/compare register 4 - 0x40 - 32 - read-write - 0x00000000 - - - CCR4 - Capture/Compare value - 0 - 16 - - - - - DCR - - DMA control register - 0x48 - 32 - read-write - 0x0 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - - DMA address for full transfer - 0x4c - 32 - read-write - 0x0 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - RCR - - repetition counter register - 0x30 - 32 - read-write - 0x0 - - - REP - Repetition counter value - 0 - 8 - - - - - BDTR - - break and dead-time register - 0x44 - 32 - read-write - 0x0 - - - MOE - Main output enable - 15 - 1 - - - AOE - Automatic output enable - 14 - 1 - - - BKP - Break polarity - 13 - 1 - - - BKE - Break enable - 12 - 1 - - - OSSR - Off-state selection for Run - mode - 11 - 1 - - - OSSI - Off-state selection for Idle - mode - 10 - 1 - - - LOCK - Lock configuration - 8 - 2 - - - DTG - Dead-time generator setup - 0 - 8 - - - - - - - TIM8 - 0x40010400 - - TIM8_BRK_TIM12 - TIM8 Break interrupt and TIM12 global - interrupt - 43 - - - TIM8_UP_TIM13 - TIM8 Update interrupt and TIM13 global - interrupt - 44 - - - TIM8_TRG_COM_TIM14 - TIM8 Trigger and Commutation interrupts and - TIM14 global interrupt - 45 - - - TIM8_CC - TIM8 Capture Compare interrupt - 46 - - - - TIM2 - General purpose timers - TIM - 0x40000000 - - 0x0 - 0x400 - registers - - - TIM2 - TIM2 global interrupt - 28 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - - control register 2 - 0x4 - 32 - read-write - 0x0 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - - slave mode control register - 0x8 - 32 - read-write - 0x0 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - - DMA/Interrupt enable register - 0xc - 32 - read-write - 0x0 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - - status register - 0x10 - 32 - read-write - 0x0 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - - event generation register - 0x14 - 32 - write-only - 0x0 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 32 - read-write - 0x00000000 - - - OC2CE - OC2CE - 15 - 1 - - - OC2M - OC2M - 12 - 3 - - - OC2PE - OC2PE - 11 - 1 - - - OC2FE - OC2FE - 10 - 1 - - - CC2S - CC2S - 8 - 2 - - - OC1CE - OC1CE - 7 - 1 - - - OC1M - OC1M - 4 - 3 - - - OC1PE - OC1PE - 3 - 1 - - - OC1FE - OC1FE - 2 - 1 - - - CC1S - CC1S - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 32 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1c - 32 - read-write - 0x00000000 - - - O24CE - O24CE - 15 - 1 - - - OC4M - OC4M - 12 - 3 - - - OC4PE - OC4PE - 11 - 1 - - - OC4FE - OC4FE - 10 - 1 - - - CC4S - CC4S - 8 - 2 - - - OC3CE - OC3CE - 7 - 1 - - - OC3M - OC3M - 4 - 3 - - - OC3PE - OC3PE - 3 - 1 - - - OC3FE - OC3FE - 2 - 1 - - - CC3S - CC3S - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1c - 32 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - - capture/compare enable - register - 0x20 - 32 - read-write - 0x0 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - - counter - 0x24 - 32 - read-write - 0x00000000 - - - CNT_H - High counter value - 16 - 16 - - - CNT_L - Low counter value - 0 - 16 - - - - - PSC - - prescaler - 0x28 - 32 - read-write - 0x0 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - - auto-reload register - 0x2c - 32 - read-write - 0x00000000 - - - ARR_H - High Auto-reload value - 16 - 16 - - - ARR_L - Low Auto-reload value - 0 - 16 - - - - - CCR1 - - capture/compare register 1 - 0x34 - 32 - read-write - 0x00000000 - - - CCR1_H - High Capture/Compare 1 - value - 16 - 16 - - - CCR1_L - Low Capture/Compare 1 - value - 0 - 16 - - - - - CCR2 - - capture/compare register 2 - 0x38 - 32 - read-write - 0x00000000 - - - CCR2_H - High Capture/Compare 2 - value - 16 - 16 - - - CCR2_L - Low Capture/Compare 2 - value - 0 - 16 - - - - - CCR3 - - capture/compare register 3 - 0x3c - 32 - read-write - 0x00000000 - - - CCR3_H - High Capture/Compare value - 16 - 16 - - - CCR3_L - Low Capture/Compare value - 0 - 16 - - - - - CCR4 - - capture/compare register 4 - 0x40 - 32 - read-write - 0x00000000 - - - CCR4_H - High Capture/Compare value - 16 - 16 - - - CCR4_L - Low Capture/Compare value - 0 - 16 - - - - - DCR - - DMA control register - 0x48 - 32 - read-write - 0x0 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - - DMA address for full transfer - 0x4c - 32 - read-write - 0x0 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - OR - - TIM5 option register - 0x50 - 32 - read-write - 0x0 - - - ITR1_RMP - Timer Input 4 remap - 10 - 2 - - - - - - - TIM3 - General purpose timers - TIM - 0x40000400 - - 0x0 - 0x400 - registers - - - TIM3 - TIM3 global interrupt - 29 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - - control register 2 - 0x4 - 32 - read-write - 0x0 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - - slave mode control register - 0x8 - 32 - read-write - 0x0 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - - DMA/Interrupt enable register - 0xc - 32 - read-write - 0x0 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - - status register - 0x10 - 32 - read-write - 0x0 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - - event generation register - 0x14 - 32 - write-only - 0x0 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 32 - read-write - 0x00000000 - - - OC2CE - OC2CE - 15 - 1 - - - OC2M - OC2M - 12 - 3 - - - OC2PE - OC2PE - 11 - 1 - - - OC2FE - OC2FE - 10 - 1 - - - CC2S - CC2S - 8 - 2 - - - OC1CE - OC1CE - 7 - 1 - - - OC1M - OC1M - 4 - 3 - - - OC1PE - OC1PE - 3 - 1 - - - OC1FE - OC1FE - 2 - 1 - - - CC1S - CC1S - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 32 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1c - 32 - read-write - 0x00000000 - - - O24CE - O24CE - 15 - 1 - - - OC4M - OC4M - 12 - 3 - - - OC4PE - OC4PE - 11 - 1 - - - OC4FE - OC4FE - 10 - 1 - - - CC4S - CC4S - 8 - 2 - - - OC3CE - OC3CE - 7 - 1 - - - OC3M - OC3M - 4 - 3 - - - OC3PE - OC3PE - 3 - 1 - - - OC3FE - OC3FE - 2 - 1 - - - CC3S - CC3S - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1c - 32 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - - capture/compare enable - register - 0x20 - 32 - read-write - 0x0 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - - counter - 0x24 - 32 - read-write - 0x00000000 - - - CNT_H - High counter value - 16 - 16 - - - CNT_L - Low counter value - 0 - 16 - - - - - PSC - - prescaler - 0x28 - 32 - read-write - 0x0 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - - auto-reload register - 0x2c - 32 - read-write - 0x00000000 - - - ARR_H - High Auto-reload value - 16 - 16 - - - ARR_L - Low Auto-reload value - 0 - 16 - - - - - CCR1 - - capture/compare register 1 - 0x34 - 32 - read-write - 0x00000000 - - - CCR1_H - High Capture/Compare 1 - value - 16 - 16 - - - CCR1_L - Low Capture/Compare 1 - value - 0 - 16 - - - - - CCR2 - - capture/compare register 2 - 0x38 - 32 - read-write - 0x00000000 - - - CCR2_H - High Capture/Compare 2 - value - 16 - 16 - - - CCR2_L - Low Capture/Compare 2 - value - 0 - 16 - - - - - CCR3 - - capture/compare register 3 - 0x3c - 32 - read-write - 0x00000000 - - - CCR3_H - High Capture/Compare value - 16 - 16 - - - CCR3_L - Low Capture/Compare value - 0 - 16 - - - - - CCR4 - - capture/compare register 4 - 0x40 - 32 - read-write - 0x00000000 - - - CCR4_H - High Capture/Compare value - 16 - 16 - - - CCR4_L - Low Capture/Compare value - 0 - 16 - - - - - DCR - - DMA control register - 0x48 - 32 - read-write - 0x0 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - - DMA address for full transfer - 0x4c - 32 - read-write - 0x0 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - - - TIM4 - 0x40000800 - - TIM4 - TIM4 global interrupt - 30 - - - - TIM5 - General-purpose-timers - TIM - 0x40000c00 - - 0x0 - 0x400 - registers - - - TIM5 - TIM5 global interrupt - 50 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - CMS - Center-aligned mode - selection - 5 - 2 - - - DIR - Direction - 4 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - - control register 2 - 0x4 - 32 - read-write - 0x0 - - - TI1S - TI1 selection - 7 - 1 - - - MMS - Master mode selection - 4 - 3 - - - CCDS - Capture/compare DMA - selection - 3 - 1 - - - - - SMCR - - slave mode control register - 0x8 - 32 - read-write - 0x0 - - - ETP - External trigger polarity - 15 - 1 - - - ECE - External clock enable - 14 - 1 - - - ETPS - External trigger prescaler - 12 - 2 - - - ETF - External trigger filter - 8 - 4 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - - DMA/Interrupt enable register - 0xc - 32 - read-write - 0x0 - - - TDE - Trigger DMA request enable - 14 - 1 - - - CC4DE - Capture/Compare 4 DMA request - enable - 12 - 1 - - - CC3DE - Capture/Compare 3 DMA request - enable - 11 - 1 - - - CC2DE - Capture/Compare 2 DMA request - enable - 10 - 1 - - - CC1DE - Capture/Compare 1 DMA request - enable - 9 - 1 - - - UDE - Update DMA request enable - 8 - 1 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC4IE - Capture/Compare 4 interrupt - enable - 4 - 1 - - - CC3IE - Capture/Compare 3 interrupt - enable - 3 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - - status register - 0x10 - 32 - read-write - 0x0 - - - CC4OF - Capture/Compare 4 overcapture - flag - 12 - 1 - - - CC3OF - Capture/Compare 3 overcapture - flag - 11 - 1 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC4IF - Capture/Compare 4 interrupt - flag - 4 - 1 - - - CC3IF - Capture/Compare 3 interrupt - flag - 3 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - - event generation register - 0x14 - 32 - write-only - 0x0 - - - TG - Trigger generation - 6 - 1 - - - CC4G - Capture/compare 4 - generation - 4 - 1 - - - CC3G - Capture/compare 3 - generation - 3 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 32 - read-write - 0x00000000 - - - OC2CE - OC2CE - 15 - 1 - - - OC2M - OC2M - 12 - 3 - - - OC2PE - OC2PE - 11 - 1 - - - OC2FE - OC2FE - 10 - 1 - - - CC2S - CC2S - 8 - 2 - - - OC1CE - OC1CE - 7 - 1 - - - OC1M - OC1M - 4 - 3 - - - OC1PE - OC1PE - 3 - 1 - - - OC1FE - OC1FE - 2 - 1 - - - CC1S - CC1S - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 32 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 4 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR2_Output - CCMR2_Output - capture/compare mode register 2 (output - mode) - 0x1c - 32 - read-write - 0x00000000 - - - O24CE - O24CE - 15 - 1 - - - OC4M - OC4M - 12 - 3 - - - OC4PE - OC4PE - 11 - 1 - - - OC4FE - OC4FE - 10 - 1 - - - CC4S - CC4S - 8 - 2 - - - OC3CE - OC3CE - 7 - 1 - - - OC3M - OC3M - 4 - 3 - - - OC3PE - OC3PE - 3 - 1 - - - OC3FE - OC3FE - 2 - 1 - - - CC3S - CC3S - 0 - 2 - - - - - CCMR2_Input - CCMR2_Input - capture/compare mode register 2 (input - mode) - CCMR2_Output - 0x1c - 32 - read-write - 0x00000000 - - - IC4F - Input capture 4 filter - 12 - 4 - - - IC4PSC - Input capture 4 prescaler - 10 - 2 - - - CC4S - Capture/Compare 4 - selection - 8 - 2 - - - IC3F - Input capture 3 filter - 4 - 4 - - - IC3PSC - Input capture 3 prescaler - 2 - 2 - - - CC3S - Capture/compare 3 - selection - 0 - 2 - - - - - CCER - - capture/compare enable - register - 0x20 - 32 - read-write - 0x0 - - - CC4NP - Capture/Compare 4 output - Polarity - 15 - 1 - - - CC4P - Capture/Compare 3 output - Polarity - 13 - 1 - - - CC4E - Capture/Compare 4 output - enable - 12 - 1 - - - CC3NP - Capture/Compare 3 output - Polarity - 11 - 1 - - - CC3P - Capture/Compare 3 output - Polarity - 9 - 1 - - - CC3E - Capture/Compare 3 output - enable - 8 - 1 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - - counter - 0x24 - 32 - read-write - 0x00000000 - - - CNT_H - High counter value - 16 - 16 - - - CNT_L - Low counter value - 0 - 16 - - - - - PSC - - prescaler - 0x28 - 32 - read-write - 0x0 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - - auto-reload register - 0x2c - 32 - read-write - 0x00000000 - - - ARR_H - High Auto-reload value - 16 - 16 - - - ARR_L - Low Auto-reload value - 0 - 16 - - - - - CCR1 - - capture/compare register 1 - 0x34 - 32 - read-write - 0x00000000 - - - CCR1_H - High Capture/Compare 1 - value - 16 - 16 - - - CCR1_L - Low Capture/Compare 1 - value - 0 - 16 - - - - - CCR2 - - capture/compare register 2 - 0x38 - 32 - read-write - 0x00000000 - - - CCR2_H - High Capture/Compare 2 - value - 16 - 16 - - - CCR2_L - Low Capture/Compare 2 - value - 0 - 16 - - - - - CCR3 - - capture/compare register 3 - 0x3c - 32 - read-write - 0x00000000 - - - CCR3_H - High Capture/Compare value - 16 - 16 - - - CCR3_L - Low Capture/Compare value - 0 - 16 - - - - - CCR4 - - capture/compare register 4 - 0x40 - 32 - read-write - 0x00000000 - - - CCR4_H - High Capture/Compare value - 16 - 16 - - - CCR4_L - Low Capture/Compare value - 0 - 16 - - - - - DCR - - DMA control register - 0x48 - 32 - read-write - 0x0 - - - DBL - DMA burst length - 8 - 5 - - - DBA - DMA base address - 0 - 5 - - - - - DMAR - - DMA address for full transfer - 0x4c - 32 - read-write - 0x0 - - - DMAB - DMA register for burst - accesses - 0 - 16 - - - - - OR - - TIM5 option register - 0x50 - 32 - read-write - 0x0 - - - IT4_RMP - Timer Input 4 remap - 6 - 2 - - - - - - - TIM9 - General purpose timers - TIM - 0x40014000 - - 0x0 - 0x400 - registers - - - TIM1_BRK_TIM9 - TIM1 Break interrupt and TIM9 global - interrupt - 24 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - - control register 2 - 0x4 - 32 - read-write - 0x0 - - - MMS - Master mode selection - 4 - 3 - - - - - SMCR - - slave mode control register - 0x8 - 32 - read-write - 0x0 - - - MSM - Master/Slave mode - 7 - 1 - - - TS - Trigger selection - 4 - 3 - - - SMS - Slave mode selection - 0 - 3 - - - - - DIER - - DMA/Interrupt enable register - 0xc - 32 - read-write - 0x0 - - - TIE - Trigger interrupt enable - 6 - 1 - - - CC2IE - Capture/Compare 2 interrupt - enable - 2 - 1 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - - status register - 0x10 - 32 - read-write - 0x0 - - - CC2OF - Capture/compare 2 overcapture - flag - 10 - 1 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - TIF - Trigger interrupt flag - 6 - 1 - - - CC2IF - Capture/Compare 2 interrupt - flag - 2 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - - event generation register - 0x14 - 32 - write-only - 0x0 - - - TG - Trigger generation - 6 - 1 - - - CC2G - Capture/compare 2 - generation - 2 - 1 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 32 - read-write - 0x00000000 - - - OC2M - Output Compare 2 mode - 12 - 3 - - - OC2PE - Output Compare 2 preload - enable - 11 - 1 - - - OC2FE - Output Compare 2 fast - enable - 10 - 1 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 32 - read-write - 0x00000000 - - - IC2F - Input capture 2 filter - 12 - 3 - - - IC2PCS - Input capture 2 prescaler - 10 - 2 - - - CC2S - Capture/Compare 2 - selection - 8 - 2 - - - IC1F - Input capture 1 filter - 4 - 3 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - - capture/compare enable - register - 0x20 - 32 - read-write - 0x0 - - - CC2NP - Capture/Compare 2 output - Polarity - 7 - 1 - - - CC2P - Capture/Compare 2 output - Polarity - 5 - 1 - - - CC2E - Capture/Compare 2 output - enable - 4 - 1 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - - counter - 0x24 - 32 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - - prescaler - 0x28 - 32 - read-write - 0x0 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - - auto-reload register - 0x2c - 32 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - - capture/compare register 1 - 0x34 - 32 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - CCR2 - - capture/compare register 2 - 0x38 - 32 - read-write - 0x00000000 - - - CCR2 - Capture/Compare 2 value - 0 - 16 - - - - - - - TIM12 - 0x40001800 - - TIM8_BRK_TIM12 - TIM8 Break interrupt and TIM12 global - interrupt - 43 - - - - TIM10 - General-purpose-timers - TIM - 0x40014400 - - 0x0 - 0x400 - registers - - - TIM1_UP_TIM10 - TIM1 Update interrupt and TIM10 global - interrupt - 25 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - DIER - - DMA/Interrupt enable register - 0xc - 32 - read-write - 0x0 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - - status register - 0x10 - 32 - read-write - 0x0 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - - event generation register - 0x14 - 32 - write-only - 0x0 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 32 - read-write - 0x00000000 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 32 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - - capture/compare enable - register - 0x20 - 32 - read-write - 0x0 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - - counter - 0x24 - 32 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - - prescaler - 0x28 - 32 - read-write - 0x0 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - - auto-reload register - 0x2c - 32 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - - capture/compare register 1 - 0x34 - 32 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - - - TIM13 - 0x40001c00 - - TIM8_UP_TIM13 - TIM8 Update interrupt and TIM13 global - interrupt - 44 - - - - TIM14 - 0x40002000 - - TIM8_TRG_COM_TIM14 - TIM8 Trigger and Commutation interrupts and - TIM14 global interrupt - 45 - - - - TIM11 - General-purpose-timers - TIM - 0x40014800 - - 0x0 - 0x400 - registers - - - TIM1_TRG_COM_TIM11 - TIM1 Trigger and Commutation interrupts and - TIM11 global interrupt - 26 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - CKD - Clock division - 8 - 2 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - DIER - - DMA/Interrupt enable register - 0xc - 32 - read-write - 0x0 - - - CC1IE - Capture/Compare 1 interrupt - enable - 1 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - - status register - 0x10 - 32 - read-write - 0x0 - - - CC1OF - Capture/Compare 1 overcapture - flag - 9 - 1 - - - CC1IF - Capture/compare 1 interrupt - flag - 1 - 1 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - - event generation register - 0x14 - 32 - write-only - 0x0 - - - CC1G - Capture/compare 1 - generation - 1 - 1 - - - UG - Update generation - 0 - 1 - - - - - CCMR1_Output - CCMR1_Output - capture/compare mode register 1 (output - mode) - 0x18 - 32 - read-write - 0x00000000 - - - OC1M - Output Compare 1 mode - 4 - 3 - - - OC1PE - Output Compare 1 preload - enable - 3 - 1 - - - OC1FE - Output Compare 1 fast - enable - 2 - 1 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCMR1_Input - CCMR1_Input - capture/compare mode register 1 (input - mode) - CCMR1_Output - 0x18 - 32 - read-write - 0x00000000 - - - IC1F - Input capture 1 filter - 4 - 4 - - - ICPCS - Input capture 1 prescaler - 2 - 2 - - - CC1S - Capture/Compare 1 - selection - 0 - 2 - - - - - CCER - - capture/compare enable - register - 0x20 - 32 - read-write - 0x0 - - - CC1NP - Capture/Compare 1 output - Polarity - 3 - 1 - - - CC1P - Capture/Compare 1 output - Polarity - 1 - 1 - - - CC1E - Capture/Compare 1 output - enable - 0 - 1 - - - - - CNT - - counter - 0x24 - 32 - read-write - 0x00000000 - - - CNT - counter value - 0 - 16 - - - - - PSC - - prescaler - 0x28 - 32 - read-write - 0x0 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - - auto-reload register - 0x2c - 32 - read-write - 0x00000000 - - - ARR - Auto-reload value - 0 - 16 - - - - - CCR1 - - capture/compare register 1 - 0x34 - 32 - read-write - 0x00000000 - - - CCR1 - Capture/Compare 1 value - 0 - 16 - - - - - OR - - option register - 0x50 - 32 - read-write - 0x00000000 - - - RMP - Input 1 remapping - capability - 0 - 2 - - - - - - - TIM6 - Basic timers - TIM - 0x40001000 - - 0x0 - 0x400 - registers - - - TIM6_DAC - TIM6 global interrupt, DAC1 and DAC2 underrun - error interrupt - 54 - - - - CR1 - - control register 1 - 0x0 - 32 - read-write - 0x0 - - - ARPE - Auto-reload preload enable - 7 - 1 - - - OPM - One-pulse mode - 3 - 1 - - - URS - Update request source - 2 - 1 - - - UDIS - Update disable - 1 - 1 - - - CEN - Counter enable - 0 - 1 - - - - - CR2 - - control register 2 - 0x4 - 32 - read-write - 0x0 - - - MMS - Master mode selection - 4 - 3 - - - - - DIER - - DMA/Interrupt enable register - 0xc - 32 - read-write - 0x0 - - - UDE - Update DMA request enable - 8 - 1 - - - UIE - Update interrupt enable - 0 - 1 - - - - - SR - - status register - 0x10 - 32 - read-write - 0x0 - - - UIF - Update interrupt flag - 0 - 1 - - - - - EGR - - event generation register - 0x14 - 32 - write-only - 0x0 - - - UG - Update generation - 0 - 1 - - - - - CNT - - counter - 0x24 - 32 - read-write - 0x00000000 - - - CNT - Low counter value - 0 - 16 - - - - - PSC - - prescaler - 0x28 - 32 - read-write - 0x0 - - - PSC - Prescaler value - 0 - 16 - - - - - ARR - - auto-reload register - 0x2c - 32 - read-write - 0x00000000 - - - ARR - Low Auto-reload value - 0 - 16 - - - - - - - TIM7 - 0x40001400 - - TIM7 - TIM7 global interrupt - 55 - - - - Ethernet_MAC - Ethernet: media access control - (MAC) - Ethernet - 0x40028000 - - 0x0 - 0x400 - registers - - - ETH - Ethernet global interrupt - 61 - - - ETH_WKUP - Ethernet Wakeup through EXTI line - interrupt - 62 - - - - MACCR - - Ethernet MAC configuration - register - 0x0 - 32 - read-write - 0x0008000 - - - RE - RE - 2 - 1 - - - TE - TE - 3 - 1 - - - DC - DC - 4 - 1 - - - BL - BL - 5 - 2 - - - APCS - APCS - 7 - 1 - - - RD - RD - 9 - 1 - - - IPCO - IPCO - 10 - 1 - - - DM - DM - 11 - 1 - - - LM - LM - 12 - 1 - - - ROD - ROD - 13 - 1 - - - FES - FES - 14 - 1 - - - CSD - CSD - 16 - 1 - - - IFG - IFG - 17 - 3 - - - JD - JD - 22 - 1 - - - WD - WD - 23 - 1 - - - CSTF - CSTF - 25 - 1 - - - - - MACFFR - - Ethernet MAC frame filter - register - 0x4 - 32 - read-write - 0x00000000 - - - PM - no description available - 0 - 1 - - - HU - no description available - 1 - 1 - - - HM - no description available - 2 - 1 - - - DAIF - no description available - 3 - 1 - - - RAM - no description available - 4 - 1 - - - BFD - no description available - 5 - 1 - - - PCF - no description available - 6 - 1 - - - SAIF - no description available - 7 - 1 - - - SAF - no description available - 8 - 1 - - - HPF - no description available - 9 - 1 - - - RA - no description available - 31 - 1 - - - - - MACHTHR - - Ethernet MAC hash table high - register - 0x8 - 32 - read-write - 0x00000000 - - - HTH - no description available - 0 - 32 - - - - - MACHTLR - - Ethernet MAC hash table low - register - 0xc - 32 - read-write - 0x00000000 - - - HTL - no description available - 0 - 32 - - - - - MACMIIAR - - Ethernet MAC MII address - register - 0x10 - 32 - read-write - 0x00000000 - - - MB - no description available - 0 - 1 - - - MW - no description available - 1 - 1 - - - CR - no description available - 2 - 3 - - - MR - no description available - 6 - 5 - - - PA - no description available - 11 - 5 - - - - - MACMIIDR - - Ethernet MAC MII data register - 0x14 - 32 - read-write - 0x00000000 - - - TD - no description available - 0 - 16 - - - - - MACFCR - - Ethernet MAC flow control - register - 0x18 - 32 - read-write - 0x00000000 - - - FCB - no description available - 0 - 1 - - - TFCE - no description available - 1 - 1 - - - RFCE - no description available - 2 - 1 - - - UPFD - no description available - 3 - 1 - - - PLT - no description available - 4 - 2 - - - ZQPD - no description available - 7 - 1 - - - PT - no description available - 16 - 16 - - - - - MACVLANTR - - Ethernet MAC VLAN tag register - 0x1c - 32 - read-write - 0x00000000 - - - VLANTI - no description available - 0 - 16 - - - VLANTC - no description available - 16 - 1 - - - - - MACPMTCSR - - Ethernet MAC PMT control and status - register - 0x2c - 32 - read-write - 0x00000000 - - - PD - no description available - 0 - 1 - - - MPE - no description available - 1 - 1 - - - WFE - no description available - 2 - 1 - - - MPR - no description available - 5 - 1 - - - WFR - no description available - 6 - 1 - - - GU - no description available - 9 - 1 - - - WFFRPR - no description available - 31 - 1 - - - - - MACDBGR - - Ethernet MAC debug register - 0x34 - 32 - read-only - 0x00000000 - - - CR - CR - 0 - 1 - - - CSR - CSR - 1 - 1 - - - ROR - ROR - 2 - 1 - - - MCF - MCF - 3 - 1 - - - MCP - MCP - 4 - 1 - - - MCFHP - MCFHP - 5 - 1 - - - - - MACSR - - Ethernet MAC interrupt status - register - 0x38 - 32 - 0x00000000 - - - PMTS - no description available - 3 - 1 - read-only - - - MMCS - no description available - 4 - 1 - read-only - - - MMCRS - no description available - 5 - 1 - read-only - - - MMCTS - no description available - 6 - 1 - read-only - - - TSTS - no description available - 9 - 1 - read-write - - - - - MACIMR - - Ethernet MAC interrupt mask - register - 0x3c - 32 - read-write - 0x00000000 - - - PMTIM - no description available - 3 - 1 - - - TSTIM - no description available - 9 - 1 - - - - - MACA0HR - - Ethernet MAC address 0 high - register - 0x40 - 32 - 0x0010ffff - - - MACA0H - MAC address0 high - 0 - 16 - read-write - - - MO - Always 1 - 31 - 1 - read-only - - - - - MACA0LR - - Ethernet MAC address 0 low - register - 0x44 - 32 - read-write - 0xffffffff - - - MACA0L - 0 - 0 - 32 - - - - - MACA1HR - - Ethernet MAC address 1 high - register - 0x48 - 32 - read-write - 0x0000ffff - - - MACA1H - no description available - 0 - 16 - - - MBC - no description available - 24 - 6 - - - SA - no description available - 30 - 1 - - - AE - no description available - 31 - 1 - - - - - MACA1LR - - Ethernet MAC address1 low - register - 0x4c - 32 - read-write - 0xffffffff - - - MACA1LR - no description available - 0 - 32 - - - - - MACA2HR - - Ethernet MAC address 2 high - register - 0x50 - 32 - read-write - 0x0000ffff - - - MAC2AH - no description available - 0 - 16 - - - MBC - no description available - 24 - 6 - - - SA - no description available - 30 - 1 - - - AE - no description available - 31 - 1 - - - - - MACA2LR - - Ethernet MAC address 2 low - register - 0x54 - 32 - read-write - 0xffffffff - - - MACA2L - no description available - 0 - 31 - - - - - MACA3HR - - Ethernet MAC address 3 high - register - 0x58 - 32 - read-write - 0x0000ffff - - - MACA3H - no description available - 0 - 16 - - - MBC - no description available - 24 - 6 - - - SA - no description available - 30 - 1 - - - AE - no description available - 31 - 1 - - - - - MACA3LR - - Ethernet MAC address 3 low - register - 0x5c - 32 - read-write - 0xffffffff - - - MBCA3L - no description available - 0 - 32 - - - - - - - Ethernet_MMC - Ethernet: MAC management counters - Ethernet - 0x40028100 - - 0x0 - 0x400 - registers - - - - MMCCR - - Ethernet MMC control register - 0x0 - 32 - read-write - 0x00000000 - - - CR - no description available - 0 - 1 - - - CSR - no description available - 1 - 1 - - - ROR - no description available - 2 - 1 - - - MCF - no description available - 3 - 1 - - - MCP - no description available - 4 - 1 - - - MCFHP - no description available - 5 - 1 - - - - - MMCRIR - - Ethernet MMC receive interrupt - register - 0x4 - 32 - read-write - 0x00000000 - - - RFCES - no description available - 5 - 1 - - - RFAES - no description available - 6 - 1 - - - RGUFS - no description available - 17 - 1 - - - - - MMCTIR - - Ethernet MMC transmit interrupt - register - 0x8 - 32 - read-only - 0x00000000 - - - TGFSCS - no description available - 14 - 1 - - - TGFMSCS - no description available - 15 - 1 - - - TGFS - no description available - 21 - 1 - - - - - MMCRIMR - - Ethernet MMC receive interrupt mask - register - 0xc - 32 - read-write - 0x00000000 - - - RFCEM - no description available - 5 - 1 - - - RFAEM - no description available - 6 - 1 - - - RGUFM - no description available - 17 - 1 - - - - - MMCTIMR - - Ethernet MMC transmit interrupt mask - register - 0x10 - 32 - read-write - 0x00000000 - - - TGFSCM - no description available - 14 - 1 - - - TGFMSCM - no description available - 15 - 1 - - - TGFM - no description available - 16 - 1 - - - - - MMCTGFSCCR - - Ethernet MMC transmitted good frames after a - single collision counter - 0x4c - 32 - read-only - 0x00000000 - - - TGFSCC - no description available - 0 - 32 - - - - - MMCTGFMSCCR - - Ethernet MMC transmitted good frames after - more than a single collision - 0x50 - 32 - read-only - 0x00000000 - - - TGFMSCC - no description available - 0 - 32 - - - - - MMCTGFCR - - Ethernet MMC transmitted good frames counter - register - 0x68 - 32 - read-only - 0x00000000 - - - TGFC - HTL - 0 - 32 - - - - - MMCRFCECR - - Ethernet MMC received frames with CRC error - counter register - 0x94 - 32 - read-only - 0x00000000 - - - RFCFC - no description available - 0 - 32 - - - - - MMCRFAECR - - Ethernet MMC received frames with alignment - error counter register - 0x98 - 32 - read-only - 0x00000000 - - - RFAEC - no description available - 0 - 32 - - - - - MMCRGUFCR - - MMC received good unicast frames counter - register - 0xc4 - 32 - read-only - 0x00000000 - - - RGUFC - no description available - 0 - 32 - - - - - - - Ethernet_PTP - Ethernet: Precision time protocol - Ethernet - 0x40028700 - - 0x0 - 0x400 - registers - - - - PTPTSCR - - Ethernet PTP time stamp control - register - 0x0 - 32 - read-write - 0x00002000 - - - TSE - no description available - 0 - 1 - - - TSFCU - no description available - 1 - 1 - - - TSPTPPSV2E - no description available - 10 - 1 - - - TSSPTPOEFE - no description available - 11 - 1 - - - TSSIPV6FE - no description available - 12 - 1 - - - TSSIPV4FE - no description available - 13 - 1 - - - TSSEME - no description available - 14 - 1 - - - TSSMRME - no description available - 15 - 1 - - - TSCNT - no description available - 16 - 2 - - - TSPFFMAE - no description available - 18 - 1 - - - TSSTI - no description available - 2 - 1 - - - TSSTU - no description available - 3 - 1 - - - TSITE - no description available - 4 - 1 - - - TTSARU - no description available - 5 - 1 - - - TSSARFE - no description available - 8 - 1 - - - TSSSR - no description available - 9 - 1 - - - - - PTPSSIR - - Ethernet PTP subsecond increment - register - 0x4 - 32 - read-write - 0x00000000 - - - STSSI - no description available - 0 - 8 - - - - - PTPTSHR - - Ethernet PTP time stamp high - register - 0x8 - 32 - read-only - 0x00000000 - - - STS - no description available - 0 - 32 - - - - - PTPTSLR - - Ethernet PTP time stamp low - register - 0xc - 32 - read-only - 0x00000000 - - - STSS - no description available - 0 - 31 - - - STPNS - no description available - 31 - 1 - - - - - PTPTSHUR - - Ethernet PTP time stamp high update - register - 0x10 - 32 - read-write - 0x00000000 - - - TSUS - no description available - 0 - 32 - - - - - PTPTSLUR - - Ethernet PTP time stamp low update - register - 0x14 - 32 - read-write - 0x00000000 - - - TSUSS - no description available - 0 - 31 - - - TSUPNS - no description available - 31 - 1 - - - - - PTPTSAR - - Ethernet PTP time stamp addend - register - 0x18 - 32 - read-write - 0x00000000 - - - TSA - no description available - 0 - 32 - - - - - PTPTTHR - - Ethernet PTP target time high - register - 0x1c - 32 - read-write - 0x00000000 - - - TTSH - 0 - 0 - 32 - - - - - PTPTTLR - - Ethernet PTP target time low - register - 0x20 - 32 - read-write - 0x00000000 - - - TTSL - no description available - 0 - 32 - - - - - PTPTSSR - - Ethernet PTP time stamp status - register - 0x28 - 32 - read-only - 0x00000000 - - - TSSO - no description available - 0 - 1 - - - TSTTR - no description available - 1 - 1 - - - - - PTPPPSCR - - Ethernet PTP PPS control - register - 0x2c - 32 - read-only - 0x00000000 - - - TSSO - TSSO - 0 - 1 - - - TSTTR - TSTTR - 1 - 1 - - - - - - - Ethernet_DMA - Ethernet: DMA controller operation - Ethernet - 0x40029000 - - 0x0 - 0x400 - registers - - - - DMABMR - - Ethernet DMA bus mode register - 0x0 - 32 - read-write - 0x00002101 - - - SR - no description available - 0 - 1 - - - DA - no description available - 1 - 1 - - - DSL - no description available - 2 - 5 - - - EDFE - no description available - 7 - 1 - - - PBL - no description available - 8 - 6 - - - RTPR - no description available - 14 - 2 - - - FB - no description available - 16 - 1 - - - RDP - no description available - 17 - 6 - - - USP - no description available - 23 - 1 - - - FPM - no description available - 24 - 1 - - - AAB - no description available - 25 - 1 - - - MB - no description available - 26 - 1 - - - - - DMATPDR - - Ethernet DMA transmit poll demand - register - 0x4 - 32 - read-write - 0x00000000 - - - TPD - no description available - 0 - 32 - - - - - DMARPDR - - EHERNET DMA receive poll demand - register - 0x8 - 32 - read-write - 0x00000000 - - - RPD - RPD - 0 - 32 - - - - - DMARDLAR - - Ethernet DMA receive descriptor list address - register - 0xc - 32 - read-write - 0x00000000 - - - SRL - no description available - 0 - 32 - - - - - DMATDLAR - - Ethernet DMA transmit descriptor list - address register - 0x10 - 32 - read-write - 0x00000000 - - - STL - no description available - 0 - 32 - - - - - DMASR - - Ethernet DMA status register - 0x14 - 32 - 0x00000000 - - - TS - no description available - 0 - 1 - read-write - - - TPSS - no description available - 1 - 1 - read-write - - - TBUS - no description available - 2 - 1 - read-write - - - TJTS - no description available - 3 - 1 - read-write - - - ROS - no description available - 4 - 1 - read-write - - - TUS - no description available - 5 - 1 - read-write - - - RS - no description available - 6 - 1 - read-write - - - RBUS - no description available - 7 - 1 - read-write - - - RPSS - no description available - 8 - 1 - read-write - - - PWTS - no description available - 9 - 1 - read-write - - - ETS - no description available - 10 - 1 - read-write - - - FBES - no description available - 13 - 1 - read-write - - - ERS - no description available - 14 - 1 - read-write - - - AIS - no description available - 15 - 1 - read-write - - - NIS - no description available - 16 - 1 - read-write - - - RPS - no description available - 17 - 3 - read-only - - - TPS - no description available - 20 - 3 - read-only - - - EBS - no description available - 23 - 3 - read-only - - - MMCS - no description available - 27 - 1 - read-only - - - PMTS - no description available - 28 - 1 - read-only - - - TSTS - no description available - 29 - 1 - read-only - - - - - DMAOMR - - Ethernet DMA operation mode - register - 0x18 - 32 - read-write - 0x00000000 - - - SR - SR - 1 - 1 - - - OSF - OSF - 2 - 1 - - - RTC - RTC - 3 - 2 - - - FUGF - FUGF - 6 - 1 - - - FEF - FEF - 7 - 1 - - - ST - ST - 13 - 1 - - - TTC - TTC - 14 - 3 - - - FTF - FTF - 20 - 1 - - - TSF - TSF - 21 - 1 - - - DFRF - DFRF - 24 - 1 - - - RSF - RSF - 25 - 1 - - - DTCEFD - DTCEFD - 26 - 1 - - - - - DMAIER - - Ethernet DMA interrupt enable - register - 0x1c - 32 - read-write - 0x00000000 - - - TIE - no description available - 0 - 1 - - - TPSIE - no description available - 1 - 1 - - - TBUIE - no description available - 2 - 1 - - - TJTIE - no description available - 3 - 1 - - - ROIE - no description available - 4 - 1 - - - TUIE - no description available - 5 - 1 - - - RIE - no description available - 6 - 1 - - - RBUIE - no description available - 7 - 1 - - - RPSIE - no description available - 8 - 1 - - - RWTIE - no description available - 9 - 1 - - - ETIE - no description available - 10 - 1 - - - FBEIE - no description available - 13 - 1 - - - ERIE - no description available - 14 - 1 - - - AISE - no description available - 15 - 1 - - - NISE - no description available - 16 - 1 - - - - - DMAMFBOCR - - Ethernet DMA missed frame and buffer - overflow counter register - 0x20 - 32 - read-write - 0x00000000 - - - MFC - no description available - 0 - 16 - - - OMFC - no description available - 16 - 1 - - - MFA - no description available - 17 - 11 - - - OFOC - no description available - 28 - 1 - - - - - DMARSWTR - - Ethernet DMA receive status watchdog timer - register - 0x24 - 32 - read-write - 0x00000000 - - - RSWTC - RSWTC - 0 - 8 - - - - - DMACHTDR - - Ethernet DMA current host transmit - descriptor register - 0x48 - 32 - read-only - 0x00000000 - - - HTDAP - HTDAP - 0 - 32 - - - - - DMACHRDR - - Ethernet DMA current host receive descriptor - register - 0x4c - 32 - read-only - 0x00000000 - - - HRDAP - HRDAP - 0 - 32 - - - - - DMACHTBAR - - Ethernet DMA current host transmit buffer - address register - 0x50 - 32 - read-only - 0x00000000 - - - HTBAP - no description available - 0 - 32 - - - - - DMACHRBAR - - Ethernet DMA current host receive buffer - address register - 0x54 - 32 - read-only - 0x00000000 - - - HRBAP - no description available - 0 - 32 - - - - - - - CRC - Cryptographic processor - CRC - 0x40023000 - - 0x0 - 0x400 - registers - - - - DR - - Data register - 0x0 - 32 - read-write - 0xffffffff - - - DR - Data Register - 0 - 32 - - - - - IDR - - Independent Data register - 0x4 - 32 - read-write - 0x00000000 - - - IDR - Independent Data register - 0 - 8 - - - - - CR - - Control register - 0x8 - 32 - write-only - 0x00000000 - - - CR - Control regidter - 0 - 1 - - - - - - - OTG_FS_GLOBAL - USB on the go full speed - USB_OTG_FS - 0x50000000 - - 0x0 - 0x400 - registers - - - OTG_FS_WKUP - USB On-The-Go FS Wakeup through EXTI line - interrupt - 42 - - - OTG_FS - USB On The Go FS global - interrupt - 67 - - - - FS_GOTGCTL - FS_GOTGCTL - OTG_FS control and status register - (OTG_FS_GOTGCTL) - 0x0 - 32 - 0x00000800 - - - SRQSCS - Session request success - 0 - 1 - read-only - - - SRQ - Session request - 1 - 1 - read-write - - - HNGSCS - Host negotiation success - 8 - 1 - read-only - - - HNPRQ - HNP request - 9 - 1 - read-write - - - HSHNPEN - Host set HNP enable - 10 - 1 - read-write - - - DHNPEN - Device HNP enabled - 11 - 1 - read-write - - - CIDSTS - Connector ID status - 16 - 1 - read-only - - - DBCT - Long/short debounce time - 17 - 1 - read-only - - - ASVLD - A-session valid - 18 - 1 - read-only - - - BSVLD - B-session valid - 19 - 1 - read-only - - - - - FS_GOTGINT - FS_GOTGINT - OTG_FS interrupt register - (OTG_FS_GOTGINT) - 0x4 - 32 - read-write - 0x00000000 - - - SEDET - Session end detected - 2 - 1 - - - SRSSCHG - Session request success status - change - 8 - 1 - - - HNSSCHG - Host negotiation success status - change - 9 - 1 - - - HNGDET - Host negotiation detected - 17 - 1 - - - ADTOCHG - A-device timeout change - 18 - 1 - - - DBCDNE - Debounce done - 19 - 1 - - - - - FS_GAHBCFG - FS_GAHBCFG - OTG_FS AHB configuration register - (OTG_FS_GAHBCFG) - 0x8 - 32 - read-write - 0x00000000 - - - GINT - Global interrupt mask - 0 - 1 - - - TXFELVL - TxFIFO empty level - 7 - 1 - - - PTXFELVL - Periodic TxFIFO empty - level - 8 - 1 - - - - - FS_GUSBCFG - FS_GUSBCFG - OTG_FS USB configuration register - (OTG_FS_GUSBCFG) - 0xc - 32 - 0x00000a00 - - - TOCAL - FS timeout calibration - 0 - 3 - read-write - - - PHYSEL - Full Speed serial transceiver - select - 6 - 1 - write-only - - - SRPCAP - SRP-capable - 8 - 1 - read-write - - - HNPCAP - HNP-capable - 9 - 1 - read-write - - - TRDT - USB turnaround time - 10 - 4 - read-write - - - FHMOD - Force host mode - 29 - 1 - read-write - - - FDMOD - Force device mode - 30 - 1 - read-write - - - CTXPKT - Corrupt Tx packet - 31 - 1 - read-write - - - - - FS_GRSTCTL - FS_GRSTCTL - OTG_FS reset register - (OTG_FS_GRSTCTL) - 0x10 - 32 - 0x20000000 - - - CSRST - Core soft reset - 0 - 1 - read-write - - - HSRST - HCLK soft reset - 1 - 1 - read-write - - - FCRST - Host frame counter reset - 2 - 1 - read-write - - - RXFFLSH - RxFIFO flush - 4 - 1 - read-write - - - TXFFLSH - TxFIFO flush - 5 - 1 - read-write - - - TXFNUM - TxFIFO number - 6 - 5 - read-write - - - AHBIDL - AHB master idle - 31 - 1 - read-only - - - - - FS_GINTSTS - FS_GINTSTS - OTG_FS core interrupt register - (OTG_FS_GINTSTS) - 0x14 - 32 - 0x04000020 - - - CMOD - Current mode of operation - 0 - 1 - read-only - - - MMIS - Mode mismatch interrupt - 1 - 1 - read-write - - - OTGINT - OTG interrupt - 2 - 1 - read-only - - - SOF - Start of frame - 3 - 1 - read-write - - - RXFLVL - RxFIFO non-empty - 4 - 1 - read-only - - - NPTXFE - Non-periodic TxFIFO empty - 5 - 1 - read-only - - - GINAKEFF - Global IN non-periodic NAK - effective - 6 - 1 - read-only - - - GOUTNAKEFF - Global OUT NAK effective - 7 - 1 - read-only - - - ESUSP - Early suspend - 10 - 1 - read-write - - - USBSUSP - USB suspend - 11 - 1 - read-write - - - USBRST - USB reset - 12 - 1 - read-write - - - ENUMDNE - Enumeration done - 13 - 1 - read-write - - - ISOODRP - Isochronous OUT packet dropped - interrupt - 14 - 1 - read-write - - - EOPF - End of periodic frame - interrupt - 15 - 1 - read-write - - - IEPINT - IN endpoint interrupt - 18 - 1 - read-only - - - OEPINT - OUT endpoint interrupt - 19 - 1 - read-only - - - IISOIXFR - Incomplete isochronous IN - transfer - 20 - 1 - read-write - - - IPXFR_INCOMPISOOUT - Incomplete periodic transfer(Host - mode)/Incomplete isochronous OUT transfer(Device - mode) - 21 - 1 - read-write - - - HPRTINT - Host port interrupt - 24 - 1 - read-only - - - HCINT - Host channels interrupt - 25 - 1 - read-only - - - PTXFE - Periodic TxFIFO empty - 26 - 1 - read-only - - - CIDSCHG - Connector ID status change - 28 - 1 - read-write - - - DISCINT - Disconnect detected - interrupt - 29 - 1 - read-write - - - SRQINT - Session request/new session detected - interrupt - 30 - 1 - read-write - - - WKUPINT - Resume/remote wakeup detected - interrupt - 31 - 1 - read-write - - - - - FS_GINTMSK - FS_GINTMSK - OTG_FS interrupt mask register - (OTG_FS_GINTMSK) - 0x18 - 32 - 0x00000000 - - - MMISM - Mode mismatch interrupt - mask - 1 - 1 - read-write - - - OTGINT - OTG interrupt mask - 2 - 1 - read-write - - - SOFM - Start of frame mask - 3 - 1 - read-write - - - RXFLVLM - Receive FIFO non-empty - mask - 4 - 1 - read-write - - - NPTXFEM - Non-periodic TxFIFO empty - mask - 5 - 1 - read-write - - - GINAKEFFM - Global non-periodic IN NAK effective - mask - 6 - 1 - read-write - - - GONAKEFFM - Global OUT NAK effective - mask - 7 - 1 - read-write - - - ESUSPM - Early suspend mask - 10 - 1 - read-write - - - USBSUSPM - USB suspend mask - 11 - 1 - read-write - - - USBRST - USB reset mask - 12 - 1 - read-write - - - ENUMDNEM - Enumeration done mask - 13 - 1 - read-write - - - ISOODRPM - Isochronous OUT packet dropped interrupt - mask - 14 - 1 - read-write - - - EOPFM - End of periodic frame interrupt - mask - 15 - 1 - read-write - - - EPMISM - Endpoint mismatch interrupt - mask - 17 - 1 - read-write - - - IEPINT - IN endpoints interrupt - mask - 18 - 1 - read-write - - - OEPINT - OUT endpoints interrupt - mask - 19 - 1 - read-write - - - IISOIXFRM - Incomplete isochronous IN transfer - mask - 20 - 1 - read-write - - - IPXFRM_IISOOXFRM - Incomplete periodic transfer mask(Host - mode)/Incomplete isochronous OUT transfer mask(Device - mode) - 21 - 1 - read-write - - - PRTIM - Host port interrupt mask - 24 - 1 - read-only - - - HCIM - Host channels interrupt - mask - 25 - 1 - read-write - - - PTXFEM - Periodic TxFIFO empty mask - 26 - 1 - read-write - - - CIDSCHGM - Connector ID status change - mask - 28 - 1 - read-write - - - DISCINT - Disconnect detected interrupt - mask - 29 - 1 - read-write - - - SRQIM - Session request/new session detected - interrupt mask - 30 - 1 - read-write - - - WUIM - Resume/remote wakeup detected interrupt - mask - 31 - 1 - read-write - - - - - FS_GRXSTSR_Device - FS_GRXSTSR_Device - OTG_FS Receive status debug read(Device - mode) - 0x1c - 32 - read-only - 0x00000000 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - FS_GRXSTSR_Host - FS_GRXSTSR_Host - OTG_FS Receive status debug read(Host - mode) - FS_GRXSTSR_Device - 0x1c - 32 - read-only - 0x00000000 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - FS_GRXFSIZ - FS_GRXFSIZ - OTG_FS Receive FIFO size register - (OTG_FS_GRXFSIZ) - 0x24 - 32 - read-write - 0x00000200 - - - RXFD - RxFIFO depth - 0 - 16 - - - - - FS_GNPTXFSIZ_Device - FS_GNPTXFSIZ_Device - OTG_FS non-periodic transmit FIFO size - register (Device mode) - 0x28 - 32 - read-write - 0x00000200 - - - TX0FSA - Endpoint 0 transmit RAM start - address - 0 - 16 - - - TX0FD - Endpoint 0 TxFIFO depth - 16 - 16 - - - - - FS_GNPTXFSIZ_Host - FS_GNPTXFSIZ_Host - OTG_FS non-periodic transmit FIFO size - register (Host mode) - FS_GNPTXFSIZ_Device - 0x28 - 32 - read-write - 0x00000200 - - - NPTXFSA - Non-periodic transmit RAM start - address - 0 - 16 - - - NPTXFD - Non-periodic TxFIFO depth - 16 - 16 - - - - - FS_GNPTXSTS - FS_GNPTXSTS - OTG_FS non-periodic transmit FIFO/queue - status register (OTG_FS_GNPTXSTS) - 0x2c - 32 - read-only - 0x00080200 - - - NPTXFSAV - Non-periodic TxFIFO space - available - 0 - 16 - - - NPTQXSAV - Non-periodic transmit request queue - space available - 16 - 8 - - - NPTXQTOP - Top of the non-periodic transmit request - queue - 24 - 7 - - - - - FS_GCCFG - FS_GCCFG - OTG_FS general core configuration register - (OTG_FS_GCCFG) - 0x38 - 32 - read-write - 0x00000000 - - - PWRDWN - Power down - 16 - 1 - - - VBUSASEN - Enable the VBUS sensing - device - 18 - 1 - - - VBUSBSEN - Enable the VBUS sensing - device - 19 - 1 - - - SOFOUTEN - SOF output enable - 20 - 1 - - - - - FS_CID - FS_CID - core ID register - 0x3c - 32 - read-write - 0x00001000 - - - PRODUCT_ID - Product ID field - 0 - 32 - - - - - FS_HPTXFSIZ - FS_HPTXFSIZ - OTG_FS Host periodic transmit FIFO size - register (OTG_FS_HPTXFSIZ) - 0x100 - 32 - read-write - 0x02000600 - - - PTXSA - Host periodic TxFIFO start - address - 0 - 16 - - - PTXFSIZ - Host periodic TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF1 - FS_DIEPTXF1 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF2) - 0x104 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO2 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF2 - FS_DIEPTXF2 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF3) - 0x108 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO3 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - FS_DIEPTXF3 - FS_DIEPTXF3 - OTG_FS device IN endpoint transmit FIFO size - register (OTG_FS_DIEPTXF4) - 0x10c - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFO4 transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - - - OTG_FS_HOST - USB on the go full speed - USB_OTG_FS - 0x50000400 - - 0x0 - 0x400 - registers - - - - FS_HCFG - FS_HCFG - OTG_FS host configuration register - (OTG_FS_HCFG) - 0x0 - 32 - 0x00000000 - - - FSLSPCS - FS/LS PHY clock select - 0 - 2 - read-write - - - FSLSS - FS- and LS-only support - 2 - 1 - read-only - - - - - HFIR - - OTG_FS Host frame interval - register - 0x4 - 32 - read-write - 0x0000ea60 - - - FRIVL - Frame interval - 0 - 16 - - - - - FS_HFNUM - FS_HFNUM - OTG_FS host frame number/frame time - remaining register (OTG_FS_HFNUM) - 0x8 - 32 - read-only - 0x00003fff - - - FRNUM - Frame number - 0 - 16 - - - FTREM - Frame time remaining - 16 - 16 - - - - - FS_HPTXSTS - FS_HPTXSTS - OTG_FS_Host periodic transmit FIFO/queue - status register (OTG_FS_HPTXSTS) - 0x10 - 32 - 0x00080100 - - - PTXFSAVL - Periodic transmit data FIFO space - available - 0 - 16 - read-write - - - PTXQSAV - Periodic transmit request queue space - available - 16 - 8 - read-only - - - PTXQTOP - Top of the periodic transmit request - queue - 24 - 8 - read-only - - - - - HAINT - - OTG_FS Host all channels interrupt - register - 0x14 - 32 - read-only - 0x00000000 - - - HAINT - Channel interrupts - 0 - 16 - - - - - HAINTMSK - - OTG_FS host all channels interrupt mask - register - 0x18 - 32 - read-write - 0x00000000 - - - HAINTM - Channel interrupt mask - 0 - 16 - - - - - FS_HPRT - FS_HPRT - OTG_FS host port control and status register - (OTG_FS_HPRT) - 0x40 - 32 - 0x00000000 - - - PCSTS - Port connect status - 0 - 1 - read-only - - - PCDET - Port connect detected - 1 - 1 - read-write - - - PENA - Port enable - 2 - 1 - read-write - - - PENCHNG - Port enable/disable change - 3 - 1 - read-write - - - POCA - Port overcurrent active - 4 - 1 - read-only - - - POCCHNG - Port overcurrent change - 5 - 1 - read-write - - - PRES - Port resume - 6 - 1 - read-write - - - PSUSP - Port suspend - 7 - 1 - read-write - - - PRST - Port reset - 8 - 1 - read-write - - - PLSTS - Port line status - 10 - 2 - read-only - - - PPWR - Port power - 12 - 1 - read-write - - - PTCTL - Port test control - 13 - 4 - read-write - - - PSPD - Port speed - 17 - 2 - read-only - - - - - FS_HCCHAR0 - FS_HCCHAR0 - OTG_FS host channel-0 characteristics - register (OTG_FS_HCCHAR0) - 0x100 - 32 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR1 - FS_HCCHAR1 - OTG_FS host channel-1 characteristics - register (OTG_FS_HCCHAR1) - 0x120 - 32 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR2 - FS_HCCHAR2 - OTG_FS host channel-2 characteristics - register (OTG_FS_HCCHAR2) - 0x140 - 32 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR3 - FS_HCCHAR3 - OTG_FS host channel-3 characteristics - register (OTG_FS_HCCHAR3) - 0x160 - 32 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR4 - FS_HCCHAR4 - OTG_FS host channel-4 characteristics - register (OTG_FS_HCCHAR4) - 0x180 - 32 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR5 - FS_HCCHAR5 - OTG_FS host channel-5 characteristics - register (OTG_FS_HCCHAR5) - 0x1a0 - 32 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR6 - FS_HCCHAR6 - OTG_FS host channel-6 characteristics - register (OTG_FS_HCCHAR6) - 0x1c0 - 32 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCCHAR7 - FS_HCCHAR7 - OTG_FS host channel-7 characteristics - register (OTG_FS_HCCHAR7) - 0x1e0 - 32 - read-write - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MCNT - Multicount - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - FS_HCINT0 - FS_HCINT0 - OTG_FS host channel-0 interrupt register - (OTG_FS_HCINT0) - 0x108 - 32 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT1 - FS_HCINT1 - OTG_FS host channel-1 interrupt register - (OTG_FS_HCINT1) - 0x128 - 32 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT2 - FS_HCINT2 - OTG_FS host channel-2 interrupt register - (OTG_FS_HCINT2) - 0x148 - 32 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT3 - FS_HCINT3 - OTG_FS host channel-3 interrupt register - (OTG_FS_HCINT3) - 0x168 - 32 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT4 - FS_HCINT4 - OTG_FS host channel-4 interrupt register - (OTG_FS_HCINT4) - 0x188 - 32 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT5 - FS_HCINT5 - OTG_FS host channel-5 interrupt register - (OTG_FS_HCINT5) - 0x1a8 - 32 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT6 - FS_HCINT6 - OTG_FS host channel-6 interrupt register - (OTG_FS_HCINT6) - 0x1c8 - 32 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINT7 - FS_HCINT7 - OTG_FS host channel-7 interrupt register - (OTG_FS_HCINT7) - 0x1e8 - 32 - read-write - 0x00000000 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - FS_HCINTMSK0 - FS_HCINTMSK0 - OTG_FS host channel-0 mask register - (OTG_FS_HCINTMSK0) - 0x10c - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK1 - FS_HCINTMSK1 - OTG_FS host channel-1 mask register - (OTG_FS_HCINTMSK1) - 0x12c - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK2 - FS_HCINTMSK2 - OTG_FS host channel-2 mask register - (OTG_FS_HCINTMSK2) - 0x14c - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK3 - FS_HCINTMSK3 - OTG_FS host channel-3 mask register - (OTG_FS_HCINTMSK3) - 0x16c - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK4 - FS_HCINTMSK4 - OTG_FS host channel-4 mask register - (OTG_FS_HCINTMSK4) - 0x18c - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK5 - FS_HCINTMSK5 - OTG_FS host channel-5 mask register - (OTG_FS_HCINTMSK5) - 0x1ac - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK6 - FS_HCINTMSK6 - OTG_FS host channel-6 mask register - (OTG_FS_HCINTMSK6) - 0x1cc - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCINTMSK7 - FS_HCINTMSK7 - OTG_FS host channel-7 mask register - (OTG_FS_HCINTMSK7) - 0x1ec - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - FS_HCTSIZ0 - FS_HCTSIZ0 - OTG_FS host channel-0 transfer size - register - 0x110 - 32 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ1 - FS_HCTSIZ1 - OTG_FS host channel-1 transfer size - register - 0x130 - 32 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ2 - FS_HCTSIZ2 - OTG_FS host channel-2 transfer size - register - 0x150 - 32 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ3 - FS_HCTSIZ3 - OTG_FS host channel-3 transfer size - register - 0x170 - 32 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ4 - FS_HCTSIZ4 - OTG_FS host channel-x transfer size - register - 0x190 - 32 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ5 - FS_HCTSIZ5 - OTG_FS host channel-5 transfer size - register - 0x1b0 - 32 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ6 - FS_HCTSIZ6 - OTG_FS host channel-6 transfer size - register - 0x1d0 - 32 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - FS_HCTSIZ7 - FS_HCTSIZ7 - OTG_FS host channel-7 transfer size - register - 0x1f0 - 32 - read-write - 0x00000000 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - - - OTG_FS_DEVICE - USB on the go full speed - USB_OTG_FS - 0x50000800 - - 0x0 - 0x400 - registers - - - - FS_DCFG - FS_DCFG - OTG_FS device configuration register - (OTG_FS_DCFG) - 0x0 - 32 - read-write - 0x02200000 - - - DSPD - Device speed - 0 - 2 - - - NZLSOHSK - Non-zero-length status OUT - handshake - 2 - 1 - - - DAD - Device address - 4 - 7 - - - PFIVL - Periodic frame interval - 11 - 2 - - - - - FS_DCTL - FS_DCTL - OTG_FS device control register - (OTG_FS_DCTL) - 0x4 - 32 - 0x00000000 - - - RWUSIG - Remote wakeup signaling - 0 - 1 - read-write - - - SDIS - Soft disconnect - 1 - 1 - read-write - - - GINSTS - Global IN NAK status - 2 - 1 - read-only - - - GONSTS - Global OUT NAK status - 3 - 1 - read-only - - - TCTL - Test control - 4 - 3 - read-write - - - SGINAK - Set global IN NAK - 7 - 1 - read-write - - - CGINAK - Clear global IN NAK - 8 - 1 - read-write - - - SGONAK - Set global OUT NAK - 9 - 1 - read-write - - - CGONAK - Clear global OUT NAK - 10 - 1 - read-write - - - POPRGDNE - Power-on programming done - 11 - 1 - read-write - - - - - FS_DSTS - FS_DSTS - OTG_FS device status register - (OTG_FS_DSTS) - 0x8 - 32 - read-only - 0x00000010 - - - SUSPSTS - Suspend status - 0 - 1 - - - ENUMSPD - Enumerated speed - 1 - 2 - - - EERR - Erratic error - 3 - 1 - - - FNSOF - Frame number of the received - SOF - 8 - 14 - - - - - FS_DIEPMSK - FS_DIEPMSK - OTG_FS device IN endpoint common interrupt - mask register (OTG_FS_DIEPMSK) - 0x10 - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask (Non-isochronous - endpoints) - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - - - FS_DOEPMSK - FS_DOEPMSK - OTG_FS device OUT endpoint common interrupt - mask register (OTG_FS_DOEPMSK) - 0x14 - 32 - read-write - 0x00000000 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - STUPM - SETUP phase done mask - 3 - 1 - - - OTEPDM - OUT token received when endpoint - disabled mask - 4 - 1 - - - - - FS_DAINT - FS_DAINT - OTG_FS device all endpoints interrupt - register (OTG_FS_DAINT) - 0x18 - 32 - read-only - 0x00000000 - - - IEPINT - IN endpoint interrupt bits - 0 - 16 - - - OEPINT - OUT endpoint interrupt - bits - 16 - 16 - - - - - FS_DAINTMSK - FS_DAINTMSK - OTG_FS all endpoints interrupt mask register - (OTG_FS_DAINTMSK) - 0x1c - 32 - read-write - 0x00000000 - - - IEPM - IN EP interrupt mask bits - 0 - 16 - - - OEPINT - OUT endpoint interrupt - bits - 16 - 16 - - - - - DVBUSDIS - - OTG_FS device VBUS discharge time - register - 0x28 - 32 - read-write - 0x000017d7 - - - VBUSDT - Device VBUS discharge time - 0 - 16 - - - - - DVBUSPULSE - - OTG_FS device VBUS pulsing time - register - 0x2c - 32 - read-write - 0x000005b8 - - - DVBUSP - Device VBUS pulsing time - 0 - 12 - - - - - DIEPEMPMSK - - OTG_FS device IN endpoint FIFO empty - interrupt mask register - 0x34 - 32 - read-write - 0x00000000 - - - INEPTXFEM - IN EP Tx FIFO empty interrupt mask - bits - 0 - 16 - - - - - FS_DIEPCTL0 - FS_DIEPCTL0 - OTG_FS device control IN endpoint 0 control - register (OTG_FS_DIEPCTL0) - 0x100 - 32 - 0x00000000 - - - MPSIZ - Maximum packet size - 0 - 2 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-only - - - STALL - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-only - - - EPENA - Endpoint enable - 31 - 1 - read-only - - - - - DIEPCTL1 - - OTG device endpoint-1 control - register - 0x120 - 32 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM_SD1PID - SODDFRM/SD1PID - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPCTL2 - - OTG device endpoint-2 control - register - 0x140 - 32 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPCTL3 - - OTG device endpoint-3 control - register - 0x160 - 32 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - TXFNUM - TXFNUM - 22 - 4 - read-write - - - Stall - Stall - 21 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL0 - - device endpoint-0 control - register - 0x300 - 32 - 0x00008000 - - - EPENA - EPENA - 31 - 1 - write-only - - - EPDIS - EPDIS - 30 - 1 - read-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-only - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-only - - - MPSIZ - MPSIZ - 0 - 2 - read-only - - - - - DOEPCTL1 - - device endpoint-1 control - register - 0x320 - 32 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL2 - - device endpoint-2 control - register - 0x340 - 32 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DOEPCTL3 - - device endpoint-3 control - register - 0x360 - 32 - 0x00000000 - - - EPENA - EPENA - 31 - 1 - read-write - - - EPDIS - EPDIS - 30 - 1 - read-write - - - SODDFRM - SODDFRM - 29 - 1 - write-only - - - SD0PID_SEVNFRM - SD0PID/SEVNFRM - 28 - 1 - write-only - - - SNAK - SNAK - 27 - 1 - write-only - - - CNAK - CNAK - 26 - 1 - write-only - - - Stall - Stall - 21 - 1 - read-write - - - SNPM - SNPM - 20 - 1 - read-write - - - EPTYP - EPTYP - 18 - 2 - read-write - - - NAKSTS - NAKSTS - 17 - 1 - read-only - - - EONUM_DPID - EONUM/DPID - 16 - 1 - read-only - - - USBAEP - USBAEP - 15 - 1 - read-write - - - MPSIZ - MPSIZ - 0 - 11 - read-write - - - - - DIEPINT0 - - device endpoint-x interrupt - register - 0x108 - 32 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT1 - - device endpoint-1 interrupt - register - 0x128 - 32 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT2 - - device endpoint-2 interrupt - register - 0x148 - 32 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DIEPINT3 - - device endpoint-3 interrupt - register - 0x168 - 32 - 0x00000080 - - - TXFE - TXFE - 7 - 1 - read-only - - - INEPNE - INEPNE - 6 - 1 - read-write - - - ITTXFE - ITTXFE - 4 - 1 - read-write - - - TOC - TOC - 3 - 1 - read-write - - - EPDISD - EPDISD - 1 - 1 - read-write - - - XFRC - XFRC - 0 - 1 - read-write - - - - - DOEPINT0 - - device endpoint-0 interrupt - register - 0x308 - 32 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT1 - - device endpoint-1 interrupt - register - 0x328 - 32 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT2 - - device endpoint-2 interrupt - register - 0x348 - 32 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DOEPINT3 - - device endpoint-3 interrupt - register - 0x368 - 32 - read-write - 0x00000080 - - - B2BSTUP - B2BSTUP - 6 - 1 - - - OTEPDIS - OTEPDIS - 4 - 1 - - - STUP - STUP - 3 - 1 - - - EPDISD - EPDISD - 1 - 1 - - - XFRC - XFRC - 0 - 1 - - - - - DIEPTSIZ0 - - device endpoint-0 transfer size - register - 0x110 - 32 - read-write - 0x00000000 - - - PKTCNT - Packet count - 19 - 2 - - - XFRSIZ - Transfer size - 0 - 7 - - - - - DOEPTSIZ0 - - device OUT endpoint-0 transfer size - register - 0x310 - 32 - read-write - 0x00000000 - - - STUPCNT - SETUP packet count - 29 - 2 - - - PKTCNT - Packet count - 19 - 1 - - - XFRSIZ - Transfer size - 0 - 7 - - - - - DIEPTSIZ1 - - device endpoint-1 transfer size - register - 0x130 - 32 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DIEPTSIZ2 - - device endpoint-2 transfer size - register - 0x150 - 32 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DIEPTSIZ3 - - device endpoint-3 transfer size - register - 0x170 - 32 - read-write - 0x00000000 - - - MCNT - Multi count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DTXFSTS0 - - OTG_FS device IN endpoint transmit FIFO - status register - 0x118 - 32 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS1 - - OTG_FS device IN endpoint transmit FIFO - status register - 0x138 - 32 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS2 - - OTG_FS device IN endpoint transmit FIFO - status register - 0x158 - 32 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DTXFSTS3 - - OTG_FS device IN endpoint transmit FIFO - status register - 0x178 - 32 - read-only - 0x00000000 - - - INEPTFSAV - IN endpoint TxFIFO space - available - 0 - 16 - - - - - DOEPTSIZ1 - - device OUT endpoint-1 transfer size - register - 0x330 - 32 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DOEPTSIZ2 - - device OUT endpoint-2 transfer size - register - 0x350 - 32 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - DOEPTSIZ3 - - device OUT endpoint-3 transfer size - register - 0x370 - 32 - read-write - 0x00000000 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - PKTCNT - Packet count - 19 - 10 - - - XFRSIZ - Transfer size - 0 - 19 - - - - - - - OTG_FS_PWRCLK - USB on the go full speed - USB_OTG_FS - 0x50000e00 - - 0x0 - 0x400 - registers - - - - FS_PCGCCTL - FS_PCGCCTL - OTG_FS power and clock gating control - register (OTG_FS_PCGCCTL) - 0x0 - 32 - read-write - 0x00000000 - - - STPPCLK - Stop PHY clock - 0 - 1 - - - GATEHCLK - Gate HCLK - 1 - 1 - - - PHYSUSP - PHY Suspended - 4 - 1 - - - - - - - CAN1 - Controller area network - CAN - 0x40006400 - - 0x0 - 0x400 - registers - - - CAN1_TX - CAN1 TX interrupts - 19 - - - CAN1_RX0 - CAN1 RX0 interrupts - 20 - - - CAN1_RX1 - CAN1 RX1 interrupts - 21 - - - CAN1_SCE - CAN1 SCE interrupt - 22 - - - - MCR - - master control register - 0x0 - 32 - read-write - 0x00010002 - - - DBF - DBF - 16 - 1 - - - RESET - RESET - 15 - 1 - - - TTCM - TTCM - 7 - 1 - - - ABOM - ABOM - 6 - 1 - - - AWUM - AWUM - 5 - 1 - - - NART - NART - 4 - 1 - - - RFLM - RFLM - 3 - 1 - - - TXFP - TXFP - 2 - 1 - - - SLEEP - SLEEP - 1 - 1 - - - INRQ - INRQ - 0 - 1 - - - - - MSR - - master status register - 0x4 - 32 - 0x00000c02 - - - RX - RX - 11 - 1 - read-only - - - SAMP - SAMP - 10 - 1 - read-only - - - RXM - RXM - 9 - 1 - read-only - - - TXM - TXM - 8 - 1 - read-only - - - SLAKI - SLAKI - 4 - 1 - read-write - - - WKUI - WKUI - 3 - 1 - read-write - - - ERRI - ERRI - 2 - 1 - read-write - - - SLAK - SLAK - 1 - 1 - read-only - - - INAK - INAK - 0 - 1 - read-only - - - - - TSR - - transmit status register - 0x8 - 32 - 0x1c000000 - - - LOW2 - Lowest priority flag for mailbox - 2 - 31 - 1 - read-only - - - LOW1 - Lowest priority flag for mailbox - 1 - 30 - 1 - read-only - - - LOW0 - Lowest priority flag for mailbox - 0 - 29 - 1 - read-only - - - TME2 - Lowest priority flag for mailbox - 2 - 28 - 1 - read-only - - - TME1 - Lowest priority flag for mailbox - 1 - 27 - 1 - read-only - - - TME0 - Lowest priority flag for mailbox - 0 - 26 - 1 - read-only - - - CODE - CODE - 24 - 2 - read-only - - - ABRQ2 - ABRQ2 - 23 - 1 - read-write - - - TERR2 - TERR2 - 19 - 1 - read-write - - - ALST2 - ALST2 - 18 - 1 - read-write - - - TXOK2 - TXOK2 - 17 - 1 - read-write - - - RQCP2 - RQCP2 - 16 - 1 - read-write - - - ABRQ1 - ABRQ1 - 15 - 1 - read-write - - - TERR1 - TERR1 - 11 - 1 - read-write - - - ALST1 - ALST1 - 10 - 1 - read-write - - - TXOK1 - TXOK1 - 9 - 1 - read-write - - - RQCP1 - RQCP1 - 8 - 1 - read-write - - - ABRQ0 - ABRQ0 - 7 - 1 - read-write - - - TERR0 - TERR0 - 3 - 1 - read-write - - - ALST0 - ALST0 - 2 - 1 - read-write - - - TXOK0 - TXOK0 - 1 - 1 - read-write - - - RQCP0 - RQCP0 - 0 - 1 - read-write - - - - - RF0R - - receive FIFO 0 register - 0xc - 32 - 0x00000000 - - - RFOM0 - RFOM0 - 5 - 1 - read-write - - - FOVR0 - FOVR0 - 4 - 1 - read-write - - - FULL0 - FULL0 - 3 - 1 - read-write - - - FMP0 - FMP0 - 0 - 2 - read-only - - - - - RF1R - - receive FIFO 1 register - 0x10 - 32 - 0x00000000 - - - RFOM1 - RFOM1 - 5 - 1 - read-write - - - FOVR1 - FOVR1 - 4 - 1 - read-write - - - FULL1 - FULL1 - 3 - 1 - read-write - - - FMP1 - FMP1 - 0 - 2 - read-only - - - - - IER - - interrupt enable register - 0x14 - 32 - read-write - 0x00000000 - - - SLKIE - SLKIE - 17 - 1 - - - WKUIE - WKUIE - 16 - 1 - - - ERRIE - ERRIE - 15 - 1 - - - LECIE - LECIE - 11 - 1 - - - BOFIE - BOFIE - 10 - 1 - - - EPVIE - EPVIE - 9 - 1 - - - EWGIE - EWGIE - 8 - 1 - - - FOVIE1 - FOVIE1 - 6 - 1 - - - FFIE1 - FFIE1 - 5 - 1 - - - FMPIE1 - FMPIE1 - 4 - 1 - - - FOVIE0 - FOVIE0 - 3 - 1 - - - FFIE0 - FFIE0 - 2 - 1 - - - FMPIE0 - FMPIE0 - 1 - 1 - - - TMEIE - TMEIE - 0 - 1 - - - - - ESR - - interrupt enable register - 0x18 - 32 - 0x00000000 - - - REC - REC - 24 - 8 - read-only - - - TEC - TEC - 16 - 8 - read-only - - - LEC - LEC - 4 - 3 - read-write - - - BOFF - BOFF - 2 - 1 - read-only - - - EPVF - EPVF - 1 - 1 - read-only - - - EWGF - EWGF - 0 - 1 - read-only - - - - - BTR - - bit timing register - 0x1c - 32 - read-write - 0x00000000 - - - SILM - SILM - 31 - 1 - - - LBKM - LBKM - 30 - 1 - - - SJW - SJW - 24 - 2 - - - TS2 - TS2 - 20 - 3 - - - TS1 - TS1 - 16 - 4 - - - BRP - BRP - 0 - 10 - - - - - TI0R - - TX mailbox identifier register - 0x180 - 32 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT0R - - mailbox data length control and time stamp - register - 0x184 - 32 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL0R - - mailbox data low register - 0x188 - 32 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH0R - - mailbox data high register - 0x18c - 32 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - TI1R - - mailbox identifier register - 0x190 - 32 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT1R - - mailbox data length control and time stamp - register - 0x194 - 32 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL1R - - mailbox data low register - 0x198 - 32 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH1R - - mailbox data high register - 0x19c - 32 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - TI2R - - mailbox identifier register - 0x1a0 - 32 - read-write - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - TXRQ - TXRQ - 0 - 1 - - - - - TDT2R - - mailbox data length control and time stamp - register - 0x1a4 - 32 - read-write - 0x00000000 - - - TIME - TIME - 16 - 16 - - - TGT - TGT - 8 - 1 - - - DLC - DLC - 0 - 4 - - - - - TDL2R - - mailbox data low register - 0x1a8 - 32 - read-write - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - TDH2R - - mailbox data high register - 0x1ac - 32 - read-write - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - RI0R - - receive FIFO mailbox identifier - register - 0x1b0 - 32 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - RDT0R - - mailbox data high register - 0x1b4 - 32 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - RDL0R - - mailbox data high register - 0x1b8 - 32 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - RDH0R - - receive FIFO mailbox data high - register - 0x1bc - 32 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - RI1R - - mailbox data high register - 0x1c0 - 32 - read-only - 0x00000000 - - - STID - STID - 21 - 11 - - - EXID - EXID - 3 - 18 - - - IDE - IDE - 2 - 1 - - - RTR - RTR - 1 - 1 - - - - - RDT1R - - mailbox data high register - 0x1c4 - 32 - read-only - 0x00000000 - - - TIME - TIME - 16 - 16 - - - FMI - FMI - 8 - 8 - - - DLC - DLC - 0 - 4 - - - - - RDL1R - - mailbox data high register - 0x1c8 - 32 - read-only - 0x00000000 - - - DATA3 - DATA3 - 24 - 8 - - - DATA2 - DATA2 - 16 - 8 - - - DATA1 - DATA1 - 8 - 8 - - - DATA0 - DATA0 - 0 - 8 - - - - - RDH1R - - mailbox data high register - 0x1cc - 32 - read-only - 0x00000000 - - - DATA7 - DATA7 - 24 - 8 - - - DATA6 - DATA6 - 16 - 8 - - - DATA5 - DATA5 - 8 - 8 - - - DATA4 - DATA4 - 0 - 8 - - - - - FMR - - filter master register - 0x200 - 32 - read-write - 0x2a1c0e01 - - - CAN2SB - CAN2SB - 8 - 6 - - - FINIT - FINIT - 0 - 1 - - - - - FM1R - - filter mode register - 0x204 - 32 - read-write - 0x00000000 - - - FBM0 - Filter mode - 0 - 1 - - - FBM1 - Filter mode - 1 - 1 - - - FBM2 - Filter mode - 2 - 1 - - - FBM3 - Filter mode - 3 - 1 - - - FBM4 - Filter mode - 4 - 1 - - - FBM5 - Filter mode - 5 - 1 - - - FBM6 - Filter mode - 6 - 1 - - - FBM7 - Filter mode - 7 - 1 - - - FBM8 - Filter mode - 8 - 1 - - - FBM9 - Filter mode - 9 - 1 - - - FBM10 - Filter mode - 10 - 1 - - - FBM11 - Filter mode - 11 - 1 - - - FBM12 - Filter mode - 12 - 1 - - - FBM13 - Filter mode - 13 - 1 - - - FBM14 - Filter mode - 14 - 1 - - - FBM15 - Filter mode - 15 - 1 - - - FBM16 - Filter mode - 16 - 1 - - - FBM17 - Filter mode - 17 - 1 - - - FBM18 - Filter mode - 18 - 1 - - - FBM19 - Filter mode - 19 - 1 - - - FBM20 - Filter mode - 20 - 1 - - - FBM21 - Filter mode - 21 - 1 - - - FBM22 - Filter mode - 22 - 1 - - - FBM23 - Filter mode - 23 - 1 - - - FBM24 - Filter mode - 24 - 1 - - - FBM25 - Filter mode - 25 - 1 - - - FBM26 - Filter mode - 26 - 1 - - - FBM27 - Filter mode - 27 - 1 - - - - - FS1R - - filter scale register - 0x20c - 32 - read-write - 0x00000000 - - - FSC0 - Filter scale configuration - 0 - 1 - - - FSC1 - Filter scale configuration - 1 - 1 - - - FSC2 - Filter scale configuration - 2 - 1 - - - FSC3 - Filter scale configuration - 3 - 1 - - - FSC4 - Filter scale configuration - 4 - 1 - - - FSC5 - Filter scale configuration - 5 - 1 - - - FSC6 - Filter scale configuration - 6 - 1 - - - FSC7 - Filter scale configuration - 7 - 1 - - - FSC8 - Filter scale configuration - 8 - 1 - - - FSC9 - Filter scale configuration - 9 - 1 - - - FSC10 - Filter scale configuration - 10 - 1 - - - FSC11 - Filter scale configuration - 11 - 1 - - - FSC12 - Filter scale configuration - 12 - 1 - - - FSC13 - Filter scale configuration - 13 - 1 - - - FSC14 - Filter scale configuration - 14 - 1 - - - FSC15 - Filter scale configuration - 15 - 1 - - - FSC16 - Filter scale configuration - 16 - 1 - - - FSC17 - Filter scale configuration - 17 - 1 - - - FSC18 - Filter scale configuration - 18 - 1 - - - FSC19 - Filter scale configuration - 19 - 1 - - - FSC20 - Filter scale configuration - 20 - 1 - - - FSC21 - Filter scale configuration - 21 - 1 - - - FSC22 - Filter scale configuration - 22 - 1 - - - FSC23 - Filter scale configuration - 23 - 1 - - - FSC24 - Filter scale configuration - 24 - 1 - - - FSC25 - Filter scale configuration - 25 - 1 - - - FSC26 - Filter scale configuration - 26 - 1 - - - FSC27 - Filter scale configuration - 27 - 1 - - - - - FFA1R - - filter FIFO assignment - register - 0x214 - 32 - read-write - 0x00000000 - - - FFA0 - Filter FIFO assignment for filter - 0 - 0 - 1 - - - FFA1 - Filter FIFO assignment for filter - 1 - 1 - 1 - - - FFA2 - Filter FIFO assignment for filter - 2 - 2 - 1 - - - FFA3 - Filter FIFO assignment for filter - 3 - 3 - 1 - - - FFA4 - Filter FIFO assignment for filter - 4 - 4 - 1 - - - FFA5 - Filter FIFO assignment for filter - 5 - 5 - 1 - - - FFA6 - Filter FIFO assignment for filter - 6 - 6 - 1 - - - FFA7 - Filter FIFO assignment for filter - 7 - 7 - 1 - - - FFA8 - Filter FIFO assignment for filter - 8 - 8 - 1 - - - FFA9 - Filter FIFO assignment for filter - 9 - 9 - 1 - - - FFA10 - Filter FIFO assignment for filter - 10 - 10 - 1 - - - FFA11 - Filter FIFO assignment for filter - 11 - 11 - 1 - - - FFA12 - Filter FIFO assignment for filter - 12 - 12 - 1 - - - FFA13 - Filter FIFO assignment for filter - 13 - 13 - 1 - - - FFA14 - Filter FIFO assignment for filter - 14 - 14 - 1 - - - FFA15 - Filter FIFO assignment for filter - 15 - 15 - 1 - - - FFA16 - Filter FIFO assignment for filter - 16 - 16 - 1 - - - FFA17 - Filter FIFO assignment for filter - 17 - 17 - 1 - - - FFA18 - Filter FIFO assignment for filter - 18 - 18 - 1 - - - FFA19 - Filter FIFO assignment for filter - 19 - 19 - 1 - - - FFA20 - Filter FIFO assignment for filter - 20 - 20 - 1 - - - FFA21 - Filter FIFO assignment for filter - 21 - 21 - 1 - - - FFA22 - Filter FIFO assignment for filter - 22 - 22 - 1 - - - FFA23 - Filter FIFO assignment for filter - 23 - 23 - 1 - - - FFA24 - Filter FIFO assignment for filter - 24 - 24 - 1 - - - FFA25 - Filter FIFO assignment for filter - 25 - 25 - 1 - - - FFA26 - Filter FIFO assignment for filter - 26 - 26 - 1 - - - FFA27 - Filter FIFO assignment for filter - 27 - 27 - 1 - - - - - FA1R - - filter activation register - 0x21c - 32 - read-write - 0x00000000 - - - FACT0 - Filter active - 0 - 1 - - - FACT1 - Filter active - 1 - 1 - - - FACT2 - Filter active - 2 - 1 - - - FACT3 - Filter active - 3 - 1 - - - FACT4 - Filter active - 4 - 1 - - - FACT5 - Filter active - 5 - 1 - - - FACT6 - Filter active - 6 - 1 - - - FACT7 - Filter active - 7 - 1 - - - FACT8 - Filter active - 8 - 1 - - - FACT9 - Filter active - 9 - 1 - - - FACT10 - Filter active - 10 - 1 - - - FACT11 - Filter active - 11 - 1 - - - FACT12 - Filter active - 12 - 1 - - - FACT13 - Filter active - 13 - 1 - - - FACT14 - Filter active - 14 - 1 - - - FACT15 - Filter active - 15 - 1 - - - FACT16 - Filter active - 16 - 1 - - - FACT17 - Filter active - 17 - 1 - - - FACT18 - Filter active - 18 - 1 - - - FACT19 - Filter active - 19 - 1 - - - FACT20 - Filter active - 20 - 1 - - - FACT21 - Filter active - 21 - 1 - - - FACT22 - Filter active - 22 - 1 - - - FACT23 - Filter active - 23 - 1 - - - FACT24 - Filter active - 24 - 1 - - - FACT25 - Filter active - 25 - 1 - - - FACT26 - Filter active - 26 - 1 - - - FACT27 - Filter active - 27 - 1 - - - - - F0R1 - - Filter bank 0 register 1 - 0x240 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F0R2 - - Filter bank 0 register 2 - 0x244 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R1 - - Filter bank 1 register 1 - 0x248 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F1R2 - - Filter bank 1 register 2 - 0x24c - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R1 - - Filter bank 2 register 1 - 0x250 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F2R2 - - Filter bank 2 register 2 - 0x254 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R1 - - Filter bank 3 register 1 - 0x258 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F3R2 - - Filter bank 3 register 2 - 0x25c - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R1 - - Filter bank 4 register 1 - 0x260 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F4R2 - - Filter bank 4 register 2 - 0x264 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R1 - - Filter bank 5 register 1 - 0x268 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F5R2 - - Filter bank 5 register 2 - 0x26c - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R1 - - Filter bank 6 register 1 - 0x270 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F6R2 - - Filter bank 6 register 2 - 0x274 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R1 - - Filter bank 7 register 1 - 0x278 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F7R2 - - Filter bank 7 register 2 - 0x27c - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R1 - - Filter bank 8 register 1 - 0x280 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F8R2 - - Filter bank 8 register 2 - 0x284 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R1 - - Filter bank 9 register 1 - 0x288 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F9R2 - - Filter bank 9 register 2 - 0x28c - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R1 - - Filter bank 10 register 1 - 0x290 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F10R2 - - Filter bank 10 register 2 - 0x294 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R1 - - Filter bank 11 register 1 - 0x298 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F11R2 - - Filter bank 11 register 2 - 0x29c - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R1 - - Filter bank 4 register 1 - 0x2a0 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F12R2 - - Filter bank 12 register 2 - 0x2a4 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R1 - - Filter bank 13 register 1 - 0x2a8 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F13R2 - - Filter bank 13 register 2 - 0x2ac - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R1 - - Filter bank 14 register 1 - 0x2b0 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F14R2 - - Filter bank 14 register 2 - 0x2b4 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R1 - - Filter bank 15 register 1 - 0x2b8 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F15R2 - - Filter bank 15 register 2 - 0x2bc - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R1 - - Filter bank 16 register 1 - 0x2c0 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F16R2 - - Filter bank 16 register 2 - 0x2c4 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R1 - - Filter bank 17 register 1 - 0x2c8 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F17R2 - - Filter bank 17 register 2 - 0x2cc - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R1 - - Filter bank 18 register 1 - 0x2d0 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F18R2 - - Filter bank 18 register 2 - 0x2d4 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R1 - - Filter bank 19 register 1 - 0x2d8 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F19R2 - - Filter bank 19 register 2 - 0x2dc - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R1 - - Filter bank 20 register 1 - 0x2e0 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F20R2 - - Filter bank 20 register 2 - 0x2e4 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R1 - - Filter bank 21 register 1 - 0x2e8 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F21R2 - - Filter bank 21 register 2 - 0x2ec - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R1 - - Filter bank 22 register 1 - 0x2f0 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F22R2 - - Filter bank 22 register 2 - 0x2f4 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R1 - - Filter bank 23 register 1 - 0x2f8 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F23R2 - - Filter bank 23 register 2 - 0x2fc - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R1 - - Filter bank 24 register 1 - 0x300 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F24R2 - - Filter bank 24 register 2 - 0x304 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R1 - - Filter bank 25 register 1 - 0x308 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F25R2 - - Filter bank 25 register 2 - 0x30c - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R1 - - Filter bank 26 register 1 - 0x310 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F26R2 - - Filter bank 26 register 2 - 0x314 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F27R1 - - Filter bank 27 register 1 - 0x318 - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - F27R2 - - Filter bank 27 register 2 - 0x31c - 32 - read-write - 0x00000000 - - - FB0 - Filter bits - 0 - 1 - - - FB1 - Filter bits - 1 - 1 - - - FB2 - Filter bits - 2 - 1 - - - FB3 - Filter bits - 3 - 1 - - - FB4 - Filter bits - 4 - 1 - - - FB5 - Filter bits - 5 - 1 - - - FB6 - Filter bits - 6 - 1 - - - FB7 - Filter bits - 7 - 1 - - - FB8 - Filter bits - 8 - 1 - - - FB9 - Filter bits - 9 - 1 - - - FB10 - Filter bits - 10 - 1 - - - FB11 - Filter bits - 11 - 1 - - - FB12 - Filter bits - 12 - 1 - - - FB13 - Filter bits - 13 - 1 - - - FB14 - Filter bits - 14 - 1 - - - FB15 - Filter bits - 15 - 1 - - - FB16 - Filter bits - 16 - 1 - - - FB17 - Filter bits - 17 - 1 - - - FB18 - Filter bits - 18 - 1 - - - FB19 - Filter bits - 19 - 1 - - - FB20 - Filter bits - 20 - 1 - - - FB21 - Filter bits - 21 - 1 - - - FB22 - Filter bits - 22 - 1 - - - FB23 - Filter bits - 23 - 1 - - - FB24 - Filter bits - 24 - 1 - - - FB25 - Filter bits - 25 - 1 - - - FB26 - Filter bits - 26 - 1 - - - FB27 - Filter bits - 27 - 1 - - - FB28 - Filter bits - 28 - 1 - - - FB29 - Filter bits - 29 - 1 - - - FB30 - Filter bits - 30 - 1 - - - FB31 - Filter bits - 31 - 1 - - - - - - - CAN2 - 0x40006800 - - CAN2_TX - CAN2 TX interrupts - 63 - - - CAN2_RX0 - CAN2 RX0 interrupts - 64 - - - CAN2_RX1 - CAN2 RX1 interrupts - 65 - - - CAN2_SCE - CAN2 SCE interrupt - 66 - - - - NVIC - Nested Vectored Interrupt - Controller - NVIC - 0xe000e000 - - 0x0 - 0x1001 - registers - - - - ICTR - - Interrupt Controller Type - Register - 0x4 - 32 - read-only - 0x00000000 - - - INTLINESNUM - Total number of interrupt lines in - groups - 0 - 4 - - - - - STIR - - Software Triggered Interrupt - Register - 0xf00 - 32 - write-only - 0x00000000 - - - INTID - interrupt to be triggered - 0 - 9 - - - - - ISER0 - - Interrupt Set-Enable Register - 0x100 - 32 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ISER1 - - Interrupt Set-Enable Register - 0x104 - 32 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ISER2 - - Interrupt Set-Enable Register - 0x108 - 32 - read-write - 0x00000000 - - - SETENA - SETENA - 0 - 32 - - - - - ICER0 - - Interrupt Clear-Enable - Register - 0x180 - 32 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ICER1 - - Interrupt Clear-Enable - Register - 0x184 - 32 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ICER2 - - Interrupt Clear-Enable - Register - 0x188 - 32 - read-write - 0x00000000 - - - CLRENA - CLRENA - 0 - 32 - - - - - ISPR0 - - Interrupt Set-Pending Register - 0x200 - 32 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ISPR1 - - Interrupt Set-Pending Register - 0x204 - 32 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ISPR2 - - Interrupt Set-Pending Register - 0x208 - 32 - read-write - 0x00000000 - - - SETPEND - SETPEND - 0 - 32 - - - - - ICPR0 - - Interrupt Clear-Pending - Register - 0x280 - 32 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - ICPR1 - - Interrupt Clear-Pending - Register - 0x284 - 32 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - ICPR2 - - Interrupt Clear-Pending - Register - 0x288 - 32 - read-write - 0x00000000 - - - CLRPEND - CLRPEND - 0 - 32 - - - - - IABR0 - - Interrupt Active Bit Register - 0x300 - 32 - read-only - 0x00000000 - - - ACTIVE - ACTIVE - 0 - 32 - - - - - IABR1 - - Interrupt Active Bit Register - 0x304 - 32 - read-only - 0x00000000 - - - ACTIVE - ACTIVE - 0 - 32 - - - - - IABR2 - - Interrupt Active Bit Register - 0x308 - 32 - read-only - 0x00000000 - - - ACTIVE - ACTIVE - 0 - 32 - - - - - IPR0 - - Interrupt Priority Register - 0x400 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR1 - - Interrupt Priority Register - 0x404 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR2 - - Interrupt Priority Register - 0x408 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR3 - - Interrupt Priority Register - 0x40c - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR4 - - Interrupt Priority Register - 0x410 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR5 - - Interrupt Priority Register - 0x414 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR6 - - Interrupt Priority Register - 0x418 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR7 - - Interrupt Priority Register - 0x41c - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR8 - - Interrupt Priority Register - 0x420 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR9 - - Interrupt Priority Register - 0x424 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR10 - - Interrupt Priority Register - 0x428 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR11 - - Interrupt Priority Register - 0x42c - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR12 - - Interrupt Priority Register - 0x430 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR13 - - Interrupt Priority Register - 0x434 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR14 - - Interrupt Priority Register - 0x438 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR15 - - Interrupt Priority Register - 0x43c - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR16 - - Interrupt Priority Register - 0x440 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR17 - - Interrupt Priority Register - 0x444 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR18 - - Interrupt Priority Register - 0x448 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR19 - - Interrupt Priority Register - 0x44c - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - IPR20 - - Interrupt Priority Register - 0x450 - 32 - read-write - 0x00000000 - - - IPR_N0 - IPR_N0 - 0 - 8 - - - IPR_N1 - IPR_N1 - 8 - 8 - - - IPR_N2 - IPR_N2 - 16 - 8 - - - IPR_N3 - IPR_N3 - 24 - 8 - - - - - - - FLASH - FLASH - FLASH - 0x40023c00 - - 0x0 - 0x400 - registers - - - FLASH - Flash global interrupt - 4 - - - - ACR - - Flash access control register - 0x0 - 32 - 0x00000000 - - - LATENCY - Latency - 0 - 3 - read-write - - - PRFTEN - Prefetch enable - 8 - 1 - read-write - - - ICEN - Instruction cache enable - 9 - 1 - read-write - - - DCEN - Data cache enable - 10 - 1 - read-write - - - ICRST - Instruction cache reset - 11 - 1 - write-only - - - DCRST - Data cache reset - 12 - 1 - read-write - - - - - KEYR - - Flash key register - 0x4 - 32 - write-only - 0x00000000 - - - KEY - FPEC key - 0 - 32 - - - - - OPTKEYR - - Flash option key register - 0x8 - 32 - write-only - 0x00000000 - - - OPTKEY - Option byte key - 0 - 32 - - - - - SR - - Status register - 0xc - 32 - 0x00000000 - - - EOP - End of operation - 0 - 1 - read-write - - - OPERR - Operation error - 1 - 1 - read-write - - - WRPERR - Write protection error - 4 - 1 - read-write - - - PGAERR - Programming alignment - error - 5 - 1 - read-write - - - PGPERR - Programming parallelism - error - 6 - 1 - read-write - - - PGSERR - Programming sequence error - 7 - 1 - read-write - - - BSY - Busy - 16 - 1 - read-only - - - - - CR - - Control register - 0x10 - 32 - read-write - 0x80000000 - - - PG - Programming - 0 - 1 - - - SER - Sector Erase - 1 - 1 - - - MER - Mass Erase of sectors 0 to - 11 - 2 - 1 - - - SNB - Sector number - 3 - 5 - - - PSIZE - Program size - 8 - 2 - - - MER1 - Mass Erase of sectors 12 to - 23 - 15 - 1 - - - STRT - Start - 16 - 1 - - - EOPIE - End of operation interrupt - enable - 24 - 1 - - - ERRIE - Error interrupt enable - 25 - 1 - - - LOCK - Lock - 31 - 1 - - - - - OPTCR - - Flash option control register - 0x14 - 32 - read-write - 0x0fffaaed - - - OPTLOCK - Option lock - 0 - 1 - - - OPTSTRT - Option start - 1 - 1 - - - BOR_LEV - BOR reset Level - 2 - 2 - - - WDG_SW - WDG_SW User option bytes - 5 - 1 - - - nRST_STOP - nRST_STOP User option - bytes - 6 - 1 - - - nRST_STDBY - nRST_STDBY User option - bytes - 7 - 1 - - - RDP - Read protect - 8 - 8 - - - nWRP - Not write protect - 16 - 12 - - - - - OPTCR1 - - Flash option control register - 1 - 0x18 - 32 - read-write - 0x0fff0000 - - - nWRP - Not write protect - 16 - 12 - - - - - - - EXTI - External interrupt/event - controller - EXTI - 0x40013c00 - - 0x0 - 0x400 - registers - - - TAMP_STAMP - Tamper and TimeStamp interrupts through the - EXTI line - 2 - - - EXTI0 - EXTI Line0 interrupt - 6 - - - EXTI1 - EXTI Line1 interrupt - 7 - - - EXTI2 - EXTI Line2 interrupt - 8 - - - EXTI3 - EXTI Line3 interrupt - 9 - - - EXTI4 - EXTI Line4 interrupt - 10 - - - EXTI9_5 - EXTI Line[9:5] interrupts - 23 - - - EXTI15_10 - EXTI Line[15:10] interrupts - 40 - - - - IMR - - Interrupt mask register - (EXTI_IMR) - 0x0 - 32 - read-write - 0x00000000 - - - MR0 - Interrupt Mask on line 0 - 0 - 1 - - - MR1 - Interrupt Mask on line 1 - 1 - 1 - - - MR2 - Interrupt Mask on line 2 - 2 - 1 - - - MR3 - Interrupt Mask on line 3 - 3 - 1 - - - MR4 - Interrupt Mask on line 4 - 4 - 1 - - - MR5 - Interrupt Mask on line 5 - 5 - 1 - - - MR6 - Interrupt Mask on line 6 - 6 - 1 - - - MR7 - Interrupt Mask on line 7 - 7 - 1 - - - MR8 - Interrupt Mask on line 8 - 8 - 1 - - - MR9 - Interrupt Mask on line 9 - 9 - 1 - - - MR10 - Interrupt Mask on line 10 - 10 - 1 - - - MR11 - Interrupt Mask on line 11 - 11 - 1 - - - MR12 - Interrupt Mask on line 12 - 12 - 1 - - - MR13 - Interrupt Mask on line 13 - 13 - 1 - - - MR14 - Interrupt Mask on line 14 - 14 - 1 - - - MR15 - Interrupt Mask on line 15 - 15 - 1 - - - MR16 - Interrupt Mask on line 16 - 16 - 1 - - - MR17 - Interrupt Mask on line 17 - 17 - 1 - - - MR18 - Interrupt Mask on line 18 - 18 - 1 - - - MR19 - Interrupt Mask on line 19 - 19 - 1 - - - MR20 - Interrupt Mask on line 20 - 20 - 1 - - - MR21 - Interrupt Mask on line 21 - 21 - 1 - - - MR22 - Interrupt Mask on line 22 - 22 - 1 - - - - - EMR - - Event mask register (EXTI_EMR) - 0x4 - 32 - read-write - 0x00000000 - - - MR0 - Event Mask on line 0 - 0 - 1 - - - MR1 - Event Mask on line 1 - 1 - 1 - - - MR2 - Event Mask on line 2 - 2 - 1 - - - MR3 - Event Mask on line 3 - 3 - 1 - - - MR4 - Event Mask on line 4 - 4 - 1 - - - MR5 - Event Mask on line 5 - 5 - 1 - - - MR6 - Event Mask on line 6 - 6 - 1 - - - MR7 - Event Mask on line 7 - 7 - 1 - - - MR8 - Event Mask on line 8 - 8 - 1 - - - MR9 - Event Mask on line 9 - 9 - 1 - - - MR10 - Event Mask on line 10 - 10 - 1 - - - MR11 - Event Mask on line 11 - 11 - 1 - - - MR12 - Event Mask on line 12 - 12 - 1 - - - MR13 - Event Mask on line 13 - 13 - 1 - - - MR14 - Event Mask on line 14 - 14 - 1 - - - MR15 - Event Mask on line 15 - 15 - 1 - - - MR16 - Event Mask on line 16 - 16 - 1 - - - MR17 - Event Mask on line 17 - 17 - 1 - - - MR18 - Event Mask on line 18 - 18 - 1 - - - MR19 - Event Mask on line 19 - 19 - 1 - - - MR20 - Event Mask on line 20 - 20 - 1 - - - MR21 - Event Mask on line 21 - 21 - 1 - - - MR22 - Event Mask on line 22 - 22 - 1 - - - - - RTSR - - Rising Trigger selection register - (EXTI_RTSR) - 0x8 - 32 - read-write - 0x00000000 - - - TR0 - Rising trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Rising trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Rising trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Rising trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Rising trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Rising trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Rising trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Rising trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Rising trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Rising trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Rising trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Rising trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Rising trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Rising trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Rising trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Rising trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Rising trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Rising trigger event configuration of - line 17 - 17 - 1 - - - TR18 - Rising trigger event configuration of - line 18 - 18 - 1 - - - TR19 - Rising trigger event configuration of - line 19 - 19 - 1 - - - TR20 - Rising trigger event configuration of - line 20 - 20 - 1 - - - TR21 - Rising trigger event configuration of - line 21 - 21 - 1 - - - TR22 - Rising trigger event configuration of - line 22 - 22 - 1 - - - - - FTSR - - Falling Trigger selection register - (EXTI_FTSR) - 0xc - 32 - read-write - 0x00000000 - - - TR0 - Falling trigger event configuration of - line 0 - 0 - 1 - - - TR1 - Falling trigger event configuration of - line 1 - 1 - 1 - - - TR2 - Falling trigger event configuration of - line 2 - 2 - 1 - - - TR3 - Falling trigger event configuration of - line 3 - 3 - 1 - - - TR4 - Falling trigger event configuration of - line 4 - 4 - 1 - - - TR5 - Falling trigger event configuration of - line 5 - 5 - 1 - - - TR6 - Falling trigger event configuration of - line 6 - 6 - 1 - - - TR7 - Falling trigger event configuration of - line 7 - 7 - 1 - - - TR8 - Falling trigger event configuration of - line 8 - 8 - 1 - - - TR9 - Falling trigger event configuration of - line 9 - 9 - 1 - - - TR10 - Falling trigger event configuration of - line 10 - 10 - 1 - - - TR11 - Falling trigger event configuration of - line 11 - 11 - 1 - - - TR12 - Falling trigger event configuration of - line 12 - 12 - 1 - - - TR13 - Falling trigger event configuration of - line 13 - 13 - 1 - - - TR14 - Falling trigger event configuration of - line 14 - 14 - 1 - - - TR15 - Falling trigger event configuration of - line 15 - 15 - 1 - - - TR16 - Falling trigger event configuration of - line 16 - 16 - 1 - - - TR17 - Falling trigger event configuration of - line 17 - 17 - 1 - - - TR18 - Falling trigger event configuration of - line 18 - 18 - 1 - - - TR19 - Falling trigger event configuration of - line 19 - 19 - 1 - - - TR20 - Falling trigger event configuration of - line 20 - 20 - 1 - - - TR21 - Falling trigger event configuration of - line 21 - 21 - 1 - - - TR22 - Falling trigger event configuration of - line 22 - 22 - 1 - - - - - SWIER - - Software interrupt event register - (EXTI_SWIER) - 0x10 - 32 - read-write - 0x00000000 - - - SWIER0 - Software Interrupt on line - 0 - 0 - 1 - - - SWIER1 - Software Interrupt on line - 1 - 1 - 1 - - - SWIER2 - Software Interrupt on line - 2 - 2 - 1 - - - SWIER3 - Software Interrupt on line - 3 - 3 - 1 - - - SWIER4 - Software Interrupt on line - 4 - 4 - 1 - - - SWIER5 - Software Interrupt on line - 5 - 5 - 1 - - - SWIER6 - Software Interrupt on line - 6 - 6 - 1 - - - SWIER7 - Software Interrupt on line - 7 - 7 - 1 - - - SWIER8 - Software Interrupt on line - 8 - 8 - 1 - - - SWIER9 - Software Interrupt on line - 9 - 9 - 1 - - - SWIER10 - Software Interrupt on line - 10 - 10 - 1 - - - SWIER11 - Software Interrupt on line - 11 - 11 - 1 - - - SWIER12 - Software Interrupt on line - 12 - 12 - 1 - - - SWIER13 - Software Interrupt on line - 13 - 13 - 1 - - - SWIER14 - Software Interrupt on line - 14 - 14 - 1 - - - SWIER15 - Software Interrupt on line - 15 - 15 - 1 - - - SWIER16 - Software Interrupt on line - 16 - 16 - 1 - - - SWIER17 - Software Interrupt on line - 17 - 17 - 1 - - - SWIER18 - Software Interrupt on line - 18 - 18 - 1 - - - SWIER19 - Software Interrupt on line - 19 - 19 - 1 - - - SWIER20 - Software Interrupt on line - 20 - 20 - 1 - - - SWIER21 - Software Interrupt on line - 21 - 21 - 1 - - - SWIER22 - Software Interrupt on line - 22 - 22 - 1 - - - - - PR - - Pending register (EXTI_PR) - 0x14 - 32 - read-write - 0x00000000 - - - PR0 - Pending bit 0 - 0 - 1 - - - PR1 - Pending bit 1 - 1 - 1 - - - PR2 - Pending bit 2 - 2 - 1 - - - PR3 - Pending bit 3 - 3 - 1 - - - PR4 - Pending bit 4 - 4 - 1 - - - PR5 - Pending bit 5 - 5 - 1 - - - PR6 - Pending bit 6 - 6 - 1 - - - PR7 - Pending bit 7 - 7 - 1 - - - PR8 - Pending bit 8 - 8 - 1 - - - PR9 - Pending bit 9 - 9 - 1 - - - PR10 - Pending bit 10 - 10 - 1 - - - PR11 - Pending bit 11 - 11 - 1 - - - PR12 - Pending bit 12 - 12 - 1 - - - PR13 - Pending bit 13 - 13 - 1 - - - PR14 - Pending bit 14 - 14 - 1 - - - PR15 - Pending bit 15 - 15 - 1 - - - PR16 - Pending bit 16 - 16 - 1 - - - PR17 - Pending bit 17 - 17 - 1 - - - PR18 - Pending bit 18 - 18 - 1 - - - PR19 - Pending bit 19 - 19 - 1 - - - PR20 - Pending bit 20 - 20 - 1 - - - PR21 - Pending bit 21 - 21 - 1 - - - PR22 - Pending bit 22 - 22 - 1 - - - - - - - OTG_HS_GLOBAL - USB on the go high speed - USB_OTG_HS - 0x40040000 - - 0x0 - 0x400 - registers - - - OTG_HS_EP1_OUT - USB On The Go HS End Point 1 Out global - interrupt - 74 - - - OTG_HS_EP1_IN - USB On The Go HS End Point 1 In global - interrupt - 75 - - - OTG_HS_WKUP - USB On The Go HS Wakeup through EXTI - interrupt - 76 - - - OTG_HS - USB On The Go HS global - interrupt - 77 - - - - OTG_HS_GOTGCTL - OTG_HS_GOTGCTL - OTG_HS control and status - register - 0x0 - 32 - 0x00000800 - - - SRQSCS - Session request success - 0 - 1 - read-only - - - SRQ - Session request - 1 - 1 - read-write - - - HNGSCS - Host negotiation success - 8 - 1 - read-only - - - HNPRQ - HNP request - 9 - 1 - read-write - - - HSHNPEN - Host set HNP enable - 10 - 1 - read-write - - - DHNPEN - Device HNP enabled - 11 - 1 - read-write - - - CIDSTS - Connector ID status - 16 - 1 - read-only - - - DBCT - Long/short debounce time - 17 - 1 - read-only - - - ASVLD - A-session valid - 18 - 1 - read-only - - - BSVLD - B-session valid - 19 - 1 - read-only - - - - - OTG_HS_GOTGINT - OTG_HS_GOTGINT - OTG_HS interrupt register - 0x4 - 32 - read-write - 0x0 - - - SEDET - Session end detected - 2 - 1 - - - SRSSCHG - Session request success status - change - 8 - 1 - - - HNSSCHG - Host negotiation success status - change - 9 - 1 - - - HNGDET - Host negotiation detected - 17 - 1 - - - ADTOCHG - A-device timeout change - 18 - 1 - - - DBCDNE - Debounce done - 19 - 1 - - - - - OTG_HS_GAHBCFG - OTG_HS_GAHBCFG - OTG_HS AHB configuration - register - 0x8 - 32 - read-write - 0x0 - - - GINT - Global interrupt mask - 0 - 1 - - - HBSTLEN - Burst length/type - 1 - 4 - - - DMAEN - DMA enable - 5 - 1 - - - TXFELVL - TxFIFO empty level - 7 - 1 - - - PTXFELVL - Periodic TxFIFO empty - level - 8 - 1 - - - - - OTG_HS_GUSBCFG - OTG_HS_GUSBCFG - OTG_HS USB configuration - register - 0xc - 32 - 0x00000a00 - - - TOCAL - FS timeout calibration - 0 - 3 - read-write - - - PHYSEL - USB 2.0 high-speed ULPI PHY or USB 1.1 - full-speed serial transceiver select - 6 - 1 - write-only - - - SRPCAP - SRP-capable - 8 - 1 - read-write - - - HNPCAP - HNP-capable - 9 - 1 - read-write - - - TRDT - USB turnaround time - 10 - 4 - read-write - - - PHYLPCS - PHY Low-power clock select - 15 - 1 - read-write - - - ULPIFSLS - ULPI FS/LS select - 17 - 1 - read-write - - - ULPIAR - ULPI Auto-resume - 18 - 1 - read-write - - - ULPICSM - ULPI Clock SuspendM - 19 - 1 - read-write - - - ULPIEVBUSD - ULPI External VBUS Drive - 20 - 1 - read-write - - - ULPIEVBUSI - ULPI external VBUS - indicator - 21 - 1 - read-write - - - TSDPS - TermSel DLine pulsing - selection - 22 - 1 - read-write - - - PCCI - Indicator complement - 23 - 1 - read-write - - - PTCI - Indicator pass through - 24 - 1 - read-write - - - ULPIIPD - ULPI interface protect - disable - 25 - 1 - read-write - - - FHMOD - Forced host mode - 29 - 1 - read-write - - - FDMOD - Forced peripheral mode - 30 - 1 - read-write - - - CTXPKT - Corrupt Tx packet - 31 - 1 - read-write - - - - - OTG_HS_GRSTCTL - OTG_HS_GRSTCTL - OTG_HS reset register - 0x10 - 32 - 0x20000000 - - - CSRST - Core soft reset - 0 - 1 - read-write - - - HSRST - HCLK soft reset - 1 - 1 - read-write - - - FCRST - Host frame counter reset - 2 - 1 - read-write - - - RXFFLSH - RxFIFO flush - 4 - 1 - read-write - - - TXFFLSH - TxFIFO flush - 5 - 1 - read-write - - - TXFNUM - TxFIFO number - 6 - 5 - read-write - - - DMAREQ - DMA request signal - 30 - 1 - read-only - - - AHBIDL - AHB master idle - 31 - 1 - read-only - - - - - OTG_HS_GINTSTS - OTG_HS_GINTSTS - OTG_HS core interrupt register - 0x14 - 32 - 0x04000020 - - - CMOD - Current mode of operation - 0 - 1 - read-only - - - MMIS - Mode mismatch interrupt - 1 - 1 - read-write - - - OTGINT - OTG interrupt - 2 - 1 - read-only - - - SOF - Start of frame - 3 - 1 - read-write - - - RXFLVL - RxFIFO nonempty - 4 - 1 - read-only - - - NPTXFE - Nonperiodic TxFIFO empty - 5 - 1 - read-only - - - GINAKEFF - Global IN nonperiodic NAK - effective - 6 - 1 - read-only - - - BOUTNAKEFF - Global OUT NAK effective - 7 - 1 - read-only - - - ESUSP - Early suspend - 10 - 1 - read-write - - - USBSUSP - USB suspend - 11 - 1 - read-write - - - USBRST - USB reset - 12 - 1 - read-write - - - ENUMDNE - Enumeration done - 13 - 1 - read-write - - - ISOODRP - Isochronous OUT packet dropped - interrupt - 14 - 1 - read-write - - - EOPF - End of periodic frame - interrupt - 15 - 1 - read-write - - - IEPINT - IN endpoint interrupt - 18 - 1 - read-only - - - OEPINT - OUT endpoint interrupt - 19 - 1 - read-only - - - IISOIXFR - Incomplete isochronous IN - transfer - 20 - 1 - read-write - - - PXFR_INCOMPISOOUT - Incomplete periodic - transfer - 21 - 1 - read-write - - - DATAFSUSP - Data fetch suspended - 22 - 1 - read-write - - - HPRTINT - Host port interrupt - 24 - 1 - read-only - - - HCINT - Host channels interrupt - 25 - 1 - read-only - - - PTXFE - Periodic TxFIFO empty - 26 - 1 - read-only - - - CIDSCHG - Connector ID status change - 28 - 1 - read-write - - - DISCINT - Disconnect detected - interrupt - 29 - 1 - read-write - - - SRQINT - Session request/new session detected - interrupt - 30 - 1 - read-write - - - WKUINT - Resume/remote wakeup detected - interrupt - 31 - 1 - read-write - - - - - OTG_HS_GINTMSK - OTG_HS_GINTMSK - OTG_HS interrupt mask register - 0x18 - 32 - 0x0 - - - MMISM - Mode mismatch interrupt - mask - 1 - 1 - read-write - - - OTGINT - OTG interrupt mask - 2 - 1 - read-write - - - SOFM - Start of frame mask - 3 - 1 - read-write - - - RXFLVLM - Receive FIFO nonempty mask - 4 - 1 - read-write - - - NPTXFEM - Nonperiodic TxFIFO empty - mask - 5 - 1 - read-write - - - GINAKEFFM - Global nonperiodic IN NAK effective - mask - 6 - 1 - read-write - - - GONAKEFFM - Global OUT NAK effective - mask - 7 - 1 - read-write - - - ESUSPM - Early suspend mask - 10 - 1 - read-write - - - USBSUSPM - USB suspend mask - 11 - 1 - read-write - - - USBRST - USB reset mask - 12 - 1 - read-write - - - ENUMDNEM - Enumeration done mask - 13 - 1 - read-write - - - ISOODRPM - Isochronous OUT packet dropped interrupt - mask - 14 - 1 - read-write - - - EOPFM - End of periodic frame interrupt - mask - 15 - 1 - read-write - - - EPMISM - Endpoint mismatch interrupt - mask - 17 - 1 - read-write - - - IEPINT - IN endpoints interrupt - mask - 18 - 1 - read-write - - - OEPINT - OUT endpoints interrupt - mask - 19 - 1 - read-write - - - IISOIXFRM - Incomplete isochronous IN transfer - mask - 20 - 1 - read-write - - - PXFRM_IISOOXFRM - Incomplete periodic transfer - mask - 21 - 1 - read-write - - - FSUSPM - Data fetch suspended mask - 22 - 1 - read-write - - - PRTIM - Host port interrupt mask - 24 - 1 - read-only - - - HCIM - Host channels interrupt - mask - 25 - 1 - read-write - - - PTXFEM - Periodic TxFIFO empty mask - 26 - 1 - read-write - - - CIDSCHGM - Connector ID status change - mask - 28 - 1 - read-write - - - DISCINT - Disconnect detected interrupt - mask - 29 - 1 - read-write - - - SRQIM - Session request/new session detected - interrupt mask - 30 - 1 - read-write - - - WUIM - Resume/remote wakeup detected interrupt - mask - 31 - 1 - read-write - - - - - OTG_HS_GRXSTSR_Host - OTG_HS_GRXSTSR_Host - OTG_HS Receive status debug read register - (host mode) - 0x1c - 32 - read-only - 0x0 - - - CHNUM - Channel number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - - - OTG_HS_GRXSTSP_Host - OTG_HS_GRXSTSP_Host - OTG_HS status read and pop register (host - mode) - 0x20 - 32 - read-only - 0x0 - - - CHNUM - Channel number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - - - OTG_HS_GRXFSIZ - OTG_HS_GRXFSIZ - OTG_HS Receive FIFO size - register - 0x24 - 32 - read-write - 0x00000200 - - - RXFD - RxFIFO depth - 0 - 16 - - - - - OTG_HS_GNPTXFSIZ_Host - OTG_HS_GNPTXFSIZ_Host - OTG_HS nonperiodic transmit FIFO size - register (host mode) - 0x28 - 32 - read-write - 0x00000200 - - - NPTXFSA - Nonperiodic transmit RAM start - address - 0 - 16 - - - NPTXFD - Nonperiodic TxFIFO depth - 16 - 16 - - - - - OTG_HS_TX0FSIZ_Peripheral - OTG_HS_TX0FSIZ_Peripheral - Endpoint 0 transmit FIFO size (peripheral - mode) - OTG_HS_GNPTXFSIZ_Host - 0x28 - 32 - read-write - 0x00000200 - - - TX0FSA - Endpoint 0 transmit RAM start - address - 0 - 16 - - - TX0FD - Endpoint 0 TxFIFO depth - 16 - 16 - - - - - OTG_HS_GNPTXSTS - OTG_HS_GNPTXSTS - OTG_HS nonperiodic transmit FIFO/queue - status register - 0x2c - 32 - read-only - 0x00080200 - - - NPTXFSAV - Nonperiodic TxFIFO space - available - 0 - 16 - - - NPTQXSAV - Nonperiodic transmit request queue space - available - 16 - 8 - - - NPTXQTOP - Top of the nonperiodic transmit request - queue - 24 - 7 - - - - - OTG_HS_GCCFG - OTG_HS_GCCFG - OTG_HS general core configuration - register - 0x38 - 32 - read-write - 0x0 - - - PWRDWN - Power down - 16 - 1 - - - I2CPADEN - Enable I2C bus connection for the - external I2C PHY interface - 17 - 1 - - - VBUSASEN - Enable the VBUS sensing - device - 18 - 1 - - - VBUSBSEN - Enable the VBUS sensing - device - 19 - 1 - - - SOFOUTEN - SOF output enable - 20 - 1 - - - NOVBUSSENS - VBUS sensing disable - option - 21 - 1 - - - - - OTG_HS_CID - OTG_HS_CID - OTG_HS core ID register - 0x3c - 32 - read-write - 0x00001200 - - - PRODUCT_ID - Product ID field - 0 - 32 - - - - - OTG_HS_HPTXFSIZ - OTG_HS_HPTXFSIZ - OTG_HS Host periodic transmit FIFO size - register - 0x100 - 32 - read-write - 0x02000600 - - - PTXSA - Host periodic TxFIFO start - address - 0 - 16 - - - PTXFD - Host periodic TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF1 - OTG_HS_DIEPTXF1 - OTG_HS device IN endpoint transmit FIFO size - register - 0x104 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF2 - OTG_HS_DIEPTXF2 - OTG_HS device IN endpoint transmit FIFO size - register - 0x108 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF3 - OTG_HS_DIEPTXF3 - OTG_HS device IN endpoint transmit FIFO size - register - 0x11c - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF4 - OTG_HS_DIEPTXF4 - OTG_HS device IN endpoint transmit FIFO size - register - 0x120 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF5 - OTG_HS_DIEPTXF5 - OTG_HS device IN endpoint transmit FIFO size - register - 0x124 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF6 - OTG_HS_DIEPTXF6 - OTG_HS device IN endpoint transmit FIFO size - register - 0x128 - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_DIEPTXF7 - OTG_HS_DIEPTXF7 - OTG_HS device IN endpoint transmit FIFO size - register - 0x12c - 32 - read-write - 0x02000400 - - - INEPTXSA - IN endpoint FIFOx transmit RAM start - address - 0 - 16 - - - INEPTXFD - IN endpoint TxFIFO depth - 16 - 16 - - - - - OTG_HS_GRXSTSR_Peripheral - OTG_HS_GRXSTSR_Peripheral - OTG_HS Receive status debug read register - (peripheral mode mode) - OTG_HS_GRXSTSR_Host - 0x1c - 32 - read-only - 0x0 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - OTG_HS_GRXSTSP_Peripheral - OTG_HS_GRXSTSP_Peripheral - OTG_HS status read and pop register - (peripheral mode) - OTG_HS_GRXSTSP_Host - 0x20 - 32 - read-only - 0x0 - - - EPNUM - Endpoint number - 0 - 4 - - - BCNT - Byte count - 4 - 11 - - - DPID - Data PID - 15 - 2 - - - PKTSTS - Packet status - 17 - 4 - - - FRMNUM - Frame number - 21 - 4 - - - - - - - OTG_HS_HOST - USB on the go high speed - USB_OTG_HS - 0x40040400 - - 0x0 - 0x400 - registers - - - - OTG_HS_HCFG - OTG_HS_HCFG - OTG_HS host configuration - register - 0x0 - 32 - 0x0 - - - FSLSPCS - FS/LS PHY clock select - 0 - 2 - read-write - - - FSLSS - FS- and LS-only support - 2 - 1 - read-only - - - - - OTG_HS_HFIR - OTG_HS_HFIR - OTG_HS Host frame interval - register - 0x4 - 32 - read-write - 0x0000ea60 - - - FRIVL - Frame interval - 0 - 16 - - - - - OTG_HS_HFNUM - OTG_HS_HFNUM - OTG_HS host frame number/frame time - remaining register - 0x8 - 32 - read-only - 0x00003fff - - - FRNUM - Frame number - 0 - 16 - - - FTREM - Frame time remaining - 16 - 16 - - - - - OTG_HS_HPTXSTS - OTG_HS_HPTXSTS - OTG_HS_Host periodic transmit FIFO/queue - status register - 0x10 - 32 - 0x00080100 - - - PTXFSAVL - Periodic transmit data FIFO space - available - 0 - 16 - read-write - - - PTXQSAV - Periodic transmit request queue space - available - 16 - 8 - read-only - - - PTXQTOP - Top of the periodic transmit request - queue - 24 - 8 - read-only - - - - - OTG_HS_HAINT - OTG_HS_HAINT - OTG_HS Host all channels interrupt - register - 0x14 - 32 - read-only - 0x0 - - - HAINT - Channel interrupts - 0 - 16 - - - - - OTG_HS_HAINTMSK - OTG_HS_HAINTMSK - OTG_HS host all channels interrupt mask - register - 0x18 - 32 - read-write - 0x0 - - - HAINTM - Channel interrupt mask - 0 - 16 - - - - - OTG_HS_HPRT - OTG_HS_HPRT - OTG_HS host port control and status - register - 0x40 - 32 - 0x0 - - - PCSTS - Port connect status - 0 - 1 - read-only - - - PCDET - Port connect detected - 1 - 1 - read-write - - - PENA - Port enable - 2 - 1 - read-write - - - PENCHNG - Port enable/disable change - 3 - 1 - read-write - - - POCA - Port overcurrent active - 4 - 1 - read-only - - - POCCHNG - Port overcurrent change - 5 - 1 - read-write - - - PRES - Port resume - 6 - 1 - read-write - - - PSUSP - Port suspend - 7 - 1 - read-write - - - PRST - Port reset - 8 - 1 - read-write - - - PLSTS - Port line status - 10 - 2 - read-only - - - PPWR - Port power - 12 - 1 - read-write - - - PTCTL - Port test control - 13 - 4 - read-write - - - PSPD - Port speed - 17 - 2 - read-only - - - - - OTG_HS_HCCHAR0 - OTG_HS_HCCHAR0 - OTG_HS host channel-0 characteristics - register - 0x100 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR1 - OTG_HS_HCCHAR1 - OTG_HS host channel-1 characteristics - register - 0x120 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR2 - OTG_HS_HCCHAR2 - OTG_HS host channel-2 characteristics - register - 0x140 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR3 - OTG_HS_HCCHAR3 - OTG_HS host channel-3 characteristics - register - 0x160 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR4 - OTG_HS_HCCHAR4 - OTG_HS host channel-4 characteristics - register - 0x180 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR5 - OTG_HS_HCCHAR5 - OTG_HS host channel-5 characteristics - register - 0x1a0 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR6 - OTG_HS_HCCHAR6 - OTG_HS host channel-6 characteristics - register - 0x1c0 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR7 - OTG_HS_HCCHAR7 - OTG_HS host channel-7 characteristics - register - 0x1e0 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR8 - OTG_HS_HCCHAR8 - OTG_HS host channel-8 characteristics - register - 0x200 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR9 - OTG_HS_HCCHAR9 - OTG_HS host channel-9 characteristics - register - 0x220 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR10 - OTG_HS_HCCHAR10 - OTG_HS host channel-10 characteristics - register - 0x240 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCCHAR11 - OTG_HS_HCCHAR11 - OTG_HS host channel-11 characteristics - register - 0x260 - 32 - read-write - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - - - EPNUM - Endpoint number - 11 - 4 - - - EPDIR - Endpoint direction - 15 - 1 - - - LSDEV - Low-speed device - 17 - 1 - - - EPTYP - Endpoint type - 18 - 2 - - - MC - Multi Count (MC) / Error Count - (EC) - 20 - 2 - - - DAD - Device address - 22 - 7 - - - ODDFRM - Odd frame - 29 - 1 - - - CHDIS - Channel disable - 30 - 1 - - - CHENA - Channel enable - 31 - 1 - - - - - OTG_HS_HCSPLT0 - OTG_HS_HCSPLT0 - OTG_HS host channel-0 split control - register - 0x104 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT1 - OTG_HS_HCSPLT1 - OTG_HS host channel-1 split control - register - 0x124 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT2 - OTG_HS_HCSPLT2 - OTG_HS host channel-2 split control - register - 0x144 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT3 - OTG_HS_HCSPLT3 - OTG_HS host channel-3 split control - register - 0x164 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT4 - OTG_HS_HCSPLT4 - OTG_HS host channel-4 split control - register - 0x184 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT5 - OTG_HS_HCSPLT5 - OTG_HS host channel-5 split control - register - 0x1a4 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT6 - OTG_HS_HCSPLT6 - OTG_HS host channel-6 split control - register - 0x1c4 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT7 - OTG_HS_HCSPLT7 - OTG_HS host channel-7 split control - register - 0x1e4 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT8 - OTG_HS_HCSPLT8 - OTG_HS host channel-8 split control - register - 0x204 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT9 - OTG_HS_HCSPLT9 - OTG_HS host channel-9 split control - register - 0x224 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT10 - OTG_HS_HCSPLT10 - OTG_HS host channel-10 split control - register - 0x244 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCSPLT11 - OTG_HS_HCSPLT11 - OTG_HS host channel-11 split control - register - 0x264 - 32 - read-write - 0x0 - - - PRTADDR - Port address - 0 - 7 - - - HUBADDR - Hub address - 7 - 7 - - - XACTPOS - XACTPOS - 14 - 2 - - - COMPLSPLT - Do complete split - 16 - 1 - - - SPLITEN - Split enable - 31 - 1 - - - - - OTG_HS_HCINT0 - OTG_HS_HCINT0 - OTG_HS host channel-11 interrupt - register - 0x108 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT1 - OTG_HS_HCINT1 - OTG_HS host channel-1 interrupt - register - 0x128 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT2 - OTG_HS_HCINT2 - OTG_HS host channel-2 interrupt - register - 0x148 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT3 - OTG_HS_HCINT3 - OTG_HS host channel-3 interrupt - register - 0x168 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT4 - OTG_HS_HCINT4 - OTG_HS host channel-4 interrupt - register - 0x188 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT5 - OTG_HS_HCINT5 - OTG_HS host channel-5 interrupt - register - 0x1a8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT6 - OTG_HS_HCINT6 - OTG_HS host channel-6 interrupt - register - 0x1c8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT7 - OTG_HS_HCINT7 - OTG_HS host channel-7 interrupt - register - 0x1e8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT8 - OTG_HS_HCINT8 - OTG_HS host channel-8 interrupt - register - 0x208 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT9 - OTG_HS_HCINT9 - OTG_HS host channel-9 interrupt - register - 0x228 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT10 - OTG_HS_HCINT10 - OTG_HS host channel-10 interrupt - register - 0x248 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINT11 - OTG_HS_HCINT11 - OTG_HS host channel-11 interrupt - register - 0x268 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - 0 - 1 - - - CHH - Channel halted - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALL - STALL response received - interrupt - 3 - 1 - - - NAK - NAK response received - interrupt - 4 - 1 - - - ACK - ACK response received/transmitted - interrupt - 5 - 1 - - - NYET - Response received - interrupt - 6 - 1 - - - TXERR - Transaction error - 7 - 1 - - - BBERR - Babble error - 8 - 1 - - - FRMOR - Frame overrun - 9 - 1 - - - DTERR - Data toggle error - 10 - 1 - - - - - OTG_HS_HCINTMSK0 - OTG_HS_HCINTMSK0 - OTG_HS host channel-11 interrupt mask - register - 0x10c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK1 - OTG_HS_HCINTMSK1 - OTG_HS host channel-1 interrupt mask - register - 0x12c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK2 - OTG_HS_HCINTMSK2 - OTG_HS host channel-2 interrupt mask - register - 0x14c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK3 - OTG_HS_HCINTMSK3 - OTG_HS host channel-3 interrupt mask - register - 0x16c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK4 - OTG_HS_HCINTMSK4 - OTG_HS host channel-4 interrupt mask - register - 0x18c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK5 - OTG_HS_HCINTMSK5 - OTG_HS host channel-5 interrupt mask - register - 0x1ac - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK6 - OTG_HS_HCINTMSK6 - OTG_HS host channel-6 interrupt mask - register - 0x1cc - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK7 - OTG_HS_HCINTMSK7 - OTG_HS host channel-7 interrupt mask - register - 0x1ec - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK8 - OTG_HS_HCINTMSK8 - OTG_HS host channel-8 interrupt mask - register - 0x20c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK9 - OTG_HS_HCINTMSK9 - OTG_HS host channel-9 interrupt mask - register - 0x22c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK10 - OTG_HS_HCINTMSK10 - OTG_HS host channel-10 interrupt mask - register - 0x24c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCINTMSK11 - OTG_HS_HCINTMSK11 - OTG_HS host channel-11 interrupt mask - register - 0x26c - 32 - read-write - 0x0 - - - XFRCM - Transfer completed mask - 0 - 1 - - - CHHM - Channel halted mask - 1 - 1 - - - AHBERR - AHB error - 2 - 1 - - - STALLM - STALL response received interrupt - mask - 3 - 1 - - - NAKM - NAK response received interrupt - mask - 4 - 1 - - - ACKM - ACK response received/transmitted - interrupt mask - 5 - 1 - - - NYET - response received interrupt - mask - 6 - 1 - - - TXERRM - Transaction error mask - 7 - 1 - - - BBERRM - Babble error mask - 8 - 1 - - - FRMORM - Frame overrun mask - 9 - 1 - - - DTERRM - Data toggle error mask - 10 - 1 - - - - - OTG_HS_HCTSIZ0 - OTG_HS_HCTSIZ0 - OTG_HS host channel-11 transfer size - register - 0x110 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ1 - OTG_HS_HCTSIZ1 - OTG_HS host channel-1 transfer size - register - 0x130 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ2 - OTG_HS_HCTSIZ2 - OTG_HS host channel-2 transfer size - register - 0x150 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ3 - OTG_HS_HCTSIZ3 - OTG_HS host channel-3 transfer size - register - 0x170 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ4 - OTG_HS_HCTSIZ4 - OTG_HS host channel-4 transfer size - register - 0x190 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ5 - OTG_HS_HCTSIZ5 - OTG_HS host channel-5 transfer size - register - 0x1b0 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ6 - OTG_HS_HCTSIZ6 - OTG_HS host channel-6 transfer size - register - 0x1d0 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ7 - OTG_HS_HCTSIZ7 - OTG_HS host channel-7 transfer size - register - 0x1f0 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ8 - OTG_HS_HCTSIZ8 - OTG_HS host channel-8 transfer size - register - 0x210 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ9 - OTG_HS_HCTSIZ9 - OTG_HS host channel-9 transfer size - register - 0x230 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ10 - OTG_HS_HCTSIZ10 - OTG_HS host channel-10 transfer size - register - 0x250 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCTSIZ11 - OTG_HS_HCTSIZ11 - OTG_HS host channel-11 transfer size - register - 0x270 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - DPID - Data PID - 29 - 2 - - - - - OTG_HS_HCDMA0 - OTG_HS_HCDMA0 - OTG_HS host channel-0 DMA address - register - 0x114 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA1 - OTG_HS_HCDMA1 - OTG_HS host channel-1 DMA address - register - 0x134 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA2 - OTG_HS_HCDMA2 - OTG_HS host channel-2 DMA address - register - 0x154 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA3 - OTG_HS_HCDMA3 - OTG_HS host channel-3 DMA address - register - 0x174 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA4 - OTG_HS_HCDMA4 - OTG_HS host channel-4 DMA address - register - 0x194 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA5 - OTG_HS_HCDMA5 - OTG_HS host channel-5 DMA address - register - 0x1b4 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA6 - OTG_HS_HCDMA6 - OTG_HS host channel-6 DMA address - register - 0x1d4 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA7 - OTG_HS_HCDMA7 - OTG_HS host channel-7 DMA address - register - 0x1f4 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA8 - OTG_HS_HCDMA8 - OTG_HS host channel-8 DMA address - register - 0x214 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA9 - OTG_HS_HCDMA9 - OTG_HS host channel-9 DMA address - register - 0x234 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA10 - OTG_HS_HCDMA10 - OTG_HS host channel-10 DMA address - register - 0x254 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_HCDMA11 - OTG_HS_HCDMA11 - OTG_HS host channel-11 DMA address - register - 0x274 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - - - OTG_HS_DEVICE - USB on the go high speed - USB_OTG_HS - 0x40040800 - - 0x0 - 0x400 - registers - - - - OTG_HS_DCFG - OTG_HS_DCFG - OTG_HS device configuration - register - 0x0 - 32 - read-write - 0x02200000 - - - DSPD - Device speed - 0 - 2 - - - NZLSOHSK - Nonzero-length status OUT - handshake - 2 - 1 - - - DAD - Device address - 4 - 7 - - - PFIVL - Periodic (micro)frame - interval - 11 - 2 - - - PERSCHIVL - Periodic scheduling - interval - 24 - 2 - - - - - OTG_HS_DCTL - OTG_HS_DCTL - OTG_HS device control register - 0x4 - 32 - 0x0 - - - RWUSIG - Remote wakeup signaling - 0 - 1 - read-write - - - SDIS - Soft disconnect - 1 - 1 - read-write - - - GINSTS - Global IN NAK status - 2 - 1 - read-only - - - GONSTS - Global OUT NAK status - 3 - 1 - read-only - - - TCTL - Test control - 4 - 3 - read-write - - - SGINAK - Set global IN NAK - 7 - 1 - write-only - - - CGINAK - Clear global IN NAK - 8 - 1 - write-only - - - SGONAK - Set global OUT NAK - 9 - 1 - write-only - - - CGONAK - Clear global OUT NAK - 10 - 1 - write-only - - - POPRGDNE - Power-on programming done - 11 - 1 - read-write - - - - - OTG_HS_DSTS - OTG_HS_DSTS - OTG_HS device status register - 0x8 - 32 - read-only - 0x00000010 - - - SUSPSTS - Suspend status - 0 - 1 - - - ENUMSPD - Enumerated speed - 1 - 2 - - - EERR - Erratic error - 3 - 1 - - - FNSOF - Frame number of the received - SOF - 8 - 14 - - - - - OTG_HS_DIEPMSK - OTG_HS_DIEPMSK - OTG_HS device IN endpoint common interrupt - mask register - 0x10 - 32 - read-write - 0x0 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask (nonisochronous - endpoints) - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - TXFURM - FIFO underrun mask - 8 - 1 - - - BIM - BNA interrupt mask - 9 - 1 - - - - - OTG_HS_DOEPMSK - OTG_HS_DOEPMSK - OTG_HS device OUT endpoint common interrupt - mask register - 0x14 - 32 - read-write - 0x0 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - STUPM - SETUP phase done mask - 3 - 1 - - - OTEPDM - OUT token received when endpoint - disabled mask - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets received - mask - 6 - 1 - - - OPEM - OUT packet error mask - 8 - 1 - - - BOIM - BNA interrupt mask - 9 - 1 - - - - - OTG_HS_DAINT - OTG_HS_DAINT - OTG_HS device all endpoints interrupt - register - 0x18 - 32 - read-only - 0x0 - - - IEPINT - IN endpoint interrupt bits - 0 - 16 - - - OEPINT - OUT endpoint interrupt - bits - 16 - 16 - - - - - OTG_HS_DAINTMSK - OTG_HS_DAINTMSK - OTG_HS all endpoints interrupt mask - register - 0x1c - 32 - read-write - 0x0 - - - IEPM - IN EP interrupt mask bits - 0 - 16 - - - OEPM - OUT EP interrupt mask bits - 16 - 16 - - - - - OTG_HS_DVBUSDIS - OTG_HS_DVBUSDIS - OTG_HS device VBUS discharge time - register - 0x28 - 32 - read-write - 0x000017d7 - - - VBUSDT - Device VBUS discharge time - 0 - 16 - - - - - OTG_HS_DVBUSPULSE - OTG_HS_DVBUSPULSE - OTG_HS device VBUS pulsing time - register - 0x2c - 32 - read-write - 0x000005b8 - - - DVBUSP - Device VBUS pulsing time - 0 - 12 - - - - - OTG_HS_DTHRCTL - OTG_HS_DTHRCTL - OTG_HS Device threshold control - register - 0x30 - 32 - read-write - 0x0 - - - NONISOTHREN - Nonisochronous IN endpoints threshold - enable - 0 - 1 - - - ISOTHREN - ISO IN endpoint threshold - enable - 1 - 1 - - - TXTHRLEN - Transmit threshold length - 2 - 9 - - - RXTHREN - Receive threshold enable - 16 - 1 - - - RXTHRLEN - Receive threshold length - 17 - 9 - - - ARPEN - Arbiter parking enable - 27 - 1 - - - - - OTG_HS_DIEPEMPMSK - OTG_HS_DIEPEMPMSK - OTG_HS device IN endpoint FIFO empty - interrupt mask register - 0x34 - 32 - read-write - 0x0 - - - INEPTXFEM - IN EP Tx FIFO empty interrupt mask - bits - 0 - 16 - - - - - OTG_HS_DEACHINT - OTG_HS_DEACHINT - OTG_HS device each endpoint interrupt - register - 0x38 - 32 - read-write - 0x0 - - - IEP1INT - IN endpoint 1interrupt bit - 1 - 1 - - - OEP1INT - OUT endpoint 1 interrupt - bit - 17 - 1 - - - - - OTG_HS_DEACHINTMSK - OTG_HS_DEACHINTMSK - OTG_HS device each endpoint interrupt - register mask - 0x3c - 32 - read-write - 0x0 - - - IEP1INTM - IN Endpoint 1 interrupt mask - bit - 1 - 1 - - - OEP1INTM - OUT Endpoint 1 interrupt mask - bit - 17 - 1 - - - - - OTG_HS_DIEPEACHMSK1 - OTG_HS_DIEPEACHMSK1 - OTG_HS device each in endpoint-1 interrupt - register - 0x40 - 32 - read-write - 0x0 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask (nonisochronous - endpoints) - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - TXFURM - FIFO underrun mask - 8 - 1 - - - BIM - BNA interrupt mask - 9 - 1 - - - NAKM - NAK interrupt mask - 13 - 1 - - - - - OTG_HS_DOEPEACHMSK1 - OTG_HS_DOEPEACHMSK1 - OTG_HS device each OUT endpoint-1 interrupt - register - 0x80 - 32 - read-write - 0x0 - - - XFRCM - Transfer completed interrupt - mask - 0 - 1 - - - EPDM - Endpoint disabled interrupt - mask - 1 - 1 - - - TOM - Timeout condition mask - 3 - 1 - - - ITTXFEMSK - IN token received when TxFIFO empty - mask - 4 - 1 - - - INEPNMM - IN token received with EP mismatch - mask - 5 - 1 - - - INEPNEM - IN endpoint NAK effective - mask - 6 - 1 - - - TXFURM - OUT packet error mask - 8 - 1 - - - BIM - BNA interrupt mask - 9 - 1 - - - BERRM - Bubble error interrupt - mask - 12 - 1 - - - NAKM - NAK interrupt mask - 13 - 1 - - - NYETM - NYET interrupt mask - 14 - 1 - - - - - OTG_HS_DIEPCTL0 - OTG_HS_DIEPCTL0 - OTG device endpoint-0 control - register - 0x100 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL1 - OTG_HS_DIEPCTL1 - OTG device endpoint-1 control - register - 0x120 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL2 - OTG_HS_DIEPCTL2 - OTG device endpoint-2 control - register - 0x140 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL3 - OTG_HS_DIEPCTL3 - OTG device endpoint-3 control - register - 0x160 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL4 - OTG_HS_DIEPCTL4 - OTG device endpoint-4 control - register - 0x180 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL5 - OTG_HS_DIEPCTL5 - OTG device endpoint-5 control - register - 0x1a0 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL6 - OTG_HS_DIEPCTL6 - OTG device endpoint-6 control - register - 0x1c0 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPCTL7 - OTG_HS_DIEPCTL7 - OTG device endpoint-7 control - register - 0x1e0 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even/odd frame - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - TXFNUM - TxFIFO number - 22 - 4 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DIEPINT0 - OTG_HS_DIEPINT0 - OTG device endpoint-0 interrupt - register - 0x108 - 32 - 0x00000080 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT1 - OTG_HS_DIEPINT1 - OTG device endpoint-1 interrupt - register - 0x128 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT2 - OTG_HS_DIEPINT2 - OTG device endpoint-2 interrupt - register - 0x148 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT3 - OTG_HS_DIEPINT3 - OTG device endpoint-3 interrupt - register - 0x168 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT4 - OTG_HS_DIEPINT4 - OTG device endpoint-4 interrupt - register - 0x188 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT5 - OTG_HS_DIEPINT5 - OTG device endpoint-5 interrupt - register - 0x1a8 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT6 - OTG_HS_DIEPINT6 - OTG device endpoint-6 interrupt - register - 0x1c8 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPINT7 - OTG_HS_DIEPINT7 - OTG device endpoint-7 interrupt - register - 0x1e8 - 32 - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - read-write - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - read-write - - - TOC - Timeout condition - 3 - 1 - read-write - - - ITTXFE - IN token received when TxFIFO is - empty - 4 - 1 - read-write - - - INEPNE - IN endpoint NAK effective - 6 - 1 - read-write - - - TXFE - Transmit FIFO empty - 7 - 1 - read-only - - - TXFIFOUDRN - Transmit Fifo Underrun - 8 - 1 - read-write - - - BNA - Buffer not available - interrupt - 9 - 1 - read-write - - - PKTDRPSTS - Packet dropped status - 11 - 1 - read-write - - - BERR - Babble error interrupt - 12 - 1 - read-write - - - NAK - NAK interrupt - 13 - 1 - read-write - - - - - OTG_HS_DIEPTSIZ0 - OTG_HS_DIEPTSIZ0 - OTG_HS device IN endpoint 0 transfer size - register - 0x110 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 7 - - - PKTCNT - Packet count - 19 - 2 - - - - - OTG_HS_DIEPDMA1 - OTG_HS_DIEPDMA1 - OTG_HS device endpoint-1 DMA address - register - 0x114 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DIEPDMA2 - OTG_HS_DIEPDMA2 - OTG_HS device endpoint-2 DMA address - register - 0x134 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DIEPDMA3 - OTG_HS_DIEPDMA3 - OTG_HS device endpoint-3 DMA address - register - 0x154 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DIEPDMA4 - OTG_HS_DIEPDMA4 - OTG_HS device endpoint-4 DMA address - register - 0x174 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DIEPDMA5 - OTG_HS_DIEPDMA5 - OTG_HS device endpoint-5 DMA address - register - 0x194 - 32 - read-write - 0x0 - - - DMAADDR - DMA address - 0 - 32 - - - - - OTG_HS_DTXFSTS0 - OTG_HS_DTXFSTS0 - OTG_HS device IN endpoint transmit FIFO - status register - 0x118 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS1 - OTG_HS_DTXFSTS1 - OTG_HS device IN endpoint transmit FIFO - status register - 0x138 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS2 - OTG_HS_DTXFSTS2 - OTG_HS device IN endpoint transmit FIFO - status register - 0x158 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS3 - OTG_HS_DTXFSTS3 - OTG_HS device IN endpoint transmit FIFO - status register - 0x178 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS4 - OTG_HS_DTXFSTS4 - OTG_HS device IN endpoint transmit FIFO - status register - 0x198 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DTXFSTS5 - OTG_HS_DTXFSTS5 - OTG_HS device IN endpoint transmit FIFO - status register - 0x1b8 - 32 - read-only - 0x0 - - - INEPTFSAV - IN endpoint TxFIFO space - avail - 0 - 16 - - - - - OTG_HS_DIEPTSIZ1 - OTG_HS_DIEPTSIZ1 - OTG_HS device endpoint transfer size - register - 0x130 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DIEPTSIZ2 - OTG_HS_DIEPTSIZ2 - OTG_HS device endpoint transfer size - register - 0x150 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DIEPTSIZ3 - OTG_HS_DIEPTSIZ3 - OTG_HS device endpoint transfer size - register - 0x170 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DIEPTSIZ4 - OTG_HS_DIEPTSIZ4 - OTG_HS device endpoint transfer size - register - 0x190 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DIEPTSIZ5 - OTG_HS_DIEPTSIZ5 - OTG_HS device endpoint transfer size - register - 0x1b0 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - MCNT - Multi count - 29 - 2 - - - - - OTG_HS_DOEPCTL0 - OTG_HS_DOEPCTL0 - OTG_HS device control OUT endpoint 0 control - register - 0x300 - 32 - 0x00008000 - - - MPSIZ - Maximum packet size - 0 - 2 - read-only - - - USBAEP - USB active endpoint - 15 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-only - - - SNPM - Snoop mode - 20 - 1 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-only - - - EPENA - Endpoint enable - 31 - 1 - write-only - - - - - OTG_HS_DOEPCTL1 - OTG_HS_DOEPCTL1 - OTG device endpoint-1 control - register - 0x320 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even odd frame/Endpoint data - PID - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - SNPM - Snoop mode - 20 - 1 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID/Set even - frame - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DOEPCTL2 - OTG_HS_DOEPCTL2 - OTG device endpoint-2 control - register - 0x340 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even odd frame/Endpoint data - PID - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - SNPM - Snoop mode - 20 - 1 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID/Set even - frame - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DOEPCTL3 - OTG_HS_DOEPCTL3 - OTG device endpoint-3 control - register - 0x360 - 32 - 0x0 - - - MPSIZ - Maximum packet size - 0 - 11 - read-write - - - USBAEP - USB active endpoint - 15 - 1 - read-write - - - EONUM_DPID - Even odd frame/Endpoint data - PID - 16 - 1 - read-only - - - NAKSTS - NAK status - 17 - 1 - read-only - - - EPTYP - Endpoint type - 18 - 2 - read-write - - - SNPM - Snoop mode - 20 - 1 - read-write - - - Stall - STALL handshake - 21 - 1 - read-write - - - CNAK - Clear NAK - 26 - 1 - write-only - - - SNAK - Set NAK - 27 - 1 - write-only - - - SD0PID_SEVNFRM - Set DATA0 PID/Set even - frame - 28 - 1 - write-only - - - SODDFRM - Set odd frame - 29 - 1 - write-only - - - EPDIS - Endpoint disable - 30 - 1 - read-write - - - EPENA - Endpoint enable - 31 - 1 - read-write - - - - - OTG_HS_DOEPINT0 - OTG_HS_DOEPINT0 - OTG_HS device endpoint-0 interrupt - register - 0x308 - 32 - read-write - 0x00000080 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT1 - OTG_HS_DOEPINT1 - OTG_HS device endpoint-1 interrupt - register - 0x328 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT2 - OTG_HS_DOEPINT2 - OTG_HS device endpoint-2 interrupt - register - 0x348 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT3 - OTG_HS_DOEPINT3 - OTG_HS device endpoint-3 interrupt - register - 0x368 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT4 - OTG_HS_DOEPINT4 - OTG_HS device endpoint-4 interrupt - register - 0x388 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT5 - OTG_HS_DOEPINT5 - OTG_HS device endpoint-5 interrupt - register - 0x3a8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT6 - OTG_HS_DOEPINT6 - OTG_HS device endpoint-6 interrupt - register - 0x3c8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPINT7 - OTG_HS_DOEPINT7 - OTG_HS device endpoint-7 interrupt - register - 0x3e8 - 32 - read-write - 0x0 - - - XFRC - Transfer completed - interrupt - 0 - 1 - - - EPDISD - Endpoint disabled - interrupt - 1 - 1 - - - STUP - SETUP phase done - 3 - 1 - - - OTEPDIS - OUT token received when endpoint - disabled - 4 - 1 - - - B2BSTUP - Back-to-back SETUP packets - received - 6 - 1 - - - NYET - NYET interrupt - 14 - 1 - - - - - OTG_HS_DOEPTSIZ0 - OTG_HS_DOEPTSIZ0 - OTG_HS device endpoint-1 transfer size - register - 0x310 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 7 - - - PKTCNT - Packet count - 19 - 1 - - - STUPCNT - SETUP packet count - 29 - 2 - - - - - OTG_HS_DOEPTSIZ1 - OTG_HS_DOEPTSIZ1 - OTG_HS device endpoint-2 transfer size - register - 0x330 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - - - OTG_HS_DOEPTSIZ2 - OTG_HS_DOEPTSIZ2 - OTG_HS device endpoint-3 transfer size - register - 0x350 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - - - OTG_HS_DOEPTSIZ3 - OTG_HS_DOEPTSIZ3 - OTG_HS device endpoint-4 transfer size - register - 0x370 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - - - OTG_HS_DOEPTSIZ4 - OTG_HS_DOEPTSIZ4 - OTG_HS device endpoint-5 transfer size - register - 0x390 - 32 - read-write - 0x0 - - - XFRSIZ - Transfer size - 0 - 19 - - - PKTCNT - Packet count - 19 - 10 - - - RXDPID_STUPCNT - Received data PID/SETUP packet - count - 29 - 2 - - - - - - - OTG_HS_PWRCLK - USB on the go high speed - USB_OTG_HS - 0x40040e00 - - 0x0 - 0x3f200 - registers - - - - OTG_HS_PCGCR - OTG_HS_PCGCR - Power and clock gating control - register - 0x0 - 32 - read-write - 0x0 - - - STPPCLK - Stop PHY clock - 0 - 1 - - - GATEHCLK - Gate HCLK - 1 - 1 - - - PHYSUSP - PHY suspended - 4 - 1 - - - - - - - LTDC - LCD-TFT Controller - LTDC - 0x40016800 - - 0x0 - 0x400 - registers - - - LCD_TFT - LTDC global interrupt - 88 - - - LCD_TFT_1 - LTDC global error interrupt - 89 - - - - SSCR - - Synchronization Size Configuration - Register - 0x8 - 32 - read-write - 0x00000000 - - - HSW - Horizontal Synchronization Width (in - units of pixel clock period) - 16 - 12 - - - VSH - Vertical Synchronization Height (in - units of horizontal scan line) - 0 - 11 - - - - - BPCR - - Back Porch Configuration - Register - 0xc - 32 - read-write - 0x00000000 - - - AHBP - Accumulated Horizontal back porch (in - units of pixel clock period) - 16 - 12 - - - AVBP - Accumulated Vertical back porch (in - units of horizontal scan line) - 0 - 11 - - - - - AWCR - - Active Width Configuration - Register - 0x10 - 32 - read-write - 0x00000000 - - - AAW - Accumulated Active Width (in units of pixel clock period) - 16 - 12 - - - AAH - Accumulated Active Height (in units of - horizontal scan line) - 0 - 11 - - - - - TWCR - - Total Width Configuration - Register - 0x14 - 32 - read-write - 0x00000000 - - - TOTALW - Total Width (in units of pixel clock - period) - 16 - 12 - - - TOTALH - Total Height (in units of horizontal - scan line) - 0 - 11 - - - - - GCR - - Global Control Register - 0x18 - 32 - 0x00002220 - - - HSPOL - Horizontal Synchronization - Polarity - 31 - 1 - read-write - - - VSPOL - Vertical Synchronization - Polarity - 30 - 1 - read-write - - - DEPOL - Data Enable Polarity - 29 - 1 - read-write - - - PCPOL - Pixel Clock Polarity - 28 - 1 - read-write - - - DEN - Dither Enable - 16 - 1 - read-write - - - DRW - Dither Red Width - 12 - 3 - read-only - - - DGW - Dither Green Width - 8 - 3 - read-only - - - DBW - Dither Blue Width - 4 - 3 - read-only - - - LTDCEN - LCD-TFT controller enable - bit - 0 - 1 - read-write - - - - - SRCR - - Shadow Reload Configuration - Register - 0x24 - 32 - read-write - 0x00000000 - - - VBR - Vertical Blanking Reload - 1 - 1 - - - IMR - Immediate Reload - 0 - 1 - - - - - BCCR - - Background Color Configuration - Register - 0x2c - 32 - read-write - 0x00000000 - - - BC - Background Color Red value - 0 - 24 - - - - - IER - - Interrupt Enable Register - 0x34 - 32 - read-write - 0x00000000 - - - RRIE - Register Reload interrupt - enable - 3 - 1 - - - TERRIE - Transfer Error Interrupt - Enable - 2 - 1 - - - FUIE - FIFO Underrun Interrupt - Enable - 1 - 1 - - - LIE - Line Interrupt Enable - 0 - 1 - - - - - ISR - - Interrupt Status Register - 0x38 - 32 - read-only - 0x00000000 - - - RRIF - Register Reload Interrupt - Flag - 3 - 1 - - - TERRIF - Transfer Error interrupt - flag - 2 - 1 - - - FUIF - FIFO Underrun Interrupt - flag - 1 - 1 - - - LIF - Line Interrupt flag - 0 - 1 - - - - - ICR - - Interrupt Clear Register - 0x3c - 32 - write-only - 0x00000000 - - - CRRIF - Clears Register Reload Interrupt - Flag - 3 - 1 - - - CTERRIF - Clears the Transfer Error Interrupt - Flag - 2 - 1 - - - CFUIF - Clears the FIFO Underrun Interrupt - flag - 1 - 1 - - - CLIF - Clears the Line Interrupt - Flag - 0 - 1 - - - - - LIPCR - - Line Interrupt Position Configuration - Register - 0x40 - 32 - read-write - 0x00000000 - - - LIPOS - Line Interrupt Position - 0 - 11 - - - - - CPSR - - Current Position Status - Register - 0x44 - 32 - read-only - 0x00000000 - - - CXPOS - Current X Position - 16 - 16 - - - CYPOS - Current Y Position - 0 - 16 - - - - - CDSR - - Current Display Status - Register - 0x48 - 32 - read-only - 0x0000000f - - - HSYNCS - Horizontal Synchronization display - Status - 3 - 1 - - - VSYNCS - Vertical Synchronization display - Status - 2 - 1 - - - HDES - Horizontal Data Enable display - Status - 1 - 1 - - - VDES - Vertical Data Enable display - Status - 0 - 1 - - - - - L1CR - - Layerx Control Register - 0x84 - 32 - read-write - 0x00000000 - - - CLUTEN - Color Look-Up Table Enable - 4 - 1 - - - COLKEN - Color Keying Enable - 1 - 1 - - - LEN - Layer Enable - 0 - 1 - - - - - L1WHPCR - - Layerx Window Horizontal Position - Configuration Register - 0x88 - 32 - read-write - 0x00000000 - - - WHSPPOS - Window Horizontal Stop - Position - 16 - 12 - - - WHSTPOS - Window Horizontal Start - Position - 0 - 12 - - - - - L1WVPCR - - Layerx Window Vertical Position - Configuration Register - 0x8c - 32 - read-write - 0x00000000 - - - WVSPPOS - Window Vertical Stop - Position - 16 - 11 - - - WVSTPOS - Window Vertical Start - Position - 0 - 11 - - - - - L1CKCR - - Layerx Color Keying Configuration - Register - 0x90 - 32 - read-write - 0x00000000 - - - CKRED - Color Key Red value - 16 - 8 - - - CKGREEN - Color Key Green value - 8 - 8 - - - CKBLUE - Color Key Blue value - 0 - 8 - - - - - L1PFCR - - Layerx Pixel Format Configuration - Register - 0x94 - 32 - read-write - 0x00000000 - - - PF - Pixel Format - 0 - 3 - - - - - L1CACR - - Layerx Constant Alpha Configuration - Register - 0x98 - 32 - read-write - 0x00000000 - - - CONSTA - Constant Alpha - 0 - 8 - - - - - L1DCCR - - Layerx Default Color Configuration - Register - 0x9c - 32 - read-write - 0x00000000 - - - DCALPHA - Default Color Alpha - 24 - 8 - - - DCRED - Default Color Red - 16 - 8 - - - DCGREEN - Default Color Green - 8 - 8 - - - DCBLUE - Default Color Blue - 0 - 8 - - - - - L1BFCR - - Layerx Blending Factors Configuration - Register - 0xa0 - 32 - read-write - 0x00000607 - - - BF1 - Blending Factor 1 - 8 - 3 - - - BF2 - Blending Factor 2 - 0 - 3 - - - - - L1CFBAR - - Layerx Color Frame Buffer Address - Register - 0xac - 32 - read-write - 0x00000000 - - - CFBADD - Color Frame Buffer Start - Address - 0 - 32 - - - - - L1CFBLR - - Layerx Color Frame Buffer Length - Register - 0xb0 - 32 - read-write - 0x00000000 - - - CFBP - Color Frame Buffer Pitch in - bytes - 16 - 13 - - - CFBLL - Color Frame Buffer Line - Length - 0 - 13 - - - - - L1CFBLNR - - Layerx ColorFrame Buffer Line Number - Register - 0xb4 - 32 - read-write - 0x00000000 - - - CFBLNBR - Frame Buffer Line Number - 0 - 11 - - - - - L1CLUTWR - - Layerx CLUT Write Register - 0xc4 - 32 - write-only - 0x00000000 - - - CLUTADD - CLUT Address - 24 - 8 - - - RED - Red value - 16 - 8 - - - GREEN - Green value - 8 - 8 - - - BLUE - Blue value - 0 - 8 - - - - - L2CR - - Layerx Control Register - 0x104 - 32 - read-write - 0x00000000 - - - CLUTEN - Color Look-Up Table Enable - 4 - 1 - - - COLKEN - Color Keying Enable - 1 - 1 - - - LEN - Layer Enable - 0 - 1 - - - - - L2WHPCR - - Layerx Window Horizontal Position - Configuration Register - 0x108 - 32 - read-write - 0x00000000 - - - WHSPPOS - Window Horizontal Stop - Position - 16 - 12 - - - WHSTPOS - Window Horizontal Start - Position - 0 - 12 - - - - - L2WVPCR - - Layerx Window Vertical Position - Configuration Register - 0x10c - 32 - read-write - 0x00000000 - - - WVSPPOS - Window Vertical Stop - Position - 16 - 11 - - - WVSTPOS - Window Vertical Start - Position - 0 - 11 - - - - - L2CKCR - - Layerx Color Keying Configuration - Register - 0x110 - 32 - read-write - 0x00000000 - - - CKRED - Color Key Red value - 15 - 9 - - - CKGREEN - Color Key Green value - 8 - 7 - - - CKBLUE - Color Key Blue value - 0 - 8 - - - - - L2PFCR - - Layerx Pixel Format Configuration - Register - 0x114 - 32 - read-write - 0x00000000 - - - PF - Pixel Format - 0 - 3 - - - - - L2CACR - - Layerx Constant Alpha Configuration - Register - 0x118 - 32 - read-write - 0x00000000 - - - CONSTA - Constant Alpha - 0 - 8 - - - - - L2DCCR - - Layerx Default Color Configuration - Register - 0x11c - 32 - read-write - 0x00000000 - - - DCALPHA - Default Color Alpha - 24 - 8 - - - DCRED - Default Color Red - 16 - 8 - - - DCGREEN - Default Color Green - 8 - 8 - - - DCBLUE - Default Color Blue - 0 - 8 - - - - - L2BFCR - - Layerx Blending Factors Configuration - Register - 0x120 - 32 - read-write - 0x00000607 - - - BF1 - Blending Factor 1 - 8 - 3 - - - BF2 - Blending Factor 2 - 0 - 3 - - - - - L2CFBAR - - Layerx Color Frame Buffer Address - Register - 0x12c - 32 - read-write - 0x00000000 - - - CFBADD - Color Frame Buffer Start - Address - 0 - 32 - - - - - L2CFBLR - - Layerx Color Frame Buffer Length - Register - 0x130 - 32 - read-write - 0x00000000 - - - CFBP - Color Frame Buffer Pitch in - bytes - 16 - 13 - - - CFBLL - Color Frame Buffer Line - Length - 0 - 13 - - - - - L2CFBLNR - - Layerx ColorFrame Buffer Line Number - Register - 0x134 - 32 - read-write - 0x00000000 - - - CFBLNBR - Frame Buffer Line Number - 0 - 11 - - - - - L2CLUTWR - - Layerx CLUT Write Register - 0x144 - 32 - write-only - 0x00000000 - - - CLUTADD - CLUT Address - 24 - 8 - - - RED - Red value - 16 - 8 - - - GREEN - Green value - 8 - 8 - - - BLUE - Blue value - 0 - 8 - - - - - - - SAI - Serial audio interface - SAI - 0x40015800 - - 0x0 - 0x400 - registers - - - SAI1 - SAI1 global interrupt - 87 - - - - BCR1 - - BConfiguration register 1 - 0x24 - 32 - read-write - 0x00000040 - - - MCJDIV - Master clock divider - 20 - 4 - - - NODIV - No divider - 19 - 1 - - - DMAEN - DMA enable - 17 - 1 - - - SAIBEN - Audio block B enable - 16 - 1 - - - OutDri - Output drive - 13 - 1 - - - MONO - Mono mode - 12 - 1 - - - SYNCEN - Synchronization enable - 10 - 2 - - - CKSTR - Clock strobing edge - 9 - 1 - - - LSBFIRST - Least significant bit - first - 8 - 1 - - - DS - Data size - 5 - 3 - - - PRTCFG - Protocol configuration - 2 - 2 - - - MODE - Audio block mode - 0 - 2 - - - - - BCR2 - - BConfiguration register 2 - 0x28 - 32 - read-write - 0x00000000 - - - COMP - Companding mode - 14 - 2 - - - CPL - Complement bit - 13 - 1 - - - MUTECN - Mute counter - 7 - 6 - - - MUTEVAL - Mute value - 6 - 1 - - - MUTE - Mute - 5 - 1 - - - TRIS - Tristate management on data - line - 4 - 1 - - - FFLUS - FIFO flush - 3 - 1 - - - FTH - FIFO threshold - 0 - 3 - - - - - BFRCR - - BFRCR - 0x2c - 32 - read-write - 0x00000007 - - - FSOFF - Frame synchronization - offset - 18 - 1 - - - FSPOL - Frame synchronization - polarity - 17 - 1 - - - FSDEF - Frame synchronization - definition - 16 - 1 - - - FSALL - Frame synchronization active level - length - 8 - 7 - - - FRL - Frame length - 0 - 8 - - - - - BSLOTR - - BSlot register - 0x30 - 32 - read-write - 0x00000000 - - - SLOTEN - Slot enable - 16 - 16 - - - NBSLOT - Number of slots in an audio - frame - 8 - 4 - - - SLOTSZ - Slot size - 6 - 2 - - - FBOFF - First bit offset - 0 - 5 - - - - - BIM - - BInterrupt mask register2 - 0x34 - 32 - read-write - 0x00000000 - - - LFSDETIE - Late frame synchronization detection - interrupt enable - 6 - 1 - - - AFSDETIE - Anticipated frame synchronization - detection interrupt enable - 5 - 1 - - - CNRDYIE - Codec not ready interrupt - enable - 4 - 1 - - - FREQIE - FIFO request interrupt - enable - 3 - 1 - - - WCKCFG - Wrong clock configuration interrupt - enable - 2 - 1 - - - MUTEDET - Mute detection interrupt - enable - 1 - 1 - - - OVRUDRIE - Overrun/underrun interrupt - enable - 0 - 1 - - - - - BSR - - BStatus register - 0x38 - 32 - read-only - 0x00000000 - - - FLVL - FIFO level threshold - 16 - 3 - - - LFSDET - Late frame synchronization - detection - 6 - 1 - - - AFSDET - Anticipated frame synchronization - detection - 5 - 1 - - - CNRDY - Codec not ready - 4 - 1 - - - FREQ - FIFO request - 3 - 1 - - - WCKCFG - Wrong clock configuration - flag - 2 - 1 - - - MUTEDET - Mute detection - 1 - 1 - - - OVRUDR - Overrun / underrun - 0 - 1 - - - - - BCLRFR - - BClear flag register - 0x3c - 32 - write-only - 0x00000000 - - - LFSDET - Clear late frame synchronization - detection flag - 6 - 1 - - - CAFSDET - Clear anticipated frame synchronization - detection flag - 5 - 1 - - - CNRDY - Clear codec not ready flag - 4 - 1 - - - WCKCFG - Clear wrong clock configuration - flag - 2 - 1 - - - MUTEDET - Mute detection flag - 1 - 1 - - - OVRUDR - Clear overrun / underrun - 0 - 1 - - - - - BDR - - BData register - 0x40 - 32 - read-write - 0x00000000 - - - DATA - Data - 0 - 32 - - - - - ACR1 - - AConfiguration register 1 - 0x4 - 32 - read-write - 0x00000040 - - - MCJDIV - Master clock divider - 20 - 4 - - - NODIV - No divider - 19 - 1 - - - DMAEN - DMA enable - 17 - 1 - - - SAIAEN - Audio block A enable - 16 - 1 - - - OutDri - Output drive - 13 - 1 - - - MONO - Mono mode - 12 - 1 - - - SYNCEN - Synchronization enable - 10 - 2 - - - CKSTR - Clock strobing edge - 9 - 1 - - - LSBFIRST - Least significant bit - first - 8 - 1 - - - DS - Data size - 5 - 3 - - - PRTCFG - Protocol configuration - 2 - 2 - - - MODE - Audio block mode - 0 - 2 - - - - - ACR2 - - AConfiguration register 2 - 0x8 - 32 - read-write - 0x00000000 - - - COMP - Companding mode - 14 - 2 - - - CPL - Complement bit - 13 - 1 - - - MUTECN - Mute counter - 7 - 6 - - - MUTEVAL - Mute value - 6 - 1 - - - MUTE - Mute - 5 - 1 - - - TRIS - Tristate management on data - line - 4 - 1 - - - FFLUS - FIFO flush - 3 - 1 - - - FTH - FIFO threshold - 0 - 3 - - - - - AFRCR - - AFRCR - 0xc - 32 - read-write - 0x00000007 - - - FSOFF - Frame synchronization - offset - 18 - 1 - - - FSPOL - Frame synchronization - polarity - 17 - 1 - - - FSDEF - Frame synchronization - definition - 16 - 1 - - - FSALL - Frame synchronization active level - length - 8 - 7 - - - FRL - Frame length - 0 - 8 - - - - - ASLOTR - - ASlot register - 0x10 - 32 - read-write - 0x00000000 - - - SLOTEN - Slot enable - 16 - 16 - - - NBSLOT - Number of slots in an audio - frame - 8 - 4 - - - SLOTSZ - Slot size - 6 - 2 - - - FBOFF - First bit offset - 0 - 5 - - - - - AIM - - AInterrupt mask register2 - 0x14 - 32 - read-write - 0x00000000 - - - LFSDET - Late frame synchronization detection - interrupt enable - 6 - 1 - - - AFSDETIE - Anticipated frame synchronization - detection interrupt enable - 5 - 1 - - - CNRDYIE - Codec not ready interrupt - enable - 4 - 1 - - - FREQIE - FIFO request interrupt - enable - 3 - 1 - - - WCKCFG - Wrong clock configuration interrupt - enable - 2 - 1 - - - MUTEDET - Mute detection interrupt - enable - 1 - 1 - - - OVRUDRIE - Overrun/underrun interrupt - enable - 0 - 1 - - - - - ASR - - AStatus register - 0x18 - 32 - read-write - 0x00000000 - - - FLVL - FIFO level threshold - 16 - 3 - - - LFSDET - Late frame synchronization - detection - 6 - 1 - - - AFSDET - Anticipated frame synchronization - detection - 5 - 1 - - - CNRDY - Codec not ready - 4 - 1 - - - FREQ - FIFO request - 3 - 1 - - - WCKCFG - Wrong clock configuration flag. This bit - is read only. - 2 - 1 - - - MUTEDET - Mute detection - 1 - 1 - - - OVRUDR - Overrun / underrun - 0 - 1 - - - - - ACLRFR - - AClear flag register - 0x1c - 32 - read-write - 0x00000000 - - - LFSDET - Clear late frame synchronization - detection flag - 6 - 1 - - - CAFSDET - Clear anticipated frame synchronization - detection flag. - 5 - 1 - - - CNRDY - Clear codec not ready flag - 4 - 1 - - - WCKCFG - Clear wrong clock configuration - flag - 2 - 1 - - - MUTEDET - Mute detection flag - 1 - 1 - - - OVRUDR - Clear overrun / underrun - 0 - 1 - - - - - ADR - - AData register - 0x20 - 32 - read-write - 0x00000000 - - - DATA - Data - 0 - 32 - - - - - - - DMA2D - DMA2D controller - DMA2D - 0x4002b000 - - 0x0 - 0xc00 - registers - - - DMA2D - DMA2D global interrupt - 90 - - - - CR - - control register - 0x0 - 32 - read-write - 0x00000000 - - - MODE - DMA2D mode - 16 - 2 - - - CEIE - Configuration Error Interrupt - Enable - 13 - 1 - - - CTCIE - CLUT transfer complete interrupt - enable - 12 - 1 - - - CAEIE - CLUT access error interrupt - enable - 11 - 1 - - - TWIE - Transfer watermark interrupt - enable - 10 - 1 - - - TCIE - Transfer complete interrupt - enable - 9 - 1 - - - TEIE - Transfer error interrupt - enable - 8 - 1 - - - ABORT - Abort - 2 - 1 - - - SUSP - Suspend - 1 - 1 - - - START - Start - 0 - 1 - - - - - ISR - - Interrupt Status Register - 0x4 - 32 - read-only - 0x00000000 - - - CEIF - Configuration error interrupt - flag - 5 - 1 - - - CTCIF - CLUT transfer complete interrupt - flag - 4 - 1 - - - CAEIF - CLUT access error interrupt - flag - 3 - 1 - - - TWIF - Transfer watermark interrupt - flag - 2 - 1 - - - TCIF - Transfer complete interrupt - flag - 1 - 1 - - - TEIF - Transfer error interrupt - flag - 0 - 1 - - - - - IFCR - - interrupt flag clear register - 0x8 - 32 - read-write - 0x00000000 - - - CCEIF - Clear configuration error interrupt - flag - 5 - 1 - - - CCTCIF - Clear CLUT transfer complete interrupt - flag - 4 - 1 - - - CAECIF - Clear CLUT access error interrupt - flag - 3 - 1 - - - CTWIF - Clear transfer watermark interrupt - flag - 2 - 1 - - - CTCIF - Clear transfer complete interrupt - flag - 1 - 1 - - - CTEIF - Clear Transfer error interrupt - flag - 0 - 1 - - - - - FGMAR - - foreground memory address - register - 0xc - 32 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - FGOR - - foreground offset register - 0x10 - 32 - read-write - 0x00000000 - - - LO - Line offset - 0 - 14 - - - - - BGMAR - - background memory address - register - 0x14 - 32 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - BGOR - - background offset register - 0x18 - 32 - read-write - 0x00000000 - - - LO - Line offset - 0 - 14 - - - - - FGPFCCR - - foreground PFC control - register - 0x1c - 32 - read-write - 0x00000000 - - - ALPHA - Alpha value - 24 - 8 - - - AM - Alpha mode - 16 - 2 - - - CS - CLUT size - 8 - 8 - - - START - Start - 5 - 1 - - - CCM - CLUT color mode - 4 - 1 - - - CM - Color mode - 0 - 4 - - - - - FGCOLR - - foreground color register - 0x20 - 32 - read-write - 0x00000000 - - - RED - Red Value - 16 - 8 - - - GREEN - Green Value - 8 - 8 - - - BLUE - Blue Value - 0 - 8 - - - - - BGPFCCR - - background PFC control - register - 0x24 - 32 - read-write - 0x00000000 - - - ALPHA - Alpha value - 24 - 8 - - - AM - Alpha mode - 16 - 2 - - - CS - CLUT size - 8 - 8 - - - START - Start - 5 - 1 - - - CCM - CLUT Color mode - 4 - 1 - - - CM - Color mode - 0 - 4 - - - - - BGCOLR - - background color register - 0x28 - 32 - read-write - 0x00000000 - - - RED - Red Value - 16 - 8 - - - GREEN - Green Value - 8 - 8 - - - BLUE - Blue Value - 0 - 8 - - - - - FGCMAR - - foreground CLUT memory address - register - 0x2c - 32 - read-write - 0x00000000 - - - MA - Memory Address - 0 - 32 - - - - - BGCMAR - - background CLUT memory address - register - 0x30 - 32 - read-write - 0x00000000 - - - MA - Memory address - 0 - 32 - - - - - OPFCCR - - output PFC control register - 0x34 - 32 - read-write - 0x00000000 - - - CM - Color mode - 0 - 3 - - - - - OCOLR - - output color register - 0x38 - 32 - read-write - 0x00000000 - - - APLHA - Alpha Channel Value - 24 - 8 - - - RED - Red Value - 16 - 8 - - - GREEN - Green Value - 8 - 8 - - - BLUE - Blue Value - 0 - 8 - - - - - OMAR - - output memory address register - 0x3c - 32 - read-write - 0x00000000 - - - MA - Memory Address - 0 - 32 - - - - - OOR - - output offset register - 0x40 - 32 - read-write - 0x00000000 - - - LO - Line Offset - 0 - 14 - - - - - NLR - - number of line register - 0x44 - 32 - read-write - 0x00000000 - - - PL - Pixel per lines - 16 - 14 - - - NL - Number of lines - 0 - 16 - - - - - LWR - - line watermark register - 0x48 - 32 - read-write - 0x00000000 - - - LW - Line watermark - 0 - 16 - - - - - AMTCR - - AHB master timer configuration - register - 0x4c - 32 - read-write - 0x00000000 - - - DT - Dead Time - 8 - 8 - - - EN - Enable - 0 - 1 - - - - - FGCLUT - - FGCLUT - 0x400 - 32 - read-write - 0x00000000 - - - APLHA - APLHA - 24 - 8 - - - RED - RED - 16 - 8 - - - GREEN - GREEN - 8 - 8 - - - BLUE - BLUE - 0 - 8 - - - - - BGCLUT - - BGCLUT - 0x800 - 32 - read-write - 0x00000000 - - - APLHA - APLHA - 24 - 8 - - - RED - RED - 16 - 8 - - - GREEN - GREEN - 8 - 8 - - - BLUE - BLUE - 0 - 8 - - - - - - - PWR - Power control - PWR - 0x40007000 - - 0x0 - 0x400 - registers - - - PVD - PVD through EXTI line detection - interrupt - 1 - - - - CR - - power control register - 0x0 - 32 - read-write - 0x0000c000 - - - LPDS - Low-power deep sleep - 0 - 1 - - - PDDS - Power down deepsleep - 1 - 1 - - - CWUF - Clear wakeup flag - 2 - 1 - - - CSBF - Clear standby flag - 3 - 1 - - - PVDE - Power voltage detector - enable - 4 - 1 - - - PLS - PVD level selection - 5 - 3 - - - DBP - Disable backup domain write - protection - 8 - 1 - - - FPDS - Flash power down in Stop - mode - 9 - 1 - - - LPUDS - Low-Power Regulator Low Voltage in - deepsleep - 10 - 1 - - - MRUDS - Main regulator low voltage in deepsleep - mode - 11 - 1 - - - ADCDC1 - ADCDC1 - 13 - 1 - - - VOS - Regulator voltage scaling output - selection - 14 - 2 - - - ODEN - Over-drive enable - 16 - 1 - - - ODSWEN - Over-drive switching - enabled - 17 - 1 - - - UDEN - Under-drive enable in stop - mode - 18 - 2 - - - - - CSR - - power control/status register - 0x4 - 32 - 0x00000000 - - - WUF - Wakeup flag - 0 - 1 - read-only - - - SBF - Standby flag - 1 - 1 - read-only - - - PVDO - PVD output - 2 - 1 - read-only - - - BRR - Backup regulator ready - 3 - 1 - read-only - - - EWUP - Enable WKUP pin - 8 - 1 - read-write - - - BRE - Backup regulator enable - 9 - 1 - read-write - - - VOSRDY - Regulator voltage scaling output - selection ready bit - 14 - 1 - read-write - - - ODRDY - Over-drive mode ready - 16 - 1 - read-only - - - ODSWRDY - Over-drive mode switching - ready - 17 - 1 - read-only - - - UDRDY - Under-drive ready flag - 18 - 2 - read-write - - - - - - - diff --git a/normalise.sh b/examples/normalise.sh similarity index 100% rename from normalise.sh rename to examples/normalise.sh From 480c796e900237d69eda09e7082b0c30ed942a77 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Fri, 22 Sep 2017 11:32:31 +1200 Subject: [PATCH 22/25] Refactored out try! macro and renamed to avoid confusion with rust std try --- src/access.rs | 10 ++------- src/addressblock.rs | 17 +++++++-------- src/bitrange.rs | 22 +++++++------------- src/cluster.rs | 1 + src/clusterinfo.rs | 22 ++++++++------------ src/cpu.rs | 25 +++++++++------------- src/defaults.rs | 14 ++++--------- src/device.rs | 20 +++++++----------- src/elementext.rs | 34 ++++++++++++++++++++++++++++++ src/endian.rs | 10 ++------- src/enumeratedvalue.rs | 17 +++++++-------- src/enumeratedvalues.rs | 6 ++++-- src/field.rs | 13 +++++------- src/interrupt.rs | 15 ++++++------- src/lib.rs | 37 +++++---------------------------- src/parse.rs | 13 ++++-------- src/peripheral.rs | 12 ++++------- src/register.rs | 3 +++ src/registerarrayinfo.rs | 16 ++++++-------- src/registercluster.rs | 3 ++- src/registerclusterarrayinfo.rs | 22 ++++++-------------- src/registerinfo.rs | 23 +++++++++----------- src/usage.rs | 9 ++------ src/writeconstraint.rs | 17 ++++++--------- src/writeconstraintrange.rs | 13 +++++------- 25 files changed, 160 insertions(+), 234 deletions(-) create mode 100644 src/elementext.rs diff --git a/src/access.rs b/src/access.rs index b43d6ceb..d930b327 100644 --- a/src/access.rs +++ b/src/access.rs @@ -6,12 +6,6 @@ use xmltree::Element; use helpers::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} - #[derive(Clone, Copy, Debug, PartialEq)] pub enum Access { ReadOnly, @@ -23,7 +17,7 @@ pub enum Access { impl ParseElem for Access { fn parse(tree: &Element) -> Access { - let text = try!(tree.text.as_ref()); + let text = try_get_child!(tree.text.as_ref()); match &text[..] { "read-only" => Access::ReadOnly, @@ -82,7 +76,7 @@ mod tests { ]; for (a, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let access = Access::parse(tree1); assert_eq!(access, a, "Parsing `{}` expected `{:?}`", s, a); let tree2 = &access.encode(); diff --git a/src/addressblock.rs b/src/addressblock.rs index 42ab8c93..cb49faae 100644 --- a/src/addressblock.rs +++ b/src/addressblock.rs @@ -4,15 +4,12 @@ use std::collections::HashMap; use xmltree::Element; -use ElementExt; +#[macro_use] +use elementext::*; + use helpers::*; use parse; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Debug, PartialEq)] pub struct AddressBlock { @@ -24,9 +21,9 @@ pub struct AddressBlock { impl ParseElem for AddressBlock { fn parse(tree: &Element) -> AddressBlock { AddressBlock { - offset: try!(parse::u32(try!(tree.get_child("offset")))), - size: try!(parse::u32(try!(tree.get_child("size")))), - usage: try!(tree.get_child_text("usage")), + offset: try_get_child!(parse::u32(try_get_child!(tree.get_child("offset")))), + size: try_get_child!(parse::u32(try_get_child!(tree.get_child("size")))), + usage: try_get_child!(tree.get_child_text("usage")), } } } @@ -70,7 +67,7 @@ mod tests { ]; for (a, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let v = AddressBlock::parse(tree1); assert_eq!(v, a, "Parsing `{}` expected `{:?}`", s, a); let tree2 = &v.encode(); diff --git a/src/bitrange.rs b/src/bitrange.rs index c93b48af..682b8ff2 100644 --- a/src/bitrange.rs +++ b/src/bitrange.rs @@ -5,12 +5,6 @@ use xmltree::Element; use helpers::*; use parse; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} - #[derive(Clone, Copy, Debug, PartialEq)] pub enum BitRangeType { BitRange, @@ -29,7 +23,7 @@ pub struct BitRange { impl ParseElem for BitRange { fn parse(tree: &Element) -> BitRange { let (end, start, range_type): (u32, u32, BitRangeType) = if let Some(range) = tree.get_child("bitRange") { - let text = try!(range.text.as_ref()); + let text = try_get_child!(range.text.as_ref()); assert!(text.starts_with('[')); assert!(text.ends_with(']')); @@ -37,20 +31,20 @@ impl ParseElem for BitRange { let mut parts = text[1..text.len() - 1].split(':'); ( - try!(try!(parts.next()).parse()), - try!(try!(parts.next()).parse()), + try_get_child!(try_get_child!(parts.next()).parse()), + try_get_child!(try_get_child!(parts.next()).parse()), BitRangeType::BitRange, ) } else if let (Some(lsb), Some(msb)) = (tree.get_child("lsb"), tree.get_child("msb")) { ( - try!(parse::u32(msb)), - try!(parse::u32(lsb)), + try_get_child!(parse::u32(msb)), + try_get_child!(parse::u32(lsb)), BitRangeType::MsbLsb, ) } else { return BitRange { - offset: try!(parse::u32(try!(tree.get_child("bitOffset")))), - width: try!(parse::u32(try!(tree.get_child("bitWidth")))), + offset: try_get_child!(parse::u32(try_get_child!(tree.get_child("bitOffset")))), + width: try_get_child!(parse::u32(try_get_child!(tree.get_child("bitWidth")))), range_type: BitRangeType::OffsetWidth, }; }; @@ -142,7 +136,7 @@ mod tests { ]; for (a, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let value = BitRange::parse(tree1); assert_eq!(value, a, "Parsing `{}` expected `{:?}`", s, a); let mut tree2 = new_element("fake", None); diff --git a/src/cluster.rs b/src/cluster.rs index b2d60f85..17e13433 100644 --- a/src/cluster.rs +++ b/src/cluster.rs @@ -5,6 +5,7 @@ use std::collections::hash_map::*; use xmltree::Element; + use helpers::*; use clusterinfo::*; use registerclusterarrayinfo::*; diff --git a/src/clusterinfo.rs b/src/clusterinfo.rs index 8666cd09..5f0ff2aa 100644 --- a/src/clusterinfo.rs +++ b/src/clusterinfo.rs @@ -4,7 +4,8 @@ extern crate either; use xmltree::Element; use either::Either; -use ElementExt; + +#[macro_use] use elementext::*; use helpers::*; use parse; @@ -13,11 +14,6 @@ use register::*; use cluster::*; use registercluster::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Debug, PartialEq)] pub struct ClusterInfo { @@ -37,16 +33,16 @@ pub struct ClusterInfo { impl ParseElem for ClusterInfo { fn parse(tree: &Element) -> ClusterInfo { ClusterInfo { - name: try!(tree.get_child_text("name")), - description: try!(tree.get_child_text("description")), - header_struct_name: try!(tree.get_child_text("headerStructName")), + name: try_get_child!(tree.get_child_text("name")), + description: try_get_child!(tree.get_child_text("description")), + header_struct_name: try_get_child!(tree.get_child_text("headerStructName")), address_offset: { - try!(parse::u32(try!(tree.get_child("addressOffset")))) + try_get_child!(parse::u32(try_get_child!(tree.get_child("addressOffset")))) }, - size: tree.get_child("size").map(|t| try!(parse::u32(t))), + size: tree.get_child("size").map(|t| try_get_child!(parse::u32(t))), access: tree.get_child("access").map(Access::parse), - reset_value: tree.get_child("resetValue").map(|t| try!(parse::u32(t))), - reset_mask: tree.get_child("resetMask").map(|t| try!(parse::u32(t))), + reset_value: tree.get_child("resetValue").map(|t| try_get_child!(parse::u32(t))), + reset_mask: tree.get_child("resetMask").map(|t| try_get_child!(parse::u32(t))), children: tree.children .iter() .filter(|t| t.name == "register" || t.name == "cluster") diff --git a/src/cpu.rs b/src/cpu.rs index c72e1c49..80459884 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -4,17 +4,12 @@ use std::collections::HashMap; use xmltree::Element; -use ElementExt; +#[macro_use] +use elementext::*; use parse; use helpers::*; use endian::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} - #[derive(Clone, Debug, PartialEq)] pub struct Cpu { pub name: String, @@ -42,13 +37,13 @@ impl ParseElem for Cpu { assert_eq!(tree.name, "cpu"); Cpu { - name: try!(tree.get_child_text("name")), - revision: try!(tree.get_child_text("revision")), - endian: Endian::parse(try!(tree.get_child("endian"))), - mpu_present: try!(parse::bool(try!(tree.get_child("mpuPresent")))), - fpu_present: try!(parse::bool(try!(tree.get_child("fpuPresent")))), - nvic_priority_bits: try!(parse::u32(try!(tree.get_child("nvicPrioBits")))), - has_vendor_systick: try!(parse::bool(try!(tree.get_child("vendorSystickConfig")))), + name: try_get_child!(tree.get_child_text("name")), + revision: try_get_child!(tree.get_child_text("revision")), + endian: Endian::parse(try_get_child!(tree.get_child("endian"))), + mpu_present: try_get_child!(parse::bool(try_get_child!(tree.get_child("mpuPresent")))), + fpu_present: try_get_child!(parse::bool(try_get_child!(tree.get_child("fpuPresent")))), + nvic_priority_bits: try_get_child!(parse::u32(try_get_child!(tree.get_child("nvicPrioBits")))), + has_vendor_systick: try_get_child!(parse::bool(try_get_child!(tree.get_child("vendorSystickConfig")))), _extensible: (), } @@ -113,7 +108,7 @@ mod tests { ]; for (a, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let value = Cpu::parse(tree1); assert_eq!(value, a, "Parsing `{}` expected `{:?}`", s, a); let tree2 = value.encode(); diff --git a/src/defaults.rs b/src/defaults.rs index 82bb4457..1611ba5c 100644 --- a/src/defaults.rs +++ b/src/defaults.rs @@ -6,12 +6,6 @@ use helpers::*; use access::*; use parse; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} - /// Register default properties #[derive(Clone, Copy, Debug, PartialEq)] pub struct Defaults { @@ -26,9 +20,9 @@ pub struct Defaults { impl ParseElem for Defaults { fn parse(tree: &Element) -> Defaults { Defaults { - size: tree.get_child("size").map(|t| try!(parse::u32(t))), - reset_value: tree.get_child("resetValue").map(|t| try!(parse::u32(t))), - reset_mask: tree.get_child("resetMask").map(|t| try!(parse::u32(t))), + size: tree.get_child("size").map(|t| try_get_child!(parse::u32(t))), + reset_value: tree.get_child("resetValue").map(|t| try_get_child!(parse::u32(t))), + reset_mask: tree.get_child("resetMask").map(|t| try_get_child!(parse::u32(t))), access: tree.get_child("access").map(Access::parse), _extensible: (), } @@ -96,7 +90,7 @@ mod tests { _extensible: (), }; - let tree1 = &try!(Element::parse(example.as_bytes())); + let tree1 = &try_get_child!(Element::parse(example.as_bytes())); let parsed = Defaults::parse(tree1); assert_eq!(parsed, expected, "Parsing tree failed"); diff --git a/src/device.rs b/src/device.rs index 32f80747..b7b56ddd 100644 --- a/src/device.rs +++ b/src/device.rs @@ -2,18 +2,14 @@ use xmltree::Element; use std::collections::HashMap; +#[macro_use] +use elementext::*; use helpers::*; -use ElementExt; use cpu::*; use defaults::*; use peripheral::*; use parse; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Debug)] pub struct Device { @@ -34,13 +30,13 @@ impl ParseElem for Device { fn parse(tree: &Element) -> Device { Device { schema_version: tree.attributes.get("schemaVersion").unwrap().clone(), - name: try!(tree.get_child_text("name")), - version: try!(tree.get_child_text("version")), - description: try!(tree.get_child_text("description")), - address_unit_bits: try!(parse::u32(try!(tree.get_child("addressUnitBits")))), - width: try!(parse::u32(try!(tree.get_child("width")))), + name: try_get_child!(tree.get_child_text("name")), + version: try_get_child!(tree.get_child_text("version")), + description: try_get_child!(tree.get_child_text("description")), + address_unit_bits: try_get_child!(parse::u32(try_get_child!(tree.get_child("addressUnitBits")))), + width: try_get_child!(parse::u32(try_get_child!(tree.get_child("width")))), cpu: tree.get_child("cpu").map(Cpu::parse), - peripherals: try!(tree.get_child("peripherals")) + peripherals: try_get_child!(tree.get_child("peripherals")) .children .iter() .map(Peripheral::parse) diff --git a/src/elementext.rs b/src/elementext.rs new file mode 100644 index 00000000..b7e8ea49 --- /dev/null +++ b/src/elementext.rs @@ -0,0 +1,34 @@ +extern crate xmltree; + +use xmltree::Element; + +#[macro_export] +macro_rules! try_get_child { + ($e:expr) => { + $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) + } +} + +pub trait ElementExt { + fn get_child_text(&self, k: K) -> Option + where + String: PartialEq; + fn debug(&self); +} + +impl ElementExt for Element { + fn get_child_text(&self, k: K) -> Option + where + String: PartialEq, + { + self.get_child(k).map(|c| try_get_child!(c.text.clone())) + } + + fn debug(&self) { + println!("<{}>", self.name); + for c in &self.children { + println!("{}: {:?}", c.name, c.text) + } + println!("", self.name); + } +} diff --git a/src/endian.rs b/src/endian.rs index 849ca87e..aa1538e8 100644 --- a/src/endian.rs +++ b/src/endian.rs @@ -6,12 +6,6 @@ use xmltree::Element; use helpers::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} - #[derive(Clone, Copy, Debug, PartialEq)] pub enum Endian { Little, @@ -22,7 +16,7 @@ pub enum Endian { impl ParseElem for Endian { fn parse(tree: &Element) -> Endian { - let text = try!(tree.text.as_ref()); + let text = try_get_child!(tree.text.as_ref()); match &text[..] { "little" => Endian::Little, @@ -69,7 +63,7 @@ mod tests { ]; for (e, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let endian = Endian::parse(tree1); assert_eq!(endian, e, "Parsing `{}` expected `{:?}`", s, e); let tree2 = &endian.encode(); diff --git a/src/enumeratedvalue.rs b/src/enumeratedvalue.rs index 42d269f6..ccb4080d 100644 --- a/src/enumeratedvalue.rs +++ b/src/enumeratedvalue.rs @@ -3,16 +3,13 @@ extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -use ElementExt; + +#[macro_use] +use elementext::*; use helpers::*; use parse; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Debug, PartialEq)] pub struct EnumeratedValue { @@ -29,10 +26,10 @@ impl EnumeratedValue { assert_eq!(tree.name, "enumeratedValue"); Some(EnumeratedValue { - name: try!(tree.get_child_text("name")), + name: try_get_child!(tree.get_child_text("name")), description: tree.get_child_text("description"), - value: tree.get_child("value").map(|t| try!(parse::u32(t))), - is_default: tree.get_child_text("isDefault").map(|t| try!(t.parse())), + value: tree.get_child("value").map(|t| try_get_child!(parse::u32(t))), + is_default: tree.get_child_text("isDefault").map(|t| try_get_child!(t.parse())), _extensible: (), }) } @@ -106,7 +103,7 @@ mod tests { _extensible: (), }; - let tree1 = &try!(Element::parse(example.as_bytes())); + let tree1 = &try_get_child!(Element::parse(example.as_bytes())); let parsed = EnumeratedValue::parse(tree1).unwrap(); assert_eq!(parsed, expected, "Parsing tree failed"); diff --git a/src/enumeratedvalues.rs b/src/enumeratedvalues.rs index 2dc4f53c..6f5befa5 100644 --- a/src/enumeratedvalues.rs +++ b/src/enumeratedvalues.rs @@ -3,7 +3,9 @@ extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -use ElementExt; + +#[macro_use] +use elementext::*; use helpers::*; use usage::*; @@ -137,7 +139,7 @@ mod tests { _extensible: (), }; - let tree1 = &try!(Element::parse(example.as_bytes())); + let tree1 = &try_get_child!(Element::parse(example.as_bytes())); let parsed = EnumeratedValues::parse(tree1); assert_eq!(parsed, expected, "Parsing tree failed"); diff --git a/src/field.rs b/src/field.rs index 5b0b2540..939062b6 100644 --- a/src/field.rs +++ b/src/field.rs @@ -2,7 +2,9 @@ extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -use ElementExt; + +#[macro_use] +use elementext::*; use helpers::*; use access::*; @@ -10,11 +12,6 @@ use writeconstraint::*; use bitrange::*; use enumeratedvalues::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Debug, PartialEq)] pub struct Field { @@ -33,7 +30,7 @@ impl ParseElem for Field { assert_eq!(tree.name, "field"); Field { - name: try!(tree.get_child_text("name")), + name: try_get_child!(tree.get_child_text("name")), description: tree.get_child_text("description"), bit_range: BitRange::parse(tree), access: tree.get_child("access").map(Access::parse), @@ -150,7 +147,7 @@ mod tests { ]; for (a, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let v = Field::parse(tree1); assert_eq!(v, a, "Parsing `{}` expected `{:?}`", s, a); let tree2 = &v.encode(); diff --git a/src/interrupt.rs b/src/interrupt.rs index 812d4b04..1aa267e8 100644 --- a/src/interrupt.rs +++ b/src/interrupt.rs @@ -4,15 +4,12 @@ use std::collections::HashMap; use xmltree::Element; -use ElementExt; +#[macro_use] +use elementext::*; + use helpers::*; use parse; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Debug, PartialEq)] @@ -25,9 +22,9 @@ pub struct Interrupt { impl ParseElem for Interrupt { fn parse(tree: &Element) -> Interrupt { Interrupt { - name: try!(tree.get_child_text("name")), + name: try_get_child!(tree.get_child_text("name")), description: tree.get_child_text("description"), - value: try!(parse::u32(try!(tree.get_child("value")))), + value: try_get_child!(parse::u32(try_get_child!(tree.get_child("value")))), } } } @@ -72,7 +69,7 @@ mod tests { ]; for (a, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let v = Interrupt::parse(tree1); assert_eq!(v, a, "Parsing `{}` expected `{:?}`", s, a); let tree2 = &v.encode(); diff --git a/src/lib.rs b/src/lib.rs index 1858509e..792b9d40 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -28,8 +28,11 @@ extern crate either; extern crate xmltree; use xmltree::Element; - +#[macro_use] +mod elementext; +use elementext::*; mod parse; + mod helpers; use helpers::*; mod endian; @@ -76,16 +79,10 @@ pub use cpu::*; mod device; pub use device::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} - /// Parses the contents of a SVD file (XML) pub fn parse(xml: &str) -> Device { - let tree = &try!(Element::parse(xml.as_bytes())); + let tree = &try_get_child!(Element::parse(xml.as_bytes())); Device::parse(tree) } @@ -93,30 +90,6 @@ pub fn encode(device: &Device) -> Element { device.encode() } -trait ElementExt { - fn get_child_text(&self, k: K) -> Option - where - String: PartialEq; - fn debug(&self); -} - -impl ElementExt for Element { - fn get_child_text(&self, k: K) -> Option - where - String: PartialEq, - { - self.get_child(k).map(|c| try!(c.text.clone())) - } - - fn debug(&self) { - println!("<{}>", self.name); - for c in &self.children { - println!("{}: {:?}", c.name, c.text) - } - println!("", self.name); - } -} - #[cfg(test)] mod tests { diff --git a/src/parse.rs b/src/parse.rs index 5ba329e2..2f9eb95a 100644 --- a/src/parse.rs +++ b/src/parse.rs @@ -1,13 +1,8 @@ use xmltree::Element; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} pub fn u32(tree: &Element) -> Option { - let text = try!(tree.text.as_ref()); + let text = try_get_child!(tree.text.as_ref()); if text.starts_with("0x") || text.starts_with("0X") { u32::from_str_radix(&text["0x".len()..], 16).ok() @@ -22,7 +17,7 @@ pub fn u32(tree: &Element) -> Option { } pub fn bool(tree: &Element) -> Option { - let text = try!(tree.text.as_ref()); + let text = try_get_child!(tree.text.as_ref()); match text.as_ref() { "0" => Some(false), "1" => Some(true), @@ -33,8 +28,8 @@ pub fn bool(tree: &Element) -> Option { pub fn dim_index(text: &str) -> Vec { if text.contains('-') { let mut parts = text.splitn(2, '-'); - let start = try!(try!(parts.next()).parse::()); - let end = try!(try!(parts.next()).parse::()) + 1; + let start = try_get_child!(try_get_child!(parts.next()).parse::()); + let end = try_get_child!(try_get_child!(parts.next()).parse::()) + 1; (start..end).map(|i| i.to_string()).collect() } else if text.contains(',') { diff --git a/src/peripheral.rs b/src/peripheral.rs index d9367960..f3449055 100644 --- a/src/peripheral.rs +++ b/src/peripheral.rs @@ -7,7 +7,8 @@ use std::ops::Deref; use xmltree::Element; use either::Either; -use ElementExt; +#[macro_use] +use elementext::*; use parse; use helpers::*; @@ -17,11 +18,6 @@ use cluster::*; use addressblock::*; use registercluster::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Debug)] pub struct Peripheral { @@ -45,12 +41,12 @@ impl ParseElem for Peripheral { assert_eq!(tree.name, "peripheral"); Peripheral { - name: try!(tree.get_child_text("name")), + name: try_get_child!(tree.get_child_text("name")), version: tree.get_child_text("version"), display_name: tree.get_child_text("displayName"), group_name: tree.get_child_text("groupName"), description: tree.get_child_text("description"), - base_address: try!(parse::u32(try!(tree.get_child("baseAddress")))), + base_address: try_get_child!(parse::u32(try_get_child!(tree.get_child("baseAddress")))), address_block: tree.get_child("addressBlock").map(AddressBlock::parse), interrupt: tree.children .iter() diff --git a/src/register.rs b/src/register.rs index 5f967f1c..e82ab8e8 100644 --- a/src/register.rs +++ b/src/register.rs @@ -4,6 +4,9 @@ use std::ops::Deref; use xmltree::Element; +#[macro_use] +use elementext::*; + use helpers::*; use registerinfo::*; use registerarrayinfo::*; diff --git a/src/registerarrayinfo.rs b/src/registerarrayinfo.rs index c9e5949a..abe41c7b 100644 --- a/src/registerarrayinfo.rs +++ b/src/registerarrayinfo.rs @@ -3,17 +3,13 @@ extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -use ElementExt; + +#[macro_use] +use elementext::*; use parse; use helpers::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} - #[derive(Clone, Debug)] pub struct RegisterArrayInfo { pub dim: u32, @@ -24,10 +20,10 @@ pub struct RegisterArrayInfo { impl ParseElem for RegisterArrayInfo { fn parse(tree: &Element) -> RegisterArrayInfo { RegisterArrayInfo { - dim: try!(tree.get_child_text("dim").unwrap().parse::()), - dim_increment: try!(tree.get_child("dimIncrement").map(|t| try!(parse::u32(t)))), + dim: try_get_child!(tree.get_child_text("dim").unwrap().parse::()), + dim_increment: try_get_child!(tree.get_child("dimIncrement").map(|t| try_get_child!(parse::u32(t)))), dim_index: tree.get_child("dimIndex").map(|c| { - parse::dim_index(try!(c.text.as_ref())) + parse::dim_index(try_get_child!(c.text.as_ref())) }), } } diff --git a/src/registercluster.rs b/src/registercluster.rs index 45bc79ba..b6d95df8 100644 --- a/src/registercluster.rs +++ b/src/registercluster.rs @@ -4,7 +4,8 @@ extern crate either; use xmltree::Element; use either::Either; -use ElementExt; +#[macro_use] +use elementext::*; use helpers::*; use register::*; diff --git a/src/registerclusterarrayinfo.rs b/src/registerclusterarrayinfo.rs index f6e1c0ec..cc743544 100644 --- a/src/registerclusterarrayinfo.rs +++ b/src/registerclusterarrayinfo.rs @@ -1,24 +1,14 @@ extern crate xmltree; extern crate either; -use std::ops::Deref; - use xmltree::Element; -use either::Either; -use ElementExt; +#[macro_use] +use elementext::*; use helpers::*; -use register::*; -use cluster::*; use parse; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} - #[derive(Clone, Debug, PartialEq)] pub struct RegisterClusterArrayInfo { @@ -30,12 +20,12 @@ pub struct RegisterClusterArrayInfo { impl ParseElem for RegisterClusterArrayInfo { fn parse(tree: &Element) -> RegisterClusterArrayInfo { RegisterClusterArrayInfo { - dim: try!(tree.get_child_text("dim").unwrap().parse::()), - dim_increment: try!(tree.get_child("dimIncrement").map(|t| { - try!(parse::u32(t)) + dim: try_get_child!(tree.get_child_text("dim").unwrap().parse::()), + dim_increment: try_get_child!(tree.get_child("dimIncrement").map(|t| { + try_get_child!(parse::u32(t)) })), dim_index: tree.get_child("dimIndex").map(|c| { - parse::dim_index(try!(c.text.as_ref())) + parse::dim_index(try_get_child!(c.text.as_ref())) }), } } diff --git a/src/registerinfo.rs b/src/registerinfo.rs index 019e7b91..7c152b01 100644 --- a/src/registerinfo.rs +++ b/src/registerinfo.rs @@ -3,7 +3,9 @@ extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -use ElementExt; + +#[macro_use] +use elementext::*; use helpers::*; use access::*; @@ -11,11 +13,6 @@ use parse; use Field; use writeconstraint::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Debug, PartialEq)] pub struct RegisterInfo { @@ -36,15 +33,15 @@ pub struct RegisterInfo { impl ParseElem for RegisterInfo { fn parse(tree: &Element) -> RegisterInfo { RegisterInfo { - name: try!(tree.get_child_text("name")), - description: try!(tree.get_child_text("description")), + name: try_get_child!(tree.get_child_text("name")), + description: try_get_child!(tree.get_child_text("description")), address_offset: { - try!(parse::u32(try!(tree.get_child("addressOffset")))) + try_get_child!(parse::u32(try_get_child!(tree.get_child("addressOffset")))) }, - size: tree.get_child("size").map(|t| try!(parse::u32(t))), + size: tree.get_child("size").map(|t| try_get_child!(parse::u32(t))), access: tree.get_child("access").map(Access::parse), - reset_value: tree.get_child("resetValue").map(|t| try!(parse::u32(t))), - reset_mask: tree.get_child("resetMask").map(|t| try!(parse::u32(t))), + reset_value: tree.get_child("resetValue").map(|t| try_get_child!(parse::u32(t))), + reset_mask: tree.get_child("resetMask").map(|t| try_get_child!(parse::u32(t))), fields: tree.get_child("fields").map(|fs| { fs.children.iter().map(Field::parse).collect() }), @@ -194,7 +191,7 @@ mod tests { ]; for (a, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let v = RegisterInfo::parse(tree1); assert_eq!(v, a, "Parsing `{}` expected `{:?}`", s, a); let tree2 = &v.encode(); diff --git a/src/usage.rs b/src/usage.rs index ed1feba5..e5c93c0c 100644 --- a/src/usage.rs +++ b/src/usage.rs @@ -6,11 +6,6 @@ use xmltree::Element; use helpers::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Copy, Debug, Eq, PartialEq)] pub enum Usage { @@ -21,7 +16,7 @@ pub enum Usage { impl ParseElem for Usage { fn parse(tree: &Element) -> Usage { - let text = try!(tree.text.as_ref()); + let text = try_get_child!(tree.text.as_ref()); match &text[..] { "read" => Usage::Read, @@ -62,7 +57,7 @@ mod tests { ]; for (e, s) in types { - let tree1 = &try!(Element::parse(s.as_bytes())); + let tree1 = &try_get_child!(Element::parse(s.as_bytes())); let elem = Usage::parse(tree1); assert_eq!(elem, e, "Parsing `{}` expected `{:?}`", s, e); let tree2 = &elem.encode(); diff --git a/src/writeconstraint.rs b/src/writeconstraint.rs index be3e539a..311d5af1 100644 --- a/src/writeconstraint.rs +++ b/src/writeconstraint.rs @@ -8,11 +8,6 @@ use parse; use helpers::*; use writeconstraintrange::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Copy, Debug, PartialEq)] pub enum WriteConstraint { @@ -28,17 +23,17 @@ impl ParseElem for WriteConstraint { // Write constraint can only be one of the following match field.as_ref() { "writeAsRead" => { - WriteConstraint::WriteAsRead(try!( - tree.get_child(field.as_ref()).map(|t| try!(parse::bool(t))) + WriteConstraint::WriteAsRead(try_get_child!( + tree.get_child(field.as_ref()).map(|t| try_get_child!(parse::bool(t))) )) } "useEnumeratedValues" => { - WriteConstraint::UseEnumeratedValues(try!( - tree.get_child(field.as_ref()).map(|t| try!(parse::bool(t))) + WriteConstraint::UseEnumeratedValues(try_get_child!( + tree.get_child(field.as_ref()).map(|t| try_get_child!(parse::bool(t))) )) } "range" => { - WriteConstraint::Range(try!(tree.get_child(field.as_ref()).map( + WriteConstraint::Range(try_get_child!(tree.get_child(field.as_ref()).map( WriteConstraintRange::parse, ))) } @@ -83,7 +78,7 @@ mod tests { ]; for (example, expected) in examples { - let tree1 = &try!(Element::parse(example.as_bytes())); + let tree1 = &try_get_child!(Element::parse(example.as_bytes())); let parsed = WriteConstraint::parse(tree1); assert_eq!(parsed, expected, "Parsing tree failed"); diff --git a/src/writeconstraintrange.rs b/src/writeconstraintrange.rs index 10ed6285..2f54bca5 100644 --- a/src/writeconstraintrange.rs +++ b/src/writeconstraintrange.rs @@ -3,15 +3,12 @@ extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -use ElementExt; + +#[macro_use] +use elementext::*; use helpers::*; -macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } -} #[derive(Clone, Copy, Debug, PartialEq)] pub struct WriteConstraintRange { @@ -22,8 +19,8 @@ pub struct WriteConstraintRange { impl ParseElem for WriteConstraintRange { fn parse(tree: &Element) -> WriteConstraintRange { WriteConstraintRange { - min: try!(try!(tree.get_child_text("minimum")).parse()), - max: try!(try!(tree.get_child_text("maximum")).parse()), + min: try_get_child!(try_get_child!(tree.get_child_text("minimum")).parse()), + max: try_get_child!(try_get_child!(tree.get_child_text("maximum")).parse()), } } } From cdbb7977243c835c82fad58f066e46fd5c3b458c Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Sat, 23 Sep 2017 15:04:36 +1200 Subject: [PATCH 23/25] Fixed PartialEq error, moved _extensible to pub(crate) --- src/clusterinfo.rs | 2 +- src/cpu.rs | 2 +- src/defaults.rs | 2 +- src/device.rs | 2 +- src/enumeratedvalue.rs | 2 +- src/enumeratedvalues.rs | 2 +- src/field.rs | 2 +- src/peripheral.rs | 8 ++++---- src/register.rs | 4 ++-- src/registerarrayinfo.rs | 2 +- src/registerinfo.rs | 2 +- 11 files changed, 15 insertions(+), 15 deletions(-) diff --git a/src/clusterinfo.rs b/src/clusterinfo.rs index 5f0ff2aa..7dd97dbb 100644 --- a/src/clusterinfo.rs +++ b/src/clusterinfo.rs @@ -27,7 +27,7 @@ pub struct ClusterInfo { pub reset_mask: Option, pub children: Vec>, // Reserve the right to add more fields to this struct - _extensible: (), + pub(crate) _extensible: (), } impl ParseElem for ClusterInfo { diff --git a/src/cpu.rs b/src/cpu.rs index 80459884..338bae16 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -21,7 +21,7 @@ pub struct Cpu { pub has_vendor_systick: bool, // Reserve the right to add more fields to this struct - pub _extensible: (), + pub(crate) _extensible: (), } impl Cpu { diff --git a/src/defaults.rs b/src/defaults.rs index 1611ba5c..1918261d 100644 --- a/src/defaults.rs +++ b/src/defaults.rs @@ -14,7 +14,7 @@ pub struct Defaults { pub reset_mask: Option, pub access: Option, // Reserve the right to add more fields to this struct - _extensible: (), + pub(crate) _extensible: (), } impl ParseElem for Defaults { diff --git a/src/device.rs b/src/device.rs index b7b56ddd..87d0f99e 100644 --- a/src/device.rs +++ b/src/device.rs @@ -23,7 +23,7 @@ pub struct Device { pub peripherals: Vec, pub defaults: Defaults, // Reserve the right to add more fields to this struct - _extensible: (), + pub(crate) _extensible: (), } impl ParseElem for Device { diff --git a/src/enumeratedvalue.rs b/src/enumeratedvalue.rs index ccb4080d..d1b6f968 100644 --- a/src/enumeratedvalue.rs +++ b/src/enumeratedvalue.rs @@ -18,7 +18,7 @@ pub struct EnumeratedValue { pub value: Option, pub is_default: Option, // Reserve the right to add more fields to this struct - pub _extensible: (), + pub(crate) _extensible: (), } impl EnumeratedValue { diff --git a/src/enumeratedvalues.rs b/src/enumeratedvalues.rs index 6f5befa5..231f563b 100644 --- a/src/enumeratedvalues.rs +++ b/src/enumeratedvalues.rs @@ -18,7 +18,7 @@ pub struct EnumeratedValues { pub derived_from: Option, pub values: Vec, // Reserve the right to add more fields to this struct - pub _extensible: (), + pub(crate) _extensible: (), } impl ParseElem for EnumeratedValues { diff --git a/src/field.rs b/src/field.rs index 939062b6..32d107e8 100644 --- a/src/field.rs +++ b/src/field.rs @@ -22,7 +22,7 @@ pub struct Field { pub enumerated_values: Vec, pub write_constraint: Option, // Reserve the right to add more fields to this struct - pub _extensible: (), + pub(crate) _extensible: (), } impl ParseElem for Field { diff --git a/src/peripheral.rs b/src/peripheral.rs index f3449055..bb84720f 100644 --- a/src/peripheral.rs +++ b/src/peripheral.rs @@ -33,7 +33,7 @@ pub struct Peripheral { pub registers: Option>>, pub derived_from: Option, // Reserve the right to add more fields to this struct - _extensible: (), + pub(crate) _extensible: (), } impl ParseElem for Peripheral { @@ -126,11 +126,11 @@ impl EncodeElem for Peripheral { elem.children.push(Element { name: String::from("registers"), attributes: HashMap::new(), - children: v.iter().map(|e| { + children: v.iter().map(|&ref e| { if e.is_left() { - e.left().unwrap().encode() + e.clone().left().unwrap().encode() } else { - e.right().unwrap().encode() + e.clone().right().unwrap().encode() } }).collect(), text: None, diff --git a/src/register.rs b/src/register.rs index e82ab8e8..257ddc22 100644 --- a/src/register.rs +++ b/src/register.rs @@ -12,7 +12,7 @@ use registerinfo::*; use registerarrayinfo::*; -#[derive(Clone, Debug)] +#[derive(Clone, Debug, PartialEq)] pub enum Register { Single(RegisterInfo), Array(RegisterInfo, RegisterArrayInfo), @@ -55,7 +55,7 @@ impl EncodeElem for Register { fn encode(&self) -> Element { match *self { Register::Single(ref info) => info.encode(), - Register::Array(ref info, ref array_info) => { + Register::Array(ref info, ref _array_info) => { // TODO: fix this (does not encode array stuff) // Not even slightly sure what to do here info.encode() diff --git a/src/registerarrayinfo.rs b/src/registerarrayinfo.rs index abe41c7b..682088f1 100644 --- a/src/registerarrayinfo.rs +++ b/src/registerarrayinfo.rs @@ -10,7 +10,7 @@ use elementext::*; use parse; use helpers::*; -#[derive(Clone, Debug)] +#[derive(Clone, Debug, PartialEq)] pub struct RegisterArrayInfo { pub dim: u32, pub dim_increment: u32, diff --git a/src/registerinfo.rs b/src/registerinfo.rs index 7c152b01..49040a1b 100644 --- a/src/registerinfo.rs +++ b/src/registerinfo.rs @@ -27,7 +27,7 @@ pub struct RegisterInfo { pub fields: Option>, pub write_constraint: Option, // Reserve the right to add more fields to this struct - pub _extensible: (), + pub(crate) _extensible: (), } impl ParseElem for RegisterInfo { From 6638c7b5db44e85327e977a557a775514386673d Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Mon, 25 Sep 2017 17:17:14 +1300 Subject: [PATCH 24/25] Cleaning up unused imports etc. --- src/access.rs | 1 - src/addressblock.rs | 3 +-- src/bitrange.rs | 1 - src/cluster.rs | 1 - src/clusterinfo.rs | 17 ++++++++++------- src/cpu.rs | 6 +++--- src/defaults.rs | 13 +++++++++---- src/device.rs | 6 ++++-- src/elementext.rs | 1 - src/endian.rs | 1 - src/enumeratedvalue.rs | 11 +++++++---- src/enumeratedvalues.rs | 3 +-- src/field.rs | 3 +-- src/helpers.rs | 1 - src/interrupt.rs | 3 +-- src/lib.rs | 1 - src/peripheral.rs | 12 ++++-------- src/register.rs | 4 ---- src/registerarrayinfo.rs | 7 ++++--- src/registercluster.rs | 5 ----- src/registerclusterarrayinfo.rs | 5 +---- src/registerinfo.rs | 15 ++++++++++----- src/usage.rs | 1 - src/writeconstraint.rs | 13 ++++++------- src/writeconstraintrange.rs | 3 +-- 25 files changed, 63 insertions(+), 74 deletions(-) diff --git a/src/access.rs b/src/access.rs index d930b327..18393c79 100644 --- a/src/access.rs +++ b/src/access.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use std::collections::HashMap; diff --git a/src/addressblock.rs b/src/addressblock.rs index cb49faae..ed19a609 100644 --- a/src/addressblock.rs +++ b/src/addressblock.rs @@ -1,10 +1,9 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] + use elementext::*; use helpers::*; diff --git a/src/bitrange.rs b/src/bitrange.rs index 682b8ff2..a2947a97 100644 --- a/src/bitrange.rs +++ b/src/bitrange.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use xmltree::Element; diff --git a/src/cluster.rs b/src/cluster.rs index 17e13433..75b9f05f 100644 --- a/src/cluster.rs +++ b/src/cluster.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use std::ops::Deref; use std::collections::hash_map::*; diff --git a/src/clusterinfo.rs b/src/clusterinfo.rs index 7dd97dbb..4bb6d719 100644 --- a/src/clusterinfo.rs +++ b/src/clusterinfo.rs @@ -1,11 +1,9 @@ -extern crate xmltree; -extern crate either; use xmltree::Element; use either::Either; -#[macro_use] use elementext::*; +use elementext::*; use helpers::*; use parse; @@ -39,10 +37,16 @@ impl ParseElem for ClusterInfo { address_offset: { try_get_child!(parse::u32(try_get_child!(tree.get_child("addressOffset")))) }, - size: tree.get_child("size").map(|t| try_get_child!(parse::u32(t))), + size: tree.get_child("size").map( + |t| try_get_child!(parse::u32(t)), + ), access: tree.get_child("access").map(Access::parse), - reset_value: tree.get_child("resetValue").map(|t| try_get_child!(parse::u32(t))), - reset_mask: tree.get_child("resetMask").map(|t| try_get_child!(parse::u32(t))), + reset_value: tree.get_child("resetValue").map(|t| { + try_get_child!(parse::u32(t)) + }), + reset_mask: tree.get_child("resetMask").map( + |t| try_get_child!(parse::u32(t)), + ), children: tree.children .iter() .filter(|t| t.name == "register" || t.name == "cluster") @@ -52,4 +56,3 @@ impl ParseElem for ClusterInfo { } } } - diff --git a/src/cpu.rs b/src/cpu.rs index 338bae16..76c6cb65 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -1,10 +1,8 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] use elementext::*; use parse; use helpers::*; @@ -43,7 +41,9 @@ impl ParseElem for Cpu { mpu_present: try_get_child!(parse::bool(try_get_child!(tree.get_child("mpuPresent")))), fpu_present: try_get_child!(parse::bool(try_get_child!(tree.get_child("fpuPresent")))), nvic_priority_bits: try_get_child!(parse::u32(try_get_child!(tree.get_child("nvicPrioBits")))), - has_vendor_systick: try_get_child!(parse::bool(try_get_child!(tree.get_child("vendorSystickConfig")))), + has_vendor_systick: try_get_child!(parse::bool( + try_get_child!(tree.get_child("vendorSystickConfig")), + )), _extensible: (), } diff --git a/src/defaults.rs b/src/defaults.rs index 1918261d..24b9150d 100644 --- a/src/defaults.rs +++ b/src/defaults.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use xmltree::Element; @@ -20,9 +19,15 @@ pub struct Defaults { impl ParseElem for Defaults { fn parse(tree: &Element) -> Defaults { Defaults { - size: tree.get_child("size").map(|t| try_get_child!(parse::u32(t))), - reset_value: tree.get_child("resetValue").map(|t| try_get_child!(parse::u32(t))), - reset_mask: tree.get_child("resetMask").map(|t| try_get_child!(parse::u32(t))), + size: tree.get_child("size").map( + |t| try_get_child!(parse::u32(t)), + ), + reset_value: tree.get_child("resetValue").map(|t| { + try_get_child!(parse::u32(t)) + }), + reset_mask: tree.get_child("resetMask").map( + |t| try_get_child!(parse::u32(t)), + ), access: tree.get_child("access").map(Access::parse), _extensible: (), } diff --git a/src/device.rs b/src/device.rs index 87d0f99e..c149373f 100644 --- a/src/device.rs +++ b/src/device.rs @@ -2,7 +2,7 @@ use xmltree::Element; use std::collections::HashMap; -#[macro_use] + use elementext::*; use helpers::*; use cpu::*; @@ -33,7 +33,9 @@ impl ParseElem for Device { name: try_get_child!(tree.get_child_text("name")), version: try_get_child!(tree.get_child_text("version")), description: try_get_child!(tree.get_child_text("description")), - address_unit_bits: try_get_child!(parse::u32(try_get_child!(tree.get_child("addressUnitBits")))), + address_unit_bits: try_get_child!(parse::u32( + try_get_child!(tree.get_child("addressUnitBits")), + )), width: try_get_child!(parse::u32(try_get_child!(tree.get_child("width")))), cpu: tree.get_child("cpu").map(Cpu::parse), peripherals: try_get_child!(tree.get_child("peripherals")) diff --git a/src/elementext.rs b/src/elementext.rs index b7e8ea49..7e49c306 100644 --- a/src/elementext.rs +++ b/src/elementext.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use xmltree::Element; diff --git a/src/endian.rs b/src/endian.rs index aa1538e8..783f4008 100644 --- a/src/endian.rs +++ b/src/endian.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use std::collections::HashMap; diff --git a/src/enumeratedvalue.rs b/src/enumeratedvalue.rs index d1b6f968..601b4330 100644 --- a/src/enumeratedvalue.rs +++ b/src/enumeratedvalue.rs @@ -1,10 +1,9 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] + use elementext::*; use helpers::*; @@ -28,8 +27,12 @@ impl EnumeratedValue { Some(EnumeratedValue { name: try_get_child!(tree.get_child_text("name")), description: tree.get_child_text("description"), - value: tree.get_child("value").map(|t| try_get_child!(parse::u32(t))), - is_default: tree.get_child_text("isDefault").map(|t| try_get_child!(t.parse())), + value: tree.get_child("value").map( + |t| try_get_child!(parse::u32(t)), + ), + is_default: tree.get_child_text("isDefault").map(|t| { + try_get_child!(t.parse()) + }), _extensible: (), }) } diff --git a/src/enumeratedvalues.rs b/src/enumeratedvalues.rs index 231f563b..c89b43df 100644 --- a/src/enumeratedvalues.rs +++ b/src/enumeratedvalues.rs @@ -1,10 +1,9 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] + use elementext::*; use helpers::*; diff --git a/src/field.rs b/src/field.rs index 32d107e8..658dad0f 100644 --- a/src/field.rs +++ b/src/field.rs @@ -1,9 +1,8 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] + use elementext::*; use helpers::*; diff --git a/src/helpers.rs b/src/helpers.rs index 744c175a..774ddb68 100644 --- a/src/helpers.rs +++ b/src/helpers.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use std::collections::HashMap; diff --git a/src/interrupt.rs b/src/interrupt.rs index 1aa267e8..27de28ac 100644 --- a/src/interrupt.rs +++ b/src/interrupt.rs @@ -1,10 +1,9 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] + use elementext::*; use helpers::*; diff --git a/src/lib.rs b/src/lib.rs index 792b9d40..4c85d506 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -30,7 +30,6 @@ use xmltree::Element; #[macro_use] mod elementext; -use elementext::*; mod parse; mod helpers; diff --git a/src/peripheral.rs b/src/peripheral.rs index bb84720f..414a3610 100644 --- a/src/peripheral.rs +++ b/src/peripheral.rs @@ -1,13 +1,9 @@ -extern crate xmltree; -extern crate either; use std::collections::HashMap; -use std::ops::Deref; use xmltree::Element; use either::Either; -#[macro_use] use elementext::*; use parse; @@ -126,13 +122,13 @@ impl EncodeElem for Peripheral { elem.children.push(Element { name: String::from("registers"), attributes: HashMap::new(), - children: v.iter().map(|&ref e| { - if e.is_left() { + children: v.iter() + .map(|&ref e| if e.is_left() { e.clone().left().unwrap().encode() } else { e.clone().right().unwrap().encode() - } - }).collect(), + }) + .collect(), text: None, }); } diff --git a/src/register.rs b/src/register.rs index 257ddc22..3abf759b 100644 --- a/src/register.rs +++ b/src/register.rs @@ -1,12 +1,8 @@ -extern crate xmltree; use std::ops::Deref; use xmltree::Element; -#[macro_use] -use elementext::*; - use helpers::*; use registerinfo::*; use registerarrayinfo::*; diff --git a/src/registerarrayinfo.rs b/src/registerarrayinfo.rs index 682088f1..3d5544f4 100644 --- a/src/registerarrayinfo.rs +++ b/src/registerarrayinfo.rs @@ -1,10 +1,9 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] + use elementext::*; use parse; @@ -21,7 +20,9 @@ impl ParseElem for RegisterArrayInfo { fn parse(tree: &Element) -> RegisterArrayInfo { RegisterArrayInfo { dim: try_get_child!(tree.get_child_text("dim").unwrap().parse::()), - dim_increment: try_get_child!(tree.get_child("dimIncrement").map(|t| try_get_child!(parse::u32(t)))), + dim_increment: try_get_child!(tree.get_child("dimIncrement").map(|t| { + try_get_child!(parse::u32(t)) + })), dim_index: tree.get_child("dimIndex").map(|c| { parse::dim_index(try_get_child!(c.text.as_ref())) }), diff --git a/src/registercluster.rs b/src/registercluster.rs index b6d95df8..b924f127 100644 --- a/src/registercluster.rs +++ b/src/registercluster.rs @@ -1,12 +1,7 @@ -extern crate xmltree; -extern crate either; use xmltree::Element; use either::Either; -#[macro_use] -use elementext::*; - use helpers::*; use register::*; use cluster::*; diff --git a/src/registerclusterarrayinfo.rs b/src/registerclusterarrayinfo.rs index cc743544..7d2a507b 100644 --- a/src/registerclusterarrayinfo.rs +++ b/src/registerclusterarrayinfo.rs @@ -1,9 +1,7 @@ -extern crate xmltree; -extern crate either; use xmltree::Element; -#[macro_use] + use elementext::*; use helpers::*; @@ -30,4 +28,3 @@ impl ParseElem for RegisterClusterArrayInfo { } } } - diff --git a/src/registerinfo.rs b/src/registerinfo.rs index 49040a1b..b9d576ec 100644 --- a/src/registerinfo.rs +++ b/src/registerinfo.rs @@ -1,10 +1,9 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] + use elementext::*; use helpers::*; @@ -38,10 +37,16 @@ impl ParseElem for RegisterInfo { address_offset: { try_get_child!(parse::u32(try_get_child!(tree.get_child("addressOffset")))) }, - size: tree.get_child("size").map(|t| try_get_child!(parse::u32(t))), + size: tree.get_child("size").map( + |t| try_get_child!(parse::u32(t)), + ), access: tree.get_child("access").map(Access::parse), - reset_value: tree.get_child("resetValue").map(|t| try_get_child!(parse::u32(t))), - reset_mask: tree.get_child("resetMask").map(|t| try_get_child!(parse::u32(t))), + reset_value: tree.get_child("resetValue").map(|t| { + try_get_child!(parse::u32(t)) + }), + reset_mask: tree.get_child("resetMask").map( + |t| try_get_child!(parse::u32(t)), + ), fields: tree.get_child("fields").map(|fs| { fs.children.iter().map(Field::parse).collect() }), diff --git a/src/usage.rs b/src/usage.rs index e5c93c0c..133f6ac3 100644 --- a/src/usage.rs +++ b/src/usage.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use std::collections::HashMap; diff --git a/src/writeconstraint.rs b/src/writeconstraint.rs index 311d5af1..7bbd61fc 100644 --- a/src/writeconstraint.rs +++ b/src/writeconstraint.rs @@ -1,4 +1,3 @@ -extern crate xmltree; use std::collections::HashMap; @@ -23,14 +22,14 @@ impl ParseElem for WriteConstraint { // Write constraint can only be one of the following match field.as_ref() { "writeAsRead" => { - WriteConstraint::WriteAsRead(try_get_child!( - tree.get_child(field.as_ref()).map(|t| try_get_child!(parse::bool(t))) - )) + WriteConstraint::WriteAsRead(try_get_child!(tree.get_child(field.as_ref()).map(|t| { + try_get_child!(parse::bool(t)) + }))) } "useEnumeratedValues" => { - WriteConstraint::UseEnumeratedValues(try_get_child!( - tree.get_child(field.as_ref()).map(|t| try_get_child!(parse::bool(t))) - )) + WriteConstraint::UseEnumeratedValues(try_get_child!(tree.get_child(field.as_ref()).map(|t| { + try_get_child!(parse::bool(t)) + }))) } "range" => { WriteConstraint::Range(try_get_child!(tree.get_child(field.as_ref()).map( diff --git a/src/writeconstraintrange.rs b/src/writeconstraintrange.rs index 2f54bca5..4ace6c9d 100644 --- a/src/writeconstraintrange.rs +++ b/src/writeconstraintrange.rs @@ -1,10 +1,9 @@ -extern crate xmltree; use std::collections::HashMap; use xmltree::Element; -#[macro_use] + use elementext::*; use helpers::*; From dd34c72022ef6917d3db3b892407b3a73d362f03 Mon Sep 17 00:00:00 2001 From: Ryan Kurte Date: Mon, 25 Sep 2017 17:37:08 +1300 Subject: [PATCH 25/25] Cleaning up glob imports --- src/access.rs | 2 +- src/addressblock.rs | 7 ++---- src/bitrange.rs | 2 +- src/cluster.rs | 7 +++--- src/clusterinfo.rs | 19 +++++++++----- src/cpu.rs | 7 +++--- src/defaults.rs | 5 ++-- src/device.rs | 12 +++++---- src/endian.rs | 2 +- src/enumeratedvalue.rs | 6 ++--- src/enumeratedvalues.rs | 16 +++--------- src/field.rs | 15 ++++++----- src/interrupt.rs | 5 ++-- src/lib.rs | 44 ++++++++++++++++----------------- src/peripheral.rs | 16 ++++++------ src/register.rs | 7 +++--- src/registerarrayinfo.rs | 7 +++--- src/registercluster.rs | 6 ++--- src/registerclusterarrayinfo.rs | 13 ++++++---- src/registerinfo.rs | 11 ++++----- src/usage.rs | 2 +- src/writeconstraint.rs | 5 ++-- src/writeconstraintrange.rs | 5 ++-- 23 files changed, 108 insertions(+), 113 deletions(-) diff --git a/src/access.rs b/src/access.rs index 18393c79..f4bd57ae 100644 --- a/src/access.rs +++ b/src/access.rs @@ -3,7 +3,7 @@ use std::collections::HashMap; use xmltree::Element; -use helpers::*; +use helpers::{ParseElem, EncodeElem}; #[derive(Clone, Copy, Debug, PartialEq)] pub enum Access { diff --git a/src/addressblock.rs b/src/addressblock.rs index ed19a609..46ce46f6 100644 --- a/src/addressblock.rs +++ b/src/addressblock.rs @@ -3,13 +3,10 @@ use std::collections::HashMap; use xmltree::Element; - -use elementext::*; - -use helpers::*; +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, new_element}; use parse; - #[derive(Clone, Debug, PartialEq)] pub struct AddressBlock { pub offset: u32, diff --git a/src/bitrange.rs b/src/bitrange.rs index a2947a97..f0a0fb4e 100644 --- a/src/bitrange.rs +++ b/src/bitrange.rs @@ -1,7 +1,7 @@ use xmltree::Element; -use helpers::*; +use helpers::{ParseElem, EncodeChildren, new_element}; use parse; #[derive(Clone, Copy, Debug, PartialEq)] diff --git a/src/cluster.rs b/src/cluster.rs index 75b9f05f..74329217 100644 --- a/src/cluster.rs +++ b/src/cluster.rs @@ -4,10 +4,9 @@ use std::collections::hash_map::*; use xmltree::Element; - -use helpers::*; -use clusterinfo::*; -use registerclusterarrayinfo::*; +use helpers::{ParseElem, EncodeElem}; +use clusterinfo::ClusterInfo; +use registerclusterarrayinfo::RegisterClusterArrayInfo; #[derive(Clone, Debug, PartialEq)] pub enum Cluster { diff --git a/src/clusterinfo.rs b/src/clusterinfo.rs index 4bb6d719..09895106 100644 --- a/src/clusterinfo.rs +++ b/src/clusterinfo.rs @@ -3,14 +3,15 @@ use xmltree::Element; use either::Either; -use elementext::*; +use elementext::ElementExt; -use helpers::*; +use helpers::{ParseElem, EncodeElem, new_element}; use parse; -use access::*; -use register::*; -use cluster::*; -use registercluster::*; + +use access::Access; +use register::Register; +use cluster::Cluster; +use registercluster::cluster_register_parse; #[derive(Clone, Debug, PartialEq)] @@ -56,3 +57,9 @@ impl ParseElem for ClusterInfo { } } } + +impl EncodeElem for ClusterInfo { + fn encode(&self) -> Element { + new_element("fake", None) + } +} diff --git a/src/cpu.rs b/src/cpu.rs index 76c6cb65..afa04e66 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -3,10 +3,11 @@ use std::collections::HashMap; use xmltree::Element; -use elementext::*; +use elementext::ElementExt; use parse; -use helpers::*; -use endian::*; + +use helpers::{ParseElem, EncodeElem, new_element}; +use endian::Endian; #[derive(Clone, Debug, PartialEq)] pub struct Cpu { diff --git a/src/defaults.rs b/src/defaults.rs index 24b9150d..3cc512b8 100644 --- a/src/defaults.rs +++ b/src/defaults.rs @@ -1,10 +1,11 @@ use xmltree::Element; -use helpers::*; -use access::*; +use helpers::{ParseElem, EncodeElem, EncodeChildren, new_element}; use parse; +use access::Access; + /// Register default properties #[derive(Clone, Copy, Debug, PartialEq)] pub struct Defaults { diff --git a/src/device.rs b/src/device.rs index c149373f..7d401a19 100644 --- a/src/device.rs +++ b/src/device.rs @@ -3,13 +3,15 @@ use xmltree::Element; use std::collections::HashMap; -use elementext::*; -use helpers::*; -use cpu::*; -use defaults::*; -use peripheral::*; +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, new_element}; use parse; +use cpu::Cpu; +use defaults::Defaults; +use peripheral::Peripheral; + + #[derive(Clone, Debug)] pub struct Device { diff --git a/src/endian.rs b/src/endian.rs index 783f4008..63ae2742 100644 --- a/src/endian.rs +++ b/src/endian.rs @@ -3,7 +3,7 @@ use std::collections::HashMap; use xmltree::Element; -use helpers::*; +use helpers::{ParseElem, EncodeElem}; #[derive(Clone, Copy, Debug, PartialEq)] pub enum Endian { diff --git a/src/enumeratedvalue.rs b/src/enumeratedvalue.rs index 601b4330..8897932b 100644 --- a/src/enumeratedvalue.rs +++ b/src/enumeratedvalue.rs @@ -3,10 +3,8 @@ use std::collections::HashMap; use xmltree::Element; - -use elementext::*; - -use helpers::*; +use elementext::ElementExt; +use helpers::{EncodeElem, new_element}; use parse; diff --git a/src/enumeratedvalues.rs b/src/enumeratedvalues.rs index c89b43df..4d93a542 100644 --- a/src/enumeratedvalues.rs +++ b/src/enumeratedvalues.rs @@ -3,12 +3,11 @@ use std::collections::HashMap; use xmltree::Element; +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, new_element}; -use elementext::*; - -use helpers::*; -use usage::*; -use enumeratedvalue::*; +use usage::Usage; +use enumeratedvalue::EnumeratedValue; #[derive(Clone, Debug, PartialEq)] pub struct EnumeratedValues { @@ -82,13 +81,6 @@ impl EncodeElem for EnumeratedValues { #[cfg(test)] mod tests { - macro_rules! try { - ($e:expr) => { - $e.expect(concat!(file!(), ":", line!(), " ", stringify!($e))) - } - } - - use super::*; #[test] diff --git a/src/field.rs b/src/field.rs index 658dad0f..d90b7cfe 100644 --- a/src/field.rs +++ b/src/field.rs @@ -2,14 +2,13 @@ use std::collections::HashMap; use xmltree::Element; +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, EncodeChildren, new_element}; -use elementext::*; - -use helpers::*; -use access::*; -use writeconstraint::*; -use bitrange::*; -use enumeratedvalues::*; +use access::Access; +use writeconstraint::WriteConstraint; +use bitrange::BitRange; +use enumeratedvalues::EnumeratedValues; #[derive(Clone, Debug, PartialEq)] @@ -86,7 +85,7 @@ impl EncodeElem for Field { #[cfg(test)] mod tests { use super::*; - + use bitrange::BitRangeType; use enumeratedvalue::EnumeratedValue; #[test] diff --git a/src/interrupt.rs b/src/interrupt.rs index 27de28ac..e2e38290 100644 --- a/src/interrupt.rs +++ b/src/interrupt.rs @@ -4,9 +4,8 @@ use std::collections::HashMap; use xmltree::Element; -use elementext::*; - -use helpers::*; +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, new_element}; use parse; diff --git a/src/lib.rs b/src/lib.rs index 4c85d506..9d4e954d 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -35,48 +35,48 @@ mod parse; mod helpers; use helpers::*; mod endian; -pub use endian::*; +pub use endian::Endian; mod access; -pub use access::*; +pub use access::Access; mod usage; -pub use usage::*; +pub use usage::Usage; mod enumeratedvalue; -pub use enumeratedvalue::*; +pub use enumeratedvalue::EnumeratedValue; mod enumeratedvalues; -pub use enumeratedvalues::*; +pub use enumeratedvalues::EnumeratedValues; mod defaults; -pub use defaults::*; +pub use defaults::Defaults; mod writeconstraintrange; -pub use writeconstraintrange::*; +pub use writeconstraintrange::WriteConstraintRange; mod writeconstraint; -pub use writeconstraint::*; +pub use writeconstraint::WriteConstraint; mod bitrange; -pub use bitrange::*; +pub use bitrange::BitRange; mod interrupt; -pub use interrupt::*; +pub use interrupt::Interrupt; mod addressblock; -pub use addressblock::*; +pub use addressblock::AddressBlock; mod field; -pub use field::*; +pub use field::Field; mod register; -pub use register::*; +pub use register::Register; mod clusterinfo; -pub use clusterinfo::*; +pub use clusterinfo::ClusterInfo; mod cluster; -pub use cluster::*; +pub use cluster::Cluster; mod registerinfo; -pub use registerinfo::*; +pub use registerinfo::RegisterInfo; mod registerarrayinfo; -pub use registerarrayinfo::*; +pub use registerarrayinfo::RegisterArrayInfo; mod registerclusterarrayinfo; -pub use registerclusterarrayinfo::*; +pub use registerclusterarrayinfo::RegisterClusterArrayInfo; mod registercluster; mod peripheral; -pub use peripheral::*; +pub use peripheral::Peripheral; mod cpu; -pub use cpu::*; +pub use cpu::Cpu; mod device; -pub use device::*; +pub use device::Device; /// Parses the contents of a SVD file (XML) @@ -93,12 +93,10 @@ pub fn encode(device: &Device) -> Element { #[cfg(test)] mod tests { use super::*; - use bitrange::*; use std::fs; use std::process::Command; use std::fs::File; - use std::io; use std::io::prelude::*; use std::path::Path; diff --git a/src/peripheral.rs b/src/peripheral.rs index 414a3610..b8106442 100644 --- a/src/peripheral.rs +++ b/src/peripheral.rs @@ -4,15 +4,15 @@ use std::collections::HashMap; use xmltree::Element; use either::Either; -use elementext::*; - +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, new_element}; use parse; -use helpers::*; -use interrupt::*; -use register::*; -use cluster::*; -use addressblock::*; -use registercluster::*; + +use interrupt::Interrupt; +use register::Register; +use cluster::Cluster; +use addressblock::AddressBlock; +use registercluster::cluster_register_parse; #[derive(Clone, Debug)] diff --git a/src/register.rs b/src/register.rs index 3abf759b..b5c7ed62 100644 --- a/src/register.rs +++ b/src/register.rs @@ -3,9 +3,10 @@ use std::ops::Deref; use xmltree::Element; -use helpers::*; -use registerinfo::*; -use registerarrayinfo::*; +use helpers::{ParseElem, EncodeElem}; + +use registerinfo::RegisterInfo; +use registerarrayinfo::RegisterArrayInfo; #[derive(Clone, Debug, PartialEq)] diff --git a/src/registerarrayinfo.rs b/src/registerarrayinfo.rs index 3d5544f4..a7023a20 100644 --- a/src/registerarrayinfo.rs +++ b/src/registerarrayinfo.rs @@ -3,11 +3,10 @@ use std::collections::HashMap; use xmltree::Element; - -use elementext::*; - +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem}; use parse; -use helpers::*; + #[derive(Clone, Debug, PartialEq)] pub struct RegisterArrayInfo { diff --git a/src/registercluster.rs b/src/registercluster.rs index b924f127..c1ccac09 100644 --- a/src/registercluster.rs +++ b/src/registercluster.rs @@ -2,9 +2,9 @@ use xmltree::Element; use either::Either; -use helpers::*; -use register::*; -use cluster::*; +use helpers::ParseElem; +use register::Register; +use cluster::Cluster; pub fn cluster_register_parse(tree: &Element) -> Either { if tree.name == "register" { diff --git a/src/registerclusterarrayinfo.rs b/src/registerclusterarrayinfo.rs index 7d2a507b..e7de398a 100644 --- a/src/registerclusterarrayinfo.rs +++ b/src/registerclusterarrayinfo.rs @@ -1,13 +1,10 @@ use xmltree::Element; - -use elementext::*; - -use helpers::*; +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, new_element}; use parse; - #[derive(Clone, Debug, PartialEq)] pub struct RegisterClusterArrayInfo { pub dim: u32, @@ -28,3 +25,9 @@ impl ParseElem for RegisterClusterArrayInfo { } } } + +impl EncodeElem for RegisterClusterArrayInfo { + fn encode(&self) -> Element { + new_element("FAKE", None) + } +} diff --git a/src/registerinfo.rs b/src/registerinfo.rs index b9d576ec..c1d990b1 100644 --- a/src/registerinfo.rs +++ b/src/registerinfo.rs @@ -3,14 +3,13 @@ use std::collections::HashMap; use xmltree::Element; - -use elementext::*; - -use helpers::*; -use access::*; +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, new_element}; use parse; + use Field; -use writeconstraint::*; +use access::Access; +use writeconstraint::WriteConstraint; #[derive(Clone, Debug, PartialEq)] diff --git a/src/usage.rs b/src/usage.rs index 133f6ac3..b66a5e29 100644 --- a/src/usage.rs +++ b/src/usage.rs @@ -3,7 +3,7 @@ use std::collections::HashMap; use xmltree::Element; -use helpers::*; +use helpers::{ParseElem, EncodeElem}; #[derive(Clone, Copy, Debug, Eq, PartialEq)] diff --git a/src/writeconstraint.rs b/src/writeconstraint.rs index 7bbd61fc..63acc6c2 100644 --- a/src/writeconstraint.rs +++ b/src/writeconstraint.rs @@ -3,9 +3,10 @@ use std::collections::HashMap; use xmltree::Element; +use helpers::{ParseElem, EncodeElem, new_element}; use parse; -use helpers::*; -use writeconstraintrange::*; + +use writeconstraintrange::WriteConstraintRange; #[derive(Clone, Copy, Debug, PartialEq)] diff --git a/src/writeconstraintrange.rs b/src/writeconstraintrange.rs index 4ace6c9d..fe92ad65 100644 --- a/src/writeconstraintrange.rs +++ b/src/writeconstraintrange.rs @@ -4,9 +4,8 @@ use std::collections::HashMap; use xmltree::Element; -use elementext::*; - -use helpers::*; +use elementext::ElementExt; +use helpers::{ParseElem, EncodeElem, new_element}; #[derive(Clone, Copy, Debug, PartialEq)]