Cache maintenance operations require reference to self #304
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Related to #238 |
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Jan 25, 2021
320: Prepare for v0.7.1 r=therealprof a=adamgreig Includes: * Deprecate msp::write #297 * New syscall and bootstrap ASM #299 * More compiler fences #311 * asm::delay timing fix #312 * asm::delay clobber fix #317 * LTO for ASM fix #318 Doesn't include anything to help with #304 which might be nice to fix but can come in 0.7.2 and might need some time to think about. Co-authored-by: Adam Greig <[email protected]>
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304: Allow using the crate with custom target JSON specs r=adamgreig a=jonas-schievink This should fix rust-embedded/cortex-m-rt#145 (cc @thejpster) Co-authored-by: Jonas Schievink <[email protected]>
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Various cache maintenance-related operations require a
selfreference, which means that it is not possible for a HAL or other peripherals to clean/invalidate and/or perform other cache related operations without owning theSCB.In the context of DMA, this can be a stumbling block, as DCACHE needs to be cleaned and invalidated before and after transfers (if it is enabled).
Is it possible to refactor the cache maintenance functions to not require a
selfreference so that they can be called statically ascortex_m::peripherals::scb::invalidate_dcache_by_address()?The text was updated successfully, but these errors were encountered: