Merge #422

422: Add ITNS field to NVIC peripheral r=adamgreig a=sphw

This PR adds the ITNS (Interrupt Target Non-secure) field to the NIVC peripheral. This field is required to write a boot loader for TrustZone-M devices, since it allows the user to use interrupts from non-secure states.

I believe I have maintained the correct padding for the next fields, but I have not tested these changes on a non M33 device. So a close review and test would be appreciated.  

Co-authored-by: Sascha Wise <[email protected]>

Author: bors[bot]

src/peripheral/nvic.rs

@@ -36,7 +36,15 @@ pub struct RegisterBlock {
     #[cfg(armv6m)]
     _reserved4: [u32; 16],
 
-    _reserved5: [u32; 48],
+    _reserved5: [u32; 16],
+
+    #[cfg(armv8m)]
+    /// Interrupt Target Non-secure (only present on Arm v8-M)
+    pub itns: [RW<u32>; 16],
+    #[cfg(not(armv8m))]
+    _reserved6: [u32; 16],
+
+    _reserved7: [u32; 16],
 
     /// Interrupt Priority
     ///
@@ -67,7 +75,7 @@ pub struct RegisterBlock {
     pub ipr: [RW<u32>; 8],
 
     #[cfg(not(armv6m))]
-    _reserved6: [u32; 580],
+    _reserved8: [u32; 580],
 
     /// Software Trigger Interrupt
     #[cfg(not(armv6m))]