soc_system.qsys

<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
 <component
   name="$${FILENAME}"
   displayName="$${FILENAME}"
   version="1.0"
   description=""
   tags=""
   categories="System" />
 <parameter name="bonusData"><![CDATA[bonusData 
{
   element ILC
   {
      datum _sortIndex
      {
         value = "12";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ILC.avalon_slave
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "196608";
         type = "String";
      }
   }
   element alt_vip_itc_0
   {
      datum _sortIndex
      {
         value = "15";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element alt_vip_vfr_hdmi
   {
      datum _sortIndex
      {
         value = "14";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element alt_vip_vfr_hdmi.avalon_slave
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "200704";
         type = "String";
      }
   }
   element buf0
   {
      datum _sortIndex
      {
         value = "19";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element buf0.s1
   {
      datum baseAddress
      {
         value = "73728";
         type = "String";
      }
   }
   element buf1
   {
      datum _sortIndex
      {
         value = "18";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element buf1.s1
   {
      datum baseAddress
      {
         value = "69632";
         type = "String";
      }
   }
   element buf2
   {
      datum _sortIndex
      {
         value = "17";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element buf2.s1
   {
      datum baseAddress
      {
         value = "65536";
         type = "String";
      }
   }
   element button_pio
   {
      datum _sortIndex
      {
         value = "7";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element button_pio.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "20480";
         type = "String";
      }
   }
   element clk_0
   {
      datum _sortIndex
      {
         value = "13";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element clock_bridge_0
   {
      datum _sortIndex
      {
         value = "16";
         type = "int";
      }
   }
   element ctrl
   {
      datum _sortIndex
      {
         value = "9";
         type = "int";
      }
   }
   element ctrl.avalon_slave
   {
      datum baseAddress
      {
         value = "393216";
         type = "String";
      }
   }
   element de_backlash_duration
   {
      datum _sortIndex
      {
         value = "38";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_backlash_duration.s1
   {
      datum baseAddress
      {
         value = "188416";
         type = "String";
      }
   }
   element de_backlash_tick
   {
      datum _sortIndex
      {
         value = "36";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_backlash_tick.s1
   {
      datum baseAddress
      {
         value = "180224";
         type = "String";
      }
   }
   element de_cmdcontrol
   {
      datum _sortIndex
      {
         value = "28";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_cmdcontrol.s1
   {
      datum baseAddress
      {
         value = "147456";
         type = "String";
      }
   }
   element de_cmdduration
   {
      datum _sortIndex
      {
         value = "30";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_cmdduration.s1
   {
      datum baseAddress
      {
         value = "155648";
         type = "String";
      }
   }
   element de_cmdtick
   {
      datum _sortIndex
      {
         value = "34";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_cmdtick.s1
   {
      datum baseAddress
      {
         value = "172032";
         type = "String";
      }
   }
   element de_count
   {
      datum _sortIndex
      {
         value = "20";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_count.s1
   {
      datum baseAddress
      {
         value = "77824";
         type = "String";
      }
   }
   element de_counter_load
   {
      datum _sortIndex
      {
         value = "24";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_counter_load.s1
   {
      datum baseAddress
      {
         value = "131072";
         type = "String";
      }
   }
   element de_counter_max
   {
      datum _sortIndex
      {
         value = "26";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_counter_max.s1
   {
      datum baseAddress
      {
         value = "139264";
         type = "String";
      }
   }
   element de_status
   {
      datum _sortIndex
      {
         value = "22";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_status.s1
   {
      datum baseAddress
      {
         value = "86016";
         type = "String";
      }
   }
   element de_trackctrl
   {
      datum _sortIndex
      {
         value = "32";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element de_trackctrl.s1
   {
      datum baseAddress
      {
         value = "163840";
         type = "String";
      }
   }
   element dipsw_pio
   {
      datum _sortIndex
      {
         value = "10";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element dipsw_pio.external_connection
   {
      datum _tags
      {
         value = "";
         type = "String";
      }
   }
   element dipsw_pio.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "16384";
         type = "String";
      }
   }
   element f2sdram_only_master
   {
      datum _sortIndex
      {
         value = "4";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element fpga_only_master
   {
      datum _sortIndex
      {
         value = "3";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element hps_0
   {
      datum _sortIndex
      {
         value = "1";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element hps_0.f2h_axi_slave
   {
      datum baseAddress
      {
         value = "0";
         type = "String";
      }
   }
   element hps_only_master
   {
      datum _sortIndex
      {
         value = "2";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element jtag_uart
   {
      datum _sortIndex
      {
         value = "6";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element jtag_uart.avalon_jtag_slave
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "8192";
         type = "String";
      }
   }
   element led_pio
   {
      datum _sortIndex
      {
         value = "11";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element led_pio.s1
   {
      datum _lockedAddress
      {
         value = "0";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "98304";
         type = "String";
      }
   }
   element mm_bridge_0
   {
      datum _sortIndex
      {
         value = "5";
         type = "int";
      }
   }
   element mm_bridge_0.s0
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
   }
   element ra_backlash_duration
   {
      datum _sortIndex
      {
         value = "39";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_backlash_duration.s1
   {
      datum baseAddress
      {
         value = "192512";
         type = "String";
      }
   }
   element ra_backlash_tick
   {
      datum _sortIndex
      {
         value = "37";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_backlash_tick.s1
   {
      datum baseAddress
      {
         value = "184320";
         type = "String";
      }
   }
   element ra_cmdcontrol
   {
      datum _sortIndex
      {
         value = "29";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_cmdcontrol.s1
   {
      datum baseAddress
      {
         value = "151552";
         type = "String";
      }
   }
   element ra_cmdduration
   {
      datum _sortIndex
      {
         value = "31";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_cmdduration.s1
   {
      datum baseAddress
      {
         value = "159744";
         type = "String";
      }
   }
   element ra_cmdtick
   {
      datum _sortIndex
      {
         value = "35";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_cmdtick.s1
   {
      datum baseAddress
      {
         value = "176128";
         type = "String";
      }
   }
   element ra_count
   {
      datum _sortIndex
      {
         value = "21";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_count.s1
   {
      datum baseAddress
      {
         value = "81920";
         type = "String";
      }
   }
   element ra_counter_load
   {
      datum _sortIndex
      {
         value = "25";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_counter_load.s1
   {
      datum baseAddress
      {
         value = "135168";
         type = "String";
      }
   }
   element ra_counter_max
   {
      datum _sortIndex
      {
         value = "27";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_counter_max.s1
   {
      datum baseAddress
      {
         value = "143360";
         type = "String";
      }
   }
   element ra_status
   {
      datum _sortIndex
      {
         value = "23";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_status.s1
   {
      datum baseAddress
      {
         value = "90112";
         type = "String";
      }
   }
   element ra_trackctrl
   {
      datum _sortIndex
      {
         value = "33";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element ra_trackctrl.s1
   {
      datum baseAddress
      {
         value = "167936";
         type = "String";
      }
   }
   element sts
   {
      datum _sortIndex
      {
         value = "8";
         type = "int";
      }
   }
   element sts.avalon_slave
   {
      datum baseAddress
      {
         value = "327680";
         type = "String";
      }
   }
   element sysid_qsys
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element sysid_qsys.control_slave
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "4096";
         type = "String";
      }
   }
}
]]></parameter>
 <parameter name="clockCrossingAdapter" value="HANDSHAKE" />
 <parameter name="device" value="5CSEBA6U23I7DK" />
 <parameter name="deviceFamily" value="Cyclone V" />
 <parameter name="deviceSpeedGrade" value="7" />
 <parameter name="fabricMode" value="QSYS" />
 <parameter name="generateLegacySim" value="false" />
 <parameter name="generationId" value="0" />
 <parameter name="globalResetBus" value="false" />
 <parameter name="hdlLanguage" value="VERILOG" />
 <parameter name="hideFromIPCatalog" value="false" />
 <parameter name="lockedInterfaceDefinition" value="" />
 <parameter name="maxAdditionalLatency" value="1" />
 <parameter name="projectName">DE10_NANO_SOC_FB.qpf</parameter>
 <parameter name="sopcBorderPoints" value="false" />
 <parameter name="systemHash" value="0" />
 <parameter name="testBenchDutName" value="" />
 <parameter name="timeStamp" value="0" />
 <parameter name="useTestBenchNamingPattern" value="false" />
 <instanceScript></instanceScript>
 <interface
   name="alt_vip_itc_0_clocked_video"
   internal="alt_vip_itc_0.clocked_video"
   type="conduit"
   dir="end" />
 <interface name="buf0" internal="buf0.external_connection" />
 <interface name="buf0_1" internal="buf2.external_connection" />
 <interface name="buf1" internal="buf1.external_connection" />
 <interface
   name="button_pio_external_connection"
   internal="button_pio.external_connection"
   type="conduit"
   dir="end" />
 <interface name="clk" internal="clk_0.clk_in" type="clock" dir="end" />
 <interface
   name="clk_130"
   internal="clock_bridge_0.in_clk"
   type="clock"
   dir="end" />
 <interface
   name="ctrl"
   internal="ctrl.external_interface"
   type="conduit"
   dir="end" />
 <interface
   name="de_backlash_duration"
   internal="de_backlash_duration.external_connection" />
 <interface
   name="de_backlash_tick"
   internal="de_backlash_tick.external_connection" />
 <interface name="de_cmdcontrol" internal="de_cmdcontrol.external_connection" />
 <interface name="de_cmdduration" internal="de_cmdduration.external_connection" />
 <interface name="de_cmdtick" internal="de_cmdtick.external_connection" />
 <interface name="de_count" internal="de_count.external_connection" />
 <interface name="de_counter_load" internal="de_counter_load.external_connection" />
 <interface
   name="de_counter_load_1"
   internal="ra_counter_load.external_connection" />
 <interface name="de_counter_max" internal="de_counter_max.external_connection" />
 <interface name="de_status" internal="de_status.external_connection" />
 <interface name="de_trackctrl" internal="de_trackctrl.external_connection" />
 <interface
   name="dipsw_pio_external_connection"
   internal="dipsw_pio.external_connection"
   type="conduit"
   dir="end" />
 <interface
   name="hps_0_f2h_cold_reset_req"
   internal="hps_0.f2h_cold_reset_req"
   type="reset"
   dir="end" />
 <interface
   name="hps_0_f2h_debug_reset_req"
   internal="hps_0.f2h_debug_reset_req"
   type="reset"
   dir="end" />
 <interface
   name="hps_0_f2h_stm_hw_events"
   internal="hps_0.f2h_stm_hw_events"
   type="conduit"
   dir="end" />
 <interface
   name="hps_0_f2h_warm_reset_req"
   internal="hps_0.f2h_warm_reset_req"
   type="reset"
   dir="end" />
 <interface
   name="hps_0_h2f_reset"
   internal="hps_0.h2f_reset"
   type="reset"
   dir="start" />
 <interface name="hps_0_h2f_user0_clock" internal="hps_0.h2f_user0_clock" />
 <interface name="hps_0_hps_io" internal="hps_0.hps_io" type="conduit" dir="end" />
 <interface
   name="led_pio_external_connection"
   internal="led_pio.external_connection"
   type="conduit"
   dir="end" />
 <interface name="memory" internal="hps_0.memory" type="conduit" dir="end" />
 <interface
   name="ra_backlash_duration"
   internal="ra_backlash_duration.external_connection" />
 <interface
   name="ra_backlash_tick"
   internal="ra_backlash_tick.external_connection" />
 <interface name="ra_cmdcontrol" internal="ra_cmdcontrol.external_connection" />
 <interface name="ra_cmdduration" internal="ra_cmdduration.external_connection" />
 <interface name="ra_cmdtick" internal="ra_cmdtick.external_connection" />
 <interface name="ra_count" internal="ra_count.external_connection" />
 <interface name="ra_counter_max" internal="ra_counter_max.external_connection" />
 <interface name="ra_status" internal="ra_status.external_connection" />
 <interface name="ra_trackctrl" internal="ra_trackctrl.external_connection" />
 <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
 <interface name="sts" internal="sts.external_interface" type="conduit" dir="end" />
 <module
   name="ILC"
   kind="interrupt_latency_counter"
   version="18.1"
   enabled="1">
  <parameter name="CLOCK_RATE" value="50000000" />
  <parameter name="INTR_TYPE" value="0" />
  <parameter name="IRQ_PORT_CNT" value="3" />
 </module>
 <module name="alt_vip_itc_0" kind="alt_vip_itc" version="14.0" enabled="1">
  <parameter name="ACCEPT_COLOURS_IN_SEQ" value="0" />
  <parameter name="ANC_LINE" value="0" />
  <parameter name="AP_LINE" value="0" />
  <parameter name="BPS" value="8" />
  <parameter name="CLOCKS_ARE_SAME" value="0" />
  <parameter name="COLOUR_PLANES_ARE_IN_PARALLEL" value="1" />
  <parameter name="FAMILY" value="Cyclone V" />
  <parameter name="FIELD0_ANC_LINE" value="0" />
  <parameter name="FIELD0_V_BACK_PORCH" value="0" />
  <parameter name="FIELD0_V_BLANK" value="0" />
  <parameter name="FIELD0_V_FRONT_PORCH" value="0" />
  <parameter name="FIELD0_V_RISING_EDGE" value="0" />
  <parameter name="FIELD0_V_SYNC_LENGTH" value="0" />
  <parameter name="FIFO_DEPTH" value="1920" />
  <parameter name="F_FALLING_EDGE" value="0" />
  <parameter name="F_RISING_EDGE" value="0" />
  <parameter name="GENERATE_SYNC" value="0" />
  <parameter name="H_ACTIVE_PIXELS" value="1024" />
  <parameter name="H_BACK_PORCH" value="160" />
  <parameter name="H_BLANK" value="0" />
  <parameter name="H_FRONT_PORCH" value="24" />
  <parameter name="H_SYNC_LENGTH" value="136" />
  <parameter name="INTERLACED" value="0" />
  <parameter name="NO_OF_MODES" value="1" />
  <parameter name="NUMBER_OF_COLOUR_PLANES" value="4" />
  <parameter name="STD_WIDTH" value="1" />
  <parameter name="THRESHOLD" value="1919" />
  <parameter name="USE_CONTROL" value="0" />
  <parameter name="USE_EMBEDDED_SYNCS" value="0" />
  <parameter name="V_ACTIVE_LINES" value="768" />
  <parameter name="V_BACK_PORCH" value="29" />
  <parameter name="V_BLANK" value="0" />
  <parameter name="V_FRONT_PORCH" value="3" />
  <parameter name="V_SYNC_LENGTH" value="6" />
 </module>
 <module name="alt_vip_vfr_hdmi" kind="alt_vip_vfr" version="14.0" enabled="1">
  <parameter name="AUTO_CLOCK_MASTER_CLOCK_RATE" value="50000000" />
  <parameter name="AUTO_CLOCK_RESET_CLOCK_RATE" value="0" />
  <parameter name="BITS_PER_PIXEL_PER_COLOR_PLANE" value="8" />
  <parameter name="CLOCKS_ARE_SEPARATE" value="1" />
  <parameter name="FAMILY" value="Cyclone V" />
  <parameter name="MAX_IMAGE_HEIGHT" value="768" />
  <parameter name="MAX_IMAGE_WIDTH" value="1024" />
  <parameter name="MEM_PORT_WIDTH" value="128" />
  <parameter name="NUMBER_OF_CHANNELS_IN_PARALLEL" value="4" />
  <parameter name="NUMBER_OF_CHANNELS_IN_SEQUENCE" value="1" />
  <parameter name="RMASTER_BURST_TARGET" value="32" />
  <parameter name="RMASTER_FIFO_DEPTH" value="64" />
 </module>
 <module name="buf0" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="buf1" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="buf2" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="button_pio" kind="altera_avalon_pio" version="18.1" enabled="1">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="2" />
 </module>
 <module name="clk_0" kind="clock_source" version="18.1" enabled="1">
  <parameter name="clockFrequency" value="50000000" />
  <parameter name="clockFrequencyKnown" value="true" />
  <parameter name="inputClockFrequency" value="0" />
  <parameter name="resetSynchronousEdges" value="NONE" />
 </module>
 <module
   name="clock_bridge_0"
   kind="altera_clock_bridge"
   version="18.1"
   enabled="1">
  <parameter name="DERIVED_CLOCK_RATE" value="0" />
  <parameter name="EXPLICIT_CLOCK_RATE" value="0" />
  <parameter name="NUM_CLOCK_OUTPUTS" value="1" />
 </module>
 <module
   name="ctrl"
   kind="altera_up_avalon_to_external_bus_bridge"
   version="18.0"
   enabled="1">
  <parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="addr_size" value="1" />
  <parameter name="addr_size_multiplier" value="Kbytes" />
  <parameter name="data_size" value="32" />
 </module>
 <module
   name="de_backlash_duration"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="de_backlash_tick"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="de_cmdcontrol"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="de_cmdduration"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="de_cmdtick" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="de_count" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="de_counter_load"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="de_counter_max"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="de_status" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="de_trackctrl"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="dipsw_pio" kind="altera_avalon_pio" version="18.1" enabled="1">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="ANY" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="4" />
 </module>
 <module
   name="f2sdram_only_master"
   kind="altera_jtag_avalon_master"
   version="18.1"
   enabled="1">
  <parameter name="AUTO_DEVICE" value="5CSEBA6U23I7DK" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
  <parameter name="COMPONENT_CLOCK" value="0" />
  <parameter name="FAST_VER" value="0" />
  <parameter name="FIFO_DEPTHS" value="2" />
  <parameter name="PLI_PORT" value="50000" />
  <parameter name="USE_PLI" value="0" />
 </module>
 <module
   name="fpga_only_master"
   kind="altera_jtag_avalon_master"
   version="18.1"
   enabled="1">
  <parameter name="AUTO_DEVICE" value="5CSEBA6U23I7DK" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
  <parameter name="COMPONENT_CLOCK" value="0" />
  <parameter name="FAST_VER" value="0" />
  <parameter name="FIFO_DEPTHS" value="2" />
  <parameter name="PLI_PORT" value="50000" />
  <parameter name="USE_PLI" value="0" />
 </module>
 <module name="hps_0" kind="altera_hps" version="18.1" enabled="1">
  <parameter name="ABSTRACT_REAL_COMPARE_TEST" value="false" />
  <parameter name="ABS_RAM_MEM_INIT_FILENAME" value="meminit" />
  <parameter name="ACV_PHY_CLK_ADD_FR_PHASE" value="0.0" />
  <parameter name="AC_PACKAGE_DESKEW" value="false" />
  <parameter name="AC_ROM_USER_ADD_0" value="0_0000_0000_0000" />
  <parameter name="AC_ROM_USER_ADD_1" value="0_0000_0000_1000" />
  <parameter name="ADDR_ORDER" value="0" />
  <parameter name="ADD_EFFICIENCY_MONITOR" value="false" />
  <parameter name="ADD_EXTERNAL_SEQ_DEBUG_NIOS" value="false" />
  <parameter name="ADVANCED_CK_PHASES" value="false" />
  <parameter name="ADVERTIZE_SEQUENCER_SW_BUILD_FILES" value="false" />
  <parameter name="AFI_DEBUG_INFO_WIDTH" value="32" />
  <parameter name="ALTMEMPHY_COMPATIBLE_MODE" value="false" />
  <parameter name="AP_MODE" value="false" />
  <parameter name="AP_MODE_EN" value="0" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
  <parameter name="AUTO_PD_CYCLES" value="0" />
  <parameter name="AUTO_POWERDN_EN" value="false" />
  <parameter name="AVL_DATA_WIDTH_PORT" value="32,32,32,32,32,32" />
  <parameter name="AVL_MAX_SIZE" value="4" />
  <parameter name="BONDING_OUT_ENABLED" value="false" />
  <parameter name="BOOTFROMFPGA_Enable" value="false" />
  <parameter name="BSEL" value="1" />
  <parameter name="BSEL_EN" value="false" />
  <parameter name="BYTE_ENABLE" value="true" />
  <parameter name="C2P_WRITE_CLOCK_ADD_PHASE" value="0.0" />
  <parameter name="CALIBRATION_MODE" value="Skip" />
  <parameter name="CALIB_REG_WIDTH" value="8" />
  <parameter name="CAN0_Mode" value="N/A" />
  <parameter name="CAN0_PinMuxing" value="Unused" />
  <parameter name="CAN1_Mode" value="N/A" />
  <parameter name="CAN1_PinMuxing" value="Unused" />
  <parameter name="CFG_DATA_REORDERING_TYPE" value="INTER_BANK" />
  <parameter name="CFG_REORDER_DATA" value="true" />
  <parameter name="CFG_TCCD_NS" value="2.5" />
  <parameter name="COMMAND_PHASE" value="0.0" />
  <parameter name="CONTROLLER_LATENCY" value="5" />
  <parameter name="CORE_DEBUG_CONNECTION" value="EXPORT" />
  <parameter name="CPORT_TYPE_PORT">Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional,Bidirectional</parameter>
  <parameter name="CSEL" value="0" />
  <parameter name="CSEL_EN" value="false" />
  <parameter name="CTI_Enable" value="false" />
  <parameter name="CTL_AUTOPCH_EN" value="false" />
  <parameter name="CTL_CMD_QUEUE_DEPTH" value="8" />
  <parameter name="CTL_CSR_CONNECTION" value="INTERNAL_JTAG" />
  <parameter name="CTL_CSR_ENABLED" value="false" />
  <parameter name="CTL_CSR_READ_ONLY" value="1" />
  <parameter name="CTL_DEEP_POWERDN_EN" value="false" />
  <parameter name="CTL_DYNAMIC_BANK_ALLOCATION" value="false" />
  <parameter name="CTL_DYNAMIC_BANK_NUM" value="4" />
  <parameter name="CTL_ECC_AUTO_CORRECTION_ENABLED" value="false" />
  <parameter name="CTL_ECC_ENABLED" value="false" />
  <parameter name="CTL_ENABLE_BURST_INTERRUPT" value="true" />
  <parameter name="CTL_ENABLE_BURST_TERMINATE" value="true" />
  <parameter name="CTL_HRB_ENABLED" value="false" />
  <parameter name="CTL_LOOK_AHEAD_DEPTH" value="4" />
  <parameter name="CTL_SELF_REFRESH_EN" value="false" />
  <parameter name="CTL_USR_REFRESH_EN" value="false" />
  <parameter name="CTL_ZQCAL_EN" value="false" />
  <parameter name="CUT_NEW_FAMILY_TIMING" value="true" />
  <parameter name="DAT_DATA_WIDTH" value="32" />
  <parameter name="DEBUGAPB_Enable" value="false" />
  <parameter name="DEBUG_MODE" value="false" />
  <parameter name="DEVICE_DEPTH" value="1" />
  <parameter name="DEVICE_FAMILY_PARAM" value="" />
  <parameter name="DISABLE_CHILD_MESSAGING" value="false" />
  <parameter name="DISCRETE_FLY_BY" value="true" />
  <parameter name="DLL_SHARING_MODE" value="None" />
  <parameter name="DMA_Enable">No,No,No,No,No,No,No,No</parameter>
  <parameter name="DQS_DQSN_MODE" value="DIFFERENTIAL" />
  <parameter name="DQ_INPUT_REG_USE_CLKN" value="false" />
  <parameter name="DUPLICATE_AC" value="false" />
  <parameter name="ED_EXPORT_SEQ_DEBUG" value="false" />
  <parameter name="EMAC0_Mode" value="N/A" />
  <parameter name="EMAC0_PTP" value="false" />
  <parameter name="EMAC0_PinMuxing" value="Unused" />
  <parameter name="EMAC1_Mode" value="RGMII" />
  <parameter name="EMAC1_PTP" value="false" />
  <parameter name="EMAC1_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="ENABLE_ABS_RAM_MEM_INIT" value="false" />
  <parameter name="ENABLE_BONDING" value="false" />
  <parameter name="ENABLE_BURST_MERGE" value="false" />
  <parameter name="ENABLE_CTRL_AVALON_INTERFACE" value="true" />
  <parameter name="ENABLE_DELAY_CHAIN_WRITE" value="false" />
  <parameter name="ENABLE_EMIT_BFM_MASTER" value="false" />
  <parameter name="ENABLE_EXPORT_SEQ_DEBUG_BRIDGE" value="false" />
  <parameter name="ENABLE_EXTRA_REPORTING" value="false" />
  <parameter name="ENABLE_ISS_PROBES" value="false" />
  <parameter name="ENABLE_NON_DESTRUCTIVE_CALIB" value="false" />
  <parameter name="ENABLE_NON_DES_CAL" value="false" />
  <parameter name="ENABLE_NON_DES_CAL_TEST" value="false" />
  <parameter name="ENABLE_SEQUENCER_MARGINING_ON_BY_DEFAULT" value="false" />
  <parameter name="ENABLE_USER_ECC" value="false" />
  <parameter name="EXPORT_AFI_HALF_CLK" value="false" />
  <parameter name="EXTRA_SETTINGS" value="" />
  <parameter name="F2H_AXI_CLOCK_FREQ" value="50000000" />
  <parameter name="F2H_SDRAM0_CLOCK_FREQ" value="50000000" />
  <parameter name="F2H_SDRAM1_CLOCK_FREQ" value="100" />
  <parameter name="F2H_SDRAM2_CLOCK_FREQ" value="100" />
  <parameter name="F2H_SDRAM3_CLOCK_FREQ" value="100" />
  <parameter name="F2H_SDRAM4_CLOCK_FREQ" value="100" />
  <parameter name="F2H_SDRAM5_CLOCK_FREQ" value="100" />
  <parameter name="F2SCLK_COLDRST_Enable" value="true" />
  <parameter name="F2SCLK_DBGRST_Enable" value="true" />
  <parameter name="F2SCLK_PERIPHCLK_Enable" value="false" />
  <parameter name="F2SCLK_PERIPHCLK_FREQ" value="0" />
  <parameter name="F2SCLK_SDRAMCLK_Enable" value="false" />
  <parameter name="F2SCLK_SDRAMCLK_FREQ" value="0" />
  <parameter name="F2SCLK_WARMRST_Enable" value="true" />
  <parameter name="F2SDRAM_Type">Avalon-MM Bidirectional</parameter>
  <parameter name="F2SDRAM_Width" value="256" />
  <parameter name="F2SINTERRUPT_Enable" value="true" />
  <parameter name="F2S_Width" value="3" />
  <parameter name="FIX_READ_LATENCY" value="8" />
  <parameter name="FORCED_NON_LDC_ADDR_CMD_MEM_CK_INVERT" value="false" />
  <parameter name="FORCED_NUM_WRITE_FR_CYCLE_SHIFTS" value="0" />
  <parameter name="FORCE_DQS_TRACKING" value="AUTO" />
  <parameter name="FORCE_MAX_LATENCY_COUNT_WIDTH" value="0" />
  <parameter name="FORCE_SEQUENCER_TCL_DEBUG_MODE" value="false" />
  <parameter name="FORCE_SHADOW_REGS" value="AUTO" />
  <parameter name="FORCE_SYNTHESIS_LANGUAGE" value="" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC0_RX_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC0_TX_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC1_RX_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC1_TX_CLK_IN" value="100" />
  <parameter
     name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_EMAC_PTP_REF_CLOCK"
     value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C0_SCL_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C1_SCL_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C2_SCL_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_I2C3_SCL_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_SPIS0_SCLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_SPIS1_SCLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_USB0_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_INPUT_CLOCK_FREQ_USB1_CLK_IN" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC0_GTX_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC0_MD_CLK" value="100.0" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC1_GTX_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_EMAC1_MD_CLK" value="100.0" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C0_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C1_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C2_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_I2C3_CLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_QSPI_SCLK_OUT" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SDIO_CCLK" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SPIM0_SCLK_OUT" value="100" />
  <parameter name="FPGA_PERIPHERAL_OUTPUT_CLOCK_FREQ_SPIM1_SCLK_OUT" value="100" />
  <parameter name="GPIO_Enable">No,No,No,No,No,No,No,No,No,Yes,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,Yes,No,No,No,No,Yes,No,No,No,No,No,No,No,No,No,No,No,No,Yes,Yes,No,No,No,No,No,No,Yes,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No</parameter>
  <parameter name="GP_Enable" value="false" />
  <parameter name="H2F_AXI_CLOCK_FREQ" value="50000000" />
  <parameter name="H2F_CTI_CLOCK_FREQ" value="100" />
  <parameter name="H2F_DEBUG_APB_CLOCK_FREQ" value="100" />
  <parameter name="H2F_LW_AXI_CLOCK_FREQ" value="50000000" />
  <parameter name="H2F_TPIU_CLOCK_IN_FREQ" value="100" />
  <parameter name="HARD_EMIF" value="true" />
  <parameter name="HCX_COMPAT_MODE" value="false" />
  <parameter name="HHP_HPS" value="true" />
  <parameter name="HHP_HPS_SIMULATION" value="false" />
  <parameter name="HHP_HPS_VERIFICATION" value="false" />
  <parameter name="HLGPI_Enable" value="false" />
  <parameter name="HPS_PROTOCOL" value="DDR3" />
  <parameter name="I2C0_Mode" value="I2C" />
  <parameter name="I2C0_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="I2C1_Mode" value="I2C" />
  <parameter name="I2C1_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="I2C2_Mode" value="N/A" />
  <parameter name="I2C2_PinMuxing" value="Unused" />
  <parameter name="I2C3_Mode" value="N/A" />
  <parameter name="I2C3_PinMuxing" value="Unused" />
  <parameter name="INCLUDE_BOARD_DELAY_MODEL" value="false" />
  <parameter name="INCLUDE_MULTIRANK_BOARD_DELAY_MODEL" value="false" />
  <parameter name="IS_ES_DEVICE" value="false" />
  <parameter name="LOANIO_Enable">No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No,No</parameter>
  <parameter name="LOCAL_ID_WIDTH" value="8" />
  <parameter name="LRDIMM_EXTENDED_CONFIG">0x000000000000000000</parameter>
  <parameter name="LWH2F_Enable" value="true" />
  <parameter name="MARGIN_VARIATION_TEST" value="false" />
  <parameter name="MAX_PENDING_RD_CMD" value="16" />
  <parameter name="MAX_PENDING_WR_CMD" value="8" />
  <parameter name="MEM_ASR" value="Manual" />
  <parameter name="MEM_ATCL" value="Disabled" />
  <parameter name="MEM_AUTO_LEVELING_MODE" value="true" />
  <parameter name="MEM_BANKADDR_WIDTH" value="3" />
  <parameter name="MEM_BL" value="OTF" />
  <parameter name="MEM_BT" value="Sequential" />
  <parameter name="MEM_CK_PHASE" value="0.0" />
  <parameter name="MEM_CK_WIDTH" value="1" />
  <parameter name="MEM_CLK_EN_WIDTH" value="1" />
  <parameter name="MEM_CLK_FREQ" value="400.0" />
  <parameter name="MEM_CLK_FREQ_MAX" value="800.0" />
  <parameter name="MEM_COL_ADDR_WIDTH" value="10" />
  <parameter name="MEM_CS_WIDTH" value="1" />
  <parameter name="MEM_DEVICE" value="MISSING_MODEL" />
  <parameter name="MEM_DLL_EN" value="true" />
  <parameter name="MEM_DQ_PER_DQS" value="8" />
  <parameter name="MEM_DQ_WIDTH" value="32" />
  <parameter name="MEM_DRV_STR" value="RZQ/6" />
  <parameter name="MEM_FORMAT" value="DISCRETE" />
  <parameter name="MEM_GUARANTEED_WRITE_INIT" value="false" />
  <parameter name="MEM_IF_BOARD_BASE_DELAY" value="10" />
  <parameter name="MEM_IF_DM_PINS_EN" value="true" />
  <parameter name="MEM_IF_DQSN_EN" value="true" />
  <parameter name="MEM_IF_SIM_VALID_WINDOW" value="0" />
  <parameter name="MEM_INIT_EN" value="false" />
  <parameter name="MEM_INIT_FILE" value="" />
  <parameter name="MEM_MIRROR_ADDRESSING" value="0" />
  <parameter name="MEM_NUMBER_OF_DIMMS" value="1" />
  <parameter name="MEM_NUMBER_OF_RANKS_PER_DEVICE" value="1" />
  <parameter name="MEM_NUMBER_OF_RANKS_PER_DIMM" value="1" />
  <parameter name="MEM_PD" value="DLL off" />
  <parameter name="MEM_RANK_MULTIPLICATION_FACTOR" value="1" />
  <parameter name="MEM_ROW_ADDR_WIDTH" value="15" />
  <parameter name="MEM_RTT_NOM" value="RZQ/6" />
  <parameter name="MEM_RTT_WR" value="Dynamic ODT off" />
  <parameter name="MEM_SRT" value="Normal" />
  <parameter name="MEM_TCL" value="7" />
  <parameter name="MEM_TFAW_NS" value="37.5" />
  <parameter name="MEM_TINIT_US" value="500" />
  <parameter name="MEM_TMRD_CK" value="4" />
  <parameter name="MEM_TRAS_NS" value="35.0" />
  <parameter name="MEM_TRCD_NS" value="13.75" />
  <parameter name="MEM_TREFI_US" value="7.8" />
  <parameter name="MEM_TRFC_NS" value="300.0" />
  <parameter name="MEM_TRP_NS" value="13.75" />
  <parameter name="MEM_TRRD_NS" value="7.5" />
  <parameter name="MEM_TRTP_NS" value="7.5" />
  <parameter name="MEM_TWR_NS" value="15.0" />
  <parameter name="MEM_TWTR" value="4" />
  <parameter name="MEM_USER_LEVELING_MODE" value="Leveling" />
  <parameter name="MEM_VENDOR" value="Other" />
  <parameter name="MEM_VERBOSE" value="true" />
  <parameter name="MEM_VOLTAGE" value="1.5V DDR3" />
  <parameter name="MEM_WTCL" value="7" />
  <parameter name="MPU_EVENTS_Enable" value="false" />
  <parameter name="MRS_MIRROR_PING_PONG_ATSO" value="false" />
  <parameter name="MULTICAST_EN" value="false" />
  <parameter name="NAND_Mode" value="N/A" />
  <parameter name="NAND_PinMuxing" value="Unused" />
  <parameter name="NEXTGEN" value="true" />
  <parameter name="NIOS_ROM_DATA_WIDTH" value="32" />
  <parameter name="NUM_DLL_SHARING_INTERFACES" value="1" />
  <parameter name="NUM_EXTRA_REPORT_PATH" value="10" />
  <parameter name="NUM_OCT_SHARING_INTERFACES" value="1" />
  <parameter name="NUM_OF_PORTS" value="1" />
  <parameter name="NUM_PLL_SHARING_INTERFACES" value="1" />
  <parameter name="OCT_SHARING_MODE" value="None" />
  <parameter name="P2C_READ_CLOCK_ADD_PHASE" value="0.0" />
  <parameter name="PACKAGE_DESKEW" value="false" />
  <parameter name="PARSE_FRIENDLY_DEVICE_FAMILY_PARAM" value="" />
  <parameter name="PARSE_FRIENDLY_DEVICE_FAMILY_PARAM_VALID" value="false" />
  <parameter name="PHY_CSR_CONNECTION" value="INTERNAL_JTAG" />
  <parameter name="PHY_CSR_ENABLED" value="false" />
  <parameter name="PHY_ONLY" value="false" />
  <parameter name="PINGPONGPHY_EN" value="false" />
  <parameter name="PLL_ADDR_CMD_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_ADDR_CMD_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_ADDR_CMD_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_ADDR_CMD_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_ADDR_CMD_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_ADDR_CMD_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_AFI_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_AFI_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_AFI_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_AFI_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_HALF_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_AFI_HALF_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_AFI_HALF_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_HALF_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_AFI_HALF_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_AFI_HALF_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_PHY_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_AFI_PHY_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_AFI_PHY_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_AFI_PHY_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_AFI_PHY_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_AFI_PHY_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_C2P_WRITE_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_C2P_WRITE_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_C2P_WRITE_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_C2P_WRITE_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_C2P_WRITE_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_C2P_WRITE_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_CLK_PARAM_VALID" value="false" />
  <parameter name="PLL_CONFIG_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_CONFIG_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_CONFIG_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_CONFIG_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_CONFIG_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_CONFIG_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_DR_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_DR_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_DR_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_DR_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_DR_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_DR_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_HR_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_HR_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_HR_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_HR_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_HR_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_HR_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_LOCATION" value="Top_Bottom" />
  <parameter name="PLL_MEM_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_MEM_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_MEM_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_MEM_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_MEM_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_MEM_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_NIOS_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_NIOS_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_NIOS_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_NIOS_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_NIOS_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_NIOS_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_P2C_READ_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_P2C_READ_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_P2C_READ_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_P2C_READ_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_P2C_READ_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_P2C_READ_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="PLL_SHARING_MODE" value="None" />
  <parameter name="PLL_WRITE_CLK_DIV_PARAM" value="0" />
  <parameter name="PLL_WRITE_CLK_FREQ_PARAM" value="0.0" />
  <parameter name="PLL_WRITE_CLK_FREQ_SIM_STR_PARAM" value="" />
  <parameter name="PLL_WRITE_CLK_MULT_PARAM" value="0" />
  <parameter name="PLL_WRITE_CLK_PHASE_PS_PARAM" value="0" />
  <parameter name="PLL_WRITE_CLK_PHASE_PS_SIM_STR_PARAM" value="" />
  <parameter name="POWER_OF_TWO_BUS" value="false" />
  <parameter name="PRIORITY_PORT" value="1,1,1,1,1,1" />
  <parameter name="QSPI_Mode" value="N/A" />
  <parameter name="QSPI_PinMuxing" value="Unused" />
  <parameter name="RATE" value="Full" />
  <parameter name="RDIMM_CONFIG" value="0000000000000000" />
  <parameter name="READ_DQ_DQS_CLOCK_SOURCE" value="INVERTED_DQS_BUS" />
  <parameter name="READ_FIFO_SIZE" value="8" />
  <parameter name="REFRESH_BURST_VALIDATION" value="false" />
  <parameter name="REFRESH_INTERVAL" value="15000" />
  <parameter name="REF_CLK_FREQ" value="25.0" />
  <parameter name="REF_CLK_FREQ_MAX_PARAM" value="0.0" />
  <parameter name="REF_CLK_FREQ_MIN_PARAM" value="0.0" />
  <parameter name="REF_CLK_FREQ_PARAM_VALID" value="false" />
  <parameter name="S2FCLK_COLDRST_Enable" value="false" />
  <parameter name="S2FCLK_PENDINGRST_Enable" value="false" />
  <parameter name="S2FCLK_USER0CLK_Enable" value="false" />
  <parameter name="S2FCLK_USER1CLK_Enable" value="false" />
  <parameter name="S2FCLK_USER1CLK_FREQ" value="100.0" />
  <parameter name="S2FCLK_USER2CLK" value="4" />
  <parameter name="S2FCLK_USER2CLK_Enable" value="false" />
  <parameter name="S2FCLK_USER2CLK_FREQ" value="100.0" />
  <parameter name="S2FINTERRUPT_CAN_Enable" value="false" />
  <parameter name="S2FINTERRUPT_CLOCKPERIPHERAL_Enable" value="false" />
  <parameter name="S2FINTERRUPT_CTI_Enable" value="false" />
  <parameter name="S2FINTERRUPT_DMA_Enable" value="false" />
  <parameter name="S2FINTERRUPT_EMAC_Enable" value="false" />
  <parameter name="S2FINTERRUPT_FPGAMANAGER_Enable" value="false" />
  <parameter name="S2FINTERRUPT_GPIO_Enable" value="false" />
  <parameter name="S2FINTERRUPT_I2CEMAC_Enable" value="false" />
  <parameter name="S2FINTERRUPT_I2CPERIPHERAL_Enable" value="false" />
  <parameter name="S2FINTERRUPT_L4TIMER_Enable" value="false" />
  <parameter name="S2FINTERRUPT_NAND_Enable" value="false" />
  <parameter name="S2FINTERRUPT_OSCTIMER_Enable" value="false" />
  <parameter name="S2FINTERRUPT_QSPI_Enable" value="false" />
  <parameter name="S2FINTERRUPT_SDMMC_Enable" value="false" />
  <parameter name="S2FINTERRUPT_SPIMASTER_Enable" value="false" />
  <parameter name="S2FINTERRUPT_SPISLAVE_Enable" value="false" />
  <parameter name="S2FINTERRUPT_UART_Enable" value="false" />
  <parameter name="S2FINTERRUPT_USB_Enable" value="false" />
  <parameter name="S2FINTERRUPT_WATCHDOG_Enable" value="false" />
  <parameter name="S2F_Width" value="2" />
  <parameter name="SDIO_Mode" value="4-bit Data" />
  <parameter name="SDIO_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="SEQUENCER_TYPE" value="NIOS" />
  <parameter name="SEQ_MODE" value="0" />
  <parameter name="SKIP_MEM_INIT" value="true" />
  <parameter name="SOPC_COMPAT_RESET" value="false" />
  <parameter name="SPEED_GRADE" value="7" />
  <parameter name="SPIM0_Mode" value="N/A" />
  <parameter name="SPIM0_PinMuxing" value="Unused" />
  <parameter name="SPIM1_Mode" value="Single Slave Select" />
  <parameter name="SPIM1_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="SPIS0_Mode" value="N/A" />
  <parameter name="SPIS0_PinMuxing" value="Unused" />
  <parameter name="SPIS1_Mode" value="N/A" />
  <parameter name="SPIS1_PinMuxing" value="Unused" />
  <parameter name="STARVE_LIMIT" value="10" />
  <parameter name="STM_Enable" value="true" />
  <parameter name="SYS_INFO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="TEST_Enable" value="false" />
  <parameter name="TIMING_BOARD_AC_EYE_REDUCTION_H" value="0.0" />
  <parameter name="TIMING_BOARD_AC_EYE_REDUCTION_SU" value="0.0" />
  <parameter name="TIMING_BOARD_AC_SKEW" value="0.02" />
  <parameter name="TIMING_BOARD_AC_SLEW_RATE" value="1.0" />
  <parameter name="TIMING_BOARD_AC_TO_CK_SKEW" value="0.0" />
  <parameter name="TIMING_BOARD_CK_CKN_SLEW_RATE" value="2.0" />
  <parameter name="TIMING_BOARD_DELTA_DQS_ARRIVAL_TIME" value="0.0" />
  <parameter name="TIMING_BOARD_DELTA_READ_DQS_ARRIVAL_TIME" value="0.0" />
  <parameter name="TIMING_BOARD_DERATE_METHOD" value="AUTO" />
  <parameter name="TIMING_BOARD_DQS_DQSN_SLEW_RATE" value="2.0" />
  <parameter name="TIMING_BOARD_DQ_EYE_REDUCTION" value="0.0" />
  <parameter name="TIMING_BOARD_DQ_SLEW_RATE" value="1.0" />
  <parameter name="TIMING_BOARD_DQ_TO_DQS_SKEW" value="0.0" />
  <parameter name="TIMING_BOARD_ISI_METHOD" value="AUTO" />
  <parameter name="TIMING_BOARD_MAX_CK_DELAY" value="0.6" />
  <parameter name="TIMING_BOARD_MAX_DQS_DELAY" value="0.6" />
  <parameter name="TIMING_BOARD_READ_DQ_EYE_REDUCTION" value="0.0" />
  <parameter name="TIMING_BOARD_SKEW_BETWEEN_DIMMS" value="0.05" />
  <parameter name="TIMING_BOARD_SKEW_BETWEEN_DQS" value="0.02" />
  <parameter name="TIMING_BOARD_SKEW_CKDQS_DIMM_MAX" value="0.01" />
  <parameter name="TIMING_BOARD_SKEW_CKDQS_DIMM_MIN" value="-0.01" />
  <parameter name="TIMING_BOARD_SKEW_WITHIN_DQS" value="0.02" />
  <parameter name="TIMING_BOARD_TDH" value="0.0" />
  <parameter name="TIMING_BOARD_TDS" value="0.0" />
  <parameter name="TIMING_BOARD_TIH" value="0.0" />
  <parameter name="TIMING_BOARD_TIS" value="0.0" />
  <parameter name="TIMING_TDH" value="125" />
  <parameter name="TIMING_TDQSCK" value="400" />
  <parameter name="TIMING_TDQSCKDL" value="1200" />
  <parameter name="TIMING_TDQSCKDM" value="900" />
  <parameter name="TIMING_TDQSCKDS" value="450" />
  <parameter name="TIMING_TDQSH" value="0.35" />
  <parameter name="TIMING_TDQSQ" value="120" />
  <parameter name="TIMING_TDQSS" value="0.25" />
  <parameter name="TIMING_TDS" value="50" />
  <parameter name="TIMING_TDSH" value="0.2" />
  <parameter name="TIMING_TDSS" value="0.2" />
  <parameter name="TIMING_TIH" value="250" />
  <parameter name="TIMING_TIS" value="175" />
  <parameter name="TIMING_TQH" value="0.38" />
  <parameter name="TIMING_TQHS" value="300" />
  <parameter name="TIMING_TQSH" value="0.38" />
  <parameter name="TPIUFPGA_Enable" value="false" />
  <parameter name="TPIUFPGA_alt" value="false" />
  <parameter name="TRACE_Mode" value="N/A" />
  <parameter name="TRACE_PinMuxing" value="Unused" />
  <parameter name="TRACKING_ERROR_TEST" value="false" />
  <parameter name="TRACKING_WATCH_TEST" value="false" />
  <parameter name="TREFI" value="35100" />
  <parameter name="TRFC" value="350" />
  <parameter name="UART0_Mode" value="No Flow Control" />
  <parameter name="UART0_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="UART1_Mode" value="N/A" />
  <parameter name="UART1_PinMuxing" value="Unused" />
  <parameter name="USB0_Mode" value="N/A" />
  <parameter name="USB0_PinMuxing" value="Unused" />
  <parameter name="USB1_Mode" value="SDR" />
  <parameter name="USB1_PinMuxing" value="HPS I/O Set 0" />
  <parameter name="USER_DEBUG_LEVEL" value="1" />
  <parameter name="USE_AXI_ADAPTOR" value="false" />
  <parameter name="USE_FAKE_PHY" value="false" />
  <parameter name="USE_MEM_CLK_FREQ" value="false" />
  <parameter name="USE_MM_ADAPTOR" value="true" />
  <parameter name="USE_SEQUENCER_BFM" value="false" />
  <parameter name="WEIGHT_PORT" value="0,0,0,0,0,0" />
  <parameter name="WRBUFFER_ADDR_WIDTH" value="6" />
  <parameter name="can0_clk_div" value="1" />
  <parameter name="can1_clk_div" value="1" />
  <parameter name="configure_advanced_parameters" value="false" />
  <parameter name="customize_device_pll_info" value="false" />
  <parameter name="dbctrl_stayosc1" value="true" />
  <parameter name="dbg_at_clk_div" value="0" />
  <parameter name="dbg_clk_div" value="1" />
  <parameter name="dbg_trace_clk_div" value="0" />
  <parameter name="desired_can0_clk_mhz" value="100.0" />
  <parameter name="desired_can1_clk_mhz" value="100.0" />
  <parameter name="desired_cfg_clk_mhz" value="100.0" />
  <parameter name="desired_emac0_clk_mhz" value="250.0" />
  <parameter name="desired_emac1_clk_mhz" value="250.0" />
  <parameter name="desired_gpio_db_clk_hz" value="32000" />
  <parameter name="desired_l4_mp_clk_mhz" value="100.0" />
  <parameter name="desired_l4_sp_clk_mhz" value="100.0" />
  <parameter name="desired_mpu_clk_mhz" value="800.0" />
  <parameter name="desired_nand_clk_mhz" value="12.5" />
  <parameter name="desired_qspi_clk_mhz" value="370.0" />
  <parameter name="desired_sdmmc_clk_mhz" value="200.0" />
  <parameter name="desired_spi_m_clk_mhz" value="200.0" />
  <parameter name="desired_usb_mp_clk_mhz" value="200.0" />
  <parameter name="device_name" value="5CSEBA6U23I7DK" />
  <parameter name="device_pll_info_manual">{320000000 1600000000} {320000000 1000000000} {800000000 400000000 400000000}</parameter>
  <parameter name="eosc1_clk_mhz" value="25.0" />
  <parameter name="eosc2_clk_mhz" value="25.0" />
  <parameter name="gpio_db_clk_div" value="6249" />
  <parameter name="l3_mp_clk_div" value="1" />
  <parameter name="l3_sp_clk_div" value="1" />
  <parameter name="l4_mp_clk_div" value="1" />
  <parameter name="l4_mp_clk_source" value="1" />
  <parameter name="l4_sp_clk_div" value="1" />
  <parameter name="l4_sp_clk_source" value="1" />
  <parameter name="main_pll_c3" value="3" />
  <parameter name="main_pll_c4" value="3" />
  <parameter name="main_pll_c5" value="15" />
  <parameter name="main_pll_m" value="63" />
  <parameter name="main_pll_n" value="0" />
  <parameter name="nand_clk_source" value="2" />
  <parameter name="periph_pll_c0" value="3" />
  <parameter name="periph_pll_c1" value="3" />
  <parameter name="periph_pll_c2" value="1" />
  <parameter name="periph_pll_c3" value="19" />
  <parameter name="periph_pll_c4" value="4" />
  <parameter name="periph_pll_c5" value="9" />
  <parameter name="periph_pll_m" value="79" />
  <parameter name="periph_pll_n" value="1" />
  <parameter name="periph_pll_source" value="0" />
  <parameter name="qspi_clk_source" value="1" />
  <parameter name="quartus_ini_hps_emif_pll" value="false" />
  <parameter
     name="quartus_ini_hps_ip_enable_all_peripheral_fpga_interfaces"
     value="false" />
  <parameter name="quartus_ini_hps_ip_enable_bsel_csel" value="false" />
  <parameter
     name="quartus_ini_hps_ip_enable_emac0_peripheral_fpga_interface"
     value="false" />
  <parameter
     name="quartus_ini_hps_ip_enable_low_speed_serial_fpga_interfaces"
     value="false" />
  <parameter name="quartus_ini_hps_ip_enable_test_interface" value="false" />
  <parameter name="quartus_ini_hps_ip_f2sdram_bonding_out" value="false" />
  <parameter name="quartus_ini_hps_ip_fast_f2sdram_sim_model" value="false" />
  <parameter name="quartus_ini_hps_ip_suppress_sdram_synth" value="false" />
  <parameter name="sdmmc_clk_source" value="2" />
  <parameter name="show_advanced_parameters" value="false" />
  <parameter name="show_debug_info_as_warning_msg" value="false" />
  <parameter name="show_warning_as_error_msg" value="false" />
  <parameter name="spi_m_clk_div" value="0" />
  <parameter name="usb_mp_clk_div" value="0" />
  <parameter name="use_default_mpu_clk" value="true" />
 </module>
 <module
   name="hps_only_master"
   kind="altera_jtag_avalon_master"
   version="18.1"
   enabled="1">
  <parameter name="AUTO_DEVICE" value="5CSEBA6U23I7DK" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="AUTO_DEVICE_SPEEDGRADE" value="7" />
  <parameter name="COMPONENT_CLOCK" value="0" />
  <parameter name="FAST_VER" value="0" />
  <parameter name="FIFO_DEPTHS" value="2" />
  <parameter name="PLI_PORT" value="50000" />
  <parameter name="USE_PLI" value="0" />
 </module>
 <module
   name="jtag_uart"
   kind="altera_avalon_jtag_uart"
   version="18.1"
   enabled="1">
  <parameter name="allowMultipleConnections" value="true" />
  <parameter name="avalonSpec" value="2.0" />
  <parameter name="clkFreq" value="50000000" />
  <parameter name="hubInstanceID" value="0" />
  <parameter name="readBufferDepth" value="64" />
  <parameter name="readIRQThreshold" value="8" />
  <parameter name="simInputCharacterStream" value="" />
  <parameter name="simInteractiveOptions">INTERACTIVE_ASCII_OUTPUT</parameter>
  <parameter name="useRegistersForReadBuffer" value="false" />
  <parameter name="useRegistersForWriteBuffer" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
  <parameter name="writeBufferDepth" value="64" />
  <parameter name="writeIRQThreshold" value="8" />
 </module>
 <module name="led_pio" kind="altera_avalon_pio" version="18.1" enabled="1">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="127" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="7" />
 </module>
 <module
   name="mm_bridge_0"
   kind="altera_avalon_mm_bridge"
   version="18.1"
   enabled="1">
  <parameter name="ADDRESS_UNITS" value="SYMBOLS" />
  <parameter name="ADDRESS_WIDTH" value="10" />
  <parameter name="DATA_WIDTH" value="32" />
  <parameter name="LINEWRAPBURSTS" value="0" />
  <parameter name="MAX_BURST_SIZE" value="1" />
  <parameter name="MAX_PENDING_RESPONSES" value="4" />
  <parameter name="PIPELINE_COMMAND" value="1" />
  <parameter name="PIPELINE_RESPONSE" value="1" />
  <parameter name="SYMBOL_WIDTH" value="8" />
  <parameter name="SYSINFO_ADDR_WIDTH" value="19" />
  <parameter name="USE_AUTO_ADDRESS_WIDTH" value="1" />
  <parameter name="USE_RESPONSE" value="0" />
 </module>
 <module
   name="ra_backlash_duration"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="ra_backlash_tick"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="ra_cmdcontrol"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="ra_cmdduration"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="ra_cmdtick" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="ra_count" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="ra_counter_load"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="ra_counter_max"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module name="ra_status" kind="altera_avalon_pio" version="18.1" enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Input" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="ra_trackctrl"
   kind="altera_avalon_pio"
   version="18.1"
   enabled="0">
  <parameter name="bitClearingEdgeCapReg" value="true" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="true" />
  <parameter name="clockRate" value="50000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="FALLING" />
  <parameter name="generateIRQ" value="true" />
  <parameter name="irqType" value="EDGE" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module
   name="sts"
   kind="altera_up_avalon_to_external_bus_bridge"
   version="18.0"
   enabled="1">
  <parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
  <parameter name="AUTO_DEVICE_FAMILY" value="Cyclone V" />
  <parameter name="addr_size" value="1" />
  <parameter name="addr_size_multiplier" value="Kbytes" />
  <parameter name="data_size" value="32" />
 </module>
 <module
   name="sysid_qsys"
   kind="altera_avalon_sysid_qsys"
   version="18.1"
   enabled="1">
  <parameter name="id" value="-1395322110" />
 </module>
 <connection
   kind="avalon"
   version="18.1"
   start="alt_vip_vfr_hdmi.avalon_master"
   end="hps_0.f2h_axi_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="hps_0.h2f_lw_axi_master"
   end="mm_bridge_0.s0">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="jtag_uart.avalon_jtag_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x2000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ILC.avalon_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00030000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="alt_vip_vfr_hdmi.avalon_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00031000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="sts.avalon_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00050000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ctrl.avalon_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00060000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="sysid_qsys.control_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection kind="avalon" version="18.1" start="mm_bridge_0.m0" end="led_pio.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00018000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="dipsw_pio.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x4000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="button_pio.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x5000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection kind="avalon" version="18.1" start="mm_bridge_0.m0" end="buf2.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00010000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection kind="avalon" version="18.1" start="mm_bridge_0.m0" end="buf1.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00011000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection kind="avalon" version="18.1" start="mm_bridge_0.m0" end="buf0.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00012000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection kind="avalon" version="18.1" start="mm_bridge_0.m0" end="de_count.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00013000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection kind="avalon" version="18.1" start="mm_bridge_0.m0" end="ra_count.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00014000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_status.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00015000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_status.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00016000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_counter_load.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00020000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_counter_load.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00021000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_counter_max.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00022000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_counter_max.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00023000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_cmdcontrol.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00024000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_cmdcontrol.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00025000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_cmdduration.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00026000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_cmdduration.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00027000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_trackctrl.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00028000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_trackctrl.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00029000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_cmdtick.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0002a000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_cmdtick.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0002b000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_backlash_tick.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0002c000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_backlash_tick.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0002d000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="de_backlash_duration.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0002e000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="mm_bridge_0.m0"
   end="ra_backlash_duration.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0002f000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="fpga_only_master.master"
   end="jtag_uart.avalon_jtag_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x2000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="fpga_only_master.master"
   end="ILC.avalon_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00030000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="fpga_only_master.master"
   end="sysid_qsys.control_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x1000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="hps_only_master.master"
   end="hps_0.f2h_axi_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="f2sdram_only_master.master"
   end="hps_0.f2h_sdram0_data">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="fpga_only_master.master"
   end="button_pio.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x5000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="fpga_only_master.master"
   end="dipsw_pio.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x4000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon"
   version="18.1"
   start="fpga_only_master.master"
   end="led_pio.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00018000" />
  <parameter name="defaultConnection" value="false" />
 </connection>
 <connection
   kind="avalon_streaming"
   version="18.1"
   start="alt_vip_vfr_hdmi.avalon_streaming_source"
   end="alt_vip_itc_0.din" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="hps_only_master.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="sysid_qsys.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="fpga_only_master.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="dipsw_pio.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="button_pio.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="jtag_uart.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="f2sdram_only_master.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="mm_bridge_0.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="ILC.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="sts.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="buf2.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="buf1.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="buf0.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="de_count.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="ra_count.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="de_status.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="ra_status.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="de_counter_load.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="ra_counter_load.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="de_counter_max.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="ra_counter_max.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="de_cmdcontrol.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="ra_cmdcontrol.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="de_cmdduration.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="ra_cmdduration.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="de_trackctrl.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="ra_trackctrl.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="de_cmdtick.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="ra_cmdtick.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="de_backlash_tick.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="ra_backlash_tick.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="de_backlash_duration.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="ra_backlash_duration.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="ctrl.clk" />
 <connection kind="clock" version="18.1" start="clk_0.clk" end="led_pio.clk" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="alt_vip_vfr_hdmi.clock_master" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="hps_0.f2h_axi_clock" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="hps_0.f2h_sdram0_clock" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="hps_0.h2f_axi_clock" />
 <connection
   kind="clock"
   version="18.1"
   start="clk_0.clk"
   end="hps_0.h2f_lw_axi_clock" />
 <connection
   kind="clock"
   version="18.1"
   start="clock_bridge_0.out_clk"
   end="alt_vip_vfr_hdmi.clock_reset" />
 <connection
   kind="clock"
   version="18.1"
   start="clock_bridge_0.out_clk"
   end="alt_vip_itc_0.is_clk_rst" />
 <connection
   kind="interrupt"
   version="18.1"
   start="hps_0.f2h_irq0"
   end="jtag_uart.irq">
  <parameter name="irqNumber" value="2" />
 </connection>
 <connection
   kind="interrupt"
   version="18.1"
   start="hps_0.f2h_irq0"
   end="button_pio.irq">
  <parameter name="irqNumber" value="1" />
 </connection>
 <connection
   kind="interrupt"
   version="18.1"
   start="hps_0.f2h_irq0"
   end="dipsw_pio.irq">
  <parameter name="irqNumber" value="0" />
 </connection>
 <connection kind="interrupt" version="18.1" start="ILC.irq" end="jtag_uart.irq">
  <parameter name="irqNumber" value="2" />
 </connection>
 <connection kind="interrupt" version="18.1" start="ILC.irq" end="button_pio.irq">
  <parameter name="irqNumber" value="1" />
 </connection>
 <connection kind="interrupt" version="18.1" start="ILC.irq" end="dipsw_pio.irq">
  <parameter name="irqNumber" value="0" />
 </connection>
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="hps_only_master.clk_reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="fpga_only_master.clk_reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="f2sdram_only_master.clk_reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="alt_vip_vfr_hdmi.clock_master_reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="alt_vip_vfr_hdmi.clock_reset_reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="alt_vip_itc_0.is_clk_rst_reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="sysid_qsys.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="led_pio.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="dipsw_pio.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="button_pio.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="jtag_uart.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="mm_bridge_0.reset" />
 <connection kind="reset" version="18.1" start="clk_0.clk_reset" end="sts.reset" />
 <connection kind="reset" version="18.1" start="clk_0.clk_reset" end="ctrl.reset" />
 <connection kind="reset" version="18.1" start="clk_0.clk_reset" end="buf1.reset" />
 <connection kind="reset" version="18.1" start="clk_0.clk_reset" end="buf0.reset" />
 <connection kind="reset" version="18.1" start="clk_0.clk_reset" end="buf2.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_count.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_count.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_status.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_status.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_counter_load.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
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 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_counter_max.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_counter_max.reset" />
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   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_cmdcontrol.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_cmdcontrol.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_cmdduration.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_cmdduration.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_trackctrl.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_trackctrl.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_cmdtick.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_cmdtick.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_backlash_tick.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_backlash_tick.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="de_backlash_duration.reset" />
 <connection
   kind="reset"
   version="18.1"
   start="clk_0.clk_reset"
   end="ra_backlash_duration.reset" />
 <connection kind="reset" version="18.1" start="clk_0.clk_reset" end="ILC.reset_n" />
 <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
 <interconnectRequirement for="$system" name="qsys_mm.maxAdditionalLatency" value="1" />
</system>