diff --git a/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/bin/.placeholder.txt b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/bin/.placeholder.txt new file mode 100644 index 0000000000..b0eb8200ba --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/bin/.placeholder.txt @@ -0,0 +1 @@ +.placeholder diff --git a/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/amc.2cm4.loader.sct b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/amc.2cm4.loader.sct new file mode 100644 index 0000000000..551a1ecbb5 --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/amc.2cm4.loader.sct @@ -0,0 +1,40 @@ + + +LR_IROM1 0x08100000 0x00020000 { ; load region size_region + ER_IROM1 0x08100000 0x00020000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + +; RX_DESCR 0x30040000 0x00000060 { +; ethram.o(.RxDecripSection) +; } +; TX_DESCR 0x30040060 0x000001A0 { +; ethram.o(.TxDecripSection) +; } +; RX_ARRAY 0x30040200 0x00001800 { +; ethram.o(.RxArraySection) +; } + + ; banks sram1 and sram2 joined together + RW_IRAM1 0x10000000 0x0003FFC0 { + .ANY (+RW +ZI) + } + +; RW_IRAM2 0x10020000 0x00020000 { +; .ANY (+RW +ZI) +; } + + +} + +; RW_IRAM1 0x38000000 0x00010000 { ; RW data +; .ANY (+RW +ZI) +; } +; RW_IRAM2 0x24000000 0x00080000 { +; .ANY (+RW +ZI) +; } + + + diff --git a/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/amcfoc.2cm4-template-loader.sct b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/amcfoc.2cm4-template-loader.sct new file mode 100644 index 0000000000..2c0aa22461 --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/amcfoc.2cm4-template-loader.sct @@ -0,0 +1,33 @@ + +; this scatter file is for the eloader. it uses: +; - 1M of flash +; - ram in banks sram1 and sram2 w/ a memory hole of 64 bytes on top for ipc (shall we make make 256?) +; - the placing of the memory required by the ETH driver (commented out because eloader does not compile the driver) + +LR_IROM1 0x08100000 0x00020000 { ; load region size_region + + ; flash + ER_IROM1 0x08100000 0x00020000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + ; eth mapping. comment it out if ethram.o is not linked +; RX_DESCR 0x30040000 0x00000060 { +; ethram.o(.RxDecripSection) +; } +; TX_DESCR 0x30040060 0x000001A0 { +; ethram.o(.TxDecripSection) +; } +; RX_ARRAY 0x30040200 0x00001800 { +; ethram.o(.RxArraySection) +; } + + ; banks sram1 and sram2 joined together w/ a memory hole on top + RW_IRAM1 0x10000000 0x0003FFC0 { + .ANY (+RW +ZI) + } + + +} diff --git a/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/stm32hal.h7.startup.amcfoc.CM4.s b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/stm32hal.h7.startup.amcfoc.CM4.s new file mode 100644 index 0000000000..7ae88f8270 --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/cfg/stm32hal.h7.startup.amcfoc.CM4.s @@ -0,0 +1,621 @@ +;******************** (C) COPYRIGHT 2019 STMicroelectronics ******************** +;* File Name : startup_stm32h745xx.s +;* @author MCD Application Team +;* Description : STM32H7xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;****************************************************************************** + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x8000 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x8000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog interrupt ( wwdg1_it, wwdg2_it) + DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 + DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 + DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 + DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 + DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 + DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 + DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 + DCD ADC_IRQHandler ; ADC1, ADC2 + DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0 + DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0 + DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1 + DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1 + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt + DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD 0 ; Reserved + DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt + DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt + DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt + DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 + DCD FMC_IRQHandler ; FMC + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 + DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 + DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 + DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 + DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 + DCD ETH_IRQHandler ; Ethernet + DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line + DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt + DCD CM7_SEV_IRQHandler ; CM7 Send event interrupt for CM4 + DCD CM4_SEV_IRQHandler ; CM4 Send event interrupt for CM7 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 + DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 + DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 + DCD USART6_IRQHandler ; USART6 + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out + DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In + DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI + DCD OTG_HS_IRQHandler ; USB OTG HS + DCD DCMI_IRQHandler ; DCMI + DCD 0 ; Reserved + DCD RNG_IRQHandler ; Rng + DCD FPU_IRQHandler ; FPU + DCD UART7_IRQHandler ; UART7 + DCD UART8_IRQHandler ; UART8 + DCD SPI4_IRQHandler ; SPI4 + DCD SPI5_IRQHandler ; SPI5 + DCD SPI6_IRQHandler ; SPI6 + DCD SAI1_IRQHandler ; SAI1 + DCD LTDC_IRQHandler ; LTDC + DCD LTDC_ER_IRQHandler ; LTDC error + DCD DMA2D_IRQHandler ; DMA2D + DCD SAI2_IRQHandler ; SAI2 + DCD QUADSPI_IRQHandler ; QUADSPI + DCD LPTIM1_IRQHandler ; LPTIM1 + DCD CEC_IRQHandler ; HDMI_CEC + DCD I2C4_EV_IRQHandler ; I2C4 Event + DCD I2C4_ER_IRQHandler ; I2C4 Error + DCD SPDIF_RX_IRQHandler ; SPDIF_RX + DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out + DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In + DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt + DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts + DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt + DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt + DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt + DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt + DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt + DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt + DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt + DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt + DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt + DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt + DCD SAI3_IRQHandler ; SAI3 global Interrupt + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TIM15_IRQHandler ; TIM15 global Interrupt + DCD TIM16_IRQHandler ; TIM16 global Interrupt + DCD TIM17_IRQHandler ; TIM17 global Interrupt + DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt + DCD MDIOS_IRQHandler ; MDIOS global Interrupt + DCD JPEG_IRQHandler ; JPEG global Interrupt + DCD MDMA_IRQHandler ; MDMA global Interrupt + DCD 0 ; Reserved + DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt + DCD HSEM1_IRQHandler ; HSEM1 global Interrupt + DCD HSEM2_IRQHandler ; HSEM2 global Interrupt + DCD ADC3_IRQHandler ; ADC3 global Interrupt + DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt + DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt + DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt + DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt + DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt + DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt + DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt + DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt + DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt + DCD COMP1_IRQHandler ; COMP1 global Interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt + DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt + DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt + DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD WWDG_RST_IRQHandler ; Window Watchdog reset interrupt (exti_d2_wwdg_it, exti_d1_wwdg_it) + DCD CRS_IRQHandler ; Clock Recovery Global Interrupt + DCD ECC_IRQHandler ; ECC diagnostic Global Interrupt + DCD SAI4_IRQHandler ; SAI4 global interrupt + DCD 0 ; Reserved + DCD HOLD_CORE_IRQHandler ; Hold core interrupt + DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins + + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_AVD_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Stream0_IRQHandler [WEAK] + EXPORT DMA1_Stream1_IRQHandler [WEAK] + EXPORT DMA1_Stream2_IRQHandler [WEAK] + EXPORT DMA1_Stream3_IRQHandler [WEAK] + EXPORT DMA1_Stream4_IRQHandler [WEAK] + EXPORT DMA1_Stream5_IRQHandler [WEAK] + EXPORT DMA1_Stream6_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT FDCAN1_IT0_IRQHandler [WEAK] + EXPORT FDCAN2_IT0_IRQHandler [WEAK] + EXPORT FDCAN1_IT1_IRQHandler [WEAK] + EXPORT FDCAN2_IT1_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_IRQHandler [WEAK] + EXPORT TIM1_UP_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] + EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT FMC_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Stream0_IRQHandler [WEAK] + EXPORT DMA2_Stream1_IRQHandler [WEAK] + EXPORT DMA2_Stream2_IRQHandler [WEAK] + EXPORT DMA2_Stream3_IRQHandler [WEAK] + EXPORT DMA2_Stream4_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT ETH_WKUP_IRQHandler [WEAK] + EXPORT FDCAN_CAL_IRQHandler [WEAK] + EXPORT CM7_SEV_IRQHandler [WEAK] + EXPORT CM4_SEV_IRQHandler [WEAK] + EXPORT DMA2_Stream5_IRQHandler [WEAK] + EXPORT DMA2_Stream6_IRQHandler [WEAK] + EXPORT DMA2_Stream7_IRQHandler [WEAK] + EXPORT USART6_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_HS_WKUP_IRQHandler [WEAK] + EXPORT OTG_HS_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT UART7_IRQHandler [WEAK] + EXPORT UART8_IRQHandler [WEAK] + EXPORT SPI4_IRQHandler [WEAK] + EXPORT SPI5_IRQHandler [WEAK] + EXPORT SPI6_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT LTDC_IRQHandler [WEAK] + EXPORT LTDC_ER_IRQHandler [WEAK] + EXPORT DMA2D_IRQHandler [WEAK] + EXPORT SAI2_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT CEC_IRQHandler [WEAK] + EXPORT I2C4_EV_IRQHandler [WEAK] + EXPORT I2C4_ER_IRQHandler [WEAK] + EXPORT SPDIF_RX_IRQHandler [WEAK] + EXPORT OTG_FS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_FS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_FS_WKUP_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMAMUX1_OVR_IRQHandler [WEAK] + EXPORT HRTIM1_Master_IRQHandler [WEAK] + EXPORT HRTIM1_TIMA_IRQHandler [WEAK] + EXPORT HRTIM1_TIMB_IRQHandler [WEAK] + EXPORT HRTIM1_TIMC_IRQHandler [WEAK] + EXPORT HRTIM1_TIMD_IRQHandler [WEAK] + EXPORT HRTIM1_TIME_IRQHandler [WEAK] + EXPORT HRTIM1_FLT_IRQHandler [WEAK] + EXPORT DFSDM1_FLT0_IRQHandler [WEAK] + EXPORT DFSDM1_FLT1_IRQHandler [WEAK] + EXPORT DFSDM1_FLT2_IRQHandler [WEAK] + EXPORT DFSDM1_FLT3_IRQHandler [WEAK] + EXPORT SAI3_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TIM15_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT MDIOS_WKUP_IRQHandler [WEAK] + EXPORT MDIOS_IRQHandler [WEAK] + EXPORT JPEG_IRQHandler [WEAK] + EXPORT MDMA_IRQHandler [WEAK] + EXPORT SDMMC2_IRQHandler [WEAK] + EXPORT HSEM1_IRQHandler [WEAK] + EXPORT HSEM2_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT DMAMUX2_OVR_IRQHandler [WEAK] + EXPORT BDMA_Channel0_IRQHandler [WEAK] + EXPORT BDMA_Channel1_IRQHandler [WEAK] + EXPORT BDMA_Channel2_IRQHandler [WEAK] + EXPORT BDMA_Channel3_IRQHandler [WEAK] + EXPORT BDMA_Channel4_IRQHandler [WEAK] + EXPORT BDMA_Channel5_IRQHandler [WEAK] + EXPORT BDMA_Channel6_IRQHandler [WEAK] + EXPORT BDMA_Channel7_IRQHandler [WEAK] + EXPORT COMP1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT LPTIM3_IRQHandler [WEAK] + EXPORT LPTIM4_IRQHandler [WEAK] + EXPORT LPTIM5_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT WWDG_RST_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + EXPORT ECC_IRQHandler [WEAK] + EXPORT SAI4_IRQHandler [WEAK] + EXPORT HOLD_CORE_IRQHandler [WEAK] + EXPORT WAKEUP_PIN_IRQHandler [WEAK] + + +WWDG_IRQHandler +PVD_AVD_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Stream0_IRQHandler +DMA1_Stream1_IRQHandler +DMA1_Stream2_IRQHandler +DMA1_Stream3_IRQHandler +DMA1_Stream4_IRQHandler +DMA1_Stream5_IRQHandler +DMA1_Stream6_IRQHandler +ADC_IRQHandler +FDCAN1_IT0_IRQHandler +FDCAN2_IT0_IRQHandler +FDCAN1_IT1_IRQHandler +FDCAN2_IT1_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_IRQHandler +TIM1_UP_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +TIM8_BRK_TIM12_IRQHandler +TIM8_UP_TIM13_IRQHandler +TIM8_TRG_COM_TIM14_IRQHandler +TIM8_CC_IRQHandler +DMA1_Stream7_IRQHandler +FMC_IRQHandler +SDMMC1_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Stream0_IRQHandler +DMA2_Stream1_IRQHandler +DMA2_Stream2_IRQHandler +DMA2_Stream3_IRQHandler +DMA2_Stream4_IRQHandler +ETH_IRQHandler +ETH_WKUP_IRQHandler +FDCAN_CAL_IRQHandler +CM7_SEV_IRQHandler +CM4_SEV_IRQHandler +DMA2_Stream5_IRQHandler +DMA2_Stream6_IRQHandler +DMA2_Stream7_IRQHandler +USART6_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +OTG_HS_EP1_OUT_IRQHandler +OTG_HS_EP1_IN_IRQHandler +OTG_HS_WKUP_IRQHandler +OTG_HS_IRQHandler +DCMI_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +UART7_IRQHandler +UART8_IRQHandler +SPI4_IRQHandler +SPI5_IRQHandler +SPI6_IRQHandler +SAI1_IRQHandler +LTDC_IRQHandler +LTDC_ER_IRQHandler +DMA2D_IRQHandler +SAI2_IRQHandler +QUADSPI_IRQHandler +LPTIM1_IRQHandler +CEC_IRQHandler +I2C4_EV_IRQHandler +I2C4_ER_IRQHandler +SPDIF_RX_IRQHandler +OTG_FS_EP1_OUT_IRQHandler +OTG_FS_EP1_IN_IRQHandler +OTG_FS_WKUP_IRQHandler +OTG_FS_IRQHandler +DMAMUX1_OVR_IRQHandler +HRTIM1_Master_IRQHandler +HRTIM1_TIMA_IRQHandler +HRTIM1_TIMB_IRQHandler +HRTIM1_TIMC_IRQHandler +HRTIM1_TIMD_IRQHandler +HRTIM1_TIME_IRQHandler +HRTIM1_FLT_IRQHandler +DFSDM1_FLT0_IRQHandler +DFSDM1_FLT1_IRQHandler +DFSDM1_FLT2_IRQHandler +DFSDM1_FLT3_IRQHandler +SAI3_IRQHandler +SWPMI1_IRQHandler +TIM15_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +MDIOS_WKUP_IRQHandler +MDIOS_IRQHandler +JPEG_IRQHandler +MDMA_IRQHandler +SDMMC2_IRQHandler +HSEM1_IRQHandler +HSEM2_IRQHandler +ADC3_IRQHandler +DMAMUX2_OVR_IRQHandler +BDMA_Channel0_IRQHandler +BDMA_Channel1_IRQHandler +BDMA_Channel2_IRQHandler +BDMA_Channel3_IRQHandler +BDMA_Channel4_IRQHandler +BDMA_Channel5_IRQHandler +BDMA_Channel6_IRQHandler +BDMA_Channel7_IRQHandler +COMP1_IRQHandler +LPTIM2_IRQHandler +LPTIM3_IRQHandler +LPTIM4_IRQHandler +LPTIM5_IRQHandler +LPUART1_IRQHandler +WWDG_RST_IRQHandler +CRS_IRQHandler +ECC_IRQHandler +SAI4_IRQHandler +HOLD_CORE_IRQHandler +WAKEUP_PIN_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/proj/amcfoc.2cm4-CM7launcher.uvoptx b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/proj/amcfoc.2cm4-CM7launcher.uvoptx new file mode 100644 index 0000000000..96a76eda2e --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/proj/amcfoc.2cm4-CM7launcher.uvoptx @@ -0,0 +1,877 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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embot_hw_flash_bsp_amcfoc.cpp + 0 + 0 + + + 5 + 19 + 5 + 0 + 0 + 0 + ..\..\..\bsp\shared\embot_hw_led_bsp_pinout_amcfoc.h + embot_hw_led_bsp_pinout_amcfoc.h + 0 + 0 + + + + + embot::hw::lowlevel + 0 + 0 + 0 + 0 + + 6 + 20 + 8 + 0 + 0 + 0 + ..\..\..\..\..\embot\hw\embot_hw_lowlevel.cpp + embot_hw_lowlevel.cpp + 0 + 0 + + + + + embot:hw::bsp-core-cm4 + 0 + 0 + 0 + 0 + + 7 + 21 + 8 + 0 + 0 + 0 + ..\..\..\bsp\cm4\embot_hw_bsp_amcfoc_2cm4.cpp + embot_hw_bsp_amcfoc_2cm4.cpp + 0 + 0 + + + 7 + 22 + 8 + 0 + 0 + 0 + ..\..\..\bsp\cm4\embot_hw_led_bsp_amcfoc_2cm4.cpp + embot_hw_led_bsp_amcfoc_2cm4.cpp + 0 + 0 + + + 7 + 23 + 8 + 0 + 0 + 0 + ..\..\..\bsp\cm4\embot_hw_spi_bsp_amcfoc_2cm4.cpp + embot_hw_spi_bsp_amcfoc_2cm4.cpp + 0 + 0 + + + 7 + 24 + 8 + 0 + 0 + 0 + ..\..\..\bsp\cm4\embot_hw_eeprom_bsp_amcfoc_2cm4.cpp + embot_hw_eeprom_bsp_amcfoc_2cm4.cpp + 0 + 0 + + + + + embot::hw-others + 0 + 0 + 0 + 0 + + 8 + 25 + 8 + 0 + 0 + 0 + ..\..\..\..\..\embot\hw\embot_hw_eeprom.cpp + embot_hw_eeprom.cpp + 0 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### uVision Project, (C) Keil Software
+ + + + amc.2cm4-slave + 0x4 + ARM-ADS + 6190000::V6.19::ARMCLANG + 1 + + + STM32H745IIKx:CM4 + STMicroelectronics + Keil.STM32H7xx_DFP.3.1.1 + https://www.keil.com/pack/ + IRAM(0x10000000,0x00048000) IROM(0x08100000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD10000000 -FC8000 -FN1 -FF0STM32H7x_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32H745IIKx$CMSIS\Flash\STM32H7x_2048.FLM)) + 0 + $$Device:STM32H745IIKx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h + + + + + + + + + + $$Device:STM32H745IIKx$CMSIS\SVD\STM32H745_CM4.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\tmp\obj\ + h7disco + 1 + 0 + 1 + 1 + 1 + .\tmp\lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 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### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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STM32HAL_DRIVER_V1A0 + + ..\..\..\..\..\..\libs\lowlevel\stm32hal\api;..\..\..\..\..\..\libs\highlevel\abslayer\osal\api;..\..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core;..\..\..\..\..\..\embot\hw;..\..\..\..\..\..\embot\os;..\..\..\..\..\..\embot\app;..\..\..\..\..\..\embot\app;..\..\..\..\..\..\libs\midware\eventviewer\api;..\..\..\bsp;..\..\..\..\..\..\libs\highlevel\services\embenv\api;..\..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\tools + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + ..\cfg\amc.2cm4-template-appl.sct + + + --diag_suppress=L6329 + + + + + + + + main + + + eloader-embot.cpp + 8 + ..\src\eloader-embot.cpp + + + + + stm32hal + + + stm32hal.h7.startup.amcfoc.CM4.s + 2 + ..\cfg\stm32hal.h7.startup.amcfoc.CM4.s + + + stm32hal.h7.amcfoc.2cm4.v1A0.lib + 4 + ..\..\..\..\..\libs\lowlevel\stm32hal\lib\stm32hal.h7.amcfoc.2cm4.v1A0.lib + + + system_stm32h7xx-cm4-cm7-gated.c + 1 + ..\..\..\..\..\libs\lowlevel\stm32hal\src\driver\stm32h7-v1A0\extra\system_stm32h7xx-cm4-cm7-gated.c + + + + + embot::core + + + embot_core.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core.cpp + + + embot_core_binary.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core_binary.cpp + + + embot_core_utils.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core_utils.cpp + + + + + embot::hw-core + + + embot_hw_bsp.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_bsp.cpp + + + embot_hw.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw.cpp + + + embot_hw_gpio.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_gpio.cpp + + + embot_hw_led.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_led.cpp + + + embot_hw_sys.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_sys.cpp + + + embot_hw_flash.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_flash.cpp + + + embot_hw_dualcore.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_dualcore.cpp + + + + + embot::hw::bsp-core-shared + + + embot_hw_dualcore_bsp_amcfoc.cpp + 8 + ..\..\..\bsp\shared\embot_hw_dualcore_bsp_amcfoc.cpp + + + embot_hw_bsp_DRIVER_amcfoc.cpp + 8 + ..\..\..\bsp\shared\embot_hw_bsp_DRIVER_amcfoc.cpp + + + embot_hw_gpio_bsp_amcfoc.cpp + 8 + ..\..\..\bsp\shared\embot_hw_gpio_bsp_amcfoc.cpp + + + embot_hw_flash_bsp_amcfoc.cpp + 8 + ..\..\..\bsp\shared\embot_hw_flash_bsp_amcfoc.cpp + + + embot_hw_led_bsp_pinout_amcfoc.h + 5 + ..\..\..\bsp\shared\embot_hw_led_bsp_pinout_amcfoc.h + + + + + embot::hw::lowlevel + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 1 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + + + + + + + + + + + + embot_hw_lowlevel.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_lowlevel.cpp + + + 2 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 1 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + + + embot:hw::bsp-core-cm4 + + + embot_hw_bsp_amcfoc_2cm4.cpp + 8 + ..\..\..\bsp\cm4\embot_hw_bsp_amcfoc_2cm4.cpp + + + embot_hw_led_bsp_amcfoc_2cm4.cpp + 8 + ..\..\..\bsp\cm4\embot_hw_led_bsp_amcfoc_2cm4.cpp + + + embot_hw_spi_bsp_amcfoc_2cm4.cpp + 8 + ..\..\..\bsp\cm4\embot_hw_spi_bsp_amcfoc_2cm4.cpp + + + embot_hw_eeprom_bsp_amcfoc_2cm4.cpp + 8 + ..\..\..\bsp\cm4\embot_hw_eeprom_bsp_amcfoc_2cm4.cpp + + + + + embot::hw-others + + + embot_hw_eeprom.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_eeprom.cpp + + + embot_hw_spi.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + + embot_hw_chip_M95512DF.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_chip_M95512DF.cpp + + + + + ee-sharedservices + + + eEsharedServices.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\eEsharedServices.c + + + eEcommon.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\eEcommon.c + + + shalBASE.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\shalBASE.c + + + shalINFO.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\shalINFO.c + + + shalPART.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\shalPART.c + + + + + + + amcfoc.2cm4-master + 0x4 + ARM-ADS + 6220000::V6.22::ARMCLANG + 1 + + + STM32H745IIKx:CM4 + STMicroelectronics + Keil.STM32H7xx_DFP.3.1.1 + https://www.keil.com/pack/ + IRAM(0x10000000,0x00048000) IROM(0x08100000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD10000000 -FC8000 -FN1 -FF0STM32H7x_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32H745IIKx$CMSIS\Flash\STM32H7x_2048.FLM)) + 0 + $$Device:STM32H745IIKx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h + + + + + + + + + + $$Device:STM32H745IIKx$CMSIS\SVD\STM32H745_CM4.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\tmp\obj\ + amcfoc_loader + 1 + 0 + 1 + 1 + 1 + .\tmp\lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + "" () + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 0 + 0 + 0 + 0 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x48000 + + + 1 + 0x8100000 + 0x100000 + + + 1 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8100000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x10000000 + 0x48000 + + + 0 + 0x0 + 0x0 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 3 + 0 + 1 + 0 + 0 + 0 + 3 + 8 + 1 + 1 + 0 + 0 + 0 + + -Dnot_CM7launcher -DXdontuseMEMmapping -Wno-pragma-pack -Wno-deprecated-register -DEMBOT_USE_rtos_osal + STM32HAL_dualcore_BOOT_cm4master USE_STM32HAL STM32HAL_BOARD_AMCFOC_2CM4 STM32HAL_DRIVER_V1A0 USE_EMBOT_HW + + ..\..\..\..\..\libs\lowlevel\stm32hal\api;..\..\..\..\..\libs\highlevel\abslayer\osal\api;..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core;..\..\..\..\..\embot\hw;..\..\..\..\..\embot\os;..\..\..\..\..\embot\app;..\..\..\..\..\libs\midware\eventviewer\api;..\..\..\..\..\libs\highlevel\services\embenv\api;..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\tools;..\..\..\..\..\libs\highlevel\abslayer\ipal\api;..\..\bsp\ipaldrv;..\..\..\..\..\libs\highlevel\services\embenv\api;..\..\..\..\..\..\..\..\..\icub-firmware-shared\eth\embobj\core\core;..\..\..\..\..\libs\highlevel\abslayer\hal2\api;..\..\..\..\..\..\..\..\..\icub-firmware-shared\eth\embobj\plus\comm-v2\icub;..\..\..\..\..\..\..\..\..\icub-firmware-shared\can\canProtocolLib;..\..\..\bsp\cm4;..\..\..\bsp\shared + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + ..\cfg\amcfoc.2cm4-template-loader.sct + + + --diag_suppress=L6329 + + + + + + + + main + + + eloader-embot.cpp + 8 + ..\src\eloader-embot.cpp + + + + + stm32hal + + + stm32hal.h7.startup.amcfoc.CM4.s + 2 + ..\cfg\stm32hal.h7.startup.amcfoc.CM4.s + + + stm32hal.h7.amcfoc.2cm4.v1A0.lib + 4 + ..\..\..\..\..\libs\lowlevel\stm32hal\lib\stm32hal.h7.amcfoc.2cm4.v1A0.lib + + + system_stm32h7xx-cm4-cm7-gated.c + 1 + ..\..\..\..\..\libs\lowlevel\stm32hal\src\driver\stm32h7-v1A0\extra\system_stm32h7xx-cm4-cm7-gated.c + + + + + embot::core + + + embot_core.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core.cpp + + + embot_core_binary.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core_binary.cpp + + + embot_core_utils.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core_utils.cpp + + + + + embot::hw-core + + + embot_hw_bsp.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_bsp.cpp + + + embot_hw.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw.cpp + + + embot_hw_gpio.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_gpio.cpp + + + embot_hw_led.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_led.cpp + + + embot_hw_sys.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_sys.cpp + + + embot_hw_flash.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_flash.cpp + + + embot_hw_dualcore.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_dualcore.cpp + + + + + embot::hw::bsp-core-shared + + + embot_hw_dualcore_bsp_amcfoc.cpp + 8 + ..\..\..\bsp\shared\embot_hw_dualcore_bsp_amcfoc.cpp + + + embot_hw_bsp_DRIVER_amcfoc.cpp + 8 + ..\..\..\bsp\shared\embot_hw_bsp_DRIVER_amcfoc.cpp + + + embot_hw_gpio_bsp_amcfoc.cpp + 8 + ..\..\..\bsp\shared\embot_hw_gpio_bsp_amcfoc.cpp + + + embot_hw_flash_bsp_amcfoc.cpp + 8 + ..\..\..\bsp\shared\embot_hw_flash_bsp_amcfoc.cpp + + + embot_hw_led_bsp_pinout_amcfoc.h + 5 + ..\..\..\bsp\shared\embot_hw_led_bsp_pinout_amcfoc.h + + + + + embot::hw::lowlevel + + + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 1 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + + + + + + + + + + + + embot_hw_lowlevel.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_lowlevel.cpp + + + 2 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 1 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + + + embot:hw::bsp-core-cm4 + + + embot_hw_bsp_amcfoc_2cm4.cpp + 8 + ..\..\..\bsp\cm4\embot_hw_bsp_amcfoc_2cm4.cpp + + + embot_hw_led_bsp_amcfoc_2cm4.cpp + 8 + ..\..\..\bsp\cm4\embot_hw_led_bsp_amcfoc_2cm4.cpp + + + embot_hw_spi_bsp_amcfoc_2cm4.cpp + 8 + ..\..\..\bsp\cm4\embot_hw_spi_bsp_amcfoc_2cm4.cpp + + + embot_hw_eeprom_bsp_amcfoc_2cm4.cpp + 8 + ..\..\..\bsp\cm4\embot_hw_eeprom_bsp_amcfoc_2cm4.cpp + + + + + embot::hw-others + + + embot_hw_eeprom.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_eeprom.cpp + + + embot_hw_spi.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + + embot_hw_chip_M95512DF.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_chip_M95512DF.cpp + + + + + ee-sharedservices + + + eEsharedServices.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\eEsharedServices.c + + + eEcommon.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\eEcommon.c + + + shalBASE.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\shalBASE.c + + + shalINFO.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\shalINFO.c + + + shalPART.c + 8 + ..\..\..\..\..\libs\highlevel\services\embenv\src\shalPART.c + + + + + + + + + + + + + + + + + amc-embot-os + 0 + 1 + + + + + diff --git a/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/proj/eventviewer-amcfoc.2cm4-cfg.ini b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/proj/eventviewer-amcfoc.2cm4-cfg.ini new file mode 100644 index 0000000000..fcc52e5620 --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/proj/eventviewer-amcfoc.2cm4-cfg.ini @@ -0,0 +1,84 @@ +/******************************************************************************/ +/* STM32_TP.ini: STM32 Debugger Initialization File */ +/******************************************************************************/ +// <<< Use Configuration Wizard in Context Menu >>> // +/******************************************************************************/ +/* This file is part of the uVision/ARM development tools. */ +/* Copyright (c) 2005-2009 Keil Software. All rights reserved. */ +/* This software may only be used under the terms of a valid, current, */ +/* end user licence from KEIL for a compatible version of KEIL software */ +/* development tools. Nothing else gives you the right to use this software. */ +/******************************************************************************/ + + +FUNC void DebugSetup (void) { + + _WDWORD(0x580244E0, _RDWORD(0x580244E0) | 0x0000001C); // RCC_AHB4ENR: IO port C D E clocks enabled (E is bit pos 4, D pos 3, C pos 2) + + _WDWORD(0x58021000, 0x000002A0); // GPIOE_MODER: PE2..PE4 = Alternate function mode: it must be 10b in pairs in pos = 2, 3, 4 + _WDWORD(0x58021008, 0x000003F0); // GPIOE_OSPEEDR: PE2..PE4 = 100 MHz speed. it must be 11b in pairs in pos = 2, 3, 4 + _WDWORD(0x5802100C, 0x00000000); // GPIOE_PUPDR: PE2..PE4 = No Pull-up/Pull-down. it must be 00b in pos = 2, 3, 4 + _WDWORD(0x58021020, 0x00000000); // GPIOE_AFRL: PE2..PE4 = AF0 with AF0 = 0000b in pos = 2, 3, 4 + + _WDWORD(0x58020C00, 0x00000020); // GPIOD_MODER: PD2 = Alternate function mode: it must be 10b in pairs in pos = 2 + _WDWORD(0x58020C08, 0x00000030); // GPIOD_OSPEEDR: PD2 = 100 MHz speed. it must be 11b in pairs in pos = 2 + _WDWORD(0x58020C0C, 0x00000000); // GPIOD_PUPDR: PD2 = No Pull-up/Pull-down. it must be 00b in pos = 2 + _WDWORD(0x58020C20, 0x00000000); // GPIOD_AFRL: PD2 = AF0 with AF0 = 0000b in pos = 2 + + _WDWORD(0x58020800, 0x02000000); // GPIOC_MODER: PC12 = Alternate function mode: it must be 10b in pairs in pos = 12 + _WDWORD(0x58020808, 0x03000000); // GPIOC_OSPEEDR: PC12 = 100 MHz speed. it must be 11b in pairs in pos = 12 + _WDWORD(0x5802080C, 0x00000000); // GPIOC_PUPDR: PC12 = No Pull-up/Pull-down. it must be 00b in pos = 12 + _WDWORD(0x58020824, 0x00000000); // GPIOC_AFRH: PC12 = AF0 with AF0 = 0000b in pos = 12-8=4 + + +// Debug MCU Configuration +// DBG_SLEEP Debug Sleep Mode +// DBG_STOP Debug Stop Mode +// DBG_STANDBY Debug Standby Mode +// TRACE_IOEN Trace I/O Enable +// TRACE_MODE Trace Mode +// <0=> Asynchronous +// <1=> Synchronous: TRACEDATA Size 1 +// <2=> Synchronous: TRACEDATA Size 2 +// <3=> Synchronous: TRACEDATA Size 4 +// + _WDWORD(0xE0042004, 0x00000027); // DBGMCU_CR + +// Debug MCU APB1 Freeze +// DBG_TIM2_STOP Timer 2 Stopped when Core is halted +// DBG_TIM3_STOP Timer 3 Stopped when Core is halted +// DBG_TIM4_STOP Timer 4 Stopped when Core is halted +// DBG_TIM5_STOP Timer 5 Stopped when Core is halted +// DBG_TIM6_STOP Timer 6 Stopped when Core is halted +// DBG_TIM7_STOP Timer 7 Stopped when Core is halted +// DBG_TIM12_STOP Timer 12 Stopped when Core is halted +// DBG_TIM13_STOP Timer 13 Stopped when Core is halted +// DBG_TIM14_STOP Timer 14 Stopped when Core is halted +// DBG_RTC_STOP RTC Stopped when Core is halted +// DBG_WWDG_STOP Window Watchdog Stopped when Core is halted +// DBG_IWDG_STOP Independent Watchdog Stopped when Core is halted +// DBG_I2C1_SMBUS_TIMEOUT I2C1 SMBUS Timeout Mode Stopped when Core is halted +// DBG_I2C2_SMBUS_TIMEOUT I2C2 SMBUS Timeout Mode Stopped when Core is halted +// DBG_I2C3_SMBUS_TIMEOUT I2C3 SMBUS Timeout Mode Stopped when Core is halted +// DBG_CAN1_STOP CAN1 Stopped when Core is halted +// DBG_CAN2_STOP CAN2 Stopped when Core is halted +// + _WDWORD(0xE0042008, 0x06E01DFF); // DBGMCU_APB1_FZ + +// Debug MCU APB2 Freeze +// DBG_TIM1_STOP Timer 1 Stopped when Core is halted +// DBG_TIM8_STOP Timer 8 Stopped when Core is halted +// DBG_TIM9_STOP Timer 9 Stopped when Core is halted +// DBG_TIM10_STOP Timer 10 Stopped when Core is halted +// DBG_TIM11_STOP Timer 11 Stopped when Core is halted +// + _WDWORD(0xE004200C, 0x00070003); // DBGMCU_APB2_FZ + +} + +// Executed after reset via uVision's 'Reset'-button +FUNC void OnResetExec (void) { + DebugSetup(); +} + +DebugSetup(); // Debugger Setup \ No newline at end of file diff --git a/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/src/eloader-embot.cpp b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/src/eloader-embot.cpp new file mode 100644 index 0000000000..2429be6efc --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amcfoc/procs/loader/src/eloader-embot.cpp @@ -0,0 +1,919 @@ +#if 1 + +/* + * Copyright (C) 2024 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + +#include "embot_core.h" +#include "embot_hw.h" +#include "embot_hw_sys.h" +#include "embot_hw_led.h" + + + +// in here we run the baremetal embot::hw application. +// for the required get1microtime() we can either use a very naked approach or even the systick + +#define USE_SYSTICK_AS_TIME_BASE + +#if defined(USE_SYSTICK_AS_TIME_BASE) + +#include "stm32hal.h" + +static volatile uint64_t s_1mstickcount = 0; // it must be volatile +constexpr uint32_t s_rate1khz = 1000; +#ifdef __cplusplus +extern "C" { +#endif +void SysTick_Handler(void) +{ + s_1mstickcount++; +} +#ifdef __cplusplus +} // closing brace for extern "C" +#endif + +static void stm32hal_tick1msecinit() +{ + HAL_SYSTICK_Config(SystemCoreClock/s_rate1khz); +} + +static uint32_t stm32hal_tick1msecget() +{ + return s_1mstickcount; +} + +embot::core::Time get1microtime1() +{ + return embot::core::time1millisec * stm32hal_tick1msecget(); +} + +constexpr embot::hw::Config hwCFG {stm32hal_tick1msecinit, get1microtime1}; + +#else + +embot::core::Time get1microtime2() +{ + static constexpr embot::core::relTime resolution{10}; + // wait some usec and then returns the value + static volatile uint64_t cnt = 0; + embot::hw::sys::delay(resolution); + cnt += resolution; + return cnt; +} + +constexpr embot::hw::Config hwCFG {nullptr, get1microtime2}; + +#endif // USE_SYSTICK_AS_TIME_BASE + + +// principal debug macros + + + +// if defined it forces tge eeprom to have def2run = application, so that the eupdater will jump to application +#undef DEBUG_forceEEPROM_DEF2RUNequalAPPLICATION +// if defined it does not jump and forces execution of defaultapplication() +#undef DEBUG_stayinhere +// if defined it enables the CM4 core after clock initialization inside embot::hw::init() +#undef DEBUG_startCMxnow +#undef DEBUG_eraseEEPROM + +#if defined(CM7launcher) +#define DEBUG_startCMxnow +#define DEBUG_stayinhere +constexpr embot::core::relTime applblinkrate {250*embot::core::time1millisec}; +#else +constexpr embot::core::relTime applblinkrate {100*embot::core::time1millisec}; +#endif + +#warning evaluate if to use this very same code or file for the amc + +// used functions + +void thejumper(); + +[[noreturn]] void defaultapplication(embot::core::relTime blinkrate = applblinkrate); + + +#include "embot_hw_dualcore.h" + + +#if defined(DEBUG_startCMxnow) +constexpr embot::hw::dualcore::Config dcc {embot::hw::dualcore::Config::HW::forceinit, embot::hw::dualcore::Config::CMD::activate }; +#else +constexpr embot::hw::dualcore::Config dcc {embot::hw::dualcore::Config::HW::forceinit, embot::hw::dualcore::Config::CMD::activateandhold }; +#endif + +int main(void) +{ + // hw init + embot::hw::dualcore::config(dcc); + embot::hw::init(hwCFG); + +#if !defined(DEBUG_stayinhere) + // eval jump + thejumper(); +#endif + // run default application + defaultapplication(); +} + + +[[noreturn]] void defaultapplication(embot::core::relTime blinkrate) +{ + embot::hw::led::init(embot::hw::LED::one); + for(;;) + { + embot::core::wait(blinkrate); + embot::hw::led::toggle(embot::hw::LED::one); + } +} + + +// - dependencies + +//#if defined(DEBUG_stayinhere) + +//#else + +#include "embot_hw_eeprom.h" + +#include "eEmemorymap.h" +#include "eEsharedServices.h" +#include "EoBoards.h" + + +#if defined(dontuseMEMmapping) +constexpr eEmoduleExtendedInfo_t s_loader_info_extended = +#else +constexpr eEmoduleExtendedInfo_t s_loader_info_extended __attribute__((section(EENV_MODULEINFO_LOADER_AT))) = +#endif +{ + .moduleinfo = + { + .info = + { + .entity = + { + .type = ee_entity_process, + .signature = ee_procLoader, + .version = + { + .major = 3, + .minor = 2 + }, + .builddate = + { + .year = 2022, + .month = 9, + .day = 16, + .hour = 9, + .min = 15 + } + }, + .rom = + { + .addr = EENV_MEMMAP_ELOADER_ROMADDR, + .size = EENV_MEMMAP_ELOADER_ROMSIZE + }, + .ram = + { + .addr = EENV_MEMMAP_ELOADER_RAMADDR, + .size = EENV_MEMMAP_ELOADER_RAMSIZE + }, + .storage = + { + .type = ee_strg_none, + .size = 0, + .addr = 0 + }, + .communication = ee_commtype_none, + .name = "eLoader" + }, + .protocols = + { + .udpprotversion = { .major = 0, .minor = 0}, + .can1protversion = { .major = 0, .minor = 0}, + .can2protversion = { .major = 0, .minor = 0}, + .gtwprotversion = { .major = 0, .minor = 0} + }, + .extra = {"EXT"} + }, + .compilationdatetime = __DATE__ " " __TIME__, + .userdefined = {0} +}; + + + +#if !defined(STM32HAL_BOARD_AMCFOC_2CM4) + #error --> specify BOARD_name +#else +static eEboardInfo_t s_loader_boardinfo = +{ + .info = + { + .entity = + { + .type = ee_entity_board, + .signature = eobrd_amc, + .version = + { + .major = 1, + .minor = 1 + }, + .builddate = + { + .year = 2022, + .month = 4, + .day = 1, + .hour = 19, + .min = 19 + } + }, + .rom = + { + .addr = EENV_ROMSTART, + .size = EENV_ROMSIZE + }, + .ram = + { + .addr = EENV_RAMSTART, + .size = EENV_RAMSIZE + }, + .storage = + { + .type = ee_strg_eeprom, + .size = EENV_STGSIZE, + .addr = EENV_STGSTART + }, + .communication = ee_commtype_eth | ee_commtype_can1 | ee_commtype_can2, + .name = "amc" + }, + .uniqueid = 0, + .extra = {0} +}; + +#endif + + +static void s_loader_shared_services_init(void); +static void s_loader_manage_error(embot::core::relTime rate = 100*embot::core::time1millisec); +static void s_loader_exec_loader(void); +static void s_loader_eval_jump_request_from_an_eproc(void); +static void s_loader_attempt_jump(eEprocess_t proc, uint32_t adr_in_case_proc_fails); + +constexpr uint32_t LOADER_ADR_INVALID {0xffffffff}; + + +void thejumper() +{ + + s_loader_shared_services_init(); + +//#if defined(DEBUG_eraseEEPROM) +// ee_sharserv_sys_storage_reset(); +// s_loader_shared_services_init(); +//#endif + + s_loader_eval_jump_request_from_an_eproc(); + + eEprocess_t startup = ee_procNone; + eEresult_t eeres = ee_sharserv_part_proc_startup_get(&startup); + if(ee_res_NOK_generic == eeres) + { + startup = ee_procUpdater; + } + s_loader_attempt_jump(startup, LOADER_ADR_INVALID); + + // if it fails a jump to startup ... do a last attempt to jump to eUpdater + s_loader_attempt_jump(ee_procUpdater, LOADER_ADR_INVALID); + + // if we are in here we cannot jump to the startup and not even to the updater. + s_loader_manage_error(); +} + + +// - static functions + +static void s_loader_manage_error(embot::core::relTime rate) +{ + defaultapplication(rate); +} + +static void s_on_sharserv_error(void) +{ + s_loader_manage_error(); +} + +static void s_loader_shared_services_init(void) +{ + + eEprocess_t defproc = ee_procNone; + eEprocess_t startup = ee_procNone; + + sharserv_mode_t sharservmode = + { + .onerror = s_on_sharserv_error, + .initmode = sharserv_base_initmode_forcestorageinit + }; + + if(ee_res_OK != ee_sharserv_isvalid()) + { + s_loader_manage_error(); + } + else + { + // init sharserv + if(ee_res_OK != ee_sharserv_init(&sharservmode)) + { + s_loader_manage_error(); + } + } + + // now all are initted. then ... + + // put signature in partition table + if(ee_res_OK != ee_sharserv_part_proc_synchronise(ee_procLoader, (const eEmoduleInfo_t *)&s_loader_info_extended)) + { + s_loader_manage_error(); + } + + // impose boardinfo + s_loader_boardinfo.uniqueid = embot::hw::sys::uniqueid(); + + if(ee_res_OK != ee_sharserv_info_boardinfo_synchronise(&s_loader_boardinfo)) + { + s_loader_manage_error(); + } + + // impose startup process + if(ee_res_OK != ee_sharserv_part_proc_startup_get(&startup)) + { + // we impose that the startup process is the updater + ee_sharserv_part_proc_startup_set(ee_procUpdater); + } + + // impose def2run process + if(ee_res_OK != ee_sharserv_part_proc_def2run_get(&defproc)) + { + // we impose that the default process is the updater + ee_sharserv_part_proc_def2run_set(ee_procUpdater); + } + +#if defined(DEBUG_forceEEPROM_DEF2RUNequalAPPLICATION) + // we impose that the application is the def2run + ee_sharserv_part_proc_def2run_set(ee_procApplication); +#endif +} + +// used to eval the jump request coming from another process +static void s_loader_eval_jump_request_from_an_eproc(void) +{ + eEprocess_t pr = ee_procNone; + + if(ee_res_OK == ee_sharserv_ipc_gotoproc_get(&pr)) + { + ee_sharserv_ipc_gotoproc_clr(); + + if(ee_procUpdater == pr) + { // we communicate to the updater to stay forever and not to jump to default after the 5 (or what) seconds + ee_sharserv_ipc_gotoproc_set(ee_procUpdater); + } + + // attempt only to the requested process. + s_loader_attempt_jump(pr, LOADER_ADR_INVALID); + + // if in here ... the jump failed, thus ... behave as if no order at all + ee_sharserv_ipc_gotoproc_clr(); + +// // if in here ... the jump failed, thus ... it is better to go to the updater and stay there forever +// ee_sharserv_ipc_gotoproc_set(ee_procUpdater); +// s_loader_attempt_jump(ee_procUpdater, LOADER_ADR_INVALID); + + } + + uint32_t address2jump = 0; + if(ee_res_OK == ee_sharserv_ipc_jump2addr_get(&address2jump)) + { + ee_sharserv_ipc_jump2addr_clr(); + + if(ee_res_OK == ee_sharserv_sys_canjump(address2jump)) + { + ee_sharserv_sys_jumpnow(address2jump); + } + + } +} + +// used to attempt a jump to a process +static void s_loader_attempt_jump(eEprocess_t proc, uint32_t adr_in_case_proc_fails) +{ + uint32_t address = LOADER_ADR_INVALID; + + if(ee_procNone != proc) + { + + if(ee_procLoader == proc) + { + // avoid recursive bootstraps + s_loader_exec_loader(); + } + + // attempt to get the address of the proc from partition table. + // it works only if the process already run before and register itself in the partition table. + // if it fails ... use brute force mode + if(ee_res_NOK_generic == ee_sharserv_part_proc_runaddress_get(proc, &address)) + { + switch(proc) + { + case ee_procUpdater: address = EENV_MEMMAP_EUPDATER_ROMADDR; break; + case ee_procApplication: address = EENV_MEMMAP_EAPPLICATION_ROMADDR; break; + default: address = LOADER_ADR_INVALID; break; + } + } + + // if we retrieve the address ... attempt to jump + if(LOADER_ADR_INVALID != address) + { + if(ee_res_OK == ee_sharserv_sys_canjump(address)) + { + ee_sharserv_sys_jumpnow(address); + } + } + + } + + // if in here it means the we could not jump to the address of proc, thus we attempt an alternative. + if(LOADER_ADR_INVALID != adr_in_case_proc_fails) + { + // attempt with adr_in_case_proc_fails + if(ee_res_OK == ee_sharserv_sys_canjump(adr_in_case_proc_fails)) + { + ee_sharserv_sys_jumpnow(adr_in_case_proc_fails); + } + } + + // if i am in here we cannot jump ... + return; +} + +// the default application in case a process ask to execute the loader +void s_loader_exec_loader(void) +{ + defaultapplication(); +} + +//#endif + + +#else // #if 1 + +/* + * Copyright (C) 2024 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + +#include "embot_core.h" +#include "embot_hw.h" +#include "embot_hw_sys.h" +#include "embot_hw_led.h" +#include "embot_hw_eeprom.h" +#include "eEmemorymap.h" + +// in here we run the baremetal embot::hw application. +// for the required get1microtime() we can either use a very naked approach or even the systick + +#define USE_SYSTICK_AS_TIME_BASE + +#if defined(USE_SYSTICK_AS_TIME_BASE) + +#include "stm32hal.h" + +static volatile uint64_t s_1mstickcount = 0; // it must be volatile +constexpr uint32_t s_rate1khz = 1000; +#ifdef __cplusplus +extern "C" { +#endif +void SysTick_Handler(void) +{ + s_1mstickcount++; +} +#ifdef __cplusplus +} // closing brace for extern "C" +#endif + +static void stm32hal_tick1msecinit() +{ + HAL_SYSTICK_Config(SystemCoreClock/s_rate1khz); +} + +static uint32_t stm32hal_tick1msecget() +{ + return s_1mstickcount; +} + +embot::core::Time get1microtime1() +{ + return embot::core::time1millisec * stm32hal_tick1msecget(); +} + +constexpr embot::hw::Config hwCFG {stm32hal_tick1msecinit, get1microtime1}; + +#else + +embot::core::Time get1microtime2() +{ + static constexpr embot::core::relTime resolution{10}; + // wait some usec and then returns the value + static volatile uint64_t cnt = 0; + embot::hw::sys::delay(resolution); + cnt += resolution; + return cnt; +} + +constexpr embot::hw::Config hwCFG {nullptr, get1microtime2}; + +#endif // USE_SYSTICK_AS_TIME_BASE + + +// principal debug macros + +// if defined it forces tge eeprom to have def2run = application, so that the eupdater will jump to application +#undef DEBUG_forceEEPROM_DEF2RUNequalAPPLICATION +// if defined it does not jump and forces execution of defaultapplication() +#undef DEBUG_stayinhere +// if defined it enables the CM4 core after clock initialization inside embot::hw::init() +#undef DEBUG_startCMxnow + +// used functions + +void thejumper(); + +[[noreturn]] void defaultapplication(embot::core::relTime blinkrate = applblinkrate); + + +#include "embot_hw_dualcore.h" + + +#if defined(DEBUG_startCMxnow) +constexpr embot::hw::dualcore::Config dcc {embot::hw::dualcore::Config::HW::forceinit, embot::hw::dualcore::Config::CMD::activate }; +#else +constexpr embot::hw::dualcore::Config dcc {embot::hw::dualcore::Config::HW::forceinit, embot::hw::dualcore::Config::CMD::donothing }; +#endif + +int main(void) +{ + // hw init + embot::hw::dualcore::config(dcc); + embot::hw::init(hwCFG); +#if !defined(DEBUG_stayinhere) + // eval jump + thejumper(); +#endif + // run default application + defaultapplication(); +} + + +[[noreturn]] void defaultapplication(embot::core::relTime blinkrate) +{ + embot::hw::led::init(embot::hw::LED::one); + for(;;) + { + embot::core::wait(blinkrate); + embot::hw::led::toggle(embot::hw::LED::one); + } +} + + +// - dependencies + +#include "eEmemorymap.h" +#include "eEsharedServices.h" +#include "EoBoards.h" + +#if defined(dontuseMEMmapping) +constexpr eEmoduleExtendedInfo_t s_loader_info_extended = +#else +constexpr eEmoduleExtendedInfo_t s_loader_info_extended __attribute__((section(EENV_MODULEINFO_LOADER_AT))) = +#endif +{ + .moduleinfo = + { + .info = + { + .entity = + { + .type = ee_entity_process, + .signature = ee_procLoader, + .version = + { + .major = 3, + .minor = 2 + }, + .builddate = + { + .year = 2022, + .month = 9, + .day = 16, + .hour = 9, + .min = 15 + } + }, + .rom = + { + .addr = EENV_MEMMAP_ELOADER_ROMADDR, + .size = EENV_MEMMAP_ELOADER_ROMSIZE + }, + .ram = + { + .addr = EENV_MEMMAP_ELOADER_RAMADDR, + .size = EENV_MEMMAP_ELOADER_RAMSIZE + }, + .storage = + { + .type = ee_strg_none, + .size = 0, + .addr = 0 + }, + .communication = ee_commtype_none, + .name = "eLoader" + }, + .protocols = + { + .udpprotversion = { .major = 0, .minor = 0}, + .can1protversion = { .major = 0, .minor = 0}, + .can2protversion = { .major = 0, .minor = 0}, + .gtwprotversion = { .major = 0, .minor = 0} + }, + .extra = {"EXT"} + }, + .compilationdatetime = __DATE__ " " __TIME__, + .userdefined = {0} +}; + + + +#if !defined(STM32HAL_BOARD_AMC2CM4) + #error --> specify BOARD_name +#else +static eEboardInfo_t s_loader_boardinfo = +{ + .info = + { + .entity = + { + .type = ee_entity_board, + .signature = eobrd_amc, + .version = + { + .major = 1, + .minor = 1 + }, + .builddate = + { + .year = 2022, + .month = 4, + .day = 1, + .hour = 19, + .min = 19 + } + }, + .rom = + { + .addr = EENV_ROMSTART, + .size = EENV_ROMSIZE + }, + .ram = + { + .addr = EENV_RAMSTART, + .size = EENV_RAMSIZE + }, + .storage = + { + .type = ee_strg_eeprom, + .size = EENV_STGSIZE, + .addr = EENV_STGSTART + }, + .communication = ee_commtype_eth | ee_commtype_can1 | ee_commtype_can2, + .name = "amc" + }, + .uniqueid = 0, + .extra = {0} +}; + +#endif + + +static void s_loader_shared_services_init(void); +static void s_loader_shared_services_init(void); +static void s_loader_manage_error(embot::core::relTime rate = 100*embot::core::time1millisec); +static void s_loader_exec_loader(void); +static void s_loader_eval_jump_request_from_an_eproc(void); +static void s_loader_attempt_jump(eEprocess_t proc, uint32_t adr_in_case_proc_fails); + +constexpr uint32_t LOADER_ADR_INVALID {0xffffffff}; + + +void thejumper() +{ +#if defined(DEBUG_eraseEEPROM) + ee_sharserv_sys_storage_reset(); +#endif + + s_loader_shared_services_init(); + + s_loader_eval_jump_request_from_an_eproc(); + + eEprocess_t startup = ee_procNone; + eEresult_t eeres = ee_sharserv_part_proc_startup_get(&startup); + if(ee_res_NOK_generic == eeres) + { + startup = ee_procUpdater; + } + s_loader_attempt_jump(startup, LOADER_ADR_INVALID); + + // if it fails a jump to startup ... do a last attempt to jump to eUpdater + s_loader_attempt_jump(ee_procUpdater, LOADER_ADR_INVALID); + + // if we are in here we cannot jump to the startup and not even to the updater. + s_loader_manage_error(); +} + + +// - static functions + +static void s_loader_manage_error(embot::core::relTime rate) +{ + defaultapplication(rate); +} + +static void s_on_sharserv_error(void) +{ + s_loader_manage_error(); +} + +static void s_loader_shared_services_init(void) +{ + eEprocess_t defproc = ee_procNone; + eEprocess_t startup = ee_procNone; + + sharserv_mode_t sharservmode = + { + .onerror = s_on_sharserv_error, + .initmode = sharserv_base_initmode_forcestorageinit + }; + + if(ee_res_OK != ee_sharserv_isvalid()) + { + s_loader_manage_error(); + } + else + { + // init sharserv + if(ee_res_OK != ee_sharserv_init(&sharservmode)) + { + s_loader_manage_error(); + } + } + + // now all are initted. then ... + + // put signature in partition table + if(ee_res_OK != ee_sharserv_part_proc_synchronise(ee_procLoader, (const eEmoduleInfo_t *)&s_loader_info_extended)) + { + s_loader_manage_error(); + } + + // impose boardinfo + s_loader_boardinfo.uniqueid = embot::hw::sys::uniqueid(); + + if(ee_res_OK != ee_sharserv_info_boardinfo_synchronise(&s_loader_boardinfo)) + { + s_loader_manage_error(); + } + + // impose startup process + if(ee_res_OK != ee_sharserv_part_proc_startup_get(&startup)) + { + // we impose that the startup process is the updater + ee_sharserv_part_proc_startup_set(ee_procUpdater); + } + + // impose def2run process + if(ee_res_OK != ee_sharserv_part_proc_def2run_get(&defproc)) + { + // we impose that the default process is the updater + ee_sharserv_part_proc_def2run_set(ee_procUpdater); + } + +#if defined(DEBUG_forceEEPROM_DEF2RUNequalAPPLICATION) + // we impose that the application is the def2run + ee_sharserv_part_proc_def2run_set(ee_procApplication); +#endif +} + +// used to eval the jump request coming from another process +static void s_loader_eval_jump_request_from_an_eproc(void) +{ + eEprocess_t pr = ee_procNone; + + if(ee_res_OK == ee_sharserv_ipc_gotoproc_get(&pr)) + { + ee_sharserv_ipc_gotoproc_clr(); + + if(ee_procUpdater == pr) + { // we communicate to the updater to stay forever and not to jump to default after the 5 (or what) seconds + ee_sharserv_ipc_gotoproc_set(ee_procUpdater); + } + + // attempt only to the requested process. + s_loader_attempt_jump(pr, LOADER_ADR_INVALID); + + // if in here ... the jump failed, thus ... behave as if no order at all + ee_sharserv_ipc_gotoproc_clr(); + +// // if in here ... the jump failed, thus ... it is better to go to the updater and stay there forever +// ee_sharserv_ipc_gotoproc_set(ee_procUpdater); +// s_loader_attempt_jump(ee_procUpdater, LOADER_ADR_INVALID); + + } + + uint32_t address2jump = 0; + if(ee_res_OK == ee_sharserv_ipc_jump2addr_get(&address2jump)) + { + ee_sharserv_ipc_jump2addr_clr(); + + if(ee_res_OK == ee_sharserv_sys_canjump(address2jump)) + { + ee_sharserv_sys_jumpnow(address2jump); + } + + } +} + +// used to attempt a jump to a process +static void s_loader_attempt_jump(eEprocess_t proc, uint32_t adr_in_case_proc_fails) +{ + uint32_t address = LOADER_ADR_INVALID; + + if(ee_procNone != proc) + { + + if(ee_procLoader == proc) + { + // avoid recursive bootstraps + s_loader_exec_loader(); + } + + // attempt to get the address of the proc from partition table. + // it works only if the process already run before and register itself in the partition table. + // if it fails ... use brute force mode + if(ee_res_NOK_generic == ee_sharserv_part_proc_runaddress_get(proc, &address)) + { + switch(proc) + { + case ee_procUpdater: address = EENV_MEMMAP_EUPDATER_ROMADDR; break; + case ee_procApplication: address = EENV_MEMMAP_EAPPLICATION_ROMADDR; break; + default: address = LOADER_ADR_INVALID; break; + } + } + + // if we retrieve the address ... attempt to jump + if(LOADER_ADR_INVALID != address) + { + if(ee_res_OK == ee_sharserv_sys_canjump(address)) + { + ee_sharserv_sys_jumpnow(address); + } + } + + } + + // if in here it means the we could not jump to the address of proc, thus we attempt an alternative. + if(LOADER_ADR_INVALID != adr_in_case_proc_fails) + { + // attempt with adr_in_case_proc_fails + if(ee_res_OK == ee_sharserv_sys_canjump(adr_in_case_proc_fails)) + { + ee_sharserv_sys_jumpnow(adr_in_case_proc_fails); + } + } + + // if i am in here we cannot jump ... + return; +} + +// the default application in case a process ask to execute the loader +void s_loader_exec_loader(void) +{ + defaultapplication(applblinkrate); +} + +#endif + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_dualcore.cpp b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_dualcore.cpp index b2098e2e19..57d006844e 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_dualcore.cpp +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_dualcore.cpp @@ -20,6 +20,7 @@ #include "embot_hw_bsp_config.h" #include "embot_hw_dualcore_bsp.h" +#include "embot_hw_sys.h" #include #include "embot_core_binary.h" @@ -171,9 +172,15 @@ namespace embot::hw::dualcore { HAL_HSEM_FastTake(hsem); // 2. enable the other core C2 - HAL_RCCEx_EnableBootCore(other_RCC_BOOT_Cx); + HAL_RCCEx_EnableBootCore(other_RCC_BOOT_Cx); + + // 3. wait a bit to allow the other core to wake up, bootstrap and execute until the holding of the semaphore + // it is not necessary but it is nice to proceed knowing that the other core (if good code is present) has the + // hw::bsp initted and is waiting for the semaphore to be released + constexpr embot::core::relTime tinywait {20*embot::core::time1microsec}; + embot::hw::sys::delay(tinywait); - // 3. and release hsem-0 + // 4. and release hsem-0 HAL_HSEM_Release(hsem, procID0); } break; @@ -243,8 +250,14 @@ namespace embot::hw::dualcore { // 2. enable the other core C2 HAL_RCCEx_EnableBootCore(other_RCC_BOOT_Cx); + + // 3. wait a bit to allow the other core to wake up, bootstrap and execute until the holding of the semaphore + // it is not necessary but it is nice to proceed knowing that the other core (if good code is present) has the + // hw::bsp initted and is waiting for the semaphore to be released + constexpr embot::core::relTime tinywait {20*embot::core::time1microsec}; + embot::hw::sys::delay(tinywait); - // 3. and release hsem-0 + // 4. and release hsem-0 HAL_HSEM_Release(hsem, procID0); } break; @@ -313,8 +326,14 @@ namespace embot::hw::dualcore { // 2. enable the other core c1 HAL_RCCEx_EnableBootCore(other_RCC_BOOT_Cx); + + // 3. wait a bit to allow the other core to wake up, bootstrap and execute until the holding of the semaphore + // it is not necessary but it is nice to proceed knowing that the other core (if good code is present) has the + // hw::bsp initted and is waiting for the semaphore to be released + constexpr embot::core::relTime tinywait {20*embot::core::time1microsec}; + embot::hw::sys::delay(tinywait); - // 3. and release hsem-0 + // 4. and release hsem-0 HAL_HSEM_Release(hsem, procID0); } break; diff --git a/emBODY/eBcode/arch-arm/libs/highlevel/services/embenv/src/shalBASE.c b/emBODY/eBcode/arch-arm/libs/highlevel/services/embenv/src/shalBASE.c index faa5c5a11a..744cbf69bc 100644 --- a/emBODY/eBcode/arch-arm/libs/highlevel/services/embenv/src/shalBASE.c +++ b/emBODY/eBcode/arch-arm/libs/highlevel/services/embenv/src/shalBASE.c @@ -157,7 +157,7 @@ static volatile baseIPCdataStorage_t s_shalbase_IPCdataStored __attribut #if defined(STM32HAL_BOARD_STM32H745DISCO) static volatile baseIPCdataStorage_t s_shalbase_IPCdataStored = {0}; //static volatile baseIPCdataStorage_t s_shalbase_IPCdataStored __attribute__((section(".ARM.__at_0x24000000"))); -#elif defined(STM32HAL_BOARD_AMC) +#elif defined(STM32HAL_BOARD_AMC) | defined(STM32HAL_BOARD_AMCFOC_2CM4) static volatile baseIPCdataStorage_t s_shalbase_IPCdataStored __attribute__((section(EENV_SHARSERV_BASE_RAMADDR_AT))); #elif defined(STM32HAL_BOARD_STM32G4EVAL) static volatile baseIPCdataStorage_t s_shalbase_IPCdataStored __attribute__((section(".ARM.__at_0x20000000")));