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Commit 61a1813

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moffittenginemoffittengine
committed
screen integrated. bitstream error free. no board function
1 parent 7be967a commit 61a1813

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8 files changed

+4259
-3567
lines changed

8 files changed

+4259
-3567
lines changed

‎CP2.v

+8-7
Original file line numberDiff line numberDiff line change
@@ -165,22 +165,22 @@ module CP2(
165165
dmaAck : state_dma = HOLD_ACK ? dmaReadA : dmaAck;
166166
dmaReadA : begin
167167
r00[i] <= wrData_dma;
168-
addr_dma = addr_dma + 4;
168+
addr_dma = addr_dma + 1;
169169
length = length + 1;
170170
state_dma = (length < reg_cpu[0][15:0])? dmaReadB : dmaPadB; end
171171
dmaReadB : begin
172172
r01[i] <= wrData_dma;
173-
addr_dma = addr_dma + 4;
173+
addr_dma = addr_dma + 1;
174174
length = length + 1;
175175
state_dma = (length < reg_cpu[0][15:0])? dmaReadC : dmaPadC; end
176176
dmaReadC : begin
177177
r10[i] <= wrData_dma;
178-
addr_dma = addr_dma + 4;
178+
addr_dma = addr_dma + 1;
179179
length = length + 1;
180180
state_dma = (length < reg_cpu[0][15:0])? dmaReadD : dmaPadD; end
181181
dmaReadD : begin
182182
r11[i] <= wrData_dma;
183-
addr_dma = addr_dma + 4;
183+
addr_dma = addr_dma + 1;
184184
length = length + 1;
185185
i = i + 1;
186186
state_dma = (length < reg_cpu[0][15:0])? dmaReadA : dmaReadDone; end
@@ -211,19 +211,20 @@ module CP2(
211211
state_dma = dmaWriteB; end
212212
dmaWriteB : begin
213213
rdData_dma = r00[i];
214+
addr_dma = addr_dma + 1;
214215
length = length - 4;
215216
state_dma = dmaWriteC; end
216217
dmaWriteC : begin
217218
rdData_dma = r01[i];
218-
addr_dma = addr_dma + 4;
219+
addr_dma = addr_dma + 1;
219220
state_dma = dmaWriteD; end
220221
dmaWriteD : begin
221222
rdData_dma = r10[i];
222-
addr_dma = addr_dma + 4;
223+
addr_dma = addr_dma + 1;
223224
state_dma = dmaWriteE; end
224225
dmaWriteE : begin
225226
rdData_dma = r11[i];
226-
addr_dma = addr_dma + 4;
227+
addr_dma = addr_dma + 1;
227228
i = i + i;
228229
state_dma = (length > 0) ? dmaWriteB : dmaWriteDone; end
229230
dmaWriteDone:begin

‎constraints.xdc

+33-47
Original file line numberDiff line numberDiff line change
@@ -1,71 +1,57 @@
11
# Based on Digilent's Nexys Video reference XDC,
22
# with extra pins not used in the labs removed.
3-
3+
#set_property -dict { PACKAGE_PIN R4 IOSTANDARD LVCMOS33 } [get_ports { clk }]; #IO_L13P_T2_MRCC_34 Sch=sysclk
4+
#create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk]
45
# Clock signal (100 MHz)
56
set_property -dict { PACKAGE_PIN R4 IOSTANDARD LVCMOS33 } [get_ports { clk450MHz }]; #IO_L13P_T2_MRCC_34 Sch=sysclk
67
create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports {clk450MHz}];
78

89

9-
#reset for stuff
10-
set_property -dict { PACKAGE_PIN B22 IOSTANDARD LVCMOS33} [get_ports { rst }]; #IO_L20N_T3_16 Sch=btnc
11-
12-
#clk for this thing
13-
#set_property -dict { PACKAGE_PIN D22 IOSTANDARD LVCMOS33} [get_ports { singleStep }]; #IO_L22N_T3_16 Sch=btnd
1410

1511
#interrupts
16-
set_property -dict { PACKAGE_PIN E22 IOSTANDARD LVCMOS33} [get_ports { INT[0] }]; #IO_L22P_T3_16 Sch=sw[0]
17-
set_property -dict { PACKAGE_PIN F21 IOSTANDARD LVCMOS33} [get_ports { INT[1] }]; #IO_25_16 Sch=sw[1]
18-
set_property -dict { PACKAGE_PIN G21 IOSTANDARD LVCMOS33} [get_ports { INT[2] }]; #IO_L24P_T3_16 Sch=sw[2]
19-
set_property -dict { PACKAGE_PIN G22 IOSTANDARD LVCMOS33} [get_ports { INT[3] }]; #IO_L24N_T3_16 Sch=sw[3]
20-
#set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33} [get_ports { INT[4] }]; #IO_L6P_T0_15 Sch=sw[4]
12+
set_property -dict { PACKAGE_PIN E22 IOSTANDARD LVCMOS12} [get_ports { INT[0] }]; #IO_L22P_T3_16 Sch=sw[0]
13+
set_property -dict { PACKAGE_PIN F21 IOSTANDARD LVCMOS12} [get_ports { INT[1] }]; #IO_25_16 Sch=sw[1]
14+
set_property -dict { PACKAGE_PIN G21 IOSTANDARD LVCMOS12} [get_ports { INT[2] }]; #IO_L24P_T3_16 Sch=sw[2]
15+
set_property -dict { PACKAGE_PIN G22 IOSTANDARD LVCMOS12} [get_ports { INT[3] }]; #IO_L24N_T3_16 Sch=sw[3]
16+
#set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS12} [get_ports { INT[4] }]; #IO_L6P_T0_15 Sch=sw[4]
2117

22-
#test unit
23-
set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS25 } [get_ports { pc_current }]; #IO_L15P_T2_DQS_13 Sch=led[0]
2418

2519
## UART
2620
set_property -dict { PACKAGE_PIN AA19 IOSTANDARD LVCMOS33 } [get_ports { uart_rx_out }]; #IO_L15P_T2_DQS_RDWR_B_14 Sch=uart_rx_out
2721
#set_property -dict { PACKAGE_PIN V18 IOSTANDARD LVCMOS33 } [get_ports { uart_tx_in }]; #IO_L14P_T2_SRCC_14 Sch=uart_tx_in
2822

2923
# Slide switches
30-
#set_property -dict { PACKAGE_PIN J15 IOSTANDARD LVCMOS33 } [get_ports { switches[0] }]; #IO_L24N_T3_RS0_15 Sch=sw[0]
31-
#set_property -dict { PACKAGE_PIN L16 IOSTANDARD LVCMOS33 } [get_ports { switches[1] }]; #IO_L3N_T0_DQS_EMCCLK_14 Sch=sw[1]
32-
#set_property -dict { PACKAGE_PIN M13 IOSTANDARD LVCMOS33 } [get_ports { switches[2] }]; #IO_L6N_T0_D08_VREF_14 Sch=sw[2]
33-
#set_property -dict { PACKAGE_PIN R15 IOSTANDARD LVCMOS33 } [get_ports { switches[3] }]; #IO_L13N_T2_MRCC_14 Sch=sw[3]
34-
#set_property -dict { PACKAGE_PIN R17 IOSTANDARD LVCMOS33 } [get_ports { switches[4] }]; #IO_L12N_T1_MRCC_14 Sch=sw[4]
35-
#set_property -dict { PACKAGE_PIN T18 IOSTANDARD LVCMOS33 } [get_ports { switches[5] }]; #IO_L7N_T1_D10_14 Sch=sw[5]
36-
#set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 } [get_ports { switches[6] }]; #IO_L17N_T2_A13_D29_14 Sch=sw[6]
37-
#set_property -dict { PACKAGE_PIN R13 IOSTANDARD LVCMOS33 } [get_ports { switches[7] }]; #IO_L5N_T0_D07_14 Sch=sw[7]
24+
set_property -dict { PACKAGE_PIN K13 IOSTANDARD LVCMOS12 } [get_ports { sw6 }];
25+
set_property -dict { PACKAGE_PIN M17 IOSTANDARD LVCMOS12 } [get_ports { sw7 }];
3826

39-
# LEDs
40-
#set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports { memwrite }]; #IO_L18P_T2_A24_15 Sch=led[0]
41-
#set_property -dict { PACKAGE_PIN K15 IOSTANDARD LVCMOS33 } [get_ports { sinkBit }]; #IO_L24P_T3_RS1_15 Sch=led[1]
4227

28+
# LEDs
29+
set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS25 } [get_ports { led[0] }]; #IO_L15P_T2_DQS_13 Sch=led[0]
30+
set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS25 } [get_ports { led[1] }]; #IO_L15N_T2_DQS_13 Sch=led[1]
31+
set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS25 } [get_ports { led[2] }]; #IO_L17P_T2_13 Sch=led[2]
32+
set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS25 } [get_ports { led[3] }]; #IO_L17N_T2_13 Sch=led[3]
33+
set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS25 } [get_ports { led[4] }]; #IO_L14N_T2_SRCC_13 Sch=led[4]
34+
set_property -dict { PACKAGE_PIN W16 IOSTANDARD LVCMOS25 } [get_ports { led[5] }]; #IO_L16N_T2_13 Sch=led[5]
35+
set_property -dict { PACKAGE_PIN W15 IOSTANDARD LVCMOS25 } [get_ports { led[6] }]; #IO_L16P_T2_13 Sch=led[6]
36+
set_property -dict { PACKAGE_PIN Y13 IOSTANDARD LVCMOS25 } [get_ports { led[7] }]; #IO_L5P_T0_13 Sch=led[7]
4337
# 7-segment display
4438

45-
# Segment cathodes (common to all digits)
46-
#set_property -dict { PACKAGE_PIN K13 IOSTANDARD LVCMOS33 } [get_ports { LEDOUT[0] }]; #IO_L17P_T2_A26_15 Sch=cd
47-
#set_property -dict { PACKAGE_PIN K16 IOSTANDARD LVCMOS33 } [get_ports { LEDOUT[1] }]; #IO_25_15 Sch=cc
48-
#set_property -dict { PACKAGE_PIN P15 IOSTANDARD LVCMOS33 } [get_ports { LEDOUT[2] }]; #IO_L13P_T2_MRCC_14 Sch=ce
49-
#set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 } [get_ports { LEDOUT[3] }]; #IO_L4P_T0_D04_14 Sch=cg
50-
#set_property -dict { PACKAGE_PIN R10 IOSTANDARD LVCMOS33 } [get_ports { LEDOUT[4] }]; #IO_25_14 Sch=cb
51-
#set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 } [get_ports { LEDOUT[5] }]; #IO_L19P_T3_A10_D26_14 Sch=cf
52-
#set_property -dict { PACKAGE_PIN T10 IOSTANDARD LVCMOS33 } [get_ports { LEDOUT[6] }]; #IO_L24N_T3_A00_D16_14 Sch=ca
53-
#set_property -dict { PACKAGE_PIN H15 IOSTANDARD LVCMOS33 } [get_ports { LEDOUT[7] }]; #IO_L19N_T3_A21_VREF_15 Sch=dp
54-
55-
# Anodes per digit
56-
#set_property -dict { PACKAGE_PIN J17 IOSTANDARD LVCMOS33 } [get_ports { LEDSEL[0] }]; #IO_L23P_T3_FOE_B_15 Sch=an[0]
57-
#set_property -dict { PACKAGE_PIN J18 IOSTANDARD LVCMOS33 } [get_ports { LEDSEL[1] }]; #IO_L23N_T3_FWE_B_15 Sch=an[1]
58-
#set_property -dict { PACKAGE_PIN T9 IOSTANDARD LVCMOS33 } [get_ports { LEDSEL[2] }]; #IO_L24P_T3_A01_D17_14 Sch=an[2]
59-
#set_property -dict { PACKAGE_PIN J14 IOSTANDARD LVCMOS33 } [get_ports { LEDSEL[3] }]; #IO_L19P_T3_A22_15 Sch=an[3]
60-
#set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 } [get_ports { LEDSEL[4] }]; #IO_L8N_T1_D12_14 Sch=an[4]
61-
#set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS33 } [get_ports { LEDSEL[5] }]; #IO_L14P_T2_SRCC_14 Sch=an[5]
62-
#set_property -dict { PACKAGE_PIN K2 IOSTANDARD LVCMOS33 } [get_ports { LEDSEL[6] }]; #IO_L23P_T3_35 Sch=an[6]
63-
#set_property -dict { PACKAGE_PIN U13 IOSTANDARD LVCMOS33 } [get_ports { LEDSEL[7] }]; #IO_L23N_T3_A02_D18_14 Sch=an[7]
6439

6540
# Pushbuttons
41+
set_property -dict { PACKAGE_PIN G4 IOSTANDARD LVCMOS12 } [get_ports { rst }]; #IO_L12N_T1_MRCC_35 Sch=cpu_resetn
42+
#set_property -dict { PACKAGE_PIN B22 IOSTANDARD LVCMOS12 } [get_ports { btnC }]; #IO_L20N_T3_16 Sch=btnc
43+
#set_property -dict { PACKAGE_PIN D22 IOSTANDARD LVCMOS12 } [get_ports { btnD }]; #IO_L22N_T3_16 Sch=btnd
44+
set_property -dict { PACKAGE_PIN C22 IOSTANDARD LVCMOS12 } [get_ports { btnl }]; #IO_L20P_T3_16 Sch=btnl
45+
set_property -dict { PACKAGE_PIN D14 IOSTANDARD LVCMOS12 } [get_ports { btnr }]; #IO_L6P_T0_16 Sch=btnr
46+
#set_property -dict { PACKAGE_PIN F15 IOSTANDARD LVCMOS12 } [get_ports { btnU }]; #IO_0_16 Sch=btnu
47+
48+
49+
# OLED Display
50+
set_property -dict { PACKAGE_PIN W22 IOSTANDARD LVCMOS33 } [get_ports { oled_dc }]; #IO_L7N_T1_D10_14 Sch=oled_dc
51+
set_property -dict { PACKAGE_PIN U21 IOSTANDARD LVCMOS33 } [get_ports { oled_res }]; #IO_L4N_T0_D05_14 Sch=oled_res
52+
set_property -dict { PACKAGE_PIN W21 IOSTANDARD LVCMOS33 } [get_ports { oled_sclk }]; #IO_L7P_T1_D09_14 Sch=oled_sclk
53+
set_property -dict { PACKAGE_PIN Y22 IOSTANDARD LVCMOS33 } [get_ports { oled_sdin }]; #IO_L9N_T1_DQS_D13_14 Sch=oled_sdin
54+
set_property -dict { PACKAGE_PIN P20 IOSTANDARD LVCMOS33 } [get_ports { oled_vbat }]; #IO_0_14 Sch=oled_vbat
55+
set_property -dict { PACKAGE_PIN V22 IOSTANDARD LVCMOS33 } [get_ports { oled_vdd }]; #IO_L3N_T0_DQS_EMCCLK_14 Sch=oled_vdd
6656

67-
# Active low
68-
#set_property -dict { PACKAGE_PIN P17 IOSTANDARD LVCMOS33 } [get_ports { rst }]; #IO_L12P_T1_MRCC_14 Sch=btnl
69-
70-
#=============================================================================
7157

‎spiScreen/others/characterLib.coe ‎imports/src/others/characterLib.coe

File renamed without changes.

‎spiScreen/others/init_sequence.coe ‎imports/src/others/init_sequence.coe

File renamed without changes.

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