Skip to content
This repository was archived by the owner on Jun 29, 2023. It is now read-only.

Commit 1567bdb

Browse files
jgvillyjgvilly
committed
Working AES unit. Test code to work with the data.
1 parent 212721c commit 1567bdb

File tree

8 files changed

+226
-27
lines changed

8 files changed

+226
-27
lines changed

‎CP2.v

+13-13
Original file line numberDiff line numberDiff line change
@@ -119,10 +119,10 @@ module CP2(
119119
reg [31:0] reg_cpu [9:0];
120120

121121
// internal registers; 64kB; each set forms a block
122-
reg [31:0] r00 [0:3999];
123-
reg [31:0] r01 [0:3999];
124-
reg [31:0] r10 [0:3999];
125-
reg [31:0] r11 [0:3999];
122+
reg [31:0] r00 [0:10];
123+
reg [31:0] r01 [0:10];
124+
reg [31:0] r10 [0:10];
125+
reg [31:0] r11 [0:10];
126126

127127
// no CPU output if AES is running : Write Only for Key
128128
// assign rdData_cpu = (!go && (addr_cpu<2)) ? reg_cpu[addr_cpu] : 0 ;
@@ -166,22 +166,22 @@ module CP2(
166166
dmaAck : state_dma = HOLD_ACK ? dmaReadA : dmaAck;
167167
dmaReadA : begin
168168
r00[i] <= wrData_dma;
169-
addr_dma = addr_dma + 1;
169+
addr_dma = addr_dma + 4;
170170
length = length + 1;
171171
state_dma = (length < reg_cpu[0][15:0])? dmaReadB : dmaPadB; end
172172
dmaReadB : begin
173173
r01[i] <= wrData_dma;
174-
addr_dma = addr_dma + 1;
174+
addr_dma = addr_dma + 4;
175175
length = length + 1;
176176
state_dma = (length < reg_cpu[0][15:0])? dmaReadC : dmaPadC; end
177177
dmaReadC : begin
178178
r10[i] <= wrData_dma;
179-
addr_dma = addr_dma + 1;
179+
addr_dma = addr_dma + 4;
180180
length = length + 1;
181181
state_dma = (length < reg_cpu[0][15:0])? dmaReadD : dmaPadD; end
182182
dmaReadD : begin
183183
r11[i] <= wrData_dma;
184-
addr_dma = addr_dma + 1;
184+
addr_dma = addr_dma + 4;
185185
length = length + 1;
186186
i = i + 1;
187187
state_dma = (length < reg_cpu[0][15:0])? dmaReadA : dmaReadDone; end
@@ -208,24 +208,24 @@ module CP2(
208208

209209
dmaWriteA : begin
210210
we_dma <= 1;
211-
addr_dma <= reg_cpu[1][31:0];
211+
addr_dma <= reg_cpu[1][31:0] - 4;
212212
state_dma = dmaWriteB; end
213213
dmaWriteB : begin
214214
rdData_dma = r00[i];
215-
addr_dma = addr_dma + 1;
215+
addr_dma = addr_dma + 4;
216216
length = length - 4;
217217
state_dma = dmaWriteC; end
218218
dmaWriteC : begin
219219
rdData_dma = r01[i];
220-
addr_dma = addr_dma + 1;
220+
addr_dma = addr_dma + 4;
221221
state_dma = dmaWriteD; end
222222
dmaWriteD : begin
223223
rdData_dma = r10[i];
224-
addr_dma = addr_dma + 1;
224+
addr_dma = addr_dma + 4;
225225
state_dma = dmaWriteE; end
226226
dmaWriteE : begin
227227
rdData_dma = r11[i];
228-
addr_dma = addr_dma + 1;
228+
addr_dma = addr_dma + 4;
229229
i = i + i;
230230
state_dma = (length > 0) ? dmaWriteB : dmaWriteDone; end
231231
dmaWriteDone:begin

‎aesTest/tester.asm

+90
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,90 @@
1+
#config for cp2
2+
addi $t0, $zero, 1025
3+
addi $t7, $zero, 1024
4+
5+
mtc0 $zero, $12
6+
mtc0 $zero, $13
7+
mtc0 $zero, $14
8+
9+
#start config for addi
10+
#t6 encrypt, t8 decrypt
11+
addi $t6, $zero, 7
12+
addi $t8, $zero, 6
13+
sll $t6, $t6, 28
14+
sll $t8, $t8, 28
15+
addi $t6, $t6, 1
16+
addi $t8, $t8, 1
17+
#feed a block of data in
18+
addi $t1, $zero, 97
19+
addi $t2, $zero, 98
20+
addi $t3, $zero, 99
21+
addi $t4, $zero, 100
22+
addi $t5, $zero, 0
23+
24+
25+
#store to memory
26+
sw $t1, ($t5)
27+
addi $t5, $t5, 4
28+
sw $t2, ($t5)
29+
addi $t5, $t5, 4
30+
sw $t3, ($t5)
31+
addi $t5, $t5, 4
32+
sw $t4, ($t5)
33+
34+
#enable interrupts
35+
mtc0 $t0, $12
36+
nop
37+
38+
39+
#write the key 2-9
40+
mtc0 $t1, $2
41+
mtc0 $t2, $3
42+
mtc0 $t3, $4
43+
mtc0 $t4, $5
44+
mtc0 $t1, $6
45+
mtc0 $t2, $7
46+
mtc0 $t3, $8
47+
mtc0 $t4, $9
48+
49+
#write the start address 1
50+
mtc0 $zero, $1
51+
52+
#write the status register 0
53+
#30, 29, 28 should all be 1s, smallest bit should be length. in this case 1
54+
mtc0 $t6, $0
55+
56+
nop
57+
test: j test
58+
nop
59+
nop
60+
nop
61+
62+
63+
64+
65+
66+
67+
68+
#Begin ISR
69+
#disable IE
70+
mtc0 $t7, $12
71+
#output to UART
72+
lw $s0, 0x0
73+
sw $s0, 0x7000
74+
lw $s0, 0x4
75+
sw $s0, 0x7000
76+
lw $s0, 0x8
77+
sw $s0, 0x7000
78+
lw $s0, 0xc
79+
sw $s0, 0x7000
80+
81+
#clear
82+
mtc0 $zero, $12
83+
#decrypt
84+
mtc0 $t0, $12
85+
mtc0 $t8, $0
86+
j test
87+
88+
89+
90+

‎aesTest/testprogram.dat

+109
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,109 @@
1+
20080401
2+
200f0400
3+
40806000
4+
40806800
5+
40807000
6+
200e0007
7+
20180006
8+
000e7700
9+
0018c700
10+
21ce0004
11+
23180004
12+
20090061
13+
200a0062
14+
200b0063
15+
200c0064
16+
200d0000
17+
ada90000
18+
21ad0004
19+
adaa0000
20+
21ad0004
21+
adab0000
22+
21ad0004
23+
adac0000
24+
40886000
25+
00000000
26+
48891000
27+
488a1800
28+
488b2000
29+
488c2800
30+
48893000
31+
488a3800
32+
488b4000
33+
488c4800
34+
48800800
35+
488e0000
36+
00000000
37+
08000024
38+
00000000
39+
00000000
40+
00000000
41+
00000000
42+
00000000
43+
00000000
44+
00000000
45+
00000000
46+
00000000
47+
00000000
48+
00000000
49+
00000000
50+
00000000
51+
00000000
52+
00000000
53+
00000000
54+
00000000
55+
00000000
56+
00000000
57+
00000000
58+
00000000
59+
00000000
60+
00000000
61+
00000000
62+
00000000
63+
00000000
64+
00000000
65+
00000000
66+
00000000
67+
00000000
68+
00000000
69+
00000000
70+
00000000
71+
00000000
72+
00000000
73+
00000000
74+
00000000
75+
00000000
76+
00000000
77+
00000000
78+
00000000
79+
00000000
80+
00000000
81+
00000000
82+
00000000
83+
00000000
84+
00000000
85+
00000000
86+
00000000
87+
00000000
88+
00000000
89+
00000000
90+
00000000
91+
00000000
92+
00000000
93+
00000000
94+
00000000
95+
00000000
96+
00000000
97+
408f6000
98+
8c100000
99+
ac107000
100+
8c100004
101+
ac107000
102+
8c100008
103+
ac107000
104+
8c10000c
105+
ac107000
106+
40806000
107+
40886000
108+
48980000
109+
08000024

‎ip/charLib/charLib.xml

+4-4
Original file line numberDiff line numberDiff line change
@@ -738,7 +738,7 @@
738738
<spirit:parameters>
739739
<spirit:parameter>
740740
<spirit:name>GENtimestamp</spirit:name>
741-
<spirit:value>Wed Nov 29 01:45:32 UTC 2017</spirit:value>
741+
<spirit:value>Wed Nov 29 20:57:00 UTC 2017</spirit:value>
742742
</spirit:parameter>
743743
<spirit:parameter>
744744
<spirit:name>boundaryCRC</spirit:name>
@@ -750,7 +750,7 @@
750750
</spirit:parameter>
751751
<spirit:parameter>
752752
<spirit:name>customizationCRC</spirit:name>
753-
<spirit:value>31ee5c77</spirit:value>
753+
<spirit:value>340bb9cc</spirit:value>
754754
</spirit:parameter>
755755
<spirit:parameter>
756756
<spirit:name>customizationCRCversion</spirit:name>
@@ -769,7 +769,7 @@
769769
<spirit:parameters>
770770
<spirit:parameter>
771771
<spirit:name>GENtimestamp</spirit:name>
772-
<spirit:value>Wed Nov 29 01:45:32 UTC 2017</spirit:value>
772+
<spirit:value>Wed Nov 29 20:57:00 UTC 2017</spirit:value>
773773
</spirit:parameter>
774774
<spirit:parameter>
775775
<spirit:name>boundaryCRC</spirit:name>
@@ -781,7 +781,7 @@
781781
</spirit:parameter>
782782
<spirit:parameter>
783783
<spirit:name>customizationCRC</spirit:name>
784-
<spirit:value>31ee5c77</spirit:value>
784+
<spirit:value>340bb9cc</spirit:value>
785785
</spirit:parameter>
786786
<spirit:parameter>
787787
<spirit:name>customizationCRCversion</spirit:name>

‎ip/init_sequence_rom/init_sequence_rom.xml

+4-4
Original file line numberDiff line numberDiff line change
@@ -738,7 +738,7 @@
738738
<spirit:parameters>
739739
<spirit:parameter>
740740
<spirit:name>GENtimestamp</spirit:name>
741-
<spirit:value>Wed Nov 29 01:45:32 UTC 2017</spirit:value>
741+
<spirit:value>Wed Nov 29 20:56:59 UTC 2017</spirit:value>
742742
</spirit:parameter>
743743
<spirit:parameter>
744744
<spirit:name>boundaryCRC</spirit:name>
@@ -750,7 +750,7 @@
750750
</spirit:parameter>
751751
<spirit:parameter>
752752
<spirit:name>customizationCRC</spirit:name>
753-
<spirit:value>29e2bfe7</spirit:value>
753+
<spirit:value>feb3db86</spirit:value>
754754
</spirit:parameter>
755755
<spirit:parameter>
756756
<spirit:name>customizationCRCversion</spirit:name>
@@ -769,7 +769,7 @@
769769
<spirit:parameters>
770770
<spirit:parameter>
771771
<spirit:name>GENtimestamp</spirit:name>
772-
<spirit:value>Wed Nov 29 01:45:32 UTC 2017</spirit:value>
772+
<spirit:value>Wed Nov 29 20:57:00 UTC 2017</spirit:value>
773773
</spirit:parameter>
774774
<spirit:parameter>
775775
<spirit:name>boundaryCRC</spirit:name>
@@ -781,7 +781,7 @@
781781
</spirit:parameter>
782782
<spirit:parameter>
783783
<spirit:name>customizationCRC</spirit:name>
784-
<spirit:value>29e2bfe7</spirit:value>
784+
<spirit:value>feb3db86</spirit:value>
785785
</spirit:parameter>
786786
<spirit:parameter>
787787
<spirit:name>customizationCRCversion</spirit:name>

‎mipscore_tb.v

+1-1
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ module mipscore_tb();
2323
begin
2424
bounce();
2525
//if(pc_current > 32'h0000_077C && pc_current < 32'h0000_0A58)
26-
//if ((pc_current == 32'h0000_01e8) || (pc_current == 32'h0000_01EC))
26+
//if (MIPS.DP.encryption.HOLD == 1)
2727
//begin
2828
// $display("TEST");
2929
// $stop;

‎parts.v

+3-3
Original file line numberDiff line numberDiff line change
@@ -89,16 +89,16 @@ module imem #(parameter wide = 8)
8989
(input [31:0] a, output [wide-1:0] y);
9090
//reg [wide-1:0] rom [0:63];
9191
reg [wide-1:0] rom [0:1500];
92-
initial $readmemh ("system.mem", rom);
92+
initial $readmemh ("testprogram.dat", rom);
9393
//initial $readmemh ("memfile.dat", rom);
9494
assign y = rom[(a/4)];
9595
endmodule
9696

9797
module dmem #(parameter wide = 8)
9898
(input clk, we, [31:0] a, [wide-1:0] d, output [wide-1:0] q);
99-
reg [wide-1:0] ram [0:40000];
99+
reg [wide-1:0] ram [0:50];
100100
//reg [wide-1:0] ram [0:91000];
101-
always @ (posedge clk) if (we) ram[a/4] <= d;
101+
always @ (posedge clk) if (we & (a != 32'h0000_7000)) ram[a/4] <= d;
102102
assign q = ram[a/4];
103103
endmodule
104104

‎uart/uart_top.v

+2-2
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ endmodule
6464

6565
module aFifo
6666
#(parameter DATA_WIDTH = 32,
67-
ADDRESS_WIDTH = 6,
67+
ADDRESS_WIDTH = 5,
6868
FIFO_DEPTH = (1 << ADDRESS_WIDTH))
6969
//Reading port
7070
(//output reg [DATA_WIDTH-1:0] Data_out,
@@ -169,7 +169,7 @@ endmodule
169169

170170

171171
module GrayCounter
172-
#(parameter COUNTER_WIDTH = 6)
172+
#(parameter COUNTER_WIDTH = 5)
173173

174174
(output reg [COUNTER_WIDTH-1:0] GrayCount_out, //'Gray' code count output.
175175

0 commit comments

Comments
 (0)