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Commit f97eafb

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michaeljclarkpalmer-dabbelt
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Change CALL macro to use ra as the temporary address register
e.g. 1: auipc ra, %pcrel_hi(symbol) jalr ra, %pcrel_lo(1b)(ra) The use of ra instead of t1 for address construction provides an opportunity for a microarchitecture to elide the write of the destination address, and instead read the target address as an immediate spread across the fused auipc+jalr pair. The link register ra in the jalr overwrites the target address temporary.
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opcodes/riscv-opc.c

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@@ -147,7 +147,7 @@ const struct riscv_opcode riscv_opcodes[] =
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{"jal", "32C", "Ca", MATCH_C_JAL, MASK_C_JAL, match_opcode, INSN_ALIAS },
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{"jal", "I", "a", MATCH_JAL | (X_RA << OP_SH_RD), MASK_JAL | MASK_RD, match_opcode, INSN_ALIAS },
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{"call", "I", "d,c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO },
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{"call", "I", "c", (X_T1 << OP_SH_RS1) | (X_RA << OP_SH_RD), (int) M_CALL, match_never, INSN_MACRO },
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{"call", "I", "c", (X_RA << OP_SH_RS1) | (X_RA << OP_SH_RD), (int) M_CALL, match_never, INSN_MACRO },
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{"tail", "I", "c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO },
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{"jump", "I", "c,s", 0, (int) M_CALL, match_never, INSN_MACRO },
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{"nop", "C", "", MATCH_C_ADDI, 0xffff, match_opcode, INSN_ALIAS },

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