diff --git a/k210.svd b/k210.svd index 8b630ce..460876e 100644 --- a/k210.svd +++ b/k210.svd @@ -321,38 +321,13 @@ Input Value Register 0x000 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -360,38 +335,13 @@ Pin Input Enable Register 0x004 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -399,38 +349,13 @@ Pin Output Enable Register 0x008 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -438,38 +363,13 @@ Output Value Register 0x00C - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -477,38 +377,13 @@ Internal Pull-Up Enable Register 0x010 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -516,38 +391,13 @@ Drive Strength Register 0x014 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -555,38 +405,13 @@ Rise Interrupt Enable Register 0x018 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -594,38 +419,13 @@ Rise Interrupt Pending Register 0x01C - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -633,38 +433,13 @@ Fall Interrupt Enable Register 0x020 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -672,38 +447,13 @@ Fall Interrupt Pending Register 0x024 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -711,38 +461,13 @@ High Interrupt Enable Register 0x028 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -750,38 +475,13 @@ High Interrupt Pending Register 0x02C - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -789,38 +489,13 @@ Low Interrupt Enable Register 0x030 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -828,38 +503,13 @@ Low Interrupt Pending Register 0x034 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -867,38 +517,13 @@ HW I/O Function Enable Register 0x038 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -906,38 +531,13 @@ HW I/O Function Select Register 0x03C - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -945,38 +545,13 @@ Output XOR (invert) Register 0x040 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 - pin888 - pin999 - pin101010 - pin111111 - pin121212 - pin131313 - pin141414 - pin151515 - pin161616 - pin171717 - pin181818 - pin191919 - pin202020 - pin212121 - pin222222 - pin232323 - pin242424 - pin252525 - pin262626 - pin272727 - pin282828 - pin292929 - pin303030 - pin313131 + + pin%s + 0 + 0 + 32 + 1 + @@ -1509,189 +1084,54 @@ 64 - ch1_en - Enable channel 1 + ch%s_en + Enable channel %s [0:0] - - - ch2_en - Enable channel 2 - [1:1] - - - ch3_en - Enable channel 3 - [2:2] - - - ch4_en - Enable channel 4 - [3:3] - - - ch5_en - Enable channel 5 - [4:4] - - - ch6_en - Enable channel 6 - [5:5] + 6 + 1 + 1-6 - ch1_en_we - Write enable channel 1 + ch%s_en_we + Write enable channel %s [8:8] - - - ch2_en_we - Write enable channel 2 - [9:9] - - - ch3_en_we - Write enable channel 3 - [10:10] - - - ch4_en_we - Write enable channel 4 - [11:11] - - - ch5_en_we - Write enable channel 5 - [12:12] - - - ch6_en_we - Write enable channel 6 - [13:13] + 6 + 1 + 1-6 - ch1_susp - Suspend request channel 1 + ch%s_susp + Suspend request channel %s [16:16] - - - ch2_susp - Suspend request channel 2 - [17:17] - - - ch3_susp - Suspend request channel 3 - [18:18] - - - ch4_susp - Suspend request channel 4 - [19:19] - - - ch5_susp - Suspend request channel 5 - [20:20] - - - ch6_susp - Suspend request channel 6 - [21:21] + 6 + 1 + 1-6 - ch1_susp_we - Enable write to ch1_susp bit + ch%s_susp_we + Enable write to ch%s_susp bit [24:24] - - - ch2_susp_we - Enable write to ch2_susp bit - [25:25] - - - ch3_susp_we - Enable write to ch3_susp bit - [26:26] - - - ch4_susp_we - Enable write to ch4_susp bit - [27:27] - - - ch5_susp_we - Enable write to ch5_susp bit - [28:28] - - - ch6_susp_we - Enable write to ch6_susp bit - [29:29] + 6 + 1 + 1-6 - ch1_abort - Abort request channel 1 + ch%s_abort + Abort request channel %s [32:32] - - ch2_abort - Abort request channel 2 - [33:33] - - - ch3_abort - Abort request channel 3 - [34:34] - - - ch4_abort - Abort request channel 4 - [35:35] - - - ch5_abort - Abort request channel 5 - [36:36] - - - ch6_abort - Abort request channel 6 - [37:37] - - ch1_abort_we - Enable write to ch1_abort bit + ch%s_abort_we + Enable write to ch%s_abort bit [40:40] - - - ch2_abort_we - Enable write to ch2_abort bit - [41:41] - - - ch3_abort_we - Enable write to ch3_abort bit - [42:42] - - - ch4_abort_we - Enable write to ch4_abort bit - [43:43] - - - ch5_abort_we - Enable write to ch5_abort bit - [44:44] - - - ch6_abort_we - Enable write to ch6_abort bit - [45:45] + 6 + 1 + 1-6 @@ -1704,34 +1144,12 @@ 64 - ch1_intstat - Channel 1 interrupt bit + ch%s_intstat + Channel %s interrupt bit [0:0] - - - ch2_intstat - Channel 2 interrupt bit - [1:1] - - - ch3_intstat - Channel 3 interrupt bit - [2:2] - - - ch4_intstat - Channel 4 interrupt bit - [3:3] - - - ch5_intstat - Channel 5 interrupt bit - [4:4] - - - ch6_intstat - Channel 6 interrupt bit - [5:5] + 6 + 1 + 1-6 @@ -2799,14 +2217,13 @@ Data (output) registers 0x00 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 + + pin%s + 0 + 0 + 8 + 1 + @@ -2815,9 +2232,11 @@ 0x04 - pin0 + pin%s 0 0 + 8 + 1 DIRECTION @@ -2832,13 +2251,6 @@ - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 @@ -2891,14 +2303,13 @@ External port (data input) registers 0x50 - pin000 - pin111 - pin222 - pin333 - pin444 - pin555 - pin666 - pin777 + + pin%s + 0 + 0 + 8 + 1 + @@ -4617,29 +4028,13 @@ 0x04 - rd_idx0 - rd_idx0 + rd_idx%s + rd_idx%s [5:0] + 4 + 8 - - rd_idx1 - rd_idx1 - [13:8] - - - - rd_idx2 - rd_idx2 - [21:16] - - - - rd_idx3 - rd_idx3 - [29:24] - - diff --git a/src/lib.rs b/src/lib.rs index 1e8bae9..d6ca91c 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -1,7 +1,25 @@ -#![doc = "Peripheral access API for K210 microcontrollers (generated using svd2rust v0.16.1)\n\nYou can find an overview of the API [here].\n\n[here]: https://docs.rs/svd2rust/0.16.1/svd2rust/#peripheral-api"] +#![doc = "Peripheral access API for K210 microcontrollers (generated using svd2rust v0.17.0)\n\nYou can find an overview of the API [here].\n\n[here]: https://docs.rs/svd2rust/0.17.0/svd2rust/#peripheral-api"] +#![deny(const_err)] +#![deny(dead_code)] +#![deny(improper_ctypes)] +#![deny(legacy_directory_ownership)] #![deny(missing_docs)] -#![deny(warnings)] +#![deny(no_mangle_generic_items)] +#![deny(non_shorthand_field_patterns)] +#![deny(overflowing_literals)] +#![deny(path_statements)] +#![deny(patterns_in_fns_without_body)] +#![deny(plugin_as_library)] +#![deny(private_in_public)] +#![deny(safe_extern_statics)] +#![deny(unconditional_recursion)] +#![deny(unions_with_drop_fields)] +#![deny(unused_allocation)] +#![deny(unused_comparisons)] +#![deny(unused_parens)] +#![deny(while_true)] #![allow(non_camel_case_types)] +#![allow(non_snake_case)] #![no_std] extern crate bare_metal; extern crate riscv; @@ -14,208 +32,143 @@ use core::ops::Deref; pub mod interrupt { #[doc = r"Enumeration of all the interrupts"] #[derive(Copy, Clone, Debug)] + #[repr(u8)] pub enum Interrupt { #[doc = "1 - SPI0"] - SPI0, + SPI0 = 1, #[doc = "2 - SPI1"] - SPI1, + SPI1 = 2, #[doc = "3 - SPI_SLAVE"] - SPI_SLAVE, + SPI_SLAVE = 3, #[doc = "4 - SPI3"] - SPI3, + SPI3 = 4, #[doc = "5 - I2S0"] - I2S0, + I2S0 = 5, #[doc = "6 - I2S1"] - I2S1, + I2S1 = 6, #[doc = "7 - I2S2"] - I2S2, + I2S2 = 7, #[doc = "8 - I2C0"] - I2C0, + I2C0 = 8, #[doc = "9 - I2C1"] - I2C1, + I2C1 = 9, #[doc = "10 - I2C2"] - I2C2, + I2C2 = 10, #[doc = "11 - UART1"] - UART1, + UART1 = 11, #[doc = "12 - UART2"] - UART2, + UART2 = 12, #[doc = "13 - UART3"] - UART3, + UART3 = 13, #[doc = "14 - TIMER0 channel 0 or 1 interrupt"] - TIMER0A, + TIMER0A = 14, #[doc = "15 - TIMER0 channel 2 or 3 interrupt"] - TIMER0B, + TIMER0B = 15, #[doc = "16 - TIMER1 channel 0 or 1 interrupt"] - TIMER1A, + TIMER1A = 16, #[doc = "17 - TIMER1 channel 2 or 3 interrupt"] - TIMER1B, + TIMER1B = 17, #[doc = "18 - TIMER2 channel 0 or 1 interrupt"] - TIMER2A, + TIMER2A = 18, #[doc = "19 - TIMER2 channel 2 or 3 interrupt"] - TIMER2B, + TIMER2B = 19, #[doc = "20 - RTC"] - RTC, + RTC = 20, #[doc = "21 - WDT0"] - WDT0, + WDT0 = 21, #[doc = "22 - WDT1"] - WDT1, + WDT1 = 22, #[doc = "23 - APB_GPIO"] - APB_GPIO, + APB_GPIO = 23, #[doc = "24 - DVP"] - DVP, + DVP = 24, #[doc = "25 - KPU"] - KPU, + KPU = 25, #[doc = "26 - FFT"] - FFT, + FFT = 26, #[doc = "27 - DMA0"] - DMA0, + DMA0 = 27, #[doc = "28 - DMA1"] - DMA1, + DMA1 = 28, #[doc = "29 - DMA2"] - DMA2, + DMA2 = 29, #[doc = "30 - DMA3"] - DMA3, + DMA3 = 30, #[doc = "31 - DMA4"] - DMA4, + DMA4 = 31, #[doc = "32 - DMA5"] - DMA5, + DMA5 = 32, #[doc = "33 - UARTHS"] - UARTHS, + UARTHS = 33, #[doc = "34 - GPIOHS0"] - GPIOHS0, + GPIOHS0 = 34, #[doc = "35 - GPIOHS1"] - GPIOHS1, + GPIOHS1 = 35, #[doc = "36 - GPIOHS2"] - GPIOHS2, + GPIOHS2 = 36, #[doc = "37 - GPIOHS3"] - GPIOHS3, + GPIOHS3 = 37, #[doc = "38 - GPIOHS4"] - GPIOHS4, + GPIOHS4 = 38, #[doc = "39 - GPIOHS5"] - GPIOHS5, + GPIOHS5 = 39, #[doc = "40 - GPIOHS6"] - GPIOHS6, + GPIOHS6 = 40, #[doc = "41 - GPIOHS7"] - GPIOHS7, + GPIOHS7 = 41, #[doc = "42 - GPIOHS8"] - GPIOHS8, + GPIOHS8 = 42, #[doc = "43 - GPIOHS9"] - GPIOHS9, + GPIOHS9 = 43, #[doc = "44 - GPIOHS10"] - GPIOHS10, + GPIOHS10 = 44, #[doc = "45 - GPIOHS11"] - GPIOHS11, + GPIOHS11 = 45, #[doc = "46 - GPIOHS12"] - GPIOHS12, + GPIOHS12 = 46, #[doc = "47 - GPIOHS13"] - GPIOHS13, + GPIOHS13 = 47, #[doc = "48 - GPIOHS14"] - GPIOHS14, + GPIOHS14 = 48, #[doc = "49 - GPIOHS15"] - GPIOHS15, + GPIOHS15 = 49, #[doc = "50 - GPIOHS16"] - GPIOHS16, + GPIOHS16 = 50, #[doc = "51 - GPIOHS17"] - GPIOHS17, + GPIOHS17 = 51, #[doc = "52 - GPIOHS18"] - GPIOHS18, + GPIOHS18 = 52, #[doc = "53 - GPIOHS19"] - GPIOHS19, + GPIOHS19 = 53, #[doc = "54 - GPIOHS20"] - GPIOHS20, + GPIOHS20 = 54, #[doc = "55 - GPIOHS21"] - GPIOHS21, + GPIOHS21 = 55, #[doc = "56 - GPIOHS22"] - GPIOHS22, + GPIOHS22 = 56, #[doc = "57 - GPIOHS23"] - GPIOHS23, + GPIOHS23 = 57, #[doc = "58 - GPIOHS24"] - GPIOHS24, + GPIOHS24 = 58, #[doc = "59 - GPIOHS25"] - GPIOHS25, + GPIOHS25 = 59, #[doc = "60 - GPIOHS26"] - GPIOHS26, + GPIOHS26 = 60, #[doc = "61 - GPIOHS27"] - GPIOHS27, + GPIOHS27 = 61, #[doc = "62 - GPIOHS28"] - GPIOHS28, + GPIOHS28 = 62, #[doc = "63 - GPIOHS29"] - GPIOHS29, + GPIOHS29 = 63, #[doc = "64 - GPIOHS30"] - GPIOHS30, + GPIOHS30 = 64, #[doc = "65 - GPIOHS31"] - GPIOHS31, + GPIOHS31 = 65, } unsafe impl bare_metal::Nr for Interrupt { - #[inline] + #[inline(always)] fn nr(&self) -> u8 { - match *self { - Interrupt::SPI0 => 1, - Interrupt::SPI1 => 2, - Interrupt::SPI_SLAVE => 3, - Interrupt::SPI3 => 4, - Interrupt::I2S0 => 5, - Interrupt::I2S1 => 6, - Interrupt::I2S2 => 7, - Interrupt::I2C0 => 8, - Interrupt::I2C1 => 9, - Interrupt::I2C2 => 10, - Interrupt::UART1 => 11, - Interrupt::UART2 => 12, - Interrupt::UART3 => 13, - Interrupt::TIMER0A => 14, - Interrupt::TIMER0B => 15, - Interrupt::TIMER1A => 16, - Interrupt::TIMER1B => 17, - Interrupt::TIMER2A => 18, - Interrupt::TIMER2B => 19, - Interrupt::RTC => 20, - Interrupt::WDT0 => 21, - Interrupt::WDT1 => 22, - Interrupt::APB_GPIO => 23, - Interrupt::DVP => 24, - Interrupt::KPU => 25, - Interrupt::FFT => 26, - Interrupt::DMA0 => 27, - Interrupt::DMA1 => 28, - Interrupt::DMA2 => 29, - Interrupt::DMA3 => 30, - Interrupt::DMA4 => 31, - Interrupt::DMA5 => 32, - Interrupt::UARTHS => 33, - Interrupt::GPIOHS0 => 34, - Interrupt::GPIOHS1 => 35, - Interrupt::GPIOHS2 => 36, - Interrupt::GPIOHS3 => 37, - Interrupt::GPIOHS4 => 38, - Interrupt::GPIOHS5 => 39, - Interrupt::GPIOHS6 => 40, - Interrupt::GPIOHS7 => 41, - Interrupt::GPIOHS8 => 42, - Interrupt::GPIOHS9 => 43, - Interrupt::GPIOHS10 => 44, - Interrupt::GPIOHS11 => 45, - Interrupt::GPIOHS12 => 46, - Interrupt::GPIOHS13 => 47, - Interrupt::GPIOHS14 => 48, - Interrupt::GPIOHS15 => 49, - Interrupt::GPIOHS16 => 50, - Interrupt::GPIOHS17 => 51, - Interrupt::GPIOHS18 => 52, - Interrupt::GPIOHS19 => 53, - Interrupt::GPIOHS20 => 54, - Interrupt::GPIOHS21 => 55, - Interrupt::GPIOHS22 => 56, - Interrupt::GPIOHS23 => 57, - Interrupt::GPIOHS24 => 58, - Interrupt::GPIOHS25 => 59, - Interrupt::GPIOHS26 => 60, - Interrupt::GPIOHS27 => 61, - Interrupt::GPIOHS28 => 62, - Interrupt::GPIOHS29 => 63, - Interrupt::GPIOHS30 => 64, - Interrupt::GPIOHS31 => 65, - } + *self as u8 } } #[derive(Debug, Copy, Clone)] @@ -330,7 +283,12 @@ pub mod interrupt { #[doc = r" }"] #[doc = r" }"] #[doc = r" ```"] - macro_rules ! interrupt { ( $ NAME : ident , $ path : path , locals : { $ ( $ lvar : ident : $ lty : ty = $ lval : expr ; ) * } ) => { # [ allow ( non_snake_case ) ] mod $ NAME { pub struct Locals { $ ( pub $ lvar : $ lty , ) * } } # [ allow ( non_snake_case ) ] # [ no_mangle ] pub extern "C" fn $ NAME ( ) { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; static mut LOCALS : self :: $ NAME :: Locals = self :: $ NAME :: Locals { $ ( $ lvar : $ lval , ) * } ; let f : fn ( & mut self :: $ NAME :: Locals ) = $ path ; f ( unsafe { & mut LOCALS } ) ; } } ; ( $ NAME : ident , $ path : path ) => { # [ allow ( non_snake_case ) ] # [ no_mangle ] pub extern "C" fn $ NAME ( ) { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; let f : fn ( ) = $ path ; f ( ) ; } } } + macro_rules ! interrupt { ( $ NAME : ident , $ path : path , locals : { $ ( $ lvar : ident : $ lty : ty = $ lval : expr ; ) * } ) => { # [ allow ( non_snake_case ) ] +mod $ NAME { pub struct Locals { $ ( pub $ lvar : $ lty , ) * } } # [ allow ( non_snake_case ) ] +# [ no_mangle ] +pub extern "C" fn $ NAME ( ) { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; static mut LOCALS : self :: $ NAME :: Locals = self :: $ NAME :: Locals { $ ( $ lvar : $ lval , ) * } ; let f : fn ( & mut self :: $ NAME :: Locals ) = $ path ; f ( unsafe { & mut LOCALS } ) ; } } ; ( $ NAME : ident , $ path : path ) => { # [ allow ( non_snake_case ) ] +# [ no_mangle ] +pub extern "C" fn $ NAME ( ) { let _ = $ crate :: interrupt :: Interrupt :: $ NAME ; let f : fn ( ) = $ path ; f ( ) ; } } } } pub use self::interrupt::Interrupt; #[allow(unused_imports)] @@ -338,25 +296,25 @@ use generic::*; #[doc = r"Common register and bit access and modify traits"] pub mod generic { use core::marker; - ///This trait shows that register has `read` method - /// - ///Registers marked with `Writable` can be also `modify`'ed + #[doc = "This trait shows that register has `read` method"] + #[doc = ""] + #[doc = "Registers marked with `Writable` can be also `modify`'ed"] pub trait Readable {} - ///This trait shows that register has `write`, `write_with_zero` and `reset` method - /// - ///Registers marked with `Readable` can be also `modify`'ed + #[doc = "This trait shows that register has `write`, `write_with_zero` and `reset` method"] + #[doc = ""] + #[doc = "Registers marked with `Readable` can be also `modify`'ed"] pub trait Writable {} - ///Reset value of the register - /// - ///This value is initial value for `write` method. - ///It can be also directly writed to register by `reset` method. + #[doc = "Reset value of the register"] + #[doc = ""] + #[doc = "This value is initial value for `write` method."] + #[doc = "It can be also directly writed to register by `reset` method."] pub trait ResetValue { - ///Register size + #[doc = "Register size"] type Type; - ///Reset value of the register + #[doc = "Reset value of the register"] fn reset_value() -> Self::Type; } - ///This structure provides volatile access to register + #[doc = "This structure provides volatile access to register"] pub struct Reg { register: vcell::VolatileCell, _marker: marker::PhantomData, @@ -367,18 +325,18 @@ pub mod generic { Self: Readable, U: Copy, { - ///Reads the contents of `Readable` register - /// - ///You can read the contents of a register in such way: - ///```ignore - ///let bits = periph.reg.read().bits(); - ///``` - ///or get the content of a particular field of a register. - ///```ignore - ///let reader = periph.reg.read(); - ///let bits = reader.field1().bits(); - ///let flag = reader.field2().bit_is_set(); - ///``` + #[doc = "Reads the contents of `Readable` register"] + #[doc = ""] + #[doc = "You can read the contents of a register in such way:"] + #[doc = "```ignore"] + #[doc = "let bits = periph.reg.read().bits();"] + #[doc = "```"] + #[doc = "or get the content of a particular field of a register."] + #[doc = "```ignore"] + #[doc = "let reader = periph.reg.read();"] + #[doc = "let bits = reader.field1().bits();"] + #[doc = "let flag = reader.field2().bit_is_set();"] + #[doc = "```"] #[inline(always)] pub fn read(&self) -> R { R { @@ -392,9 +350,9 @@ pub mod generic { Self: ResetValue + Writable, U: Copy, { - ///Writes the reset value to `Writable` register - /// - ///Resets the register to its initial state + #[doc = "Writes the reset value to `Writable` register"] + #[doc = ""] + #[doc = "Resets the register to its initial state"] #[inline(always)] pub fn reset(&self) { self.register.set(Self::reset_value()) @@ -405,21 +363,21 @@ pub mod generic { Self: ResetValue + Writable, U: Copy, { - ///Writes bits to `Writable` register - /// - ///You can write raw bits into a register: - ///```ignore - ///periph.reg.write(|w| unsafe { w.bits(rawbits) }); - ///``` - ///or write only the fields you need: - ///```ignore - ///periph.reg.write(|w| w - /// .field1().bits(newfield1bits) - /// .field2().set_bit() - /// .field3().variant(VARIANT) - ///); - ///``` - ///Other fields will have reset value. + #[doc = "Writes bits to `Writable` register"] + #[doc = ""] + #[doc = "You can write raw bits into a register:"] + #[doc = "```ignore"] + #[doc = "periph.reg.write(|w| unsafe { w.bits(rawbits) });"] + #[doc = "```"] + #[doc = "or write only the fields you need:"] + #[doc = "```ignore"] + #[doc = "periph.reg.write(|w| w"] + #[doc = " .field1().bits(newfield1bits)"] + #[doc = " .field2().set_bit()"] + #[doc = " .field3().variant(VARIANT)"] + #[doc = ");"] + #[doc = "```"] + #[doc = "Other fields will have reset value."] #[inline(always)] pub fn write(&self, f: F) where @@ -439,9 +397,9 @@ pub mod generic { Self: Writable, U: Copy + Default, { - ///Writes Zero to `Writable` register - /// - ///Similar to `write`, but unused bits will contain 0. + #[doc = "Writes Zero to `Writable` register"] + #[doc = ""] + #[doc = "Similar to `write`, but unused bits will contain 0."] #[inline(always)] pub fn write_with_zero(&self, f: F) where @@ -461,23 +419,23 @@ pub mod generic { Self: Readable + Writable, U: Copy, { - ///Modifies the contents of the register - /// - ///E.g. to do a read-modify-write sequence to change parts of a register: - ///```ignore - ///periph.reg.modify(|r, w| unsafe { w.bits( - /// r.bits() | 3 - ///) }); - ///``` - ///or - ///```ignore - ///periph.reg.modify(|_, w| w - /// .field1().bits(newfield1bits) - /// .field2().set_bit() - /// .field3().variant(VARIANT) - ///); - ///``` - ///Other fields will have value they had before call `modify`. + #[doc = "Modifies the contents of the register"] + #[doc = ""] + #[doc = "E.g. to do a read-modify-write sequence to change parts of a register:"] + #[doc = "```ignore"] + #[doc = "periph.reg.modify(|r, w| unsafe { w.bits("] + #[doc = " r.bits() | 3"] + #[doc = ") });"] + #[doc = "```"] + #[doc = "or"] + #[doc = "```ignore"] + #[doc = "periph.reg.modify(|_, w| w"] + #[doc = " .field1().bits(newfield1bits)"] + #[doc = " .field2().set_bit()"] + #[doc = " .field3().variant(VARIANT)"] + #[doc = ");"] + #[doc = "```"] + #[doc = "Other fields will have value they had before call `modify`."] #[inline(always)] pub fn modify(&self, f: F) where @@ -499,10 +457,10 @@ pub mod generic { ); } } - ///Register/field reader - /// - ///Result of the [`read`](Reg::read) method of a register. - ///Also it can be used in the [`modify`](Reg::read) method + #[doc = "Register/field reader"] + #[doc = ""] + #[doc = "Result of the [`read`](Reg::read) method of a register."] + #[doc = "Also it can be used in the [`modify`](Reg::read) method"] pub struct R { pub(crate) bits: U, _reg: marker::PhantomData, @@ -511,7 +469,7 @@ pub mod generic { where U: Copy, { - ///Create new instance of reader + #[doc = "Create new instance of reader"] #[inline(always)] pub(crate) fn new(bits: U) -> Self { Self { @@ -519,7 +477,7 @@ pub mod generic { _reg: marker::PhantomData, } } - ///Read raw bits from register/field + #[doc = "Read raw bits from register/field"] #[inline(always)] pub fn bits(&self) -> U { self.bits @@ -536,44 +494,44 @@ pub mod generic { } } impl R { - ///Value of the field as raw bits + #[doc = "Value of the field as raw bits"] #[inline(always)] pub fn bit(&self) -> bool { self.bits } - ///Returns `true` if the bit is clear (0) + #[doc = "Returns `true` if the bit is clear (0)"] #[inline(always)] pub fn bit_is_clear(&self) -> bool { !self.bit() } - ///Returns `true` if the bit is set (1) + #[doc = "Returns `true` if the bit is set (1)"] #[inline(always)] pub fn bit_is_set(&self) -> bool { self.bit() } } - ///Register writer - /// - ///Used as an argument to the closures in the [`write`](Reg::write) and [`modify`](Reg::modify) methods of the register + #[doc = "Register writer"] + #[doc = ""] + #[doc = "Used as an argument to the closures in the [`write`](Reg::write) and [`modify`](Reg::modify) methods of the register"] pub struct W { - ///Writable bits + #[doc = "Writable bits"] pub(crate) bits: U, _reg: marker::PhantomData, } impl W { - ///Writes raw bits to the register + #[doc = "Writes raw bits to the register"] #[inline(always)] pub unsafe fn bits(&mut self, bits: U) -> &mut Self { self.bits = bits; self } } - ///Used if enumerated values cover not the whole range + #[doc = "Used if enumerated values cover not the whole range"] #[derive(Clone, Copy, PartialEq)] pub enum Variant { - ///Expected variant + #[doc = "Expected variant"] Val(T), - ///Raw bits + #[doc = "Raw bits"] Res(U), } } @@ -591,6 +549,7 @@ impl CLINT { } impl Deref for CLINT { type Target = clint::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*CLINT::ptr() } } @@ -609,7 +568,7 @@ pub mod clint { #[doc = "0xbff8 - Timer register"] pub mtime: MTIME, } - #[doc = "Hart software interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [msip](msip) module"] + #[doc = "Hart software interrupt register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msip](msip) module"] pub type MSIP = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -624,7 +583,8 @@ pub mod clint { pub type R = crate::R; #[doc = "Writer for register msip[%s]"] pub type W = crate::W; - #[doc = "Register msip[%s] `reset()`'s with value 0"] + #[doc = "Register msip[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::MSIP { type Type = u32; #[inline(always)] @@ -635,7 +595,7 @@ pub mod clint { impl R {} impl W {} } - #[doc = "Hart time comparator register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [mtimecmp](mtimecmp) module"] + #[doc = "Hart time comparator register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mtimecmp](mtimecmp) module"] pub type MTIMECMP = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -650,7 +610,8 @@ pub mod clint { pub type R = crate::R; #[doc = "Writer for register mtimecmp[%s]"] pub type W = crate::W; - #[doc = "Register mtimecmp[%s] `reset()`'s with value 0"] + #[doc = "Register mtimecmp[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::MTIMECMP { type Type = u64; #[inline(always)] @@ -661,7 +622,7 @@ pub mod clint { impl R {} impl W {} } - #[doc = "Timer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [mtime](mtime) module"] + #[doc = "Timer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mtime](mtime) module"] pub type MTIME = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -702,6 +663,7 @@ impl PLIC { } impl Deref for PLIC { type Target = plic::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*PLIC::ptr() } } @@ -731,7 +693,7 @@ pub mod plic { #[doc = r"Register block"] #[doc = "Target Interrupt Enables"] pub mod target_enables { - #[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [enable](enable) module"] + #[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](enable) module"] pub type ENABLE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -746,7 +708,8 @@ pub mod plic { pub type R = crate::R; #[doc = "Writer for register enable[%s]"] pub type W = crate::W; - #[doc = "Register enable[%s] `reset()`'s with value 0"] + #[doc = "Register enable[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::ENABLE { type Type = u32; #[inline(always)] @@ -772,7 +735,7 @@ pub mod plic { #[doc = r"Register block"] #[doc = "Target Configuration"] pub mod targets { - #[doc = "Priority Threshold Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [threshold](threshold) module"] + #[doc = "Priority Threshold Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [threshold](threshold) module"] pub type THRESHOLD = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -797,37 +760,29 @@ pub mod plic { } #[doc = "\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum PRIORITY_A { #[doc = "0: Never interrupt"] - NEVER, + NEVER = 0, #[doc = "1: Priority 1"] - P1, + P1 = 1, #[doc = "2: Priority 2"] - P2, + P2 = 2, #[doc = "3: Priority 3"] - P3, + P3 = 3, #[doc = "4: Priority 4"] - P4, + P4 = 4, #[doc = "5: Priority 5"] - P5, + P5 = 5, #[doc = "6: Priority 6"] - P6, + P6 = 6, #[doc = "7: Priority 7"] - P7, + P7 = 7, } impl From for u8 { #[inline(always)] fn from(variant: PRIORITY_A) -> Self { - match variant { - PRIORITY_A::NEVER => 0, - PRIORITY_A::P1 => 1, - PRIORITY_A::P2 => 2, - PRIORITY_A::P3 => 3, - PRIORITY_A::P4 => 4, - PRIORITY_A::P5 => 5, - PRIORITY_A::P6 => 6, - PRIORITY_A::P7 => 7, - } + variant as _ } } #[doc = "Reader of field `priority`"] @@ -963,7 +918,7 @@ pub mod plic { } } } - #[doc = "Claim/Complete Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [claim](claim) module"] + #[doc = "Claim/Complete Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [claim](claim) module"] pub type CLAIM = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -989,7 +944,7 @@ pub mod plic { impl R {} impl W {} } - #[doc = "Padding to make sure targets is an array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [_reserved](_reserved) module"] + #[doc = "Padding to make sure targets is an array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_reserved](_reserved) module"] pub type _RESERVED = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1016,7 +971,7 @@ pub mod plic { impl W {} } } - #[doc = "Interrupt Source Priority Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [priority](priority) module"] + #[doc = "Interrupt Source Priority Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [priority](priority) module"] pub type PRIORITY = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1031,7 +986,8 @@ pub mod plic { pub type R = crate::R; #[doc = "Writer for register priority[%s]"] pub type W = crate::W; - #[doc = "Register priority[%s] `reset()`'s with value 0"] + #[doc = "Register priority[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::PRIORITY { type Type = u32; #[inline(always)] @@ -1042,7 +998,7 @@ pub mod plic { impl R {} impl W {} } - #[doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pending](pending) module"] + #[doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pending](pending) module"] pub type PENDING = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1057,7 +1013,8 @@ pub mod plic { pub type R = crate::R; #[doc = "Writer for register pending[%s]"] pub type W = crate::W; - #[doc = "Register pending[%s] `reset()`'s with value 0"] + #[doc = "Register pending[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::PENDING { type Type = u32; #[inline(always)] @@ -1083,6 +1040,7 @@ impl UARTHS { } impl Deref for UARTHS { type Target = uarths::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*UARTHS::ptr() } } @@ -1107,7 +1065,7 @@ pub mod uarths { #[doc = "0x18 - Baud Rate Divisor Register"] pub div: DIV, } - #[doc = "Transmit Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txdata](txdata) module"] + #[doc = "Transmit Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdata](txdata) module"] pub type TXDATA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1193,7 +1151,7 @@ pub mod uarths { } } } - #[doc = "Receive Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxdata](rxdata) module"] + #[doc = "Receive Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdata](rxdata) module"] pub type RXDATA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1279,7 +1237,7 @@ pub mod uarths { } } } - #[doc = "Transmit Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txctrl](txctrl) module"] + #[doc = "Transmit Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txctrl](txctrl) module"] pub type TXCTRL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1399,7 +1357,7 @@ pub mod uarths { } } } - #[doc = "Receive Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxctrl](rxctrl) module"] + #[doc = "Receive Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxctrl](rxctrl) module"] pub type RXCTRL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1485,7 +1443,7 @@ pub mod uarths { } } } - #[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ie](ie) module"] + #[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ie](ie) module"] pub type IE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1581,7 +1539,7 @@ pub mod uarths { } } } - #[doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ip](ip) module"] + #[doc = "Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ip](ip) module"] pub type IP = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1677,7 +1635,7 @@ pub mod uarths { } } } - #[doc = "Baud Rate Divisor Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [div](div) module"] + #[doc = "Baud Rate Divisor Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [div](div) module"] pub type DIV = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1744,6 +1702,7 @@ impl GPIOHS { } impl Deref for GPIOHS { type Target = gpiohs::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*GPIOHS::ptr() } } @@ -1788,7 +1747,7 @@ pub mod gpiohs { #[doc = "0x40 - Output XOR (invert) Register"] pub output_xor: OUTPUT_XOR, } - #[doc = "Input Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [input_val](input_val) module"] + #[doc = "Input Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [input_val](input_val) module"] pub type INPUT_VAL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -1811,13 +1770,14 @@ pub mod gpiohs { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN0_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -1831,545 +1791,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } + #[doc = "Pin Input Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [input_en](input_en) module"] + pub type INPUT_EN = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INPUT_EN; + #[doc = "`read()` method returns [input_en::R](input_en::R) reader structure"] + impl crate::Readable for INPUT_EN {} + #[doc = "`write(|w| ..)` method takes [input_en::W](input_en::W) writer structure"] + impl crate::Writable for INPUT_EN {} + #[doc = "Pin Input Enable Register"] + pub mod input_en { + #[doc = "Reader of register input_en"] + pub type R = crate::R; + #[doc = "Writer for register input_en"] + pub type W = crate::W; + #[doc = "Register input_en `reset()`'s with value 0"] + impl crate::ResetValue for super::INPUT_EN { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN23_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -2383,821 +2241,893 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - impl R { + impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } } } - impl W { + } + #[doc = "Pin Output Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [output_en](output_en) module"] + pub type OUTPUT_EN = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _OUTPUT_EN; + #[doc = "`read()` method returns [output_en::R](output_en::R) reader structure"] + impl crate::Readable for OUTPUT_EN {} + #[doc = "`write(|w| ..)` method takes [output_en::W](output_en::W) writer structure"] + impl crate::Writable for OUTPUT_EN {} + #[doc = "Pin Output Enable Register"] + pub mod output_en { + #[doc = "Reader of register output_en"] + pub type R = crate::R; + #[doc = "Writer for register output_en"] + pub type W = crate::W; + #[doc = "Register output_en `reset()`'s with value 0"] + impl crate::ResetValue for super::OUTPUT_EN { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } + } + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { + w: &'a mut W, + offset: usize, + } + impl<'a> PIN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); + self.w + } + } + impl R { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - } - #[doc = "Pin Input Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [input_en](input_en) module"] - pub type INPUT_EN = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INPUT_EN; - #[doc = "`read()` method returns [input_en::R](input_en::R) reader structure"] - impl crate::Readable for INPUT_EN {} - #[doc = "`write(|w| ..)` method takes [input_en::W](input_en::W) writer structure"] - impl crate::Writable for INPUT_EN {} - #[doc = "Pin Input Enable Register"] - pub mod input_en { - #[doc = "Reader of register input_en"] - pub type R = crate::R; - #[doc = "Writer for register input_en"] - pub type W = crate::W; - #[doc = "Register input_en `reset()`'s with value 0"] - impl crate::ResetValue for super::INPUT_EN { - type Type = u32; + impl W { + #[doc = ""] #[inline(always)] - fn reset_value() -> Self::Type { - 0 + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 1"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 2"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 4"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 5"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 7"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 8"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 10"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 11"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 13"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 14"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 16"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 17"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 19"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 20"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 22"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 23"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 25"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 26"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 28"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 29"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 31"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } } - #[doc = r"Writes raw bits to the field"] + } + } + #[doc = "Output Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [output_val](output_val) module"] + pub type OUTPUT_VAL = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _OUTPUT_VAL; + #[doc = "`read()` method returns [output_val::R](output_val::R) reader structure"] + impl crate::Readable for OUTPUT_VAL {} + #[doc = "`write(|w| ..)` method takes [output_val::W](output_val::W) writer structure"] + impl crate::Writable for OUTPUT_VAL {} + #[doc = "Output Value Register"] + pub mod output_val { + #[doc = "Reader of register output_val"] + pub type R = crate::R; + #[doc = "Writer for register output_val"] + pub type W = crate::W; + #[doc = "Register output_val `reset()`'s with value 0"] + impl crate::ResetValue for super::OUTPUT_VAL { + type Type = u32; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN11_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -3211,473 +3141,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } + #[doc = "Internal Pull-Up Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pullup_en](pullup_en) module"] + pub type PULLUP_EN = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _PULLUP_EN; + #[doc = "`read()` method returns [pullup_en::R](pullup_en::R) reader structure"] + impl crate::Readable for PULLUP_EN {} + #[doc = "`write(|w| ..)` method takes [pullup_en::W](pullup_en::W) writer structure"] + impl crate::Writable for PULLUP_EN {} + #[doc = "Internal Pull-Up Enable Register"] + pub mod pullup_en { + #[doc = "Reader of register pullup_en"] + pub type R = crate::R; + #[doc = "Writer for register pullup_en"] + pub type W = crate::W; + #[doc = "Register pullup_en `reset()`'s with value 0"] + impl crate::ResetValue for super::PULLUP_EN { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN31_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -3691,365 +3591,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } impl R { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } } } } - #[doc = "Pin Output Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [output_en](output_en) module"] - pub type OUTPUT_EN = crate::Reg; + #[doc = "Drive Strength Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [drive](drive) module"] + pub type DRIVE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _OUTPUT_EN; - #[doc = "`read()` method returns [output_en::R](output_en::R) reader structure"] - impl crate::Readable for OUTPUT_EN {} - #[doc = "`write(|w| ..)` method takes [output_en::W](output_en::W) writer structure"] - impl crate::Writable for OUTPUT_EN {} - #[doc = "Pin Output Enable Register"] - pub mod output_en { - #[doc = "Reader of register output_en"] - pub type R = crate::R; - #[doc = "Writer for register output_en"] - pub type W = crate::W; - #[doc = "Register output_en `reset()`'s with value 0"] - impl crate::ResetValue for super::OUTPUT_EN { + pub struct _DRIVE; + #[doc = "`read()` method returns [drive::R](drive::R) reader structure"] + impl crate::Readable for DRIVE {} + #[doc = "`write(|w| ..)` method takes [drive::W](drive::W) writer structure"] + impl crate::Writable for DRIVE {} + #[doc = "Drive Strength Register"] + pub mod drive { + #[doc = "Reader of register drive"] + pub type R = crate::R; + #[doc = "Writer for register drive"] + pub type W = crate::W; + #[doc = "Register drive `reset()`'s with value 0"] + impl crate::ResetValue for super::DRIVE { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN0_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -4063,545 +4041,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } + #[doc = "Rise Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rise_ie](rise_ie) module"] + pub type RISE_IE = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _RISE_IE; + #[doc = "`read()` method returns [rise_ie::R](rise_ie::R) reader structure"] + impl crate::Readable for RISE_IE {} + #[doc = "`write(|w| ..)` method takes [rise_ie::W](rise_ie::W) writer structure"] + impl crate::Writable for RISE_IE {} + #[doc = "Rise Interrupt Enable Register"] + pub mod rise_ie { + #[doc = "Reader of register rise_ie"] + pub type R = crate::R; + #[doc = "Writer for register rise_ie"] + pub type W = crate::W; + #[doc = "Register rise_ie `reset()`'s with value 0"] + impl crate::ResetValue for super::RISE_IE { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN23_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -4615,185 +4491,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) + } + #[doc = "Bit 17"] + #[inline(always)] + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) + } + #[doc = "Bit 18"] + #[inline(always)] + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) + } + #[doc = "Bit 19"] + #[inline(always)] + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) + } + #[doc = "Bit 20"] + #[inline(always)] + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) + } + #[doc = "Bit 21"] + #[inline(always)] + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) + } + #[doc = "Bit 22"] + #[inline(always)] + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } + } + #[doc = "Bit 2"] + #[inline(always)] + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } + } + #[doc = "Bit 3"] + #[inline(always)] + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } + } + #[doc = "Bit 4"] + #[inline(always)] + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } + } + #[doc = "Bit 5"] + #[inline(always)] + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } + } + #[doc = "Bit 6"] + #[inline(always)] + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } + } + #[doc = "Bit 7"] + #[inline(always)] + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } + } + #[doc = "Bit 8"] + #[inline(always)] + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } + } + #[doc = "Bit 9"] + #[inline(always)] + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } + } + #[doc = "Bit 10"] + #[inline(always)] + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } + } + #[doc = "Bit 11"] + #[inline(always)] + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } + } + #[doc = "Bit 12"] + #[inline(always)] + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } + } + #[doc = "Bit 13"] + #[inline(always)] + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } + } + #[doc = "Bit 14"] + #[inline(always)] + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } + } + #[doc = "Bit 15"] + #[inline(always)] + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } + } + #[doc = "Bit 16"] + #[inline(always)] + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } + } + #[doc = "Bit 17"] + #[inline(always)] + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } + } + #[doc = "Bit 18"] + #[inline(always)] + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } + } + #[doc = "Bit 19"] + #[inline(always)] + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } + } + #[doc = "Bit 20"] + #[inline(always)] + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } + } + #[doc = "Bit 21"] + #[inline(always)] + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } + } + #[doc = "Bit 22"] + #[inline(always)] + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } + #[doc = "Rise Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rise_ip](rise_ip) module"] + pub type RISE_IP = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _RISE_IP; + #[doc = "`read()` method returns [rise_ip::R](rise_ip::R) reader structure"] + impl crate::Readable for RISE_IP {} + #[doc = "`write(|w| ..)` method takes [rise_ip::W](rise_ip::W) writer structure"] + impl crate::Writable for RISE_IP {} + #[doc = "Rise Interrupt Pending Register"] + pub mod rise_ip { + #[doc = "Reader of register rise_ip"] + pub type R = crate::R; + #[doc = "Writer for register rise_ip"] + pub type W = crate::W; + #[doc = "Register rise_ip `reset()`'s with value 0"] + impl crate::ResetValue for super::RISE_IP { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN31_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -4807,365 +4941,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } impl R { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } } } } - #[doc = "Output Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [output_val](output_val) module"] - pub type OUTPUT_VAL = crate::Reg; + #[doc = "Fall Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fall_ie](fall_ie) module"] + pub type FALL_IE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _OUTPUT_VAL; - #[doc = "`read()` method returns [output_val::R](output_val::R) reader structure"] - impl crate::Readable for OUTPUT_VAL {} - #[doc = "`write(|w| ..)` method takes [output_val::W](output_val::W) writer structure"] - impl crate::Writable for OUTPUT_VAL {} - #[doc = "Output Value Register"] - pub mod output_val { - #[doc = "Reader of register output_val"] - pub type R = crate::R; - #[doc = "Writer for register output_val"] - pub type W = crate::W; - #[doc = "Register output_val `reset()`'s with value 0"] - impl crate::ResetValue for super::OUTPUT_VAL { + pub struct _FALL_IE; + #[doc = "`read()` method returns [fall_ie::R](fall_ie::R) reader structure"] + impl crate::Readable for FALL_IE {} + #[doc = "`write(|w| ..)` method takes [fall_ie::W](fall_ie::W) writer structure"] + impl crate::Writable for FALL_IE {} + #[doc = "Fall Interrupt Enable Register"] + pub mod fall_ie { + #[doc = "Reader of register fall_ie"] + pub type R = crate::R; + #[doc = "Writer for register fall_ie"] + pub type W = crate::W; + #[doc = "Register fall_ie `reset()`'s with value 0"] + impl crate::ResetValue for super::FALL_IE { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN0_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -5179,545 +5391,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } + #[doc = "Fall Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fall_ip](fall_ip) module"] + pub type FALL_IP = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _FALL_IP; + #[doc = "`read()` method returns [fall_ip::R](fall_ip::R) reader structure"] + impl crate::Readable for FALL_IP {} + #[doc = "`write(|w| ..)` method takes [fall_ip::W](fall_ip::W) writer structure"] + impl crate::Writable for FALL_IP {} + #[doc = "Fall Interrupt Pending Register"] + pub mod fall_ip { + #[doc = "Reader of register fall_ip"] + pub type R = crate::R; + #[doc = "Writer for register fall_ip"] + pub type W = crate::W; + #[doc = "Register fall_ip `reset()`'s with value 0"] + impl crate::ResetValue for super::FALL_IP { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN23_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -5731,821 +5841,893 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - impl R { + impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } } } - impl W { + } + #[doc = "High Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [high_ie](high_ie) module"] + pub type HIGH_IE = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _HIGH_IE; + #[doc = "`read()` method returns [high_ie::R](high_ie::R) reader structure"] + impl crate::Readable for HIGH_IE {} + #[doc = "`write(|w| ..)` method takes [high_ie::W](high_ie::W) writer structure"] + impl crate::Writable for HIGH_IE {} + #[doc = "High Interrupt Enable Register"] + pub mod high_ie { + #[doc = "Reader of register high_ie"] + pub type R = crate::R; + #[doc = "Writer for register high_ie"] + pub type W = crate::W; + #[doc = "Register high_ie `reset()`'s with value 0"] + impl crate::ResetValue for super::HIGH_IE { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } + } + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { + w: &'a mut W, + offset: usize, + } + impl<'a> PIN_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); + self.w + } + } + impl R { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - } - #[doc = "Internal Pull-Up Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pullup_en](pullup_en) module"] - pub type PULLUP_EN = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _PULLUP_EN; - #[doc = "`read()` method returns [pullup_en::R](pullup_en::R) reader structure"] - impl crate::Readable for PULLUP_EN {} - #[doc = "`write(|w| ..)` method takes [pullup_en::W](pullup_en::W) writer structure"] - impl crate::Writable for PULLUP_EN {} - #[doc = "Internal Pull-Up Enable Register"] - pub mod pullup_en { - #[doc = "Reader of register pullup_en"] - pub type R = crate::R; - #[doc = "Writer for register pullup_en"] - pub type W = crate::W; - #[doc = "Register pullup_en `reset()`'s with value 0"] - impl crate::ResetValue for super::PULLUP_EN { - type Type = u32; + impl W { + #[doc = ""] #[inline(always)] - fn reset_value() -> Self::Type { - 0 + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 1"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 2"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 4"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 5"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 7"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 8"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 10"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 11"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 13"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 14"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 16"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 17"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 19"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 20"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 22"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 23"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 25"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 26"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 28"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 29"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 31"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } } - #[doc = r"Writes raw bits to the field"] + } + } + #[doc = "High Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [high_ip](high_ip) module"] + pub type HIGH_IP = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _HIGH_IP; + #[doc = "`read()` method returns [high_ip::R](high_ip::R) reader structure"] + impl crate::Readable for HIGH_IP {} + #[doc = "`write(|w| ..)` method takes [high_ip::W](high_ip::W) writer structure"] + impl crate::Writable for HIGH_IP {} + #[doc = "High Interrupt Pending Register"] + pub mod high_ip { + #[doc = "Reader of register high_ip"] + pub type R = crate::R; + #[doc = "Writer for register high_ip"] + pub type W = crate::W; + #[doc = "Register high_ip `reset()`'s with value 0"] + impl crate::ResetValue for super::HIGH_IP { + type Type = u32; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN11_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -6559,473 +6741,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } + #[doc = "Low Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [low_ie](low_ie) module"] + pub type LOW_IE = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _LOW_IE; + #[doc = "`read()` method returns [low_ie::R](low_ie::R) reader structure"] + impl crate::Readable for LOW_IE {} + #[doc = "`write(|w| ..)` method takes [low_ie::W](low_ie::W) writer structure"] + impl crate::Writable for LOW_IE {} + #[doc = "Low Interrupt Enable Register"] + pub mod low_ie { + #[doc = "Reader of register low_ie"] + pub type R = crate::R; + #[doc = "Writer for register low_ie"] + pub type W = crate::W; + #[doc = "Register low_ie `reset()`'s with value 0"] + impl crate::ResetValue for super::LOW_IE { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN31_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -7039,365 +7191,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } impl R { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } } } } - #[doc = "Drive Strength Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [drive](drive) module"] - pub type DRIVE = crate::Reg; + #[doc = "Low Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [low_ip](low_ip) module"] + pub type LOW_IP = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _DRIVE; - #[doc = "`read()` method returns [drive::R](drive::R) reader structure"] - impl crate::Readable for DRIVE {} - #[doc = "`write(|w| ..)` method takes [drive::W](drive::W) writer structure"] - impl crate::Writable for DRIVE {} - #[doc = "Drive Strength Register"] - pub mod drive { - #[doc = "Reader of register drive"] - pub type R = crate::R; - #[doc = "Writer for register drive"] - pub type W = crate::W; - #[doc = "Register drive `reset()`'s with value 0"] - impl crate::ResetValue for super::DRIVE { + pub struct _LOW_IP; + #[doc = "`read()` method returns [low_ip::R](low_ip::R) reader structure"] + impl crate::Readable for LOW_IP {} + #[doc = "`write(|w| ..)` method takes [low_ip::W](low_ip::W) writer structure"] + impl crate::Writable for LOW_IP {} + #[doc = "Low Interrupt Pending Register"] + pub mod low_ip { + #[doc = "Reader of register low_ip"] + pub type R = crate::R; + #[doc = "Writer for register low_ip"] + pub type W = crate::W; + #[doc = "Register low_ip `reset()`'s with value 0"] + impl crate::ResetValue for super::LOW_IP { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN0_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -7411,545 +7641,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } + #[doc = "HW I/O Function Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iof_en](iof_en) module"] + pub type IOF_EN = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _IOF_EN; + #[doc = "`read()` method returns [iof_en::R](iof_en::R) reader structure"] + impl crate::Readable for IOF_EN {} + #[doc = "`write(|w| ..)` method takes [iof_en::W](iof_en::W) writer structure"] + impl crate::Writable for IOF_EN {} + #[doc = "HW I/O Function Enable Register"] + pub mod iof_en { + #[doc = "Reader of register iof_en"] + pub type R = crate::R; + #[doc = "Writer for register iof_en"] + pub type W = crate::W; + #[doc = "Register iof_en `reset()`'s with value 0"] + impl crate::ResetValue for super::IOF_EN { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN23_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -7963,185 +8091,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) + } + #[doc = "Bit 17"] + #[inline(always)] + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) + } + #[doc = "Bit 18"] + #[inline(always)] + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) + } + #[doc = "Bit 19"] + #[inline(always)] + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) + } + #[doc = "Bit 20"] + #[inline(always)] + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) + } + #[doc = "Bit 21"] + #[inline(always)] + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) + } + #[doc = "Bit 22"] + #[inline(always)] + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } + } + #[doc = "Bit 2"] + #[inline(always)] + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } + } + #[doc = "Bit 3"] + #[inline(always)] + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } + } + #[doc = "Bit 4"] + #[inline(always)] + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } + } + #[doc = "Bit 5"] + #[inline(always)] + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } + } + #[doc = "Bit 6"] + #[inline(always)] + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } + } + #[doc = "Bit 7"] + #[inline(always)] + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } + } + #[doc = "Bit 8"] + #[inline(always)] + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } + } + #[doc = "Bit 9"] + #[inline(always)] + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } + } + #[doc = "Bit 10"] + #[inline(always)] + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } + } + #[doc = "Bit 11"] + #[inline(always)] + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } + } + #[doc = "Bit 12"] + #[inline(always)] + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } + } + #[doc = "Bit 13"] + #[inline(always)] + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } + } + #[doc = "Bit 14"] + #[inline(always)] + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } + } + #[doc = "Bit 15"] + #[inline(always)] + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } + } + #[doc = "Bit 16"] + #[inline(always)] + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } + } + #[doc = "Bit 17"] + #[inline(always)] + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } + } + #[doc = "Bit 18"] + #[inline(always)] + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } + } + #[doc = "Bit 19"] + #[inline(always)] + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } + } + #[doc = "Bit 20"] + #[inline(always)] + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } + } + #[doc = "Bit 21"] + #[inline(always)] + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } + } + #[doc = "Bit 22"] + #[inline(always)] + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } + #[doc = "HW I/O Function Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iof_sel](iof_sel) module"] + pub type IOF_SEL = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _IOF_SEL; + #[doc = "`read()` method returns [iof_sel::R](iof_sel::R) reader structure"] + impl crate::Readable for IOF_SEL {} + #[doc = "`write(|w| ..)` method takes [iof_sel::W](iof_sel::W) writer structure"] + impl crate::Writable for IOF_SEL {} + #[doc = "HW I/O Function Select Register"] + pub mod iof_sel { + #[doc = "Reader of register iof_sel"] + pub type R = crate::R; + #[doc = "Writer for register iof_sel"] + pub type W = crate::W; + #[doc = "Register iof_sel `reset()`'s with value 0"] + impl crate::ResetValue for super::IOF_SEL { + type Type = u32; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN31_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -8155,365 +8541,443 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } impl R { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } #[doc = "Bit 8"] #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } #[doc = "Bit 9"] #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } #[doc = "Bit 10"] #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } #[doc = "Bit 11"] #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } #[doc = "Bit 12"] #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } #[doc = "Bit 13"] #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } } #[doc = "Bit 14"] #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } } #[doc = "Bit 15"] #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } } #[doc = "Bit 16"] #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } } #[doc = "Bit 17"] #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } } #[doc = "Bit 18"] #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } } #[doc = "Bit 19"] #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } } #[doc = "Bit 20"] #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } } #[doc = "Bit 21"] #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } } #[doc = "Bit 22"] #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } } #[doc = "Bit 23"] #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } } #[doc = "Bit 24"] #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } } #[doc = "Bit 25"] #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } } #[doc = "Bit 26"] #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } } #[doc = "Bit 27"] #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } } #[doc = "Bit 28"] #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } } #[doc = "Bit 29"] #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } } #[doc = "Bit 30"] #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } } #[doc = "Bit 31"] #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } } } } - #[doc = "Rise Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rise_ie](rise_ie) module"] - pub type RISE_IE = crate::Reg; + #[doc = "Output XOR (invert) Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [output_xor](output_xor) module"] + pub type OUTPUT_XOR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _RISE_IE; - #[doc = "`read()` method returns [rise_ie::R](rise_ie::R) reader structure"] - impl crate::Readable for RISE_IE {} - #[doc = "`write(|w| ..)` method takes [rise_ie::W](rise_ie::W) writer structure"] - impl crate::Writable for RISE_IE {} - #[doc = "Rise Interrupt Enable Register"] - pub mod rise_ie { - #[doc = "Reader of register rise_ie"] - pub type R = crate::R; - #[doc = "Writer for register rise_ie"] - pub type W = crate::W; - #[doc = "Register rise_ie `reset()`'s with value 0"] - impl crate::ResetValue for super::RISE_IE { + pub struct _OUTPUT_XOR; + #[doc = "`read()` method returns [output_xor::R](output_xor::R) reader structure"] + impl crate::Readable for OUTPUT_XOR {} + #[doc = "`write(|w| ..)` method takes [output_xor::W](output_xor::W) writer structure"] + impl crate::Writable for OUTPUT_XOR {} + #[doc = "Output XOR (invert) Register"] + pub mod output_xor { + #[doc = "Reader of register output_xor"] + pub type R = crate::R; + #[doc = "Writer for register output_xor"] + pub type W = crate::W; + #[doc = "Register output_xor `reset()`'s with value 0"] + impl crate::ResetValue for super::OUTPUT_XOR { type Type = u32; #[inline(always)] fn reset_value() -> Self::Type { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-31)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN0_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -8527,401 +8991,512 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&self) -> PIN_R { + PIN_R::new(((self.bits >> 8) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&self) -> PIN_R { + PIN_R::new(((self.bits >> 9) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w + pub fn pin10(&self) -> PIN_R { + PIN_R::new(((self.bits >> 10) & 0x01) != 0) } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&self) -> PIN_R { + PIN_R::new(((self.bits >> 11) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&self) -> PIN_R { + PIN_R::new(((self.bits >> 12) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w + pub fn pin13(&self) -> PIN_R { + PIN_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin14(&self) -> PIN_R { + PIN_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 15"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin15(&self) -> PIN_R { + PIN_R::new(((self.bits >> 15) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 16"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn pin16(&self) -> PIN_R { + PIN_R::new(((self.bits >> 16) & 0x01) != 0) } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 17"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin17(&self) -> PIN_R { + PIN_R::new(((self.bits >> 17) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 18"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin18(&self) -> PIN_R { + PIN_R::new(((self.bits >> 18) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 19"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub fn pin19(&self) -> PIN_R { + PIN_R::new(((self.bits >> 19) & 0x01) != 0) } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 20"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin20(&self) -> PIN_R { + PIN_R::new(((self.bits >> 20) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 21"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin21(&self) -> PIN_R { + PIN_R::new(((self.bits >> 21) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 22"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w + pub fn pin22(&self) -> PIN_R { + PIN_R::new(((self.bits >> 22) & 0x01) != 0) } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 23"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin23(&self) -> PIN_R { + PIN_R::new(((self.bits >> 23) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 24"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin24(&self) -> PIN_R { + PIN_R::new(((self.bits >> 24) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 25"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w + pub fn pin25(&self) -> PIN_R { + PIN_R::new(((self.bits >> 25) & 0x01) != 0) } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 26"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin26(&self) -> PIN_R { + PIN_R::new(((self.bits >> 26) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 27"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin27(&self) -> PIN_R { + PIN_R::new(((self.bits >> 27) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 28"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w + pub fn pin28(&self) -> PIN_R { + PIN_R::new(((self.bits >> 28) & 0x01) != 0) } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 29"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin29(&self) -> PIN_R { + PIN_R::new(((self.bits >> 29) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 30"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin30(&self) -> PIN_R { + PIN_R::new(((self.bits >> 30) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 31"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w + pub fn pin31(&self) -> PIN_R { + PIN_R::new(((self.bits >> 31) & 0x01) != 0) } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 0"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 2"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 3"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 4"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 5"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 6"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 7"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 8"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin8(&mut self) -> PIN_W { + PIN_W { w: self, offset: 8 } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 9"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin9(&mut self) -> PIN_W { + PIN_W { w: self, offset: 9 } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 10"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w + pub fn pin10(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 10, + } } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 11"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn pin11(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 11, + } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 12"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn pin12(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 12, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w + pub fn pin13(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 13, + } + } + #[doc = "Bit 14"] + #[inline(always)] + pub fn pin14(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 14, + } + } + #[doc = "Bit 15"] + #[inline(always)] + pub fn pin15(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 15, + } + } + #[doc = "Bit 16"] + #[inline(always)] + pub fn pin16(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 16, + } + } + #[doc = "Bit 17"] + #[inline(always)] + pub fn pin17(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 17, + } + } + #[doc = "Bit 18"] + #[inline(always)] + pub fn pin18(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 18, + } + } + #[doc = "Bit 19"] + #[inline(always)] + pub fn pin19(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 19, + } + } + #[doc = "Bit 20"] + #[inline(always)] + pub fn pin20(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 20, + } + } + #[doc = "Bit 21"] + #[inline(always)] + pub fn pin21(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 21, + } + } + #[doc = "Bit 22"] + #[inline(always)] + pub fn pin22(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 22, + } + } + #[doc = "Bit 23"] + #[inline(always)] + pub fn pin23(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 23, + } + } + #[doc = "Bit 24"] + #[inline(always)] + pub fn pin24(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 24, + } + } + #[doc = "Bit 25"] + #[inline(always)] + pub fn pin25(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 25, + } + } + #[doc = "Bit 26"] + #[inline(always)] + pub fn pin26(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 26, + } + } + #[doc = "Bit 27"] + #[inline(always)] + pub fn pin27(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 27, + } + } + #[doc = "Bit 28"] + #[inline(always)] + pub fn pin28(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 28, + } + } + #[doc = "Bit 29"] + #[inline(always)] + pub fn pin29(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 29, + } + } + #[doc = "Bit 30"] + #[inline(always)] + pub fn pin30(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 30, + } + } + #[doc = "Bit 31"] + #[inline(always)] + pub fn pin31(&mut self) -> PIN_W { + PIN_W { + w: self, + offset: 31, + } + } + } + } +} +#[doc = "Neural Network Accelerator"] +pub struct KPU { + _marker: PhantomData<*const ()>, +} +unsafe impl Send for KPU {} +impl KPU { + #[doc = r"Returns a pointer to the register block"] + #[inline(always)] + pub const fn ptr() -> *const kpu::RegisterBlock { + 0x4080_0000 as *const _ + } +} +impl Deref for KPU { + type Target = kpu::RegisterBlock; + #[inline(always)] + fn deref(&self) -> &Self::Target { + unsafe { &*KPU::ptr() } + } +} +#[doc = "Neural Network Accelerator"] +pub mod kpu { + #[doc = r"Register block"] + #[repr(C)] + pub struct RegisterBlock { + #[doc = "0x00 - Layer arguments FIFO: each layer is defined by writing 12 successive argument values to this register"] + pub layer_argument_fifo: LAYER_ARGUMENT_FIFO, + #[doc = "0x08 - Interrupt status"] + pub interrupt_status: INTERRUPT_STATUS, + #[doc = "0x10 - Interrupt raw"] + pub interrupt_raw: INTERRUPT_RAW, + #[doc = "0x18 - Interrupt mask: 0 enables the interrupt, 1 masks the interrupt"] + pub interrupt_mask: INTERRUPT_MASK, + #[doc = "0x20 - Interrupt clear: write 1 to a bit to clear interrupt"] + pub interrupt_clear: INTERRUPT_CLEAR, + #[doc = "0x28 - FIFO threshold"] + pub fifo_threshold: FIFO_THRESHOLD, + #[doc = "0x30 - FIFO data output"] + pub fifo_data_out: FIFO_DATA_OUT, + #[doc = "0x38 - FIFO control"] + pub fifo_ctrl: FIFO_CTRL, + #[doc = "0x40 - Eight bit mode"] + pub eight_bit_mode: EIGHT_BIT_MODE, + } + #[doc = "Layer arguments FIFO: each layer is defined by writing 12 successive argument values to this register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [layer_argument_fifo](layer_argument_fifo) module"] + pub type LAYER_ARGUMENT_FIFO = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _LAYER_ARGUMENT_FIFO; + #[doc = "`read()` method returns [layer_argument_fifo::R](layer_argument_fifo::R) reader structure"] + impl crate::Readable for LAYER_ARGUMENT_FIFO {} + #[doc = "`write(|w| ..)` method takes [layer_argument_fifo::W](layer_argument_fifo::W) writer structure"] + impl crate::Writable for LAYER_ARGUMENT_FIFO {} + #[doc = "Layer arguments FIFO: each layer is defined by writing 12 successive argument values to this register"] + pub mod layer_argument_fifo { + #[doc = "Reader of register layer_argument_fifo"] + pub type R = crate::R; + #[doc = "Writer for register layer_argument_fifo"] + pub type W = crate::W; + #[doc = "Register layer_argument_fifo `reset()`'s with value 0"] + impl crate::ResetValue for super::LAYER_ARGUMENT_FIFO { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } + } + impl R {} + impl W {} + } + #[doc = "Interrupt status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_status](interrupt_status) module"] + pub type INTERRUPT_STATUS = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INTERRUPT_STATUS; + #[doc = "`read()` method returns [interrupt_status::R](interrupt_status::R) reader structure"] + impl crate::Readable for INTERRUPT_STATUS {} + #[doc = "`write(|w| ..)` method takes [interrupt_status::W](interrupt_status::W) writer structure"] + impl crate::Writable for INTERRUPT_STATUS {} + #[doc = "Interrupt status"] + pub mod interrupt_status { + #[doc = "Reader of register interrupt_status"] + pub type R = crate::R; + #[doc = "Writer for register interrupt_status"] + pub type W = crate::W; + #[doc = "Register interrupt_status `reset()`'s with value 0"] + impl crate::ResetValue for super::INTERRUPT_STATUS { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { + #[doc = "Reader of field `calc_done`"] + pub type CALC_DONE_R = crate::R; + #[doc = "Write proxy for field `calc_done`"] + pub struct CALC_DONE_W<'a> { w: &'a mut W, } - impl<'a> PIN17_W<'a> { + impl<'a> CALC_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -8935,17 +9510,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { + #[doc = "Reader of field `layer_cfg_almost_empty`"] + pub type LAYER_CFG_ALMOST_EMPTY_R = crate::R; + #[doc = "Write proxy for field `layer_cfg_almost_empty`"] + pub struct LAYER_CFG_ALMOST_EMPTY_W<'a> { w: &'a mut W, } - impl<'a> PIN18_W<'a> { + impl<'a> LAYER_CFG_ALMOST_EMPTY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -8959,17 +9534,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { + #[doc = "Reader of field `layer_cfg_almost_full`"] + pub type LAYER_CFG_ALMOST_FULL_R = crate::R; + #[doc = "Write proxy for field `layer_cfg_almost_full`"] + pub struct LAYER_CFG_ALMOST_FULL_W<'a> { w: &'a mut W, } - impl<'a> PIN19_W<'a> { + impl<'a> LAYER_CFG_ALMOST_FULL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -8983,41 +9558,75 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, + impl R { + #[doc = "Bit 0 - Interrupt raised when calculation is done"] + #[inline(always)] + pub fn calc_done(&self) -> CALC_DONE_R { + CALC_DONE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] + #[inline(always)] + pub fn layer_cfg_almost_empty(&self) -> LAYER_CFG_ALMOST_EMPTY_R { + LAYER_CFG_ALMOST_EMPTY_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] + #[inline(always)] + pub fn layer_cfg_almost_full(&self) -> LAYER_CFG_ALMOST_FULL_R { + LAYER_CFG_ALMOST_FULL_R::new(((self.bits >> 2) & 0x01) != 0) + } } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = "Bit 0 - Interrupt raised when calculation is done"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn calc_done(&mut self) -> CALC_DONE_W { + CALC_DONE_W { w: self } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W { + LAYER_CFG_ALMOST_EMPTY_W { w: self } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w + pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W { + LAYER_CFG_ALMOST_FULL_W { w: self } + } + } + } + #[doc = "Interrupt raw\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_raw](interrupt_raw) module"] + pub type INTERRUPT_RAW = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INTERRUPT_RAW; + #[doc = "`read()` method returns [interrupt_raw::R](interrupt_raw::R) reader structure"] + impl crate::Readable for INTERRUPT_RAW {} + #[doc = "`write(|w| ..)` method takes [interrupt_raw::W](interrupt_raw::W) writer structure"] + impl crate::Writable for INTERRUPT_RAW {} + #[doc = "Interrupt raw"] + pub mod interrupt_raw { + #[doc = "Reader of register interrupt_raw"] + pub type R = crate::R; + #[doc = "Writer for register interrupt_raw"] + pub type W = crate::W; + #[doc = "Register interrupt_raw `reset()`'s with value 0"] + impl crate::ResetValue for super::INTERRUPT_RAW { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { + #[doc = "Reader of field `calc_done`"] + pub type CALC_DONE_R = crate::R; + #[doc = "Write proxy for field `calc_done`"] + pub struct CALC_DONE_W<'a> { w: &'a mut W, } - impl<'a> PIN21_W<'a> { + impl<'a> CALC_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9031,17 +9640,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { + #[doc = "Reader of field `layer_cfg_almost_empty`"] + pub type LAYER_CFG_ALMOST_EMPTY_R = crate::R; + #[doc = "Write proxy for field `layer_cfg_almost_empty`"] + pub struct LAYER_CFG_ALMOST_EMPTY_W<'a> { w: &'a mut W, } - impl<'a> PIN22_W<'a> { + impl<'a> LAYER_CFG_ALMOST_EMPTY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9055,17 +9664,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { + #[doc = "Reader of field `layer_cfg_almost_full`"] + pub type LAYER_CFG_ALMOST_FULL_R = crate::R; + #[doc = "Write proxy for field `layer_cfg_almost_full`"] + pub struct LAYER_CFG_ALMOST_FULL_W<'a> { w: &'a mut W, } - impl<'a> PIN23_W<'a> { + impl<'a> LAYER_CFG_ALMOST_FULL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9079,41 +9688,75 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl R { + #[doc = "Bit 0 - Interrupt raised when calculation is done"] + #[inline(always)] + pub fn calc_done(&self) -> CALC_DONE_R { + CALC_DONE_R::new((self.bits & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn layer_cfg_almost_empty(&self) -> LAYER_CFG_ALMOST_EMPTY_R { + LAYER_CFG_ALMOST_EMPTY_R::new(((self.bits >> 1) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w + pub fn layer_cfg_almost_full(&self) -> LAYER_CFG_ALMOST_FULL_R { + LAYER_CFG_ALMOST_FULL_R::new(((self.bits >> 2) & 0x01) != 0) + } + } + impl W { + #[doc = "Bit 0 - Interrupt raised when calculation is done"] + #[inline(always)] + pub fn calc_done(&mut self) -> CALC_DONE_W { + CALC_DONE_W { w: self } + } + #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] + #[inline(always)] + pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W { + LAYER_CFG_ALMOST_EMPTY_W { w: self } + } + #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] + #[inline(always)] + pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W { + LAYER_CFG_ALMOST_FULL_W { w: self } + } + } + } + #[doc = "Interrupt mask: 0 enables the interrupt, 1 masks the interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_mask](interrupt_mask) module"] + pub type INTERRUPT_MASK = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INTERRUPT_MASK; + #[doc = "`read()` method returns [interrupt_mask::R](interrupt_mask::R) reader structure"] + impl crate::Readable for INTERRUPT_MASK {} + #[doc = "`write(|w| ..)` method takes [interrupt_mask::W](interrupt_mask::W) writer structure"] + impl crate::Writable for INTERRUPT_MASK {} + #[doc = "Interrupt mask: 0 enables the interrupt, 1 masks the interrupt"] + pub mod interrupt_mask { + #[doc = "Reader of register interrupt_mask"] + pub type R = crate::R; + #[doc = "Writer for register interrupt_mask"] + pub type W = crate::W; + #[doc = "Register interrupt_mask `reset()`'s with value 0"] + impl crate::ResetValue for super::INTERRUPT_MASK { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { + #[doc = "Reader of field `calc_done`"] + pub type CALC_DONE_R = crate::R; + #[doc = "Write proxy for field `calc_done`"] + pub struct CALC_DONE_W<'a> { w: &'a mut W, } - impl<'a> PIN25_W<'a> { + impl<'a> CALC_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9127,17 +9770,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { + #[doc = "Reader of field `layer_cfg_almost_empty`"] + pub type LAYER_CFG_ALMOST_EMPTY_R = crate::R; + #[doc = "Write proxy for field `layer_cfg_almost_empty`"] + pub struct LAYER_CFG_ALMOST_EMPTY_W<'a> { w: &'a mut W, } - impl<'a> PIN26_W<'a> { + impl<'a> LAYER_CFG_ALMOST_EMPTY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9151,17 +9794,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { + #[doc = "Reader of field `layer_cfg_almost_full`"] + pub type LAYER_CFG_ALMOST_FULL_R = crate::R; + #[doc = "Write proxy for field `layer_cfg_almost_full`"] + pub struct LAYER_CFG_ALMOST_FULL_W<'a> { w: &'a mut W, } - impl<'a> PIN27_W<'a> { + impl<'a> LAYER_CFG_ALMOST_FULL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9175,41 +9818,75 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, + impl R { + #[doc = "Bit 0 - Interrupt raised when calculation is done"] + #[inline(always)] + pub fn calc_done(&self) -> CALC_DONE_R { + CALC_DONE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] + #[inline(always)] + pub fn layer_cfg_almost_empty(&self) -> LAYER_CFG_ALMOST_EMPTY_R { + LAYER_CFG_ALMOST_EMPTY_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] + #[inline(always)] + pub fn layer_cfg_almost_full(&self) -> LAYER_CFG_ALMOST_FULL_R { + LAYER_CFG_ALMOST_FULL_R::new(((self.bits >> 2) & 0x01) != 0) + } } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = "Bit 0 - Interrupt raised when calculation is done"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn calc_done(&mut self) -> CALC_DONE_W { + CALC_DONE_W { w: self } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W { + LAYER_CFG_ALMOST_EMPTY_W { w: self } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w + pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W { + LAYER_CFG_ALMOST_FULL_W { w: self } + } + } + } + #[doc = "Interrupt clear: write 1 to a bit to clear interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_clear](interrupt_clear) module"] + pub type INTERRUPT_CLEAR = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INTERRUPT_CLEAR; + #[doc = "`read()` method returns [interrupt_clear::R](interrupt_clear::R) reader structure"] + impl crate::Readable for INTERRUPT_CLEAR {} + #[doc = "`write(|w| ..)` method takes [interrupt_clear::W](interrupt_clear::W) writer structure"] + impl crate::Writable for INTERRUPT_CLEAR {} + #[doc = "Interrupt clear: write 1 to a bit to clear interrupt"] + pub mod interrupt_clear { + #[doc = "Reader of register interrupt_clear"] + pub type R = crate::R; + #[doc = "Writer for register interrupt_clear"] + pub type W = crate::W; + #[doc = "Register interrupt_clear `reset()`'s with value 0"] + impl crate::ResetValue for super::INTERRUPT_CLEAR { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { + #[doc = "Reader of field `calc_done`"] + pub type CALC_DONE_R = crate::R; + #[doc = "Write proxy for field `calc_done`"] + pub struct CALC_DONE_W<'a> { w: &'a mut W, } - impl<'a> PIN29_W<'a> { + impl<'a> CALC_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9223,17 +9900,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { + #[doc = "Reader of field `layer_cfg_almost_empty`"] + pub type LAYER_CFG_ALMOST_EMPTY_R = crate::R; + #[doc = "Write proxy for field `layer_cfg_almost_empty`"] + pub struct LAYER_CFG_ALMOST_EMPTY_W<'a> { w: &'a mut W, } - impl<'a> PIN30_W<'a> { + impl<'a> LAYER_CFG_ALMOST_EMPTY_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9247,17 +9924,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { + #[doc = "Reader of field `layer_cfg_almost_full`"] + pub type LAYER_CFG_ALMOST_FULL_R = crate::R; + #[doc = "Write proxy for field `layer_cfg_almost_full`"] + pub struct LAYER_CFG_ALMOST_FULL_W<'a> { w: &'a mut W, } - impl<'a> PIN31_W<'a> { + impl<'a> LAYER_CFG_ALMOST_FULL_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9271,365 +9948,177 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] + #[doc = "Bit 0 - Interrupt raised when calculation is done"] #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn calc_done(&self) -> CALC_DONE_R { + CALC_DONE_R::new((self.bits & 0x01) != 0) } - #[doc = "Bit 30"] + #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn layer_cfg_almost_empty(&self) -> LAYER_CFG_ALMOST_EMPTY_R { + LAYER_CFG_ALMOST_EMPTY_R::new(((self.bits >> 1) & 0x01) != 0) } - #[doc = "Bit 31"] + #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn layer_cfg_almost_full(&self) -> LAYER_CFG_ALMOST_FULL_R { + LAYER_CFG_ALMOST_FULL_R::new(((self.bits >> 2) & 0x01) != 0) } } impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] + #[doc = "Bit 0 - Interrupt raised when calculation is done"] #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } + pub fn calc_done(&mut self) -> CALC_DONE_W { + CALC_DONE_W { w: self } } - #[doc = "Bit 22"] + #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } + pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W { + LAYER_CFG_ALMOST_EMPTY_W { w: self } } - #[doc = "Bit 23"] + #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } + pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W { + LAYER_CFG_ALMOST_FULL_W { w: self } } - #[doc = "Bit 24"] + } + } + #[doc = "FIFO threshold\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_threshold](fifo_threshold) module"] + pub type FIFO_THRESHOLD = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _FIFO_THRESHOLD; + #[doc = "`read()` method returns [fifo_threshold::R](fifo_threshold::R) reader structure"] + impl crate::Readable for FIFO_THRESHOLD {} + #[doc = "`write(|w| ..)` method takes [fifo_threshold::W](fifo_threshold::W) writer structure"] + impl crate::Writable for FIFO_THRESHOLD {} + #[doc = "FIFO threshold"] + pub mod fifo_threshold { + #[doc = "Reader of register fifo_threshold"] + pub type R = crate::R; + #[doc = "Writer for register fifo_threshold"] + pub type W = crate::W; + #[doc = "Register fifo_threshold `reset()`'s with value 0"] + impl crate::ResetValue for super::FIFO_THRESHOLD { + type Type = u64; #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } + fn reset_value() -> Self::Type { + 0 } - #[doc = "Bit 25"] + } + #[doc = "Reader of field `full_threshold`"] + pub type FULL_THRESHOLD_R = crate::R; + #[doc = "Write proxy for field `full_threshold`"] + pub struct FULL_THRESHOLD_W<'a> { + w: &'a mut W, + } + impl<'a> FULL_THRESHOLD_W<'a> { + #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x0f) | ((value as u64) & 0x0f); + self.w } - #[doc = "Bit 26"] + } + #[doc = "Reader of field `empty_threshold`"] + pub type EMPTY_THRESHOLD_R = crate::R; + #[doc = "Write proxy for field `empty_threshold`"] + pub struct EMPTY_THRESHOLD_W<'a> { + w: &'a mut W, + } + impl<'a> EMPTY_THRESHOLD_W<'a> { + #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u64) & 0x0f) << 4); + self.w } - #[doc = "Bit 27"] + } + impl R { + #[doc = "Bits 0:3 - FIFO full threshold"] #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } + pub fn full_threshold(&self) -> FULL_THRESHOLD_R { + FULL_THRESHOLD_R::new((self.bits & 0x0f) as u8) } - #[doc = "Bit 28"] + #[doc = "Bits 4:7 - FIFO empty threshold"] #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } + pub fn empty_threshold(&self) -> EMPTY_THRESHOLD_R { + EMPTY_THRESHOLD_R::new(((self.bits >> 4) & 0x0f) as u8) } - #[doc = "Bit 29"] + } + impl W { + #[doc = "Bits 0:3 - FIFO full threshold"] #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } + pub fn full_threshold(&mut self) -> FULL_THRESHOLD_W { + FULL_THRESHOLD_W { w: self } } - #[doc = "Bit 30"] + #[doc = "Bits 4:7 - FIFO empty threshold"] #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } + pub fn empty_threshold(&mut self) -> EMPTY_THRESHOLD_W { + EMPTY_THRESHOLD_W { w: self } } - #[doc = "Bit 31"] + } + } + #[doc = "FIFO data output\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_data_out](fifo_data_out) module"] + pub type FIFO_DATA_OUT = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _FIFO_DATA_OUT; + #[doc = "`read()` method returns [fifo_data_out::R](fifo_data_out::R) reader structure"] + impl crate::Readable for FIFO_DATA_OUT {} + #[doc = "`write(|w| ..)` method takes [fifo_data_out::W](fifo_data_out::W) writer structure"] + impl crate::Writable for FIFO_DATA_OUT {} + #[doc = "FIFO data output"] + pub mod fifo_data_out { + #[doc = "Reader of register fifo_data_out"] + pub type R = crate::R; + #[doc = "Writer for register fifo_data_out"] + pub type W = crate::W; + #[doc = "Register fifo_data_out `reset()`'s with value 0"] + impl crate::ResetValue for super::FIFO_DATA_OUT { + type Type = u64; #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } + fn reset_value() -> Self::Type { + 0 } } + impl R {} + impl W {} } - #[doc = "Rise Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rise_ip](rise_ip) module"] - pub type RISE_IP = crate::Reg; + #[doc = "FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_ctrl](fifo_ctrl) module"] + pub type FIFO_CTRL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _RISE_IP; - #[doc = "`read()` method returns [rise_ip::R](rise_ip::R) reader structure"] - impl crate::Readable for RISE_IP {} - #[doc = "`write(|w| ..)` method takes [rise_ip::W](rise_ip::W) writer structure"] - impl crate::Writable for RISE_IP {} - #[doc = "Rise Interrupt Pending Register"] - pub mod rise_ip { - #[doc = "Reader of register rise_ip"] - pub type R = crate::R; - #[doc = "Writer for register rise_ip"] - pub type W = crate::W; - #[doc = "Register rise_ip `reset()`'s with value 0"] - impl crate::ResetValue for super::RISE_IP { - type Type = u32; + pub struct _FIFO_CTRL; + #[doc = "`read()` method returns [fifo_ctrl::R](fifo_ctrl::R) reader structure"] + impl crate::Readable for FIFO_CTRL {} + #[doc = "`write(|w| ..)` method takes [fifo_ctrl::W](fifo_ctrl::W) writer structure"] + impl crate::Writable for FIFO_CTRL {} + #[doc = "FIFO control"] + pub mod fifo_ctrl { + #[doc = "Reader of register fifo_ctrl"] + pub type R = crate::R; + #[doc = "Writer for register fifo_ctrl"] + pub type W = crate::W; + #[doc = "Register fifo_ctrl `reset()`'s with value 0"] + impl crate::ResetValue for super::FIFO_CTRL { + type Type = u64; #[inline(always)] fn reset_value() -> Self::Type { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { + #[doc = "Reader of field `dma_fifo_flush_n`"] + pub type DMA_FIFO_FLUSH_N_R = crate::R; + #[doc = "Write proxy for field `dma_fifo_flush_n`"] + pub struct DMA_FIFO_FLUSH_N_W<'a> { w: &'a mut W, } - impl<'a> PIN0_W<'a> { + impl<'a> DMA_FIFO_FLUSH_N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9643,17 +10132,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { + #[doc = "Reader of field `gs_fifo_flush_n`"] + pub type GS_FIFO_FLUSH_N_R = crate::R; + #[doc = "Write proxy for field `gs_fifo_flush_n`"] + pub struct GS_FIFO_FLUSH_N_W<'a> { w: &'a mut W, } - impl<'a> PIN1_W<'a> { + impl<'a> GS_FIFO_FLUSH_N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9667,17 +10156,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { + #[doc = "Reader of field `cfg_fifo_flush_n`"] + pub type CFG_FIFO_FLUSH_N_R = crate::R; + #[doc = "Write proxy for field `cfg_fifo_flush_n`"] + pub struct CFG_FIFO_FLUSH_N_W<'a> { w: &'a mut W, } - impl<'a> PIN2_W<'a> { + impl<'a> CFG_FIFO_FLUSH_N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9691,17 +10180,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { + #[doc = "Reader of field `cmd_fifo_flush_n`"] + pub type CMD_FIFO_FLUSH_N_R = crate::R; + #[doc = "Write proxy for field `cmd_fifo_flush_n`"] + pub struct CMD_FIFO_FLUSH_N_W<'a> { w: &'a mut W, } - impl<'a> PIN3_W<'a> { + impl<'a> CMD_FIFO_FLUSH_N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9715,17 +10204,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); + self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); self.w } } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { + #[doc = "Reader of field `resp_fifo_flush_n`"] + pub type RESP_FIFO_FLUSH_N_R = crate::R; + #[doc = "Write proxy for field `resp_fifo_flush_n`"] + pub struct RESP_FIFO_FLUSH_N_W<'a> { w: &'a mut W, } - impl<'a> PIN4_W<'a> { + impl<'a> RESP_FIFO_FLUSH_N_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9739,89 +10228,95 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); + self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); self.w } } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = "Bit 0 - Flush DMA FIFO"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn dma_fifo_flush_n(&self) -> DMA_FIFO_FLUSH_N_R { + DMA_FIFO_FLUSH_N_R::new((self.bits & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bit 1 - Flush GS FIFO"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn gs_fifo_flush_n(&self) -> GS_FIFO_FLUSH_N_R { + GS_FIFO_FLUSH_N_R::new(((self.bits >> 1) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 2 - Flush configuration FIFO"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w + pub fn cfg_fifo_flush_n(&self) -> CFG_FIFO_FLUSH_N_R { + CFG_FIFO_FLUSH_N_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Flush command FIFO"] + #[inline(always)] + pub fn cmd_fifo_flush_n(&self) -> CMD_FIFO_FLUSH_N_R { + CMD_FIFO_FLUSH_N_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Flush response FIFO"] + #[inline(always)] + pub fn resp_fifo_flush_n(&self) -> RESP_FIFO_FLUSH_N_R { + RESP_FIFO_FLUSH_N_R::new(((self.bits >> 4) & 0x01) != 0) } } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = "Bit 0 - Flush DMA FIFO"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn dma_fifo_flush_n(&mut self) -> DMA_FIFO_FLUSH_N_W { + DMA_FIFO_FLUSH_N_W { w: self } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 1 - Flush GS FIFO"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn gs_fifo_flush_n(&mut self) -> GS_FIFO_FLUSH_N_W { + GS_FIFO_FLUSH_N_W { w: self } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 2 - Flush configuration FIFO"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn cfg_fifo_flush_n(&mut self) -> CFG_FIFO_FLUSH_N_W { + CFG_FIFO_FLUSH_N_W { w: self } } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 3 - Flush command FIFO"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn cmd_fifo_flush_n(&mut self) -> CMD_FIFO_FLUSH_N_W { + CMD_FIFO_FLUSH_N_W { w: self } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 4 - Flush response FIFO"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn resp_fifo_flush_n(&mut self) -> RESP_FIFO_FLUSH_N_W { + RESP_FIFO_FLUSH_N_W { w: self } } - #[doc = r"Writes raw bits to the field"] + } + } + #[doc = "Eight bit mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eight_bit_mode](eight_bit_mode) module"] + pub type EIGHT_BIT_MODE = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _EIGHT_BIT_MODE; + #[doc = "`read()` method returns [eight_bit_mode::R](eight_bit_mode::R) reader structure"] + impl crate::Readable for EIGHT_BIT_MODE {} + #[doc = "`write(|w| ..)` method takes [eight_bit_mode::W](eight_bit_mode::W) writer structure"] + impl crate::Writable for EIGHT_BIT_MODE {} + #[doc = "Eight bit mode"] + pub mod eight_bit_mode { + #[doc = "Reader of register eight_bit_mode"] + pub type R = crate::R; + #[doc = "Writer for register eight_bit_mode"] + pub type W = crate::W; + #[doc = "Register eight_bit_mode `reset()`'s with value 0"] + impl crate::ResetValue for super::EIGHT_BIT_MODE { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { + #[doc = "Reader of field `eight_bit_mode`"] + pub type EIGHT_BIT_MODE_R = crate::R; + #[doc = "Write proxy for field `eight_bit_mode`"] + pub struct EIGHT_BIT_MODE_W<'a> { w: &'a mut W, } - impl<'a> PIN8_W<'a> { + impl<'a> EIGHT_BIT_MODE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -9835,161 +10330,266 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, + impl R { + #[doc = "Bit 0 - Use 8-bit instead of 16-bit precision if set"] + #[inline(always)] + pub fn eight_bit_mode(&self) -> EIGHT_BIT_MODE_R { + EIGHT_BIT_MODE_R::new((self.bits & 0x01) != 0) + } } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = "Bit 0 - Use 8-bit instead of 16-bit precision if set"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn eight_bit_mode(&mut self) -> EIGHT_BIT_MODE_W { + EIGHT_BIT_MODE_W { w: self } } - #[doc = r"Clears the field bit"] + } + } +} +#[doc = "Fast Fourier Transform Accelerator"] +pub struct FFT { + _marker: PhantomData<*const ()>, +} +unsafe impl Send for FFT {} +impl FFT { + #[doc = r"Returns a pointer to the register block"] + #[inline(always)] + pub const fn ptr() -> *const fft::RegisterBlock { + 0x4200_0000 as *const _ + } +} +impl Deref for FFT { + type Target = fft::RegisterBlock; + #[inline(always)] + fn deref(&self) -> &Self::Target { + unsafe { &*FFT::ptr() } + } +} +#[doc = "Fast Fourier Transform Accelerator"] +pub mod fft { + #[doc = r"Register block"] + #[repr(C)] + pub struct RegisterBlock { + #[doc = "0x00 - FFT input data fifo"] + pub input_fifo: INPUT_FIFO, + #[doc = "0x08 - FFT control register"] + pub ctrl: CTRL, + #[doc = "0x10 - FIFO control"] + pub fifo_ctrl: FIFO_CTRL, + #[doc = "0x18 - intr_mask"] + pub interruptmask: INTERRUPTMASK, + #[doc = "0x20 - Interrupt clear"] + pub intr_clear: INTR_CLEAR, + #[doc = "0x28 - FFT status register"] + pub status: STATUS, + #[doc = "0x30 - FFT status raw"] + pub status_raw: STATUS_RAW, + #[doc = "0x38 - FFT output FIFO"] + pub output_fifo: OUTPUT_FIFO, + } + #[doc = "FFT input data fifo\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [input_fifo](input_fifo) module"] + pub type INPUT_FIFO = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INPUT_FIFO; + #[doc = "`read()` method returns [input_fifo::R](input_fifo::R) reader structure"] + impl crate::Readable for INPUT_FIFO {} + #[doc = "`write(|w| ..)` method takes [input_fifo::W](input_fifo::W) writer structure"] + impl crate::Writable for INPUT_FIFO {} + #[doc = "FFT input data fifo"] + pub mod input_fifo { + #[doc = "Reader of register input_fifo"] + pub type R = crate::R; + #[doc = "Writer for register input_fifo"] + pub type W = crate::W; + #[doc = "Register input_fifo `reset()`'s with value 0"] + impl crate::ResetValue for super::INPUT_FIFO { + type Type = u64; #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + fn reset_value() -> Self::Type { + 0 } - #[doc = r"Writes raw bits to the field"] + } + impl R {} + impl W {} + } + #[doc = "FFT control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](ctrl) module"] + pub type CTRL = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _CTRL; + #[doc = "`read()` method returns [ctrl::R](ctrl::R) reader structure"] + impl crate::Readable for CTRL {} + #[doc = "`write(|w| ..)` method takes [ctrl::W](ctrl::W) writer structure"] + impl crate::Writable for CTRL {} + #[doc = "FFT control register"] + pub mod ctrl { + #[doc = "Reader of register ctrl"] + pub type R = crate::R; + #[doc = "Writer for register ctrl"] + pub type W = crate::W; + #[doc = "Register ctrl `reset()`'s with value 0"] + impl crate::ResetValue for super::CTRL { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, + #[doc = "FFT calculation data length\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] + pub enum POINT_A { + #[doc = "0: 512 point"] + P512 = 0, + #[doc = "1: 256 point"] + P256 = 1, + #[doc = "2: 128 point"] + P128 = 2, + #[doc = "3: 64 point"] + P64 = 3, } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] + impl From for u8 { #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn from(variant: POINT_A) -> Self { + variant as _ } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `point`"] + pub type POINT_R = crate::R; + impl POINT_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn variant(&self) -> crate::Variant { + use crate::Variant::*; + match self.bits { + 0 => Val(POINT_A::P512), + 1 => Val(POINT_A::P256), + 2 => Val(POINT_A::P128), + 3 => Val(POINT_A::P64), + i => Res(i), + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `P512`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w + pub fn is_p512(&self) -> bool { + *self == POINT_A::P512 } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Checks if the value of the field is `P256`"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn is_p256(&self) -> bool { + *self == POINT_A::P256 } - #[doc = r"Clears the field bit"] + #[doc = "Checks if the value of the field is `P128`"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn is_p128(&self) -> bool { + *self == POINT_A::P128 } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `P64`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w + pub fn is_p64(&self) -> bool { + *self == POINT_A::P64 } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { + #[doc = "Write proxy for field `point`"] + pub struct POINT_W<'a> { w: &'a mut W, } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] + impl<'a> POINT_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn variant(self, variant: POINT_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } } - #[doc = r"Clears the field bit"] + #[doc = "512 point"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn p512(self) -> &'a mut W { + self.variant(POINT_A::P512) } - #[doc = r"Writes raw bits to the field"] + #[doc = "256 point"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn p256(self) -> &'a mut W { + self.variant(POINT_A::P256) } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "128 point"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn p128(self) -> &'a mut W { + self.variant(POINT_A::P128) } - #[doc = r"Clears the field bit"] + #[doc = "64 point"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn p64(self) -> &'a mut W { + self.variant(POINT_A::P64) } #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x07) | ((value as u64) & 0x07); self.w } } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, + #[doc = "FFT mode\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + pub enum MODE_A { + #[doc = "0: FFT mode"] + FFT = 0, + #[doc = "1: Inverse FFT mode"] + IFFT = 1, } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] + impl From for bool { #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn from(variant: MODE_A) -> Self { + variant as u8 != 0 } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `mode`"] + pub type MODE_R = crate::R; + impl MODE_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn variant(&self) -> MODE_A { + match self.bits { + false => MODE_A::FFT, + true => MODE_A::IFFT, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `FFT`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + pub fn is_fft(&self) -> bool { + *self == MODE_A::FFT + } + #[doc = "Checks if the value of the field is `IFFT`"] + #[inline(always)] + pub fn is_ifft(&self) -> bool { + *self == MODE_A::IFFT } } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { + #[doc = "Write proxy for field `mode`"] + pub struct MODE_W<'a> { w: &'a mut W, } - impl<'a> PIN15_W<'a> { + impl<'a> MODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: MODE_A) -> &'a mut W { + { + self.bit(variant.into()) + } + } + #[doc = "FFT mode"] + #[inline(always)] + pub fn fft(self) -> &'a mut W { + self.variant(MODE_A::FFT) + } + #[doc = "Inverse FFT mode"] + #[inline(always)] + pub fn ifft(self) -> &'a mut W { + self.variant(MODE_A::IFFT) + } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10003,41 +10603,31 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); + self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); self.w } } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { + #[doc = "Reader of field `shift`"] + pub type SHIFT_R = crate::R; + #[doc = "Write proxy for field `shift`"] + pub struct SHIFT_W<'a> { w: &'a mut W, } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } + impl<'a> SHIFT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); + pub unsafe fn bits(self, value: u16) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01ff << 4)) | (((value as u64) & 0x01ff) << 4); self.w } } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { + #[doc = "Reader of field `enable`"] + pub type ENABLE_R = crate::R; + #[doc = "Write proxy for field `enable`"] + pub struct ENABLE_W<'a> { w: &'a mut W, } - impl<'a> PIN17_W<'a> { + impl<'a> ENABLE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10051,17 +10641,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); + self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u64) & 0x01) << 13); self.w } } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { + #[doc = "Reader of field `dma_send`"] + pub type DMA_SEND_R = crate::R; + #[doc = "Write proxy for field `dma_send`"] + pub struct DMA_SEND_W<'a> { w: &'a mut W, } - impl<'a> PIN18_W<'a> { + impl<'a> DMA_SEND_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10075,89 +10665,147 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); + self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u64) & 0x01) << 14); self.w } } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, + #[doc = "Input data arrangement\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] + pub enum INPUT_MODE_A { + #[doc = "0: RIRI (real imaginary interleaved)"] + RIRI = 0, + #[doc = "1: RRRR (only real part)"] + RRRR = 1, + #[doc = "2: First input the real part and then input the imaginary part"] + RRII = 2, } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] + impl From for u8 { #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn from(variant: INPUT_MODE_A) -> Self { + variant as _ } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `input_mode`"] + pub type INPUT_MODE_R = crate::R; + impl INPUT_MODE_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn variant(&self) -> crate::Variant { + use crate::Variant::*; + match self.bits { + 0 => Val(INPUT_MODE_A::RIRI), + 1 => Val(INPUT_MODE_A::RRRR), + 2 => Val(INPUT_MODE_A::RRII), + i => Res(i), + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `RIRI`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w + pub fn is_riri(&self) -> bool { + *self == INPUT_MODE_A::RIRI + } + #[doc = "Checks if the value of the field is `RRRR`"] + #[inline(always)] + pub fn is_rrrr(&self) -> bool { + *self == INPUT_MODE_A::RRRR + } + #[doc = "Checks if the value of the field is `RRII`"] + #[inline(always)] + pub fn is_rrii(&self) -> bool { + *self == INPUT_MODE_A::RRII } } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { + #[doc = "Write proxy for field `input_mode`"] + pub struct INPUT_MODE_W<'a> { w: &'a mut W, } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] + impl<'a> INPUT_MODE_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn variant(self, variant: INPUT_MODE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } } - #[doc = r"Clears the field bit"] + #[doc = "RIRI (real imaginary interleaved)"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn riri(self) -> &'a mut W { + self.variant(INPUT_MODE_A::RIRI) + } + #[doc = "RRRR (only real part)"] + #[inline(always)] + pub fn rrrr(self) -> &'a mut W { + self.variant(INPUT_MODE_A::RRRR) + } + #[doc = "First input the real part and then input the imaginary part"] + #[inline(always)] + pub fn rrii(self) -> &'a mut W { + self.variant(INPUT_MODE_A::RRII) } #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 15)) | (((value as u64) & 0x03) << 15); self.w } } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, + #[doc = "Effective width of input data\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + pub enum DATA_MODE_A { + #[doc = "0: 64 bit effective"] + WIDTH_64 = 0, + #[doc = "1: 128 bit effective"] + WIDTH_128 = 1, } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] + impl From for bool { #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn from(variant: DATA_MODE_A) -> Self { + variant as u8 != 0 } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `data_mode`"] + pub type DATA_MODE_R = crate::R; + impl DATA_MODE_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn variant(&self) -> DATA_MODE_A { + match self.bits { + false => DATA_MODE_A::WIDTH_64, + true => DATA_MODE_A::WIDTH_128, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `WIDTH_64`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w + pub fn is_width_64(&self) -> bool { + *self == DATA_MODE_A::WIDTH_64 + } + #[doc = "Checks if the value of the field is `WIDTH_128`"] + #[inline(always)] + pub fn is_width_128(&self) -> bool { + *self == DATA_MODE_A::WIDTH_128 } } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { + #[doc = "Write proxy for field `data_mode`"] + pub struct DATA_MODE_W<'a> { w: &'a mut W, } - impl<'a> PIN22_W<'a> { + impl<'a> DATA_MODE_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: DATA_MODE_A) -> &'a mut W { + { + self.bit(variant.into()) + } + } + #[doc = "64 bit effective"] + #[inline(always)] + pub fn width_64(self) -> &'a mut W { + self.variant(DATA_MODE_A::WIDTH_64) + } + #[doc = "128 bit effective"] + #[inline(always)] + pub fn width_128(self) -> &'a mut W { + self.variant(DATA_MODE_A::WIDTH_128) + } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10171,161 +10819,115 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); + self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u64) & 0x01) << 17); self.w } } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] + impl R { + #[doc = "Bits 0:2 - FFT calculation data length"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w + pub fn point(&self) -> POINT_R { + POINT_R::new((self.bits & 0x07) as u8) } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 3 - FFT mode"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn mode(&self) -> MODE_R { + MODE_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bits 4:12 - Corresponding to the nine layer butterfly shift operation, 0x0: does not shift; 0x1: shift 1st layer. ..."] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn shift(&self) -> SHIFT_R { + SHIFT_R::new(((self.bits >> 4) & 0x01ff) as u16) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 13 - FFT enable"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w + pub fn enable(&self) -> ENABLE_R { + ENABLE_R::new(((self.bits >> 13) & 0x01) != 0) } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bit 14 - FFT DMA enable"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn dma_send(&self) -> DMA_SEND_R { + DMA_SEND_R::new(((self.bits >> 14) & 0x01) != 0) } - #[doc = r"Clears the field bit"] + #[doc = "Bits 15:16 - Input data arrangement"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn input_mode(&self) -> INPUT_MODE_R { + INPUT_MODE_R::new(((self.bits >> 15) & 0x03) as u8) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 17 - Effective width of input data"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w + pub fn data_mode(&self) -> DATA_MODE_R { + DATA_MODE_R::new(((self.bits >> 17) & 0x01) != 0) } } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] + impl W { + #[doc = "Bits 0:2 - FFT calculation data length"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn point(&mut self) -> POINT_W { + POINT_W { w: self } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 3 - FFT mode"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w + pub fn mode(&mut self) -> MODE_W { + MODE_W { w: self } } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bits 4:12 - Corresponding to the nine layer butterfly shift operation, 0x0: does not shift; 0x1: shift 1st layer. ..."] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn shift(&mut self) -> SHIFT_W { + SHIFT_W { w: self } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 13 - FFT enable"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn enable(&mut self) -> ENABLE_W { + ENABLE_W { w: self } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 14 - FFT DMA enable"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w + pub fn dma_send(&mut self) -> DMA_SEND_W { + DMA_SEND_W { w: self } } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Bits 15:16 - Input data arrangement"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn input_mode(&mut self) -> INPUT_MODE_W { + INPUT_MODE_W { w: self } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 17 - Effective width of input data"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn data_mode(&mut self) -> DATA_MODE_W { + DATA_MODE_W { w: self } } - #[doc = r"Writes raw bits to the field"] + } + } + #[doc = "FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fifo_ctrl](fifo_ctrl) module"] + pub type FIFO_CTRL = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _FIFO_CTRL; + #[doc = "`read()` method returns [fifo_ctrl::R](fifo_ctrl::R) reader structure"] + impl crate::Readable for FIFO_CTRL {} + #[doc = "`write(|w| ..)` method takes [fifo_ctrl::W](fifo_ctrl::W) writer structure"] + impl crate::Writable for FIFO_CTRL {} + #[doc = "FIFO control"] + pub mod fifo_ctrl { + #[doc = "Reader of register fifo_ctrl"] + pub type R = crate::R; + #[doc = "Writer for register fifo_ctrl"] + pub type W = crate::W; + #[doc = "Register fifo_ctrl `reset()`'s with value 0"] + impl crate::ResetValue for super::FIFO_CTRL { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { + #[doc = "Reader of field `resp_fifo_flush`"] + pub type RESP_FIFO_FLUSH_R = crate::R; + #[doc = "Write proxy for field `resp_fifo_flush`"] + pub struct RESP_FIFO_FLUSH_W<'a> { w: &'a mut W, } - impl<'a> PIN29_W<'a> { + impl<'a> RESP_FIFO_FLUSH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10339,17 +10941,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { + #[doc = "Reader of field `cmd_fifo_flush`"] + pub type CMD_FIFO_FLUSH_R = crate::R; + #[doc = "Write proxy for field `cmd_fifo_flush`"] + pub struct CMD_FIFO_FLUSH_W<'a> { w: &'a mut W, } - impl<'a> PIN30_W<'a> { + impl<'a> CMD_FIFO_FLUSH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10363,17 +10965,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { + #[doc = "Reader of field `gs_fifo_flush`"] + pub type GS_FIFO_FLUSH_R = crate::R; + #[doc = "Write proxy for field `gs_fifo_flush`"] + pub struct GS_FIFO_FLUSH_W<'a> { w: &'a mut W, } - impl<'a> PIN31_W<'a> { + impl<'a> GS_FIFO_FLUSH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10387,365 +10989,75 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] + #[doc = "Bit 0 - Response memory initialization flag"] #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) + pub fn resp_fifo_flush(&self) -> RESP_FIFO_FLUSH_R { + RESP_FIFO_FLUSH_R::new((self.bits & 0x01) != 0) } - #[doc = "Bit 30"] + #[doc = "Bit 1 - Command memory initialization flag"] #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) + pub fn cmd_fifo_flush(&self) -> CMD_FIFO_FLUSH_R { + CMD_FIFO_FLUSH_R::new(((self.bits >> 1) & 0x01) != 0) } - #[doc = "Bit 31"] + #[doc = "Bit 2 - Output interface memory initialization flag"] #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) + pub fn gs_fifo_flush(&self) -> GS_FIFO_FLUSH_R { + GS_FIFO_FLUSH_R::new(((self.bits >> 2) & 0x01) != 0) } } impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] + #[doc = "Bit 0 - Response memory initialization flag"] #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } + pub fn resp_fifo_flush(&mut self) -> RESP_FIFO_FLUSH_W { + RESP_FIFO_FLUSH_W { w: self } } - #[doc = "Bit 30"] + #[doc = "Bit 1 - Command memory initialization flag"] #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } + pub fn cmd_fifo_flush(&mut self) -> CMD_FIFO_FLUSH_W { + CMD_FIFO_FLUSH_W { w: self } } - #[doc = "Bit 31"] + #[doc = "Bit 2 - Output interface memory initialization flag"] #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } + pub fn gs_fifo_flush(&mut self) -> GS_FIFO_FLUSH_W { + GS_FIFO_FLUSH_W { w: self } } } } - #[doc = "Fall Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fall_ie](fall_ie) module"] - pub type FALL_IE = crate::Reg; + #[doc = "intr_mask\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interruptmask](interruptmask) module"] + pub type INTERRUPTMASK = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _FALL_IE; - #[doc = "`read()` method returns [fall_ie::R](fall_ie::R) reader structure"] - impl crate::Readable for FALL_IE {} - #[doc = "`write(|w| ..)` method takes [fall_ie::W](fall_ie::W) writer structure"] - impl crate::Writable for FALL_IE {} - #[doc = "Fall Interrupt Enable Register"] - pub mod fall_ie { - #[doc = "Reader of register fall_ie"] - pub type R = crate::R; - #[doc = "Writer for register fall_ie"] - pub type W = crate::W; - #[doc = "Register fall_ie `reset()`'s with value 0"] - impl crate::ResetValue for super::FALL_IE { - type Type = u32; + pub struct _INTERRUPTMASK; + #[doc = "`read()` method returns [interruptmask::R](interruptmask::R) reader structure"] + impl crate::Readable for INTERRUPTMASK {} + #[doc = "`write(|w| ..)` method takes [interruptmask::W](interruptmask::W) writer structure"] + impl crate::Writable for INTERRUPTMASK {} + #[doc = "intr_mask"] + pub mod interruptmask { + #[doc = "Reader of register interrupt mask"] + pub type R = crate::R; + #[doc = "Writer for register interrupt mask"] + pub type W = crate::W; + #[doc = "Register interrupt mask `reset()`'s with value 0"] + impl crate::ResetValue for super::INTERRUPTMASK { + type Type = u64; #[inline(always)] fn reset_value() -> Self::Type { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { + #[doc = "Reader of field `fft_done`"] + pub type FFT_DONE_R = crate::R; + #[doc = "Write proxy for field `fft_done`"] + pub struct FFT_DONE_W<'a> { w: &'a mut W, } - impl<'a> PIN0_W<'a> { + impl<'a> FFT_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10759,41 +11071,55 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = "Bit 0 - FFT done"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn fft_done(&self) -> FFT_DONE_R { + FFT_DONE_R::new((self.bits & 0x01) != 0) } - #[doc = r"Clears the field bit"] + } + impl W { + #[doc = "Bit 0 - FFT done"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn fft_done(&mut self) -> FFT_DONE_W { + FFT_DONE_W { w: self } } - #[doc = r"Writes raw bits to the field"] + } + } + #[doc = "Interrupt clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intr_clear](intr_clear) module"] + pub type INTR_CLEAR = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INTR_CLEAR; + #[doc = "`read()` method returns [intr_clear::R](intr_clear::R) reader structure"] + impl crate::Readable for INTR_CLEAR {} + #[doc = "`write(|w| ..)` method takes [intr_clear::W](intr_clear::W) writer structure"] + impl crate::Writable for INTR_CLEAR {} + #[doc = "Interrupt clear"] + pub mod intr_clear { + #[doc = "Reader of register intr_clear"] + pub type R = crate::R; + #[doc = "Writer for register intr_clear"] + pub type W = crate::W; + #[doc = "Register intr_clear `reset()`'s with value 0"] + impl crate::ResetValue for super::INTR_CLEAR { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { + #[doc = "Reader of field `fft_done`"] + pub type FFT_DONE_R = crate::R; + #[doc = "Write proxy for field `fft_done`"] + pub struct FFT_DONE_W<'a> { w: &'a mut W, } - impl<'a> PIN2_W<'a> { + impl<'a> FFT_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10807,41 +11133,55 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = "Bit 0 - FFT done"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn fft_done(&self) -> FFT_DONE_R { + FFT_DONE_R::new((self.bits & 0x01) != 0) } - #[doc = r"Clears the field bit"] + } + impl W { + #[doc = "Bit 0 - FFT done"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn fft_done(&mut self) -> FFT_DONE_W { + FFT_DONE_W { w: self } } - #[doc = r"Writes raw bits to the field"] + } + } + #[doc = "FFT status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](status) module"] + pub type STATUS = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _STATUS; + #[doc = "`read()` method returns [status::R](status::R) reader structure"] + impl crate::Readable for STATUS {} + #[doc = "`write(|w| ..)` method takes [status::W](status::W) writer structure"] + impl crate::Writable for STATUS {} + #[doc = "FFT status register"] + pub mod status { + #[doc = "Reader of register status"] + pub type R = crate::R; + #[doc = "Writer for register status"] + pub type W = crate::W; + #[doc = "Register status `reset()`'s with value 0"] + impl crate::ResetValue for super::STATUS { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { + #[doc = "Reader of field `fft_done`"] + pub type FFT_DONE_R = crate::R; + #[doc = "Write proxy for field `fft_done`"] + pub struct FFT_DONE_W<'a> { w: &'a mut W, } - impl<'a> PIN4_W<'a> { + impl<'a> FFT_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10855,113 +11195,55 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] + impl R { + #[doc = "Bit 0 - FFT done"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w + pub fn fft_done(&self) -> FFT_DONE_R { + FFT_DONE_R::new((self.bits & 0x01) != 0) } } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] + impl W { + #[doc = "Bit 0 - FFT done"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub fn fft_done(&mut self) -> FFT_DONE_W { + FFT_DONE_W { w: self } } } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] + } + #[doc = "FFT status raw\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status_raw](status_raw) module"] + pub type STATUS_RAW = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _STATUS_RAW; + #[doc = "`read()` method returns [status_raw::R](status_raw::R) reader structure"] + impl crate::Readable for STATUS_RAW {} + #[doc = "`write(|w| ..)` method takes [status_raw::W](status_raw::W) writer structure"] + impl crate::Writable for STATUS_RAW {} + #[doc = "FFT status raw"] + pub mod status_raw { + #[doc = "Reader of register status_raw"] + pub type R = crate::R; + #[doc = "Writer for register status_raw"] + pub type W = crate::W; + #[doc = "Register status_raw `reset()`'s with value 0"] + impl crate::ResetValue for super::STATUS_RAW { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { + #[doc = "Reader of field `fft_done`"] + pub type FFT_DONE_R = crate::R; + #[doc = "Write proxy for field `fft_done`"] + pub struct FFT_DONE_W<'a> { w: &'a mut W, } - impl<'a> PIN9_W<'a> { + impl<'a> FFT_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10975,17 +11257,17 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { + #[doc = "Reader of field `fft_work`"] + pub type FFT_WORK_R = crate::R; + #[doc = "Write proxy for field `fft_work`"] + pub struct FFT_WORK_W<'a> { w: &'a mut W, } - impl<'a> PIN10_W<'a> { + impl<'a> FFT_WORK_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -10999,13404 +11281,339 @@ pub mod gpiohs { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] + impl R { + #[doc = "Bit 0 - FFT done"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn fft_done(&self) -> FFT_DONE_R { + FFT_DONE_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1 - FFT work"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w + pub fn fft_work(&self) -> FFT_WORK_R { + FFT_WORK_R::new(((self.bits >> 1) & 0x01) != 0) } } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] + impl W { + #[doc = "Bit 0 - FFT done"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn fft_done(&mut self) -> FFT_DONE_W { + FFT_DONE_W { w: self } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1 - FFT work"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w + pub fn fft_work(&mut self) -> FFT_WORK_W { + FFT_WORK_W { w: self } } } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] + } + #[doc = "FFT output FIFO\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [output_fifo](output_fifo) module"] + pub type OUTPUT_FIFO = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _OUTPUT_FIFO; + #[doc = "`read()` method returns [output_fifo::R](output_fifo::R) reader structure"] + impl crate::Readable for OUTPUT_FIFO {} + #[doc = "`write(|w| ..)` method takes [output_fifo::W](output_fifo::W) writer structure"] + impl crate::Writable for OUTPUT_FIFO {} + #[doc = "FFT output FIFO"] + pub mod output_fifo { + #[doc = "Reader of register output_fifo"] + pub type R = crate::R; + #[doc = "Writer for register output_fifo"] + pub type W = crate::W; + #[doc = "Register output_fifo `reset()`'s with value 0"] + impl crate::ResetValue for super::OUTPUT_FIFO { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w + impl R {} + impl W {} + } +} +#[doc = "Direct Memory Access Controller"] +pub struct DMAC { + _marker: PhantomData<*const ()>, +} +unsafe impl Send for DMAC {} +impl DMAC { + #[doc = r"Returns a pointer to the register block"] + #[inline(always)] + pub const fn ptr() -> *const dmac::RegisterBlock { + 0x5000_0000 as *const _ + } +} +impl Deref for DMAC { + type Target = dmac::RegisterBlock; + #[inline(always)] + fn deref(&self) -> &Self::Target { + unsafe { &*DMAC::ptr() } + } +} +#[doc = "Direct Memory Access Controller"] +pub mod dmac { + #[doc = r"Register block"] + #[repr(C)] + pub struct RegisterBlock { + #[doc = "0x00 - ID Register"] + pub id: ID, + #[doc = "0x08 - COMPVER Register"] + pub compver: COMPVER, + #[doc = "0x10 - Configure Register"] + pub cfg: CFG, + #[doc = "0x18 - Channel Enable Register"] + pub chen: CHEN, + _reserved4: [u8; 16usize], + #[doc = "0x30 - Interrupt Status Register"] + pub intstatus: INTSTATUS, + #[doc = "0x38 - Common Interrupt Clear Register"] + pub com_intclear: COM_INTCLEAR, + #[doc = "0x40 - Common Interrupt Status Enable Register"] + pub com_intstatus_en: COM_INTSTATUS_EN, + #[doc = "0x48 - Common Interrupt Signal Enable Register"] + pub com_intsignal_en: COM_INTSIGNAL_EN, + #[doc = "0x50 - Common Interrupt Status"] + pub com_intstatus: COM_INTSTATUS, + #[doc = "0x58 - Reset register"] + pub reset: RESET, + _reserved10: [u8; 160usize], + #[doc = "0x100 - Channel configuration"] + pub channel: [CHANNEL; 6], + } + #[doc = r"Register block"] + #[repr(C)] + pub struct CHANNEL { + #[doc = "0x00 - SAR Address Register"] + pub sar: self::channel::SAR, + #[doc = "0x08 - DAR Address Register"] + pub dar: self::channel::DAR, + #[doc = "0x10 - Block Transfer Size Register"] + pub block_ts: self::channel::BLOCK_TS, + #[doc = "0x18 - Control Register"] + pub ctl: self::channel::CTL, + #[doc = "0x20 - Configure Register"] + pub cfg: self::channel::CFG, + #[doc = "0x28 - Linked List Pointer register"] + pub llp: self::channel::LLP, + #[doc = "0x30 - Channel Status Register"] + pub status: self::channel::STATUS, + #[doc = "0x38 - Channel Software handshake Source Register"] + pub swhssrc: self::channel::SWHSSRC, + #[doc = "0x40 - Channel Software handshake Destination Register"] + pub swhsdst: self::channel::SWHSDST, + #[doc = "0x48 - Channel Block Transfer Resume Request Register"] + pub blk_tfr: self::channel::BLK_TFR, + #[doc = "0x50 - Channel AXI ID Register"] + pub axi_id: self::channel::AXI_ID, + #[doc = "0x58 - AXI QOS Register"] + pub axi_qos: self::channel::AXI_QOS, + _reserved12: [u8; 32usize], + #[doc = "0x80 - Interrupt Status Enable Register"] + pub intstatus_en: self::channel::INTSTATUS_EN, + #[doc = "0x88 - Channel Interrupt Status Register"] + pub intstatus: self::channel::INTSTATUS, + #[doc = "0x90 - Interrupt Signal Enable Register"] + pub intsignal_en: self::channel::INTSIGNAL_EN, + #[doc = "0x98 - Interrupt Clear Register"] + pub intclear: self::channel::INTCLEAR, + _reserved16: [u8; 88usize], + #[doc = "0xf8 - Padding to make structure size 256 bytes so that channels\\[\\] +is an array"] + pub _reserved: self::channel::_RESERVED, + } + #[doc = r"Register block"] + #[doc = "Channel configuration"] + pub mod channel { + #[doc = "SAR Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sar](sar) module"] + pub type SAR = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _SAR; + #[doc = "`read()` method returns [sar::R](sar::R) reader structure"] + impl crate::Readable for SAR {} + #[doc = "`write(|w| ..)` method takes [sar::W](sar::W) writer structure"] + impl crate::Writable for SAR {} + #[doc = "SAR Address Register"] + pub mod sar { + #[doc = "Reader of register sar"] + pub type R = crate::R; + #[doc = "Writer for register sar"] + pub type W = crate::W; + #[doc = "Register sar `reset()`'s with value 0"] + impl crate::ResetValue for super::SAR { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } } + impl R {} + impl W {} } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w + #[doc = "DAR Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dar](dar) module"] + pub type DAR = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _DAR; + #[doc = "`read()` method returns [dar::R](dar::R) reader structure"] + impl crate::Readable for DAR {} + #[doc = "`write(|w| ..)` method takes [dar::W](dar::W) writer structure"] + impl crate::Writable for DAR {} + #[doc = "DAR Address Register"] + pub mod dar { + #[doc = "Reader of register dar"] + pub type R = crate::R; + #[doc = "Writer for register dar"] + pub type W = crate::W; + #[doc = "Register dar `reset()`'s with value 0"] + impl crate::ResetValue for super::DAR { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } } + impl R {} + impl W {} } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Block Transfer Size Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [block_ts](block_ts) module"] + pub type BLOCK_TS = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _BLOCK_TS; + #[doc = "`read()` method returns [block_ts::R](block_ts::R) reader structure"] + impl crate::Readable for BLOCK_TS {} + #[doc = "`write(|w| ..)` method takes [block_ts::W](block_ts::W) writer structure"] + impl crate::Writable for BLOCK_TS {} + #[doc = "Block Transfer Size Register"] + pub mod block_ts { + #[doc = "Reader of register block_ts"] + pub type R = crate::R; + #[doc = "Writer for register block_ts"] + pub type W = crate::W; + #[doc = "Register block_ts `reset()`'s with value 0"] + impl crate::ResetValue for super::BLOCK_TS { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w + #[doc = "Reader of field `block_ts`"] + pub type BLOCK_TS_R = crate::R; + #[doc = "Write proxy for field `block_ts`"] + pub struct BLOCK_TS_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> BLOCK_TS_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !0x003f_ffff) | ((value as u64) & 0x003f_ffff); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl R { + #[doc = "Bits 0:21 - Block transfer size"] + #[inline(always)] + pub fn block_ts(&self) -> BLOCK_TS_R { + BLOCK_TS_R::new((self.bits & 0x003f_ffff) as u32) + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w + impl W { + #[doc = "Bits 0:21 - Block transfer size"] + #[inline(always)] + pub fn block_ts(&mut self) -> BLOCK_TS_W { + BLOCK_TS_W { w: self } + } } } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](ctl) module"] + pub type CTL = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _CTL; + #[doc = "`read()` method returns [ctl::R](ctl::R) reader structure"] + impl crate::Readable for CTL {} + #[doc = "`write(|w| ..)` method takes [ctl::W](ctl::W) writer structure"] + impl crate::Writable for CTL {} + #[doc = "Control Register"] + pub mod ctl { + #[doc = "Reader of register ctl"] + pub type R = crate::R; + #[doc = "Writer for register ctl"] + pub type W = crate::W; + #[doc = "Register ctl `reset()`'s with value 0"] + impl crate::ResetValue for super::CTL { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Source master select\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + pub enum SMS_A { + #[doc = "0: AXI master 1"] + AXI_MASTER_1 = 0, + #[doc = "1: AXI master 2"] + AXI_MASTER_2 = 1, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w + impl From for bool { + #[inline(always)] + fn from(variant: SMS_A) -> Self { + variant as u8 != 0 + } } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `sms`"] + pub type SMS_R = crate::R; + impl SMS_R { + #[doc = r"Get enumerated values variant"] + #[inline(always)] + pub fn variant(&self) -> SMS_A { + match self.bits { + false => SMS_A::AXI_MASTER_1, + true => SMS_A::AXI_MASTER_2, + } + } + #[doc = "Checks if the value of the field is `AXI_MASTER_1`"] + #[inline(always)] + pub fn is_axi_master_1(&self) -> bool { + *self == SMS_A::AXI_MASTER_1 + } + #[doc = "Checks if the value of the field is `AXI_MASTER_2`"] + #[inline(always)] + pub fn is_axi_master_2(&self) -> bool { + *self == SMS_A::AXI_MASTER_2 + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Write proxy for field `sms`"] + pub struct SMS_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } - #[doc = "Fall Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fall_ip](fall_ip) module"] - pub type FALL_IP = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _FALL_IP; - #[doc = "`read()` method returns [fall_ip::R](fall_ip::R) reader structure"] - impl crate::Readable for FALL_IP {} - #[doc = "`write(|w| ..)` method takes [fall_ip::W](fall_ip::W) writer structure"] - impl crate::Writable for FALL_IP {} - #[doc = "Fall Interrupt Pending Register"] - pub mod fall_ip { - #[doc = "Reader of register fall_ip"] - pub type R = crate::R; - #[doc = "Writer for register fall_ip"] - pub type W = crate::W; - #[doc = "Register fall_ip `reset()`'s with value 0"] - impl crate::ResetValue for super::FALL_IP { - type Type = u32; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w - } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w - } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w - } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w - } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w - } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w - } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w - } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } - #[doc = "High Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [high_ie](high_ie) module"] - pub type HIGH_IE = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _HIGH_IE; - #[doc = "`read()` method returns [high_ie::R](high_ie::R) reader structure"] - impl crate::Readable for HIGH_IE {} - #[doc = "`write(|w| ..)` method takes [high_ie::W](high_ie::W) writer structure"] - impl crate::Writable for HIGH_IE {} - #[doc = "High Interrupt Enable Register"] - pub mod high_ie { - #[doc = "Reader of register high_ie"] - pub type R = crate::R; - #[doc = "Writer for register high_ie"] - pub type W = crate::W; - #[doc = "Register high_ie `reset()`'s with value 0"] - impl crate::ResetValue for super::HIGH_IE { - type Type = u32; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w - } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w - } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w - } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w - } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w - } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w - } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w - } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } - #[doc = "High Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [high_ip](high_ip) module"] - pub type HIGH_IP = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _HIGH_IP; - #[doc = "`read()` method returns [high_ip::R](high_ip::R) reader structure"] - impl crate::Readable for HIGH_IP {} - #[doc = "`write(|w| ..)` method takes [high_ip::W](high_ip::W) writer structure"] - impl crate::Writable for HIGH_IP {} - #[doc = "High Interrupt Pending Register"] - pub mod high_ip { - #[doc = "Reader of register high_ip"] - pub type R = crate::R; - #[doc = "Writer for register high_ip"] - pub type W = crate::W; - #[doc = "Register high_ip `reset()`'s with value 0"] - impl crate::ResetValue for super::HIGH_IP { - type Type = u32; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w - } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w - } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w - } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w - } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w - } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w - } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w - } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } - #[doc = "Low Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [low_ie](low_ie) module"] - pub type LOW_IE = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _LOW_IE; - #[doc = "`read()` method returns [low_ie::R](low_ie::R) reader structure"] - impl crate::Readable for LOW_IE {} - #[doc = "`write(|w| ..)` method takes [low_ie::W](low_ie::W) writer structure"] - impl crate::Writable for LOW_IE {} - #[doc = "Low Interrupt Enable Register"] - pub mod low_ie { - #[doc = "Reader of register low_ie"] - pub type R = crate::R; - #[doc = "Writer for register low_ie"] - pub type W = crate::W; - #[doc = "Register low_ie `reset()`'s with value 0"] - impl crate::ResetValue for super::LOW_IE { - type Type = u32; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w - } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w - } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w - } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w - } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w - } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w - } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w - } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } - #[doc = "Low Interrupt Pending Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [low_ip](low_ip) module"] - pub type LOW_IP = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _LOW_IP; - #[doc = "`read()` method returns [low_ip::R](low_ip::R) reader structure"] - impl crate::Readable for LOW_IP {} - #[doc = "`write(|w| ..)` method takes [low_ip::W](low_ip::W) writer structure"] - impl crate::Writable for LOW_IP {} - #[doc = "Low Interrupt Pending Register"] - pub mod low_ip { - #[doc = "Reader of register low_ip"] - pub type R = crate::R; - #[doc = "Writer for register low_ip"] - pub type W = crate::W; - #[doc = "Register low_ip `reset()`'s with value 0"] - impl crate::ResetValue for super::LOW_IP { - type Type = u32; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w - } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w - } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w - } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w - } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w - } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w - } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w - } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } - #[doc = "HW I/O Function Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [iof_en](iof_en) module"] - pub type IOF_EN = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _IOF_EN; - #[doc = "`read()` method returns [iof_en::R](iof_en::R) reader structure"] - impl crate::Readable for IOF_EN {} - #[doc = "`write(|w| ..)` method takes [iof_en::W](iof_en::W) writer structure"] - impl crate::Writable for IOF_EN {} - #[doc = "HW I/O Function Enable Register"] - pub mod iof_en { - #[doc = "Reader of register iof_en"] - pub type R = crate::R; - #[doc = "Writer for register iof_en"] - pub type W = crate::W; - #[doc = "Register iof_en `reset()`'s with value 0"] - impl crate::ResetValue for super::IOF_EN { - type Type = u32; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w - } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w - } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w - } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w - } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w - } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w - } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w - } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } - #[doc = "HW I/O Function Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [iof_sel](iof_sel) module"] - pub type IOF_SEL = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _IOF_SEL; - #[doc = "`read()` method returns [iof_sel::R](iof_sel::R) reader structure"] - impl crate::Readable for IOF_SEL {} - #[doc = "`write(|w| ..)` method takes [iof_sel::W](iof_sel::W) writer structure"] - impl crate::Writable for IOF_SEL {} - #[doc = "HW I/O Function Select Register"] - pub mod iof_sel { - #[doc = "Reader of register iof_sel"] - pub type R = crate::R; - #[doc = "Writer for register iof_sel"] - pub type W = crate::W; - #[doc = "Register iof_sel `reset()`'s with value 0"] - impl crate::ResetValue for super::IOF_SEL { - type Type = u32; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w - } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w - } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w - } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w - } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w - } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w - } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w - } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } - #[doc = "Output XOR (invert) Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [output_xor](output_xor) module"] - pub type OUTPUT_XOR = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _OUTPUT_XOR; - #[doc = "`read()` method returns [output_xor::R](output_xor::R) reader structure"] - impl crate::Readable for OUTPUT_XOR {} - #[doc = "`write(|w| ..)` method takes [output_xor::W](output_xor::W) writer structure"] - impl crate::Writable for OUTPUT_XOR {} - #[doc = "Output XOR (invert) Register"] - pub mod output_xor { - #[doc = "Reader of register output_xor"] - pub type R = crate::R; - #[doc = "Writer for register output_xor"] - pub type W = crate::W; - #[doc = "Register output_xor `reset()`'s with value 0"] - impl crate::ResetValue for super::OUTPUT_XOR { - type Type = u32; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - #[doc = "Reader of field `pin8`"] - pub type PIN8_R = crate::R; - #[doc = "Write proxy for field `pin8`"] - pub struct PIN8_W<'a> { - w: &'a mut W, - } - impl<'a> PIN8_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8); - self.w - } - } - #[doc = "Reader of field `pin9`"] - pub type PIN9_R = crate::R; - #[doc = "Write proxy for field `pin9`"] - pub struct PIN9_W<'a> { - w: &'a mut W, - } - impl<'a> PIN9_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `pin10`"] - pub type PIN10_R = crate::R; - #[doc = "Write proxy for field `pin10`"] - pub struct PIN10_W<'a> { - w: &'a mut W, - } - impl<'a> PIN10_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `pin11`"] - pub type PIN11_R = crate::R; - #[doc = "Write proxy for field `pin11`"] - pub struct PIN11_W<'a> { - w: &'a mut W, - } - impl<'a> PIN11_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `pin12`"] - pub type PIN12_R = crate::R; - #[doc = "Write proxy for field `pin12`"] - pub struct PIN12_W<'a> { - w: &'a mut W, - } - impl<'a> PIN12_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12); - self.w - } - } - #[doc = "Reader of field `pin13`"] - pub type PIN13_R = crate::R; - #[doc = "Write proxy for field `pin13`"] - pub struct PIN13_W<'a> { - w: &'a mut W, - } - impl<'a> PIN13_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `pin14`"] - pub type PIN14_R = crate::R; - #[doc = "Write proxy for field `pin14`"] - pub struct PIN14_W<'a> { - w: &'a mut W, - } - impl<'a> PIN14_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14); - self.w - } - } - #[doc = "Reader of field `pin15`"] - pub type PIN15_R = crate::R; - #[doc = "Write proxy for field `pin15`"] - pub struct PIN15_W<'a> { - w: &'a mut W, - } - impl<'a> PIN15_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15); - self.w - } - } - #[doc = "Reader of field `pin16`"] - pub type PIN16_R = crate::R; - #[doc = "Write proxy for field `pin16`"] - pub struct PIN16_W<'a> { - w: &'a mut W, - } - impl<'a> PIN16_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u32) & 0x01) << 16); - self.w - } - } - #[doc = "Reader of field `pin17`"] - pub type PIN17_R = crate::R; - #[doc = "Write proxy for field `pin17`"] - pub struct PIN17_W<'a> { - w: &'a mut W, - } - impl<'a> PIN17_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u32) & 0x01) << 17); - self.w - } - } - #[doc = "Reader of field `pin18`"] - pub type PIN18_R = crate::R; - #[doc = "Write proxy for field `pin18`"] - pub struct PIN18_W<'a> { - w: &'a mut W, - } - impl<'a> PIN18_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u32) & 0x01) << 18); - self.w - } - } - #[doc = "Reader of field `pin19`"] - pub type PIN19_R = crate::R; - #[doc = "Write proxy for field `pin19`"] - pub struct PIN19_W<'a> { - w: &'a mut W, - } - impl<'a> PIN19_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u32) & 0x01) << 19); - self.w - } - } - #[doc = "Reader of field `pin20`"] - pub type PIN20_R = crate::R; - #[doc = "Write proxy for field `pin20`"] - pub struct PIN20_W<'a> { - w: &'a mut W, - } - impl<'a> PIN20_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u32) & 0x01) << 20); - self.w - } - } - #[doc = "Reader of field `pin21`"] - pub type PIN21_R = crate::R; - #[doc = "Write proxy for field `pin21`"] - pub struct PIN21_W<'a> { - w: &'a mut W, - } - impl<'a> PIN21_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u32) & 0x01) << 21); - self.w - } - } - #[doc = "Reader of field `pin22`"] - pub type PIN22_R = crate::R; - #[doc = "Write proxy for field `pin22`"] - pub struct PIN22_W<'a> { - w: &'a mut W, - } - impl<'a> PIN22_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 22)) | (((value as u32) & 0x01) << 22); - self.w - } - } - #[doc = "Reader of field `pin23`"] - pub type PIN23_R = crate::R; - #[doc = "Write proxy for field `pin23`"] - pub struct PIN23_W<'a> { - w: &'a mut W, - } - impl<'a> PIN23_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 23)) | (((value as u32) & 0x01) << 23); - self.w - } - } - #[doc = "Reader of field `pin24`"] - pub type PIN24_R = crate::R; - #[doc = "Write proxy for field `pin24`"] - pub struct PIN24_W<'a> { - w: &'a mut W, - } - impl<'a> PIN24_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24); - self.w - } - } - #[doc = "Reader of field `pin25`"] - pub type PIN25_R = crate::R; - #[doc = "Write proxy for field `pin25`"] - pub struct PIN25_W<'a> { - w: &'a mut W, - } - impl<'a> PIN25_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u32) & 0x01) << 25); - self.w - } - } - #[doc = "Reader of field `pin26`"] - pub type PIN26_R = crate::R; - #[doc = "Write proxy for field `pin26`"] - pub struct PIN26_W<'a> { - w: &'a mut W, - } - impl<'a> PIN26_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u32) & 0x01) << 26); - self.w - } - } - #[doc = "Reader of field `pin27`"] - pub type PIN27_R = crate::R; - #[doc = "Write proxy for field `pin27`"] - pub struct PIN27_W<'a> { - w: &'a mut W, - } - impl<'a> PIN27_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u32) & 0x01) << 27); - self.w - } - } - #[doc = "Reader of field `pin28`"] - pub type PIN28_R = crate::R; - #[doc = "Write proxy for field `pin28`"] - pub struct PIN28_W<'a> { - w: &'a mut W, - } - impl<'a> PIN28_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u32) & 0x01) << 28); - self.w - } - } - #[doc = "Reader of field `pin29`"] - pub type PIN29_R = crate::R; - #[doc = "Write proxy for field `pin29`"] - pub struct PIN29_W<'a> { - w: &'a mut W, - } - impl<'a> PIN29_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u32) & 0x01) << 29); - self.w - } - } - #[doc = "Reader of field `pin30`"] - pub type PIN30_R = crate::R; - #[doc = "Write proxy for field `pin30`"] - pub struct PIN30_W<'a> { - w: &'a mut W, - } - impl<'a> PIN30_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u32) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `pin31`"] - pub type PIN31_R = crate::R; - #[doc = "Write proxy for field `pin31`"] - pub struct PIN31_W<'a> { - w: &'a mut W, - } - impl<'a> PIN31_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31); - self.w - } - } - impl R { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&self) -> PIN8_R { - PIN8_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&self) -> PIN9_R { - PIN9_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&self) -> PIN10_R { - PIN10_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&self) -> PIN11_R { - PIN11_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&self) -> PIN12_R { - PIN12_R::new(((self.bits >> 12) & 0x01) != 0) - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&self) -> PIN13_R { - PIN13_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&self) -> PIN14_R { - PIN14_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&self) -> PIN15_R { - PIN15_R::new(((self.bits >> 15) & 0x01) != 0) - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&self) -> PIN16_R { - PIN16_R::new(((self.bits >> 16) & 0x01) != 0) - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&self) -> PIN17_R { - PIN17_R::new(((self.bits >> 17) & 0x01) != 0) - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&self) -> PIN18_R { - PIN18_R::new(((self.bits >> 18) & 0x01) != 0) - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&self) -> PIN19_R { - PIN19_R::new(((self.bits >> 19) & 0x01) != 0) - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&self) -> PIN20_R { - PIN20_R::new(((self.bits >> 20) & 0x01) != 0) - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&self) -> PIN21_R { - PIN21_R::new(((self.bits >> 21) & 0x01) != 0) - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&self) -> PIN22_R { - PIN22_R::new(((self.bits >> 22) & 0x01) != 0) - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&self) -> PIN23_R { - PIN23_R::new(((self.bits >> 23) & 0x01) != 0) - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&self) -> PIN24_R { - PIN24_R::new(((self.bits >> 24) & 0x01) != 0) - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&self) -> PIN25_R { - PIN25_R::new(((self.bits >> 25) & 0x01) != 0) - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&self) -> PIN26_R { - PIN26_R::new(((self.bits >> 26) & 0x01) != 0) - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&self) -> PIN27_R { - PIN27_R::new(((self.bits >> 27) & 0x01) != 0) - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&self) -> PIN28_R { - PIN28_R::new(((self.bits >> 28) & 0x01) != 0) - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&self) -> PIN29_R { - PIN29_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&self) -> PIN30_R { - PIN30_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&self) -> PIN31_R { - PIN31_R::new(((self.bits >> 31) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0"] - #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } - } - #[doc = "Bit 1"] - #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } - } - #[doc = "Bit 2"] - #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } - } - #[doc = "Bit 3"] - #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } - } - #[doc = "Bit 4"] - #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } - } - #[doc = "Bit 5"] - #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } - } - #[doc = "Bit 6"] - #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } - } - #[doc = "Bit 7"] - #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } - } - #[doc = "Bit 8"] - #[inline(always)] - pub fn pin8(&mut self) -> PIN8_W { - PIN8_W { w: self } - } - #[doc = "Bit 9"] - #[inline(always)] - pub fn pin9(&mut self) -> PIN9_W { - PIN9_W { w: self } - } - #[doc = "Bit 10"] - #[inline(always)] - pub fn pin10(&mut self) -> PIN10_W { - PIN10_W { w: self } - } - #[doc = "Bit 11"] - #[inline(always)] - pub fn pin11(&mut self) -> PIN11_W { - PIN11_W { w: self } - } - #[doc = "Bit 12"] - #[inline(always)] - pub fn pin12(&mut self) -> PIN12_W { - PIN12_W { w: self } - } - #[doc = "Bit 13"] - #[inline(always)] - pub fn pin13(&mut self) -> PIN13_W { - PIN13_W { w: self } - } - #[doc = "Bit 14"] - #[inline(always)] - pub fn pin14(&mut self) -> PIN14_W { - PIN14_W { w: self } - } - #[doc = "Bit 15"] - #[inline(always)] - pub fn pin15(&mut self) -> PIN15_W { - PIN15_W { w: self } - } - #[doc = "Bit 16"] - #[inline(always)] - pub fn pin16(&mut self) -> PIN16_W { - PIN16_W { w: self } - } - #[doc = "Bit 17"] - #[inline(always)] - pub fn pin17(&mut self) -> PIN17_W { - PIN17_W { w: self } - } - #[doc = "Bit 18"] - #[inline(always)] - pub fn pin18(&mut self) -> PIN18_W { - PIN18_W { w: self } - } - #[doc = "Bit 19"] - #[inline(always)] - pub fn pin19(&mut self) -> PIN19_W { - PIN19_W { w: self } - } - #[doc = "Bit 20"] - #[inline(always)] - pub fn pin20(&mut self) -> PIN20_W { - PIN20_W { w: self } - } - #[doc = "Bit 21"] - #[inline(always)] - pub fn pin21(&mut self) -> PIN21_W { - PIN21_W { w: self } - } - #[doc = "Bit 22"] - #[inline(always)] - pub fn pin22(&mut self) -> PIN22_W { - PIN22_W { w: self } - } - #[doc = "Bit 23"] - #[inline(always)] - pub fn pin23(&mut self) -> PIN23_W { - PIN23_W { w: self } - } - #[doc = "Bit 24"] - #[inline(always)] - pub fn pin24(&mut self) -> PIN24_W { - PIN24_W { w: self } - } - #[doc = "Bit 25"] - #[inline(always)] - pub fn pin25(&mut self) -> PIN25_W { - PIN25_W { w: self } - } - #[doc = "Bit 26"] - #[inline(always)] - pub fn pin26(&mut self) -> PIN26_W { - PIN26_W { w: self } - } - #[doc = "Bit 27"] - #[inline(always)] - pub fn pin27(&mut self) -> PIN27_W { - PIN27_W { w: self } - } - #[doc = "Bit 28"] - #[inline(always)] - pub fn pin28(&mut self) -> PIN28_W { - PIN28_W { w: self } - } - #[doc = "Bit 29"] - #[inline(always)] - pub fn pin29(&mut self) -> PIN29_W { - PIN29_W { w: self } - } - #[doc = "Bit 30"] - #[inline(always)] - pub fn pin30(&mut self) -> PIN30_W { - PIN30_W { w: self } - } - #[doc = "Bit 31"] - #[inline(always)] - pub fn pin31(&mut self) -> PIN31_W { - PIN31_W { w: self } - } - } - } -} -#[doc = "Neural Network Accelerator"] -pub struct KPU { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for KPU {} -impl KPU { - #[doc = r"Returns a pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const kpu::RegisterBlock { - 0x4080_0000 as *const _ - } -} -impl Deref for KPU { - type Target = kpu::RegisterBlock; - fn deref(&self) -> &Self::Target { - unsafe { &*KPU::ptr() } - } -} -#[doc = "Neural Network Accelerator"] -pub mod kpu { - #[doc = r"Register block"] - #[repr(C)] - pub struct RegisterBlock { - #[doc = "0x00 - Layer arguments FIFO: each layer is defined by writing 12 successive argument values to this register"] - pub layer_argument_fifo: LAYER_ARGUMENT_FIFO, - #[doc = "0x08 - Interrupt status"] - pub interrupt_status: INTERRUPT_STATUS, - #[doc = "0x10 - Interrupt raw"] - pub interrupt_raw: INTERRUPT_RAW, - #[doc = "0x18 - Interrupt mask: 0 enables the interrupt, 1 masks the interrupt"] - pub interrupt_mask: INTERRUPT_MASK, - #[doc = "0x20 - Interrupt clear: write 1 to a bit to clear interrupt"] - pub interrupt_clear: INTERRUPT_CLEAR, - #[doc = "0x28 - FIFO threshold"] - pub fifo_threshold: FIFO_THRESHOLD, - #[doc = "0x30 - FIFO data output"] - pub fifo_data_out: FIFO_DATA_OUT, - #[doc = "0x38 - FIFO control"] - pub fifo_ctrl: FIFO_CTRL, - #[doc = "0x40 - Eight bit mode"] - pub eight_bit_mode: EIGHT_BIT_MODE, - } - #[doc = "Layer arguments FIFO: each layer is defined by writing 12 successive argument values to this register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [layer_argument_fifo](layer_argument_fifo) module"] - pub type LAYER_ARGUMENT_FIFO = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _LAYER_ARGUMENT_FIFO; - #[doc = "`read()` method returns [layer_argument_fifo::R](layer_argument_fifo::R) reader structure"] - impl crate::Readable for LAYER_ARGUMENT_FIFO {} - #[doc = "`write(|w| ..)` method takes [layer_argument_fifo::W](layer_argument_fifo::W) writer structure"] - impl crate::Writable for LAYER_ARGUMENT_FIFO {} - #[doc = "Layer arguments FIFO: each layer is defined by writing 12 successive argument values to this register"] - pub mod layer_argument_fifo { - #[doc = "Reader of register layer_argument_fifo"] - pub type R = crate::R; - #[doc = "Writer for register layer_argument_fifo"] - pub type W = crate::W; - #[doc = "Register layer_argument_fifo `reset()`'s with value 0"] - impl crate::ResetValue for super::LAYER_ARGUMENT_FIFO { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } - #[doc = "Interrupt status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_status](interrupt_status) module"] - pub type INTERRUPT_STATUS = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INTERRUPT_STATUS; - #[doc = "`read()` method returns [interrupt_status::R](interrupt_status::R) reader structure"] - impl crate::Readable for INTERRUPT_STATUS {} - #[doc = "`write(|w| ..)` method takes [interrupt_status::W](interrupt_status::W) writer structure"] - impl crate::Writable for INTERRUPT_STATUS {} - #[doc = "Interrupt status"] - pub mod interrupt_status { - #[doc = "Reader of register interrupt_status"] - pub type R = crate::R; - #[doc = "Writer for register interrupt_status"] - pub type W = crate::W; - #[doc = "Register interrupt_status `reset()`'s with value 0"] - impl crate::ResetValue for super::INTERRUPT_STATUS { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `calc_done`"] - pub type CALC_DONE_R = crate::R; - #[doc = "Write proxy for field `calc_done`"] - pub struct CALC_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> CALC_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `layer_cfg_almost_empty`"] - pub type LAYER_CFG_ALMOST_EMPTY_R = crate::R; - #[doc = "Write proxy for field `layer_cfg_almost_empty`"] - pub struct LAYER_CFG_ALMOST_EMPTY_W<'a> { - w: &'a mut W, - } - impl<'a> LAYER_CFG_ALMOST_EMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `layer_cfg_almost_full`"] - pub type LAYER_CFG_ALMOST_FULL_R = crate::R; - #[doc = "Write proxy for field `layer_cfg_almost_full`"] - pub struct LAYER_CFG_ALMOST_FULL_W<'a> { - w: &'a mut W, - } - impl<'a> LAYER_CFG_ALMOST_FULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - impl R { - #[doc = "Bit 0 - Interrupt raised when calculation is done"] - #[inline(always)] - pub fn calc_done(&self) -> CALC_DONE_R { - CALC_DONE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] - #[inline(always)] - pub fn layer_cfg_almost_empty(&self) -> LAYER_CFG_ALMOST_EMPTY_R { - LAYER_CFG_ALMOST_EMPTY_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] - #[inline(always)] - pub fn layer_cfg_almost_full(&self) -> LAYER_CFG_ALMOST_FULL_R { - LAYER_CFG_ALMOST_FULL_R::new(((self.bits >> 2) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Interrupt raised when calculation is done"] - #[inline(always)] - pub fn calc_done(&mut self) -> CALC_DONE_W { - CALC_DONE_W { w: self } - } - #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] - #[inline(always)] - pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W { - LAYER_CFG_ALMOST_EMPTY_W { w: self } - } - #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] - #[inline(always)] - pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W { - LAYER_CFG_ALMOST_FULL_W { w: self } - } - } - } - #[doc = "Interrupt raw\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_raw](interrupt_raw) module"] - pub type INTERRUPT_RAW = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INTERRUPT_RAW; - #[doc = "`read()` method returns [interrupt_raw::R](interrupt_raw::R) reader structure"] - impl crate::Readable for INTERRUPT_RAW {} - #[doc = "`write(|w| ..)` method takes [interrupt_raw::W](interrupt_raw::W) writer structure"] - impl crate::Writable for INTERRUPT_RAW {} - #[doc = "Interrupt raw"] - pub mod interrupt_raw { - #[doc = "Reader of register interrupt_raw"] - pub type R = crate::R; - #[doc = "Writer for register interrupt_raw"] - pub type W = crate::W; - #[doc = "Register interrupt_raw `reset()`'s with value 0"] - impl crate::ResetValue for super::INTERRUPT_RAW { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `calc_done`"] - pub type CALC_DONE_R = crate::R; - #[doc = "Write proxy for field `calc_done`"] - pub struct CALC_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> CALC_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `layer_cfg_almost_empty`"] - pub type LAYER_CFG_ALMOST_EMPTY_R = crate::R; - #[doc = "Write proxy for field `layer_cfg_almost_empty`"] - pub struct LAYER_CFG_ALMOST_EMPTY_W<'a> { - w: &'a mut W, - } - impl<'a> LAYER_CFG_ALMOST_EMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `layer_cfg_almost_full`"] - pub type LAYER_CFG_ALMOST_FULL_R = crate::R; - #[doc = "Write proxy for field `layer_cfg_almost_full`"] - pub struct LAYER_CFG_ALMOST_FULL_W<'a> { - w: &'a mut W, - } - impl<'a> LAYER_CFG_ALMOST_FULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - impl R { - #[doc = "Bit 0 - Interrupt raised when calculation is done"] - #[inline(always)] - pub fn calc_done(&self) -> CALC_DONE_R { - CALC_DONE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] - #[inline(always)] - pub fn layer_cfg_almost_empty(&self) -> LAYER_CFG_ALMOST_EMPTY_R { - LAYER_CFG_ALMOST_EMPTY_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] - #[inline(always)] - pub fn layer_cfg_almost_full(&self) -> LAYER_CFG_ALMOST_FULL_R { - LAYER_CFG_ALMOST_FULL_R::new(((self.bits >> 2) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Interrupt raised when calculation is done"] - #[inline(always)] - pub fn calc_done(&mut self) -> CALC_DONE_W { - CALC_DONE_W { w: self } - } - #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] - #[inline(always)] - pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W { - LAYER_CFG_ALMOST_EMPTY_W { w: self } - } - #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] - #[inline(always)] - pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W { - LAYER_CFG_ALMOST_FULL_W { w: self } - } - } - } - #[doc = "Interrupt mask: 0 enables the interrupt, 1 masks the interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_mask](interrupt_mask) module"] - pub type INTERRUPT_MASK = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INTERRUPT_MASK; - #[doc = "`read()` method returns [interrupt_mask::R](interrupt_mask::R) reader structure"] - impl crate::Readable for INTERRUPT_MASK {} - #[doc = "`write(|w| ..)` method takes [interrupt_mask::W](interrupt_mask::W) writer structure"] - impl crate::Writable for INTERRUPT_MASK {} - #[doc = "Interrupt mask: 0 enables the interrupt, 1 masks the interrupt"] - pub mod interrupt_mask { - #[doc = "Reader of register interrupt_mask"] - pub type R = crate::R; - #[doc = "Writer for register interrupt_mask"] - pub type W = crate::W; - #[doc = "Register interrupt_mask `reset()`'s with value 0"] - impl crate::ResetValue for super::INTERRUPT_MASK { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `calc_done`"] - pub type CALC_DONE_R = crate::R; - #[doc = "Write proxy for field `calc_done`"] - pub struct CALC_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> CALC_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `layer_cfg_almost_empty`"] - pub type LAYER_CFG_ALMOST_EMPTY_R = crate::R; - #[doc = "Write proxy for field `layer_cfg_almost_empty`"] - pub struct LAYER_CFG_ALMOST_EMPTY_W<'a> { - w: &'a mut W, - } - impl<'a> LAYER_CFG_ALMOST_EMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `layer_cfg_almost_full`"] - pub type LAYER_CFG_ALMOST_FULL_R = crate::R; - #[doc = "Write proxy for field `layer_cfg_almost_full`"] - pub struct LAYER_CFG_ALMOST_FULL_W<'a> { - w: &'a mut W, - } - impl<'a> LAYER_CFG_ALMOST_FULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - impl R { - #[doc = "Bit 0 - Interrupt raised when calculation is done"] - #[inline(always)] - pub fn calc_done(&self) -> CALC_DONE_R { - CALC_DONE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] - #[inline(always)] - pub fn layer_cfg_almost_empty(&self) -> LAYER_CFG_ALMOST_EMPTY_R { - LAYER_CFG_ALMOST_EMPTY_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] - #[inline(always)] - pub fn layer_cfg_almost_full(&self) -> LAYER_CFG_ALMOST_FULL_R { - LAYER_CFG_ALMOST_FULL_R::new(((self.bits >> 2) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Interrupt raised when calculation is done"] - #[inline(always)] - pub fn calc_done(&mut self) -> CALC_DONE_W { - CALC_DONE_W { w: self } - } - #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] - #[inline(always)] - pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W { - LAYER_CFG_ALMOST_EMPTY_W { w: self } - } - #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] - #[inline(always)] - pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W { - LAYER_CFG_ALMOST_FULL_W { w: self } - } - } - } - #[doc = "Interrupt clear: write 1 to a bit to clear interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_clear](interrupt_clear) module"] - pub type INTERRUPT_CLEAR = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INTERRUPT_CLEAR; - #[doc = "`read()` method returns [interrupt_clear::R](interrupt_clear::R) reader structure"] - impl crate::Readable for INTERRUPT_CLEAR {} - #[doc = "`write(|w| ..)` method takes [interrupt_clear::W](interrupt_clear::W) writer structure"] - impl crate::Writable for INTERRUPT_CLEAR {} - #[doc = "Interrupt clear: write 1 to a bit to clear interrupt"] - pub mod interrupt_clear { - #[doc = "Reader of register interrupt_clear"] - pub type R = crate::R; - #[doc = "Writer for register interrupt_clear"] - pub type W = crate::W; - #[doc = "Register interrupt_clear `reset()`'s with value 0"] - impl crate::ResetValue for super::INTERRUPT_CLEAR { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `calc_done`"] - pub type CALC_DONE_R = crate::R; - #[doc = "Write proxy for field `calc_done`"] - pub struct CALC_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> CALC_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `layer_cfg_almost_empty`"] - pub type LAYER_CFG_ALMOST_EMPTY_R = crate::R; - #[doc = "Write proxy for field `layer_cfg_almost_empty`"] - pub struct LAYER_CFG_ALMOST_EMPTY_W<'a> { - w: &'a mut W, - } - impl<'a> LAYER_CFG_ALMOST_EMPTY_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `layer_cfg_almost_full`"] - pub type LAYER_CFG_ALMOST_FULL_R = crate::R; - #[doc = "Write proxy for field `layer_cfg_almost_full`"] - pub struct LAYER_CFG_ALMOST_FULL_W<'a> { - w: &'a mut W, - } - impl<'a> LAYER_CFG_ALMOST_FULL_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - impl R { - #[doc = "Bit 0 - Interrupt raised when calculation is done"] - #[inline(always)] - pub fn calc_done(&self) -> CALC_DONE_R { - CALC_DONE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] - #[inline(always)] - pub fn layer_cfg_almost_empty(&self) -> LAYER_CFG_ALMOST_EMPTY_R { - LAYER_CFG_ALMOST_EMPTY_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] - #[inline(always)] - pub fn layer_cfg_almost_full(&self) -> LAYER_CFG_ALMOST_FULL_R { - LAYER_CFG_ALMOST_FULL_R::new(((self.bits >> 2) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Interrupt raised when calculation is done"] - #[inline(always)] - pub fn calc_done(&mut self) -> CALC_DONE_W { - CALC_DONE_W { w: self } - } - #[doc = "Bit 1 - Interrupt raised when layer arguments FIFO almost empty"] - #[inline(always)] - pub fn layer_cfg_almost_empty(&mut self) -> LAYER_CFG_ALMOST_EMPTY_W { - LAYER_CFG_ALMOST_EMPTY_W { w: self } - } - #[doc = "Bit 2 - Interrupt raised when layer arguments FIFO almost full"] - #[inline(always)] - pub fn layer_cfg_almost_full(&mut self) -> LAYER_CFG_ALMOST_FULL_W { - LAYER_CFG_ALMOST_FULL_W { w: self } - } - } - } - #[doc = "FIFO threshold\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fifo_threshold](fifo_threshold) module"] - pub type FIFO_THRESHOLD = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _FIFO_THRESHOLD; - #[doc = "`read()` method returns [fifo_threshold::R](fifo_threshold::R) reader structure"] - impl crate::Readable for FIFO_THRESHOLD {} - #[doc = "`write(|w| ..)` method takes [fifo_threshold::W](fifo_threshold::W) writer structure"] - impl crate::Writable for FIFO_THRESHOLD {} - #[doc = "FIFO threshold"] - pub mod fifo_threshold { - #[doc = "Reader of register fifo_threshold"] - pub type R = crate::R; - #[doc = "Writer for register fifo_threshold"] - pub type W = crate::W; - #[doc = "Register fifo_threshold `reset()`'s with value 0"] - impl crate::ResetValue for super::FIFO_THRESHOLD { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `full_threshold`"] - pub type FULL_THRESHOLD_R = crate::R; - #[doc = "Write proxy for field `full_threshold`"] - pub struct FULL_THRESHOLD_W<'a> { - w: &'a mut W, - } - impl<'a> FULL_THRESHOLD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x0f) | ((value as u64) & 0x0f); - self.w - } - } - #[doc = "Reader of field `empty_threshold`"] - pub type EMPTY_THRESHOLD_R = crate::R; - #[doc = "Write proxy for field `empty_threshold`"] - pub struct EMPTY_THRESHOLD_W<'a> { - w: &'a mut W, - } - impl<'a> EMPTY_THRESHOLD_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u64) & 0x0f) << 4); - self.w - } - } - impl R { - #[doc = "Bits 0:3 - FIFO full threshold"] - #[inline(always)] - pub fn full_threshold(&self) -> FULL_THRESHOLD_R { - FULL_THRESHOLD_R::new((self.bits & 0x0f) as u8) - } - #[doc = "Bits 4:7 - FIFO empty threshold"] - #[inline(always)] - pub fn empty_threshold(&self) -> EMPTY_THRESHOLD_R { - EMPTY_THRESHOLD_R::new(((self.bits >> 4) & 0x0f) as u8) - } - } - impl W { - #[doc = "Bits 0:3 - FIFO full threshold"] - #[inline(always)] - pub fn full_threshold(&mut self) -> FULL_THRESHOLD_W { - FULL_THRESHOLD_W { w: self } - } - #[doc = "Bits 4:7 - FIFO empty threshold"] - #[inline(always)] - pub fn empty_threshold(&mut self) -> EMPTY_THRESHOLD_W { - EMPTY_THRESHOLD_W { w: self } - } - } - } - #[doc = "FIFO data output\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fifo_data_out](fifo_data_out) module"] - pub type FIFO_DATA_OUT = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _FIFO_DATA_OUT; - #[doc = "`read()` method returns [fifo_data_out::R](fifo_data_out::R) reader structure"] - impl crate::Readable for FIFO_DATA_OUT {} - #[doc = "`write(|w| ..)` method takes [fifo_data_out::W](fifo_data_out::W) writer structure"] - impl crate::Writable for FIFO_DATA_OUT {} - #[doc = "FIFO data output"] - pub mod fifo_data_out { - #[doc = "Reader of register fifo_data_out"] - pub type R = crate::R; - #[doc = "Writer for register fifo_data_out"] - pub type W = crate::W; - #[doc = "Register fifo_data_out `reset()`'s with value 0"] - impl crate::ResetValue for super::FIFO_DATA_OUT { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } - #[doc = "FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fifo_ctrl](fifo_ctrl) module"] - pub type FIFO_CTRL = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _FIFO_CTRL; - #[doc = "`read()` method returns [fifo_ctrl::R](fifo_ctrl::R) reader structure"] - impl crate::Readable for FIFO_CTRL {} - #[doc = "`write(|w| ..)` method takes [fifo_ctrl::W](fifo_ctrl::W) writer structure"] - impl crate::Writable for FIFO_CTRL {} - #[doc = "FIFO control"] - pub mod fifo_ctrl { - #[doc = "Reader of register fifo_ctrl"] - pub type R = crate::R; - #[doc = "Writer for register fifo_ctrl"] - pub type W = crate::W; - #[doc = "Register fifo_ctrl `reset()`'s with value 0"] - impl crate::ResetValue for super::FIFO_CTRL { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `dma_fifo_flush_n`"] - pub type DMA_FIFO_FLUSH_N_R = crate::R; - #[doc = "Write proxy for field `dma_fifo_flush_n`"] - pub struct DMA_FIFO_FLUSH_N_W<'a> { - w: &'a mut W, - } - impl<'a> DMA_FIFO_FLUSH_N_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `gs_fifo_flush_n`"] - pub type GS_FIFO_FLUSH_N_R = crate::R; - #[doc = "Write proxy for field `gs_fifo_flush_n`"] - pub struct GS_FIFO_FLUSH_N_W<'a> { - w: &'a mut W, - } - impl<'a> GS_FIFO_FLUSH_N_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `cfg_fifo_flush_n`"] - pub type CFG_FIFO_FLUSH_N_R = crate::R; - #[doc = "Write proxy for field `cfg_fifo_flush_n`"] - pub struct CFG_FIFO_FLUSH_N_W<'a> { - w: &'a mut W, - } - impl<'a> CFG_FIFO_FLUSH_N_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `cmd_fifo_flush_n`"] - pub type CMD_FIFO_FLUSH_N_R = crate::R; - #[doc = "Write proxy for field `cmd_fifo_flush_n`"] - pub struct CMD_FIFO_FLUSH_N_W<'a> { - w: &'a mut W, - } - impl<'a> CMD_FIFO_FLUSH_N_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `resp_fifo_flush_n`"] - pub type RESP_FIFO_FLUSH_N_R = crate::R; - #[doc = "Write proxy for field `resp_fifo_flush_n`"] - pub struct RESP_FIFO_FLUSH_N_W<'a> { - w: &'a mut W, - } - impl<'a> RESP_FIFO_FLUSH_N_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); - self.w - } - } - impl R { - #[doc = "Bit 0 - Flush DMA FIFO"] - #[inline(always)] - pub fn dma_fifo_flush_n(&self) -> DMA_FIFO_FLUSH_N_R { - DMA_FIFO_FLUSH_N_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Flush GS FIFO"] - #[inline(always)] - pub fn gs_fifo_flush_n(&self) -> GS_FIFO_FLUSH_N_R { - GS_FIFO_FLUSH_N_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Flush configuration FIFO"] - #[inline(always)] - pub fn cfg_fifo_flush_n(&self) -> CFG_FIFO_FLUSH_N_R { - CFG_FIFO_FLUSH_N_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 3 - Flush command FIFO"] - #[inline(always)] - pub fn cmd_fifo_flush_n(&self) -> CMD_FIFO_FLUSH_N_R { - CMD_FIFO_FLUSH_N_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - Flush response FIFO"] - #[inline(always)] - pub fn resp_fifo_flush_n(&self) -> RESP_FIFO_FLUSH_N_R { - RESP_FIFO_FLUSH_N_R::new(((self.bits >> 4) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Flush DMA FIFO"] - #[inline(always)] - pub fn dma_fifo_flush_n(&mut self) -> DMA_FIFO_FLUSH_N_W { - DMA_FIFO_FLUSH_N_W { w: self } - } - #[doc = "Bit 1 - Flush GS FIFO"] - #[inline(always)] - pub fn gs_fifo_flush_n(&mut self) -> GS_FIFO_FLUSH_N_W { - GS_FIFO_FLUSH_N_W { w: self } - } - #[doc = "Bit 2 - Flush configuration FIFO"] - #[inline(always)] - pub fn cfg_fifo_flush_n(&mut self) -> CFG_FIFO_FLUSH_N_W { - CFG_FIFO_FLUSH_N_W { w: self } - } - #[doc = "Bit 3 - Flush command FIFO"] - #[inline(always)] - pub fn cmd_fifo_flush_n(&mut self) -> CMD_FIFO_FLUSH_N_W { - CMD_FIFO_FLUSH_N_W { w: self } - } - #[doc = "Bit 4 - Flush response FIFO"] - #[inline(always)] - pub fn resp_fifo_flush_n(&mut self) -> RESP_FIFO_FLUSH_N_W { - RESP_FIFO_FLUSH_N_W { w: self } - } - } - } - #[doc = "Eight bit mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [eight_bit_mode](eight_bit_mode) module"] - pub type EIGHT_BIT_MODE = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _EIGHT_BIT_MODE; - #[doc = "`read()` method returns [eight_bit_mode::R](eight_bit_mode::R) reader structure"] - impl crate::Readable for EIGHT_BIT_MODE {} - #[doc = "`write(|w| ..)` method takes [eight_bit_mode::W](eight_bit_mode::W) writer structure"] - impl crate::Writable for EIGHT_BIT_MODE {} - #[doc = "Eight bit mode"] - pub mod eight_bit_mode { - #[doc = "Reader of register eight_bit_mode"] - pub type R = crate::R; - #[doc = "Writer for register eight_bit_mode"] - pub type W = crate::W; - #[doc = "Register eight_bit_mode `reset()`'s with value 0"] - impl crate::ResetValue for super::EIGHT_BIT_MODE { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `eight_bit_mode`"] - pub type EIGHT_BIT_MODE_R = crate::R; - #[doc = "Write proxy for field `eight_bit_mode`"] - pub struct EIGHT_BIT_MODE_W<'a> { - w: &'a mut W, - } - impl<'a> EIGHT_BIT_MODE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - impl R { - #[doc = "Bit 0 - Use 8-bit instead of 16-bit precision if set"] - #[inline(always)] - pub fn eight_bit_mode(&self) -> EIGHT_BIT_MODE_R { - EIGHT_BIT_MODE_R::new((self.bits & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Use 8-bit instead of 16-bit precision if set"] - #[inline(always)] - pub fn eight_bit_mode(&mut self) -> EIGHT_BIT_MODE_W { - EIGHT_BIT_MODE_W { w: self } - } - } - } -} -#[doc = "Fast Fourier Transform Accelerator"] -pub struct FFT { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for FFT {} -impl FFT { - #[doc = r"Returns a pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const fft::RegisterBlock { - 0x4200_0000 as *const _ - } -} -impl Deref for FFT { - type Target = fft::RegisterBlock; - fn deref(&self) -> &Self::Target { - unsafe { &*FFT::ptr() } - } -} -#[doc = "Fast Fourier Transform Accelerator"] -pub mod fft { - #[doc = r"Register block"] - #[repr(C)] - pub struct RegisterBlock { - #[doc = "0x00 - FFT input data fifo"] - pub input_fifo: INPUT_FIFO, - #[doc = "0x08 - FFT control register"] - pub ctrl: CTRL, - #[doc = "0x10 - FIFO control"] - pub fifo_ctrl: FIFO_CTRL, - #[doc = "0x18 - intr_mask"] - pub interruptmask: INTERRUPTMASK, - #[doc = "0x20 - Interrupt clear"] - pub intr_clear: INTR_CLEAR, - #[doc = "0x28 - FFT status register"] - pub status: STATUS, - #[doc = "0x30 - FFT status raw"] - pub status_raw: STATUS_RAW, - #[doc = "0x38 - FFT output FIFO"] - pub output_fifo: OUTPUT_FIFO, - } - #[doc = "FFT input data fifo\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [input_fifo](input_fifo) module"] - pub type INPUT_FIFO = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INPUT_FIFO; - #[doc = "`read()` method returns [input_fifo::R](input_fifo::R) reader structure"] - impl crate::Readable for INPUT_FIFO {} - #[doc = "`write(|w| ..)` method takes [input_fifo::W](input_fifo::W) writer structure"] - impl crate::Writable for INPUT_FIFO {} - #[doc = "FFT input data fifo"] - pub mod input_fifo { - #[doc = "Reader of register input_fifo"] - pub type R = crate::R; - #[doc = "Writer for register input_fifo"] - pub type W = crate::W; - #[doc = "Register input_fifo `reset()`'s with value 0"] - impl crate::ResetValue for super::INPUT_FIFO { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } - #[doc = "FFT control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ctrl](ctrl) module"] - pub type CTRL = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _CTRL; - #[doc = "`read()` method returns [ctrl::R](ctrl::R) reader structure"] - impl crate::Readable for CTRL {} - #[doc = "`write(|w| ..)` method takes [ctrl::W](ctrl::W) writer structure"] - impl crate::Writable for CTRL {} - #[doc = "FFT control register"] - pub mod ctrl { - #[doc = "Reader of register ctrl"] - pub type R = crate::R; - #[doc = "Writer for register ctrl"] - pub type W = crate::W; - #[doc = "Register ctrl `reset()`'s with value 0"] - impl crate::ResetValue for super::CTRL { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "FFT calculation data length\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum POINT_A { - #[doc = "0: 512 point"] - P512, - #[doc = "1: 256 point"] - P256, - #[doc = "2: 128 point"] - P128, - #[doc = "3: 64 point"] - P64, - } - impl From for u8 { - #[inline(always)] - fn from(variant: POINT_A) -> Self { - match variant { - POINT_A::P512 => 0, - POINT_A::P256 => 1, - POINT_A::P128 => 2, - POINT_A::P64 => 3, - } - } - } - #[doc = "Reader of field `point`"] - pub type POINT_R = crate::R; - impl POINT_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> crate::Variant { - use crate::Variant::*; - match self.bits { - 0 => Val(POINT_A::P512), - 1 => Val(POINT_A::P256), - 2 => Val(POINT_A::P128), - 3 => Val(POINT_A::P64), - i => Res(i), - } - } - #[doc = "Checks if the value of the field is `P512`"] - #[inline(always)] - pub fn is_p512(&self) -> bool { - *self == POINT_A::P512 - } - #[doc = "Checks if the value of the field is `P256`"] - #[inline(always)] - pub fn is_p256(&self) -> bool { - *self == POINT_A::P256 - } - #[doc = "Checks if the value of the field is `P128`"] - #[inline(always)] - pub fn is_p128(&self) -> bool { - *self == POINT_A::P128 - } - #[doc = "Checks if the value of the field is `P64`"] - #[inline(always)] - pub fn is_p64(&self) -> bool { - *self == POINT_A::P64 - } - } - #[doc = "Write proxy for field `point`"] - pub struct POINT_W<'a> { - w: &'a mut W, - } - impl<'a> POINT_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: POINT_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "512 point"] - #[inline(always)] - pub fn p512(self) -> &'a mut W { - self.variant(POINT_A::P512) - } - #[doc = "256 point"] - #[inline(always)] - pub fn p256(self) -> &'a mut W { - self.variant(POINT_A::P256) - } - #[doc = "128 point"] - #[inline(always)] - pub fn p128(self) -> &'a mut W { - self.variant(POINT_A::P128) - } - #[doc = "64 point"] - #[inline(always)] - pub fn p64(self) -> &'a mut W { - self.variant(POINT_A::P64) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x07) | ((value as u64) & 0x07); - self.w - } - } - #[doc = "FFT mode\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum MODE_A { - #[doc = "0: FFT mode"] - FFT, - #[doc = "1: Inverse FFT mode"] - IFFT, - } - impl From for bool { - #[inline(always)] - fn from(variant: MODE_A) -> Self { - match variant { - MODE_A::FFT => false, - MODE_A::IFFT => true, - } - } - } - #[doc = "Reader of field `mode`"] - pub type MODE_R = crate::R; - impl MODE_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> MODE_A { - match self.bits { - false => MODE_A::FFT, - true => MODE_A::IFFT, - } - } - #[doc = "Checks if the value of the field is `FFT`"] - #[inline(always)] - pub fn is_fft(&self) -> bool { - *self == MODE_A::FFT - } - #[doc = "Checks if the value of the field is `IFFT`"] - #[inline(always)] - pub fn is_ifft(&self) -> bool { - *self == MODE_A::IFFT - } - } - #[doc = "Write proxy for field `mode`"] - pub struct MODE_W<'a> { - w: &'a mut W, - } - impl<'a> MODE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: MODE_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "FFT mode"] - #[inline(always)] - pub fn fft(self) -> &'a mut W { - self.variant(MODE_A::FFT) - } - #[doc = "Inverse FFT mode"] - #[inline(always)] - pub fn ifft(self) -> &'a mut W { - self.variant(MODE_A::IFFT) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `shift`"] - pub type SHIFT_R = crate::R; - #[doc = "Write proxy for field `shift`"] - pub struct SHIFT_W<'a> { - w: &'a mut W, - } - impl<'a> SHIFT_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u16) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01ff << 4)) | (((value as u64) & 0x01ff) << 4); - self.w - } - } - #[doc = "Reader of field `enable`"] - pub type ENABLE_R = crate::R; - #[doc = "Write proxy for field `enable`"] - pub struct ENABLE_W<'a> { - w: &'a mut W, - } - impl<'a> ENABLE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u64) & 0x01) << 13); - self.w - } - } - #[doc = "Reader of field `dma_send`"] - pub type DMA_SEND_R = crate::R; - #[doc = "Write proxy for field `dma_send`"] - pub struct DMA_SEND_W<'a> { - w: &'a mut W, - } - impl<'a> DMA_SEND_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u64) & 0x01) << 14); - self.w - } - } - #[doc = "Input data arrangement\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum INPUT_MODE_A { - #[doc = "0: RIRI (real imaginary interleaved)"] - RIRI, - #[doc = "1: RRRR (only real part)"] - RRRR, - #[doc = "2: First input the real part and then input the imaginary part"] - RRII, - } - impl From for u8 { - #[inline(always)] - fn from(variant: INPUT_MODE_A) -> Self { - match variant { - INPUT_MODE_A::RIRI => 0, - INPUT_MODE_A::RRRR => 1, - INPUT_MODE_A::RRII => 2, - } - } - } - #[doc = "Reader of field `input_mode`"] - pub type INPUT_MODE_R = crate::R; - impl INPUT_MODE_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> crate::Variant { - use crate::Variant::*; - match self.bits { - 0 => Val(INPUT_MODE_A::RIRI), - 1 => Val(INPUT_MODE_A::RRRR), - 2 => Val(INPUT_MODE_A::RRII), - i => Res(i), - } - } - #[doc = "Checks if the value of the field is `RIRI`"] - #[inline(always)] - pub fn is_riri(&self) -> bool { - *self == INPUT_MODE_A::RIRI - } - #[doc = "Checks if the value of the field is `RRRR`"] - #[inline(always)] - pub fn is_rrrr(&self) -> bool { - *self == INPUT_MODE_A::RRRR - } - #[doc = "Checks if the value of the field is `RRII`"] - #[inline(always)] - pub fn is_rrii(&self) -> bool { - *self == INPUT_MODE_A::RRII - } - } - #[doc = "Write proxy for field `input_mode`"] - pub struct INPUT_MODE_W<'a> { - w: &'a mut W, - } - impl<'a> INPUT_MODE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: INPUT_MODE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "RIRI (real imaginary interleaved)"] - #[inline(always)] - pub fn riri(self) -> &'a mut W { - self.variant(INPUT_MODE_A::RIRI) - } - #[doc = "RRRR (only real part)"] - #[inline(always)] - pub fn rrrr(self) -> &'a mut W { - self.variant(INPUT_MODE_A::RRRR) - } - #[doc = "First input the real part and then input the imaginary part"] - #[inline(always)] - pub fn rrii(self) -> &'a mut W { - self.variant(INPUT_MODE_A::RRII) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 15)) | (((value as u64) & 0x03) << 15); - self.w - } - } - #[doc = "Effective width of input data\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum DATA_MODE_A { - #[doc = "0: 64 bit effective"] - WIDTH_64, - #[doc = "1: 128 bit effective"] - WIDTH_128, - } - impl From for bool { - #[inline(always)] - fn from(variant: DATA_MODE_A) -> Self { - match variant { - DATA_MODE_A::WIDTH_64 => false, - DATA_MODE_A::WIDTH_128 => true, - } - } - } - #[doc = "Reader of field `data_mode`"] - pub type DATA_MODE_R = crate::R; - impl DATA_MODE_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> DATA_MODE_A { - match self.bits { - false => DATA_MODE_A::WIDTH_64, - true => DATA_MODE_A::WIDTH_128, - } - } - #[doc = "Checks if the value of the field is `WIDTH_64`"] - #[inline(always)] - pub fn is_width_64(&self) -> bool { - *self == DATA_MODE_A::WIDTH_64 - } - #[doc = "Checks if the value of the field is `WIDTH_128`"] - #[inline(always)] - pub fn is_width_128(&self) -> bool { - *self == DATA_MODE_A::WIDTH_128 - } - } - #[doc = "Write proxy for field `data_mode`"] - pub struct DATA_MODE_W<'a> { - w: &'a mut W, - } - impl<'a> DATA_MODE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: DATA_MODE_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "64 bit effective"] - #[inline(always)] - pub fn width_64(self) -> &'a mut W { - self.variant(DATA_MODE_A::WIDTH_64) - } - #[doc = "128 bit effective"] - #[inline(always)] - pub fn width_128(self) -> &'a mut W { - self.variant(DATA_MODE_A::WIDTH_128) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u64) & 0x01) << 17); - self.w - } - } - impl R { - #[doc = "Bits 0:2 - FFT calculation data length"] - #[inline(always)] - pub fn point(&self) -> POINT_R { - POINT_R::new((self.bits & 0x07) as u8) - } - #[doc = "Bit 3 - FFT mode"] - #[inline(always)] - pub fn mode(&self) -> MODE_R { - MODE_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bits 4:12 - Corresponding to the nine layer butterfly shift operation, 0x0: does not shift; 0x1: shift 1st layer. ..."] - #[inline(always)] - pub fn shift(&self) -> SHIFT_R { - SHIFT_R::new(((self.bits >> 4) & 0x01ff) as u16) - } - #[doc = "Bit 13 - FFT enable"] - #[inline(always)] - pub fn enable(&self) -> ENABLE_R { - ENABLE_R::new(((self.bits >> 13) & 0x01) != 0) - } - #[doc = "Bit 14 - FFT DMA enable"] - #[inline(always)] - pub fn dma_send(&self) -> DMA_SEND_R { - DMA_SEND_R::new(((self.bits >> 14) & 0x01) != 0) - } - #[doc = "Bits 15:16 - Input data arrangement"] - #[inline(always)] - pub fn input_mode(&self) -> INPUT_MODE_R { - INPUT_MODE_R::new(((self.bits >> 15) & 0x03) as u8) - } - #[doc = "Bit 17 - Effective width of input data"] - #[inline(always)] - pub fn data_mode(&self) -> DATA_MODE_R { - DATA_MODE_R::new(((self.bits >> 17) & 0x01) != 0) - } - } - impl W { - #[doc = "Bits 0:2 - FFT calculation data length"] - #[inline(always)] - pub fn point(&mut self) -> POINT_W { - POINT_W { w: self } - } - #[doc = "Bit 3 - FFT mode"] - #[inline(always)] - pub fn mode(&mut self) -> MODE_W { - MODE_W { w: self } - } - #[doc = "Bits 4:12 - Corresponding to the nine layer butterfly shift operation, 0x0: does not shift; 0x1: shift 1st layer. ..."] - #[inline(always)] - pub fn shift(&mut self) -> SHIFT_W { - SHIFT_W { w: self } - } - #[doc = "Bit 13 - FFT enable"] - #[inline(always)] - pub fn enable(&mut self) -> ENABLE_W { - ENABLE_W { w: self } - } - #[doc = "Bit 14 - FFT DMA enable"] - #[inline(always)] - pub fn dma_send(&mut self) -> DMA_SEND_W { - DMA_SEND_W { w: self } - } - #[doc = "Bits 15:16 - Input data arrangement"] - #[inline(always)] - pub fn input_mode(&mut self) -> INPUT_MODE_W { - INPUT_MODE_W { w: self } - } - #[doc = "Bit 17 - Effective width of input data"] - #[inline(always)] - pub fn data_mode(&mut self) -> DATA_MODE_W { - DATA_MODE_W { w: self } - } - } - } - #[doc = "FIFO control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fifo_ctrl](fifo_ctrl) module"] - pub type FIFO_CTRL = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _FIFO_CTRL; - #[doc = "`read()` method returns [fifo_ctrl::R](fifo_ctrl::R) reader structure"] - impl crate::Readable for FIFO_CTRL {} - #[doc = "`write(|w| ..)` method takes [fifo_ctrl::W](fifo_ctrl::W) writer structure"] - impl crate::Writable for FIFO_CTRL {} - #[doc = "FIFO control"] - pub mod fifo_ctrl { - #[doc = "Reader of register fifo_ctrl"] - pub type R = crate::R; - #[doc = "Writer for register fifo_ctrl"] - pub type W = crate::W; - #[doc = "Register fifo_ctrl `reset()`'s with value 0"] - impl crate::ResetValue for super::FIFO_CTRL { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `resp_fifo_flush`"] - pub type RESP_FIFO_FLUSH_R = crate::R; - #[doc = "Write proxy for field `resp_fifo_flush`"] - pub struct RESP_FIFO_FLUSH_W<'a> { - w: &'a mut W, - } - impl<'a> RESP_FIFO_FLUSH_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `cmd_fifo_flush`"] - pub type CMD_FIFO_FLUSH_R = crate::R; - #[doc = "Write proxy for field `cmd_fifo_flush`"] - pub struct CMD_FIFO_FLUSH_W<'a> { - w: &'a mut W, - } - impl<'a> CMD_FIFO_FLUSH_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `gs_fifo_flush`"] - pub type GS_FIFO_FLUSH_R = crate::R; - #[doc = "Write proxy for field `gs_fifo_flush`"] - pub struct GS_FIFO_FLUSH_W<'a> { - w: &'a mut W, - } - impl<'a> GS_FIFO_FLUSH_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - impl R { - #[doc = "Bit 0 - Response memory initialization flag"] - #[inline(always)] - pub fn resp_fifo_flush(&self) -> RESP_FIFO_FLUSH_R { - RESP_FIFO_FLUSH_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Command memory initialization flag"] - #[inline(always)] - pub fn cmd_fifo_flush(&self) -> CMD_FIFO_FLUSH_R { - CMD_FIFO_FLUSH_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 2 - Output interface memory initialization flag"] - #[inline(always)] - pub fn gs_fifo_flush(&self) -> GS_FIFO_FLUSH_R { - GS_FIFO_FLUSH_R::new(((self.bits >> 2) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Response memory initialization flag"] - #[inline(always)] - pub fn resp_fifo_flush(&mut self) -> RESP_FIFO_FLUSH_W { - RESP_FIFO_FLUSH_W { w: self } - } - #[doc = "Bit 1 - Command memory initialization flag"] - #[inline(always)] - pub fn cmd_fifo_flush(&mut self) -> CMD_FIFO_FLUSH_W { - CMD_FIFO_FLUSH_W { w: self } - } - #[doc = "Bit 2 - Output interface memory initialization flag"] - #[inline(always)] - pub fn gs_fifo_flush(&mut self) -> GS_FIFO_FLUSH_W { - GS_FIFO_FLUSH_W { w: self } - } - } - } - #[doc = "intr_mask\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interruptmask](interruptmask) module"] - pub type INTERRUPTMASK = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INTERRUPTMASK; - #[doc = "`read()` method returns [interruptmask::R](interruptmask::R) reader structure"] - impl crate::Readable for INTERRUPTMASK {} - #[doc = "`write(|w| ..)` method takes [interruptmask::W](interruptmask::W) writer structure"] - impl crate::Writable for INTERRUPTMASK {} - #[doc = "intr_mask"] - pub mod interruptmask { - #[doc = "Reader of register interrupt mask"] - pub type R = crate::R; - #[doc = "Writer for register interrupt mask"] - pub type W = crate::W; - #[doc = "Register interrupt mask `reset()`'s with value 0"] - impl crate::ResetValue for super::INTERRUPTMASK { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `fft_done`"] - pub type FFT_DONE_R = crate::R; - #[doc = "Write proxy for field `fft_done`"] - pub struct FFT_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> FFT_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - impl R { - #[doc = "Bit 0 - FFT done"] - #[inline(always)] - pub fn fft_done(&self) -> FFT_DONE_R { - FFT_DONE_R::new((self.bits & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - FFT done"] - #[inline(always)] - pub fn fft_done(&mut self) -> FFT_DONE_W { - FFT_DONE_W { w: self } - } - } - } - #[doc = "Interrupt clear\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intr_clear](intr_clear) module"] - pub type INTR_CLEAR = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INTR_CLEAR; - #[doc = "`read()` method returns [intr_clear::R](intr_clear::R) reader structure"] - impl crate::Readable for INTR_CLEAR {} - #[doc = "`write(|w| ..)` method takes [intr_clear::W](intr_clear::W) writer structure"] - impl crate::Writable for INTR_CLEAR {} - #[doc = "Interrupt clear"] - pub mod intr_clear { - #[doc = "Reader of register intr_clear"] - pub type R = crate::R; - #[doc = "Writer for register intr_clear"] - pub type W = crate::W; - #[doc = "Register intr_clear `reset()`'s with value 0"] - impl crate::ResetValue for super::INTR_CLEAR { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `fft_done`"] - pub type FFT_DONE_R = crate::R; - #[doc = "Write proxy for field `fft_done`"] - pub struct FFT_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> FFT_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - impl R { - #[doc = "Bit 0 - FFT done"] - #[inline(always)] - pub fn fft_done(&self) -> FFT_DONE_R { - FFT_DONE_R::new((self.bits & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - FFT done"] - #[inline(always)] - pub fn fft_done(&mut self) -> FFT_DONE_W { - FFT_DONE_W { w: self } - } - } - } - #[doc = "FFT status register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [status](status) module"] - pub type STATUS = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _STATUS; - #[doc = "`read()` method returns [status::R](status::R) reader structure"] - impl crate::Readable for STATUS {} - #[doc = "`write(|w| ..)` method takes [status::W](status::W) writer structure"] - impl crate::Writable for STATUS {} - #[doc = "FFT status register"] - pub mod status { - #[doc = "Reader of register status"] - pub type R = crate::R; - #[doc = "Writer for register status"] - pub type W = crate::W; - #[doc = "Register status `reset()`'s with value 0"] - impl crate::ResetValue for super::STATUS { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `fft_done`"] - pub type FFT_DONE_R = crate::R; - #[doc = "Write proxy for field `fft_done`"] - pub struct FFT_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> FFT_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - impl R { - #[doc = "Bit 0 - FFT done"] - #[inline(always)] - pub fn fft_done(&self) -> FFT_DONE_R { - FFT_DONE_R::new((self.bits & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - FFT done"] - #[inline(always)] - pub fn fft_done(&mut self) -> FFT_DONE_W { - FFT_DONE_W { w: self } - } - } - } - #[doc = "FFT status raw\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [status_raw](status_raw) module"] - pub type STATUS_RAW = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _STATUS_RAW; - #[doc = "`read()` method returns [status_raw::R](status_raw::R) reader structure"] - impl crate::Readable for STATUS_RAW {} - #[doc = "`write(|w| ..)` method takes [status_raw::W](status_raw::W) writer structure"] - impl crate::Writable for STATUS_RAW {} - #[doc = "FFT status raw"] - pub mod status_raw { - #[doc = "Reader of register status_raw"] - pub type R = crate::R; - #[doc = "Writer for register status_raw"] - pub type W = crate::W; - #[doc = "Register status_raw `reset()`'s with value 0"] - impl crate::ResetValue for super::STATUS_RAW { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `fft_done`"] - pub type FFT_DONE_R = crate::R; - #[doc = "Write proxy for field `fft_done`"] - pub struct FFT_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> FFT_DONE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `fft_work`"] - pub type FFT_WORK_R = crate::R; - #[doc = "Write proxy for field `fft_work`"] - pub struct FFT_WORK_W<'a> { - w: &'a mut W, - } - impl<'a> FFT_WORK_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - impl R { - #[doc = "Bit 0 - FFT done"] - #[inline(always)] - pub fn fft_done(&self) -> FFT_DONE_R { - FFT_DONE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - FFT work"] - #[inline(always)] - pub fn fft_work(&self) -> FFT_WORK_R { - FFT_WORK_R::new(((self.bits >> 1) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - FFT done"] - #[inline(always)] - pub fn fft_done(&mut self) -> FFT_DONE_W { - FFT_DONE_W { w: self } - } - #[doc = "Bit 1 - FFT work"] - #[inline(always)] - pub fn fft_work(&mut self) -> FFT_WORK_W { - FFT_WORK_W { w: self } - } - } - } - #[doc = "FFT output FIFO\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [output_fifo](output_fifo) module"] - pub type OUTPUT_FIFO = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _OUTPUT_FIFO; - #[doc = "`read()` method returns [output_fifo::R](output_fifo::R) reader structure"] - impl crate::Readable for OUTPUT_FIFO {} - #[doc = "`write(|w| ..)` method takes [output_fifo::W](output_fifo::W) writer structure"] - impl crate::Writable for OUTPUT_FIFO {} - #[doc = "FFT output FIFO"] - pub mod output_fifo { - #[doc = "Reader of register output_fifo"] - pub type R = crate::R; - #[doc = "Writer for register output_fifo"] - pub type W = crate::W; - #[doc = "Register output_fifo `reset()`'s with value 0"] - impl crate::ResetValue for super::OUTPUT_FIFO { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } -} -#[doc = "Direct Memory Access Controller"] -pub struct DMAC { - _marker: PhantomData<*const ()>, -} -unsafe impl Send for DMAC {} -impl DMAC { - #[doc = r"Returns a pointer to the register block"] - #[inline(always)] - pub const fn ptr() -> *const dmac::RegisterBlock { - 0x5000_0000 as *const _ - } -} -impl Deref for DMAC { - type Target = dmac::RegisterBlock; - fn deref(&self) -> &Self::Target { - unsafe { &*DMAC::ptr() } - } -} -#[doc = "Direct Memory Access Controller"] -pub mod dmac { - #[doc = r"Register block"] - #[repr(C)] - pub struct RegisterBlock { - #[doc = "0x00 - ID Register"] - pub id: ID, - #[doc = "0x08 - COMPVER Register"] - pub compver: COMPVER, - #[doc = "0x10 - Configure Register"] - pub cfg: CFG, - #[doc = "0x18 - Channel Enable Register"] - pub chen: CHEN, - _reserved4: [u8; 16usize], - #[doc = "0x30 - Interrupt Status Register"] - pub intstatus: INTSTATUS, - #[doc = "0x38 - Common Interrupt Clear Register"] - pub com_intclear: COM_INTCLEAR, - #[doc = "0x40 - Common Interrupt Status Enable Register"] - pub com_intstatus_en: COM_INTSTATUS_EN, - #[doc = "0x48 - Common Interrupt Signal Enable Register"] - pub com_intsignal_en: COM_INTSIGNAL_EN, - #[doc = "0x50 - Common Interrupt Status"] - pub com_intstatus: COM_INTSTATUS, - #[doc = "0x58 - Reset register"] - pub reset: RESET, - _reserved10: [u8; 160usize], - #[doc = "0x100 - Channel configuration"] - pub channel: [CHANNEL; 6], - } - #[doc = r"Register block"] - #[repr(C)] - pub struct CHANNEL { - #[doc = "0x00 - SAR Address Register"] - pub sar: self::channel::SAR, - #[doc = "0x08 - DAR Address Register"] - pub dar: self::channel::DAR, - #[doc = "0x10 - Block Transfer Size Register"] - pub block_ts: self::channel::BLOCK_TS, - #[doc = "0x18 - Control Register"] - pub ctl: self::channel::CTL, - #[doc = "0x20 - Configure Register"] - pub cfg: self::channel::CFG, - #[doc = "0x28 - Linked List Pointer register"] - pub llp: self::channel::LLP, - #[doc = "0x30 - Channel Status Register"] - pub status: self::channel::STATUS, - #[doc = "0x38 - Channel Software handshake Source Register"] - pub swhssrc: self::channel::SWHSSRC, - #[doc = "0x40 - Channel Software handshake Destination Register"] - pub swhsdst: self::channel::SWHSDST, - #[doc = "0x48 - Channel Block Transfer Resume Request Register"] - pub blk_tfr: self::channel::BLK_TFR, - #[doc = "0x50 - Channel AXI ID Register"] - pub axi_id: self::channel::AXI_ID, - #[doc = "0x58 - AXI QOS Register"] - pub axi_qos: self::channel::AXI_QOS, - _reserved12: [u8; 32usize], - #[doc = "0x80 - Interrupt Status Enable Register"] - pub intstatus_en: self::channel::INTSTATUS_EN, - #[doc = "0x88 - Channel Interrupt Status Register"] - pub intstatus: self::channel::INTSTATUS, - #[doc = "0x90 - Interrupt Signal Enable Register"] - pub intsignal_en: self::channel::INTSIGNAL_EN, - #[doc = "0x98 - Interrupt Clear Register"] - pub intclear: self::channel::INTCLEAR, - _reserved16: [u8; 88usize], - #[doc = "0xf8 - Padding to make structure size 256 bytes so that channels\\[\\] is an array"] - pub _reserved: self::channel::_RESERVED, - } - #[doc = r"Register block"] - #[doc = "Channel configuration"] - pub mod channel { - #[doc = "SAR Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sar](sar) module"] - pub type SAR = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _SAR; - #[doc = "`read()` method returns [sar::R](sar::R) reader structure"] - impl crate::Readable for SAR {} - #[doc = "`write(|w| ..)` method takes [sar::W](sar::W) writer structure"] - impl crate::Writable for SAR {} - #[doc = "SAR Address Register"] - pub mod sar { - #[doc = "Reader of register sar"] - pub type R = crate::R; - #[doc = "Writer for register sar"] - pub type W = crate::W; - #[doc = "Register sar `reset()`'s with value 0"] - impl crate::ResetValue for super::SAR { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } - #[doc = "DAR Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dar](dar) module"] - pub type DAR = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _DAR; - #[doc = "`read()` method returns [dar::R](dar::R) reader structure"] - impl crate::Readable for DAR {} - #[doc = "`write(|w| ..)` method takes [dar::W](dar::W) writer structure"] - impl crate::Writable for DAR {} - #[doc = "DAR Address Register"] - pub mod dar { - #[doc = "Reader of register dar"] - pub type R = crate::R; - #[doc = "Writer for register dar"] - pub type W = crate::W; - #[doc = "Register dar `reset()`'s with value 0"] - impl crate::ResetValue for super::DAR { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } - #[doc = "Block Transfer Size Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [block_ts](block_ts) module"] - pub type BLOCK_TS = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _BLOCK_TS; - #[doc = "`read()` method returns [block_ts::R](block_ts::R) reader structure"] - impl crate::Readable for BLOCK_TS {} - #[doc = "`write(|w| ..)` method takes [block_ts::W](block_ts::W) writer structure"] - impl crate::Writable for BLOCK_TS {} - #[doc = "Block Transfer Size Register"] - pub mod block_ts { - #[doc = "Reader of register block_ts"] - pub type R = crate::R; - #[doc = "Writer for register block_ts"] - pub type W = crate::W; - #[doc = "Register block_ts `reset()`'s with value 0"] - impl crate::ResetValue for super::BLOCK_TS { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `block_ts`"] - pub type BLOCK_TS_R = crate::R; - #[doc = "Write proxy for field `block_ts`"] - pub struct BLOCK_TS_W<'a> { - w: &'a mut W, - } - impl<'a> BLOCK_TS_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x003f_ffff) | ((value as u64) & 0x003f_ffff); - self.w - } - } - impl R { - #[doc = "Bits 0:21 - Block transfer size"] - #[inline(always)] - pub fn block_ts(&self) -> BLOCK_TS_R { - BLOCK_TS_R::new((self.bits & 0x003f_ffff) as u32) - } - } - impl W { - #[doc = "Bits 0:21 - Block transfer size"] - #[inline(always)] - pub fn block_ts(&mut self) -> BLOCK_TS_W { - BLOCK_TS_W { w: self } - } - } - } - #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ctl](ctl) module"] - pub type CTL = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _CTL; - #[doc = "`read()` method returns [ctl::R](ctl::R) reader structure"] - impl crate::Readable for CTL {} - #[doc = "`write(|w| ..)` method takes [ctl::W](ctl::W) writer structure"] - impl crate::Writable for CTL {} - #[doc = "Control Register"] - pub mod ctl { - #[doc = "Reader of register ctl"] - pub type R = crate::R; - #[doc = "Writer for register ctl"] - pub type W = crate::W; - #[doc = "Register ctl `reset()`'s with value 0"] - impl crate::ResetValue for super::CTL { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Source master select\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum SMS_A { - #[doc = "0: AXI master 1"] - AXI_MASTER_1, - #[doc = "1: AXI master 2"] - AXI_MASTER_2, - } - impl From for bool { - #[inline(always)] - fn from(variant: SMS_A) -> Self { - match variant { - SMS_A::AXI_MASTER_1 => false, - SMS_A::AXI_MASTER_2 => true, - } - } - } - #[doc = "Reader of field `sms`"] - pub type SMS_R = crate::R; - impl SMS_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> SMS_A { - match self.bits { - false => SMS_A::AXI_MASTER_1, - true => SMS_A::AXI_MASTER_2, - } - } - #[doc = "Checks if the value of the field is `AXI_MASTER_1`"] - #[inline(always)] - pub fn is_axi_master_1(&self) -> bool { - *self == SMS_A::AXI_MASTER_1 - } - #[doc = "Checks if the value of the field is `AXI_MASTER_2`"] - #[inline(always)] - pub fn is_axi_master_2(&self) -> bool { - *self == SMS_A::AXI_MASTER_2 - } - } - #[doc = "Write proxy for field `sms`"] - pub struct SMS_W<'a> { - w: &'a mut W, - } - impl<'a> SMS_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: SMS_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "AXI master 1"] - #[inline(always)] - pub fn axi_master_1(self) -> &'a mut W { - self.variant(SMS_A::AXI_MASTER_1) - } - #[doc = "AXI master 2"] - #[inline(always)] - pub fn axi_master_2(self) -> &'a mut W { - self.variant(SMS_A::AXI_MASTER_2) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Destination master select"] - pub type DMS_A = SMS_A; - #[doc = "Reader of field `dms`"] - pub type DMS_R = crate::R; - #[doc = "Write proxy for field `dms`"] - pub struct DMS_W<'a> { - w: &'a mut W, - } - impl<'a> DMS_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: DMS_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "AXI master 1"] - #[inline(always)] - pub fn axi_master_1(self) -> &'a mut W { - self.variant(SMS_A::AXI_MASTER_1) - } - #[doc = "AXI master 2"] - #[inline(always)] - pub fn axi_master_2(self) -> &'a mut W { - self.variant(SMS_A::AXI_MASTER_2) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - #[doc = "Source address increment\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum SINC_A { - #[doc = "0: Increment address"] - INCREMENT, - #[doc = "1: Don't increment address"] - NOCHANGE, - } - impl From for bool { - #[inline(always)] - fn from(variant: SINC_A) -> Self { - match variant { - SINC_A::INCREMENT => false, - SINC_A::NOCHANGE => true, - } - } - } - #[doc = "Reader of field `sinc`"] - pub type SINC_R = crate::R; - impl SINC_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> SINC_A { - match self.bits { - false => SINC_A::INCREMENT, - true => SINC_A::NOCHANGE, - } - } - #[doc = "Checks if the value of the field is `INCREMENT`"] - #[inline(always)] - pub fn is_increment(&self) -> bool { - *self == SINC_A::INCREMENT - } - #[doc = "Checks if the value of the field is `NOCHANGE`"] - #[inline(always)] - pub fn is_nochange(&self) -> bool { - *self == SINC_A::NOCHANGE - } - } - #[doc = "Write proxy for field `sinc`"] - pub struct SINC_W<'a> { - w: &'a mut W, - } - impl<'a> SINC_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: SINC_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Increment address"] - #[inline(always)] - pub fn increment(self) -> &'a mut W { - self.variant(SINC_A::INCREMENT) - } - #[doc = "Don't increment address"] - #[inline(always)] - pub fn nochange(self) -> &'a mut W { - self.variant(SINC_A::NOCHANGE) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); - self.w - } - } - #[doc = "Destination address increment"] - pub type DINC_A = SINC_A; - #[doc = "Reader of field `dinc`"] - pub type DINC_R = crate::R; - #[doc = "Write proxy for field `dinc`"] - pub struct DINC_W<'a> { - w: &'a mut W, - } - impl<'a> DINC_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: DINC_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Increment address"] - #[inline(always)] - pub fn increment(self) -> &'a mut W { - self.variant(SINC_A::INCREMENT) - } - #[doc = "Don't increment address"] - #[inline(always)] - pub fn nochange(self) -> &'a mut W { - self.variant(SINC_A::NOCHANGE) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u64) & 0x01) << 6); - self.w - } - } - #[doc = "Source transfer width\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum SRC_TR_WIDTH_A { - #[doc = "0: 8 bits"] - WIDTH_8, - #[doc = "1: 16 bits"] - WIDTH_16, - #[doc = "2: 32 bits"] - WIDTH_32, - #[doc = "3: 64 bits"] - WIDTH_64, - #[doc = "4: 128 bits"] - WIDTH_128, - #[doc = "5: 256 bits"] - WIDTH_256, - #[doc = "6: 512 bits"] - WIDTH_512, - } - impl From for u8 { - #[inline(always)] - fn from(variant: SRC_TR_WIDTH_A) -> Self { - match variant { - SRC_TR_WIDTH_A::WIDTH_8 => 0, - SRC_TR_WIDTH_A::WIDTH_16 => 1, - SRC_TR_WIDTH_A::WIDTH_32 => 2, - SRC_TR_WIDTH_A::WIDTH_64 => 3, - SRC_TR_WIDTH_A::WIDTH_128 => 4, - SRC_TR_WIDTH_A::WIDTH_256 => 5, - SRC_TR_WIDTH_A::WIDTH_512 => 6, - } - } - } - #[doc = "Reader of field `src_tr_width`"] - pub type SRC_TR_WIDTH_R = crate::R; - impl SRC_TR_WIDTH_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> crate::Variant { - use crate::Variant::*; - match self.bits { - 0 => Val(SRC_TR_WIDTH_A::WIDTH_8), - 1 => Val(SRC_TR_WIDTH_A::WIDTH_16), - 2 => Val(SRC_TR_WIDTH_A::WIDTH_32), - 3 => Val(SRC_TR_WIDTH_A::WIDTH_64), - 4 => Val(SRC_TR_WIDTH_A::WIDTH_128), - 5 => Val(SRC_TR_WIDTH_A::WIDTH_256), - 6 => Val(SRC_TR_WIDTH_A::WIDTH_512), - i => Res(i), - } - } - #[doc = "Checks if the value of the field is `WIDTH_8`"] - #[inline(always)] - pub fn is_width_8(&self) -> bool { - *self == SRC_TR_WIDTH_A::WIDTH_8 - } - #[doc = "Checks if the value of the field is `WIDTH_16`"] - #[inline(always)] - pub fn is_width_16(&self) -> bool { - *self == SRC_TR_WIDTH_A::WIDTH_16 - } - #[doc = "Checks if the value of the field is `WIDTH_32`"] - #[inline(always)] - pub fn is_width_32(&self) -> bool { - *self == SRC_TR_WIDTH_A::WIDTH_32 - } - #[doc = "Checks if the value of the field is `WIDTH_64`"] - #[inline(always)] - pub fn is_width_64(&self) -> bool { - *self == SRC_TR_WIDTH_A::WIDTH_64 - } - #[doc = "Checks if the value of the field is `WIDTH_128`"] - #[inline(always)] - pub fn is_width_128(&self) -> bool { - *self == SRC_TR_WIDTH_A::WIDTH_128 - } - #[doc = "Checks if the value of the field is `WIDTH_256`"] - #[inline(always)] - pub fn is_width_256(&self) -> bool { - *self == SRC_TR_WIDTH_A::WIDTH_256 - } - #[doc = "Checks if the value of the field is `WIDTH_512`"] - #[inline(always)] - pub fn is_width_512(&self) -> bool { - *self == SRC_TR_WIDTH_A::WIDTH_512 - } - } - #[doc = "Write proxy for field `src_tr_width`"] - pub struct SRC_TR_WIDTH_W<'a> { - w: &'a mut W, - } - impl<'a> SRC_TR_WIDTH_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: SRC_TR_WIDTH_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "8 bits"] - #[inline(always)] - pub fn width_8(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_8) - } - #[doc = "16 bits"] - #[inline(always)] - pub fn width_16(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_16) - } - #[doc = "32 bits"] - #[inline(always)] - pub fn width_32(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_32) - } - #[doc = "64 bits"] - #[inline(always)] - pub fn width_64(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_64) - } - #[doc = "128 bits"] - #[inline(always)] - pub fn width_128(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_128) - } - #[doc = "256 bits"] - #[inline(always)] - pub fn width_256(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_256) - } - #[doc = "512 bits"] - #[inline(always)] - pub fn width_512(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_512) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u64) & 0x07) << 8); - self.w - } - } - #[doc = "Destination transfer width"] - pub type DST_TR_WIDTH_A = SRC_TR_WIDTH_A; - #[doc = "Reader of field `dst_tr_width`"] - pub type DST_TR_WIDTH_R = crate::R; - #[doc = "Write proxy for field `dst_tr_width`"] - pub struct DST_TR_WIDTH_W<'a> { - w: &'a mut W, - } - impl<'a> DST_TR_WIDTH_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: DST_TR_WIDTH_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "8 bits"] - #[inline(always)] - pub fn width_8(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_8) - } - #[doc = "16 bits"] - #[inline(always)] - pub fn width_16(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_16) - } - #[doc = "32 bits"] - #[inline(always)] - pub fn width_32(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_32) - } - #[doc = "64 bits"] - #[inline(always)] - pub fn width_64(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_64) - } - #[doc = "128 bits"] - #[inline(always)] - pub fn width_128(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_128) - } - #[doc = "256 bits"] - #[inline(always)] - pub fn width_256(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_256) - } - #[doc = "512 bits"] - #[inline(always)] - pub fn width_512(self) -> &'a mut W { - self.variant(SRC_TR_WIDTH_A::WIDTH_512) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 11)) | (((value as u64) & 0x07) << 11); - self.w - } - } - #[doc = "Source burst transaction length\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum SRC_MSIZE_A { - #[doc = "0: 1 data item"] - LENGTH_1, - #[doc = "1: 4 data items"] - LENGTH_4, - #[doc = "2: 8 data items"] - LENGTH_8, - #[doc = "3: 16 data items"] - LENGTH_16, - #[doc = "4: 32 data items"] - LENGTH_32, - #[doc = "5: 64 data items"] - LENGTH_64, - #[doc = "6: 128 data items"] - LENGTH_128, - #[doc = "7: 256 data items"] - LENGTH_256, - #[doc = "8: 512 data items"] - LENGTH_512, - #[doc = "9: 1024 data items"] - LENGTH_1024, - } - impl From for u8 { - #[inline(always)] - fn from(variant: SRC_MSIZE_A) -> Self { - match variant { - SRC_MSIZE_A::LENGTH_1 => 0, - SRC_MSIZE_A::LENGTH_4 => 1, - SRC_MSIZE_A::LENGTH_8 => 2, - SRC_MSIZE_A::LENGTH_16 => 3, - SRC_MSIZE_A::LENGTH_32 => 4, - SRC_MSIZE_A::LENGTH_64 => 5, - SRC_MSIZE_A::LENGTH_128 => 6, - SRC_MSIZE_A::LENGTH_256 => 7, - SRC_MSIZE_A::LENGTH_512 => 8, - SRC_MSIZE_A::LENGTH_1024 => 9, - } - } - } - #[doc = "Reader of field `src_msize`"] - pub type SRC_MSIZE_R = crate::R; - impl SRC_MSIZE_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> crate::Variant { - use crate::Variant::*; - match self.bits { - 0 => Val(SRC_MSIZE_A::LENGTH_1), - 1 => Val(SRC_MSIZE_A::LENGTH_4), - 2 => Val(SRC_MSIZE_A::LENGTH_8), - 3 => Val(SRC_MSIZE_A::LENGTH_16), - 4 => Val(SRC_MSIZE_A::LENGTH_32), - 5 => Val(SRC_MSIZE_A::LENGTH_64), - 6 => Val(SRC_MSIZE_A::LENGTH_128), - 7 => Val(SRC_MSIZE_A::LENGTH_256), - 8 => Val(SRC_MSIZE_A::LENGTH_512), - 9 => Val(SRC_MSIZE_A::LENGTH_1024), - i => Res(i), - } - } - #[doc = "Checks if the value of the field is `LENGTH_1`"] - #[inline(always)] - pub fn is_length_1(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_1 - } - #[doc = "Checks if the value of the field is `LENGTH_4`"] - #[inline(always)] - pub fn is_length_4(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_4 - } - #[doc = "Checks if the value of the field is `LENGTH_8`"] - #[inline(always)] - pub fn is_length_8(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_8 - } - #[doc = "Checks if the value of the field is `LENGTH_16`"] - #[inline(always)] - pub fn is_length_16(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_16 - } - #[doc = "Checks if the value of the field is `LENGTH_32`"] - #[inline(always)] - pub fn is_length_32(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_32 - } - #[doc = "Checks if the value of the field is `LENGTH_64`"] - #[inline(always)] - pub fn is_length_64(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_64 - } - #[doc = "Checks if the value of the field is `LENGTH_128`"] - #[inline(always)] - pub fn is_length_128(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_128 - } - #[doc = "Checks if the value of the field is `LENGTH_256`"] - #[inline(always)] - pub fn is_length_256(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_256 - } - #[doc = "Checks if the value of the field is `LENGTH_512`"] - #[inline(always)] - pub fn is_length_512(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_512 - } - #[doc = "Checks if the value of the field is `LENGTH_1024`"] - #[inline(always)] - pub fn is_length_1024(&self) -> bool { - *self == SRC_MSIZE_A::LENGTH_1024 - } - } - #[doc = "Write proxy for field `src_msize`"] - pub struct SRC_MSIZE_W<'a> { - w: &'a mut W, - } - impl<'a> SRC_MSIZE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: SRC_MSIZE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "1 data item"] - #[inline(always)] - pub fn length_1(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_1) - } - #[doc = "4 data items"] - #[inline(always)] - pub fn length_4(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_4) - } - #[doc = "8 data items"] - #[inline(always)] - pub fn length_8(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_8) - } - #[doc = "16 data items"] - #[inline(always)] - pub fn length_16(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_16) - } - #[doc = "32 data items"] - #[inline(always)] - pub fn length_32(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_32) - } - #[doc = "64 data items"] - #[inline(always)] - pub fn length_64(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_64) - } - #[doc = "128 data items"] - #[inline(always)] - pub fn length_128(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_128) - } - #[doc = "256 data items"] - #[inline(always)] - pub fn length_256(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_256) - } - #[doc = "512 data items"] - #[inline(always)] - pub fn length_512(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_512) - } - #[doc = "1024 data items"] - #[inline(always)] - pub fn length_1024(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_1024) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 14)) | (((value as u64) & 0x0f) << 14); - self.w - } - } - #[doc = "Destination burst transaction length"] - pub type DST_MSIZE_A = SRC_MSIZE_A; - #[doc = "Reader of field `dst_msize`"] - pub type DST_MSIZE_R = crate::R; - #[doc = "Write proxy for field `dst_msize`"] - pub struct DST_MSIZE_W<'a> { - w: &'a mut W, - } - impl<'a> DST_MSIZE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: DST_MSIZE_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "1 data item"] - #[inline(always)] - pub fn length_1(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_1) - } - #[doc = "4 data items"] - #[inline(always)] - pub fn length_4(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_4) - } - #[doc = "8 data items"] - #[inline(always)] - pub fn length_8(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_8) - } - #[doc = "16 data items"] - #[inline(always)] - pub fn length_16(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_16) - } - #[doc = "32 data items"] - #[inline(always)] - pub fn length_32(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_32) - } - #[doc = "64 data items"] - #[inline(always)] - pub fn length_64(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_64) - } - #[doc = "128 data items"] - #[inline(always)] - pub fn length_128(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_128) - } - #[doc = "256 data items"] - #[inline(always)] - pub fn length_256(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_256) - } - #[doc = "512 data items"] - #[inline(always)] - pub fn length_512(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_512) - } - #[doc = "1024 data items"] - #[inline(always)] - pub fn length_1024(self) -> &'a mut W { - self.variant(SRC_MSIZE_A::LENGTH_1024) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 18)) | (((value as u64) & 0x0f) << 18); - self.w - } - } - #[doc = "Reader of field `nonposted_lastwrite_en`"] - pub type NONPOSTED_LASTWRITE_EN_R = crate::R; - #[doc = "Write proxy for field `nonposted_lastwrite_en`"] - pub struct NONPOSTED_LASTWRITE_EN_W<'a> { - w: &'a mut W, - } - impl<'a> NONPOSTED_LASTWRITE_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u64) & 0x01) << 30); - self.w - } - } - #[doc = "Reader of field `arlen_en`"] - pub type ARLEN_EN_R = crate::R; - #[doc = "Write proxy for field `arlen_en`"] - pub struct ARLEN_EN_W<'a> { - w: &'a mut W, - } - impl<'a> ARLEN_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 38)) | (((value as u64) & 0x01) << 38); - self.w - } - } - #[doc = "Reader of field `arlen`"] - pub type ARLEN_R = crate::R; - #[doc = "Write proxy for field `arlen`"] - pub struct ARLEN_W<'a> { - w: &'a mut W, - } - impl<'a> ARLEN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 39)) | (((value as u64) & 0xff) << 39); - self.w - } - } - #[doc = "Reader of field `awlen_en`"] - pub type AWLEN_EN_R = crate::R; - #[doc = "Write proxy for field `awlen_en`"] - pub struct AWLEN_EN_W<'a> { - w: &'a mut W, - } - impl<'a> AWLEN_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 47)) | (((value as u64) & 0x01) << 47); - self.w - } - } - #[doc = "Reader of field `awlen`"] - pub type AWLEN_R = crate::R; - #[doc = "Write proxy for field `awlen`"] - pub struct AWLEN_W<'a> { - w: &'a mut W, - } - impl<'a> AWLEN_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0xff << 48)) | (((value as u64) & 0xff) << 48); - self.w - } - } - #[doc = "Reader of field `src_stat_en`"] - pub type SRC_STAT_EN_R = crate::R; - #[doc = "Write proxy for field `src_stat_en`"] - pub struct SRC_STAT_EN_W<'a> { - w: &'a mut W, - } - impl<'a> SRC_STAT_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 56)) | (((value as u64) & 0x01) << 56); - self.w - } - } - #[doc = "Reader of field `dst_stat_en`"] - pub type DST_STAT_EN_R = crate::R; - #[doc = "Write proxy for field `dst_stat_en`"] - pub struct DST_STAT_EN_W<'a> { - w: &'a mut W, - } - impl<'a> DST_STAT_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 57)) | (((value as u64) & 0x01) << 57); - self.w - } - } - #[doc = "Reader of field `ioc_blktfr`"] - pub type IOC_BLKTFR_R = crate::R; - #[doc = "Write proxy for field `ioc_blktfr`"] - pub struct IOC_BLKTFR_W<'a> { - w: &'a mut W, - } - impl<'a> IOC_BLKTFR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 58)) | (((value as u64) & 0x01) << 58); - self.w - } - } - #[doc = "Reader of field `shadowreg_or_lli_last`"] - pub type SHADOWREG_OR_LLI_LAST_R = crate::R; - #[doc = "Write proxy for field `shadowreg_or_lli_last`"] - pub struct SHADOWREG_OR_LLI_LAST_W<'a> { - w: &'a mut W, - } - impl<'a> SHADOWREG_OR_LLI_LAST_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 62)) | (((value as u64) & 0x01) << 62); - self.w - } - } - #[doc = "Reader of field `shadowreg_or_lli_valid`"] - pub type SHADOWREG_OR_LLI_VALID_R = crate::R; - #[doc = "Write proxy for field `shadowreg_or_lli_valid`"] - pub struct SHADOWREG_OR_LLI_VALID_W<'a> { - w: &'a mut W, - } - impl<'a> SHADOWREG_OR_LLI_VALID_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 63)) | (((value as u64) & 0x01) << 63); - self.w - } - } - impl R { - #[doc = "Bit 0 - Source master select"] - #[inline(always)] - pub fn sms(&self) -> SMS_R { - SMS_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 2 - Destination master select"] - #[inline(always)] - pub fn dms(&self) -> DMS_R { - DMS_R::new(((self.bits >> 2) & 0x01) != 0) - } - #[doc = "Bit 4 - Source address increment"] - #[inline(always)] - pub fn sinc(&self) -> SINC_R { - SINC_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 6 - Destination address increment"] - #[inline(always)] - pub fn dinc(&self) -> DINC_R { - DINC_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bits 8:10 - Source transfer width"] - #[inline(always)] - pub fn src_tr_width(&self) -> SRC_TR_WIDTH_R { - SRC_TR_WIDTH_R::new(((self.bits >> 8) & 0x07) as u8) - } - #[doc = "Bits 11:13 - Destination transfer width"] - #[inline(always)] - pub fn dst_tr_width(&self) -> DST_TR_WIDTH_R { - DST_TR_WIDTH_R::new(((self.bits >> 11) & 0x07) as u8) - } - #[doc = "Bits 14:17 - Source burst transaction length"] - #[inline(always)] - pub fn src_msize(&self) -> SRC_MSIZE_R { - SRC_MSIZE_R::new(((self.bits >> 14) & 0x0f) as u8) - } - #[doc = "Bits 18:21 - Destination burst transaction length"] - #[inline(always)] - pub fn dst_msize(&self) -> DST_MSIZE_R { - DST_MSIZE_R::new(((self.bits >> 18) & 0x0f) as u8) - } - #[doc = "Bit 30 - Non Posted Last Write Enable (posted writes may be used till the end of the block)"] - #[inline(always)] - pub fn nonposted_lastwrite_en(&self) -> NONPOSTED_LASTWRITE_EN_R { - NONPOSTED_LASTWRITE_EN_R::new(((self.bits >> 30) & 0x01) != 0) - } - #[doc = "Bit 38 - Source burst length enable"] - #[inline(always)] - pub fn arlen_en(&self) -> ARLEN_EN_R { - ARLEN_EN_R::new(((self.bits >> 38) & 0x01) != 0) - } - #[doc = "Bits 39:46 - Source burst length"] - #[inline(always)] - pub fn arlen(&self) -> ARLEN_R { - ARLEN_R::new(((self.bits >> 39) & 0xff) as u8) - } - #[doc = "Bit 47 - Destination burst length enable"] - #[inline(always)] - pub fn awlen_en(&self) -> AWLEN_EN_R { - AWLEN_EN_R::new(((self.bits >> 47) & 0x01) != 0) - } - #[doc = "Bits 48:55 - Destination burst length"] - #[inline(always)] - pub fn awlen(&self) -> AWLEN_R { - AWLEN_R::new(((self.bits >> 48) & 0xff) as u8) - } - #[doc = "Bit 56 - Source status enable"] - #[inline(always)] - pub fn src_stat_en(&self) -> SRC_STAT_EN_R { - SRC_STAT_EN_R::new(((self.bits >> 56) & 0x01) != 0) - } - #[doc = "Bit 57 - Destination status enable"] - #[inline(always)] - pub fn dst_stat_en(&self) -> DST_STAT_EN_R { - DST_STAT_EN_R::new(((self.bits >> 57) & 0x01) != 0) - } - #[doc = "Bit 58 - Interrupt completion of block transfer"] - #[inline(always)] - pub fn ioc_blktfr(&self) -> IOC_BLKTFR_R { - IOC_BLKTFR_R::new(((self.bits >> 58) & 0x01) != 0) - } - #[doc = "Bit 62 - Last shadow linked list item (indicates shadowreg/LLI content is the last one)"] - #[inline(always)] - pub fn shadowreg_or_lli_last(&self) -> SHADOWREG_OR_LLI_LAST_R { - SHADOWREG_OR_LLI_LAST_R::new(((self.bits >> 62) & 0x01) != 0) - } - #[doc = "Bit 63 - last shadow linked list item valid (indicate shadowreg/LLI content is valid)"] - #[inline(always)] - pub fn shadowreg_or_lli_valid(&self) -> SHADOWREG_OR_LLI_VALID_R { - SHADOWREG_OR_LLI_VALID_R::new(((self.bits >> 63) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Source master select"] - #[inline(always)] - pub fn sms(&mut self) -> SMS_W { - SMS_W { w: self } - } - #[doc = "Bit 2 - Destination master select"] - #[inline(always)] - pub fn dms(&mut self) -> DMS_W { - DMS_W { w: self } - } - #[doc = "Bit 4 - Source address increment"] - #[inline(always)] - pub fn sinc(&mut self) -> SINC_W { - SINC_W { w: self } - } - #[doc = "Bit 6 - Destination address increment"] - #[inline(always)] - pub fn dinc(&mut self) -> DINC_W { - DINC_W { w: self } - } - #[doc = "Bits 8:10 - Source transfer width"] - #[inline(always)] - pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { - SRC_TR_WIDTH_W { w: self } - } - #[doc = "Bits 11:13 - Destination transfer width"] - #[inline(always)] - pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { - DST_TR_WIDTH_W { w: self } - } - #[doc = "Bits 14:17 - Source burst transaction length"] - #[inline(always)] - pub fn src_msize(&mut self) -> SRC_MSIZE_W { - SRC_MSIZE_W { w: self } - } - #[doc = "Bits 18:21 - Destination burst transaction length"] - #[inline(always)] - pub fn dst_msize(&mut self) -> DST_MSIZE_W { - DST_MSIZE_W { w: self } - } - #[doc = "Bit 30 - Non Posted Last Write Enable (posted writes may be used till the end of the block)"] - #[inline(always)] - pub fn nonposted_lastwrite_en(&mut self) -> NONPOSTED_LASTWRITE_EN_W { - NONPOSTED_LASTWRITE_EN_W { w: self } - } - #[doc = "Bit 38 - Source burst length enable"] - #[inline(always)] - pub fn arlen_en(&mut self) -> ARLEN_EN_W { - ARLEN_EN_W { w: self } - } - #[doc = "Bits 39:46 - Source burst length"] - #[inline(always)] - pub fn arlen(&mut self) -> ARLEN_W { - ARLEN_W { w: self } - } - #[doc = "Bit 47 - Destination burst length enable"] - #[inline(always)] - pub fn awlen_en(&mut self) -> AWLEN_EN_W { - AWLEN_EN_W { w: self } - } - #[doc = "Bits 48:55 - Destination burst length"] - #[inline(always)] - pub fn awlen(&mut self) -> AWLEN_W { - AWLEN_W { w: self } - } - #[doc = "Bit 56 - Source status enable"] - #[inline(always)] - pub fn src_stat_en(&mut self) -> SRC_STAT_EN_W { - SRC_STAT_EN_W { w: self } - } - #[doc = "Bit 57 - Destination status enable"] - #[inline(always)] - pub fn dst_stat_en(&mut self) -> DST_STAT_EN_W { - DST_STAT_EN_W { w: self } - } - #[doc = "Bit 58 - Interrupt completion of block transfer"] - #[inline(always)] - pub fn ioc_blktfr(&mut self) -> IOC_BLKTFR_W { - IOC_BLKTFR_W { w: self } - } - #[doc = "Bit 62 - Last shadow linked list item (indicates shadowreg/LLI content is the last one)"] - #[inline(always)] - pub fn shadowreg_or_lli_last(&mut self) -> SHADOWREG_OR_LLI_LAST_W { - SHADOWREG_OR_LLI_LAST_W { w: self } - } - #[doc = "Bit 63 - last shadow linked list item valid (indicate shadowreg/LLI content is valid)"] - #[inline(always)] - pub fn shadowreg_or_lli_valid(&mut self) -> SHADOWREG_OR_LLI_VALID_W { - SHADOWREG_OR_LLI_VALID_W { w: self } - } - } - } - #[doc = "Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] - pub type CFG = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _CFG; - #[doc = "`read()` method returns [cfg::R](cfg::R) reader structure"] - impl crate::Readable for CFG {} - #[doc = "`write(|w| ..)` method takes [cfg::W](cfg::W) writer structure"] - impl crate::Writable for CFG {} - #[doc = "Configure Register"] - pub mod cfg { - #[doc = "Reader of register cfg"] - pub type R = crate::R; - #[doc = "Writer for register cfg"] - pub type W = crate::W; - #[doc = "Register cfg `reset()`'s with value 0"] - impl crate::ResetValue for super::CFG { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Source multi-block transfer type\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum SRC_MULTBLK_TYPE_A { - #[doc = "0: Continuous multi-block type"] - CONTIGUOUS, - #[doc = "1: Reload multi-block type"] - RELOAD, - #[doc = "2: Shadow register based multi-block type"] - SHADOW_REGISTER, - #[doc = "3: Linked list based multi-block type"] - LINKED_LIST, - } - impl From for u8 { - #[inline(always)] - fn from(variant: SRC_MULTBLK_TYPE_A) -> Self { - match variant { - SRC_MULTBLK_TYPE_A::CONTIGUOUS => 0, - SRC_MULTBLK_TYPE_A::RELOAD => 1, - SRC_MULTBLK_TYPE_A::SHADOW_REGISTER => 2, - SRC_MULTBLK_TYPE_A::LINKED_LIST => 3, - } - } - } - #[doc = "Reader of field `src_multblk_type`"] - pub type SRC_MULTBLK_TYPE_R = crate::R; - impl SRC_MULTBLK_TYPE_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> SRC_MULTBLK_TYPE_A { - match self.bits { - 0 => SRC_MULTBLK_TYPE_A::CONTIGUOUS, - 1 => SRC_MULTBLK_TYPE_A::RELOAD, - 2 => SRC_MULTBLK_TYPE_A::SHADOW_REGISTER, - 3 => SRC_MULTBLK_TYPE_A::LINKED_LIST, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `CONTIGUOUS`"] - #[inline(always)] - pub fn is_contiguous(&self) -> bool { - *self == SRC_MULTBLK_TYPE_A::CONTIGUOUS - } - #[doc = "Checks if the value of the field is `RELOAD`"] - #[inline(always)] - pub fn is_reload(&self) -> bool { - *self == SRC_MULTBLK_TYPE_A::RELOAD - } - #[doc = "Checks if the value of the field is `SHADOW_REGISTER`"] - #[inline(always)] - pub fn is_shadow_register(&self) -> bool { - *self == SRC_MULTBLK_TYPE_A::SHADOW_REGISTER - } - #[doc = "Checks if the value of the field is `LINKED_LIST`"] - #[inline(always)] - pub fn is_linked_list(&self) -> bool { - *self == SRC_MULTBLK_TYPE_A::LINKED_LIST - } - } - #[doc = "Write proxy for field `src_multblk_type`"] - pub struct SRC_MULTBLK_TYPE_W<'a> { - w: &'a mut W, - } - impl<'a> SRC_MULTBLK_TYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: SRC_MULTBLK_TYPE_A) -> &'a mut W { - { - self.bits(variant.into()) - } - } - #[doc = "Continuous multi-block type"] - #[inline(always)] - pub fn contiguous(self) -> &'a mut W { - self.variant(SRC_MULTBLK_TYPE_A::CONTIGUOUS) - } - #[doc = "Reload multi-block type"] - #[inline(always)] - pub fn reload(self) -> &'a mut W { - self.variant(SRC_MULTBLK_TYPE_A::RELOAD) - } - #[doc = "Shadow register based multi-block type"] - #[inline(always)] - pub fn shadow_register(self) -> &'a mut W { - self.variant(SRC_MULTBLK_TYPE_A::SHADOW_REGISTER) - } - #[doc = "Linked list based multi-block type"] - #[inline(always)] - pub fn linked_list(self) -> &'a mut W { - self.variant(SRC_MULTBLK_TYPE_A::LINKED_LIST) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x03) | ((value as u64) & 0x03); - self.w - } - } - #[doc = "Destination multi-block transfer type"] - pub type DST_MULTBLK_TYPE_A = SRC_MULTBLK_TYPE_A; - #[doc = "Reader of field `dst_multblk_type`"] - pub type DST_MULTBLK_TYPE_R = crate::R; - #[doc = "Write proxy for field `dst_multblk_type`"] - pub struct DST_MULTBLK_TYPE_W<'a> { - w: &'a mut W, - } - impl<'a> DST_MULTBLK_TYPE_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: DST_MULTBLK_TYPE_A) -> &'a mut W { - { - self.bits(variant.into()) - } - } - #[doc = "Continuous multi-block type"] - #[inline(always)] - pub fn contiguous(self) -> &'a mut W { - self.variant(SRC_MULTBLK_TYPE_A::CONTIGUOUS) - } - #[doc = "Reload multi-block type"] - #[inline(always)] - pub fn reload(self) -> &'a mut W { - self.variant(SRC_MULTBLK_TYPE_A::RELOAD) - } - #[doc = "Shadow register based multi-block type"] - #[inline(always)] - pub fn shadow_register(self) -> &'a mut W { - self.variant(SRC_MULTBLK_TYPE_A::SHADOW_REGISTER) - } - #[doc = "Linked list based multi-block type"] - #[inline(always)] - pub fn linked_list(self) -> &'a mut W { - self.variant(SRC_MULTBLK_TYPE_A::LINKED_LIST) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u64) & 0x03) << 2); - self.w - } - } - #[doc = "Transfer type and flow control\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum TT_FC_A { - #[doc = "0: Transfer memory to memory and flow controller is DMAC"] - MEM2MEM_DMA, - #[doc = "1: Transfer memory to peripheral and flow controller is DMAC"] - MEM2PRF_DMA, - #[doc = "2: Transfer peripheral to memory and flow controller is DMAC"] - PRF2MEM_DMA, - #[doc = "3: Transfer peripheral to peripheral and flow controller is DMAC"] - PRF2PRF_DMA, - #[doc = "4: Transfer peripheral to memory and flow controller is source peripheral"] - PRF2MEM_PRF, - #[doc = "5: Transfer peripheral to peripheral and flow controller is source peripheral"] - PRF2PRF_SRCPRF, - #[doc = "6: Transfer memory to peripheral and flow controller is destination peripheral"] - MEM2PRF_PRF, - #[doc = "7: Transfer peripheral to peripheral and flow controller is destination peripheral"] - PRF2PRF_DSTPRF, - } - impl From for u8 { - #[inline(always)] - fn from(variant: TT_FC_A) -> Self { - match variant { - TT_FC_A::MEM2MEM_DMA => 0, - TT_FC_A::MEM2PRF_DMA => 1, - TT_FC_A::PRF2MEM_DMA => 2, - TT_FC_A::PRF2PRF_DMA => 3, - TT_FC_A::PRF2MEM_PRF => 4, - TT_FC_A::PRF2PRF_SRCPRF => 5, - TT_FC_A::MEM2PRF_PRF => 6, - TT_FC_A::PRF2PRF_DSTPRF => 7, - } - } - } - #[doc = "Reader of field `tt_fc`"] - pub type TT_FC_R = crate::R; - impl TT_FC_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> TT_FC_A { - match self.bits { - 0 => TT_FC_A::MEM2MEM_DMA, - 1 => TT_FC_A::MEM2PRF_DMA, - 2 => TT_FC_A::PRF2MEM_DMA, - 3 => TT_FC_A::PRF2PRF_DMA, - 4 => TT_FC_A::PRF2MEM_PRF, - 5 => TT_FC_A::PRF2PRF_SRCPRF, - 6 => TT_FC_A::MEM2PRF_PRF, - 7 => TT_FC_A::PRF2PRF_DSTPRF, - _ => unreachable!(), - } - } - #[doc = "Checks if the value of the field is `MEM2MEM_DMA`"] - #[inline(always)] - pub fn is_mem2mem_dma(&self) -> bool { - *self == TT_FC_A::MEM2MEM_DMA - } - #[doc = "Checks if the value of the field is `MEM2PRF_DMA`"] - #[inline(always)] - pub fn is_mem2prf_dma(&self) -> bool { - *self == TT_FC_A::MEM2PRF_DMA - } - #[doc = "Checks if the value of the field is `PRF2MEM_DMA`"] - #[inline(always)] - pub fn is_prf2mem_dma(&self) -> bool { - *self == TT_FC_A::PRF2MEM_DMA - } - #[doc = "Checks if the value of the field is `PRF2PRF_DMA`"] - #[inline(always)] - pub fn is_prf2prf_dma(&self) -> bool { - *self == TT_FC_A::PRF2PRF_DMA - } - #[doc = "Checks if the value of the field is `PRF2MEM_PRF`"] - #[inline(always)] - pub fn is_prf2mem_prf(&self) -> bool { - *self == TT_FC_A::PRF2MEM_PRF - } - #[doc = "Checks if the value of the field is `PRF2PRF_SRCPRF`"] - #[inline(always)] - pub fn is_prf2prf_srcprf(&self) -> bool { - *self == TT_FC_A::PRF2PRF_SRCPRF - } - #[doc = "Checks if the value of the field is `MEM2PRF_PRF`"] - #[inline(always)] - pub fn is_mem2prf_prf(&self) -> bool { - *self == TT_FC_A::MEM2PRF_PRF - } - #[doc = "Checks if the value of the field is `PRF2PRF_DSTPRF`"] - #[inline(always)] - pub fn is_prf2prf_dstprf(&self) -> bool { - *self == TT_FC_A::PRF2PRF_DSTPRF - } - } - #[doc = "Write proxy for field `tt_fc`"] - pub struct TT_FC_W<'a> { - w: &'a mut W, - } - impl<'a> TT_FC_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: TT_FC_A) -> &'a mut W { - { - self.bits(variant.into()) - } - } - #[doc = "Transfer memory to memory and flow controller is DMAC"] - #[inline(always)] - pub fn mem2mem_dma(self) -> &'a mut W { - self.variant(TT_FC_A::MEM2MEM_DMA) - } - #[doc = "Transfer memory to peripheral and flow controller is DMAC"] - #[inline(always)] - pub fn mem2prf_dma(self) -> &'a mut W { - self.variant(TT_FC_A::MEM2PRF_DMA) - } - #[doc = "Transfer peripheral to memory and flow controller is DMAC"] - #[inline(always)] - pub fn prf2mem_dma(self) -> &'a mut W { - self.variant(TT_FC_A::PRF2MEM_DMA) - } - #[doc = "Transfer peripheral to peripheral and flow controller is DMAC"] - #[inline(always)] - pub fn prf2prf_dma(self) -> &'a mut W { - self.variant(TT_FC_A::PRF2PRF_DMA) - } - #[doc = "Transfer peripheral to memory and flow controller is source peripheral"] - #[inline(always)] - pub fn prf2mem_prf(self) -> &'a mut W { - self.variant(TT_FC_A::PRF2MEM_PRF) - } - #[doc = "Transfer peripheral to peripheral and flow controller is source peripheral"] - #[inline(always)] - pub fn prf2prf_srcprf(self) -> &'a mut W { - self.variant(TT_FC_A::PRF2PRF_SRCPRF) - } - #[doc = "Transfer memory to peripheral and flow controller is destination peripheral"] - #[inline(always)] - pub fn mem2prf_prf(self) -> &'a mut W { - self.variant(TT_FC_A::MEM2PRF_PRF) - } - #[doc = "Transfer peripheral to peripheral and flow controller is destination peripheral"] - #[inline(always)] - pub fn prf2prf_dstprf(self) -> &'a mut W { - self.variant(TT_FC_A::PRF2PRF_DSTPRF) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 32)) | (((value as u64) & 0x07) << 32); - self.w - } - } - #[doc = "Source software or hardware handshaking select\n\nValue on reset: 0"] - #[derive(Clone, Copy, Debug, PartialEq)] - pub enum HS_SEL_SRC_A { - #[doc = "0: Hardware handshaking is used"] - HARDWARE, - #[doc = "1: Software handshaking is used"] - SOFTWARE, - } - impl From for bool { - #[inline(always)] - fn from(variant: HS_SEL_SRC_A) -> Self { - match variant { - HS_SEL_SRC_A::HARDWARE => false, - HS_SEL_SRC_A::SOFTWARE => true, - } - } - } - #[doc = "Reader of field `hs_sel_src`"] - pub type HS_SEL_SRC_R = crate::R; - impl HS_SEL_SRC_R { - #[doc = r"Get enumerated values variant"] - #[inline(always)] - pub fn variant(&self) -> HS_SEL_SRC_A { - match self.bits { - false => HS_SEL_SRC_A::HARDWARE, - true => HS_SEL_SRC_A::SOFTWARE, - } - } - #[doc = "Checks if the value of the field is `HARDWARE`"] - #[inline(always)] - pub fn is_hardware(&self) -> bool { - *self == HS_SEL_SRC_A::HARDWARE - } - #[doc = "Checks if the value of the field is `SOFTWARE`"] - #[inline(always)] - pub fn is_software(&self) -> bool { - *self == HS_SEL_SRC_A::SOFTWARE - } - } - #[doc = "Write proxy for field `hs_sel_src`"] - pub struct HS_SEL_SRC_W<'a> { - w: &'a mut W, - } - impl<'a> HS_SEL_SRC_W<'a> { + impl<'a> SMS_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn variant(self, variant: HS_SEL_SRC_A) -> &'a mut W { + pub fn variant(self, variant: SMS_A) -> &'a mut W { { self.bit(variant.into()) } } - #[doc = "Hardware handshaking is used"] + #[doc = "AXI master 1"] #[inline(always)] - pub fn hardware(self) -> &'a mut W { - self.variant(HS_SEL_SRC_A::HARDWARE) + pub fn axi_master_1(self) -> &'a mut W { + self.variant(SMS_A::AXI_MASTER_1) } - #[doc = "Software handshaking is used"] + #[doc = "AXI master 2"] #[inline(always)] - pub fn software(self) -> &'a mut W { - self.variant(HS_SEL_SRC_A::SOFTWARE) + pub fn axi_master_2(self) -> &'a mut W { + self.variant(SMS_A::AXI_MASTER_2) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -24411,35 +11628,35 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 35)) | (((value as u64) & 0x01) << 35); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Destination software or hardware handshaking select"] - pub type HS_SEL_DST_A = HS_SEL_SRC_A; - #[doc = "Reader of field `hs_sel_dst`"] - pub type HS_SEL_DST_R = crate::R; - #[doc = "Write proxy for field `hs_sel_dst`"] - pub struct HS_SEL_DST_W<'a> { + #[doc = "Destination master select"] + pub type DMS_A = SMS_A; + #[doc = "Reader of field `dms`"] + pub type DMS_R = crate::R; + #[doc = "Write proxy for field `dms`"] + pub struct DMS_W<'a> { w: &'a mut W, } - impl<'a> HS_SEL_DST_W<'a> { + impl<'a> DMS_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn variant(self, variant: HS_SEL_DST_A) -> &'a mut W { + pub fn variant(self, variant: DMS_A) -> &'a mut W { { self.bit(variant.into()) } } - #[doc = "Hardware handshaking is used"] + #[doc = "AXI master 1"] #[inline(always)] - pub fn hardware(self) -> &'a mut W { - self.variant(HS_SEL_SRC_A::HARDWARE) + pub fn axi_master_1(self) -> &'a mut W { + self.variant(DMS_A::AXI_MASTER_1) } - #[doc = "Software handshaking is used"] + #[doc = "AXI master 2"] #[inline(always)] - pub fn software(self) -> &'a mut W { - self.variant(HS_SEL_SRC_A::SOFTWARE) + pub fn axi_master_2(self) -> &'a mut W { + self.variant(DMS_A::AXI_MASTER_2) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -24454,113 +11671,67 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 36)) | (((value as u64) & 0x01) << 36); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } - #[doc = "Source hardware handshaking interface polarity\n\nValue on reset: 0"] + #[doc = "Source address increment\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] - pub enum SRC_HWHS_POL_A { - #[doc = "0: Active high"] - ACTIVE_HIGH, - #[doc = "1: Active low"] - ACTIVE_LOW, + pub enum SINC_A { + #[doc = "0: Increment address"] + INCREMENT = 0, + #[doc = "1: Don't increment address"] + NOCHANGE = 1, } - impl From for bool { + impl From for bool { #[inline(always)] - fn from(variant: SRC_HWHS_POL_A) -> Self { - match variant { - SRC_HWHS_POL_A::ACTIVE_HIGH => false, - SRC_HWHS_POL_A::ACTIVE_LOW => true, - } + fn from(variant: SINC_A) -> Self { + variant as u8 != 0 } } - #[doc = "Reader of field `src_hwhs_pol`"] - pub type SRC_HWHS_POL_R = crate::R; - impl SRC_HWHS_POL_R { + #[doc = "Reader of field `sinc`"] + pub type SINC_R = crate::R; + impl SINC_R { #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> SRC_HWHS_POL_A { + pub fn variant(&self) -> SINC_A { match self.bits { - false => SRC_HWHS_POL_A::ACTIVE_HIGH, - true => SRC_HWHS_POL_A::ACTIVE_LOW, - } - } - #[doc = "Checks if the value of the field is `ACTIVE_HIGH`"] - #[inline(always)] - pub fn is_active_high(&self) -> bool { - *self == SRC_HWHS_POL_A::ACTIVE_HIGH - } - #[doc = "Checks if the value of the field is `ACTIVE_LOW`"] - #[inline(always)] - pub fn is_active_low(&self) -> bool { - *self == SRC_HWHS_POL_A::ACTIVE_LOW - } - } - #[doc = "Write proxy for field `src_hwhs_pol`"] - pub struct SRC_HWHS_POL_W<'a> { - w: &'a mut W, - } - impl<'a> SRC_HWHS_POL_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: SRC_HWHS_POL_A) -> &'a mut W { - { - self.bit(variant.into()) + false => SINC_A::INCREMENT, + true => SINC_A::NOCHANGE, } } - #[doc = "Active high"] - #[inline(always)] - pub fn active_high(self) -> &'a mut W { - self.variant(SRC_HWHS_POL_A::ACTIVE_HIGH) - } - #[doc = "Active low"] - #[inline(always)] - pub fn active_low(self) -> &'a mut W { - self.variant(SRC_HWHS_POL_A::ACTIVE_LOW) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] + #[doc = "Checks if the value of the field is `INCREMENT`"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn is_increment(&self) -> bool { + *self == SINC_A::INCREMENT } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `NOCHANGE`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 37)) | (((value as u64) & 0x01) << 37); - self.w + pub fn is_nochange(&self) -> bool { + *self == SINC_A::NOCHANGE } } - #[doc = "Destination hardware handshaking interface polarity"] - pub type DST_HWHS_POL_A = SRC_HWHS_POL_A; - #[doc = "Reader of field `dst_hwhs_pol`"] - pub type DST_HWHS_POL_R = crate::R; - #[doc = "Write proxy for field `dst_hwhs_pol`"] - pub struct DST_HWHS_POL_W<'a> { + #[doc = "Write proxy for field `sinc`"] + pub struct SINC_W<'a> { w: &'a mut W, } - impl<'a> DST_HWHS_POL_W<'a> { + impl<'a> SINC_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn variant(self, variant: DST_HWHS_POL_A) -> &'a mut W { + pub fn variant(self, variant: SINC_A) -> &'a mut W { { self.bit(variant.into()) } } - #[doc = "Active high"] + #[doc = "Increment address"] #[inline(always)] - pub fn active_high(self) -> &'a mut W { - self.variant(SRC_HWHS_POL_A::ACTIVE_HIGH) + pub fn increment(self) -> &'a mut W { + self.variant(SINC_A::INCREMENT) } - #[doc = "Active low"] + #[doc = "Don't increment address"] #[inline(always)] - pub fn active_low(self) -> &'a mut W { - self.variant(SRC_HWHS_POL_A::ACTIVE_LOW) + pub fn nochange(self) -> &'a mut W { + self.variant(SINC_A::NOCHANGE) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -24575,59 +11746,36 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 38)) | (((value as u64) & 0x01) << 38); + self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); self.w } } - #[doc = "Reader of field `src_per`"] - pub type SRC_PER_R = crate::R; - #[doc = "Write proxy for field `src_per`"] - pub struct SRC_PER_W<'a> { + #[doc = "Destination address increment"] + pub type DINC_A = SINC_A; + #[doc = "Reader of field `dinc`"] + pub type DINC_R = crate::R; + #[doc = "Write proxy for field `dinc`"] + pub struct DINC_W<'a> { w: &'a mut W, } - impl<'a> SRC_PER_W<'a> { - #[doc = r"Writes raw bits to the field"] + impl<'a> DINC_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 39)) | (((value as u64) & 0x0f) << 39); - self.w + pub fn variant(self, variant: DINC_A) -> &'a mut W { + { + self.bit(variant.into()) + } } - } - #[doc = "Reader of field `dst_per`"] - pub type DST_PER_R = crate::R; - #[doc = "Write proxy for field `dst_per`"] - pub struct DST_PER_W<'a> { - w: &'a mut W, - } - impl<'a> DST_PER_W<'a> { - #[doc = r"Writes raw bits to the field"] + #[doc = "Increment address"] #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 44)) | (((value as u64) & 0x0f) << 44); - self.w + pub fn increment(self) -> &'a mut W { + self.variant(DINC_A::INCREMENT) } - } - #[doc = "Reader of field `ch_prior`"] - pub type CH_PRIOR_R = crate::R; - #[doc = "Write proxy for field `ch_prior`"] - pub struct CH_PRIOR_W<'a> { - w: &'a mut W, - } - impl<'a> CH_PRIOR_W<'a> { - #[doc = r"Writes raw bits to the field"] + #[doc = "Don't increment address"] #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x07 << 49)) | (((value as u64) & 0x07) << 49); - self.w + pub fn nochange(self) -> &'a mut W { + self.variant(DINC_A::NOCHANGE) } - } - #[doc = "Reader of field `lock_ch`"] - pub type LOCK_CH_R = crate::R; - #[doc = "Write proxy for field `lock_ch`"] - pub struct LOCK_CH_W<'a> { - w: &'a mut W, - } - impl<'a> LOCK_CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -24641,314 +11789,445 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 52)) | (((value as u64) & 0x01) << 52); + self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u64) & 0x01) << 6); self.w } } - #[doc = "Channel lock level\n\nValue on reset: 0"] + #[doc = "Source transfer width\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] - pub enum LOCK_CH_L_A { - #[doc = "0: Duration of channel is locked for entire DMA transfer"] - DMA_TRANSFER, - #[doc = "1: Duration of channel is locked for current block transfer"] - BLOCK_TRANSFER, - #[doc = "2: Duration of channel is locked for current transaction"] - TRANSACTION, + #[repr(u8)] + pub enum SRC_TR_WIDTH_A { + #[doc = "0: 8 bits"] + WIDTH_8 = 0, + #[doc = "1: 16 bits"] + WIDTH_16 = 1, + #[doc = "2: 32 bits"] + WIDTH_32 = 2, + #[doc = "3: 64 bits"] + WIDTH_64 = 3, + #[doc = "4: 128 bits"] + WIDTH_128 = 4, + #[doc = "5: 256 bits"] + WIDTH_256 = 5, + #[doc = "6: 512 bits"] + WIDTH_512 = 6, } - impl From for u8 { + impl From for u8 { #[inline(always)] - fn from(variant: LOCK_CH_L_A) -> Self { - match variant { - LOCK_CH_L_A::DMA_TRANSFER => 0, - LOCK_CH_L_A::BLOCK_TRANSFER => 1, - LOCK_CH_L_A::TRANSACTION => 2, - } + fn from(variant: SRC_TR_WIDTH_A) -> Self { + variant as _ } } - #[doc = "Reader of field `lock_ch_l`"] - pub type LOCK_CH_L_R = crate::R; - impl LOCK_CH_L_R { + #[doc = "Reader of field `src_tr_width`"] + pub type SRC_TR_WIDTH_R = crate::R; + impl SRC_TR_WIDTH_R { #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> crate::Variant { + pub fn variant(&self) -> crate::Variant { use crate::Variant::*; match self.bits { - 0 => Val(LOCK_CH_L_A::DMA_TRANSFER), - 1 => Val(LOCK_CH_L_A::BLOCK_TRANSFER), - 2 => Val(LOCK_CH_L_A::TRANSACTION), + 0 => Val(SRC_TR_WIDTH_A::WIDTH_8), + 1 => Val(SRC_TR_WIDTH_A::WIDTH_16), + 2 => Val(SRC_TR_WIDTH_A::WIDTH_32), + 3 => Val(SRC_TR_WIDTH_A::WIDTH_64), + 4 => Val(SRC_TR_WIDTH_A::WIDTH_128), + 5 => Val(SRC_TR_WIDTH_A::WIDTH_256), + 6 => Val(SRC_TR_WIDTH_A::WIDTH_512), i => Res(i), } } - #[doc = "Checks if the value of the field is `DMA_TRANSFER`"] + #[doc = "Checks if the value of the field is `WIDTH_8`"] #[inline(always)] - pub fn is_dma_transfer(&self) -> bool { - *self == LOCK_CH_L_A::DMA_TRANSFER + pub fn is_width_8(&self) -> bool { + *self == SRC_TR_WIDTH_A::WIDTH_8 } - #[doc = "Checks if the value of the field is `BLOCK_TRANSFER`"] + #[doc = "Checks if the value of the field is `WIDTH_16`"] #[inline(always)] - pub fn is_block_transfer(&self) -> bool { - *self == LOCK_CH_L_A::BLOCK_TRANSFER + pub fn is_width_16(&self) -> bool { + *self == SRC_TR_WIDTH_A::WIDTH_16 } - #[doc = "Checks if the value of the field is `TRANSACTION`"] + #[doc = "Checks if the value of the field is `WIDTH_32`"] #[inline(always)] - pub fn is_transaction(&self) -> bool { - *self == LOCK_CH_L_A::TRANSACTION + pub fn is_width_32(&self) -> bool { + *self == SRC_TR_WIDTH_A::WIDTH_32 + } + #[doc = "Checks if the value of the field is `WIDTH_64`"] + #[inline(always)] + pub fn is_width_64(&self) -> bool { + *self == SRC_TR_WIDTH_A::WIDTH_64 + } + #[doc = "Checks if the value of the field is `WIDTH_128`"] + #[inline(always)] + pub fn is_width_128(&self) -> bool { + *self == SRC_TR_WIDTH_A::WIDTH_128 + } + #[doc = "Checks if the value of the field is `WIDTH_256`"] + #[inline(always)] + pub fn is_width_256(&self) -> bool { + *self == SRC_TR_WIDTH_A::WIDTH_256 + } + #[doc = "Checks if the value of the field is `WIDTH_512`"] + #[inline(always)] + pub fn is_width_512(&self) -> bool { + *self == SRC_TR_WIDTH_A::WIDTH_512 } } - #[doc = "Write proxy for field `lock_ch_l`"] - pub struct LOCK_CH_L_W<'a> { + #[doc = "Write proxy for field `src_tr_width`"] + pub struct SRC_TR_WIDTH_W<'a> { w: &'a mut W, } - impl<'a> LOCK_CH_L_W<'a> { + impl<'a> SRC_TR_WIDTH_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn variant(self, variant: LOCK_CH_L_A) -> &'a mut W { + pub fn variant(self, variant: SRC_TR_WIDTH_A) -> &'a mut W { unsafe { self.bits(variant.into()) } } - #[doc = "Duration of channel is locked for entire DMA transfer"] + #[doc = "8 bits"] #[inline(always)] - pub fn dma_transfer(self) -> &'a mut W { - self.variant(LOCK_CH_L_A::DMA_TRANSFER) + pub fn width_8(self) -> &'a mut W { + self.variant(SRC_TR_WIDTH_A::WIDTH_8) } - #[doc = "Duration of channel is locked for current block transfer"] + #[doc = "16 bits"] #[inline(always)] - pub fn block_transfer(self) -> &'a mut W { - self.variant(LOCK_CH_L_A::BLOCK_TRANSFER) + pub fn width_16(self) -> &'a mut W { + self.variant(SRC_TR_WIDTH_A::WIDTH_16) } - #[doc = "Duration of channel is locked for current transaction"] + #[doc = "32 bits"] #[inline(always)] - pub fn transaction(self) -> &'a mut W { - self.variant(LOCK_CH_L_A::TRANSACTION) + pub fn width_32(self) -> &'a mut W { + self.variant(SRC_TR_WIDTH_A::WIDTH_32) + } + #[doc = "64 bits"] + #[inline(always)] + pub fn width_64(self) -> &'a mut W { + self.variant(SRC_TR_WIDTH_A::WIDTH_64) + } + #[doc = "128 bits"] + #[inline(always)] + pub fn width_128(self) -> &'a mut W { + self.variant(SRC_TR_WIDTH_A::WIDTH_128) + } + #[doc = "256 bits"] + #[inline(always)] + pub fn width_256(self) -> &'a mut W { + self.variant(SRC_TR_WIDTH_A::WIDTH_256) + } + #[doc = "512 bits"] + #[inline(always)] + pub fn width_512(self) -> &'a mut W { + self.variant(SRC_TR_WIDTH_A::WIDTH_512) } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03 << 53)) | (((value as u64) & 0x03) << 53); + self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u64) & 0x07) << 8); self.w } } - #[doc = "Reader of field `src_osr_lmt`"] - pub type SRC_OSR_LMT_R = crate::R; - #[doc = "Write proxy for field `src_osr_lmt`"] - pub struct SRC_OSR_LMT_W<'a> { + #[doc = "Destination transfer width"] + pub type DST_TR_WIDTH_A = SRC_TR_WIDTH_A; + #[doc = "Reader of field `dst_tr_width`"] + pub type DST_TR_WIDTH_R = crate::R; + #[doc = "Write proxy for field `dst_tr_width`"] + pub struct DST_TR_WIDTH_W<'a> { w: &'a mut W, } - impl<'a> SRC_OSR_LMT_W<'a> { + impl<'a> DST_TR_WIDTH_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: DST_TR_WIDTH_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "8 bits"] + #[inline(always)] + pub fn width_8(self) -> &'a mut W { + self.variant(DST_TR_WIDTH_A::WIDTH_8) + } + #[doc = "16 bits"] + #[inline(always)] + pub fn width_16(self) -> &'a mut W { + self.variant(DST_TR_WIDTH_A::WIDTH_16) + } + #[doc = "32 bits"] + #[inline(always)] + pub fn width_32(self) -> &'a mut W { + self.variant(DST_TR_WIDTH_A::WIDTH_32) + } + #[doc = "64 bits"] + #[inline(always)] + pub fn width_64(self) -> &'a mut W { + self.variant(DST_TR_WIDTH_A::WIDTH_64) + } + #[doc = "128 bits"] + #[inline(always)] + pub fn width_128(self) -> &'a mut W { + self.variant(DST_TR_WIDTH_A::WIDTH_128) + } + #[doc = "256 bits"] + #[inline(always)] + pub fn width_256(self) -> &'a mut W { + self.variant(DST_TR_WIDTH_A::WIDTH_256) + } + #[doc = "512 bits"] + #[inline(always)] + pub fn width_512(self) -> &'a mut W { + self.variant(DST_TR_WIDTH_A::WIDTH_512) + } #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 55)) | (((value as u64) & 0x0f) << 55); + self.w.bits = (self.w.bits & !(0x07 << 11)) | (((value as u64) & 0x07) << 11); self.w } } - #[doc = "Reader of field `dst_osr_lmt`"] - pub type DST_OSR_LMT_R = crate::R; - #[doc = "Write proxy for field `dst_osr_lmt`"] - pub struct DST_OSR_LMT_W<'a> { - w: &'a mut W, + #[doc = "Source burst transaction length\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] + pub enum SRC_MSIZE_A { + #[doc = "0: 1 data item"] + LENGTH_1 = 0, + #[doc = "1: 4 data items"] + LENGTH_4 = 1, + #[doc = "2: 8 data items"] + LENGTH_8 = 2, + #[doc = "3: 16 data items"] + LENGTH_16 = 3, + #[doc = "4: 32 data items"] + LENGTH_32 = 4, + #[doc = "5: 64 data items"] + LENGTH_64 = 5, + #[doc = "6: 128 data items"] + LENGTH_128 = 6, + #[doc = "7: 256 data items"] + LENGTH_256 = 7, + #[doc = "8: 512 data items"] + LENGTH_512 = 8, + #[doc = "9: 1024 data items"] + LENGTH_1024 = 9, } - impl<'a> DST_OSR_LMT_W<'a> { - #[doc = r"Writes raw bits to the field"] + impl From for u8 { #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x0f << 59)) | (((value as u64) & 0x0f) << 59); - self.w + fn from(variant: SRC_MSIZE_A) -> Self { + variant as _ } } - impl R { - #[doc = "Bits 0:1 - Source multi-block transfer type"] + #[doc = "Reader of field `src_msize`"] + pub type SRC_MSIZE_R = crate::R; + impl SRC_MSIZE_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn src_multblk_type(&self) -> SRC_MULTBLK_TYPE_R { - SRC_MULTBLK_TYPE_R::new((self.bits & 0x03) as u8) + pub fn variant(&self) -> crate::Variant { + use crate::Variant::*; + match self.bits { + 0 => Val(SRC_MSIZE_A::LENGTH_1), + 1 => Val(SRC_MSIZE_A::LENGTH_4), + 2 => Val(SRC_MSIZE_A::LENGTH_8), + 3 => Val(SRC_MSIZE_A::LENGTH_16), + 4 => Val(SRC_MSIZE_A::LENGTH_32), + 5 => Val(SRC_MSIZE_A::LENGTH_64), + 6 => Val(SRC_MSIZE_A::LENGTH_128), + 7 => Val(SRC_MSIZE_A::LENGTH_256), + 8 => Val(SRC_MSIZE_A::LENGTH_512), + 9 => Val(SRC_MSIZE_A::LENGTH_1024), + i => Res(i), + } } - #[doc = "Bits 2:3 - Destination multi-block transfer type"] + #[doc = "Checks if the value of the field is `LENGTH_1`"] #[inline(always)] - pub fn dst_multblk_type(&self) -> DST_MULTBLK_TYPE_R { - DST_MULTBLK_TYPE_R::new(((self.bits >> 2) & 0x03) as u8) + pub fn is_length_1(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_1 } - #[doc = "Bits 32:34 - Transfer type and flow control"] + #[doc = "Checks if the value of the field is `LENGTH_4`"] #[inline(always)] - pub fn tt_fc(&self) -> TT_FC_R { - TT_FC_R::new(((self.bits >> 32) & 0x07) as u8) + pub fn is_length_4(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_4 } - #[doc = "Bit 35 - Source software or hardware handshaking select"] + #[doc = "Checks if the value of the field is `LENGTH_8`"] #[inline(always)] - pub fn hs_sel_src(&self) -> HS_SEL_SRC_R { - HS_SEL_SRC_R::new(((self.bits >> 35) & 0x01) != 0) + pub fn is_length_8(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_8 } - #[doc = "Bit 36 - Destination software or hardware handshaking select"] + #[doc = "Checks if the value of the field is `LENGTH_16`"] #[inline(always)] - pub fn hs_sel_dst(&self) -> HS_SEL_DST_R { - HS_SEL_DST_R::new(((self.bits >> 36) & 0x01) != 0) + pub fn is_length_16(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_16 } - #[doc = "Bit 37 - Source hardware handshaking interface polarity"] + #[doc = "Checks if the value of the field is `LENGTH_32`"] #[inline(always)] - pub fn src_hwhs_pol(&self) -> SRC_HWHS_POL_R { - SRC_HWHS_POL_R::new(((self.bits >> 37) & 0x01) != 0) + pub fn is_length_32(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_32 } - #[doc = "Bit 38 - Destination hardware handshaking interface polarity"] + #[doc = "Checks if the value of the field is `LENGTH_64`"] #[inline(always)] - pub fn dst_hwhs_pol(&self) -> DST_HWHS_POL_R { - DST_HWHS_POL_R::new(((self.bits >> 38) & 0x01) != 0) + pub fn is_length_64(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_64 } - #[doc = "Bits 39:42 - Assign a hardware handshaking interface to source of channel"] + #[doc = "Checks if the value of the field is `LENGTH_128`"] #[inline(always)] - pub fn src_per(&self) -> SRC_PER_R { - SRC_PER_R::new(((self.bits >> 39) & 0x0f) as u8) + pub fn is_length_128(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_128 } - #[doc = "Bits 44:47 - Assign a hardware handshaking interface to destination of channel"] + #[doc = "Checks if the value of the field is `LENGTH_256`"] #[inline(always)] - pub fn dst_per(&self) -> DST_PER_R { - DST_PER_R::new(((self.bits >> 44) & 0x0f) as u8) + pub fn is_length_256(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_256 } - #[doc = "Bits 49:51 - Channel priority (7 is highest, 0 is lowest)"] + #[doc = "Checks if the value of the field is `LENGTH_512`"] #[inline(always)] - pub fn ch_prior(&self) -> CH_PRIOR_R { - CH_PRIOR_R::new(((self.bits >> 49) & 0x07) as u8) + pub fn is_length_512(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_512 } - #[doc = "Bit 52 - Channel lock bit"] + #[doc = "Checks if the value of the field is `LENGTH_1024`"] #[inline(always)] - pub fn lock_ch(&self) -> LOCK_CH_R { - LOCK_CH_R::new(((self.bits >> 52) & 0x01) != 0) + pub fn is_length_1024(&self) -> bool { + *self == SRC_MSIZE_A::LENGTH_1024 } - #[doc = "Bits 53:54 - Channel lock level"] + } + #[doc = "Write proxy for field `src_msize`"] + pub struct SRC_MSIZE_W<'a> { + w: &'a mut W, + } + impl<'a> SRC_MSIZE_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn lock_ch_l(&self) -> LOCK_CH_L_R { - LOCK_CH_L_R::new(((self.bits >> 53) & 0x03) as u8) + pub fn variant(self, variant: SRC_MSIZE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } } - #[doc = "Bits 55:58 - Source outstanding request limit"] + #[doc = "1 data item"] #[inline(always)] - pub fn src_osr_lmt(&self) -> SRC_OSR_LMT_R { - SRC_OSR_LMT_R::new(((self.bits >> 55) & 0x0f) as u8) + pub fn length_1(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_1) } - #[doc = "Bits 59:62 - Destination outstanding request limit"] + #[doc = "4 data items"] #[inline(always)] - pub fn dst_osr_lmt(&self) -> DST_OSR_LMT_R { - DST_OSR_LMT_R::new(((self.bits >> 59) & 0x0f) as u8) + pub fn length_4(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_4) } - } - impl W { - #[doc = "Bits 0:1 - Source multi-block transfer type"] + #[doc = "8 data items"] #[inline(always)] - pub fn src_multblk_type(&mut self) -> SRC_MULTBLK_TYPE_W { - SRC_MULTBLK_TYPE_W { w: self } + pub fn length_8(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_8) } - #[doc = "Bits 2:3 - Destination multi-block transfer type"] + #[doc = "16 data items"] #[inline(always)] - pub fn dst_multblk_type(&mut self) -> DST_MULTBLK_TYPE_W { - DST_MULTBLK_TYPE_W { w: self } + pub fn length_16(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_16) } - #[doc = "Bits 32:34 - Transfer type and flow control"] + #[doc = "32 data items"] #[inline(always)] - pub fn tt_fc(&mut self) -> TT_FC_W { - TT_FC_W { w: self } + pub fn length_32(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_32) } - #[doc = "Bit 35 - Source software or hardware handshaking select"] + #[doc = "64 data items"] #[inline(always)] - pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { - HS_SEL_SRC_W { w: self } + pub fn length_64(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_64) } - #[doc = "Bit 36 - Destination software or hardware handshaking select"] + #[doc = "128 data items"] #[inline(always)] - pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { - HS_SEL_DST_W { w: self } + pub fn length_128(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_128) } - #[doc = "Bit 37 - Source hardware handshaking interface polarity"] + #[doc = "256 data items"] #[inline(always)] - pub fn src_hwhs_pol(&mut self) -> SRC_HWHS_POL_W { - SRC_HWHS_POL_W { w: self } + pub fn length_256(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_256) } - #[doc = "Bit 38 - Destination hardware handshaking interface polarity"] + #[doc = "512 data items"] #[inline(always)] - pub fn dst_hwhs_pol(&mut self) -> DST_HWHS_POL_W { - DST_HWHS_POL_W { w: self } + pub fn length_512(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_512) } - #[doc = "Bits 39:42 - Assign a hardware handshaking interface to source of channel"] + #[doc = "1024 data items"] #[inline(always)] - pub fn src_per(&mut self) -> SRC_PER_W { - SRC_PER_W { w: self } + pub fn length_1024(self) -> &'a mut W { + self.variant(SRC_MSIZE_A::LENGTH_1024) } - #[doc = "Bits 44:47 - Assign a hardware handshaking interface to destination of channel"] + #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn dst_per(&mut self) -> DST_PER_W { - DST_PER_W { w: self } + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 14)) | (((value as u64) & 0x0f) << 14); + self.w } - #[doc = "Bits 49:51 - Channel priority (7 is highest, 0 is lowest)"] + } + #[doc = "Destination burst transaction length"] + pub type DST_MSIZE_A = SRC_MSIZE_A; + #[doc = "Reader of field `dst_msize`"] + pub type DST_MSIZE_R = crate::R; + #[doc = "Write proxy for field `dst_msize`"] + pub struct DST_MSIZE_W<'a> { + w: &'a mut W, + } + impl<'a> DST_MSIZE_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn ch_prior(&mut self) -> CH_PRIOR_W { - CH_PRIOR_W { w: self } + pub fn variant(self, variant: DST_MSIZE_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } } - #[doc = "Bit 52 - Channel lock bit"] + #[doc = "1 data item"] #[inline(always)] - pub fn lock_ch(&mut self) -> LOCK_CH_W { - LOCK_CH_W { w: self } + pub fn length_1(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_1) } - #[doc = "Bits 53:54 - Channel lock level"] + #[doc = "4 data items"] #[inline(always)] - pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { - LOCK_CH_L_W { w: self } + pub fn length_4(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_4) } - #[doc = "Bits 55:58 - Source outstanding request limit"] + #[doc = "8 data items"] #[inline(always)] - pub fn src_osr_lmt(&mut self) -> SRC_OSR_LMT_W { - SRC_OSR_LMT_W { w: self } + pub fn length_8(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_8) } - #[doc = "Bits 59:62 - Destination outstanding request limit"] + #[doc = "16 data items"] #[inline(always)] - pub fn dst_osr_lmt(&mut self) -> DST_OSR_LMT_W { - DST_OSR_LMT_W { w: self } + pub fn length_16(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_16) } - } - } - #[doc = "Linked List Pointer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [llp](llp) module"] - pub type LLP = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _LLP; - #[doc = "`read()` method returns [llp::R](llp::R) reader structure"] - impl crate::Readable for LLP {} - #[doc = "`write(|w| ..)` method takes [llp::W](llp::W) writer structure"] - impl crate::Writable for LLP {} - #[doc = "Linked List Pointer register"] - pub mod llp { - #[doc = "Reader of register llp"] - pub type R = crate::R; - #[doc = "Writer for register llp"] - pub type W = crate::W; - #[doc = "Register llp `reset()`'s with value 0"] - impl crate::ResetValue for super::LLP { - type Type = u64; + #[doc = "32 data items"] #[inline(always)] - fn reset_value() -> Self::Type { - 0 + pub fn length_32(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_32) } - } - #[doc = "LLI master select"] - pub type LMS_A = super::ctl::SMS_A; - #[doc = "Reader of field `lms`"] - pub type LMS_R = crate::R; - #[doc = "Write proxy for field `lms`"] - pub struct LMS_W<'a> { - w: &'a mut W, - } - impl<'a> LMS_W<'a> { - #[doc = r"Writes `variant` to the field"] + #[doc = "64 data items"] #[inline(always)] - pub fn variant(self, variant: LMS_A) -> &'a mut W { - { - self.bit(variant.into()) - } + pub fn length_64(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_64) } - #[doc = "AXI master 1"] + #[doc = "128 data items"] + #[inline(always)] + pub fn length_128(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_128) + } + #[doc = "256 data items"] + #[inline(always)] + pub fn length_256(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_256) + } + #[doc = "512 data items"] + #[inline(always)] + pub fn length_512(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_512) + } + #[doc = "1024 data items"] #[inline(always)] - pub fn axi_master_1(self) -> &'a mut W { - self.variant(super::ctl::SMS_A::AXI_MASTER_1) + pub fn length_1024(self) -> &'a mut W { + self.variant(DST_MSIZE_A::LENGTH_1024) } - #[doc = "AXI master 2"] + #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn axi_master_2(self) -> &'a mut W { - self.variant(super::ctl::SMS_A::AXI_MASTER_2) + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 18)) | (((value as u64) & 0x0f) << 18); + self.w } + } + #[doc = "Reader of field `nonposted_lastwrite_en`"] + pub type NONPOSTED_LASTWRITE_EN_R = crate::R; + #[doc = "Write proxy for field `nonposted_lastwrite_en`"] + pub struct NONPOSTED_LASTWRITE_EN_W<'a> { + w: &'a mut W, + } + impl<'a> NONPOSTED_LASTWRITE_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -24962,132 +12241,55 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); + self.w.bits = (self.w.bits & !(0x01 << 30)) | (((value as u64) & 0x01) << 30); self.w } } - #[doc = "Reader of field `loc`"] - pub type LOC_R = crate::R; - #[doc = "Write proxy for field `loc`"] - pub struct LOC_W<'a> { + #[doc = "Reader of field `arlen_en`"] + pub type ARLEN_EN_R = crate::R; + #[doc = "Write proxy for field `arlen_en`"] + pub struct ARLEN_EN_W<'a> { w: &'a mut W, } - impl<'a> LOC_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u64) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x03ff_ffff_ffff_ffff << 6)) - | (((value as u64) & 0x03ff_ffff_ffff_ffff) << 6); - self.w - } - } - impl R { - #[doc = "Bit 0 - LLI master select"] - #[inline(always)] - pub fn lms(&self) -> LMS_R { - LMS_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bits 6:63 - Starting address memeory of LLI block"] - #[inline(always)] - pub fn loc(&self) -> LOC_R { - LOC_R::new(((self.bits >> 6) & 0x03ff_ffff_ffff_ffff) as u64) - } - } - impl W { - #[doc = "Bit 0 - LLI master select"] + impl<'a> ARLEN_EN_W<'a> { + #[doc = r"Sets the field bit"] #[inline(always)] - pub fn lms(&mut self) -> LMS_W { - LMS_W { w: self } + pub fn set_bit(self) -> &'a mut W { + self.bit(true) } - #[doc = "Bits 6:63 - Starting address memeory of LLI block"] + #[doc = r"Clears the field bit"] #[inline(always)] - pub fn loc(&mut self) -> LOC_W { - LOC_W { w: self } + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) } - } - } - #[doc = "Channel Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [status](status) module"] - pub type STATUS = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _STATUS; - #[doc = "`read()` method returns [status::R](status::R) reader structure"] - impl crate::Readable for STATUS {} - #[doc = "`write(|w| ..)` method takes [status::W](status::W) writer structure"] - impl crate::Writable for STATUS {} - #[doc = "Channel Status Register"] - pub mod status { - #[doc = "Reader of register status"] - pub type R = crate::R; - #[doc = "Writer for register status"] - pub type W = crate::W; - #[doc = "Register status `reset()`'s with value 0"] - impl crate::ResetValue for super::STATUS { - type Type = u64; + #[doc = r"Writes raw bits to the field"] #[inline(always)] - fn reset_value() -> Self::Type { - 0 + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 38)) | (((value as u64) & 0x01) << 38); + self.w } } - #[doc = "Reader of field `cmpltd_blk_size`"] - pub type CMPLTD_BLK_SIZE_R = crate::R; - #[doc = "Write proxy for field `cmpltd_blk_size`"] - pub struct CMPLTD_BLK_SIZE_W<'a> { + #[doc = "Reader of field `arlen`"] + pub type ARLEN_R = crate::R; + #[doc = "Write proxy for field `arlen`"] + pub struct ARLEN_W<'a> { w: &'a mut W, } - impl<'a> CMPLTD_BLK_SIZE_W<'a> { + impl<'a> ARLEN_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub unsafe fn bits(self, value: u32) -> &'a mut W { - self.w.bits = (self.w.bits & !0x003f_ffff) | ((value as u64) & 0x003f_ffff); + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0xff << 39)) | (((value as u64) & 0xff) << 39); self.w } } - impl R { - #[doc = "Bits 0:21 - Completed block transfer size"] - #[inline(always)] - pub fn cmpltd_blk_size(&self) -> CMPLTD_BLK_SIZE_R { - CMPLTD_BLK_SIZE_R::new((self.bits & 0x003f_ffff) as u32) - } - } - impl W { - #[doc = "Bits 0:21 - Completed block transfer size"] - #[inline(always)] - pub fn cmpltd_blk_size(&mut self) -> CMPLTD_BLK_SIZE_W { - CMPLTD_BLK_SIZE_W { w: self } - } - } - } - #[doc = "Channel Software handshake Source Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [swhssrc](swhssrc) module"] - pub type SWHSSRC = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _SWHSSRC; - #[doc = "`read()` method returns [swhssrc::R](swhssrc::R) reader structure"] - impl crate::Readable for SWHSSRC {} - #[doc = "`write(|w| ..)` method takes [swhssrc::W](swhssrc::W) writer structure"] - impl crate::Writable for SWHSSRC {} - #[doc = "Channel Software handshake Source Register"] - pub mod swhssrc { - #[doc = "Reader of register swhssrc"] - pub type R = crate::R; - #[doc = "Writer for register swhssrc"] - pub type W = crate::W; - #[doc = "Register swhssrc `reset()`'s with value 0"] - impl crate::ResetValue for super::SWHSSRC { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `req`"] - pub type REQ_R = crate::R; - #[doc = "Write proxy for field `req`"] - pub struct REQ_W<'a> { + #[doc = "Reader of field `awlen_en`"] + pub type AWLEN_EN_R = crate::R; + #[doc = "Write proxy for field `awlen_en`"] + pub struct AWLEN_EN_W<'a> { w: &'a mut W, } - impl<'a> REQ_W<'a> { + impl<'a> AWLEN_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25101,17 +12303,31 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); + self.w.bits = (self.w.bits & !(0x01 << 47)) | (((value as u64) & 0x01) << 47); self.w } } - #[doc = "Reader of field `req_we`"] - pub type REQ_WE_R = crate::R; - #[doc = "Write proxy for field `req_we`"] - pub struct REQ_WE_W<'a> { + #[doc = "Reader of field `awlen`"] + pub type AWLEN_R = crate::R; + #[doc = "Write proxy for field `awlen`"] + pub struct AWLEN_W<'a> { w: &'a mut W, } - impl<'a> REQ_WE_W<'a> { + impl<'a> AWLEN_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0xff << 48)) | (((value as u64) & 0xff) << 48); + self.w + } + } + #[doc = "Reader of field `src_stat_en`"] + pub type SRC_STAT_EN_R = crate::R; + #[doc = "Write proxy for field `src_stat_en`"] + pub struct SRC_STAT_EN_W<'a> { + w: &'a mut W, + } + impl<'a> SRC_STAT_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25125,17 +12341,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); + self.w.bits = (self.w.bits & !(0x01 << 56)) | (((value as u64) & 0x01) << 56); self.w } } - #[doc = "Reader of field `sglreq`"] - pub type SGLREQ_R = crate::R; - #[doc = "Write proxy for field `sglreq`"] - pub struct SGLREQ_W<'a> { + #[doc = "Reader of field `dst_stat_en`"] + pub type DST_STAT_EN_R = crate::R; + #[doc = "Write proxy for field `dst_stat_en`"] + pub struct DST_STAT_EN_W<'a> { w: &'a mut W, } - impl<'a> SGLREQ_W<'a> { + impl<'a> DST_STAT_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25149,17 +12365,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); + self.w.bits = (self.w.bits & !(0x01 << 57)) | (((value as u64) & 0x01) << 57); self.w } } - #[doc = "Reader of field `sglreq_we`"] - pub type SGLREQ_WE_R = crate::R; - #[doc = "Write proxy for field `sglreq_we`"] - pub struct SGLREQ_WE_W<'a> { + #[doc = "Reader of field `ioc_blktfr`"] + pub type IOC_BLKTFR_R = crate::R; + #[doc = "Write proxy for field `ioc_blktfr`"] + pub struct IOC_BLKTFR_W<'a> { w: &'a mut W, } - impl<'a> SGLREQ_WE_W<'a> { + impl<'a> IOC_BLKTFR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25173,17 +12389,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); + self.w.bits = (self.w.bits & !(0x01 << 58)) | (((value as u64) & 0x01) << 58); self.w } } - #[doc = "Reader of field `lst`"] - pub type LST_R = crate::R; - #[doc = "Write proxy for field `lst`"] - pub struct LST_W<'a> { + #[doc = "Reader of field `shadowreg_or_lli_last`"] + pub type SHADOWREG_OR_LLI_LAST_R = crate::R; + #[doc = "Write proxy for field `shadowreg_or_lli_last`"] + pub struct SHADOWREG_OR_LLI_LAST_W<'a> { w: &'a mut W, } - impl<'a> LST_W<'a> { + impl<'a> SHADOWREG_OR_LLI_LAST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25197,17 +12413,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); + self.w.bits = (self.w.bits & !(0x01 << 62)) | (((value as u64) & 0x01) << 62); self.w } } - #[doc = "Reader of field `lst_we`"] - pub type LST_WE_R = crate::R; - #[doc = "Write proxy for field `lst_we`"] - pub struct LST_WE_W<'a> { + #[doc = "Reader of field `shadowreg_or_lli_valid`"] + pub type SHADOWREG_OR_LLI_VALID_R = crate::R; + #[doc = "Write proxy for field `shadowreg_or_lli_valid`"] + pub struct SHADOWREG_OR_LLI_VALID_W<'a> { w: &'a mut W, } - impl<'a> LST_WE_W<'a> { + impl<'a> SHADOWREG_OR_LLI_VALID_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25221,475 +12437,557 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); + self.w.bits = (self.w.bits & !(0x01 << 63)) | (((value as u64) & 0x01) << 63); self.w } } impl R { - #[doc = "Bit 0 - Software handshake request for channel source"] + #[doc = "Bit 0 - Source master select"] #[inline(always)] - pub fn req(&self) -> REQ_R { - REQ_R::new((self.bits & 0x01) != 0) + pub fn sms(&self) -> SMS_R { + SMS_R::new((self.bits & 0x01) != 0) } - #[doc = "Bit 1 - Write enable bit for software handshake request"] + #[doc = "Bit 2 - Destination master select"] #[inline(always)] - pub fn req_we(&self) -> REQ_WE_R { - REQ_WE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn dms(&self) -> DMS_R { + DMS_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = "Bit 2 - Software handshake single request for channel source"] + #[doc = "Bit 4 - Source address increment"] #[inline(always)] - pub fn sglreq(&self) -> SGLREQ_R { - SGLREQ_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn sinc(&self) -> SINC_R { + SINC_R::new(((self.bits >> 4) & 0x01) != 0) } - #[doc = "Bit 3 - Write enable bit for software handshake"] + #[doc = "Bit 6 - Destination address increment"] #[inline(always)] - pub fn sglreq_we(&self) -> SGLREQ_WE_R { - SGLREQ_WE_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn dinc(&self) -> DINC_R { + DINC_R::new(((self.bits >> 6) & 0x01) != 0) } - #[doc = "Bit 4 - Software handshake last request for channel source"] + #[doc = "Bits 8:10 - Source transfer width"] #[inline(always)] - pub fn lst(&self) -> LST_R { - LST_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn src_tr_width(&self) -> SRC_TR_WIDTH_R { + SRC_TR_WIDTH_R::new(((self.bits >> 8) & 0x07) as u8) } - #[doc = "Bit 5 - Write enable bit for software handshake last request"] + #[doc = "Bits 11:13 - Destination transfer width"] #[inline(always)] - pub fn lst_we(&self) -> LST_WE_R { - LST_WE_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn dst_tr_width(&self) -> DST_TR_WIDTH_R { + DST_TR_WIDTH_R::new(((self.bits >> 11) & 0x07) as u8) + } + #[doc = "Bits 14:17 - Source burst transaction length"] + #[inline(always)] + pub fn src_msize(&self) -> SRC_MSIZE_R { + SRC_MSIZE_R::new(((self.bits >> 14) & 0x0f) as u8) + } + #[doc = "Bits 18:21 - Destination burst transaction length"] + #[inline(always)] + pub fn dst_msize(&self) -> DST_MSIZE_R { + DST_MSIZE_R::new(((self.bits >> 18) & 0x0f) as u8) + } + #[doc = "Bit 30 - Non Posted Last Write Enable (posted writes may be used till the end of the block)"] + #[inline(always)] + pub fn nonposted_lastwrite_en(&self) -> NONPOSTED_LASTWRITE_EN_R { + NONPOSTED_LASTWRITE_EN_R::new(((self.bits >> 30) & 0x01) != 0) + } + #[doc = "Bit 38 - Source burst length enable"] + #[inline(always)] + pub fn arlen_en(&self) -> ARLEN_EN_R { + ARLEN_EN_R::new(((self.bits >> 38) & 0x01) != 0) + } + #[doc = "Bits 39:46 - Source burst length"] + #[inline(always)] + pub fn arlen(&self) -> ARLEN_R { + ARLEN_R::new(((self.bits >> 39) & 0xff) as u8) + } + #[doc = "Bit 47 - Destination burst length enable"] + #[inline(always)] + pub fn awlen_en(&self) -> AWLEN_EN_R { + AWLEN_EN_R::new(((self.bits >> 47) & 0x01) != 0) + } + #[doc = "Bits 48:55 - Destination burst length"] + #[inline(always)] + pub fn awlen(&self) -> AWLEN_R { + AWLEN_R::new(((self.bits >> 48) & 0xff) as u8) + } + #[doc = "Bit 56 - Source status enable"] + #[inline(always)] + pub fn src_stat_en(&self) -> SRC_STAT_EN_R { + SRC_STAT_EN_R::new(((self.bits >> 56) & 0x01) != 0) + } + #[doc = "Bit 57 - Destination status enable"] + #[inline(always)] + pub fn dst_stat_en(&self) -> DST_STAT_EN_R { + DST_STAT_EN_R::new(((self.bits >> 57) & 0x01) != 0) + } + #[doc = "Bit 58 - Interrupt completion of block transfer"] + #[inline(always)] + pub fn ioc_blktfr(&self) -> IOC_BLKTFR_R { + IOC_BLKTFR_R::new(((self.bits >> 58) & 0x01) != 0) + } + #[doc = "Bit 62 - Last shadow linked list item (indicates shadowreg/LLI content is the last one)"] + #[inline(always)] + pub fn shadowreg_or_lli_last(&self) -> SHADOWREG_OR_LLI_LAST_R { + SHADOWREG_OR_LLI_LAST_R::new(((self.bits >> 62) & 0x01) != 0) + } + #[doc = "Bit 63 - last shadow linked list item valid (indicate shadowreg/LLI content is valid)"] + #[inline(always)] + pub fn shadowreg_or_lli_valid(&self) -> SHADOWREG_OR_LLI_VALID_R { + SHADOWREG_OR_LLI_VALID_R::new(((self.bits >> 63) & 0x01) != 0) } } impl W { - #[doc = "Bit 0 - Software handshake request for channel source"] + #[doc = "Bit 0 - Source master select"] #[inline(always)] - pub fn req(&mut self) -> REQ_W { - REQ_W { w: self } + pub fn sms(&mut self) -> SMS_W { + SMS_W { w: self } } - #[doc = "Bit 1 - Write enable bit for software handshake request"] + #[doc = "Bit 2 - Destination master select"] #[inline(always)] - pub fn req_we(&mut self) -> REQ_WE_W { - REQ_WE_W { w: self } + pub fn dms(&mut self) -> DMS_W { + DMS_W { w: self } } - #[doc = "Bit 2 - Software handshake single request for channel source"] + #[doc = "Bit 4 - Source address increment"] #[inline(always)] - pub fn sglreq(&mut self) -> SGLREQ_W { - SGLREQ_W { w: self } + pub fn sinc(&mut self) -> SINC_W { + SINC_W { w: self } } - #[doc = "Bit 3 - Write enable bit for software handshake"] + #[doc = "Bit 6 - Destination address increment"] #[inline(always)] - pub fn sglreq_we(&mut self) -> SGLREQ_WE_W { - SGLREQ_WE_W { w: self } + pub fn dinc(&mut self) -> DINC_W { + DINC_W { w: self } } - #[doc = "Bit 4 - Software handshake last request for channel source"] + #[doc = "Bits 8:10 - Source transfer width"] #[inline(always)] - pub fn lst(&mut self) -> LST_W { - LST_W { w: self } + pub fn src_tr_width(&mut self) -> SRC_TR_WIDTH_W { + SRC_TR_WIDTH_W { w: self } } - #[doc = "Bit 5 - Write enable bit for software handshake last request"] + #[doc = "Bits 11:13 - Destination transfer width"] #[inline(always)] - pub fn lst_we(&mut self) -> LST_WE_W { - LST_WE_W { w: self } + pub fn dst_tr_width(&mut self) -> DST_TR_WIDTH_W { + DST_TR_WIDTH_W { w: self } + } + #[doc = "Bits 14:17 - Source burst transaction length"] + #[inline(always)] + pub fn src_msize(&mut self) -> SRC_MSIZE_W { + SRC_MSIZE_W { w: self } + } + #[doc = "Bits 18:21 - Destination burst transaction length"] + #[inline(always)] + pub fn dst_msize(&mut self) -> DST_MSIZE_W { + DST_MSIZE_W { w: self } + } + #[doc = "Bit 30 - Non Posted Last Write Enable (posted writes may be used till the end of the block)"] + #[inline(always)] + pub fn nonposted_lastwrite_en(&mut self) -> NONPOSTED_LASTWRITE_EN_W { + NONPOSTED_LASTWRITE_EN_W { w: self } + } + #[doc = "Bit 38 - Source burst length enable"] + #[inline(always)] + pub fn arlen_en(&mut self) -> ARLEN_EN_W { + ARLEN_EN_W { w: self } + } + #[doc = "Bits 39:46 - Source burst length"] + #[inline(always)] + pub fn arlen(&mut self) -> ARLEN_W { + ARLEN_W { w: self } + } + #[doc = "Bit 47 - Destination burst length enable"] + #[inline(always)] + pub fn awlen_en(&mut self) -> AWLEN_EN_W { + AWLEN_EN_W { w: self } + } + #[doc = "Bits 48:55 - Destination burst length"] + #[inline(always)] + pub fn awlen(&mut self) -> AWLEN_W { + AWLEN_W { w: self } + } + #[doc = "Bit 56 - Source status enable"] + #[inline(always)] + pub fn src_stat_en(&mut self) -> SRC_STAT_EN_W { + SRC_STAT_EN_W { w: self } + } + #[doc = "Bit 57 - Destination status enable"] + #[inline(always)] + pub fn dst_stat_en(&mut self) -> DST_STAT_EN_W { + DST_STAT_EN_W { w: self } + } + #[doc = "Bit 58 - Interrupt completion of block transfer"] + #[inline(always)] + pub fn ioc_blktfr(&mut self) -> IOC_BLKTFR_W { + IOC_BLKTFR_W { w: self } + } + #[doc = "Bit 62 - Last shadow linked list item (indicates shadowreg/LLI content is the last one)"] + #[inline(always)] + pub fn shadowreg_or_lli_last(&mut self) -> SHADOWREG_OR_LLI_LAST_W { + SHADOWREG_OR_LLI_LAST_W { w: self } + } + #[doc = "Bit 63 - last shadow linked list item valid (indicate shadowreg/LLI content is valid)"] + #[inline(always)] + pub fn shadowreg_or_lli_valid(&mut self) -> SHADOWREG_OR_LLI_VALID_W { + SHADOWREG_OR_LLI_VALID_W { w: self } } } } - #[doc = "Channel Software handshake Destination Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [swhsdst](swhsdst) module"] - pub type SWHSDST = crate::Reg; + #[doc = "Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] + pub type CFG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _SWHSDST; - #[doc = "`read()` method returns [swhsdst::R](swhsdst::R) reader structure"] - impl crate::Readable for SWHSDST {} - #[doc = "`write(|w| ..)` method takes [swhsdst::W](swhsdst::W) writer structure"] - impl crate::Writable for SWHSDST {} - #[doc = "Channel Software handshake Destination Register"] - pub mod swhsdst { - #[doc = "Reader of register swhsdst"] - pub type R = crate::R; - #[doc = "Writer for register swhsdst"] - pub type W = crate::W; - #[doc = "Register swhsdst `reset()`'s with value 0"] - impl crate::ResetValue for super::SWHSDST { + pub struct _CFG; + #[doc = "`read()` method returns [cfg::R](cfg::R) reader structure"] + impl crate::Readable for CFG {} + #[doc = "`write(|w| ..)` method takes [cfg::W](cfg::W) writer structure"] + impl crate::Writable for CFG {} + #[doc = "Configure Register"] + pub mod cfg { + #[doc = "Reader of register cfg"] + pub type R = crate::R; + #[doc = "Writer for register cfg"] + pub type W = crate::W; + #[doc = "Register cfg `reset()`'s with value 0"] + impl crate::ResetValue for super::CFG { type Type = u64; #[inline(always)] fn reset_value() -> Self::Type { 0 } } - #[doc = "Reader of field `req`"] - pub type REQ_R = crate::R; - #[doc = "Write proxy for field `req`"] - pub struct REQ_W<'a> { - w: &'a mut W, + #[doc = "Source multi-block transfer type\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] + pub enum SRC_MULTBLK_TYPE_A { + #[doc = "0: Continuous multi-block type"] + CONTIGUOUS = 0, + #[doc = "1: Reload multi-block type"] + RELOAD = 1, + #[doc = "2: Shadow register based multi-block type"] + SHADOW_REGISTER = 2, + #[doc = "3: Linked list based multi-block type"] + LINKED_LIST = 3, } - impl<'a> REQ_W<'a> { - #[doc = r"Sets the field bit"] + impl From for u8 { #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn from(variant: SRC_MULTBLK_TYPE_A) -> Self { + variant as _ } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `src_multblk_type`"] + pub type SRC_MULTBLK_TYPE_R = crate::R; + impl SRC_MULTBLK_TYPE_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn variant(&self) -> SRC_MULTBLK_TYPE_A { + match self.bits { + 0 => SRC_MULTBLK_TYPE_A::CONTIGUOUS, + 1 => SRC_MULTBLK_TYPE_A::RELOAD, + 2 => SRC_MULTBLK_TYPE_A::SHADOW_REGISTER, + 3 => SRC_MULTBLK_TYPE_A::LINKED_LIST, + _ => unreachable!(), + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `CONTIGUOUS`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w + pub fn is_contiguous(&self) -> bool { + *self == SRC_MULTBLK_TYPE_A::CONTIGUOUS + } + #[doc = "Checks if the value of the field is `RELOAD`"] + #[inline(always)] + pub fn is_reload(&self) -> bool { + *self == SRC_MULTBLK_TYPE_A::RELOAD + } + #[doc = "Checks if the value of the field is `SHADOW_REGISTER`"] + #[inline(always)] + pub fn is_shadow_register(&self) -> bool { + *self == SRC_MULTBLK_TYPE_A::SHADOW_REGISTER + } + #[doc = "Checks if the value of the field is `LINKED_LIST`"] + #[inline(always)] + pub fn is_linked_list(&self) -> bool { + *self == SRC_MULTBLK_TYPE_A::LINKED_LIST } } - #[doc = "Reader of field `req_we`"] - pub type REQ_WE_R = crate::R; - #[doc = "Write proxy for field `req_we`"] - pub struct REQ_WE_W<'a> { + #[doc = "Write proxy for field `src_multblk_type`"] + pub struct SRC_MULTBLK_TYPE_W<'a> { w: &'a mut W, } - impl<'a> REQ_WE_W<'a> { - #[doc = r"Sets the field bit"] + impl<'a> SRC_MULTBLK_TYPE_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn variant(self, variant: SRC_MULTBLK_TYPE_A) -> &'a mut W { + { + self.bits(variant.into()) + } } - #[doc = r"Clears the field bit"] + #[doc = "Continuous multi-block type"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn contiguous(self) -> &'a mut W { + self.variant(SRC_MULTBLK_TYPE_A::CONTIGUOUS) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Reload multi-block type"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w + pub fn reload(self) -> &'a mut W { + self.variant(SRC_MULTBLK_TYPE_A::RELOAD) } - } - #[doc = "Reader of field `sglreq`"] - pub type SGLREQ_R = crate::R; - #[doc = "Write proxy for field `sglreq`"] - pub struct SGLREQ_W<'a> { - w: &'a mut W, - } - impl<'a> SGLREQ_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Shadow register based multi-block type"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn shadow_register(self) -> &'a mut W { + self.variant(SRC_MULTBLK_TYPE_A::SHADOW_REGISTER) } - #[doc = r"Clears the field bit"] + #[doc = "Linked list based multi-block type"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn linked_list(self) -> &'a mut W { + self.variant(SRC_MULTBLK_TYPE_A::LINKED_LIST) } #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x03) | ((value as u64) & 0x03); self.w } } - #[doc = "Reader of field `sglreq_we`"] - pub type SGLREQ_WE_R = crate::R; - #[doc = "Write proxy for field `sglreq_we`"] - pub struct SGLREQ_WE_W<'a> { + #[doc = "Destination multi-block transfer type"] + pub type DST_MULTBLK_TYPE_A = SRC_MULTBLK_TYPE_A; + #[doc = "Reader of field `dst_multblk_type`"] + pub type DST_MULTBLK_TYPE_R = crate::R; + #[doc = "Write proxy for field `dst_multblk_type`"] + pub struct DST_MULTBLK_TYPE_W<'a> { w: &'a mut W, } - impl<'a> SGLREQ_WE_W<'a> { - #[doc = r"Sets the field bit"] + impl<'a> DST_MULTBLK_TYPE_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn variant(self, variant: DST_MULTBLK_TYPE_A) -> &'a mut W { + { + self.bits(variant.into()) + } } - #[doc = r"Clears the field bit"] + #[doc = "Continuous multi-block type"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn contiguous(self) -> &'a mut W { + self.variant(DST_MULTBLK_TYPE_A::CONTIGUOUS) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Reload multi-block type"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); - self.w + pub fn reload(self) -> &'a mut W { + self.variant(DST_MULTBLK_TYPE_A::RELOAD) } - } - #[doc = "Reader of field `lst`"] - pub type LST_R = crate::R; - #[doc = "Write proxy for field `lst`"] - pub struct LST_W<'a> { - w: &'a mut W, - } - impl<'a> LST_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Shadow register based multi-block type"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn shadow_register(self) -> &'a mut W { + self.variant(DST_MULTBLK_TYPE_A::SHADOW_REGISTER) } - #[doc = r"Clears the field bit"] + #[doc = "Linked list based multi-block type"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn linked_list(self) -> &'a mut W { + self.variant(DST_MULTBLK_TYPE_A::LINKED_LIST) } #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u64) & 0x03) << 2); self.w } } - #[doc = "Reader of field `lst_we`"] - pub type LST_WE_R = crate::R; - #[doc = "Write proxy for field `lst_we`"] - pub struct LST_WE_W<'a> { - w: &'a mut W, + #[doc = "Transfer type and flow control\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] + pub enum TT_FC_A { + #[doc = "0: Transfer memory to memory and flow controller is DMAC"] + MEM2MEM_DMA = 0, + #[doc = "1: Transfer memory to peripheral and flow controller is DMAC"] + MEM2PRF_DMA = 1, + #[doc = "2: Transfer peripheral to memory and flow controller is DMAC"] + PRF2MEM_DMA = 2, + #[doc = "3: Transfer peripheral to peripheral and flow controller is DMAC"] + PRF2PRF_DMA = 3, + #[doc = "4: Transfer peripheral to memory and flow controller is source peripheral"] + PRF2MEM_PRF = 4, + #[doc = "5: Transfer peripheral to peripheral and flow controller is source peripheral"] + PRF2PRF_SRCPRF = 5, + #[doc = "6: Transfer memory to peripheral and flow controller is destination peripheral"] + MEM2PRF_PRF = 6, + #[doc = "7: Transfer peripheral to peripheral and flow controller is destination peripheral"] + PRF2PRF_DSTPRF = 7, } - impl<'a> LST_WE_W<'a> { - #[doc = r"Sets the field bit"] + impl From for u8 { #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn from(variant: TT_FC_A) -> Self { + variant as _ } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `tt_fc`"] + pub type TT_FC_R = crate::R; + impl TT_FC_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn variant(&self) -> TT_FC_A { + match self.bits { + 0 => TT_FC_A::MEM2MEM_DMA, + 1 => TT_FC_A::MEM2PRF_DMA, + 2 => TT_FC_A::PRF2MEM_DMA, + 3 => TT_FC_A::PRF2PRF_DMA, + 4 => TT_FC_A::PRF2MEM_PRF, + 5 => TT_FC_A::PRF2PRF_SRCPRF, + 6 => TT_FC_A::MEM2PRF_PRF, + 7 => TT_FC_A::PRF2PRF_DSTPRF, + _ => unreachable!(), + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `MEM2MEM_DMA`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); - self.w + pub fn is_mem2mem_dma(&self) -> bool { + *self == TT_FC_A::MEM2MEM_DMA } - } - impl R { - #[doc = "Bit 0 - Software handshake request for channel destination"] + #[doc = "Checks if the value of the field is `MEM2PRF_DMA`"] #[inline(always)] - pub fn req(&self) -> REQ_R { - REQ_R::new((self.bits & 0x01) != 0) + pub fn is_mem2prf_dma(&self) -> bool { + *self == TT_FC_A::MEM2PRF_DMA } - #[doc = "Bit 1 - Write enable bit for software handshake request"] + #[doc = "Checks if the value of the field is `PRF2MEM_DMA`"] #[inline(always)] - pub fn req_we(&self) -> REQ_WE_R { - REQ_WE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn is_prf2mem_dma(&self) -> bool { + *self == TT_FC_A::PRF2MEM_DMA } - #[doc = "Bit 2 - Software handshake single request for channel destination"] + #[doc = "Checks if the value of the field is `PRF2PRF_DMA`"] #[inline(always)] - pub fn sglreq(&self) -> SGLREQ_R { - SGLREQ_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn is_prf2prf_dma(&self) -> bool { + *self == TT_FC_A::PRF2PRF_DMA } - #[doc = "Bit 3 - Write enable bit for software handshake"] + #[doc = "Checks if the value of the field is `PRF2MEM_PRF`"] #[inline(always)] - pub fn sglreq_we(&self) -> SGLREQ_WE_R { - SGLREQ_WE_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn is_prf2mem_prf(&self) -> bool { + *self == TT_FC_A::PRF2MEM_PRF } - #[doc = "Bit 4 - Software handshake last request for channel destination"] + #[doc = "Checks if the value of the field is `PRF2PRF_SRCPRF`"] #[inline(always)] - pub fn lst(&self) -> LST_R { - LST_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn is_prf2prf_srcprf(&self) -> bool { + *self == TT_FC_A::PRF2PRF_SRCPRF } - #[doc = "Bit 5 - Write enable bit for software handshake last request"] + #[doc = "Checks if the value of the field is `MEM2PRF_PRF`"] #[inline(always)] - pub fn lst_we(&self) -> LST_WE_R { - LST_WE_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn is_mem2prf_prf(&self) -> bool { + *self == TT_FC_A::MEM2PRF_PRF + } + #[doc = "Checks if the value of the field is `PRF2PRF_DSTPRF`"] + #[inline(always)] + pub fn is_prf2prf_dstprf(&self) -> bool { + *self == TT_FC_A::PRF2PRF_DSTPRF } } - impl W { - #[doc = "Bit 0 - Software handshake request for channel destination"] + #[doc = "Write proxy for field `tt_fc`"] + pub struct TT_FC_W<'a> { + w: &'a mut W, + } + impl<'a> TT_FC_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn req(&mut self) -> REQ_W { - REQ_W { w: self } + pub fn variant(self, variant: TT_FC_A) -> &'a mut W { + { + self.bits(variant.into()) + } } - #[doc = "Bit 1 - Write enable bit for software handshake request"] + #[doc = "Transfer memory to memory and flow controller is DMAC"] #[inline(always)] - pub fn req_we(&mut self) -> REQ_WE_W { - REQ_WE_W { w: self } + pub fn mem2mem_dma(self) -> &'a mut W { + self.variant(TT_FC_A::MEM2MEM_DMA) } - #[doc = "Bit 2 - Software handshake single request for channel destination"] + #[doc = "Transfer memory to peripheral and flow controller is DMAC"] #[inline(always)] - pub fn sglreq(&mut self) -> SGLREQ_W { - SGLREQ_W { w: self } + pub fn mem2prf_dma(self) -> &'a mut W { + self.variant(TT_FC_A::MEM2PRF_DMA) } - #[doc = "Bit 3 - Write enable bit for software handshake"] + #[doc = "Transfer peripheral to memory and flow controller is DMAC"] #[inline(always)] - pub fn sglreq_we(&mut self) -> SGLREQ_WE_W { - SGLREQ_WE_W { w: self } + pub fn prf2mem_dma(self) -> &'a mut W { + self.variant(TT_FC_A::PRF2MEM_DMA) } - #[doc = "Bit 4 - Software handshake last request for channel destination"] + #[doc = "Transfer peripheral to peripheral and flow controller is DMAC"] #[inline(always)] - pub fn lst(&mut self) -> LST_W { - LST_W { w: self } + pub fn prf2prf_dma(self) -> &'a mut W { + self.variant(TT_FC_A::PRF2PRF_DMA) } - #[doc = "Bit 5 - Write enable bit for software handshake last request"] + #[doc = "Transfer peripheral to memory and flow controller is source peripheral"] #[inline(always)] - pub fn lst_we(&mut self) -> LST_WE_W { - LST_WE_W { w: self } + pub fn prf2mem_prf(self) -> &'a mut W { + self.variant(TT_FC_A::PRF2MEM_PRF) } - } - } - #[doc = "Channel Block Transfer Resume Request Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [blk_tfr](blk_tfr) module"] - pub type BLK_TFR = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _BLK_TFR; - #[doc = "`read()` method returns [blk_tfr::R](blk_tfr::R) reader structure"] - impl crate::Readable for BLK_TFR {} - #[doc = "`write(|w| ..)` method takes [blk_tfr::W](blk_tfr::W) writer structure"] - impl crate::Writable for BLK_TFR {} - #[doc = "Channel Block Transfer Resume Request Register"] - pub mod blk_tfr { - #[doc = "Reader of register blk_tfr"] - pub type R = crate::R; - #[doc = "Writer for register blk_tfr"] - pub type W = crate::W; - #[doc = "Register blk_tfr `reset()`'s with value 0"] - impl crate::ResetValue for super::BLK_TFR { - type Type = u64; + #[doc = "Transfer peripheral to peripheral and flow controller is source peripheral"] #[inline(always)] - fn reset_value() -> Self::Type { - 0 + pub fn prf2prf_srcprf(self) -> &'a mut W { + self.variant(TT_FC_A::PRF2PRF_SRCPRF) } - } - #[doc = "Reader of field `resumereq`"] - pub type RESUMEREQ_R = crate::R; - #[doc = "Write proxy for field `resumereq`"] - pub struct RESUMEREQ_W<'a> { - w: &'a mut W, - } - impl<'a> RESUMEREQ_W<'a> { - #[doc = r"Sets the field bit"] + #[doc = "Transfer memory to peripheral and flow controller is destination peripheral"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn mem2prf_prf(self) -> &'a mut W { + self.variant(TT_FC_A::MEM2PRF_PRF) } - #[doc = r"Clears the field bit"] + #[doc = "Transfer peripheral to peripheral and flow controller is destination peripheral"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn prf2prf_dstprf(self) -> &'a mut W { + self.variant(TT_FC_A::PRF2PRF_DSTPRF) } #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); + pub fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 32)) | (((value as u64) & 0x07) << 32); self.w } } - impl R { - #[doc = "Bit 0 - Block transfer resume request"] - #[inline(always)] - pub fn resumereq(&self) -> RESUMEREQ_R { - RESUMEREQ_R::new((self.bits & 0x01) != 0) - } + #[doc = "Source software or hardware handshaking select\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + pub enum HS_SEL_SRC_A { + #[doc = "0: Hardware handshaking is used"] + HARDWARE = 0, + #[doc = "1: Software handshaking is used"] + SOFTWARE = 1, } - impl W { - #[doc = "Bit 0 - Block transfer resume request"] + impl From for bool { #[inline(always)] - pub fn resumereq(&mut self) -> RESUMEREQ_W { - RESUMEREQ_W { w: self } + fn from(variant: HS_SEL_SRC_A) -> Self { + variant as u8 != 0 } } - } - #[doc = "Channel AXI ID Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [axi_id](axi_id) module"] - pub type AXI_ID = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _AXI_ID; - #[doc = "`read()` method returns [axi_id::R](axi_id::R) reader structure"] - impl crate::Readable for AXI_ID {} - #[doc = "`write(|w| ..)` method takes [axi_id::W](axi_id::W) writer structure"] - impl crate::Writable for AXI_ID {} - #[doc = "Channel AXI ID Register"] - pub mod axi_id { - #[doc = "Reader of register axi_id"] - pub type R = crate::R; - #[doc = "Writer for register axi_id"] - pub type W = crate::W; - #[doc = "Register axi_id `reset()`'s with value 0"] - impl crate::ResetValue for super::AXI_ID { - type Type = u64; + #[doc = "Reader of field `hs_sel_src`"] + pub type HS_SEL_SRC_R = crate::R; + impl HS_SEL_SRC_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - fn reset_value() -> Self::Type { - 0 + pub fn variant(&self) -> HS_SEL_SRC_A { + match self.bits { + false => HS_SEL_SRC_A::HARDWARE, + true => HS_SEL_SRC_A::SOFTWARE, + } } - } - impl R {} - impl W {} - } - #[doc = "AXI QOS Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [axi_qos](axi_qos) module"] - pub type AXI_QOS = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _AXI_QOS; - #[doc = "`read()` method returns [axi_qos::R](axi_qos::R) reader structure"] - impl crate::Readable for AXI_QOS {} - #[doc = "`write(|w| ..)` method takes [axi_qos::W](axi_qos::W) writer structure"] - impl crate::Writable for AXI_QOS {} - #[doc = "AXI QOS Register"] - pub mod axi_qos { - #[doc = "Reader of register axi_qos"] - pub type R = crate::R; - #[doc = "Writer for register axi_qos"] - pub type W = crate::W; - #[doc = "Register axi_qos `reset()`'s with value 0"] - impl crate::ResetValue for super::AXI_QOS { - type Type = u64; + #[doc = "Checks if the value of the field is `HARDWARE`"] #[inline(always)] - fn reset_value() -> Self::Type { - 0 + pub fn is_hardware(&self) -> bool { + *self == HS_SEL_SRC_A::HARDWARE } - } - impl R {} - impl W {} - } - #[doc = "Interrupt Status Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intstatus_en](intstatus_en) module"] - pub type INTSTATUS_EN = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _INTSTATUS_EN; - #[doc = "`read()` method returns [intstatus_en::R](intstatus_en::R) reader structure"] - impl crate::Readable for INTSTATUS_EN {} - #[doc = "`write(|w| ..)` method takes [intstatus_en::W](intstatus_en::W) writer structure"] - impl crate::Writable for INTSTATUS_EN {} - #[doc = "Interrupt Status Enable Register"] - pub mod intstatus_en { - #[doc = "Reader of register intstatus_en"] - pub type R = crate::R; - #[doc = "Writer for register intstatus_en"] - pub type W = crate::W; - #[doc = "Register intstatus_en `reset()`'s with value 0"] - impl crate::ResetValue for super::INTSTATUS_EN { - type Type = u64; + #[doc = "Checks if the value of the field is `SOFTWARE`"] #[inline(always)] - fn reset_value() -> Self::Type { - 0 + pub fn is_software(&self) -> bool { + *self == HS_SEL_SRC_A::SOFTWARE } } - #[doc = "Reader of field `block_tfr_done`"] - pub type BLOCK_TFR_DONE_R = crate::R; - #[doc = "Write proxy for field `block_tfr_done`"] - pub struct BLOCK_TFR_DONE_W<'a> { + #[doc = "Write proxy for field `hs_sel_src`"] + pub struct HS_SEL_SRC_W<'a> { w: &'a mut W, } - impl<'a> BLOCK_TFR_DONE_W<'a> { - #[doc = r"Sets the field bit"] + impl<'a> HS_SEL_SRC_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn variant(self, variant: HS_SEL_SRC_A) -> &'a mut W { + { + self.bit(variant.into()) + } } - #[doc = r"Clears the field bit"] + #[doc = "Hardware handshaking is used"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn hardware(self) -> &'a mut W { + self.variant(HS_SEL_SRC_A::HARDWARE) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Software handshaking is used"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w + pub fn software(self) -> &'a mut W { + self.variant(HS_SEL_SRC_A::SOFTWARE) } - } - #[doc = "Reader of field `tfr_done`"] - pub type TFR_DONE_R = crate::R; - #[doc = "Write proxy for field `tfr_done`"] - pub struct TFR_DONE_W<'a> { - w: &'a mut W, - } - impl<'a> TFR_DONE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25703,17 +13001,36 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); + self.w.bits = (self.w.bits & !(0x01 << 35)) | (((value as u64) & 0x01) << 35); self.w } } - #[doc = "Reader of field `src_transcomp`"] - pub type SRC_TRANSCOMP_R = crate::R; - #[doc = "Write proxy for field `src_transcomp`"] - pub struct SRC_TRANSCOMP_W<'a> { + #[doc = "Destination software or hardware handshaking select"] + pub type HS_SEL_DST_A = HS_SEL_SRC_A; + #[doc = "Reader of field `hs_sel_dst`"] + pub type HS_SEL_DST_R = crate::R; + #[doc = "Write proxy for field `hs_sel_dst`"] + pub struct HS_SEL_DST_W<'a> { w: &'a mut W, } - impl<'a> SRC_TRANSCOMP_W<'a> { + impl<'a> HS_SEL_DST_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: HS_SEL_DST_A) -> &'a mut W { + { + self.bit(variant.into()) + } + } + #[doc = "Hardware handshaking is used"] + #[inline(always)] + pub fn hardware(self) -> &'a mut W { + self.variant(HS_SEL_DST_A::HARDWARE) + } + #[doc = "Software handshaking is used"] + #[inline(always)] + pub fn software(self) -> &'a mut W { + self.variant(HS_SEL_DST_A::SOFTWARE) + } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25727,65 +13044,68 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); + self.w.bits = (self.w.bits & !(0x01 << 36)) | (((value as u64) & 0x01) << 36); self.w } } - #[doc = "Reader of field `dst_transcomp`"] - pub type DST_TRANSCOMP_R = crate::R; - #[doc = "Write proxy for field `dst_transcomp`"] - pub struct DST_TRANSCOMP_W<'a> { - w: &'a mut W, + #[doc = "Source hardware handshaking interface polarity\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + pub enum SRC_HWHS_POL_A { + #[doc = "0: Active high"] + ACTIVE_HIGH = 0, + #[doc = "1: Active low"] + ACTIVE_LOW = 1, } - impl<'a> DST_TRANSCOMP_W<'a> { - #[doc = r"Sets the field bit"] + impl From for bool { #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn from(variant: SRC_HWHS_POL_A) -> Self { + variant as u8 != 0 } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `src_hwhs_pol`"] + pub type SRC_HWHS_POL_R = crate::R; + impl SRC_HWHS_POL_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn variant(&self) -> SRC_HWHS_POL_A { + match self.bits { + false => SRC_HWHS_POL_A::ACTIVE_HIGH, + true => SRC_HWHS_POL_A::ACTIVE_LOW, + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `ACTIVE_HIGH`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); - self.w + pub fn is_active_high(&self) -> bool { + *self == SRC_HWHS_POL_A::ACTIVE_HIGH + } + #[doc = "Checks if the value of the field is `ACTIVE_LOW`"] + #[inline(always)] + pub fn is_active_low(&self) -> bool { + *self == SRC_HWHS_POL_A::ACTIVE_LOW } } - #[doc = "Reader of field `src_dec_err`"] - pub type SRC_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `src_dec_err`"] - pub struct SRC_DEC_ERR_W<'a> { + #[doc = "Write proxy for field `src_hwhs_pol`"] + pub struct SRC_HWHS_POL_W<'a> { w: &'a mut W, } - impl<'a> SRC_DEC_ERR_W<'a> { - #[doc = r"Sets the field bit"] + impl<'a> SRC_HWHS_POL_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn variant(self, variant: SRC_HWHS_POL_A) -> &'a mut W { + { + self.bit(variant.into()) + } } - #[doc = r"Clears the field bit"] + #[doc = "Active high"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn active_high(self) -> &'a mut W { + self.variant(SRC_HWHS_POL_A::ACTIVE_HIGH) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Active low"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); - self.w + pub fn active_low(self) -> &'a mut W { + self.variant(SRC_HWHS_POL_A::ACTIVE_LOW) } - } - #[doc = "Reader of field `dst_dec_err`"] - pub type DST_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `dst_dec_err`"] - pub struct DST_DEC_ERR_W<'a> { - w: &'a mut W, - } - impl<'a> DST_DEC_ERR_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25799,17 +13119,36 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u64) & 0x01) << 6); + self.w.bits = (self.w.bits & !(0x01 << 37)) | (((value as u64) & 0x01) << 37); self.w } } - #[doc = "Reader of field `src_slv_err`"] - pub type SRC_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `src_slv_err`"] - pub struct SRC_SLV_ERR_W<'a> { + #[doc = "Destination hardware handshaking interface polarity"] + pub type DST_HWHS_POL_A = SRC_HWHS_POL_A; + #[doc = "Reader of field `dst_hwhs_pol`"] + pub type DST_HWHS_POL_R = crate::R; + #[doc = "Write proxy for field `dst_hwhs_pol`"] + pub struct DST_HWHS_POL_W<'a> { w: &'a mut W, } - impl<'a> SRC_SLV_ERR_W<'a> { + impl<'a> DST_HWHS_POL_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: DST_HWHS_POL_A) -> &'a mut W { + { + self.bit(variant.into()) + } + } + #[doc = "Active high"] + #[inline(always)] + pub fn active_high(self) -> &'a mut W { + self.variant(DST_HWHS_POL_A::ACTIVE_HIGH) + } + #[doc = "Active low"] + #[inline(always)] + pub fn active_low(self) -> &'a mut W { + self.variant(DST_HWHS_POL_A::ACTIVE_LOW) + } #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25823,41 +13162,59 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u64) & 0x01) << 7); + self.w.bits = (self.w.bits & !(0x01 << 38)) | (((value as u64) & 0x01) << 38); self.w } } - #[doc = "Reader of field `dst_slv_err`"] - pub type DST_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `dst_slv_err`"] - pub struct DST_SLV_ERR_W<'a> { + #[doc = "Reader of field `src_per`"] + pub type SRC_PER_R = crate::R; + #[doc = "Write proxy for field `src_per`"] + pub struct SRC_PER_W<'a> { w: &'a mut W, } - impl<'a> DST_SLV_ERR_W<'a> { - #[doc = r"Sets the field bit"] + impl<'a> SRC_PER_W<'a> { + #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 39)) | (((value as u64) & 0x0f) << 39); + self.w } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `dst_per`"] + pub type DST_PER_R = crate::R; + #[doc = "Write proxy for field `dst_per`"] + pub struct DST_PER_W<'a> { + w: &'a mut W, + } + impl<'a> DST_PER_W<'a> { + #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 44)) | (((value as u64) & 0x0f) << 44); + self.w } + } + #[doc = "Reader of field `ch_prior`"] + pub type CH_PRIOR_R = crate::R; + #[doc = "Write proxy for field `ch_prior`"] + pub struct CH_PRIOR_W<'a> { + w: &'a mut W, + } + impl<'a> CH_PRIOR_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u64) & 0x01) << 8); + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x07 << 49)) | (((value as u64) & 0x07) << 49); self.w } } - #[doc = "Reader of field `lli_rd_dec_err`"] - pub type LLI_RD_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_rd_dec_err`"] - pub struct LLI_RD_DEC_ERR_W<'a> { + #[doc = "Reader of field `lock_ch`"] + pub type LOCK_CH_R = crate::R; + #[doc = "Write proxy for field `lock_ch`"] + pub struct LOCK_CH_W<'a> { w: &'a mut W, } - impl<'a> LLI_RD_DEC_ERR_W<'a> { + impl<'a> LOCK_CH_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -25871,237 +13228,450 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u64) & 0x01) << 9); + self.w.bits = (self.w.bits & !(0x01 << 52)) | (((value as u64) & 0x01) << 52); self.w } } - #[doc = "Reader of field `lli_wr_dec_err`"] - pub type LLI_WR_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_wr_dec_err`"] - pub struct LLI_WR_DEC_ERR_W<'a> { - w: &'a mut W, + #[doc = "Channel lock level\n\nValue on reset: 0"] + #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] + pub enum LOCK_CH_L_A { + #[doc = "0: Duration of channel is locked for entire DMA transfer"] + DMA_TRANSFER = 0, + #[doc = "1: Duration of channel is locked for current block transfer"] + BLOCK_TRANSFER = 1, + #[doc = "2: Duration of channel is locked for current transaction"] + TRANSACTION = 2, } - impl<'a> LLI_WR_DEC_ERR_W<'a> { - #[doc = r"Sets the field bit"] + impl From for u8 { #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn from(variant: LOCK_CH_L_A) -> Self { + variant as _ } - #[doc = r"Clears the field bit"] + } + #[doc = "Reader of field `lock_ch_l`"] + pub type LOCK_CH_L_R = crate::R; + impl LOCK_CH_L_R { + #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn variant(&self) -> crate::Variant { + use crate::Variant::*; + match self.bits { + 0 => Val(LOCK_CH_L_A::DMA_TRANSFER), + 1 => Val(LOCK_CH_L_A::BLOCK_TRANSFER), + 2 => Val(LOCK_CH_L_A::TRANSACTION), + i => Res(i), + } } - #[doc = r"Writes raw bits to the field"] + #[doc = "Checks if the value of the field is `DMA_TRANSFER`"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u64) & 0x01) << 10); - self.w + pub fn is_dma_transfer(&self) -> bool { + *self == LOCK_CH_L_A::DMA_TRANSFER + } + #[doc = "Checks if the value of the field is `BLOCK_TRANSFER`"] + #[inline(always)] + pub fn is_block_transfer(&self) -> bool { + *self == LOCK_CH_L_A::BLOCK_TRANSFER + } + #[doc = "Checks if the value of the field is `TRANSACTION`"] + #[inline(always)] + pub fn is_transaction(&self) -> bool { + *self == LOCK_CH_L_A::TRANSACTION } } - #[doc = "Reader of field `lli_rd_slv_err`"] - pub type LLI_RD_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_rd_slv_err`"] - pub struct LLI_RD_SLV_ERR_W<'a> { + #[doc = "Write proxy for field `lock_ch_l`"] + pub struct LOCK_CH_L_W<'a> { w: &'a mut W, } - impl<'a> LLI_RD_SLV_ERR_W<'a> { - #[doc = r"Sets the field bit"] + impl<'a> LOCK_CH_L_W<'a> { + #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn variant(self, variant: LOCK_CH_L_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } } - #[doc = r"Clears the field bit"] + #[doc = "Duration of channel is locked for entire DMA transfer"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn dma_transfer(self) -> &'a mut W { + self.variant(LOCK_CH_L_A::DMA_TRANSFER) + } + #[doc = "Duration of channel is locked for current block transfer"] + #[inline(always)] + pub fn block_transfer(self) -> &'a mut W { + self.variant(LOCK_CH_L_A::BLOCK_TRANSFER) + } + #[doc = "Duration of channel is locked for current transaction"] + #[inline(always)] + pub fn transaction(self) -> &'a mut W { + self.variant(LOCK_CH_L_A::TRANSACTION) } #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u64) & 0x01) << 11); + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03 << 53)) | (((value as u64) & 0x03) << 53); self.w } } - #[doc = "Reader of field `lli_wr_slv_err`"] - pub type LLI_WR_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_wr_slv_err`"] - pub struct LLI_WR_SLV_ERR_W<'a> { + #[doc = "Reader of field `src_osr_lmt`"] + pub type SRC_OSR_LMT_R = crate::R; + #[doc = "Write proxy for field `src_osr_lmt`"] + pub struct SRC_OSR_LMT_W<'a> { w: &'a mut W, } - impl<'a> LLI_WR_SLV_ERR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] + impl<'a> SRC_OSR_LMT_W<'a> { + #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 55)) | (((value as u64) & 0x0f) << 55); + self.w } + } + #[doc = "Reader of field `dst_osr_lmt`"] + pub type DST_OSR_LMT_R = crate::R; + #[doc = "Write proxy for field `dst_osr_lmt`"] + pub struct DST_OSR_LMT_W<'a> { + w: &'a mut W, + } + impl<'a> DST_OSR_LMT_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u64) & 0x01) << 12); + pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x0f << 59)) | (((value as u64) & 0x0f) << 59); self.w } } impl R { - #[doc = "Bit 0 - Block transfer done"] + #[doc = "Bits 0:1 - Source multi-block transfer type"] #[inline(always)] - pub fn block_tfr_done(&self) -> BLOCK_TFR_DONE_R { - BLOCK_TFR_DONE_R::new((self.bits & 0x01) != 0) + pub fn src_multblk_type(&self) -> SRC_MULTBLK_TYPE_R { + SRC_MULTBLK_TYPE_R::new((self.bits & 0x03) as u8) } - #[doc = "Bit 1 - Transfer done"] + #[doc = "Bits 2:3 - Destination multi-block transfer type"] #[inline(always)] - pub fn tfr_done(&self) -> TFR_DONE_R { - TFR_DONE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn dst_multblk_type(&self) -> DST_MULTBLK_TYPE_R { + DST_MULTBLK_TYPE_R::new(((self.bits >> 2) & 0x03) as u8) } - #[doc = "Bit 3 - Source transaction complete"] + #[doc = "Bits 32:34 - Transfer type and flow control"] #[inline(always)] - pub fn src_transcomp(&self) -> SRC_TRANSCOMP_R { - SRC_TRANSCOMP_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn tt_fc(&self) -> TT_FC_R { + TT_FC_R::new(((self.bits >> 32) & 0x07) as u8) } - #[doc = "Bit 4 - Destination transaction complete"] + #[doc = "Bit 35 - Source software or hardware handshaking select"] #[inline(always)] - pub fn dst_transcomp(&self) -> DST_TRANSCOMP_R { - DST_TRANSCOMP_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn hs_sel_src(&self) -> HS_SEL_SRC_R { + HS_SEL_SRC_R::new(((self.bits >> 35) & 0x01) != 0) } - #[doc = "Bit 5 - Source Decode Error"] + #[doc = "Bit 36 - Destination software or hardware handshaking select"] #[inline(always)] - pub fn src_dec_err(&self) -> SRC_DEC_ERR_R { - SRC_DEC_ERR_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn hs_sel_dst(&self) -> HS_SEL_DST_R { + HS_SEL_DST_R::new(((self.bits >> 36) & 0x01) != 0) } - #[doc = "Bit 6 - Destination Decode Error"] + #[doc = "Bit 37 - Source hardware handshaking interface polarity"] #[inline(always)] - pub fn dst_dec_err(&self) -> DST_DEC_ERR_R { - DST_DEC_ERR_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn src_hwhs_pol(&self) -> SRC_HWHS_POL_R { + SRC_HWHS_POL_R::new(((self.bits >> 37) & 0x01) != 0) } - #[doc = "Bit 7 - Source Slave Error"] + #[doc = "Bit 38 - Destination hardware handshaking interface polarity"] #[inline(always)] - pub fn src_slv_err(&self) -> SRC_SLV_ERR_R { - SRC_SLV_ERR_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn dst_hwhs_pol(&self) -> DST_HWHS_POL_R { + DST_HWHS_POL_R::new(((self.bits >> 38) & 0x01) != 0) } - #[doc = "Bit 8 - Destination Slave Error"] + #[doc = "Bits 39:42 - Assign a hardware handshaking interface to source of channel"] #[inline(always)] - pub fn dst_slv_err(&self) -> DST_SLV_ERR_R { - DST_SLV_ERR_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn src_per(&self) -> SRC_PER_R { + SRC_PER_R::new(((self.bits >> 39) & 0x0f) as u8) } - #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[doc = "Bits 44:47 - Assign a hardware handshaking interface to destination of channel"] #[inline(always)] - pub fn lli_rd_dec_err(&self) -> LLI_RD_DEC_ERR_R { - LLI_RD_DEC_ERR_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn dst_per(&self) -> DST_PER_R { + DST_PER_R::new(((self.bits >> 44) & 0x0f) as u8) } - #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[doc = "Bits 49:51 - Channel priority (7 is highest, 0 is lowest)"] #[inline(always)] - pub fn lli_wr_dec_err(&self) -> LLI_WR_DEC_ERR_R { - LLI_WR_DEC_ERR_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn ch_prior(&self) -> CH_PRIOR_R { + CH_PRIOR_R::new(((self.bits >> 49) & 0x07) as u8) } - #[doc = "Bit 11 - LLI Read Slave Error"] + #[doc = "Bit 52 - Channel lock bit"] #[inline(always)] - pub fn lli_rd_slv_err(&self) -> LLI_RD_SLV_ERR_R { - LLI_RD_SLV_ERR_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn lock_ch(&self) -> LOCK_CH_R { + LOCK_CH_R::new(((self.bits >> 52) & 0x01) != 0) } - #[doc = "Bit 12 - LLI WRITE Slave Error"] + #[doc = "Bits 53:54 - Channel lock level"] #[inline(always)] - pub fn lli_wr_slv_err(&self) -> LLI_WR_SLV_ERR_R { - LLI_WR_SLV_ERR_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn lock_ch_l(&self) -> LOCK_CH_L_R { + LOCK_CH_L_R::new(((self.bits >> 53) & 0x03) as u8) + } + #[doc = "Bits 55:58 - Source outstanding request limit"] + #[inline(always)] + pub fn src_osr_lmt(&self) -> SRC_OSR_LMT_R { + SRC_OSR_LMT_R::new(((self.bits >> 55) & 0x0f) as u8) + } + #[doc = "Bits 59:62 - Destination outstanding request limit"] + #[inline(always)] + pub fn dst_osr_lmt(&self) -> DST_OSR_LMT_R { + DST_OSR_LMT_R::new(((self.bits >> 59) & 0x0f) as u8) } } impl W { - #[doc = "Bit 0 - Block transfer done"] + #[doc = "Bits 0:1 - Source multi-block transfer type"] #[inline(always)] - pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W { - BLOCK_TFR_DONE_W { w: self } + pub fn src_multblk_type(&mut self) -> SRC_MULTBLK_TYPE_W { + SRC_MULTBLK_TYPE_W { w: self } } - #[doc = "Bit 1 - Transfer done"] + #[doc = "Bits 2:3 - Destination multi-block transfer type"] #[inline(always)] - pub fn tfr_done(&mut self) -> TFR_DONE_W { - TFR_DONE_W { w: self } + pub fn dst_multblk_type(&mut self) -> DST_MULTBLK_TYPE_W { + DST_MULTBLK_TYPE_W { w: self } } - #[doc = "Bit 3 - Source transaction complete"] + #[doc = "Bits 32:34 - Transfer type and flow control"] #[inline(always)] - pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W { - SRC_TRANSCOMP_W { w: self } + pub fn tt_fc(&mut self) -> TT_FC_W { + TT_FC_W { w: self } } - #[doc = "Bit 4 - Destination transaction complete"] + #[doc = "Bit 35 - Source software or hardware handshaking select"] #[inline(always)] - pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W { - DST_TRANSCOMP_W { w: self } + pub fn hs_sel_src(&mut self) -> HS_SEL_SRC_W { + HS_SEL_SRC_W { w: self } } - #[doc = "Bit 5 - Source Decode Error"] + #[doc = "Bit 36 - Destination software or hardware handshaking select"] #[inline(always)] - pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W { - SRC_DEC_ERR_W { w: self } + pub fn hs_sel_dst(&mut self) -> HS_SEL_DST_W { + HS_SEL_DST_W { w: self } } - #[doc = "Bit 6 - Destination Decode Error"] + #[doc = "Bit 37 - Source hardware handshaking interface polarity"] #[inline(always)] - pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W { - DST_DEC_ERR_W { w: self } + pub fn src_hwhs_pol(&mut self) -> SRC_HWHS_POL_W { + SRC_HWHS_POL_W { w: self } } - #[doc = "Bit 7 - Source Slave Error"] + #[doc = "Bit 38 - Destination hardware handshaking interface polarity"] #[inline(always)] - pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W { - SRC_SLV_ERR_W { w: self } + pub fn dst_hwhs_pol(&mut self) -> DST_HWHS_POL_W { + DST_HWHS_POL_W { w: self } } - #[doc = "Bit 8 - Destination Slave Error"] + #[doc = "Bits 39:42 - Assign a hardware handshaking interface to source of channel"] #[inline(always)] - pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W { - DST_SLV_ERR_W { w: self } + pub fn src_per(&mut self) -> SRC_PER_W { + SRC_PER_W { w: self } } - #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[doc = "Bits 44:47 - Assign a hardware handshaking interface to destination of channel"] #[inline(always)] - pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W { - LLI_RD_DEC_ERR_W { w: self } + pub fn dst_per(&mut self) -> DST_PER_W { + DST_PER_W { w: self } } - #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[doc = "Bits 49:51 - Channel priority (7 is highest, 0 is lowest)"] #[inline(always)] - pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W { - LLI_WR_DEC_ERR_W { w: self } + pub fn ch_prior(&mut self) -> CH_PRIOR_W { + CH_PRIOR_W { w: self } + } + #[doc = "Bit 52 - Channel lock bit"] + #[inline(always)] + pub fn lock_ch(&mut self) -> LOCK_CH_W { + LOCK_CH_W { w: self } + } + #[doc = "Bits 53:54 - Channel lock level"] + #[inline(always)] + pub fn lock_ch_l(&mut self) -> LOCK_CH_L_W { + LOCK_CH_L_W { w: self } + } + #[doc = "Bits 55:58 - Source outstanding request limit"] + #[inline(always)] + pub fn src_osr_lmt(&mut self) -> SRC_OSR_LMT_W { + SRC_OSR_LMT_W { w: self } + } + #[doc = "Bits 59:62 - Destination outstanding request limit"] + #[inline(always)] + pub fn dst_osr_lmt(&mut self) -> DST_OSR_LMT_W { + DST_OSR_LMT_W { w: self } + } + } + } + #[doc = "Linked List Pointer register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [llp](llp) module"] + pub type LLP = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _LLP; + #[doc = "`read()` method returns [llp::R](llp::R) reader structure"] + impl crate::Readable for LLP {} + #[doc = "`write(|w| ..)` method takes [llp::W](llp::W) writer structure"] + impl crate::Writable for LLP {} + #[doc = "Linked List Pointer register"] + pub mod llp { + #[doc = "Reader of register llp"] + pub type R = crate::R; + #[doc = "Writer for register llp"] + pub type W = crate::W; + #[doc = "Register llp `reset()`'s with value 0"] + impl crate::ResetValue for super::LLP { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } + } + #[doc = "LLI master select"] + pub type LMS_A = super::ctl::SMS_A; + #[doc = "Reader of field `lms`"] + pub type LMS_R = crate::R; + #[doc = "Write proxy for field `lms`"] + pub struct LMS_W<'a> { + w: &'a mut W, + } + impl<'a> LMS_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: LMS_A) -> &'a mut W { + { + self.bit(variant.into()) + } + } + #[doc = "AXI master 1"] + #[inline(always)] + pub fn axi_master_1(self) -> &'a mut W { + self.variant(LMS_A::AXI_MASTER_1) + } + #[doc = "AXI master 2"] + #[inline(always)] + pub fn axi_master_2(self) -> &'a mut W { + self.variant(LMS_A::AXI_MASTER_2) + } + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); + self.w + } + } + #[doc = "Reader of field `loc`"] + pub type LOC_R = crate::R; + #[doc = "Write proxy for field `loc`"] + pub struct LOC_W<'a> { + w: &'a mut W, + } + impl<'a> LOC_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u64) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x03ff_ffff_ffff_ffff << 6)) + | (((value as u64) & 0x03ff_ffff_ffff_ffff) << 6); + self.w + } + } + impl R { + #[doc = "Bit 0 - LLI master select"] + #[inline(always)] + pub fn lms(&self) -> LMS_R { + LMS_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bits 6:63 - Starting address memeory of LLI block"] + #[inline(always)] + pub fn loc(&self) -> LOC_R { + LOC_R::new(((self.bits >> 6) & 0x03ff_ffff_ffff_ffff) as u64) + } + } + impl W { + #[doc = "Bit 0 - LLI master select"] + #[inline(always)] + pub fn lms(&mut self) -> LMS_W { + LMS_W { w: self } + } + #[doc = "Bits 6:63 - Starting address memeory of LLI block"] + #[inline(always)] + pub fn loc(&mut self) -> LOC_W { + LOC_W { w: self } + } + } + } + #[doc = "Channel Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](status) module"] + pub type STATUS = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _STATUS; + #[doc = "`read()` method returns [status::R](status::R) reader structure"] + impl crate::Readable for STATUS {} + #[doc = "`write(|w| ..)` method takes [status::W](status::W) writer structure"] + impl crate::Writable for STATUS {} + #[doc = "Channel Status Register"] + pub mod status { + #[doc = "Reader of register status"] + pub type R = crate::R; + #[doc = "Writer for register status"] + pub type W = crate::W; + #[doc = "Register status `reset()`'s with value 0"] + impl crate::ResetValue for super::STATUS { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } + } + #[doc = "Reader of field `cmpltd_blk_size`"] + pub type CMPLTD_BLK_SIZE_R = crate::R; + #[doc = "Write proxy for field `cmpltd_blk_size`"] + pub struct CMPLTD_BLK_SIZE_W<'a> { + w: &'a mut W, + } + impl<'a> CMPLTD_BLK_SIZE_W<'a> { + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u32) -> &'a mut W { + self.w.bits = (self.w.bits & !0x003f_ffff) | ((value as u64) & 0x003f_ffff); + self.w } - #[doc = "Bit 11 - LLI Read Slave Error"] + } + impl R { + #[doc = "Bits 0:21 - Completed block transfer size"] #[inline(always)] - pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W { - LLI_RD_SLV_ERR_W { w: self } + pub fn cmpltd_blk_size(&self) -> CMPLTD_BLK_SIZE_R { + CMPLTD_BLK_SIZE_R::new((self.bits & 0x003f_ffff) as u32) } - #[doc = "Bit 12 - LLI WRITE Slave Error"] + } + impl W { + #[doc = "Bits 0:21 - Completed block transfer size"] #[inline(always)] - pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W { - LLI_WR_SLV_ERR_W { w: self } + pub fn cmpltd_blk_size(&mut self) -> CMPLTD_BLK_SIZE_W { + CMPLTD_BLK_SIZE_W { w: self } } } } - #[doc = "Channel Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intstatus](intstatus) module"] - pub type INTSTATUS = crate::Reg; + #[doc = "Channel Software handshake Source Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swhssrc](swhssrc) module"] + pub type SWHSSRC = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _INTSTATUS; - #[doc = "`read()` method returns [intstatus::R](intstatus::R) reader structure"] - impl crate::Readable for INTSTATUS {} - #[doc = "`write(|w| ..)` method takes [intstatus::W](intstatus::W) writer structure"] - impl crate::Writable for INTSTATUS {} - #[doc = "Channel Interrupt Status Register"] - pub mod intstatus { - #[doc = "Reader of register intstatus"] - pub type R = crate::R; - #[doc = "Writer for register intstatus"] - pub type W = crate::W; - #[doc = "Register intstatus `reset()`'s with value 0"] - impl crate::ResetValue for super::INTSTATUS { + pub struct _SWHSSRC; + #[doc = "`read()` method returns [swhssrc::R](swhssrc::R) reader structure"] + impl crate::Readable for SWHSSRC {} + #[doc = "`write(|w| ..)` method takes [swhssrc::W](swhssrc::W) writer structure"] + impl crate::Writable for SWHSSRC {} + #[doc = "Channel Software handshake Source Register"] + pub mod swhssrc { + #[doc = "Reader of register swhssrc"] + pub type R = crate::R; + #[doc = "Writer for register swhssrc"] + pub type W = crate::W; + #[doc = "Register swhssrc `reset()`'s with value 0"] + impl crate::ResetValue for super::SWHSSRC { type Type = u64; #[inline(always)] fn reset_value() -> Self::Type { 0 } } - #[doc = "Reader of field `block_tfr_done`"] - pub type BLOCK_TFR_DONE_R = crate::R; - #[doc = "Write proxy for field `block_tfr_done`"] - pub struct BLOCK_TFR_DONE_W<'a> { + #[doc = "Reader of field `req`"] + pub type REQ_R = crate::R; + #[doc = "Write proxy for field `req`"] + pub struct REQ_W<'a> { w: &'a mut W, } - impl<'a> BLOCK_TFR_DONE_W<'a> { + impl<'a> REQ_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26119,13 +13689,13 @@ pub mod dmac { self.w } } - #[doc = "Reader of field `tfr_done`"] - pub type TFR_DONE_R = crate::R; - #[doc = "Write proxy for field `tfr_done`"] - pub struct TFR_DONE_W<'a> { + #[doc = "Reader of field `req_we`"] + pub type REQ_WE_R = crate::R; + #[doc = "Write proxy for field `req_we`"] + pub struct REQ_WE_W<'a> { w: &'a mut W, } - impl<'a> TFR_DONE_W<'a> { + impl<'a> REQ_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26143,13 +13713,13 @@ pub mod dmac { self.w } } - #[doc = "Reader of field `src_transcomp`"] - pub type SRC_TRANSCOMP_R = crate::R; - #[doc = "Write proxy for field `src_transcomp`"] - pub struct SRC_TRANSCOMP_W<'a> { + #[doc = "Reader of field `sglreq`"] + pub type SGLREQ_R = crate::R; + #[doc = "Write proxy for field `sglreq`"] + pub struct SGLREQ_W<'a> { w: &'a mut W, } - impl<'a> SRC_TRANSCOMP_W<'a> { + impl<'a> SGLREQ_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26163,17 +13733,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } - #[doc = "Reader of field `dst_transcomp`"] - pub type DST_TRANSCOMP_R = crate::R; - #[doc = "Write proxy for field `dst_transcomp`"] - pub struct DST_TRANSCOMP_W<'a> { + #[doc = "Reader of field `sglreq_we`"] + pub type SGLREQ_WE_R = crate::R; + #[doc = "Write proxy for field `sglreq_we`"] + pub struct SGLREQ_WE_W<'a> { w: &'a mut W, } - impl<'a> DST_TRANSCOMP_W<'a> { + impl<'a> SGLREQ_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26187,17 +13757,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); + self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); self.w } } - #[doc = "Reader of field `src_dec_err`"] - pub type SRC_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `src_dec_err`"] - pub struct SRC_DEC_ERR_W<'a> { + #[doc = "Reader of field `lst`"] + pub type LST_R = crate::R; + #[doc = "Write proxy for field `lst`"] + pub struct LST_W<'a> { w: &'a mut W, } - impl<'a> SRC_DEC_ERR_W<'a> { + impl<'a> LST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26211,17 +13781,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); + self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); self.w } } - #[doc = "Reader of field `dst_dec_err`"] - pub type DST_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `dst_dec_err`"] - pub struct DST_DEC_ERR_W<'a> { + #[doc = "Reader of field `lst_we`"] + pub type LST_WE_R = crate::R; + #[doc = "Write proxy for field `lst_we`"] + pub struct LST_WE_W<'a> { w: &'a mut W, } - impl<'a> DST_DEC_ERR_W<'a> { + impl<'a> LST_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26235,17 +13805,105 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u64) & 0x01) << 6); + self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); self.w } } - #[doc = "Reader of field `src_slv_err`"] - pub type SRC_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `src_slv_err`"] - pub struct SRC_SLV_ERR_W<'a> { + impl R { + #[doc = "Bit 0 - Software handshake request for channel source"] + #[inline(always)] + pub fn req(&self) -> REQ_R { + REQ_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Write enable bit for software handshake request"] + #[inline(always)] + pub fn req_we(&self) -> REQ_WE_R { + REQ_WE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 2 - Software handshake single request for channel source"] + #[inline(always)] + pub fn sglreq(&self) -> SGLREQ_R { + SGLREQ_R::new(((self.bits >> 2) & 0x01) != 0) + } + #[doc = "Bit 3 - Write enable bit for software handshake"] + #[inline(always)] + pub fn sglreq_we(&self) -> SGLREQ_WE_R { + SGLREQ_WE_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Software handshake last request for channel source"] + #[inline(always)] + pub fn lst(&self) -> LST_R { + LST_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Write enable bit for software handshake last request"] + #[inline(always)] + pub fn lst_we(&self) -> LST_WE_R { + LST_WE_R::new(((self.bits >> 5) & 0x01) != 0) + } + } + impl W { + #[doc = "Bit 0 - Software handshake request for channel source"] + #[inline(always)] + pub fn req(&mut self) -> REQ_W { + REQ_W { w: self } + } + #[doc = "Bit 1 - Write enable bit for software handshake request"] + #[inline(always)] + pub fn req_we(&mut self) -> REQ_WE_W { + REQ_WE_W { w: self } + } + #[doc = "Bit 2 - Software handshake single request for channel source"] + #[inline(always)] + pub fn sglreq(&mut self) -> SGLREQ_W { + SGLREQ_W { w: self } + } + #[doc = "Bit 3 - Write enable bit for software handshake"] + #[inline(always)] + pub fn sglreq_we(&mut self) -> SGLREQ_WE_W { + SGLREQ_WE_W { w: self } + } + #[doc = "Bit 4 - Software handshake last request for channel source"] + #[inline(always)] + pub fn lst(&mut self) -> LST_W { + LST_W { w: self } + } + #[doc = "Bit 5 - Write enable bit for software handshake last request"] + #[inline(always)] + pub fn lst_we(&mut self) -> LST_WE_W { + LST_WE_W { w: self } + } + } + } + #[doc = "Channel Software handshake Destination Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [swhsdst](swhsdst) module"] + pub type SWHSDST = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _SWHSDST; + #[doc = "`read()` method returns [swhsdst::R](swhsdst::R) reader structure"] + impl crate::Readable for SWHSDST {} + #[doc = "`write(|w| ..)` method takes [swhsdst::W](swhsdst::W) writer structure"] + impl crate::Writable for SWHSDST {} + #[doc = "Channel Software handshake Destination Register"] + pub mod swhsdst { + #[doc = "Reader of register swhsdst"] + pub type R = crate::R; + #[doc = "Writer for register swhsdst"] + pub type W = crate::W; + #[doc = "Register swhsdst `reset()`'s with value 0"] + impl crate::ResetValue for super::SWHSDST { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } + } + #[doc = "Reader of field `req`"] + pub type REQ_R = crate::R; + #[doc = "Write proxy for field `req`"] + pub struct REQ_W<'a> { w: &'a mut W, } - impl<'a> SRC_SLV_ERR_W<'a> { + impl<'a> REQ_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26259,17 +13917,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u64) & 0x01) << 7); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `dst_slv_err`"] - pub type DST_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `dst_slv_err`"] - pub struct DST_SLV_ERR_W<'a> { + #[doc = "Reader of field `req_we`"] + pub type REQ_WE_R = crate::R; + #[doc = "Write proxy for field `req_we`"] + pub struct REQ_WE_W<'a> { w: &'a mut W, } - impl<'a> DST_SLV_ERR_W<'a> { + impl<'a> REQ_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26283,17 +13941,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u64) & 0x01) << 8); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `lli_rd_dec_err`"] - pub type LLI_RD_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_rd_dec_err`"] - pub struct LLI_RD_DEC_ERR_W<'a> { + #[doc = "Reader of field `sglreq`"] + pub type SGLREQ_R = crate::R; + #[doc = "Write proxy for field `sglreq`"] + pub struct SGLREQ_W<'a> { w: &'a mut W, } - impl<'a> LLI_RD_DEC_ERR_W<'a> { + impl<'a> SGLREQ_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26307,17 +13965,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u64) & 0x01) << 9); + self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); self.w } } - #[doc = "Reader of field `lli_wr_dec_err`"] - pub type LLI_WR_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_wr_dec_err`"] - pub struct LLI_WR_DEC_ERR_W<'a> { + #[doc = "Reader of field `sglreq_we`"] + pub type SGLREQ_WE_R = crate::R; + #[doc = "Write proxy for field `sglreq_we`"] + pub struct SGLREQ_WE_W<'a> { w: &'a mut W, } - impl<'a> LLI_WR_DEC_ERR_W<'a> { + impl<'a> SGLREQ_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26331,17 +13989,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u64) & 0x01) << 10); + self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); self.w } } - #[doc = "Reader of field `lli_rd_slv_err`"] - pub type LLI_RD_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_rd_slv_err`"] - pub struct LLI_RD_SLV_ERR_W<'a> { + #[doc = "Reader of field `lst`"] + pub type LST_R = crate::R; + #[doc = "Write proxy for field `lst`"] + pub struct LST_W<'a> { w: &'a mut W, } - impl<'a> LLI_RD_SLV_ERR_W<'a> { + impl<'a> LST_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26355,17 +14013,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u64) & 0x01) << 11); + self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); self.w } } - #[doc = "Reader of field `lli_wr_slv_err`"] - pub type LLI_WR_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_wr_slv_err`"] - pub struct LLI_WR_SLV_ERR_W<'a> { + #[doc = "Reader of field `lst_we`"] + pub type LST_WE_R = crate::R; + #[doc = "Write proxy for field `lst_we`"] + pub struct LST_WE_W<'a> { w: &'a mut W, } - impl<'a> LLI_WR_SLV_ERR_W<'a> { + impl<'a> LST_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -26379,152 +14037,206 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u64) & 0x01) << 12); + self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); self.w } } impl R { - #[doc = "Bit 0 - Block transfer done"] + #[doc = "Bit 0 - Software handshake request for channel destination"] #[inline(always)] - pub fn block_tfr_done(&self) -> BLOCK_TFR_DONE_R { - BLOCK_TFR_DONE_R::new((self.bits & 0x01) != 0) + pub fn req(&self) -> REQ_R { + REQ_R::new((self.bits & 0x01) != 0) } - #[doc = "Bit 1 - Transfer done"] + #[doc = "Bit 1 - Write enable bit for software handshake request"] #[inline(always)] - pub fn tfr_done(&self) -> TFR_DONE_R { - TFR_DONE_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn req_we(&self) -> REQ_WE_R { + REQ_WE_R::new(((self.bits >> 1) & 0x01) != 0) } - #[doc = "Bit 3 - Source transaction complete"] + #[doc = "Bit 2 - Software handshake single request for channel destination"] #[inline(always)] - pub fn src_transcomp(&self) -> SRC_TRANSCOMP_R { - SRC_TRANSCOMP_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn sglreq(&self) -> SGLREQ_R { + SGLREQ_R::new(((self.bits >> 2) & 0x01) != 0) } - #[doc = "Bit 4 - Destination transaction complete"] + #[doc = "Bit 3 - Write enable bit for software handshake"] #[inline(always)] - pub fn dst_transcomp(&self) -> DST_TRANSCOMP_R { - DST_TRANSCOMP_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn sglreq_we(&self) -> SGLREQ_WE_R { + SGLREQ_WE_R::new(((self.bits >> 3) & 0x01) != 0) } - #[doc = "Bit 5 - Source Decode Error"] + #[doc = "Bit 4 - Software handshake last request for channel destination"] #[inline(always)] - pub fn src_dec_err(&self) -> SRC_DEC_ERR_R { - SRC_DEC_ERR_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn lst(&self) -> LST_R { + LST_R::new(((self.bits >> 4) & 0x01) != 0) } - #[doc = "Bit 6 - Destination Decode Error"] + #[doc = "Bit 5 - Write enable bit for software handshake last request"] #[inline(always)] - pub fn dst_dec_err(&self) -> DST_DEC_ERR_R { - DST_DEC_ERR_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn lst_we(&self) -> LST_WE_R { + LST_WE_R::new(((self.bits >> 5) & 0x01) != 0) } - #[doc = "Bit 7 - Source Slave Error"] + } + impl W { + #[doc = "Bit 0 - Software handshake request for channel destination"] #[inline(always)] - pub fn src_slv_err(&self) -> SRC_SLV_ERR_R { - SRC_SLV_ERR_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn req(&mut self) -> REQ_W { + REQ_W { w: self } } - #[doc = "Bit 8 - Destination Slave Error"] + #[doc = "Bit 1 - Write enable bit for software handshake request"] #[inline(always)] - pub fn dst_slv_err(&self) -> DST_SLV_ERR_R { - DST_SLV_ERR_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn req_we(&mut self) -> REQ_WE_W { + REQ_WE_W { w: self } } - #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[doc = "Bit 2 - Software handshake single request for channel destination"] #[inline(always)] - pub fn lli_rd_dec_err(&self) -> LLI_RD_DEC_ERR_R { - LLI_RD_DEC_ERR_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn sglreq(&mut self) -> SGLREQ_W { + SGLREQ_W { w: self } } - #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[doc = "Bit 3 - Write enable bit for software handshake"] #[inline(always)] - pub fn lli_wr_dec_err(&self) -> LLI_WR_DEC_ERR_R { - LLI_WR_DEC_ERR_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn sglreq_we(&mut self) -> SGLREQ_WE_W { + SGLREQ_WE_W { w: self } } - #[doc = "Bit 11 - LLI Read Slave Error"] + #[doc = "Bit 4 - Software handshake last request for channel destination"] #[inline(always)] - pub fn lli_rd_slv_err(&self) -> LLI_RD_SLV_ERR_R { - LLI_RD_SLV_ERR_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn lst(&mut self) -> LST_W { + LST_W { w: self } } - #[doc = "Bit 12 - LLI WRITE Slave Error"] + #[doc = "Bit 5 - Write enable bit for software handshake last request"] #[inline(always)] - pub fn lli_wr_slv_err(&self) -> LLI_WR_SLV_ERR_R { - LLI_WR_SLV_ERR_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn lst_we(&mut self) -> LST_WE_W { + LST_WE_W { w: self } } } - impl W { - #[doc = "Bit 0 - Block transfer done"] - #[inline(always)] - pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W { - BLOCK_TFR_DONE_W { w: self } - } - #[doc = "Bit 1 - Transfer done"] - #[inline(always)] - pub fn tfr_done(&mut self) -> TFR_DONE_W { - TFR_DONE_W { w: self } - } - #[doc = "Bit 3 - Source transaction complete"] - #[inline(always)] - pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W { - SRC_TRANSCOMP_W { w: self } - } - #[doc = "Bit 4 - Destination transaction complete"] - #[inline(always)] - pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W { - DST_TRANSCOMP_W { w: self } - } - #[doc = "Bit 5 - Source Decode Error"] + } + #[doc = "Channel Block Transfer Resume Request Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [blk_tfr](blk_tfr) module"] + pub type BLK_TFR = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _BLK_TFR; + #[doc = "`read()` method returns [blk_tfr::R](blk_tfr::R) reader structure"] + impl crate::Readable for BLK_TFR {} + #[doc = "`write(|w| ..)` method takes [blk_tfr::W](blk_tfr::W) writer structure"] + impl crate::Writable for BLK_TFR {} + #[doc = "Channel Block Transfer Resume Request Register"] + pub mod blk_tfr { + #[doc = "Reader of register blk_tfr"] + pub type R = crate::R; + #[doc = "Writer for register blk_tfr"] + pub type W = crate::W; + #[doc = "Register blk_tfr `reset()`'s with value 0"] + impl crate::ResetValue for super::BLK_TFR { + type Type = u64; #[inline(always)] - pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W { - SRC_DEC_ERR_W { w: self } + fn reset_value() -> Self::Type { + 0 } - #[doc = "Bit 6 - Destination Decode Error"] + } + #[doc = "Reader of field `resumereq`"] + pub type RESUMEREQ_R = crate::R; + #[doc = "Write proxy for field `resumereq`"] + pub struct RESUMEREQ_W<'a> { + w: &'a mut W, + } + impl<'a> RESUMEREQ_W<'a> { + #[doc = r"Sets the field bit"] #[inline(always)] - pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W { - DST_DEC_ERR_W { w: self } + pub fn set_bit(self) -> &'a mut W { + self.bit(true) } - #[doc = "Bit 7 - Source Slave Error"] + #[doc = r"Clears the field bit"] #[inline(always)] - pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W { - SRC_SLV_ERR_W { w: self } + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) } - #[doc = "Bit 8 - Destination Slave Error"] + #[doc = r"Writes raw bits to the field"] #[inline(always)] - pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W { - DST_SLV_ERR_W { w: self } + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); + self.w } - #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + } + impl R { + #[doc = "Bit 0 - Block transfer resume request"] #[inline(always)] - pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W { - LLI_RD_DEC_ERR_W { w: self } + pub fn resumereq(&self) -> RESUMEREQ_R { + RESUMEREQ_R::new((self.bits & 0x01) != 0) } - #[doc = "Bit 10 - LLI WRITE Decode Error"] + } + impl W { + #[doc = "Bit 0 - Block transfer resume request"] #[inline(always)] - pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W { - LLI_WR_DEC_ERR_W { w: self } + pub fn resumereq(&mut self) -> RESUMEREQ_W { + RESUMEREQ_W { w: self } } - #[doc = "Bit 11 - LLI Read Slave Error"] + } + } + #[doc = "Channel AXI ID Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [axi_id](axi_id) module"] + pub type AXI_ID = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _AXI_ID; + #[doc = "`read()` method returns [axi_id::R](axi_id::R) reader structure"] + impl crate::Readable for AXI_ID {} + #[doc = "`write(|w| ..)` method takes [axi_id::W](axi_id::W) writer structure"] + impl crate::Writable for AXI_ID {} + #[doc = "Channel AXI ID Register"] + pub mod axi_id { + #[doc = "Reader of register axi_id"] + pub type R = crate::R; + #[doc = "Writer for register axi_id"] + pub type W = crate::W; + #[doc = "Register axi_id `reset()`'s with value 0"] + impl crate::ResetValue for super::AXI_ID { + type Type = u64; #[inline(always)] - pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W { - LLI_RD_SLV_ERR_W { w: self } + fn reset_value() -> Self::Type { + 0 } - #[doc = "Bit 12 - LLI WRITE Slave Error"] + } + impl R {} + impl W {} + } + #[doc = "AXI QOS Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [axi_qos](axi_qos) module"] + pub type AXI_QOS = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _AXI_QOS; + #[doc = "`read()` method returns [axi_qos::R](axi_qos::R) reader structure"] + impl crate::Readable for AXI_QOS {} + #[doc = "`write(|w| ..)` method takes [axi_qos::W](axi_qos::W) writer structure"] + impl crate::Writable for AXI_QOS {} + #[doc = "AXI QOS Register"] + pub mod axi_qos { + #[doc = "Reader of register axi_qos"] + pub type R = crate::R; + #[doc = "Writer for register axi_qos"] + pub type W = crate::W; + #[doc = "Register axi_qos `reset()`'s with value 0"] + impl crate::ResetValue for super::AXI_QOS { + type Type = u64; #[inline(always)] - pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W { - LLI_WR_SLV_ERR_W { w: self } + fn reset_value() -> Self::Type { + 0 } } + impl R {} + impl W {} } - #[doc = "Interrupt Signal Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intsignal_en](intsignal_en) module"] - pub type INTSIGNAL_EN = crate::Reg; + #[doc = "Interrupt Status Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intstatus_en](intstatus_en) module"] + pub type INTSTATUS_EN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _INTSIGNAL_EN; - #[doc = "`read()` method returns [intsignal_en::R](intsignal_en::R) reader structure"] - impl crate::Readable for INTSIGNAL_EN {} - #[doc = "`write(|w| ..)` method takes [intsignal_en::W](intsignal_en::W) writer structure"] - impl crate::Writable for INTSIGNAL_EN {} - #[doc = "Interrupt Signal Enable Register"] - pub mod intsignal_en { - #[doc = "Reader of register intsignal_en"] - pub type R = crate::R; - #[doc = "Writer for register intsignal_en"] - pub type W = crate::W; - #[doc = "Register intsignal_en `reset()`'s with value 0"] - impl crate::ResetValue for super::INTSIGNAL_EN { + pub struct _INTSTATUS_EN; + #[doc = "`read()` method returns [intstatus_en::R](intstatus_en::R) reader structure"] + impl crate::Readable for INTSTATUS_EN {} + #[doc = "`write(|w| ..)` method takes [intstatus_en::W](intstatus_en::W) writer structure"] + impl crate::Writable for INTSTATUS_EN {} + #[doc = "Interrupt Status Enable Register"] + pub mod intstatus_en { + #[doc = "Reader of register intstatus_en"] + pub type R = crate::R; + #[doc = "Writer for register intstatus_en"] + pub type W = crate::W; + #[doc = "Register intstatus_en `reset()`'s with value 0"] + impl crate::ResetValue for super::INTSTATUS_EN { type Type = u64; #[inline(always)] fn reset_value() -> Self::Type { @@ -26944,23 +14656,23 @@ pub mod dmac { } } } - #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intclear](intclear) module"] - pub type INTCLEAR = crate::Reg; + #[doc = "Channel Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intstatus](intstatus) module"] + pub type INTSTATUS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] - pub struct _INTCLEAR; - #[doc = "`read()` method returns [intclear::R](intclear::R) reader structure"] - impl crate::Readable for INTCLEAR {} - #[doc = "`write(|w| ..)` method takes [intclear::W](intclear::W) writer structure"] - impl crate::Writable for INTCLEAR {} - #[doc = "Interrupt Clear Register"] - pub mod intclear { - #[doc = "Reader of register intclear"] - pub type R = crate::R; - #[doc = "Writer for register intclear"] - pub type W = crate::W; - #[doc = "Register intclear `reset()`'s with value 0"] - impl crate::ResetValue for super::INTCLEAR { + pub struct _INTSTATUS; + #[doc = "`read()` method returns [intstatus::R](intstatus::R) reader structure"] + impl crate::Readable for INTSTATUS {} + #[doc = "`write(|w| ..)` method takes [intstatus::W](intstatus::W) writer structure"] + impl crate::Writable for INTSTATUS {} + #[doc = "Channel Interrupt Status Register"] + pub mod intstatus { + #[doc = "Reader of register intstatus"] + pub type R = crate::R; + #[doc = "Writer for register intstatus"] + pub type W = crate::W; + #[doc = "Register intstatus `reset()`'s with value 0"] + impl crate::ResetValue for super::INTSTATUS { type Type = u64; #[inline(always)] fn reset_value() -> Self::Type { @@ -27159,1056 +14871,1210 @@ pub mod dmac { self.w } } - #[doc = "Reader of field `lli_rd_dec_err`"] - pub type LLI_RD_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_rd_dec_err`"] - pub struct LLI_RD_DEC_ERR_W<'a> { - w: &'a mut W, - } - impl<'a> LLI_RD_DEC_ERR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u64) & 0x01) << 9); - self.w - } - } - #[doc = "Reader of field `lli_wr_dec_err`"] - pub type LLI_WR_DEC_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_wr_dec_err`"] - pub struct LLI_WR_DEC_ERR_W<'a> { - w: &'a mut W, - } - impl<'a> LLI_WR_DEC_ERR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u64) & 0x01) << 10); - self.w - } - } - #[doc = "Reader of field `lli_rd_slv_err`"] - pub type LLI_RD_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_rd_slv_err`"] - pub struct LLI_RD_SLV_ERR_W<'a> { - w: &'a mut W, - } - impl<'a> LLI_RD_SLV_ERR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u64) & 0x01) << 11); - self.w - } - } - #[doc = "Reader of field `lli_wr_slv_err`"] - pub type LLI_WR_SLV_ERR_R = crate::R; - #[doc = "Write proxy for field `lli_wr_slv_err`"] - pub struct LLI_WR_SLV_ERR_W<'a> { - w: &'a mut W, - } - impl<'a> LLI_WR_SLV_ERR_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u64) & 0x01) << 12); - self.w - } - } - impl R { - #[doc = "Bit 0 - Block transfer done"] - #[inline(always)] - pub fn block_tfr_done(&self) -> BLOCK_TFR_DONE_R { - BLOCK_TFR_DONE_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Transfer done"] - #[inline(always)] - pub fn tfr_done(&self) -> TFR_DONE_R { - TFR_DONE_R::new(((self.bits >> 1) & 0x01) != 0) - } - #[doc = "Bit 3 - Source transaction complete"] - #[inline(always)] - pub fn src_transcomp(&self) -> SRC_TRANSCOMP_R { - SRC_TRANSCOMP_R::new(((self.bits >> 3) & 0x01) != 0) - } - #[doc = "Bit 4 - Destination transaction complete"] - #[inline(always)] - pub fn dst_transcomp(&self) -> DST_TRANSCOMP_R { - DST_TRANSCOMP_R::new(((self.bits >> 4) & 0x01) != 0) - } - #[doc = "Bit 5 - Source Decode Error"] - #[inline(always)] - pub fn src_dec_err(&self) -> SRC_DEC_ERR_R { - SRC_DEC_ERR_R::new(((self.bits >> 5) & 0x01) != 0) - } - #[doc = "Bit 6 - Destination Decode Error"] - #[inline(always)] - pub fn dst_dec_err(&self) -> DST_DEC_ERR_R { - DST_DEC_ERR_R::new(((self.bits >> 6) & 0x01) != 0) - } - #[doc = "Bit 7 - Source Slave Error"] - #[inline(always)] - pub fn src_slv_err(&self) -> SRC_SLV_ERR_R { - SRC_SLV_ERR_R::new(((self.bits >> 7) & 0x01) != 0) - } - #[doc = "Bit 8 - Destination Slave Error"] - #[inline(always)] - pub fn dst_slv_err(&self) -> DST_SLV_ERR_R { - DST_SLV_ERR_R::new(((self.bits >> 8) & 0x01) != 0) - } - #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] - #[inline(always)] - pub fn lli_rd_dec_err(&self) -> LLI_RD_DEC_ERR_R { - LLI_RD_DEC_ERR_R::new(((self.bits >> 9) & 0x01) != 0) - } - #[doc = "Bit 10 - LLI WRITE Decode Error"] - #[inline(always)] - pub fn lli_wr_dec_err(&self) -> LLI_WR_DEC_ERR_R { - LLI_WR_DEC_ERR_R::new(((self.bits >> 10) & 0x01) != 0) - } - #[doc = "Bit 11 - LLI Read Slave Error"] - #[inline(always)] - pub fn lli_rd_slv_err(&self) -> LLI_RD_SLV_ERR_R { - LLI_RD_SLV_ERR_R::new(((self.bits >> 11) & 0x01) != 0) - } - #[doc = "Bit 12 - LLI WRITE Slave Error"] - #[inline(always)] - pub fn lli_wr_slv_err(&self) -> LLI_WR_SLV_ERR_R { - LLI_WR_SLV_ERR_R::new(((self.bits >> 12) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Block transfer done"] - #[inline(always)] - pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W { - BLOCK_TFR_DONE_W { w: self } - } - #[doc = "Bit 1 - Transfer done"] - #[inline(always)] - pub fn tfr_done(&mut self) -> TFR_DONE_W { - TFR_DONE_W { w: self } - } - #[doc = "Bit 3 - Source transaction complete"] - #[inline(always)] - pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W { - SRC_TRANSCOMP_W { w: self } - } - #[doc = "Bit 4 - Destination transaction complete"] - #[inline(always)] - pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W { - DST_TRANSCOMP_W { w: self } - } - #[doc = "Bit 5 - Source Decode Error"] - #[inline(always)] - pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W { - SRC_DEC_ERR_W { w: self } - } - #[doc = "Bit 6 - Destination Decode Error"] - #[inline(always)] - pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W { - DST_DEC_ERR_W { w: self } - } - #[doc = "Bit 7 - Source Slave Error"] - #[inline(always)] - pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W { - SRC_SLV_ERR_W { w: self } - } - #[doc = "Bit 8 - Destination Slave Error"] - #[inline(always)] - pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W { - DST_SLV_ERR_W { w: self } - } - #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] - #[inline(always)] - pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W { - LLI_RD_DEC_ERR_W { w: self } - } - #[doc = "Bit 10 - LLI WRITE Decode Error"] - #[inline(always)] - pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W { - LLI_WR_DEC_ERR_W { w: self } - } - #[doc = "Bit 11 - LLI Read Slave Error"] - #[inline(always)] - pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W { - LLI_RD_SLV_ERR_W { w: self } - } - #[doc = "Bit 12 - LLI WRITE Slave Error"] - #[inline(always)] - pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W { - LLI_WR_SLV_ERR_W { w: self } - } - } - } - #[doc = "Padding to make structure size 256 bytes so that channels\\[\\] is an array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [_reserved](_reserved) module"] - pub type _RESERVED = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct __RESERVED; - #[doc = "`read()` method returns [_reserved::R](_reserved::R) reader structure"] - impl crate::Readable for _RESERVED {} - #[doc = "`write(|w| ..)` method takes [_reserved::W](_reserved::W) writer structure"] - impl crate::Writable for _RESERVED {} - #[doc = "Padding to make structure size 256 bytes so that channels\\[\\] is an array"] - pub mod _reserved { - #[doc = "Reader of register _reserved"] - pub type R = crate::R; - #[doc = "Writer for register _reserved"] - pub type W = crate::W; - #[doc = "Register _reserved `reset()`'s with value 0"] - impl crate::ResetValue for super::_RESERVED { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } - } - #[doc = "ID Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [id](id) module"] - pub type ID = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _ID; - #[doc = "`read()` method returns [id::R](id::R) reader structure"] - impl crate::Readable for ID {} - #[doc = "`write(|w| ..)` method takes [id::W](id::W) writer structure"] - impl crate::Writable for ID {} - #[doc = "ID Register"] - pub mod id { - #[doc = "Reader of register id"] - pub type R = crate::R; - #[doc = "Writer for register id"] - pub type W = crate::W; - #[doc = "Register id `reset()`'s with value 0"] - impl crate::ResetValue for super::ID { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } - #[doc = "COMPVER Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [compver](compver) module"] - pub type COMPVER = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _COMPVER; - #[doc = "`read()` method returns [compver::R](compver::R) reader structure"] - impl crate::Readable for COMPVER {} - #[doc = "`write(|w| ..)` method takes [compver::W](compver::W) writer structure"] - impl crate::Writable for COMPVER {} - #[doc = "COMPVER Register"] - pub mod compver { - #[doc = "Reader of register compver"] - pub type R = crate::R; - #[doc = "Writer for register compver"] - pub type W = crate::W; - #[doc = "Register compver `reset()`'s with value 0"] - impl crate::ResetValue for super::COMPVER { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - impl R {} - impl W {} - } - #[doc = "Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] - pub type CFG = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _CFG; - #[doc = "`read()` method returns [cfg::R](cfg::R) reader structure"] - impl crate::Readable for CFG {} - #[doc = "`write(|w| ..)` method takes [cfg::W](cfg::W) writer structure"] - impl crate::Writable for CFG {} - #[doc = "Configure Register"] - pub mod cfg { - #[doc = "Reader of register cfg"] - pub type R = crate::R; - #[doc = "Writer for register cfg"] - pub type W = crate::W; - #[doc = "Register cfg `reset()`'s with value 0"] - impl crate::ResetValue for super::CFG { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `dmac_en`"] - pub type DMAC_EN_R = crate::R; - #[doc = "Write proxy for field `dmac_en`"] - pub struct DMAC_EN_W<'a> { - w: &'a mut W, - } - impl<'a> DMAC_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `int_en`"] - pub type INT_EN_R = crate::R; - #[doc = "Write proxy for field `int_en`"] - pub struct INT_EN_W<'a> { - w: &'a mut W, - } - impl<'a> INT_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - impl R { - #[doc = "Bit 0 - Enable DMAC"] - #[inline(always)] - pub fn dmac_en(&self) -> DMAC_EN_R { - DMAC_EN_R::new((self.bits & 0x01) != 0) - } - #[doc = "Bit 1 - Globally enable interrupt generation"] - #[inline(always)] - pub fn int_en(&self) -> INT_EN_R { - INT_EN_R::new(((self.bits >> 1) & 0x01) != 0) - } - } - impl W { - #[doc = "Bit 0 - Enable DMAC"] - #[inline(always)] - pub fn dmac_en(&mut self) -> DMAC_EN_W { - DMAC_EN_W { w: self } - } - #[doc = "Bit 1 - Globally enable interrupt generation"] - #[inline(always)] - pub fn int_en(&mut self) -> INT_EN_W { - INT_EN_W { w: self } - } - } - } - #[doc = "Channel Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [chen](chen) module"] - pub type CHEN = crate::Reg; - #[allow(missing_docs)] - #[doc(hidden)] - pub struct _CHEN; - #[doc = "`read()` method returns [chen::R](chen::R) reader structure"] - impl crate::Readable for CHEN {} - #[doc = "`write(|w| ..)` method takes [chen::W](chen::W) writer structure"] - impl crate::Writable for CHEN {} - #[doc = "Channel Enable Register"] - pub mod chen { - #[doc = "Reader of register chen"] - pub type R = crate::R; - #[doc = "Writer for register chen"] - pub type W = crate::W; - #[doc = "Register chen `reset()`'s with value 0"] - impl crate::ResetValue for super::CHEN { - type Type = u64; - #[inline(always)] - fn reset_value() -> Self::Type { - 0 - } - } - #[doc = "Reader of field `ch1_en`"] - pub type CH1_EN_R = crate::R; - #[doc = "Write proxy for field `ch1_en`"] - pub struct CH1_EN_W<'a> { - w: &'a mut W, - } - impl<'a> CH1_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `ch2_en`"] - pub type CH2_EN_R = crate::R; - #[doc = "Write proxy for field `ch2_en`"] - pub struct CH2_EN_W<'a> { - w: &'a mut W, - } - impl<'a> CH2_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `ch3_en`"] - pub type CH3_EN_R = crate::R; - #[doc = "Write proxy for field `ch3_en`"] - pub struct CH3_EN_W<'a> { - w: &'a mut W, - } - impl<'a> CH3_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `ch4_en`"] - pub type CH4_EN_R = crate::R; - #[doc = "Write proxy for field `ch4_en`"] - pub struct CH4_EN_W<'a> { - w: &'a mut W, - } - impl<'a> CH4_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); - self.w + #[doc = "Reader of field `lli_rd_dec_err`"] + pub type LLI_RD_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_rd_dec_err`"] + pub struct LLI_RD_DEC_ERR_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch5_en`"] - pub type CH5_EN_R = crate::R; - #[doc = "Write proxy for field `ch5_en`"] - pub struct CH5_EN_W<'a> { - w: &'a mut W, - } - impl<'a> CH5_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> LLI_RD_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u64) & 0x01) << 9); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `lli_wr_dec_err`"] + pub type LLI_WR_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_wr_dec_err`"] + pub struct LLI_WR_DEC_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); - self.w + impl<'a> LLI_WR_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u64) & 0x01) << 10); + self.w + } } - } - #[doc = "Reader of field `ch6_en`"] - pub type CH6_EN_R = crate::R; - #[doc = "Write proxy for field `ch6_en`"] - pub struct CH6_EN_W<'a> { - w: &'a mut W, - } - impl<'a> CH6_EN_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `lli_rd_slv_err`"] + pub type LLI_RD_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_rd_slv_err`"] + pub struct LLI_RD_SLV_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> LLI_RD_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u64) & 0x01) << 11); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); - self.w + #[doc = "Reader of field `lli_wr_slv_err`"] + pub type LLI_WR_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_wr_slv_err`"] + pub struct LLI_WR_SLV_ERR_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch1_en_we`"] - pub type CH1_EN_WE_R = crate::R; - #[doc = "Write proxy for field `ch1_en_we`"] - pub struct CH1_EN_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH1_EN_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> LLI_WR_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u64) & 0x01) << 12); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl R { + #[doc = "Bit 0 - Block transfer done"] + #[inline(always)] + pub fn block_tfr_done(&self) -> BLOCK_TFR_DONE_R { + BLOCK_TFR_DONE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Transfer done"] + #[inline(always)] + pub fn tfr_done(&self) -> TFR_DONE_R { + TFR_DONE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 3 - Source transaction complete"] + #[inline(always)] + pub fn src_transcomp(&self) -> SRC_TRANSCOMP_R { + SRC_TRANSCOMP_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Destination transaction complete"] + #[inline(always)] + pub fn dst_transcomp(&self) -> DST_TRANSCOMP_R { + DST_TRANSCOMP_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Source Decode Error"] + #[inline(always)] + pub fn src_dec_err(&self) -> SRC_DEC_ERR_R { + SRC_DEC_ERR_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Destination Decode Error"] + #[inline(always)] + pub fn dst_dec_err(&self) -> DST_DEC_ERR_R { + DST_DEC_ERR_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Source Slave Error"] + #[inline(always)] + pub fn src_slv_err(&self) -> SRC_SLV_ERR_R { + SRC_SLV_ERR_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Destination Slave Error"] + #[inline(always)] + pub fn dst_slv_err(&self) -> DST_SLV_ERR_R { + DST_SLV_ERR_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[inline(always)] + pub fn lli_rd_dec_err(&self) -> LLI_RD_DEC_ERR_R { + LLI_RD_DEC_ERR_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[inline(always)] + pub fn lli_wr_dec_err(&self) -> LLI_WR_DEC_ERR_R { + LLI_WR_DEC_ERR_R::new(((self.bits >> 10) & 0x01) != 0) + } + #[doc = "Bit 11 - LLI Read Slave Error"] + #[inline(always)] + pub fn lli_rd_slv_err(&self) -> LLI_RD_SLV_ERR_R { + LLI_RD_SLV_ERR_R::new(((self.bits >> 11) & 0x01) != 0) + } + #[doc = "Bit 12 - LLI WRITE Slave Error"] + #[inline(always)] + pub fn lli_wr_slv_err(&self) -> LLI_WR_SLV_ERR_R { + LLI_WR_SLV_ERR_R::new(((self.bits >> 12) & 0x01) != 0) + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u64) & 0x01) << 8); - self.w + impl W { + #[doc = "Bit 0 - Block transfer done"] + #[inline(always)] + pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W { + BLOCK_TFR_DONE_W { w: self } + } + #[doc = "Bit 1 - Transfer done"] + #[inline(always)] + pub fn tfr_done(&mut self) -> TFR_DONE_W { + TFR_DONE_W { w: self } + } + #[doc = "Bit 3 - Source transaction complete"] + #[inline(always)] + pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W { + SRC_TRANSCOMP_W { w: self } + } + #[doc = "Bit 4 - Destination transaction complete"] + #[inline(always)] + pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W { + DST_TRANSCOMP_W { w: self } + } + #[doc = "Bit 5 - Source Decode Error"] + #[inline(always)] + pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W { + SRC_DEC_ERR_W { w: self } + } + #[doc = "Bit 6 - Destination Decode Error"] + #[inline(always)] + pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W { + DST_DEC_ERR_W { w: self } + } + #[doc = "Bit 7 - Source Slave Error"] + #[inline(always)] + pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W { + SRC_SLV_ERR_W { w: self } + } + #[doc = "Bit 8 - Destination Slave Error"] + #[inline(always)] + pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W { + DST_SLV_ERR_W { w: self } + } + #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[inline(always)] + pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W { + LLI_RD_DEC_ERR_W { w: self } + } + #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[inline(always)] + pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W { + LLI_WR_DEC_ERR_W { w: self } + } + #[doc = "Bit 11 - LLI Read Slave Error"] + #[inline(always)] + pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W { + LLI_RD_SLV_ERR_W { w: self } + } + #[doc = "Bit 12 - LLI WRITE Slave Error"] + #[inline(always)] + pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W { + LLI_WR_SLV_ERR_W { w: self } + } } } - #[doc = "Reader of field `ch2_en_we`"] - pub type CH2_EN_WE_R = crate::R; - #[doc = "Write proxy for field `ch2_en_we`"] - pub struct CH2_EN_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH2_EN_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Interrupt Signal Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intsignal_en](intsignal_en) module"] + pub type INTSIGNAL_EN = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INTSIGNAL_EN; + #[doc = "`read()` method returns [intsignal_en::R](intsignal_en::R) reader structure"] + impl crate::Readable for INTSIGNAL_EN {} + #[doc = "`write(|w| ..)` method takes [intsignal_en::W](intsignal_en::W) writer structure"] + impl crate::Writable for INTSIGNAL_EN {} + #[doc = "Interrupt Signal Enable Register"] + pub mod intsignal_en { + #[doc = "Reader of register intsignal_en"] + pub type R = crate::R; + #[doc = "Writer for register intsignal_en"] + pub type W = crate::W; + #[doc = "Register intsignal_en `reset()`'s with value 0"] + impl crate::ResetValue for super::INTSIGNAL_EN { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `block_tfr_done`"] + pub type BLOCK_TFR_DONE_R = crate::R; + #[doc = "Write proxy for field `block_tfr_done`"] + pub struct BLOCK_TFR_DONE_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u64) & 0x01) << 9); - self.w + impl<'a> BLOCK_TFR_DONE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); + self.w + } } - } - #[doc = "Reader of field `ch3_en_we`"] - pub type CH3_EN_WE_R = crate::R; - #[doc = "Write proxy for field `ch3_en_we`"] - pub struct CH3_EN_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH3_EN_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `tfr_done`"] + pub type TFR_DONE_R = crate::R; + #[doc = "Write proxy for field `tfr_done`"] + pub struct TFR_DONE_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> TFR_DONE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u64) & 0x01) << 10); - self.w + #[doc = "Reader of field `src_transcomp`"] + pub type SRC_TRANSCOMP_R = crate::R; + #[doc = "Write proxy for field `src_transcomp`"] + pub struct SRC_TRANSCOMP_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch4_en_we`"] - pub type CH4_EN_WE_R = crate::R; - #[doc = "Write proxy for field `ch4_en_we`"] - pub struct CH4_EN_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH4_EN_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> SRC_TRANSCOMP_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `dst_transcomp`"] + pub type DST_TRANSCOMP_R = crate::R; + #[doc = "Write proxy for field `dst_transcomp`"] + pub struct DST_TRANSCOMP_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u64) & 0x01) << 11); - self.w + impl<'a> DST_TRANSCOMP_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); + self.w + } } - } - #[doc = "Reader of field `ch5_en_we`"] - pub type CH5_EN_WE_R = crate::R; - #[doc = "Write proxy for field `ch5_en_we`"] - pub struct CH5_EN_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH5_EN_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `src_dec_err`"] + pub type SRC_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `src_dec_err`"] + pub struct SRC_DEC_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> SRC_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u64) & 0x01) << 12); - self.w + #[doc = "Reader of field `dst_dec_err`"] + pub type DST_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `dst_dec_err`"] + pub struct DST_DEC_ERR_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch6_en_we`"] - pub type CH6_EN_WE_R = crate::R; - #[doc = "Write proxy for field `ch6_en_we`"] - pub struct CH6_EN_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH6_EN_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> DST_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u64) & 0x01) << 6); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `src_slv_err`"] + pub type SRC_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `src_slv_err`"] + pub struct SRC_SLV_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u64) & 0x01) << 13); - self.w + impl<'a> SRC_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u64) & 0x01) << 7); + self.w + } } - } - #[doc = "Reader of field `ch1_susp`"] - pub type CH1_SUSP_R = crate::R; - #[doc = "Write proxy for field `ch1_susp`"] - pub struct CH1_SUSP_W<'a> { - w: &'a mut W, - } - impl<'a> CH1_SUSP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `dst_slv_err`"] + pub type DST_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `dst_slv_err`"] + pub struct DST_SLV_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> DST_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u64) & 0x01) << 8); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 16)) | (((value as u64) & 0x01) << 16); - self.w + #[doc = "Reader of field `lli_rd_dec_err`"] + pub type LLI_RD_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_rd_dec_err`"] + pub struct LLI_RD_DEC_ERR_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch2_susp`"] - pub type CH2_SUSP_R = crate::R; - #[doc = "Write proxy for field `ch2_susp`"] - pub struct CH2_SUSP_W<'a> { - w: &'a mut W, - } - impl<'a> CH2_SUSP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> LLI_RD_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u64) & 0x01) << 9); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `lli_wr_dec_err`"] + pub type LLI_WR_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_wr_dec_err`"] + pub struct LLI_WR_DEC_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 17)) | (((value as u64) & 0x01) << 17); - self.w + impl<'a> LLI_WR_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u64) & 0x01) << 10); + self.w + } } - } - #[doc = "Reader of field `ch3_susp`"] - pub type CH3_SUSP_R = crate::R; - #[doc = "Write proxy for field `ch3_susp`"] - pub struct CH3_SUSP_W<'a> { - w: &'a mut W, - } - impl<'a> CH3_SUSP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `lli_rd_slv_err`"] + pub type LLI_RD_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_rd_slv_err`"] + pub struct LLI_RD_SLV_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> LLI_RD_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u64) & 0x01) << 11); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 18)) | (((value as u64) & 0x01) << 18); - self.w + #[doc = "Reader of field `lli_wr_slv_err`"] + pub type LLI_WR_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_wr_slv_err`"] + pub struct LLI_WR_SLV_ERR_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch4_susp`"] - pub type CH4_SUSP_R = crate::R; - #[doc = "Write proxy for field `ch4_susp`"] - pub struct CH4_SUSP_W<'a> { - w: &'a mut W, - } - impl<'a> CH4_SUSP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> LLI_WR_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u64) & 0x01) << 12); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl R { + #[doc = "Bit 0 - Block transfer done"] + #[inline(always)] + pub fn block_tfr_done(&self) -> BLOCK_TFR_DONE_R { + BLOCK_TFR_DONE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Transfer done"] + #[inline(always)] + pub fn tfr_done(&self) -> TFR_DONE_R { + TFR_DONE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 3 - Source transaction complete"] + #[inline(always)] + pub fn src_transcomp(&self) -> SRC_TRANSCOMP_R { + SRC_TRANSCOMP_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Destination transaction complete"] + #[inline(always)] + pub fn dst_transcomp(&self) -> DST_TRANSCOMP_R { + DST_TRANSCOMP_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Source Decode Error"] + #[inline(always)] + pub fn src_dec_err(&self) -> SRC_DEC_ERR_R { + SRC_DEC_ERR_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Destination Decode Error"] + #[inline(always)] + pub fn dst_dec_err(&self) -> DST_DEC_ERR_R { + DST_DEC_ERR_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Source Slave Error"] + #[inline(always)] + pub fn src_slv_err(&self) -> SRC_SLV_ERR_R { + SRC_SLV_ERR_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Destination Slave Error"] + #[inline(always)] + pub fn dst_slv_err(&self) -> DST_SLV_ERR_R { + DST_SLV_ERR_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[inline(always)] + pub fn lli_rd_dec_err(&self) -> LLI_RD_DEC_ERR_R { + LLI_RD_DEC_ERR_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[inline(always)] + pub fn lli_wr_dec_err(&self) -> LLI_WR_DEC_ERR_R { + LLI_WR_DEC_ERR_R::new(((self.bits >> 10) & 0x01) != 0) + } + #[doc = "Bit 11 - LLI Read Slave Error"] + #[inline(always)] + pub fn lli_rd_slv_err(&self) -> LLI_RD_SLV_ERR_R { + LLI_RD_SLV_ERR_R::new(((self.bits >> 11) & 0x01) != 0) + } + #[doc = "Bit 12 - LLI WRITE Slave Error"] + #[inline(always)] + pub fn lli_wr_slv_err(&self) -> LLI_WR_SLV_ERR_R { + LLI_WR_SLV_ERR_R::new(((self.bits >> 12) & 0x01) != 0) + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 19)) | (((value as u64) & 0x01) << 19); - self.w + impl W { + #[doc = "Bit 0 - Block transfer done"] + #[inline(always)] + pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W { + BLOCK_TFR_DONE_W { w: self } + } + #[doc = "Bit 1 - Transfer done"] + #[inline(always)] + pub fn tfr_done(&mut self) -> TFR_DONE_W { + TFR_DONE_W { w: self } + } + #[doc = "Bit 3 - Source transaction complete"] + #[inline(always)] + pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W { + SRC_TRANSCOMP_W { w: self } + } + #[doc = "Bit 4 - Destination transaction complete"] + #[inline(always)] + pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W { + DST_TRANSCOMP_W { w: self } + } + #[doc = "Bit 5 - Source Decode Error"] + #[inline(always)] + pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W { + SRC_DEC_ERR_W { w: self } + } + #[doc = "Bit 6 - Destination Decode Error"] + #[inline(always)] + pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W { + DST_DEC_ERR_W { w: self } + } + #[doc = "Bit 7 - Source Slave Error"] + #[inline(always)] + pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W { + SRC_SLV_ERR_W { w: self } + } + #[doc = "Bit 8 - Destination Slave Error"] + #[inline(always)] + pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W { + DST_SLV_ERR_W { w: self } + } + #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[inline(always)] + pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W { + LLI_RD_DEC_ERR_W { w: self } + } + #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[inline(always)] + pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W { + LLI_WR_DEC_ERR_W { w: self } + } + #[doc = "Bit 11 - LLI Read Slave Error"] + #[inline(always)] + pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W { + LLI_RD_SLV_ERR_W { w: self } + } + #[doc = "Bit 12 - LLI WRITE Slave Error"] + #[inline(always)] + pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W { + LLI_WR_SLV_ERR_W { w: self } + } } } - #[doc = "Reader of field `ch5_susp`"] - pub type CH5_SUSP_R = crate::R; - #[doc = "Write proxy for field `ch5_susp`"] - pub struct CH5_SUSP_W<'a> { - w: &'a mut W, - } - impl<'a> CH5_SUSP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intclear](intclear) module"] + pub type INTCLEAR = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _INTCLEAR; + #[doc = "`read()` method returns [intclear::R](intclear::R) reader structure"] + impl crate::Readable for INTCLEAR {} + #[doc = "`write(|w| ..)` method takes [intclear::W](intclear::W) writer structure"] + impl crate::Writable for INTCLEAR {} + #[doc = "Interrupt Clear Register"] + pub mod intclear { + #[doc = "Reader of register intclear"] + pub type R = crate::R; + #[doc = "Writer for register intclear"] + pub type W = crate::W; + #[doc = "Register intclear `reset()`'s with value 0"] + impl crate::ResetValue for super::INTCLEAR { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `block_tfr_done`"] + pub type BLOCK_TFR_DONE_R = crate::R; + #[doc = "Write proxy for field `block_tfr_done`"] + pub struct BLOCK_TFR_DONE_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 20)) | (((value as u64) & 0x01) << 20); - self.w + impl<'a> BLOCK_TFR_DONE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); + self.w + } } - } - #[doc = "Reader of field `ch6_susp`"] - pub type CH6_SUSP_R = crate::R; - #[doc = "Write proxy for field `ch6_susp`"] - pub struct CH6_SUSP_W<'a> { - w: &'a mut W, - } - impl<'a> CH6_SUSP_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `tfr_done`"] + pub type TFR_DONE_R = crate::R; + #[doc = "Write proxy for field `tfr_done`"] + pub struct TFR_DONE_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> TFR_DONE_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 21)) | (((value as u64) & 0x01) << 21); - self.w + #[doc = "Reader of field `src_transcomp`"] + pub type SRC_TRANSCOMP_R = crate::R; + #[doc = "Write proxy for field `src_transcomp`"] + pub struct SRC_TRANSCOMP_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch1_susp_we`"] - pub type CH1_SUSP_WE_R = crate::R; - #[doc = "Write proxy for field `ch1_susp_we`"] - pub struct CH1_SUSP_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH1_SUSP_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> SRC_TRANSCOMP_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `dst_transcomp`"] + pub type DST_TRANSCOMP_R = crate::R; + #[doc = "Write proxy for field `dst_transcomp`"] + pub struct DST_TRANSCOMP_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u64) & 0x01) << 24); - self.w + impl<'a> DST_TRANSCOMP_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); + self.w + } } - } - #[doc = "Reader of field `ch2_susp_we`"] - pub type CH2_SUSP_WE_R = crate::R; - #[doc = "Write proxy for field `ch2_susp_we`"] - pub struct CH2_SUSP_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH2_SUSP_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `src_dec_err`"] + pub type SRC_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `src_dec_err`"] + pub struct SRC_DEC_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> SRC_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 25)) | (((value as u64) & 0x01) << 25); - self.w + #[doc = "Reader of field `dst_dec_err`"] + pub type DST_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `dst_dec_err`"] + pub struct DST_DEC_ERR_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch3_susp_we`"] - pub type CH3_SUSP_WE_R = crate::R; - #[doc = "Write proxy for field `ch3_susp_we`"] - pub struct CH3_SUSP_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH3_SUSP_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> DST_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u64) & 0x01) << 6); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `src_slv_err`"] + pub type SRC_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `src_slv_err`"] + pub struct SRC_SLV_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 26)) | (((value as u64) & 0x01) << 26); - self.w + impl<'a> SRC_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u64) & 0x01) << 7); + self.w + } } - } - #[doc = "Reader of field `ch4_susp_we`"] - pub type CH4_SUSP_WE_R = crate::R; - #[doc = "Write proxy for field `ch4_susp_we`"] - pub struct CH4_SUSP_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH4_SUSP_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `dst_slv_err`"] + pub type DST_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `dst_slv_err`"] + pub struct DST_SLV_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> DST_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u64) & 0x01) << 8); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 27)) | (((value as u64) & 0x01) << 27); - self.w + #[doc = "Reader of field `lli_rd_dec_err`"] + pub type LLI_RD_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_rd_dec_err`"] + pub struct LLI_RD_DEC_ERR_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch5_susp_we`"] - pub type CH5_SUSP_WE_R = crate::R; - #[doc = "Write proxy for field `ch5_susp_we`"] - pub struct CH5_SUSP_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH5_SUSP_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> LLI_RD_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u64) & 0x01) << 9); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + #[doc = "Reader of field `lli_wr_dec_err`"] + pub type LLI_WR_DEC_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_wr_dec_err`"] + pub struct LLI_WR_DEC_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 28)) | (((value as u64) & 0x01) << 28); - self.w + impl<'a> LLI_WR_DEC_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u64) & 0x01) << 10); + self.w + } } - } - #[doc = "Reader of field `ch6_susp_we`"] - pub type CH6_SUSP_WE_R = crate::R; - #[doc = "Write proxy for field `ch6_susp_we`"] - pub struct CH6_SUSP_WE_W<'a> { - w: &'a mut W, - } - impl<'a> CH6_SUSP_WE_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + #[doc = "Reader of field `lli_rd_slv_err`"] + pub type LLI_RD_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_rd_slv_err`"] + pub struct LLI_RD_SLV_ERR_W<'a> { + w: &'a mut W, } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl<'a> LLI_RD_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u64) & 0x01) << 11); + self.w + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 29)) | (((value as u64) & 0x01) << 29); - self.w + #[doc = "Reader of field `lli_wr_slv_err`"] + pub type LLI_WR_SLV_ERR_R = crate::R; + #[doc = "Write proxy for field `lli_wr_slv_err`"] + pub struct LLI_WR_SLV_ERR_W<'a> { + w: &'a mut W, } - } - #[doc = "Reader of field `ch1_abort`"] - pub type CH1_ABORT_R = crate::R; - #[doc = "Write proxy for field `ch1_abort`"] - pub struct CH1_ABORT_W<'a> { - w: &'a mut W, - } - impl<'a> CH1_ABORT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + impl<'a> LLI_WR_SLV_ERR_W<'a> { + #[doc = r"Sets the field bit"] + #[inline(always)] + pub fn set_bit(self) -> &'a mut W { + self.bit(true) + } + #[doc = r"Clears the field bit"] + #[inline(always)] + pub fn clear_bit(self) -> &'a mut W { + self.bit(false) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub fn bit(self, value: bool) -> &'a mut W { + self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u64) & 0x01) << 12); + self.w + } } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + impl R { + #[doc = "Bit 0 - Block transfer done"] + #[inline(always)] + pub fn block_tfr_done(&self) -> BLOCK_TFR_DONE_R { + BLOCK_TFR_DONE_R::new((self.bits & 0x01) != 0) + } + #[doc = "Bit 1 - Transfer done"] + #[inline(always)] + pub fn tfr_done(&self) -> TFR_DONE_R { + TFR_DONE_R::new(((self.bits >> 1) & 0x01) != 0) + } + #[doc = "Bit 3 - Source transaction complete"] + #[inline(always)] + pub fn src_transcomp(&self) -> SRC_TRANSCOMP_R { + SRC_TRANSCOMP_R::new(((self.bits >> 3) & 0x01) != 0) + } + #[doc = "Bit 4 - Destination transaction complete"] + #[inline(always)] + pub fn dst_transcomp(&self) -> DST_TRANSCOMP_R { + DST_TRANSCOMP_R::new(((self.bits >> 4) & 0x01) != 0) + } + #[doc = "Bit 5 - Source Decode Error"] + #[inline(always)] + pub fn src_dec_err(&self) -> SRC_DEC_ERR_R { + SRC_DEC_ERR_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Bit 6 - Destination Decode Error"] + #[inline(always)] + pub fn dst_dec_err(&self) -> DST_DEC_ERR_R { + DST_DEC_ERR_R::new(((self.bits >> 6) & 0x01) != 0) + } + #[doc = "Bit 7 - Source Slave Error"] + #[inline(always)] + pub fn src_slv_err(&self) -> SRC_SLV_ERR_R { + SRC_SLV_ERR_R::new(((self.bits >> 7) & 0x01) != 0) + } + #[doc = "Bit 8 - Destination Slave Error"] + #[inline(always)] + pub fn dst_slv_err(&self) -> DST_SLV_ERR_R { + DST_SLV_ERR_R::new(((self.bits >> 8) & 0x01) != 0) + } + #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[inline(always)] + pub fn lli_rd_dec_err(&self) -> LLI_RD_DEC_ERR_R { + LLI_RD_DEC_ERR_R::new(((self.bits >> 9) & 0x01) != 0) + } + #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[inline(always)] + pub fn lli_wr_dec_err(&self) -> LLI_WR_DEC_ERR_R { + LLI_WR_DEC_ERR_R::new(((self.bits >> 10) & 0x01) != 0) + } + #[doc = "Bit 11 - LLI Read Slave Error"] + #[inline(always)] + pub fn lli_rd_slv_err(&self) -> LLI_RD_SLV_ERR_R { + LLI_RD_SLV_ERR_R::new(((self.bits >> 11) & 0x01) != 0) + } + #[doc = "Bit 12 - LLI WRITE Slave Error"] + #[inline(always)] + pub fn lli_wr_slv_err(&self) -> LLI_WR_SLV_ERR_R { + LLI_WR_SLV_ERR_R::new(((self.bits >> 12) & 0x01) != 0) + } } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 32)) | (((value as u64) & 0x01) << 32); - self.w + impl W { + #[doc = "Bit 0 - Block transfer done"] + #[inline(always)] + pub fn block_tfr_done(&mut self) -> BLOCK_TFR_DONE_W { + BLOCK_TFR_DONE_W { w: self } + } + #[doc = "Bit 1 - Transfer done"] + #[inline(always)] + pub fn tfr_done(&mut self) -> TFR_DONE_W { + TFR_DONE_W { w: self } + } + #[doc = "Bit 3 - Source transaction complete"] + #[inline(always)] + pub fn src_transcomp(&mut self) -> SRC_TRANSCOMP_W { + SRC_TRANSCOMP_W { w: self } + } + #[doc = "Bit 4 - Destination transaction complete"] + #[inline(always)] + pub fn dst_transcomp(&mut self) -> DST_TRANSCOMP_W { + DST_TRANSCOMP_W { w: self } + } + #[doc = "Bit 5 - Source Decode Error"] + #[inline(always)] + pub fn src_dec_err(&mut self) -> SRC_DEC_ERR_W { + SRC_DEC_ERR_W { w: self } + } + #[doc = "Bit 6 - Destination Decode Error"] + #[inline(always)] + pub fn dst_dec_err(&mut self) -> DST_DEC_ERR_W { + DST_DEC_ERR_W { w: self } + } + #[doc = "Bit 7 - Source Slave Error"] + #[inline(always)] + pub fn src_slv_err(&mut self) -> SRC_SLV_ERR_W { + SRC_SLV_ERR_W { w: self } + } + #[doc = "Bit 8 - Destination Slave Error"] + #[inline(always)] + pub fn dst_slv_err(&mut self) -> DST_SLV_ERR_W { + DST_SLV_ERR_W { w: self } + } + #[doc = "Bit 9 - LLI Read Decode Error Status Enable"] + #[inline(always)] + pub fn lli_rd_dec_err(&mut self) -> LLI_RD_DEC_ERR_W { + LLI_RD_DEC_ERR_W { w: self } + } + #[doc = "Bit 10 - LLI WRITE Decode Error"] + #[inline(always)] + pub fn lli_wr_dec_err(&mut self) -> LLI_WR_DEC_ERR_W { + LLI_WR_DEC_ERR_W { w: self } + } + #[doc = "Bit 11 - LLI Read Slave Error"] + #[inline(always)] + pub fn lli_rd_slv_err(&mut self) -> LLI_RD_SLV_ERR_W { + LLI_RD_SLV_ERR_W { w: self } + } + #[doc = "Bit 12 - LLI WRITE Slave Error"] + #[inline(always)] + pub fn lli_wr_slv_err(&mut self) -> LLI_WR_SLV_ERR_W { + LLI_WR_SLV_ERR_W { w: self } + } } } - #[doc = "Reader of field `ch2_abort`"] - pub type CH2_ABORT_R = crate::R; - #[doc = "Write proxy for field `ch2_abort`"] - pub struct CH2_ABORT_W<'a> { - w: &'a mut W, + #[doc = "Padding to make structure size 256 bytes so that channels\\[\\] +is an array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_reserved](_reserved) module"] + pub type _RESERVED = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct __RESERVED; + #[doc = "`read()` method returns [_reserved::R](_reserved::R) reader structure"] + impl crate::Readable for _RESERVED {} + #[doc = "`write(|w| ..)` method takes [_reserved::W](_reserved::W) writer structure"] + impl crate::Writable for _RESERVED {} + #[doc = "Padding to make structure size 256 bytes so that channels\\[\\] +is an array"] + pub mod _reserved { + #[doc = "Reader of register _reserved"] + pub type R = crate::R; + #[doc = "Writer for register _reserved"] + pub type W = crate::W; + #[doc = "Register _reserved `reset()`'s with value 0"] + impl crate::ResetValue for super::_RESERVED { + type Type = u64; + #[inline(always)] + fn reset_value() -> Self::Type { + 0 + } + } + impl R {} + impl W {} } - impl<'a> CH2_ABORT_W<'a> { - #[doc = r"Sets the field bit"] + } + #[doc = "ID Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id](id) module"] + pub type ID = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _ID; + #[doc = "`read()` method returns [id::R](id::R) reader structure"] + impl crate::Readable for ID {} + #[doc = "`write(|w| ..)` method takes [id::W](id::W) writer structure"] + impl crate::Writable for ID {} + #[doc = "ID Register"] + pub mod id { + #[doc = "Reader of register id"] + pub type R = crate::R; + #[doc = "Writer for register id"] + pub type W = crate::W; + #[doc = "Register id `reset()`'s with value 0"] + impl crate::ResetValue for super::ID { + type Type = u64; #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + fn reset_value() -> Self::Type { + 0 } - #[doc = r"Clears the field bit"] + } + impl R {} + impl W {} + } + #[doc = "COMPVER Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [compver](compver) module"] + pub type COMPVER = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _COMPVER; + #[doc = "`read()` method returns [compver::R](compver::R) reader structure"] + impl crate::Readable for COMPVER {} + #[doc = "`write(|w| ..)` method takes [compver::W](compver::W) writer structure"] + impl crate::Writable for COMPVER {} + #[doc = "COMPVER Register"] + pub mod compver { + #[doc = "Reader of register compver"] + pub type R = crate::R; + #[doc = "Writer for register compver"] + pub type W = crate::W; + #[doc = "Register compver `reset()`'s with value 0"] + impl crate::ResetValue for super::COMPVER { + type Type = u64; #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + fn reset_value() -> Self::Type { + 0 } - #[doc = r"Writes raw bits to the field"] + } + impl R {} + impl W {} + } + #[doc = "Configure Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."] + pub type CFG = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _CFG; + #[doc = "`read()` method returns [cfg::R](cfg::R) reader structure"] + impl crate::Readable for CFG {} + #[doc = "`write(|w| ..)` method takes [cfg::W](cfg::W) writer structure"] + impl crate::Writable for CFG {} + #[doc = "Configure Register"] + pub mod cfg { + #[doc = "Reader of register cfg"] + pub type R = crate::R; + #[doc = "Writer for register cfg"] + pub type W = crate::W; + #[doc = "Register cfg `reset()`'s with value 0"] + impl crate::ResetValue for super::CFG { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 33)) | (((value as u64) & 0x01) << 33); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `ch3_abort`"] - pub type CH3_ABORT_R = crate::R; - #[doc = "Write proxy for field `ch3_abort`"] - pub struct CH3_ABORT_W<'a> { + #[doc = "Reader of field `dmac_en`"] + pub type DMAC_EN_R = crate::R; + #[doc = "Write proxy for field `dmac_en`"] + pub struct DMAC_EN_W<'a> { w: &'a mut W, } - impl<'a> CH3_ABORT_W<'a> { + impl<'a> DMAC_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28222,17 +16088,17 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 34)) | (((value as u64) & 0x01) << 34); + self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); self.w } } - #[doc = "Reader of field `ch4_abort`"] - pub type CH4_ABORT_R = crate::R; - #[doc = "Write proxy for field `ch4_abort`"] - pub struct CH4_ABORT_W<'a> { + #[doc = "Reader of field `int_en`"] + pub type INT_EN_R = crate::R; + #[doc = "Write proxy for field `int_en`"] + pub struct INT_EN_W<'a> { w: &'a mut W, } - impl<'a> CH4_ABORT_W<'a> { + impl<'a> INT_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28246,65 +16112,66 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 35)) | (((value as u64) & 0x01) << 35); + self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); self.w } } - #[doc = "Reader of field `ch5_abort`"] - pub type CH5_ABORT_R = crate::R; - #[doc = "Write proxy for field `ch5_abort`"] - pub struct CH5_ABORT_W<'a> { - w: &'a mut W, - } - impl<'a> CH5_ABORT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] + impl R { + #[doc = "Bit 0 - Enable DMAC"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn dmac_en(&self) -> DMAC_EN_R { + DMAC_EN_R::new((self.bits & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] + #[doc = "Bit 1 - Globally enable interrupt generation"] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 36)) | (((value as u64) & 0x01) << 36); - self.w + pub fn int_en(&self) -> INT_EN_R { + INT_EN_R::new(((self.bits >> 1) & 0x01) != 0) } } - #[doc = "Reader of field `ch6_abort`"] - pub type CH6_ABORT_R = crate::R; - #[doc = "Write proxy for field `ch6_abort`"] - pub struct CH6_ABORT_W<'a> { - w: &'a mut W, - } - impl<'a> CH6_ABORT_W<'a> { - #[doc = r"Sets the field bit"] + impl W { + #[doc = "Bit 0 - Enable DMAC"] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub fn dmac_en(&mut self) -> DMAC_EN_W { + DMAC_EN_W { w: self } } - #[doc = r"Clears the field bit"] + #[doc = "Bit 1 - Globally enable interrupt generation"] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub fn int_en(&mut self) -> INT_EN_W { + INT_EN_W { w: self } } - #[doc = r"Writes raw bits to the field"] + } + } + #[doc = "Channel Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [chen](chen) module"] + pub type CHEN = crate::Reg; + #[allow(missing_docs)] + #[doc(hidden)] + pub struct _CHEN; + #[doc = "`read()` method returns [chen::R](chen::R) reader structure"] + impl crate::Readable for CHEN {} + #[doc = "`write(|w| ..)` method takes [chen::W](chen::W) writer structure"] + impl crate::Writable for CHEN {} + #[doc = "Channel Enable Register"] + pub mod chen { + #[doc = "Reader of register chen"] + pub type R = crate::R; + #[doc = "Writer for register chen"] + pub type W = crate::W; + #[doc = "Register chen `reset()`'s with value 0"] + impl crate::ResetValue for super::CHEN { + type Type = u64; #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 37)) | (((value as u64) & 0x01) << 37); - self.w + fn reset_value() -> Self::Type { + 0 } } - #[doc = "Reader of field `ch1_abort_we`"] - pub type CH1_ABORT_WE_R = crate::R; - #[doc = "Write proxy for field `ch1_abort_we`"] - pub struct CH1_ABORT_WE_W<'a> { + #[doc = "Reader of field `ch%s_en`"] + pub type CH_EN_R = crate::R; + #[doc = "Write proxy for fields `ch_en(1-6)`"] + pub struct CH_EN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> CH1_ABORT_WE_W<'a> { + impl<'a> CH_EN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28318,17 +16185,19 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 40)) | (((value as u64) & 0x01) << 40); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u64) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `ch2_abort_we`"] - pub type CH2_ABORT_WE_R = crate::R; - #[doc = "Write proxy for field `ch2_abort_we`"] - pub struct CH2_ABORT_WE_W<'a> { + #[doc = "Reader of field `ch%s_en_we`"] + pub type CH_EN_WE_R = crate::R; + #[doc = "Write proxy for fields `ch_en_we(1-6)`"] + pub struct CH_EN_WE_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> CH2_ABORT_WE_W<'a> { + impl<'a> CH_EN_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28342,17 +16211,19 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 41)) | (((value as u64) & 0x01) << 41); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u64) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `ch3_abort_we`"] - pub type CH3_ABORT_WE_R = crate::R; - #[doc = "Write proxy for field `ch3_abort_we`"] - pub struct CH3_ABORT_WE_W<'a> { + #[doc = "Reader of field `ch%s_susp`"] + pub type CH_SUSP_R = crate::R; + #[doc = "Write proxy for fields `ch_susp(1-6)`"] + pub struct CH_SUSP_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> CH3_ABORT_WE_W<'a> { + impl<'a> CH_SUSP_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28366,17 +16237,19 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 42)) | (((value as u64) & 0x01) << 42); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u64) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `ch4_abort_we`"] - pub type CH4_ABORT_WE_R = crate::R; - #[doc = "Write proxy for field `ch4_abort_we`"] - pub struct CH4_ABORT_WE_W<'a> { + #[doc = "Reader of field `ch%s_susp_we`"] + pub type CH_SUSP_WE_R = crate::R; + #[doc = "Write proxy for fields `ch_susp_we(1-6)`"] + pub struct CH_SUSP_WE_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> CH4_ABORT_WE_W<'a> { + impl<'a> CH_SUSP_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28390,17 +16263,18 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 43)) | (((value as u64) & 0x01) << 43); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u64) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `ch5_abort_we`"] - pub type CH5_ABORT_WE_R = crate::R; - #[doc = "Write proxy for field `ch5_abort_we`"] - pub struct CH5_ABORT_WE_W<'a> { + #[doc = "Reader of field `ch%s_abort`"] + pub type CH_ABORT_R = crate::R; + #[doc = "Write proxy for field `ch%s_abort`"] + pub struct CH_ABORT_W<'a> { w: &'a mut W, } - impl<'a> CH5_ABORT_WE_W<'a> { + impl<'a> CH_ABORT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28414,17 +16288,18 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 44)) | (((value as u64) & 0x01) << 44); + self.w.bits = (self.w.bits & !(0x01 << 32)) | (((value as u64) & 0x01) << 32); self.w } } - #[doc = "Reader of field `ch6_abort_we`"] - pub type CH6_ABORT_WE_R = crate::R; - #[doc = "Write proxy for field `ch6_abort_we`"] - pub struct CH6_ABORT_WE_W<'a> { + #[doc = "Reader of field `ch%s_abort_we`"] + pub type CH_ABORT_WE_R = crate::R; + #[doc = "Write proxy for fields `ch_abort_we(1-6)`"] + pub struct CH_ABORT_WE_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> CH6_ABORT_WE_W<'a> { + impl<'a> CH_ABORT_WE_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28438,376 +16313,458 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 45)) | (((value as u64) & 0x01) << 45); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u64) & 0x01) << self.offset); self.w } } impl R { + #[doc = "Enable channel %s"] + #[inline(always)] + pub unsafe fn ch_en(&self, n: usize) -> CH_EN_R { + CH_EN_R::new(((self.bits >> n - 1) & 0x01) != 0) + } #[doc = "Bit 0 - Enable channel 1"] #[inline(always)] - pub fn ch1_en(&self) -> CH1_EN_R { - CH1_EN_R::new((self.bits & 0x01) != 0) + pub fn ch1_en(&self) -> CH_EN_R { + CH_EN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Enable channel 2"] #[inline(always)] - pub fn ch2_en(&self) -> CH2_EN_R { - CH2_EN_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch2_en(&self) -> CH_EN_R { + CH_EN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Enable channel 3"] #[inline(always)] - pub fn ch3_en(&self) -> CH3_EN_R { - CH3_EN_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch3_en(&self) -> CH_EN_R { + CH_EN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Enable channel 4"] #[inline(always)] - pub fn ch4_en(&self) -> CH4_EN_R { - CH4_EN_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn ch4_en(&self) -> CH_EN_R { + CH_EN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Enable channel 5"] #[inline(always)] - pub fn ch5_en(&self) -> CH5_EN_R { - CH5_EN_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn ch5_en(&self) -> CH_EN_R { + CH_EN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Enable channel 6"] #[inline(always)] - pub fn ch6_en(&self) -> CH6_EN_R { - CH6_EN_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn ch6_en(&self) -> CH_EN_R { + CH_EN_R::new(((self.bits >> 5) & 0x01) != 0) + } + #[doc = "Write enable channel %s"] + #[inline(always)] + pub unsafe fn ch_en_we(&self, n: usize) -> CH_EN_WE_R { + CH_EN_WE_R::new(((self.bits >> n - 1 + 8) & 0x01) != 0) } #[doc = "Bit 8 - Write enable channel 1"] #[inline(always)] - pub fn ch1_en_we(&self) -> CH1_EN_WE_R { - CH1_EN_WE_R::new(((self.bits >> 8) & 0x01) != 0) + pub fn ch1_en_we(&self) -> CH_EN_WE_R { + CH_EN_WE_R::new(((self.bits >> 8) & 0x01) != 0) } #[doc = "Bit 9 - Write enable channel 2"] #[inline(always)] - pub fn ch2_en_we(&self) -> CH2_EN_WE_R { - CH2_EN_WE_R::new(((self.bits >> 9) & 0x01) != 0) + pub fn ch2_en_we(&self) -> CH_EN_WE_R { + CH_EN_WE_R::new(((self.bits >> 9) & 0x01) != 0) } #[doc = "Bit 10 - Write enable channel 3"] #[inline(always)] - pub fn ch3_en_we(&self) -> CH3_EN_WE_R { - CH3_EN_WE_R::new(((self.bits >> 10) & 0x01) != 0) + pub fn ch3_en_we(&self) -> CH_EN_WE_R { + CH_EN_WE_R::new(((self.bits >> 10) & 0x01) != 0) } #[doc = "Bit 11 - Write enable channel 4"] #[inline(always)] - pub fn ch4_en_we(&self) -> CH4_EN_WE_R { - CH4_EN_WE_R::new(((self.bits >> 11) & 0x01) != 0) + pub fn ch4_en_we(&self) -> CH_EN_WE_R { + CH_EN_WE_R::new(((self.bits >> 11) & 0x01) != 0) } #[doc = "Bit 12 - Write enable channel 5"] #[inline(always)] - pub fn ch5_en_we(&self) -> CH5_EN_WE_R { - CH5_EN_WE_R::new(((self.bits >> 12) & 0x01) != 0) + pub fn ch5_en_we(&self) -> CH_EN_WE_R { + CH_EN_WE_R::new(((self.bits >> 12) & 0x01) != 0) } #[doc = "Bit 13 - Write enable channel 6"] #[inline(always)] - pub fn ch6_en_we(&self) -> CH6_EN_WE_R { - CH6_EN_WE_R::new(((self.bits >> 13) & 0x01) != 0) + pub fn ch6_en_we(&self) -> CH_EN_WE_R { + CH_EN_WE_R::new(((self.bits >> 13) & 0x01) != 0) + } + #[doc = "Suspend request channel %s"] + #[inline(always)] + pub unsafe fn ch_susp(&self, n: usize) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> n - 1 + 16) & 0x01) != 0) } #[doc = "Bit 16 - Suspend request channel 1"] #[inline(always)] - pub fn ch1_susp(&self) -> CH1_SUSP_R { - CH1_SUSP_R::new(((self.bits >> 16) & 0x01) != 0) + pub fn ch1_susp(&self) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> 16) & 0x01) != 0) } #[doc = "Bit 17 - Suspend request channel 2"] #[inline(always)] - pub fn ch2_susp(&self) -> CH2_SUSP_R { - CH2_SUSP_R::new(((self.bits >> 17) & 0x01) != 0) + pub fn ch2_susp(&self) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> 17) & 0x01) != 0) } #[doc = "Bit 18 - Suspend request channel 3"] #[inline(always)] - pub fn ch3_susp(&self) -> CH3_SUSP_R { - CH3_SUSP_R::new(((self.bits >> 18) & 0x01) != 0) + pub fn ch3_susp(&self) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> 18) & 0x01) != 0) } #[doc = "Bit 19 - Suspend request channel 4"] #[inline(always)] - pub fn ch4_susp(&self) -> CH4_SUSP_R { - CH4_SUSP_R::new(((self.bits >> 19) & 0x01) != 0) + pub fn ch4_susp(&self) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> 19) & 0x01) != 0) } #[doc = "Bit 20 - Suspend request channel 5"] #[inline(always)] - pub fn ch5_susp(&self) -> CH5_SUSP_R { - CH5_SUSP_R::new(((self.bits >> 20) & 0x01) != 0) + pub fn ch5_susp(&self) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> 20) & 0x01) != 0) } #[doc = "Bit 21 - Suspend request channel 6"] #[inline(always)] - pub fn ch6_susp(&self) -> CH6_SUSP_R { - CH6_SUSP_R::new(((self.bits >> 21) & 0x01) != 0) + pub fn ch6_susp(&self) -> CH_SUSP_R { + CH_SUSP_R::new(((self.bits >> 21) & 0x01) != 0) + } + #[doc = "Enable write to ch%s_susp bit"] + #[inline(always)] + pub unsafe fn ch_susp_we(&self, n: usize) -> CH_SUSP_WE_R { + CH_SUSP_WE_R::new(((self.bits >> n - 1 + 24) & 0x01) != 0) } #[doc = "Bit 24 - Enable write to ch1_susp bit"] #[inline(always)] - pub fn ch1_susp_we(&self) -> CH1_SUSP_WE_R { - CH1_SUSP_WE_R::new(((self.bits >> 24) & 0x01) != 0) + pub fn ch1_susp_we(&self) -> CH_SUSP_WE_R { + CH_SUSP_WE_R::new(((self.bits >> 24) & 0x01) != 0) } #[doc = "Bit 25 - Enable write to ch2_susp bit"] #[inline(always)] - pub fn ch2_susp_we(&self) -> CH2_SUSP_WE_R { - CH2_SUSP_WE_R::new(((self.bits >> 25) & 0x01) != 0) + pub fn ch2_susp_we(&self) -> CH_SUSP_WE_R { + CH_SUSP_WE_R::new(((self.bits >> 25) & 0x01) != 0) } #[doc = "Bit 26 - Enable write to ch3_susp bit"] #[inline(always)] - pub fn ch3_susp_we(&self) -> CH3_SUSP_WE_R { - CH3_SUSP_WE_R::new(((self.bits >> 26) & 0x01) != 0) + pub fn ch3_susp_we(&self) -> CH_SUSP_WE_R { + CH_SUSP_WE_R::new(((self.bits >> 26) & 0x01) != 0) } #[doc = "Bit 27 - Enable write to ch4_susp bit"] #[inline(always)] - pub fn ch4_susp_we(&self) -> CH4_SUSP_WE_R { - CH4_SUSP_WE_R::new(((self.bits >> 27) & 0x01) != 0) + pub fn ch4_susp_we(&self) -> CH_SUSP_WE_R { + CH_SUSP_WE_R::new(((self.bits >> 27) & 0x01) != 0) } #[doc = "Bit 28 - Enable write to ch5_susp bit"] #[inline(always)] - pub fn ch5_susp_we(&self) -> CH5_SUSP_WE_R { - CH5_SUSP_WE_R::new(((self.bits >> 28) & 0x01) != 0) + pub fn ch5_susp_we(&self) -> CH_SUSP_WE_R { + CH_SUSP_WE_R::new(((self.bits >> 28) & 0x01) != 0) } #[doc = "Bit 29 - Enable write to ch6_susp bit"] #[inline(always)] - pub fn ch6_susp_we(&self) -> CH6_SUSP_WE_R { - CH6_SUSP_WE_R::new(((self.bits >> 29) & 0x01) != 0) - } - #[doc = "Bit 32 - Abort request channel 1"] - #[inline(always)] - pub fn ch1_abort(&self) -> CH1_ABORT_R { - CH1_ABORT_R::new(((self.bits >> 32) & 0x01) != 0) - } - #[doc = "Bit 33 - Abort request channel 2"] - #[inline(always)] - pub fn ch2_abort(&self) -> CH2_ABORT_R { - CH2_ABORT_R::new(((self.bits >> 33) & 0x01) != 0) - } - #[doc = "Bit 34 - Abort request channel 3"] - #[inline(always)] - pub fn ch3_abort(&self) -> CH3_ABORT_R { - CH3_ABORT_R::new(((self.bits >> 34) & 0x01) != 0) - } - #[doc = "Bit 35 - Abort request channel 4"] - #[inline(always)] - pub fn ch4_abort(&self) -> CH4_ABORT_R { - CH4_ABORT_R::new(((self.bits >> 35) & 0x01) != 0) + pub fn ch6_susp_we(&self) -> CH_SUSP_WE_R { + CH_SUSP_WE_R::new(((self.bits >> 29) & 0x01) != 0) } - #[doc = "Bit 36 - Abort request channel 5"] + #[doc = "Bit 32 - Abort request channel %s"] #[inline(always)] - pub fn ch5_abort(&self) -> CH5_ABORT_R { - CH5_ABORT_R::new(((self.bits >> 36) & 0x01) != 0) + pub fn ch_abort(&self) -> CH_ABORT_R { + CH_ABORT_R::new(((self.bits >> 32) & 0x01) != 0) } - #[doc = "Bit 37 - Abort request channel 6"] + #[doc = "Enable write to ch%s_abort bit"] #[inline(always)] - pub fn ch6_abort(&self) -> CH6_ABORT_R { - CH6_ABORT_R::new(((self.bits >> 37) & 0x01) != 0) + pub unsafe fn ch_abort_we(&self, n: usize) -> CH_ABORT_WE_R { + CH_ABORT_WE_R::new(((self.bits >> n - 1 + 40) & 0x01) != 0) } #[doc = "Bit 40 - Enable write to ch1_abort bit"] #[inline(always)] - pub fn ch1_abort_we(&self) -> CH1_ABORT_WE_R { - CH1_ABORT_WE_R::new(((self.bits >> 40) & 0x01) != 0) + pub fn ch1_abort_we(&self) -> CH_ABORT_WE_R { + CH_ABORT_WE_R::new(((self.bits >> 40) & 0x01) != 0) } #[doc = "Bit 41 - Enable write to ch2_abort bit"] #[inline(always)] - pub fn ch2_abort_we(&self) -> CH2_ABORT_WE_R { - CH2_ABORT_WE_R::new(((self.bits >> 41) & 0x01) != 0) + pub fn ch2_abort_we(&self) -> CH_ABORT_WE_R { + CH_ABORT_WE_R::new(((self.bits >> 41) & 0x01) != 0) } #[doc = "Bit 42 - Enable write to ch3_abort bit"] #[inline(always)] - pub fn ch3_abort_we(&self) -> CH3_ABORT_WE_R { - CH3_ABORT_WE_R::new(((self.bits >> 42) & 0x01) != 0) + pub fn ch3_abort_we(&self) -> CH_ABORT_WE_R { + CH_ABORT_WE_R::new(((self.bits >> 42) & 0x01) != 0) } #[doc = "Bit 43 - Enable write to ch4_abort bit"] #[inline(always)] - pub fn ch4_abort_we(&self) -> CH4_ABORT_WE_R { - CH4_ABORT_WE_R::new(((self.bits >> 43) & 0x01) != 0) + pub fn ch4_abort_we(&self) -> CH_ABORT_WE_R { + CH_ABORT_WE_R::new(((self.bits >> 43) & 0x01) != 0) } #[doc = "Bit 44 - Enable write to ch5_abort bit"] #[inline(always)] - pub fn ch5_abort_we(&self) -> CH5_ABORT_WE_R { - CH5_ABORT_WE_R::new(((self.bits >> 44) & 0x01) != 0) + pub fn ch5_abort_we(&self) -> CH_ABORT_WE_R { + CH_ABORT_WE_R::new(((self.bits >> 44) & 0x01) != 0) } #[doc = "Bit 45 - Enable write to ch6_abort bit"] #[inline(always)] - pub fn ch6_abort_we(&self) -> CH6_ABORT_WE_R { - CH6_ABORT_WE_R::new(((self.bits >> 45) & 0x01) != 0) + pub fn ch6_abort_we(&self) -> CH_ABORT_WE_R { + CH_ABORT_WE_R::new(((self.bits >> 45) & 0x01) != 0) } } impl W { + #[doc = "Enable channel %s"] + #[inline(always)] + pub unsafe fn ch_en(&mut self, n: usize) -> CH_EN_W { + CH_EN_W { + w: self, + offset: n - 1, + } + } #[doc = "Bit 0 - Enable channel 1"] #[inline(always)] - pub fn ch1_en(&mut self) -> CH1_EN_W { - CH1_EN_W { w: self } + pub fn ch1_en(&mut self) -> CH_EN_W { + CH_EN_W { w: self, offset: 0 } } #[doc = "Bit 1 - Enable channel 2"] #[inline(always)] - pub fn ch2_en(&mut self) -> CH2_EN_W { - CH2_EN_W { w: self } + pub fn ch2_en(&mut self) -> CH_EN_W { + CH_EN_W { w: self, offset: 1 } } #[doc = "Bit 2 - Enable channel 3"] #[inline(always)] - pub fn ch3_en(&mut self) -> CH3_EN_W { - CH3_EN_W { w: self } + pub fn ch3_en(&mut self) -> CH_EN_W { + CH_EN_W { w: self, offset: 2 } } #[doc = "Bit 3 - Enable channel 4"] #[inline(always)] - pub fn ch4_en(&mut self) -> CH4_EN_W { - CH4_EN_W { w: self } + pub fn ch4_en(&mut self) -> CH_EN_W { + CH_EN_W { w: self, offset: 3 } } #[doc = "Bit 4 - Enable channel 5"] #[inline(always)] - pub fn ch5_en(&mut self) -> CH5_EN_W { - CH5_EN_W { w: self } + pub fn ch5_en(&mut self) -> CH_EN_W { + CH_EN_W { w: self, offset: 4 } } #[doc = "Bit 5 - Enable channel 6"] #[inline(always)] - pub fn ch6_en(&mut self) -> CH6_EN_W { - CH6_EN_W { w: self } + pub fn ch6_en(&mut self) -> CH_EN_W { + CH_EN_W { w: self, offset: 5 } + } + #[doc = "Write enable channel %s"] + #[inline(always)] + pub unsafe fn ch_en_we(&mut self, n: usize) -> CH_EN_WE_W { + CH_EN_WE_W { + w: self, + offset: n - 1 + 8, + } } #[doc = "Bit 8 - Write enable channel 1"] #[inline(always)] - pub fn ch1_en_we(&mut self) -> CH1_EN_WE_W { - CH1_EN_WE_W { w: self } + pub fn ch1_en_we(&mut self) -> CH_EN_WE_W { + CH_EN_WE_W { w: self, offset: 8 } } #[doc = "Bit 9 - Write enable channel 2"] #[inline(always)] - pub fn ch2_en_we(&mut self) -> CH2_EN_WE_W { - CH2_EN_WE_W { w: self } + pub fn ch2_en_we(&mut self) -> CH_EN_WE_W { + CH_EN_WE_W { w: self, offset: 9 } } #[doc = "Bit 10 - Write enable channel 3"] #[inline(always)] - pub fn ch3_en_we(&mut self) -> CH3_EN_WE_W { - CH3_EN_WE_W { w: self } + pub fn ch3_en_we(&mut self) -> CH_EN_WE_W { + CH_EN_WE_W { + w: self, + offset: 10, + } } #[doc = "Bit 11 - Write enable channel 4"] #[inline(always)] - pub fn ch4_en_we(&mut self) -> CH4_EN_WE_W { - CH4_EN_WE_W { w: self } + pub fn ch4_en_we(&mut self) -> CH_EN_WE_W { + CH_EN_WE_W { + w: self, + offset: 11, + } } #[doc = "Bit 12 - Write enable channel 5"] #[inline(always)] - pub fn ch5_en_we(&mut self) -> CH5_EN_WE_W { - CH5_EN_WE_W { w: self } + pub fn ch5_en_we(&mut self) -> CH_EN_WE_W { + CH_EN_WE_W { + w: self, + offset: 12, + } } #[doc = "Bit 13 - Write enable channel 6"] #[inline(always)] - pub fn ch6_en_we(&mut self) -> CH6_EN_WE_W { - CH6_EN_WE_W { w: self } + pub fn ch6_en_we(&mut self) -> CH_EN_WE_W { + CH_EN_WE_W { + w: self, + offset: 13, + } + } + #[doc = "Suspend request channel %s"] + #[inline(always)] + pub unsafe fn ch_susp(&mut self, n: usize) -> CH_SUSP_W { + CH_SUSP_W { + w: self, + offset: n - 1 + 16, + } } #[doc = "Bit 16 - Suspend request channel 1"] #[inline(always)] - pub fn ch1_susp(&mut self) -> CH1_SUSP_W { - CH1_SUSP_W { w: self } + pub fn ch1_susp(&mut self) -> CH_SUSP_W { + CH_SUSP_W { + w: self, + offset: 16, + } } #[doc = "Bit 17 - Suspend request channel 2"] #[inline(always)] - pub fn ch2_susp(&mut self) -> CH2_SUSP_W { - CH2_SUSP_W { w: self } + pub fn ch2_susp(&mut self) -> CH_SUSP_W { + CH_SUSP_W { + w: self, + offset: 17, + } } #[doc = "Bit 18 - Suspend request channel 3"] #[inline(always)] - pub fn ch3_susp(&mut self) -> CH3_SUSP_W { - CH3_SUSP_W { w: self } + pub fn ch3_susp(&mut self) -> CH_SUSP_W { + CH_SUSP_W { + w: self, + offset: 18, + } } #[doc = "Bit 19 - Suspend request channel 4"] #[inline(always)] - pub fn ch4_susp(&mut self) -> CH4_SUSP_W { - CH4_SUSP_W { w: self } + pub fn ch4_susp(&mut self) -> CH_SUSP_W { + CH_SUSP_W { + w: self, + offset: 19, + } } #[doc = "Bit 20 - Suspend request channel 5"] #[inline(always)] - pub fn ch5_susp(&mut self) -> CH5_SUSP_W { - CH5_SUSP_W { w: self } + pub fn ch5_susp(&mut self) -> CH_SUSP_W { + CH_SUSP_W { + w: self, + offset: 20, + } } #[doc = "Bit 21 - Suspend request channel 6"] #[inline(always)] - pub fn ch6_susp(&mut self) -> CH6_SUSP_W { - CH6_SUSP_W { w: self } + pub fn ch6_susp(&mut self) -> CH_SUSP_W { + CH_SUSP_W { + w: self, + offset: 21, + } + } + #[doc = "Enable write to ch%s_susp bit"] + #[inline(always)] + pub unsafe fn ch_susp_we(&mut self, n: usize) -> CH_SUSP_WE_W { + CH_SUSP_WE_W { + w: self, + offset: n - 1 + 24, + } } #[doc = "Bit 24 - Enable write to ch1_susp bit"] #[inline(always)] - pub fn ch1_susp_we(&mut self) -> CH1_SUSP_WE_W { - CH1_SUSP_WE_W { w: self } + pub fn ch1_susp_we(&mut self) -> CH_SUSP_WE_W { + CH_SUSP_WE_W { + w: self, + offset: 24, + } } #[doc = "Bit 25 - Enable write to ch2_susp bit"] #[inline(always)] - pub fn ch2_susp_we(&mut self) -> CH2_SUSP_WE_W { - CH2_SUSP_WE_W { w: self } + pub fn ch2_susp_we(&mut self) -> CH_SUSP_WE_W { + CH_SUSP_WE_W { + w: self, + offset: 25, + } } #[doc = "Bit 26 - Enable write to ch3_susp bit"] #[inline(always)] - pub fn ch3_susp_we(&mut self) -> CH3_SUSP_WE_W { - CH3_SUSP_WE_W { w: self } + pub fn ch3_susp_we(&mut self) -> CH_SUSP_WE_W { + CH_SUSP_WE_W { + w: self, + offset: 26, + } } #[doc = "Bit 27 - Enable write to ch4_susp bit"] #[inline(always)] - pub fn ch4_susp_we(&mut self) -> CH4_SUSP_WE_W { - CH4_SUSP_WE_W { w: self } + pub fn ch4_susp_we(&mut self) -> CH_SUSP_WE_W { + CH_SUSP_WE_W { + w: self, + offset: 27, + } } #[doc = "Bit 28 - Enable write to ch5_susp bit"] #[inline(always)] - pub fn ch5_susp_we(&mut self) -> CH5_SUSP_WE_W { - CH5_SUSP_WE_W { w: self } + pub fn ch5_susp_we(&mut self) -> CH_SUSP_WE_W { + CH_SUSP_WE_W { + w: self, + offset: 28, + } } #[doc = "Bit 29 - Enable write to ch6_susp bit"] #[inline(always)] - pub fn ch6_susp_we(&mut self) -> CH6_SUSP_WE_W { - CH6_SUSP_WE_W { w: self } - } - #[doc = "Bit 32 - Abort request channel 1"] - #[inline(always)] - pub fn ch1_abort(&mut self) -> CH1_ABORT_W { - CH1_ABORT_W { w: self } - } - #[doc = "Bit 33 - Abort request channel 2"] - #[inline(always)] - pub fn ch2_abort(&mut self) -> CH2_ABORT_W { - CH2_ABORT_W { w: self } - } - #[doc = "Bit 34 - Abort request channel 3"] - #[inline(always)] - pub fn ch3_abort(&mut self) -> CH3_ABORT_W { - CH3_ABORT_W { w: self } - } - #[doc = "Bit 35 - Abort request channel 4"] - #[inline(always)] - pub fn ch4_abort(&mut self) -> CH4_ABORT_W { - CH4_ABORT_W { w: self } + pub fn ch6_susp_we(&mut self) -> CH_SUSP_WE_W { + CH_SUSP_WE_W { + w: self, + offset: 29, + } } - #[doc = "Bit 36 - Abort request channel 5"] + #[doc = "Bit 32 - Abort request channel %s"] #[inline(always)] - pub fn ch5_abort(&mut self) -> CH5_ABORT_W { - CH5_ABORT_W { w: self } + pub fn ch_abort(&mut self) -> CH_ABORT_W { + CH_ABORT_W { w: self } } - #[doc = "Bit 37 - Abort request channel 6"] + #[doc = "Enable write to ch%s_abort bit"] #[inline(always)] - pub fn ch6_abort(&mut self) -> CH6_ABORT_W { - CH6_ABORT_W { w: self } + pub unsafe fn ch_abort_we(&mut self, n: usize) -> CH_ABORT_WE_W { + CH_ABORT_WE_W { + w: self, + offset: n - 1 + 40, + } } #[doc = "Bit 40 - Enable write to ch1_abort bit"] #[inline(always)] - pub fn ch1_abort_we(&mut self) -> CH1_ABORT_WE_W { - CH1_ABORT_WE_W { w: self } + pub fn ch1_abort_we(&mut self) -> CH_ABORT_WE_W { + CH_ABORT_WE_W { + w: self, + offset: 40, + } } #[doc = "Bit 41 - Enable write to ch2_abort bit"] #[inline(always)] - pub fn ch2_abort_we(&mut self) -> CH2_ABORT_WE_W { - CH2_ABORT_WE_W { w: self } + pub fn ch2_abort_we(&mut self) -> CH_ABORT_WE_W { + CH_ABORT_WE_W { + w: self, + offset: 41, + } } #[doc = "Bit 42 - Enable write to ch3_abort bit"] #[inline(always)] - pub fn ch3_abort_we(&mut self) -> CH3_ABORT_WE_W { - CH3_ABORT_WE_W { w: self } + pub fn ch3_abort_we(&mut self) -> CH_ABORT_WE_W { + CH_ABORT_WE_W { + w: self, + offset: 42, + } } #[doc = "Bit 43 - Enable write to ch4_abort bit"] #[inline(always)] - pub fn ch4_abort_we(&mut self) -> CH4_ABORT_WE_W { - CH4_ABORT_WE_W { w: self } + pub fn ch4_abort_we(&mut self) -> CH_ABORT_WE_W { + CH_ABORT_WE_W { + w: self, + offset: 43, + } } #[doc = "Bit 44 - Enable write to ch5_abort bit"] #[inline(always)] - pub fn ch5_abort_we(&mut self) -> CH5_ABORT_WE_W { - CH5_ABORT_WE_W { w: self } + pub fn ch5_abort_we(&mut self) -> CH_ABORT_WE_W { + CH_ABORT_WE_W { + w: self, + offset: 44, + } } #[doc = "Bit 45 - Enable write to ch6_abort bit"] #[inline(always)] - pub fn ch6_abort_we(&mut self) -> CH6_ABORT_WE_W { - CH6_ABORT_WE_W { w: self } + pub fn ch6_abort_we(&mut self) -> CH_ABORT_WE_W { + CH_ABORT_WE_W { + w: self, + offset: 45, + } } } } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intstatus](intstatus) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intstatus](intstatus) module"] pub type INTSTATUS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -28830,109 +16787,14 @@ pub mod dmac { 0 } } - #[doc = "Reader of field `ch1_intstat`"] - pub type CH1_INTSTAT_R = crate::R; - #[doc = "Write proxy for field `ch1_intstat`"] - pub struct CH1_INTSTAT_W<'a> { - w: &'a mut W, - } - impl<'a> CH1_INTSTAT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u64) & 0x01); - self.w - } - } - #[doc = "Reader of field `ch2_intstat`"] - pub type CH2_INTSTAT_R = crate::R; - #[doc = "Write proxy for field `ch2_intstat`"] - pub struct CH2_INTSTAT_W<'a> { - w: &'a mut W, - } - impl<'a> CH2_INTSTAT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u64) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `ch3_intstat`"] - pub type CH3_INTSTAT_R = crate::R; - #[doc = "Write proxy for field `ch3_intstat`"] - pub struct CH3_INTSTAT_W<'a> { - w: &'a mut W, - } - impl<'a> CH3_INTSTAT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u64) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `ch4_intstat`"] - pub type CH4_INTSTAT_R = crate::R; - #[doc = "Write proxy for field `ch4_intstat`"] - pub struct CH4_INTSTAT_W<'a> { - w: &'a mut W, - } - impl<'a> CH4_INTSTAT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u64) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `ch5_intstat`"] - pub type CH5_INTSTAT_R = crate::R; - #[doc = "Write proxy for field `ch5_intstat`"] - pub struct CH5_INTSTAT_W<'a> { + #[doc = "Reader of field `ch%s_intstat`"] + pub type CH_INTSTAT_R = crate::R; + #[doc = "Write proxy for fields `ch_intstat(1-6)`"] + pub struct CH_INTSTAT_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> CH5_INTSTAT_W<'a> { + impl<'a> CH_INTSTAT_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -28946,31 +16808,8 @@ pub mod dmac { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u64) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `ch6_intstat`"] - pub type CH6_INTSTAT_R = crate::R; - #[doc = "Write proxy for field `ch6_intstat`"] - pub struct CH6_INTSTAT_W<'a> { - w: &'a mut W, - } - impl<'a> CH6_INTSTAT_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u64) & 0x01) << 5); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u64) & 0x01) << self.offset); self.w } } @@ -28999,35 +16838,40 @@ pub mod dmac { } } impl R { + #[doc = "Channel %s interrupt bit"] + #[inline(always)] + pub unsafe fn ch_intstat(&self, n: usize) -> CH_INTSTAT_R { + CH_INTSTAT_R::new(((self.bits >> n - 1) & 0x01) != 0) + } #[doc = "Bit 0 - Channel 1 interrupt bit"] #[inline(always)] - pub fn ch1_intstat(&self) -> CH1_INTSTAT_R { - CH1_INTSTAT_R::new((self.bits & 0x01) != 0) + pub fn ch1_intstat(&self) -> CH_INTSTAT_R { + CH_INTSTAT_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1 - Channel 2 interrupt bit"] #[inline(always)] - pub fn ch2_intstat(&self) -> CH2_INTSTAT_R { - CH2_INTSTAT_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn ch2_intstat(&self) -> CH_INTSTAT_R { + CH_INTSTAT_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2 - Channel 3 interrupt bit"] #[inline(always)] - pub fn ch3_intstat(&self) -> CH3_INTSTAT_R { - CH3_INTSTAT_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn ch3_intstat(&self) -> CH_INTSTAT_R { + CH_INTSTAT_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3 - Channel 4 interrupt bit"] #[inline(always)] - pub fn ch4_intstat(&self) -> CH4_INTSTAT_R { - CH4_INTSTAT_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn ch4_intstat(&self) -> CH_INTSTAT_R { + CH_INTSTAT_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4 - Channel 5 interrupt bit"] #[inline(always)] - pub fn ch5_intstat(&self) -> CH5_INTSTAT_R { - CH5_INTSTAT_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn ch5_intstat(&self) -> CH_INTSTAT_R { + CH_INTSTAT_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5 - Channel 6 interrupt bit"] #[inline(always)] - pub fn ch6_intstat(&self) -> CH6_INTSTAT_R { - CH6_INTSTAT_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn ch6_intstat(&self) -> CH_INTSTAT_R { + CH_INTSTAT_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 16 - Common register status bit"] #[inline(always)] @@ -29036,35 +16880,43 @@ pub mod dmac { } } impl W { + #[doc = "Channel %s interrupt bit"] + #[inline(always)] + pub unsafe fn ch_intstat(&mut self, n: usize) -> CH_INTSTAT_W { + CH_INTSTAT_W { + w: self, + offset: n - 1, + } + } #[doc = "Bit 0 - Channel 1 interrupt bit"] #[inline(always)] - pub fn ch1_intstat(&mut self) -> CH1_INTSTAT_W { - CH1_INTSTAT_W { w: self } + pub fn ch1_intstat(&mut self) -> CH_INTSTAT_W { + CH_INTSTAT_W { w: self, offset: 0 } } #[doc = "Bit 1 - Channel 2 interrupt bit"] #[inline(always)] - pub fn ch2_intstat(&mut self) -> CH2_INTSTAT_W { - CH2_INTSTAT_W { w: self } + pub fn ch2_intstat(&mut self) -> CH_INTSTAT_W { + CH_INTSTAT_W { w: self, offset: 1 } } #[doc = "Bit 2 - Channel 3 interrupt bit"] #[inline(always)] - pub fn ch3_intstat(&mut self) -> CH3_INTSTAT_W { - CH3_INTSTAT_W { w: self } + pub fn ch3_intstat(&mut self) -> CH_INTSTAT_W { + CH_INTSTAT_W { w: self, offset: 2 } } #[doc = "Bit 3 - Channel 4 interrupt bit"] #[inline(always)] - pub fn ch4_intstat(&mut self) -> CH4_INTSTAT_W { - CH4_INTSTAT_W { w: self } + pub fn ch4_intstat(&mut self) -> CH_INTSTAT_W { + CH_INTSTAT_W { w: self, offset: 3 } } #[doc = "Bit 4 - Channel 5 interrupt bit"] #[inline(always)] - pub fn ch5_intstat(&mut self) -> CH5_INTSTAT_W { - CH5_INTSTAT_W { w: self } + pub fn ch5_intstat(&mut self) -> CH_INTSTAT_W { + CH_INTSTAT_W { w: self, offset: 4 } } #[doc = "Bit 5 - Channel 6 interrupt bit"] #[inline(always)] - pub fn ch6_intstat(&mut self) -> CH6_INTSTAT_W { - CH6_INTSTAT_W { w: self } + pub fn ch6_intstat(&mut self) -> CH_INTSTAT_W { + CH_INTSTAT_W { w: self, offset: 5 } } #[doc = "Bit 16 - Common register status bit"] #[inline(always)] @@ -29073,7 +16925,7 @@ pub mod dmac { } } } - #[doc = "Common Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [com_intclear](com_intclear) module"] + #[doc = "Common Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [com_intclear](com_intclear) module"] pub type COM_INTCLEAR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -29271,7 +17123,7 @@ pub mod dmac { } } } - #[doc = "Common Interrupt Status Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [com_intstatus_en](com_intstatus_en) module"] + #[doc = "Common Interrupt Status Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [com_intstatus_en](com_intstatus_en) module"] pub type COM_INTSTATUS_EN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -29469,7 +17321,7 @@ pub mod dmac { } } } - #[doc = "Common Interrupt Signal Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [com_intsignal_en](com_intsignal_en) module"] + #[doc = "Common Interrupt Signal Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [com_intsignal_en](com_intsignal_en) module"] pub type COM_INTSIGNAL_EN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -29667,7 +17519,7 @@ pub mod dmac { } } } - #[doc = "Common Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [com_intstatus](com_intstatus) module"] + #[doc = "Common Interrupt Status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [com_intstatus](com_intstatus) module"] pub type COM_INTSTATUS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -29865,7 +17717,7 @@ pub mod dmac { } } } - #[doc = "Reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [reset](reset) module"] + #[doc = "Reset register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reset](reset) module"] pub type RESET = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -29942,6 +17794,7 @@ impl GPIO { } impl Deref for GPIO { type Target = gpio::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*GPIO::ptr() } } @@ -29984,7 +17837,7 @@ pub mod gpio { #[doc = "0x68 - Interrupt both edge type"] pub interrupt_bothedge: INTERRUPT_BOTHEDGE, } - #[doc = "Data (output) registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [data_output](data_output) module"] + #[doc = "Data (output) registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data_output](data_output) module"] pub type DATA_OUTPUT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30007,157 +17860,14 @@ pub mod gpio { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-7)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN6_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -30171,120 +17881,107 @@ pub mod gpio { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] + impl R { + #[doc = ""] #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - } - impl R { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } } impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } } } - #[doc = "Data direction registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [direction](direction) module"] + #[doc = "Data direction registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [direction](direction) module"] pub type DIRECTION = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30309,223 +18006,49 @@ pub mod gpio { } #[doc = "\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] - pub enum PIN0_A { + pub enum PIN_A { #[doc = "0: Pin is input"] - INPUT, + INPUT = 0, #[doc = "1: Pin is output"] - OUTPUT, + OUTPUT = 1, } - impl From for bool { + impl From for bool { #[inline(always)] - fn from(variant: PIN0_A) -> Self { - match variant { - PIN0_A::INPUT => false, - PIN0_A::OUTPUT => true, - } + fn from(variant: PIN_A) -> Self { + variant as u8 != 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - impl PIN0_R { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + impl PIN_R { #[doc = r"Get enumerated values variant"] #[inline(always)] - pub fn variant(&self) -> PIN0_A { + pub fn variant(&self) -> PIN_A { match self.bits { - false => PIN0_A::INPUT, - true => PIN0_A::OUTPUT, + false => PIN_A::INPUT, + true => PIN_A::OUTPUT, } } #[doc = "Checks if the value of the field is `INPUT`"] #[inline(always)] pub fn is_input(&self) -> bool { - *self == PIN0_A::INPUT + *self == PIN_A::INPUT } #[doc = "Checks if the value of the field is `OUTPUT`"] #[inline(always)] pub fn is_output(&self) -> bool { - *self == PIN0_A::OUTPUT - } - } - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { - w: &'a mut W, - } - impl<'a> PIN0_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: PIN0_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Pin is input"] - #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(PIN0_A::INPUT) - } - #[doc = "Pin is output"] - #[inline(always)] - pub fn output(self) -> &'a mut W { - self.variant(PIN0_A::OUTPUT) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); - self.w - } - } - #[doc = ""] - pub type PIN1_A = PIN0_A; - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: PIN1_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Pin is input"] - #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(PIN0_A::INPUT) - } - #[doc = "Pin is output"] - #[inline(always)] - pub fn output(self) -> &'a mut W { - self.variant(PIN0_A::OUTPUT) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = ""] - pub type PIN2_A = PIN0_A; - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: PIN2_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Pin is input"] - #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(PIN0_A::INPUT) - } - #[doc = "Pin is output"] - #[inline(always)] - pub fn output(self) -> &'a mut W { - self.variant(PIN0_A::OUTPUT) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = ""] - pub type PIN3_A = PIN0_A; - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: PIN3_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Pin is input"] - #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(PIN0_A::INPUT) - } - #[doc = "Pin is output"] - #[inline(always)] - pub fn output(self) -> &'a mut W { - self.variant(PIN0_A::OUTPUT) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w + *self == PIN_A::OUTPUT } } - #[doc = ""] - pub type PIN4_A = PIN0_A; - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { + #[doc = "Write proxy for fields `pin(0-7)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN4_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Writes `variant` to the field"] #[inline(always)] - pub fn variant(self, variant: PIN4_A) -> &'a mut W { + pub fn variant(self, variant: PIN_A) -> &'a mut W { { self.bit(variant.into()) } @@ -30533,12 +18056,12 @@ pub mod gpio { #[doc = "Pin is input"] #[inline(always)] pub fn input(self) -> &'a mut W { - self.variant(PIN0_A::INPUT) + self.variant(PIN_A::INPUT) } #[doc = "Pin is output"] #[inline(always)] pub fn output(self) -> &'a mut W { - self.variant(PIN0_A::OUTPUT) + self.variant(PIN_A::OUTPUT) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -30553,225 +18076,107 @@ pub mod gpio { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = ""] - pub type PIN5_A = PIN0_A; - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: PIN5_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Pin is input"] - #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(PIN0_A::INPUT) - } - #[doc = "Pin is output"] - #[inline(always)] - pub fn output(self) -> &'a mut W { - self.variant(PIN0_A::OUTPUT) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = ""] - pub type PIN6_A = PIN0_A; - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: PIN6_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Pin is input"] - #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(PIN0_A::INPUT) - } - #[doc = "Pin is output"] - #[inline(always)] - pub fn output(self) -> &'a mut W { - self.variant(PIN0_A::OUTPUT) - } - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = ""] - pub type PIN7_A = PIN0_A; - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: PIN7_A) -> &'a mut W { - { - self.bit(variant.into()) - } - } - #[doc = "Pin is input"] - #[inline(always)] - pub fn input(self) -> &'a mut W { - self.variant(PIN0_A::INPUT) - } - #[doc = "Pin is output"] - #[inline(always)] - pub fn output(self) -> &'a mut W { - self.variant(PIN0_A::OUTPUT) - } - #[doc = r"Sets the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - impl R { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } } impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } } } - #[doc = "Data source registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [source](source) module"] + #[doc = "Data source registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [source](source) module"] pub type SOURCE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30797,7 +18202,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Interrupt enable/disable registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_enable](interrupt_enable) module"] + #[doc = "Interrupt enable/disable registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_enable](interrupt_enable) module"] pub type INTERRUPT_ENABLE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30823,7 +18228,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Interrupt mask registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_mask](interrupt_mask) module"] + #[doc = "Interrupt mask registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_mask](interrupt_mask) module"] pub type INTERRUPT_MASK = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30849,7 +18254,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Interrupt level registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_level](interrupt_level) module"] + #[doc = "Interrupt level registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_level](interrupt_level) module"] pub type INTERRUPT_LEVEL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30875,7 +18280,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Interrupt polarity registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_polarity](interrupt_polarity) module"] + #[doc = "Interrupt polarity registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_polarity](interrupt_polarity) module"] pub type INTERRUPT_POLARITY = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30901,7 +18306,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Interrupt status registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_status](interrupt_status) module"] + #[doc = "Interrupt status registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_status](interrupt_status) module"] pub type INTERRUPT_STATUS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30927,7 +18332,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Raw interrupt status registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_status_raw](interrupt_status_raw) module"] + #[doc = "Raw interrupt status registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_status_raw](interrupt_status_raw) module"] pub type INTERRUPT_STATUS_RAW = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30953,7 +18358,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Interrupt debounce registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_debounce](interrupt_debounce) module"] + #[doc = "Interrupt debounce registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_debounce](interrupt_debounce) module"] pub type INTERRUPT_DEBOUNCE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -30979,7 +18384,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Registers for clearing interrupts\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_clear](interrupt_clear) module"] + #[doc = "Registers for clearing interrupts\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_clear](interrupt_clear) module"] pub type INTERRUPT_CLEAR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31005,7 +18410,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "External port (data input) registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [data_input](data_input) module"] + #[doc = "External port (data input) registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data_input](data_input) module"] pub type DATA_INPUT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31028,13 +18433,14 @@ pub mod gpio { 0 } } - #[doc = "Reader of field `pin0`"] - pub type PIN0_R = crate::R; - #[doc = "Write proxy for field `pin0`"] - pub struct PIN0_W<'a> { + #[doc = "Reader of field `pin%s`"] + pub type PIN_R = crate::R; + #[doc = "Write proxy for fields `pin(0-7)`"] + pub struct PIN_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> PIN0_W<'a> { + impl<'a> PIN_W<'a> { #[doc = r"Sets the field bit"] #[inline(always)] pub fn set_bit(self) -> &'a mut W { @@ -31048,264 +18454,107 @@ pub mod gpio { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01); + self.w.bits = (self.w.bits & !(0x01 << self.offset)) + | (((value as u32) & 0x01) << self.offset); self.w } } - #[doc = "Reader of field `pin1`"] - pub type PIN1_R = crate::R; - #[doc = "Write proxy for field `pin1`"] - pub struct PIN1_W<'a> { - w: &'a mut W, - } - impl<'a> PIN1_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1); - self.w - } - } - #[doc = "Reader of field `pin2`"] - pub type PIN2_R = crate::R; - #[doc = "Write proxy for field `pin2`"] - pub struct PIN2_W<'a> { - w: &'a mut W, - } - impl<'a> PIN2_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2); - self.w - } - } - #[doc = "Reader of field `pin3`"] - pub type PIN3_R = crate::R; - #[doc = "Write proxy for field `pin3`"] - pub struct PIN3_W<'a> { - w: &'a mut W, - } - impl<'a> PIN3_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3); - self.w - } - } - #[doc = "Reader of field `pin4`"] - pub type PIN4_R = crate::R; - #[doc = "Write proxy for field `pin4`"] - pub struct PIN4_W<'a> { - w: &'a mut W, - } - impl<'a> PIN4_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4); - self.w - } - } - #[doc = "Reader of field `pin5`"] - pub type PIN5_R = crate::R; - #[doc = "Write proxy for field `pin5`"] - pub struct PIN5_W<'a> { - w: &'a mut W, - } - impl<'a> PIN5_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5); - self.w - } - } - #[doc = "Reader of field `pin6`"] - pub type PIN6_R = crate::R; - #[doc = "Write proxy for field `pin6`"] - pub struct PIN6_W<'a> { - w: &'a mut W, - } - impl<'a> PIN6_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] - #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6); - self.w - } - } - #[doc = "Reader of field `pin7`"] - pub type PIN7_R = crate::R; - #[doc = "Write proxy for field `pin7`"] - pub struct PIN7_W<'a> { - w: &'a mut W, - } - impl<'a> PIN7_W<'a> { - #[doc = r"Sets the field bit"] - #[inline(always)] - pub fn set_bit(self) -> &'a mut W { - self.bit(true) - } - #[doc = r"Clears the field bit"] + impl R { + #[doc = ""] #[inline(always)] - pub fn clear_bit(self) -> &'a mut W { - self.bit(false) + pub unsafe fn pin(&self, n: usize) -> PIN_R { + PIN_R::new(((self.bits >> n) & 0x01) != 0) } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub fn bit(self, value: bool) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7); - self.w - } - } - impl R { #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&self) -> PIN0_R { - PIN0_R::new((self.bits & 0x01) != 0) + pub fn pin0(&self) -> PIN_R { + PIN_R::new((self.bits & 0x01) != 0) } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&self) -> PIN1_R { - PIN1_R::new(((self.bits >> 1) & 0x01) != 0) + pub fn pin1(&self) -> PIN_R { + PIN_R::new(((self.bits >> 1) & 0x01) != 0) } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&self) -> PIN2_R { - PIN2_R::new(((self.bits >> 2) & 0x01) != 0) + pub fn pin2(&self) -> PIN_R { + PIN_R::new(((self.bits >> 2) & 0x01) != 0) } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&self) -> PIN3_R { - PIN3_R::new(((self.bits >> 3) & 0x01) != 0) + pub fn pin3(&self) -> PIN_R { + PIN_R::new(((self.bits >> 3) & 0x01) != 0) } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&self) -> PIN4_R { - PIN4_R::new(((self.bits >> 4) & 0x01) != 0) + pub fn pin4(&self) -> PIN_R { + PIN_R::new(((self.bits >> 4) & 0x01) != 0) } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&self) -> PIN5_R { - PIN5_R::new(((self.bits >> 5) & 0x01) != 0) + pub fn pin5(&self) -> PIN_R { + PIN_R::new(((self.bits >> 5) & 0x01) != 0) } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&self) -> PIN6_R { - PIN6_R::new(((self.bits >> 6) & 0x01) != 0) + pub fn pin6(&self) -> PIN_R { + PIN_R::new(((self.bits >> 6) & 0x01) != 0) } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&self) -> PIN7_R { - PIN7_R::new(((self.bits >> 7) & 0x01) != 0) + pub fn pin7(&self) -> PIN_R { + PIN_R::new(((self.bits >> 7) & 0x01) != 0) } } impl W { + #[doc = ""] + #[inline(always)] + pub unsafe fn pin(&mut self, n: usize) -> PIN_W { + PIN_W { w: self, offset: n } + } #[doc = "Bit 0"] #[inline(always)] - pub fn pin0(&mut self) -> PIN0_W { - PIN0_W { w: self } + pub fn pin0(&mut self) -> PIN_W { + PIN_W { w: self, offset: 0 } } #[doc = "Bit 1"] #[inline(always)] - pub fn pin1(&mut self) -> PIN1_W { - PIN1_W { w: self } + pub fn pin1(&mut self) -> PIN_W { + PIN_W { w: self, offset: 1 } } #[doc = "Bit 2"] #[inline(always)] - pub fn pin2(&mut self) -> PIN2_W { - PIN2_W { w: self } + pub fn pin2(&mut self) -> PIN_W { + PIN_W { w: self, offset: 2 } } #[doc = "Bit 3"] #[inline(always)] - pub fn pin3(&mut self) -> PIN3_W { - PIN3_W { w: self } + pub fn pin3(&mut self) -> PIN_W { + PIN_W { w: self, offset: 3 } } #[doc = "Bit 4"] #[inline(always)] - pub fn pin4(&mut self) -> PIN4_W { - PIN4_W { w: self } + pub fn pin4(&mut self) -> PIN_W { + PIN_W { w: self, offset: 4 } } #[doc = "Bit 5"] #[inline(always)] - pub fn pin5(&mut self) -> PIN5_W { - PIN5_W { w: self } + pub fn pin5(&mut self) -> PIN_W { + PIN_W { w: self, offset: 5 } } #[doc = "Bit 6"] #[inline(always)] - pub fn pin6(&mut self) -> PIN6_W { - PIN6_W { w: self } + pub fn pin6(&mut self) -> PIN_W { + PIN_W { w: self, offset: 6 } } #[doc = "Bit 7"] #[inline(always)] - pub fn pin7(&mut self) -> PIN7_W { - PIN7_W { w: self } + pub fn pin7(&mut self) -> PIN_W { + PIN_W { w: self, offset: 7 } } } } - #[doc = "Sync level registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sync_level](sync_level) module"] + #[doc = "Sync level registers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sync_level](sync_level) module"] pub type SYNC_LEVEL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31331,7 +18580,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "ID code\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [id_code](id_code) module"] + #[doc = "ID code\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [id_code](id_code) module"] pub type ID_CODE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31357,7 +18606,7 @@ pub mod gpio { impl R {} impl W {} } - #[doc = "Interrupt both edge type\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_bothedge](interrupt_bothedge) module"] + #[doc = "Interrupt both edge type\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_bothedge](interrupt_bothedge) module"] pub type INTERRUPT_BOTHEDGE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31398,6 +18647,7 @@ impl UART1 { } impl Deref for UART1 { type Target = uart1::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*UART1::ptr() } } @@ -31486,7 +18736,7 @@ pub mod uart1 { #[doc = "0xfc - Component Type Register"] pub ctr: CTR, } - #[doc = "Receive Buffer Register / Divisor Latch (Low) / Transmit Holding Register (depending on context and R/W)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rbr_dll_thr](rbr_dll_thr) module"] + #[doc = "Receive Buffer Register / Divisor Latch (Low) / Transmit Holding Register (depending on context and R/W)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rbr_dll_thr](rbr_dll_thr) module"] pub type RBR_DLL_THR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31512,7 +18762,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Divisor Latch (High) / Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dlh_ier](dlh_ier) module"] + #[doc = "Divisor Latch (High) / Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dlh_ier](dlh_ier) module"] pub type DLH_IER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31538,7 +18788,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "FIFO Control Register / Interrupt Identification Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fcr_iir](fcr_iir) module"] + #[doc = "FIFO Control Register / Interrupt Identification Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fcr_iir](fcr_iir) module"] pub type FCR_IIR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31564,7 +18814,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Line Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [lcr](lcr) module"] + #[doc = "Line Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcr](lcr) module"] pub type LCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31590,7 +18840,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Modem Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [mcr](mcr) module"] + #[doc = "Modem Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mcr](mcr) module"] pub type MCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31616,7 +18866,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Line Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [lsr](lsr) module"] + #[doc = "Line Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lsr](lsr) module"] pub type LSR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31642,7 +18892,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Modem Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [msr](msr) module"] + #[doc = "Modem Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msr](msr) module"] pub type MSR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31668,7 +18918,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Scratchpad Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [scr](scr) module"] + #[doc = "Scratchpad Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scr](scr) module"] pub type SCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31694,7 +18944,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Low Power Divisor Latch (Low) Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [lpdll](lpdll) module"] + #[doc = "Low Power Divisor Latch (Low) Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lpdll](lpdll) module"] pub type LPDLL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31720,7 +18970,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Low Power Divisor Latch (High) Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [lpdlh](lpdlh) module"] + #[doc = "Low Power Divisor Latch (High) Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lpdlh](lpdlh) module"] pub type LPDLH = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31746,7 +18996,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Shadow Receive Buffer Register / Shadow Transmit Holding Register (depending on R/W)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [srbr_sthr](srbr_sthr) module"] + #[doc = "Shadow Receive Buffer Register / Shadow Transmit Holding Register (depending on R/W)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [srbr_sthr](srbr_sthr) module"] pub type SRBR_STHR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31761,7 +19011,8 @@ pub mod uart1 { pub type R = crate::R; #[doc = "Writer for register srbr_sthr[%s]"] pub type W = crate::W; - #[doc = "Register srbr_sthr[%s] `reset()`'s with value 0"] + #[doc = "Register srbr_sthr[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::SRBR_STHR { type Type = u32; #[inline(always)] @@ -31772,7 +19023,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "FIFO Access Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [far](far) module"] + #[doc = "FIFO Access Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [far](far) module"] pub type FAR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31798,7 +19049,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Transmit FIFO Read Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tfr](tfr) module"] + #[doc = "Transmit FIFO Read Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tfr](tfr) module"] pub type TFR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31824,7 +19075,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Receive FIFO Write Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rfw](rfw) module"] + #[doc = "Receive FIFO Write Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfw](rfw) module"] pub type RFW = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31850,7 +19101,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "UART Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [usr](usr) module"] + #[doc = "UART Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [usr](usr) module"] pub type USR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31876,7 +19127,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Transmit FIFO Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tfl](tfl) module"] + #[doc = "Transmit FIFO Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tfl](tfl) module"] pub type TFL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31902,7 +19153,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Receive FIFO Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rfl](rfl) module"] + #[doc = "Receive FIFO Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfl](rfl) module"] pub type RFL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31928,7 +19179,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Software Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [srr](srr) module"] + #[doc = "Software Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [srr](srr) module"] pub type SRR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31954,7 +19205,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Shadow Request to Send Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [srts](srts) module"] + #[doc = "Shadow Request to Send Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [srts](srts) module"] pub type SRTS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -31980,7 +19231,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Shadow Break Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sbcr](sbcr) module"] + #[doc = "Shadow Break Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sbcr](sbcr) module"] pub type SBCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32006,7 +19257,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Shadow DMA Mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sdmam](sdmam) module"] + #[doc = "Shadow DMA Mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sdmam](sdmam) module"] pub type SDMAM = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32032,7 +19283,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Shadow FIFO Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sfe](sfe) module"] + #[doc = "Shadow FIFO Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sfe](sfe) module"] pub type SFE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32058,7 +19309,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Shadow RCVR Trigger Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [srt](srt) module"] + #[doc = "Shadow RCVR Trigger Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [srt](srt) module"] pub type SRT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32084,7 +19335,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Shadow TX Empty Trigger Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [stet](stet) module"] + #[doc = "Shadow TX Empty Trigger Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stet](stet) module"] pub type STET = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32110,7 +19361,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Halt TX Regster\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [htx](htx) module"] + #[doc = "Halt TX Regster\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [htx](htx) module"] pub type HTX = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32136,7 +19387,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "DMA Software Acknowledge Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dmasa](dmasa) module"] + #[doc = "DMA Software Acknowledge Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmasa](dmasa) module"] pub type DMASA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32162,7 +19413,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Transfer Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tcr](tcr) module"] + #[doc = "Transfer Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tcr](tcr) module"] pub type TCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32188,7 +19439,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "DE Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [de_en](de_en) module"] + #[doc = "DE Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [de_en](de_en) module"] pub type DE_EN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32214,7 +19465,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "RE Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [re_en](re_en) module"] + #[doc = "RE Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [re_en](re_en) module"] pub type RE_EN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32240,7 +19491,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "DE Assertion Time Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [det](det) module"] + #[doc = "DE Assertion Time Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [det](det) module"] pub type DET = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32266,7 +19517,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Turn-Around Time Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tat](tat) module"] + #[doc = "Turn-Around Time Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tat](tat) module"] pub type TAT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32292,7 +19543,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Divisor Latch (Fractional) Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dlf](dlf) module"] + #[doc = "Divisor Latch (Fractional) Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dlf](dlf) module"] pub type DLF = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32318,7 +19569,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Receive-Mode Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rar](rar) module"] + #[doc = "Receive-Mode Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rar](rar) module"] pub type RAR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32344,7 +19595,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Transmit-Mode Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tar](tar) module"] + #[doc = "Transmit-Mode Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tar](tar) module"] pub type TAR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32370,7 +19621,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Line Control Register (Extended)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [lcr_ext](lcr_ext) module"] + #[doc = "Line Control Register (Extended)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lcr_ext](lcr_ext) module"] pub type LCR_EXT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32396,7 +19647,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Component Parameter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [cpr](cpr) module"] + #[doc = "Component Parameter Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cpr](cpr) module"] pub type CPR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32422,7 +19673,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "UART Component Version\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ucv](ucv) module"] + #[doc = "UART Component Version\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ucv](ucv) module"] pub type UCV = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32448,7 +19699,7 @@ pub mod uart1 { impl R {} impl W {} } - #[doc = "Component Type Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ctr](ctr) module"] + #[doc = "Component Type Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctr](ctr) module"] pub type CTR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32489,6 +19740,7 @@ impl UART2 { } impl Deref for UART2 { type Target = uart1::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*UART2::ptr() } } @@ -32507,6 +19759,7 @@ impl UART3 { } impl Deref for UART3 { type Target = uart1::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*UART3::ptr() } } @@ -32525,6 +19778,7 @@ impl SPI0 { } impl Deref for SPI0 { type Target = spi0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*SPI0::ptr() } } @@ -32606,7 +19860,7 @@ pub mod spi0 { #[doc = "0x118 - ENDIAN"] pub endian: ENDIAN, } - #[doc = "Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ctrlr0](ctrlr0) module"] + #[doc = "Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlr0](ctrlr0) module"] pub type CTRLR0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -32631,25 +19885,21 @@ pub mod spi0 { } #[doc = "WORK_MODE\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum WORK_MODE_A { #[doc = "0: MODE_0"] - MODE0, + MODE0 = 0, #[doc = "1: MODE_1"] - MODE1, + MODE1 = 1, #[doc = "2: MODE_2"] - MODE2, + MODE2 = 2, #[doc = "3: MODE_3"] - MODE3, + MODE3 = 3, } impl From for u8 { #[inline(always)] fn from(variant: WORK_MODE_A) -> Self { - match variant { - WORK_MODE_A::MODE0 => 0, - WORK_MODE_A::MODE1 => 1, - WORK_MODE_A::MODE2 => 2, - WORK_MODE_A::MODE3 => 3, - } + variant as _ } } #[doc = "Reader of field `work_mode`"] @@ -32728,25 +19978,21 @@ pub mod spi0 { } #[doc = "TRANSFER_MODE\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum TMOD_A { #[doc = "0: TRANS_RECV"] - TRANS_RECV, + TRANS_RECV = 0, #[doc = "1: TRANS"] - TRANS, + TRANS = 1, #[doc = "2: RECV"] - RECV, + RECV = 2, #[doc = "3: EEROM"] - EEROM, + EEROM = 3, } impl From for u8 { #[inline(always)] fn from(variant: TMOD_A) -> Self { - match variant { - TMOD_A::TRANS_RECV => 0, - TMOD_A::TRANS => 1, - TMOD_A::RECV => 2, - TMOD_A::EEROM => 3, - } + variant as _ } } #[doc = "Reader of field `tmod`"] @@ -32825,25 +20071,21 @@ pub mod spi0 { } #[doc = "FRAME_FORMAT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum FRAME_FORMAT_A { #[doc = "0: STANDARD"] - STANDARD, + STANDARD = 0, #[doc = "1: DUAL"] - DUAL, + DUAL = 1, #[doc = "2: QUAD"] - QUAD, + QUAD = 2, #[doc = "3: OCTAL"] - OCTAL, + OCTAL = 3, } impl From for u8 { #[inline(always)] fn from(variant: FRAME_FORMAT_A) -> Self { - match variant { - FRAME_FORMAT_A::STANDARD => 0, - FRAME_FORMAT_A::DUAL => 1, - FRAME_FORMAT_A::QUAD => 2, - FRAME_FORMAT_A::OCTAL => 3, - } + variant as _ } } #[doc = "Reader of field `frame_format`"] @@ -32979,7 +20221,7 @@ pub mod spi0 { } } } - #[doc = "Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ctrlr1](ctrlr1) module"] + #[doc = "Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlr1](ctrlr1) module"] pub type CTRLR1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33005,7 +20247,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ssienr](ssienr) module"] + #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssienr](ssienr) module"] pub type SSIENR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33031,7 +20273,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Microwire Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [mwcr](mwcr) module"] + #[doc = "Microwire Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mwcr](mwcr) module"] pub type MWCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33057,7 +20299,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Slave Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ser](ser) module"] + #[doc = "Slave Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ser](ser) module"] pub type SER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33083,7 +20325,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Baud Rate Select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [baudr](baudr) module"] + #[doc = "Baud Rate Select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baudr](baudr) module"] pub type BAUDR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33109,7 +20351,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Transmit FIFO Threshold Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txftlr](txftlr) module"] + #[doc = "Transmit FIFO Threshold Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txftlr](txftlr) module"] pub type TXFTLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33135,7 +20377,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Receive FIFO Threshold Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxftlr](rxftlr) module"] + #[doc = "Receive FIFO Threshold Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxftlr](rxftlr) module"] pub type RXFTLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33161,7 +20403,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Transmit FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txflr](txflr) module"] + #[doc = "Transmit FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txflr](txflr) module"] pub type TXFLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33187,7 +20429,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Receive FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxflr](rxflr) module"] + #[doc = "Receive FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxflr](rxflr) module"] pub type RXFLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33213,7 +20455,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sr](sr) module"] + #[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module"] pub type SR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33239,7 +20481,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [imr](imr) module"] + #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr](imr) module"] pub type IMR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33265,7 +20507,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [isr](isr) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module"] pub type ISR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33291,7 +20533,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [risr](risr) module"] + #[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [risr](risr) module"] pub type RISR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33317,7 +20559,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Transmit FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txoicr](txoicr) module"] + #[doc = "Transmit FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txoicr](txoicr) module"] pub type TXOICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33343,7 +20585,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Receive FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxoicr](rxoicr) module"] + #[doc = "Receive FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoicr](rxoicr) module"] pub type RXOICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33369,7 +20611,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Receive FIFO Underflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxuicr](rxuicr) module"] + #[doc = "Receive FIFO Underflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxuicr](rxuicr) module"] pub type RXUICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33395,7 +20637,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Multi-Master Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [msticr](msticr) module"] + #[doc = "Multi-Master Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msticr](msticr) module"] pub type MSTICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33421,7 +20663,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [icr](icr) module"] + #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icr](icr) module"] pub type ICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33447,7 +20689,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "DMA Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dmacr](dmacr) module"] + #[doc = "DMA Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmacr](dmacr) module"] pub type DMACR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33473,7 +20715,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "DMA Transmit Data Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dmatdlr](dmatdlr) module"] + #[doc = "DMA Transmit Data Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmatdlr](dmatdlr) module"] pub type DMATDLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33499,7 +20741,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "DMA Receive Data Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dmardlr](dmardlr) module"] + #[doc = "DMA Receive Data Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmardlr](dmardlr) module"] pub type DMARDLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33525,7 +20767,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Identification Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [idr](idr) module"] + #[doc = "Identification Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idr](idr) module"] pub type IDR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33551,7 +20793,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "DWC_ssi component version\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ssic_version_id](ssic_version_id) module"] + #[doc = "DWC_ssi component version\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssic_version_id](ssic_version_id) module"] pub type SSIC_VERSION_ID = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33577,7 +20819,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dr](dr) module"] + #[doc = "Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dr](dr) module"] pub type DR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33603,7 +20845,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "RX Sample Delay Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rx_sample_delay](rx_sample_delay) module"] + #[doc = "RX Sample Delay Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_sample_delay](rx_sample_delay) module"] pub type RX_SAMPLE_DELAY = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33629,7 +20871,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "SPI Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [spi_ctrlr0](spi_ctrlr0) module"] + #[doc = "SPI Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_ctrlr0](spi_ctrlr0) module"] pub type SPI_CTRLR0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33654,22 +20896,19 @@ pub mod spi0 { } #[doc = "instruction_address_trans_mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum AITM_A { #[doc = "0: STANDARD"] - STANDARD, + STANDARD = 0, #[doc = "1: ADDR_STANDARD"] - ADDR_STANDARD, + ADDR_STANDARD = 1, #[doc = "2: AS_FRAME_FORMAT"] - AS_FRAME_FORMAT, + AS_FRAME_FORMAT = 2, } impl From for u8 { #[inline(always)] fn from(variant: AITM_A) -> Self { - match variant { - AITM_A::STANDARD => 0, - AITM_A::ADDR_STANDARD => 1, - AITM_A::AS_FRAME_FORMAT => 2, - } + variant as _ } } #[doc = "Reader of field `aitm`"] @@ -33821,7 +21060,7 @@ pub mod spi0 { } } } - #[doc = "XIP Mode bits\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_mode_bits](xip_mode_bits) module"] + #[doc = "XIP Mode bits\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_mode_bits](xip_mode_bits) module"] pub type XIP_MODE_BITS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33847,7 +21086,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "XIP INCR transfer opcode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_incr_inst](xip_incr_inst) module"] + #[doc = "XIP INCR transfer opcode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_incr_inst](xip_incr_inst) module"] pub type XIP_INCR_INST = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33873,7 +21112,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "XIP WRAP transfer opcode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_wrap_inst](xip_wrap_inst) module"] + #[doc = "XIP WRAP transfer opcode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_wrap_inst](xip_wrap_inst) module"] pub type XIP_WRAP_INST = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33899,7 +21138,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "XIP Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_ctrl](xip_ctrl) module"] + #[doc = "XIP Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_ctrl](xip_ctrl) module"] pub type XIP_CTRL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33925,7 +21164,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "XIP Slave Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_ser](xip_ser) module"] + #[doc = "XIP Slave Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_ser](xip_ser) module"] pub type XIP_SER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33951,7 +21190,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "XIP Receive FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xrxoicr](xrxoicr) module"] + #[doc = "XIP Receive FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xrxoicr](xrxoicr) module"] pub type XRXOICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -33977,7 +21216,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "XIP time out register for continuous transfers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_cnt_time_out](xip_cnt_time_out) module"] + #[doc = "XIP time out register for continuous transfers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_cnt_time_out](xip_cnt_time_out) module"] pub type XIP_CNT_TIME_OUT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34003,7 +21242,7 @@ pub mod spi0 { impl R {} impl W {} } - #[doc = "ENDIAN\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [endian](endian) module"] + #[doc = "ENDIAN\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [endian](endian) module"] pub type ENDIAN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34044,6 +21283,7 @@ impl SPI1 { } impl Deref for SPI1 { type Target = spi0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*SPI1::ptr() } } @@ -34062,6 +21302,7 @@ impl SPI2 { } impl Deref for SPI2 { type Target = spi2::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*SPI2::ptr() } } @@ -34074,7 +21315,7 @@ pub mod spi2 { #[doc = "0x00 - Dummy register: this peripheral is not implemented yet"] pub dummy: DUMMY, } - #[doc = "Dummy register: this peripheral is not implemented yet\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dummy](dummy) module"] + #[doc = "Dummy register: this peripheral is not implemented yet\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dummy](dummy) module"] pub type DUMMY = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34115,6 +21356,7 @@ impl SPI3 { } impl Deref for SPI3 { type Target = spi3::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*SPI3::ptr() } } @@ -34196,7 +21438,7 @@ pub mod spi3 { #[doc = "0x118 - ENDIAN"] pub endian: ENDIAN, } - #[doc = "Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ctrlr0](ctrlr0) module"] + #[doc = "Control Register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlr0](ctrlr0) module"] pub type CTRLR0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34235,25 +21477,21 @@ pub mod spi3 { } #[doc = "WORK_MODE\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum WORK_MODE_A { #[doc = "0: MODE_0"] - MODE0, + MODE0 = 0, #[doc = "1: MODE_1"] - MODE1, + MODE1 = 1, #[doc = "2: MODE_2"] - MODE2, + MODE2 = 2, #[doc = "3: MODE_3"] - MODE3, + MODE3 = 3, } impl From for u8 { #[inline(always)] fn from(variant: WORK_MODE_A) -> Self { - match variant { - WORK_MODE_A::MODE0 => 0, - WORK_MODE_A::MODE1 => 1, - WORK_MODE_A::MODE2 => 2, - WORK_MODE_A::MODE3 => 3, - } + variant as _ } } #[doc = "Reader of field `work_mode`"] @@ -34332,25 +21570,21 @@ pub mod spi3 { } #[doc = "TRANSFER_MODE\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum TMOD_A { #[doc = "0: TRANS_RECV"] - TRANS_RECV, + TRANS_RECV = 0, #[doc = "1: TRANS"] - TRANS, + TRANS = 1, #[doc = "2: RECV"] - RECV, + RECV = 2, #[doc = "3: EEROM"] - EEROM, + EEROM = 3, } impl From for u8 { #[inline(always)] fn from(variant: TMOD_A) -> Self { - match variant { - TMOD_A::TRANS_RECV => 0, - TMOD_A::TRANS => 1, - TMOD_A::RECV => 2, - TMOD_A::EEROM => 3, - } + variant as _ } } #[doc = "Reader of field `tmod`"] @@ -34429,25 +21663,21 @@ pub mod spi3 { } #[doc = "FRAME_FORMAT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum FRAME_FORMAT_A { #[doc = "0: STANDARD"] - STANDARD, + STANDARD = 0, #[doc = "1: DUAL"] - DUAL, + DUAL = 1, #[doc = "2: QUAD"] - QUAD, + QUAD = 2, #[doc = "3: OCTAL"] - OCTAL, + OCTAL = 3, } impl From for u8 { #[inline(always)] fn from(variant: FRAME_FORMAT_A) -> Self { - match variant { - FRAME_FORMAT_A::STANDARD => 0, - FRAME_FORMAT_A::DUAL => 1, - FRAME_FORMAT_A::QUAD => 2, - FRAME_FORMAT_A::OCTAL => 3, - } + variant as _ } } #[doc = "Reader of field `frame_format`"] @@ -34569,7 +21799,7 @@ pub mod spi3 { } } } - #[doc = "Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ctrlr1](ctrlr1) module"] + #[doc = "Control Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlr1](ctrlr1) module"] pub type CTRLR1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34595,7 +21825,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ssienr](ssienr) module"] + #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssienr](ssienr) module"] pub type SSIENR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34621,7 +21851,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Microwire Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [mwcr](mwcr) module"] + #[doc = "Microwire Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mwcr](mwcr) module"] pub type MWCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34647,7 +21877,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Slave Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ser](ser) module"] + #[doc = "Slave Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ser](ser) module"] pub type SER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34673,7 +21903,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Baud Rate Select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [baudr](baudr) module"] + #[doc = "Baud Rate Select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [baudr](baudr) module"] pub type BAUDR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34699,7 +21929,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Transmit FIFO Threshold Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txftlr](txftlr) module"] + #[doc = "Transmit FIFO Threshold Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txftlr](txftlr) module"] pub type TXFTLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34725,7 +21955,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Receive FIFO Threshold Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxftlr](rxftlr) module"] + #[doc = "Receive FIFO Threshold Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxftlr](rxftlr) module"] pub type RXFTLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34751,7 +21981,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Transmit FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txflr](txflr) module"] + #[doc = "Transmit FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txflr](txflr) module"] pub type TXFLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34777,7 +22007,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Receive FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxflr](rxflr) module"] + #[doc = "Receive FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxflr](rxflr) module"] pub type RXFLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34803,7 +22033,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sr](sr) module"] + #[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sr](sr) module"] pub type SR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34829,7 +22059,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [imr](imr) module"] + #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr](imr) module"] pub type IMR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34855,7 +22085,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [isr](isr) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module"] pub type ISR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34881,7 +22111,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [risr](risr) module"] + #[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [risr](risr) module"] pub type RISR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34907,7 +22137,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Transmit FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txoicr](txoicr) module"] + #[doc = "Transmit FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txoicr](txoicr) module"] pub type TXOICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34933,7 +22163,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Receive FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxoicr](rxoicr) module"] + #[doc = "Receive FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxoicr](rxoicr) module"] pub type RXOICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34959,7 +22189,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Receive FIFO Underflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxuicr](rxuicr) module"] + #[doc = "Receive FIFO Underflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxuicr](rxuicr) module"] pub type RXUICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -34985,7 +22215,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Multi-Master Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [msticr](msticr) module"] + #[doc = "Multi-Master Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [msticr](msticr) module"] pub type MSTICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35011,7 +22241,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [icr](icr) module"] + #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [icr](icr) module"] pub type ICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35037,7 +22267,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "DMA Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dmacr](dmacr) module"] + #[doc = "DMA Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmacr](dmacr) module"] pub type DMACR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35063,7 +22293,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "DMA Transmit Data Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dmatdlr](dmatdlr) module"] + #[doc = "DMA Transmit Data Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmatdlr](dmatdlr) module"] pub type DMATDLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35089,7 +22319,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "DMA Receive Data Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dmardlr](dmardlr) module"] + #[doc = "DMA Receive Data Level\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmardlr](dmardlr) module"] pub type DMARDLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35115,7 +22345,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Identification Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [idr](idr) module"] + #[doc = "Identification Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [idr](idr) module"] pub type IDR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35141,7 +22371,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "DWC_ssi component version\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ssic_version_id](ssic_version_id) module"] + #[doc = "DWC_ssi component version\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ssic_version_id](ssic_version_id) module"] pub type SSIC_VERSION_ID = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35167,7 +22397,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dr](dr) module"] + #[doc = "Data Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dr](dr) module"] pub type DR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35193,7 +22423,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "RX Sample Delay Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rx_sample_delay](rx_sample_delay) module"] + #[doc = "RX Sample Delay Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_sample_delay](rx_sample_delay) module"] pub type RX_SAMPLE_DELAY = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35219,7 +22449,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "SPI Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [spi_ctrlr0](spi_ctrlr0) module"] + #[doc = "SPI Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_ctrlr0](spi_ctrlr0) module"] pub type SPI_CTRLR0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35244,22 +22474,19 @@ pub mod spi3 { } #[doc = "instruction_address_trans_mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum AITM_A { #[doc = "0: STANDARD"] - STANDARD, + STANDARD = 0, #[doc = "1: ADDR_STANDARD"] - ADDR_STANDARD, + ADDR_STANDARD = 1, #[doc = "2: AS_FRAME_FORMAT"] - AS_FRAME_FORMAT, + AS_FRAME_FORMAT = 2, } impl From for u8 { #[inline(always)] fn from(variant: AITM_A) -> Self { - match variant { - AITM_A::STANDARD => 0, - AITM_A::ADDR_STANDARD => 1, - AITM_A::AS_FRAME_FORMAT => 2, - } + variant as _ } } #[doc = "Reader of field `aitm`"] @@ -35411,7 +22638,7 @@ pub mod spi3 { } } } - #[doc = "XIP Mode bits\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_mode_bits](xip_mode_bits) module"] + #[doc = "XIP Mode bits\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_mode_bits](xip_mode_bits) module"] pub type XIP_MODE_BITS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35437,7 +22664,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "XIP INCR transfer opcode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_incr_inst](xip_incr_inst) module"] + #[doc = "XIP INCR transfer opcode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_incr_inst](xip_incr_inst) module"] pub type XIP_INCR_INST = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35463,7 +22690,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "XIP WRAP transfer opcode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_wrap_inst](xip_wrap_inst) module"] + #[doc = "XIP WRAP transfer opcode\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_wrap_inst](xip_wrap_inst) module"] pub type XIP_WRAP_INST = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35489,7 +22716,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "XIP Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_ctrl](xip_ctrl) module"] + #[doc = "XIP Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_ctrl](xip_ctrl) module"] pub type XIP_CTRL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35515,7 +22742,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "XIP Slave Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_ser](xip_ser) module"] + #[doc = "XIP Slave Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_ser](xip_ser) module"] pub type XIP_SER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35541,7 +22768,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "XIP Receive FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xrxoicr](xrxoicr) module"] + #[doc = "XIP Receive FIFO Overflow Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xrxoicr](xrxoicr) module"] pub type XRXOICR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35567,7 +22794,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "XIP time out register for continuous transfers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [xip_cnt_time_out](xip_cnt_time_out) module"] + #[doc = "XIP time out register for continuous transfers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [xip_cnt_time_out](xip_cnt_time_out) module"] pub type XIP_CNT_TIME_OUT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35593,7 +22820,7 @@ pub mod spi3 { impl R {} impl W {} } - #[doc = "ENDIAN\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [endian](endian) module"] + #[doc = "ENDIAN\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [endian](endian) module"] pub type ENDIAN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35634,6 +22861,7 @@ impl I2S0 { } impl Deref for I2S0 { type Target = i2s0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*I2S0::ptr() } } @@ -35716,7 +22944,7 @@ pub mod i2s0 { #[doc = r"Register block"] #[doc = "Channel cluster"] pub mod channel { - #[doc = "Left Receive or Left Transmit Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [left_rxtx](left_rxtx) module"] + #[doc = "Left Receive or Left Transmit Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [left_rxtx](left_rxtx) module"] pub type LEFT_RXTX = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35742,7 +22970,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Right Receive or Right Transmit Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [right_rxtx](right_rxtx) module"] + #[doc = "Right Receive or Right Transmit Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [right_rxtx](right_rxtx) module"] pub type RIGHT_RXTX = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35768,7 +22996,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Receive Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rer](rer) module"] + #[doc = "Receive Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rer](rer) module"] pub type RER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35830,7 +23058,7 @@ pub mod i2s0 { } } } - #[doc = "Transmit Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ter](ter) module"] + #[doc = "Transmit Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ter](ter) module"] pub type TER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35892,7 +23120,7 @@ pub mod i2s0 { } } } - #[doc = "Receive Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rcr](rcr) module"] + #[doc = "Receive Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rcr](rcr) module"] pub type RCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -35917,31 +23145,25 @@ pub mod i2s0 { } #[doc = "Desired data resolution of receiver\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum WLEN_A { #[doc = "0: Ignore the word length"] - IGNORE, + IGNORE = 0, #[doc = "1: 12-bit data resolution of the receiver"] - RESOLUTION12, + RESOLUTION12 = 1, #[doc = "2: 16-bit data resolution of the receiver"] - RESOLUTION16, + RESOLUTION16 = 2, #[doc = "3: 20-bit data resolution of the receiver"] - RESOLUTION20, + RESOLUTION20 = 3, #[doc = "4: 24-bit data resolution of the receiver"] - RESOLUTION24, + RESOLUTION24 = 4, #[doc = "5: 32-bit data resolution of the receiver"] - RESOLUTION32, + RESOLUTION32 = 5, } impl From for u8 { #[inline(always)] fn from(variant: WLEN_A) -> Self { - match variant { - WLEN_A::IGNORE => 0, - WLEN_A::RESOLUTION12 => 1, - WLEN_A::RESOLUTION16 => 2, - WLEN_A::RESOLUTION20 => 3, - WLEN_A::RESOLUTION24 => 4, - WLEN_A::RESOLUTION32 => 5, - } + variant as _ } } #[doc = "Reader of field `wlen`"] @@ -36054,7 +23276,7 @@ pub mod i2s0 { } } } - #[doc = "Transmit Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tcr](tcr) module"] + #[doc = "Transmit Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tcr](tcr) module"] pub type TCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36080,7 +23302,7 @@ pub mod i2s0 { #[doc = "Desired data resolution of transmitter"] pub type WLEN_A = super::rcr::WLEN_A; #[doc = "Reader of field `wlen`"] - pub type WLEN_R = crate::R; + pub type WLEN_R = crate::R; #[doc = "Write proxy for field `wlen`"] pub struct WLEN_W<'a> { w: &'a mut W, @@ -36094,32 +23316,32 @@ pub mod i2s0 { #[doc = "Ignore the word length"] #[inline(always)] pub fn ignore(self) -> &'a mut W { - self.variant(super::rcr::WLEN_A::IGNORE) + self.variant(WLEN_A::IGNORE) } #[doc = "12-bit data resolution of the receiver"] #[inline(always)] pub fn resolution12(self) -> &'a mut W { - self.variant(super::rcr::WLEN_A::RESOLUTION12) + self.variant(WLEN_A::RESOLUTION12) } #[doc = "16-bit data resolution of the receiver"] #[inline(always)] pub fn resolution16(self) -> &'a mut W { - self.variant(super::rcr::WLEN_A::RESOLUTION16) + self.variant(WLEN_A::RESOLUTION16) } #[doc = "20-bit data resolution of the receiver"] #[inline(always)] pub fn resolution20(self) -> &'a mut W { - self.variant(super::rcr::WLEN_A::RESOLUTION20) + self.variant(WLEN_A::RESOLUTION20) } #[doc = "24-bit data resolution of the receiver"] #[inline(always)] pub fn resolution24(self) -> &'a mut W { - self.variant(super::rcr::WLEN_A::RESOLUTION24) + self.variant(WLEN_A::RESOLUTION24) } #[doc = "32-bit data resolution of the receiver"] #[inline(always)] pub fn resolution32(self) -> &'a mut W { - self.variant(super::rcr::WLEN_A::RESOLUTION32) + self.variant(WLEN_A::RESOLUTION32) } #[doc = r"Writes raw bits to the field"] #[inline(always)] @@ -36143,7 +23365,7 @@ pub mod i2s0 { } } } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [isr](isr) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isr](isr) module"] pub type ISR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36185,7 +23407,7 @@ pub mod i2s0 { } } } - #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [imr](imr) module"] + #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [imr](imr) module"] pub type IMR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36349,7 +23571,7 @@ pub mod i2s0 { } } } - #[doc = "Receive Overrun Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ror](ror) module"] + #[doc = "Receive Overrun Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ror](ror) module"] pub type ROR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36370,7 +23592,7 @@ pub mod i2s0 { } } } - #[doc = "Transmit Overrun Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tor](tor) module"] + #[doc = "Transmit Overrun Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tor](tor) module"] pub type TOR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36391,7 +23613,7 @@ pub mod i2s0 { } } } - #[doc = "Receive FIFO Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rfcr](rfcr) module"] + #[doc = "Receive FIFO Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rfcr](rfcr) module"] pub type RFCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36416,61 +23638,45 @@ pub mod i2s0 { } #[doc = "Trigger level in the RX FIFO at which the receiver data available interrupt generate\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum RXCHDT_A { #[doc = "0: Interrupt trigger when FIFO level is 1"] - LEVEL1, + LEVEL1 = 0, #[doc = "1: Interrupt trigger when FIFO level is 2"] - LEVEL2, + LEVEL2 = 1, #[doc = "2: Interrupt trigger when FIFO level is 3"] - LEVEL3, + LEVEL3 = 2, #[doc = "3: Interrupt trigger when FIFO level is 4"] - LEVEL4, + LEVEL4 = 3, #[doc = "4: Interrupt trigger when FIFO level is 5"] - LEVEL5, + LEVEL5 = 4, #[doc = "5: Interrupt trigger when FIFO level is 6"] - LEVEL6, + LEVEL6 = 5, #[doc = "6: Interrupt trigger when FIFO level is 7"] - LEVEL7, + LEVEL7 = 6, #[doc = "7: Interrupt trigger when FIFO level is 8"] - LEVEL8, + LEVEL8 = 7, #[doc = "8: Interrupt trigger when FIFO level is 9"] - LEVEL9, + LEVEL9 = 8, #[doc = "9: Interrupt trigger when FIFO level is 10"] - LEVEL10, + LEVEL10 = 9, #[doc = "10: Interrupt trigger when FIFO level is 11"] - LEVEL11, + LEVEL11 = 10, #[doc = "11: Interrupt trigger when FIFO level is 12"] - LEVEL12, + LEVEL12 = 11, #[doc = "12: Interrupt trigger when FIFO level is 13"] - LEVEL13, + LEVEL13 = 12, #[doc = "13: Interrupt trigger when FIFO level is 14"] - LEVEL14, + LEVEL14 = 13, #[doc = "14: Interrupt trigger when FIFO level is 15"] - LEVEL15, + LEVEL15 = 14, #[doc = "15: Interrupt trigger when FIFO level is 16"] - LEVEL16, + LEVEL16 = 15, } impl From for u8 { #[inline(always)] fn from(variant: RXCHDT_A) -> Self { - match variant { - RXCHDT_A::LEVEL1 => 0, - RXCHDT_A::LEVEL2 => 1, - RXCHDT_A::LEVEL3 => 2, - RXCHDT_A::LEVEL4 => 3, - RXCHDT_A::LEVEL5 => 4, - RXCHDT_A::LEVEL6 => 5, - RXCHDT_A::LEVEL7 => 6, - RXCHDT_A::LEVEL8 => 7, - RXCHDT_A::LEVEL9 => 8, - RXCHDT_A::LEVEL10 => 9, - RXCHDT_A::LEVEL11 => 10, - RXCHDT_A::LEVEL12 => 11, - RXCHDT_A::LEVEL13 => 12, - RXCHDT_A::LEVEL14 => 13, - RXCHDT_A::LEVEL15 => 14, - RXCHDT_A::LEVEL16 => 15, - } + variant as _ } } #[doc = "Reader of field `rxchdt`"] @@ -36694,7 +23900,7 @@ pub mod i2s0 { } } } - #[doc = "Transmit FIFO Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tfcr](tfcr) module"] + #[doc = "Transmit FIFO Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tfcr](tfcr) module"] pub type TFCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36720,7 +23926,7 @@ pub mod i2s0 { #[doc = "Trigger level in the TX FIFO at which the transmitter data available interrupt generate"] pub type TXCHET_A = super::rfcr::RXCHDT_A; #[doc = "Reader of field `txchet`"] - pub type TXCHET_R = crate::R; + pub type TXCHET_R = crate::R; #[doc = "Write proxy for field `txchet`"] pub struct TXCHET_W<'a> { w: &'a mut W, @@ -36736,82 +23942,82 @@ pub mod i2s0 { #[doc = "Interrupt trigger when FIFO level is 1"] #[inline(always)] pub fn level1(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL1) + self.variant(TXCHET_A::LEVEL1) } #[doc = "Interrupt trigger when FIFO level is 2"] #[inline(always)] pub fn level2(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL2) + self.variant(TXCHET_A::LEVEL2) } #[doc = "Interrupt trigger when FIFO level is 3"] #[inline(always)] pub fn level3(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL3) + self.variant(TXCHET_A::LEVEL3) } #[doc = "Interrupt trigger when FIFO level is 4"] #[inline(always)] pub fn level4(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL4) + self.variant(TXCHET_A::LEVEL4) } #[doc = "Interrupt trigger when FIFO level is 5"] #[inline(always)] pub fn level5(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL5) + self.variant(TXCHET_A::LEVEL5) } #[doc = "Interrupt trigger when FIFO level is 6"] #[inline(always)] pub fn level6(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL6) + self.variant(TXCHET_A::LEVEL6) } #[doc = "Interrupt trigger when FIFO level is 7"] #[inline(always)] pub fn level7(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL7) + self.variant(TXCHET_A::LEVEL7) } #[doc = "Interrupt trigger when FIFO level is 8"] #[inline(always)] pub fn level8(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL8) + self.variant(TXCHET_A::LEVEL8) } #[doc = "Interrupt trigger when FIFO level is 9"] #[inline(always)] pub fn level9(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL9) + self.variant(TXCHET_A::LEVEL9) } #[doc = "Interrupt trigger when FIFO level is 10"] #[inline(always)] pub fn level10(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL10) + self.variant(TXCHET_A::LEVEL10) } #[doc = "Interrupt trigger when FIFO level is 11"] #[inline(always)] pub fn level11(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL11) + self.variant(TXCHET_A::LEVEL11) } #[doc = "Interrupt trigger when FIFO level is 12"] #[inline(always)] pub fn level12(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL12) + self.variant(TXCHET_A::LEVEL12) } #[doc = "Interrupt trigger when FIFO level is 13"] #[inline(always)] pub fn level13(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL13) + self.variant(TXCHET_A::LEVEL13) } #[doc = "Interrupt trigger when FIFO level is 14"] #[inline(always)] pub fn level14(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL14) + self.variant(TXCHET_A::LEVEL14) } #[doc = "Interrupt trigger when FIFO level is 15"] #[inline(always)] pub fn level15(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL15) + self.variant(TXCHET_A::LEVEL15) } #[doc = "Interrupt trigger when FIFO level is 16"] #[inline(always)] pub fn level16(self) -> &'a mut W { - self.variant(super::rfcr::RXCHDT_A::LEVEL16) + self.variant(TXCHET_A::LEVEL16) } #[doc = r"Writes raw bits to the field"] #[inline(always)] @@ -36835,7 +24041,7 @@ pub mod i2s0 { } } } - #[doc = "Receive FIFO Flush Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rff](rff) module"] + #[doc = "Receive FIFO Flush Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rff](rff) module"] pub type RFF = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36862,17 +24068,14 @@ pub mod i2s0 { #[derive(Clone, Copy, Debug, PartialEq)] pub enum RXCHFR_A { #[doc = "0: Not flush an individual FIFO"] - NOT_FLUSH, + NOT_FLUSH = 0, #[doc = "1: Flush an indiviadual FIFO"] - FLUSH, + FLUSH = 1, } impl From for bool { #[inline(always)] fn from(variant: RXCHFR_A) -> Self { - match variant { - RXCHFR_A::NOT_FLUSH => false, - RXCHFR_A::FLUSH => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `rxchfr`"] @@ -36951,7 +24154,7 @@ pub mod i2s0 { } } } - #[doc = "Transmit FIFO Flush Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tff](tff) module"] + #[doc = "Transmit FIFO Flush Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tff](tff) module"] pub type TFF = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -36977,7 +24180,7 @@ pub mod i2s0 { #[doc = "Transmit channel FIFO reset"] pub type RTXCHFR_A = super::rff::RXCHFR_A; #[doc = "Reader of field `rtxchfr`"] - pub type RTXCHFR_R = crate::R; + pub type RTXCHFR_R = crate::R; #[doc = "Write proxy for field `rtxchfr`"] pub struct RTXCHFR_W<'a> { w: &'a mut W, @@ -36993,12 +24196,12 @@ pub mod i2s0 { #[doc = "Not flush an individual FIFO"] #[inline(always)] pub fn not_flush(self) -> &'a mut W { - self.variant(super::rff::RXCHFR_A::NOT_FLUSH) + self.variant(RTXCHFR_A::NOT_FLUSH) } #[doc = "Flush an indiviadual FIFO"] #[inline(always)] pub fn flush(self) -> &'a mut W { - self.variant(super::rff::RXCHFR_A::FLUSH) + self.variant(RTXCHFR_A::FLUSH) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -37032,7 +24235,7 @@ pub mod i2s0 { } } } - #[doc = "_RESERVED0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [_reserved](_reserved) module"] + #[doc = "_RESERVED0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [_reserved](_reserved) module"] pub type _RESERVED = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37059,7 +24262,7 @@ pub mod i2s0 { impl W {} } } - #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ier](ier) module"] + #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ier](ier) module"] pub type IER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37121,7 +24324,7 @@ pub mod i2s0 { } } } - #[doc = "Receiver Block Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [irer](irer) module"] + #[doc = "Receiver Block Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irer](irer) module"] pub type IRER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37183,7 +24386,7 @@ pub mod i2s0 { } } } - #[doc = "Transmitter Block Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [iter](iter) module"] + #[doc = "Transmitter Block Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iter](iter) module"] pub type ITER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37245,7 +24448,7 @@ pub mod i2s0 { } } } - #[doc = "Clock Generation enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [cer](cer) module"] + #[doc = "Clock Generation enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cer](cer) module"] pub type CER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37307,7 +24510,7 @@ pub mod i2s0 { } } } - #[doc = "Clock Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ccr](ccr) module"] + #[doc = "Clock Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccr](ccr) module"] pub type CCR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37332,28 +24535,23 @@ pub mod i2s0 { } #[doc = "Gating of sclk\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum CLK_GATE_A { #[doc = "0: Clock gating is disabled"] - NO, + NO = 0, #[doc = "1: Gating after 12 sclk cycles"] - CYCLES12, + CYCLES12 = 1, #[doc = "2: Gating after 16 sclk cycles"] - CYCLES16, + CYCLES16 = 2, #[doc = "3: Gating after 20 sclk cycles"] - CYCLES20, + CYCLES20 = 3, #[doc = "4: Gating after 24 sclk cycles"] - CYCLES24, + CYCLES24 = 4, } impl From for u8 { #[inline(always)] fn from(variant: CLK_GATE_A) -> Self { - match variant { - CLK_GATE_A::NO => 0, - CLK_GATE_A::CYCLES12 => 1, - CLK_GATE_A::CYCLES16 => 2, - CLK_GATE_A::CYCLES20 => 3, - CLK_GATE_A::CYCLES24 => 4, - } + variant as _ } } #[doc = "Reader of field `clk_gate`"] @@ -37442,22 +24640,19 @@ pub mod i2s0 { } #[doc = "The number of sclk cycles for which the word select line stayd in the left aligned or right aligned mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum CLK_WORD_SIZE_A { #[doc = "0: 16 sclk cycles"] - CYCLES16, + CYCLES16 = 0, #[doc = "1: 24 sclk cycles"] - CYCLES24, + CYCLES24 = 1, #[doc = "2: 32 sclk cycles"] - CYCLES32, + CYCLES32 = 2, } impl From for u8 { #[inline(always)] fn from(variant: CLK_WORD_SIZE_A) -> Self { - match variant { - CLK_WORD_SIZE_A::CYCLES16 => 0, - CLK_WORD_SIZE_A::CYCLES24 => 1, - CLK_WORD_SIZE_A::CYCLES32 => 2, - } + variant as _ } } #[doc = "Reader of field `clk_word_size`"] @@ -37524,22 +24719,19 @@ pub mod i2s0 { } #[doc = "Alignment mode setting\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum ALIGN_MODE_A { #[doc = "1: Standard I2S format"] - STANDARD, + STANDARD = 1, #[doc = "2: Right aligned format"] - RIGHT, + RIGHT = 2, #[doc = "4: Left aligned format"] - LEFT, + LEFT = 4, } impl From for u8 { #[inline(always)] fn from(variant: ALIGN_MODE_A) -> Self { - match variant { - ALIGN_MODE_A::STANDARD => 1, - ALIGN_MODE_A::RIGHT => 2, - ALIGN_MODE_A::LEFT => 4, - } + variant as _ } } #[doc = "Reader of field `align_mode`"] @@ -37775,7 +24967,7 @@ pub mod i2s0 { } } } - #[doc = "Receiver Block FIFO Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxffr](rxffr) module"] + #[doc = "Receiver Block FIFO Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxffr](rxffr) module"] pub type RXFFR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37802,17 +24994,14 @@ pub mod i2s0 { #[derive(Clone, Copy, Debug, PartialEq)] pub enum RXFFR_A { #[doc = "0: Not flush FIFO"] - NOT_FLUSH, + NOT_FLUSH = 0, #[doc = "1: Flush FIFO"] - FLUSH, + FLUSH = 1, } impl From for bool { #[inline(always)] fn from(variant: RXFFR_A) -> Self { - match variant { - RXFFR_A::NOT_FLUSH => false, - RXFFR_A::FLUSH => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `rxffr`"] @@ -37891,7 +25080,7 @@ pub mod i2s0 { } } } - #[doc = "Transmitter Block FIFO Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txffr](txffr) module"] + #[doc = "Transmitter Block FIFO Reset Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txffr](txffr) module"] pub type TXFFR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37917,7 +25106,7 @@ pub mod i2s0 { #[doc = "Transmitter FIFO reset"] pub type RXFFR_A = super::rxffr::RXFFR_A; #[doc = "Reader of field `rxffr`"] - pub type RXFFR_R = crate::R; + pub type RXFFR_R = crate::R; #[doc = "Write proxy for field `rxffr`"] pub struct RXFFR_W<'a> { w: &'a mut W, @@ -37933,12 +25122,12 @@ pub mod i2s0 { #[doc = "Not flush FIFO"] #[inline(always)] pub fn not_flush(self) -> &'a mut W { - self.variant(super::rxffr::RXFFR_A::NOT_FLUSH) + self.variant(RXFFR_A::NOT_FLUSH) } #[doc = "Flush FIFO"] #[inline(always)] pub fn flush(self) -> &'a mut W { - self.variant(super::rxffr::RXFFR_A::FLUSH) + self.variant(RXFFR_A::FLUSH) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -37972,7 +25161,7 @@ pub mod i2s0 { } } } - #[doc = "Receiver Block DMA Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxdma](rxdma) module"] + #[doc = "Receiver Block DMA Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxdma](rxdma) module"] pub type RXDMA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -37998,7 +25187,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Reset Receiver Block DMA Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rrxdma](rrxdma) module"] + #[doc = "Reset Receiver Block DMA Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rrxdma](rrxdma) module"] pub type RRXDMA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38024,7 +25213,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Transmitter Block DMA Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txdma](txdma) module"] + #[doc = "Transmitter Block DMA Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txdma](txdma) module"] pub type TXDMA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38050,7 +25239,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Reset Transmitter Block DMA Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rtxdma](rtxdma) module"] + #[doc = "Reset Transmitter Block DMA Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rtxdma](rtxdma) module"] pub type RTXDMA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38076,7 +25265,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Component Parameter Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [i2s_comp_param_2](i2s_comp_param_2) module"] + #[doc = "Component Parameter Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2s_comp_param_2](i2s_comp_param_2) module"] pub type I2S_COMP_PARAM_2 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38102,7 +25291,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Component Parameter Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [i2s_comp_param_1](i2s_comp_param_1) module"] + #[doc = "Component Parameter Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2s_comp_param_1](i2s_comp_param_1) module"] pub type I2S_COMP_PARAM_1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38128,7 +25317,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Component Version Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [i2s_comp_version_1](i2s_comp_version_1) module"] + #[doc = "Component Version Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2s_comp_version_1](i2s_comp_version_1) module"] pub type I2S_COMP_VERSION_1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38154,7 +25343,7 @@ pub mod i2s0 { impl R {} impl W {} } - #[doc = "Component Type Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [i2s_comp_type](i2s_comp_type) module"] + #[doc = "Component Type Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [i2s_comp_type](i2s_comp_type) module"] pub type I2S_COMP_TYPE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38195,6 +25384,7 @@ impl APU { } impl Deref for APU { type Target = apu::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*APU::ptr() } } @@ -38235,7 +25425,7 @@ pub mod apu { #[doc = "0x134 - Saturation Limits"] pub sat_limits: SAT_LIMITS, } - #[doc = "Channel Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ch_cfg](ch_cfg) module"] + #[doc = "Channel Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch_cfg](ch_cfg) module"] pub type CH_CFG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38477,7 +25667,7 @@ pub mod apu { } } } - #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ctl](ctl) module"] + #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctl](ctl) module"] pub type CTL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38810,7 +26000,7 @@ pub mod apu { } } } - #[doc = "Direction Sample Buffer Read Index Configure Register (16 directions * 2 values * 4 indices)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dir_bidx](dir_bidx) module"] + #[doc = "Direction Sample Buffer Read Index Configure Register (16 directions * 2 values * 4 indices)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dir_bidx](dir_bidx) module"] pub type DIR_BIDX = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38825,7 +26015,8 @@ pub mod apu { pub type R = crate::R; #[doc = "Writer for register dir_bidx[%s]"] pub type W = crate::W; - #[doc = "Register dir_bidx[%s] `reset()`'s with value 0"] + #[doc = "Register dir_bidx[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::DIR_BIDX { type Type = u32; #[inline(always)] @@ -38833,108 +26024,87 @@ pub mod apu { 0 } } - #[doc = "Reader of field `rd_idx0`"] - pub type RD_IDX0_R = crate::R; - #[doc = "Write proxy for field `rd_idx0`"] - pub struct RD_IDX0_W<'a> { + #[doc = "Reader of field `rd_idx%s`"] + pub type RD_IDX_R = crate::R; + #[doc = "Write proxy for fields `rd_idx(0-3)`"] + pub struct RD_IDX_W<'a> { w: &'a mut W, + offset: usize, } - impl<'a> RD_IDX0_W<'a> { + impl<'a> RD_IDX_W<'a> { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f); - self.w - } - } - #[doc = "Reader of field `rd_idx1`"] - pub type RD_IDX1_R = crate::R; - #[doc = "Write proxy for field `rd_idx1`"] - pub struct RD_IDX1_W<'a> { - w: &'a mut W, - } - impl<'a> RD_IDX1_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 8)) | (((value as u32) & 0x3f) << 8); + self.w.bits = (self.w.bits & !(0x3f << self.offset)) + | (((value as u32) & 0x3f) << self.offset); self.w } } - #[doc = "Reader of field `rd_idx2`"] - pub type RD_IDX2_R = crate::R; - #[doc = "Write proxy for field `rd_idx2`"] - pub struct RD_IDX2_W<'a> { - w: &'a mut W, - } - impl<'a> RD_IDX2_W<'a> { - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 16)) | (((value as u32) & 0x3f) << 16); - self.w - } - } - #[doc = "Reader of field `rd_idx3`"] - pub type RD_IDX3_R = crate::R; - #[doc = "Write proxy for field `rd_idx3`"] - pub struct RD_IDX3_W<'a> { - w: &'a mut W, - } - impl<'a> RD_IDX3_W<'a> { - #[doc = r"Writes raw bits to the field"] + impl R { + #[doc = "rd_idx%s"] #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !(0x3f << 24)) | (((value as u32) & 0x3f) << 24); - self.w + pub unsafe fn rd_idx(&self, n: usize) -> RD_IDX_R { + RD_IDX_R::new(((self.bits >> n * 8) & 0x3f) as u8) } - } - impl R { #[doc = "Bits 0:5 - rd_idx0"] #[inline(always)] - pub fn rd_idx0(&self) -> RD_IDX0_R { - RD_IDX0_R::new((self.bits & 0x3f) as u8) + pub fn rd_idx0(&self) -> RD_IDX_R { + RD_IDX_R::new((self.bits & 0x3f) as u8) } #[doc = "Bits 8:13 - rd_idx1"] #[inline(always)] - pub fn rd_idx1(&self) -> RD_IDX1_R { - RD_IDX1_R::new(((self.bits >> 8) & 0x3f) as u8) + pub fn rd_idx1(&self) -> RD_IDX_R { + RD_IDX_R::new(((self.bits >> 8) & 0x3f) as u8) } #[doc = "Bits 16:21 - rd_idx2"] #[inline(always)] - pub fn rd_idx2(&self) -> RD_IDX2_R { - RD_IDX2_R::new(((self.bits >> 16) & 0x3f) as u8) + pub fn rd_idx2(&self) -> RD_IDX_R { + RD_IDX_R::new(((self.bits >> 16) & 0x3f) as u8) } #[doc = "Bits 24:29 - rd_idx3"] #[inline(always)] - pub fn rd_idx3(&self) -> RD_IDX3_R { - RD_IDX3_R::new(((self.bits >> 24) & 0x3f) as u8) + pub fn rd_idx3(&self) -> RD_IDX_R { + RD_IDX_R::new(((self.bits >> 24) & 0x3f) as u8) } } impl W { + #[doc = "rd_idx%s"] + #[inline(always)] + pub unsafe fn rd_idx(&mut self, n: usize) -> RD_IDX_W { + RD_IDX_W { + w: self, + offset: n * 8, + } + } #[doc = "Bits 0:5 - rd_idx0"] #[inline(always)] - pub fn rd_idx0(&mut self) -> RD_IDX0_W { - RD_IDX0_W { w: self } + pub fn rd_idx0(&mut self) -> RD_IDX_W { + RD_IDX_W { w: self, offset: 0 } } #[doc = "Bits 8:13 - rd_idx1"] #[inline(always)] - pub fn rd_idx1(&mut self) -> RD_IDX1_W { - RD_IDX1_W { w: self } + pub fn rd_idx1(&mut self) -> RD_IDX_W { + RD_IDX_W { w: self, offset: 8 } } #[doc = "Bits 16:21 - rd_idx2"] #[inline(always)] - pub fn rd_idx2(&mut self) -> RD_IDX2_W { - RD_IDX2_W { w: self } + pub fn rd_idx2(&mut self) -> RD_IDX_W { + RD_IDX_W { + w: self, + offset: 16, + } } #[doc = "Bits 24:29 - rd_idx3"] #[inline(always)] - pub fn rd_idx3(&mut self) -> RD_IDX3_W { - RD_IDX3_W { w: self } + pub fn rd_idx3(&mut self) -> RD_IDX_W { + RD_IDX_W { + w: self, + offset: 24, + } } } } - #[doc = "FIR0 pre-filter coefficients\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pre_fir0_coef](pre_fir0_coef) module"] + #[doc = "FIR0 pre-filter coefficients\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pre_fir0_coef](pre_fir0_coef) module"] pub type PRE_FIR0_COEF = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -38949,7 +26119,8 @@ pub mod apu { pub type R = crate::R; #[doc = "Writer for register pre_fir0_coef[%s]"] pub type W = crate::W; - #[doc = "Register pre_fir0_coef[%s] `reset()`'s with value 0"] + #[doc = "Register pre_fir0_coef[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::PRE_FIR0_COEF { type Type = u32; #[inline(always)] @@ -39010,7 +26181,7 @@ pub mod apu { } } } - #[doc = "FIR0 post-filter coefficients\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [post_fir0_coef](post_fir0_coef) module"] + #[doc = "FIR0 post-filter coefficients\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [post_fir0_coef](post_fir0_coef) module"] pub type POST_FIR0_COEF = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39025,7 +26196,8 @@ pub mod apu { pub type R = crate::R; #[doc = "Writer for register post_fir0_coef[%s]"] pub type W = crate::W; - #[doc = "Register post_fir0_coef[%s] `reset()`'s with value 0"] + #[doc = "Register post_fir0_coef[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::POST_FIR0_COEF { type Type = u32; #[inline(always)] @@ -39086,7 +26258,7 @@ pub mod apu { } } } - #[doc = "FIR1 pre-filter coeffecients\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pre_fir1_coef](pre_fir1_coef) module"] + #[doc = "FIR1 pre-filter coeffecients\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pre_fir1_coef](pre_fir1_coef) module"] pub type PRE_FIR1_COEF = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39101,7 +26273,8 @@ pub mod apu { pub type R = crate::R; #[doc = "Writer for register pre_fir1_coef[%s]"] pub type W = crate::W; - #[doc = "Register pre_fir1_coef[%s] `reset()`'s with value 0"] + #[doc = "Register pre_fir1_coef[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::PRE_FIR1_COEF { type Type = u32; #[inline(always)] @@ -39162,7 +26335,7 @@ pub mod apu { } } } - #[doc = "FIR1 post-filter coefficients\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [post_fir1_coef](post_fir1_coef) module"] + #[doc = "FIR1 post-filter coefficients\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [post_fir1_coef](post_fir1_coef) module"] pub type POST_FIR1_COEF = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39177,7 +26350,8 @@ pub mod apu { pub type R = crate::R; #[doc = "Writer for register post_fir1_coef[%s]"] pub type W = crate::W; - #[doc = "Register post_fir1_coef[%s] `reset()`'s with value 0"] + #[doc = "Register post_fir1_coef[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::POST_FIR1_COEF { type Type = u32; #[inline(always)] @@ -39238,7 +26412,7 @@ pub mod apu { } } } - #[doc = "Downsize Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dwsz_cfg](dwsz_cfg) module"] + #[doc = "Downsize Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dwsz_cfg](dwsz_cfg) module"] pub type DWSZ_CFG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39338,7 +26512,7 @@ pub mod apu { } } } - #[doc = "FFT Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fft_cfg](fft_cfg) module"] + #[doc = "FFT Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fft_cfg](fft_cfg) module"] pub type FFT_CFG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39364,7 +26538,7 @@ pub mod apu { impl R {} impl W {} } - #[doc = "Read register for DMA to sample-out buffers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sobuf_dma_rdata](sobuf_dma_rdata) module"] + #[doc = "Read register for DMA to sample-out buffers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sobuf_dma_rdata](sobuf_dma_rdata) module"] pub type SOBUF_DMA_RDATA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39390,7 +26564,7 @@ pub mod apu { impl R {} impl W {} } - #[doc = "Read register for DMA to voice-out buffers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [vobuf_dma_rdata](vobuf_dma_rdata) module"] + #[doc = "Read register for DMA to voice-out buffers\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [vobuf_dma_rdata](vobuf_dma_rdata) module"] pub type VOBUF_DMA_RDATA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39416,7 +26590,7 @@ pub mod apu { impl R {} impl W {} } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [int_stat](int_stat) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_stat](int_stat) module"] pub type INT_STAT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39512,7 +26686,7 @@ pub mod apu { } } } - #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [int_mask](int_mask) module"] + #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_mask](int_mask) module"] pub type INT_MASK = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39608,7 +26782,7 @@ pub mod apu { } } } - #[doc = "Saturation Counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sat_counter](sat_counter) module"] + #[doc = "Saturation Counter\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sat_counter](sat_counter) module"] pub type SAT_COUNTER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39684,7 +26858,7 @@ pub mod apu { } } } - #[doc = "Saturation Limits\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sat_limits](sat_limits) module"] + #[doc = "Saturation Limits\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sat_limits](sat_limits) module"] pub type SAT_LIMITS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39775,6 +26949,7 @@ impl I2S1 { } impl Deref for I2S1 { type Target = i2s0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*I2S1::ptr() } } @@ -39793,6 +26968,7 @@ impl I2S2 { } impl Deref for I2S2 { type Target = i2s0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*I2S2::ptr() } } @@ -39811,6 +26987,7 @@ impl I2C0 { } impl Deref for I2C0 { type Target = i2c0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*I2C0::ptr() } } @@ -39901,7 +27078,7 @@ pub mod i2c0 { #[doc = "0xfc - Component Type Register"] pub comp_type: COMP_TYPE, } - #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [con](con) module"] + #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [con](con) module"] pub type CON = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -39950,22 +27127,19 @@ pub mod i2c0 { } #[doc = "Speed\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum SPEED_A { #[doc = "0: STANDARD"] - STANDARD, + STANDARD = 0, #[doc = "1: FAST"] - FAST, + FAST = 1, #[doc = "2: HIGHSPEED"] - HIGHSPEED, + HIGHSPEED = 2, } impl From for u8 { #[inline(always)] fn from(variant: SPEED_A) -> Self { - match variant { - SPEED_A::STANDARD => 0, - SPEED_A::FAST => 1, - SPEED_A::HIGHSPEED => 2, - } + variant as _ } } #[doc = "Reader of field `speed`"] @@ -40034,17 +27208,14 @@ pub mod i2c0 { #[derive(Clone, Copy, Debug, PartialEq)] pub enum ADDR_SLAVE_WIDTH_A { #[doc = "0: 7-bit address"] - B7, + B7 = 0, #[doc = "1: 10-bit address"] - B10, + B10 = 1, } impl From for bool { #[inline(always)] fn from(variant: ADDR_SLAVE_WIDTH_A) -> Self { - match variant { - ADDR_SLAVE_WIDTH_A::B7 => false, - ADDR_SLAVE_WIDTH_A::B10 => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `addr_slave_width`"] @@ -40279,7 +27450,7 @@ pub mod i2c0 { } } } - #[doc = "Target Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tar](tar) module"] + #[doc = "Target Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tar](tar) module"] pub type TAR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -40368,17 +27539,14 @@ pub mod i2c0 { #[derive(Clone, Copy, Debug, PartialEq)] pub enum ADDR_MASTER_WIDTH_A { #[doc = "0: 7-bit address"] - B7, + B7 = 0, #[doc = "1: 10-bit address"] - B10, + B10 = 1, } impl From for bool { #[inline(always)] fn from(variant: ADDR_MASTER_WIDTH_A) -> Self { - match variant { - ADDR_MASTER_WIDTH_A::B7 => false, - ADDR_MASTER_WIDTH_A::B10 => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `addr_master_width`"] @@ -40487,7 +27655,7 @@ pub mod i2c0 { } } } - #[doc = "Slave Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sar](sar) module"] + #[doc = "Slave Address Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sar](sar) module"] pub type SAR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -40539,7 +27707,7 @@ pub mod i2c0 { } } } - #[doc = "Data Buffer and Command Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [data_cmd](data_cmd) module"] + #[doc = "Data Buffer and Command Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data_cmd](data_cmd) module"] pub type DATA_CMD = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -40625,7 +27793,7 @@ pub mod i2c0 { } } } - #[doc = "Standard Speed Clock SCL High Count Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ss_scl_hcnt](ss_scl_hcnt) module"] + #[doc = "Standard Speed Clock SCL High Count Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ss_scl_hcnt](ss_scl_hcnt) module"] pub type SS_SCL_HCNT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -40677,7 +27845,7 @@ pub mod i2c0 { } } } - #[doc = "Standard Speed Clock SCL Low Count Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ss_scl_lcnt](ss_scl_lcnt) module"] + #[doc = "Standard Speed Clock SCL Low Count Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ss_scl_lcnt](ss_scl_lcnt) module"] pub type SS_SCL_LCNT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -40729,7 +27897,7 @@ pub mod i2c0 { } } } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intr_stat](intr_stat) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intr_stat](intr_stat) module"] pub type INTR_STAT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -40827,7 +27995,7 @@ pub mod i2c0 { } } } - #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intr_mask](intr_mask) module"] + #[doc = "Interrupt Mask Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intr_mask](intr_mask) module"] pub type INTR_MASK = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41263,7 +28431,7 @@ pub mod i2c0 { } } } - #[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [raw_intr_stat](raw_intr_stat) module"] + #[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [raw_intr_stat](raw_intr_stat) module"] pub type RAW_INTR_STAT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41699,7 +28867,7 @@ pub mod i2c0 { } } } - #[doc = "Receive FIFO Threshold Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rx_tl](rx_tl) module"] + #[doc = "Receive FIFO Threshold Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rx_tl](rx_tl) module"] pub type RX_TL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41751,7 +28919,7 @@ pub mod i2c0 { } } } - #[doc = "Transmit FIFO Threshold Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tx_tl](tx_tl) module"] + #[doc = "Transmit FIFO Threshold Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_tl](tx_tl) module"] pub type TX_TL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41803,7 +28971,7 @@ pub mod i2c0 { } } } - #[doc = "Clear Combined and Individual Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_intr](clr_intr) module"] + #[doc = "Clear Combined and Individual Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_intr](clr_intr) module"] pub type CLR_INTR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41824,7 +28992,7 @@ pub mod i2c0 { } } } - #[doc = "Clear RX_UNDER Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_rx_under](clr_rx_under) module"] + #[doc = "Clear RX_UNDER Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_rx_under](clr_rx_under) module"] pub type CLR_RX_UNDER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41845,7 +29013,7 @@ pub mod i2c0 { } } } - #[doc = "Clear RX_OVER Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_rx_over](clr_rx_over) module"] + #[doc = "Clear RX_OVER Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_rx_over](clr_rx_over) module"] pub type CLR_RX_OVER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41866,7 +29034,7 @@ pub mod i2c0 { } } } - #[doc = "Clear TX_OVER Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_tx_over](clr_tx_over) module"] + #[doc = "Clear TX_OVER Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_tx_over](clr_tx_over) module"] pub type CLR_TX_OVER = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41887,7 +29055,7 @@ pub mod i2c0 { } } } - #[doc = "Clear RD_REQ Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_rd_req](clr_rd_req) module"] + #[doc = "Clear RD_REQ Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_rd_req](clr_rd_req) module"] pub type CLR_RD_REQ = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41908,7 +29076,7 @@ pub mod i2c0 { } } } - #[doc = "Clear TX_ABRT Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_tx_abrt](clr_tx_abrt) module"] + #[doc = "Clear TX_ABRT Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_tx_abrt](clr_tx_abrt) module"] pub type CLR_TX_ABRT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41929,7 +29097,7 @@ pub mod i2c0 { } } } - #[doc = "Clear RX_DONE Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_rx_done](clr_rx_done) module"] + #[doc = "Clear RX_DONE Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_rx_done](clr_rx_done) module"] pub type CLR_RX_DONE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41950,7 +29118,7 @@ pub mod i2c0 { } } } - #[doc = "Clear ACTIVITY Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_activity](clr_activity) module"] + #[doc = "Clear ACTIVITY Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_activity](clr_activity) module"] pub type CLR_ACTIVITY = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41971,7 +29139,7 @@ pub mod i2c0 { } } } - #[doc = "Clear STOP_DET Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_stop_det](clr_stop_det) module"] + #[doc = "Clear STOP_DET Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_stop_det](clr_stop_det) module"] pub type CLR_STOP_DET = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -41992,7 +29160,7 @@ pub mod i2c0 { } } } - #[doc = "Clear START_DET Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_start_det](clr_start_det) module"] + #[doc = "Clear START_DET Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_start_det](clr_start_det) module"] pub type CLR_START_DET = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -42013,7 +29181,7 @@ pub mod i2c0 { } } } - #[doc = "I2C Clear GEN_CALL Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clr_gen_call](clr_gen_call) module"] + #[doc = "I2C Clear GEN_CALL Interrupt Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clr_gen_call](clr_gen_call) module"] pub type CLR_GEN_CALL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -42034,7 +29202,7 @@ pub mod i2c0 { } } } - #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [enable](enable) module"] + #[doc = "Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](enable) module"] pub type ENABLE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -42164,7 +29332,7 @@ pub mod i2c0 { } } } - #[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [status](status) module"] + #[doc = "Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](status) module"] pub type STATUS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -42227,7 +29395,7 @@ pub mod i2c0 { } } } - #[doc = "Transmit FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [txflr](txflr) module"] + #[doc = "Transmit FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [txflr](txflr) module"] pub type TXFLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -42279,7 +29447,7 @@ pub mod i2c0 { } } } - #[doc = "Receive FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rxflr](rxflr) module"] + #[doc = "Receive FIFO Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rxflr](rxflr) module"] pub type RXFLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -42331,7 +29499,7 @@ pub mod i2c0 { } } } - #[doc = "SDA Hold Time Length Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sda_hold](sda_hold) module"] + #[doc = "SDA Hold Time Length Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sda_hold](sda_hold) module"] pub type SDA_HOLD = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -42407,7 +29575,7 @@ pub mod i2c0 { } } } - #[doc = "Transmit Abort Source Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tx_abrt_source](tx_abrt_source) module"] + #[doc = "Transmit Abort Source Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_abrt_source](tx_abrt_source) module"] pub type TX_ABRT_SOURCE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43013,7 +30181,7 @@ pub mod i2c0 { } } } - #[doc = "I2C DMA Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dma_cr](dma_cr) module"] + #[doc = "I2C DMA Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_cr](dma_cr) module"] pub type DMA_CR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43109,7 +30277,7 @@ pub mod i2c0 { } } } - #[doc = "DMA Transmit Data Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dma_tdlr](dma_tdlr) module"] + #[doc = "DMA Transmit Data Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_tdlr](dma_tdlr) module"] pub type DMA_TDLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43161,7 +30329,7 @@ pub mod i2c0 { } } } - #[doc = "DMA Receive Data Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dma_rdlr](dma_rdlr) module"] + #[doc = "DMA Receive Data Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_rdlr](dma_rdlr) module"] pub type DMA_RDLR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43213,7 +30381,7 @@ pub mod i2c0 { } } } - #[doc = "SDA Setup Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sda_setup](sda_setup) module"] + #[doc = "SDA Setup Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sda_setup](sda_setup) module"] pub type SDA_SETUP = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43265,7 +30433,7 @@ pub mod i2c0 { } } } - #[doc = "ACK General Call Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [general_call](general_call) module"] + #[doc = "ACK General Call Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [general_call](general_call) module"] pub type GENERAL_CALL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43327,7 +30495,7 @@ pub mod i2c0 { } } } - #[doc = "Enable Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [enable_status](enable_status) module"] + #[doc = "Enable Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable_status](enable_status) module"] pub type ENABLE_STATUS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43362,7 +30530,7 @@ pub mod i2c0 { } } } - #[doc = "SS, FS or FM+ spike suppression limit\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [fs_spklen](fs_spklen) module"] + #[doc = "SS, FS or FM+ spike suppression limit\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [fs_spklen](fs_spklen) module"] pub type FS_SPKLEN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43414,7 +30582,7 @@ pub mod i2c0 { } } } - #[doc = "Component Parameter Register 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_param_1](comp_param_1) module"] + #[doc = "Component Parameter Register 1\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_param_1](comp_param_1) module"] pub type COMP_PARAM_1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43484,7 +30652,7 @@ pub mod i2c0 { } } } - #[doc = "Component Version Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_version](comp_version) module"] + #[doc = "Component Version Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_version](comp_version) module"] pub type COMP_VERSION = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43505,7 +30673,7 @@ pub mod i2c0 { } } } - #[doc = "Component Type Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_type](comp_type) module"] + #[doc = "Component Type Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_type](comp_type) module"] pub type COMP_TYPE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43541,6 +30709,7 @@ impl I2C1 { } impl Deref for I2C1 { type Target = i2c0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*I2C1::ptr() } } @@ -43559,6 +30728,7 @@ impl I2C2 { } impl Deref for I2C2 { type Target = i2c0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*I2C2::ptr() } } @@ -43577,6 +30747,7 @@ impl FPIOA { } impl Deref for FPIOA { type Target = fpioa::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*FPIOA::ptr() } } @@ -43593,7 +30764,7 @@ pub mod fpioa { #[doc = "0xe0 - FPIOA GPIO multiplexer tie value array"] pub tie_val: [TIE_VAL; 8], } - #[doc = "FPIOA GPIO multiplexer io array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [io](io) module"] + #[doc = "FPIOA GPIO multiplexer io array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [io](io) module"] pub type IO = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -43608,7 +30779,8 @@ pub mod fpioa { pub type R = crate::R; #[doc = "Writer for register io[%s]"] pub type W = crate::W; - #[doc = "Register io[%s] `reset()`'s with value 0"] + #[doc = "Register io[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::IO { type Type = u32; #[inline(always)] @@ -44077,7 +31249,7 @@ pub mod fpioa { } } } - #[doc = "FPIOA GPIO multiplexer tie enable array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tie_en](tie_en) module"] + #[doc = "FPIOA GPIO multiplexer tie enable array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tie_en](tie_en) module"] pub type TIE_EN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44092,7 +31264,8 @@ pub mod fpioa { pub type R = crate::R; #[doc = "Writer for register tie_en[%s]"] pub type W = crate::W; - #[doc = "Register tie_en[%s] `reset()`'s with value 0"] + #[doc = "Register tie_en[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::TIE_EN { type Type = u32; #[inline(always)] @@ -44103,7 +31276,7 @@ pub mod fpioa { impl R {} impl W {} } - #[doc = "FPIOA GPIO multiplexer tie value array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tie_val](tie_val) module"] + #[doc = "FPIOA GPIO multiplexer tie value array\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tie_val](tie_val) module"] pub type TIE_VAL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44118,7 +31291,8 @@ pub mod fpioa { pub type R = crate::R; #[doc = "Writer for register tie_val[%s]"] pub type W = crate::W; - #[doc = "Register tie_val[%s] `reset()`'s with value 0"] + #[doc = "Register tie_val[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::TIE_VAL { type Type = u32; #[inline(always)] @@ -44144,6 +31318,7 @@ impl SHA256 { } impl Deref for SHA256 { type Target = sha256::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*SHA256::ptr() } } @@ -44166,7 +31341,7 @@ pub mod sha256 { #[doc = "0x34 - Function configuration register 1"] pub function_reg_1: FUNCTION_REG_1, } - #[doc = "Calculated SHA256 return value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [result](result) module"] + #[doc = "Calculated SHA256 return value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [result](result) module"] pub type RESULT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44181,7 +31356,8 @@ pub mod sha256 { pub type R = crate::R; #[doc = "Writer for register result[%s]"] pub type W = crate::W; - #[doc = "Register result[%s] `reset()`'s with value 0"] + #[doc = "Register result[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::RESULT { type Type = u32; #[inline(always)] @@ -44192,7 +31368,7 @@ pub mod sha256 { impl R {} impl W {} } - #[doc = "SHA256 input data is written to this register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [data_in](data_in) module"] + #[doc = "SHA256 input data is written to this register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data_in](data_in) module"] pub type DATA_IN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44218,7 +31394,7 @@ pub mod sha256 { impl R {} impl W {} } - #[doc = "Counters register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [num_reg](num_reg) module"] + #[doc = "Counters register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [num_reg](num_reg) module"] pub type NUM_REG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44294,7 +31470,7 @@ pub mod sha256 { } } } - #[doc = "Function configuration register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [function_reg_0](function_reg_0) module"] + #[doc = "Function configuration register 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [function_reg_0](function_reg_0) module"] pub type FUNCTION_REG_0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44369,17 +31545,14 @@ pub mod sha256 { #[derive(Clone, Copy, Debug, PartialEq)] pub enum ENDIAN_A { #[doc = "0: Little endian"] - LE, + LE = 0, #[doc = "1: Big endian"] - BE, + BE = 1, } impl From for bool { #[inline(always)] fn from(variant: ENDIAN_A) -> Self { - match variant { - ENDIAN_A::LE => false, - ENDIAN_A::BE => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `endian`"] @@ -44478,7 +31651,7 @@ pub mod sha256 { } } } - #[doc = "Function configuration register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [function_reg_1](function_reg_1) module"] + #[doc = "Function configuration register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [function_reg_1](function_reg_1) module"] pub type FUNCTION_REG_1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44589,6 +31762,7 @@ impl TIMER0 { } impl Deref for TIMER0 { type Target = timer0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*TIMER0::ptr() } } @@ -44629,7 +31803,7 @@ pub mod timer0 { #[doc = r"Register block"] #[doc = "Channel cluster: load_count, current_value, control, eoi and intr_stat registers"] pub mod channel { - #[doc = "Load Count Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [load_count](load_count) module"] + #[doc = "Load Count Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [load_count](load_count) module"] pub type LOAD_COUNT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44655,7 +31829,7 @@ pub mod timer0 { impl R {} impl W {} } - #[doc = "Current Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [current_value](current_value) module"] + #[doc = "Current Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [current_value](current_value) module"] pub type CURRENT_VALUE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44681,7 +31855,7 @@ pub mod timer0 { impl R {} impl W {} } - #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [control](control) module"] + #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [control](control) module"] pub type CONTROL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44732,17 +31906,14 @@ pub mod timer0 { #[derive(Clone, Copy, Debug, PartialEq)] pub enum MODE_A { #[doc = "0: FREE_MODE"] - FREE, + FREE = 0, #[doc = "1: USER_MODE"] - USER, + USER = 1, } impl From for bool { #[inline(always)] fn from(variant: MODE_A) -> Self { - match variant { - MODE_A::FREE => false, - MODE_A::USER => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `mode`"] @@ -44899,7 +32070,7 @@ pub mod timer0 { } } } - #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [eoi](eoi) module"] + #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eoi](eoi) module"] pub type EOI = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44925,7 +32096,7 @@ pub mod timer0 { impl R {} impl W {} } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intr_stat](intr_stat) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intr_stat](intr_stat) module"] pub type INTR_STAT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44952,7 +32123,7 @@ pub mod timer0 { impl W {} } } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [intr_stat](intr_stat) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intr_stat](intr_stat) module"] pub type INTR_STAT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -44978,7 +32149,7 @@ pub mod timer0 { impl R {} impl W {} } - #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [eoi](eoi) module"] + #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eoi](eoi) module"] pub type EOI = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45004,7 +32175,7 @@ pub mod timer0 { impl R {} impl W {} } - #[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [raw_intr_stat](raw_intr_stat) module"] + #[doc = "Raw Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [raw_intr_stat](raw_intr_stat) module"] pub type RAW_INTR_STAT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45030,7 +32201,7 @@ pub mod timer0 { impl R {} impl W {} } - #[doc = "Component Version Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_version](comp_version) module"] + #[doc = "Component Version Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_version](comp_version) module"] pub type COMP_VERSION = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45056,7 +32227,7 @@ pub mod timer0 { impl R {} impl W {} } - #[doc = "Load Count2 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [load_count2](load_count2) module"] + #[doc = "Load Count2 Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [load_count2](load_count2) module"] pub type LOAD_COUNT2 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45097,6 +32268,7 @@ impl TIMER1 { } impl Deref for TIMER1 { type Target = timer0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*TIMER1::ptr() } } @@ -45115,6 +32287,7 @@ impl TIMER2 { } impl Deref for TIMER2 { type Target = timer0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*TIMER2::ptr() } } @@ -45133,6 +32306,7 @@ impl WDT0 { } impl Deref for WDT0 { type Target = wdt0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*WDT0::ptr() } } @@ -45173,7 +32347,7 @@ pub mod wdt0 { #[doc = "0xfc - Component Type Register"] pub comp_type: COMP_TYPE, } - #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [cr](cr) module"] + #[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cr](cr) module"] pub type CR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45224,17 +32398,14 @@ pub mod wdt0 { #[derive(Clone, Copy, Debug, PartialEq)] pub enum RMOD_A { #[doc = "0: RESET"] - RESET, + RESET = 0, #[doc = "1: INTERRUPT"] - INTERRUPT, + INTERRUPT = 1, } impl From for bool { #[inline(always)] fn from(variant: RMOD_A) -> Self { - match variant { - RMOD_A::RESET => false, - RMOD_A::INTERRUPT => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `rmod`"] @@ -45347,7 +32518,7 @@ pub mod wdt0 { } } } - #[doc = "Timeout Range Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [torr](torr) module"] + #[doc = "Timeout Range Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [torr](torr) module"] pub type TORR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45423,7 +32594,7 @@ pub mod wdt0 { } } } - #[doc = "Current Counter Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [ccvr](ccvr) module"] + #[doc = "Current Counter Value Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ccvr](ccvr) module"] pub type CCVR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45449,7 +32620,7 @@ pub mod wdt0 { impl R {} impl W {} } - #[doc = "Counter Restart Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [crr](crr) module"] + #[doc = "Counter Restart Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [crr](crr) module"] pub type CRR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45475,7 +32646,7 @@ pub mod wdt0 { impl R {} impl W {} } - #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [stat](stat) module"] + #[doc = "Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [stat](stat) module"] pub type STAT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45537,7 +32708,7 @@ pub mod wdt0 { } } } - #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [eoi](eoi) module"] + #[doc = "Interrupt Clear Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [eoi](eoi) module"] pub type EOI = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45599,7 +32770,7 @@ pub mod wdt0 { } } } - #[doc = "Protection level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [prot_level](prot_level) module"] + #[doc = "Protection level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [prot_level](prot_level) module"] pub type PROT_LEVEL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45651,7 +32822,7 @@ pub mod wdt0 { } } } - #[doc = "Component Parameters Register 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_param_5](comp_param_5) module"] + #[doc = "Component Parameters Register 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_param_5](comp_param_5) module"] pub type COMP_PARAM_5 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45703,7 +32874,7 @@ pub mod wdt0 { } } } - #[doc = "Component Parameters Register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_param_4](comp_param_4) module"] + #[doc = "Component Parameters Register 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_param_4](comp_param_4) module"] pub type COMP_PARAM_4 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45755,7 +32926,7 @@ pub mod wdt0 { } } } - #[doc = "Component Parameters Register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_param_3](comp_param_3) module"] + #[doc = "Component Parameters Register 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_param_3](comp_param_3) module"] pub type COMP_PARAM_3 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45807,7 +32978,7 @@ pub mod wdt0 { } } } - #[doc = "Component Parameters Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_param_2](comp_param_2) module"] + #[doc = "Component Parameters Register 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_param_2](comp_param_2) module"] pub type COMP_PARAM_2 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -45859,7 +33030,7 @@ pub mod wdt0 { } } } - #[doc = "Component Parameters Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_param_1](comp_param_1) module"] + #[doc = "Component Parameters Register 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_param_1](comp_param_1) module"] pub type COMP_PARAM_1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -46279,7 +33450,7 @@ pub mod wdt0 { } } } - #[doc = "Component Version Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_version](comp_version) module"] + #[doc = "Component Version Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_version](comp_version) module"] pub type COMP_VERSION = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -46305,7 +33476,7 @@ pub mod wdt0 { impl R {} impl W {} } - #[doc = "Component Type Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [comp_type](comp_type) module"] + #[doc = "Component Type Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [comp_type](comp_type) module"] pub type COMP_TYPE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -46346,6 +33517,7 @@ impl WDT1 { } impl Deref for WDT1 { type Target = wdt0::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*WDT1::ptr() } } @@ -46364,6 +33536,7 @@ impl OTP { } impl Deref for OTP { type Target = otp::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*OTP::ptr() } } @@ -46376,7 +33549,7 @@ pub mod otp { #[doc = "0x00 - Dummy register: this peripheral is not implemented yet"] pub dummy: DUMMY, } - #[doc = "Dummy register: this peripheral is not implemented yet\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dummy](dummy) module"] + #[doc = "Dummy register: this peripheral is not implemented yet\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dummy](dummy) module"] pub type DUMMY = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -46417,6 +33590,7 @@ impl DVP { } impl Deref for DVP { type Target = dvp::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*DVP::ptr() } } @@ -46449,7 +33623,7 @@ pub mod dvp { #[doc = "0x28 - RGB_ADDR"] pub rgb_addr: RGB_ADDR, } - #[doc = "Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dvp_cfg](dvp_cfg) module"] + #[doc = "Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dvp_cfg](dvp_cfg) module"] pub type DVP_CFG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -46618,22 +33792,19 @@ pub mod dvp { } #[doc = "FORMAT\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum FORMAT_A { #[doc = "0: RGB_FORMAT"] - RGB, + RGB = 0, #[doc = "1: YUV_FORMAT"] - YUV, + YUV = 1, #[doc = "3: Y_FORMAT"] - Y, + Y = 3, } impl From for u8 { #[inline(always)] fn from(variant: FORMAT_A) -> Self { - match variant { - FORMAT_A::RGB => 0, - FORMAT_A::YUV => 1, - FORMAT_A::Y => 3, - } + variant as _ } } #[doc = "Reader of field `format`"] @@ -46821,7 +33992,7 @@ pub mod dvp { } } } - #[doc = "R_ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [r_addr](r_addr) module"] + #[doc = "R_ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r_addr](r_addr) module"] pub type R_ADDR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -46847,7 +34018,7 @@ pub mod dvp { impl R {} impl W {} } - #[doc = "G_ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [g_addr](g_addr) module"] + #[doc = "G_ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [g_addr](g_addr) module"] pub type G_ADDR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -46873,7 +34044,7 @@ pub mod dvp { impl R {} impl W {} } - #[doc = "B_ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [b_addr](b_addr) module"] + #[doc = "B_ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [b_addr](b_addr) module"] pub type B_ADDR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -46899,7 +34070,7 @@ pub mod dvp { impl R {} impl W {} } - #[doc = "CMOS Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [cmos_cfg](cmos_cfg) module"] + #[doc = "CMOS Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmos_cfg](cmos_cfg) module"] pub type CMOS_CFG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47053,7 +34224,7 @@ pub mod dvp { } } } - #[doc = "SCCB Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sccb_cfg](sccb_cfg) module"] + #[doc = "SCCB Config Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sccb_cfg](sccb_cfg) module"] pub type SCCB_CFG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47078,22 +34249,19 @@ pub mod dvp { } #[doc = "BYTE_NUM\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum BYTE_NUM_A { #[doc = "1: BYTE_NUM_2"] - NUM2, + NUM2 = 1, #[doc = "2: BYTE_NUM_3"] - NUM3, + NUM3 = 2, #[doc = "3: BYTE_NUM_4"] - NUM4, + NUM4 = 3, } impl From for u8 { #[inline(always)] fn from(variant: BYTE_NUM_A) -> Self { - match variant { - BYTE_NUM_A::NUM2 => 1, - BYTE_NUM_A::NUM3 => 2, - BYTE_NUM_A::NUM4 => 3, - } + variant as _ } } #[doc = "Reader of field `byte_num`"] @@ -47228,7 +34396,7 @@ pub mod dvp { } } } - #[doc = "SCCB Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sccb_ctl](sccb_ctl) module"] + #[doc = "SCCB Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sccb_ctl](sccb_ctl) module"] pub type SCCB_CTL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47352,7 +34520,7 @@ pub mod dvp { } } } - #[doc = "AXI Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [axi](axi) module"] + #[doc = "AXI Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [axi](axi) module"] pub type AXI = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47377,19 +34545,17 @@ pub mod dvp { } #[doc = "GM_MLEN\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum GM_MLEN_A { #[doc = "0: GM_MLEN_1BYTE"] - BYTE1, + BYTE1 = 0, #[doc = "3: GM_MLEN_4BYTE"] - BYTE4, + BYTE4 = 3, } impl From for u8 { #[inline(always)] fn from(variant: GM_MLEN_A) -> Self { - match variant { - GM_MLEN_A::BYTE1 => 0, - GM_MLEN_A::BYTE4 => 3, - } + variant as _ } } #[doc = "Reader of field `gm_mlen`"] @@ -47458,7 +34624,7 @@ pub mod dvp { } } } - #[doc = "STS Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [sts](sts) module"] + #[doc = "STS Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sts](sts) module"] pub type STS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47758,7 +34924,7 @@ pub mod dvp { } } } - #[doc = "REVERSE\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [reverse](reverse) module"] + #[doc = "REVERSE\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reverse](reverse) module"] pub type REVERSE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47784,7 +34950,7 @@ pub mod dvp { impl R {} impl W {} } - #[doc = "RGB_ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rgb_addr](rgb_addr) module"] + #[doc = "RGB_ADDR\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rgb_addr](rgb_addr) module"] pub type RGB_ADDR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47825,6 +34991,7 @@ impl SYSCTL { } impl Deref for SYSCTL { type Target = sysctl::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*SYSCTL::ptr() } } @@ -47890,7 +35057,7 @@ pub mod sysctl { #[doc = "0x6c - IO Power Mode Select controller"] pub power_sel: POWER_SEL, } - #[doc = "Git short commit id\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [git_id](git_id) module"] + #[doc = "Git short commit id\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [git_id](git_id) module"] pub type GIT_ID = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47916,7 +35083,7 @@ pub mod sysctl { impl R {} impl W {} } - #[doc = "System clock base frequency\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_freq](clk_freq) module"] + #[doc = "System clock base frequency\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_freq](clk_freq) module"] pub type CLK_FREQ = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -47942,7 +35109,7 @@ pub mod sysctl { impl R {} impl W {} } - #[doc = "PLL0 controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pll0](pll0) module"] + #[doc = "PLL0 controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pll0](pll0) module"] pub type PLL0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -48304,7 +35471,7 @@ pub mod sysctl { } } } - #[doc = "PLL1 controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pll1](pll1) module"] + #[doc = "PLL1 controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pll1](pll1) module"] pub type PLL1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -48632,7 +35799,7 @@ pub mod sysctl { } } } - #[doc = "PLL2 controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pll2](pll2) module"] + #[doc = "PLL2 controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pll2](pll2) module"] pub type PLL2 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -48984,7 +36151,7 @@ pub mod sysctl { } } } - #[doc = "PLL lock tester\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pll_lock](pll_lock) module"] + #[doc = "PLL lock tester\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pll_lock](pll_lock) module"] pub type PLL_LOCK = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -49288,7 +36455,7 @@ pub mod sysctl { } } } - #[doc = "AXI ROM detector\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [rom_error](rom_error) module"] + #[doc = "AXI ROM detector\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [rom_error](rom_error) module"] pub type ROM_ERROR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -49384,7 +36551,7 @@ pub mod sysctl { } } } - #[doc = "Clock select controller 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_sel0](clk_sel0) module"] + #[doc = "Clock select controller 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_sel0](clk_sel0) module"] pub type CLK_SEL0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -49678,7 +36845,7 @@ pub mod sysctl { } } } - #[doc = "Clock select controller 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_sel1](clk_sel1) module"] + #[doc = "Clock select controller 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_sel1](clk_sel1) module"] pub type CLK_SEL1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -49740,7 +36907,7 @@ pub mod sysctl { } } } - #[doc = "Central clock enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_en_cent](clk_en_cent) module"] + #[doc = "Central clock enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_en_cent](clk_en_cent) module"] pub type CLK_EN_CENT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -49972,7 +37139,7 @@ pub mod sysctl { } } } - #[doc = "Peripheral clock enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_en_peri](clk_en_peri) module"] + #[doc = "Peripheral clock enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_en_peri](clk_en_peri) module"] pub type CLK_EN_PERI = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -50986,7 +38153,7 @@ pub mod sysctl { } } } - #[doc = "Soft reset ctrl\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [soft_reset](soft_reset) module"] + #[doc = "Soft reset ctrl\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [soft_reset](soft_reset) module"] pub type SOFT_RESET = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -51048,7 +38215,7 @@ pub mod sysctl { } } } - #[doc = "Peripheral reset controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [peri_reset](peri_reset) module"] + #[doc = "Peripheral reset controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [peri_reset](peri_reset) module"] pub type PERI_RESET = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52028,7 +39195,7 @@ pub mod sysctl { } } } - #[doc = "Clock threshold controller 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_th0](clk_th0) module"] + #[doc = "Clock threshold controller 0\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_th0](clk_th0) module"] pub type CLK_TH0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52176,7 +39343,7 @@ pub mod sysctl { } } } - #[doc = "Clock threshold controller 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_th1](clk_th1) module"] + #[doc = "Clock threshold controller 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_th1](clk_th1) module"] pub type CLK_TH1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52300,7 +39467,7 @@ pub mod sysctl { } } } - #[doc = "Clock threshold controller 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_th2](clk_th2) module"] + #[doc = "Clock threshold controller 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_th2](clk_th2) module"] pub type CLK_TH2 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52400,7 +39567,7 @@ pub mod sysctl { } } } - #[doc = "Clock threshold controller 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_th3](clk_th3) module"] + #[doc = "Clock threshold controller 3\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_th3](clk_th3) module"] pub type CLK_TH3 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52476,7 +39643,7 @@ pub mod sysctl { } } } - #[doc = "Clock threshold controller 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_th4](clk_th4) module"] + #[doc = "Clock threshold controller 4\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_th4](clk_th4) module"] pub type CLK_TH4 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52576,7 +39743,7 @@ pub mod sysctl { } } } - #[doc = "Clock threshold controller 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_th5](clk_th5) module"] + #[doc = "Clock threshold controller 5\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_th5](clk_th5) module"] pub type CLK_TH5 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52700,7 +39867,7 @@ pub mod sysctl { } } } - #[doc = "Clock threshold controller 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [clk_th6](clk_th6) module"] + #[doc = "Clock threshold controller 6\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [clk_th6](clk_th6) module"] pub type CLK_TH6 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52776,7 +39943,7 @@ pub mod sysctl { } } } - #[doc = "Miscellaneous controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [misc](misc) module"] + #[doc = "Miscellaneous controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [misc](misc) module"] pub type MISC = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -52862,7 +40029,7 @@ pub mod sysctl { } } } - #[doc = "Peripheral controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [peri](peri) module"] + #[doc = "Peripheral controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [peri](peri) module"] pub type PERI = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -53740,7 +40907,7 @@ pub mod sysctl { } } } - #[doc = "SPI sleep controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [spi_sleep](spi_sleep) module"] + #[doc = "SPI sleep controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [spi_sleep](spi_sleep) module"] pub type SPI_SLEEP = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -53904,7 +41071,7 @@ pub mod sysctl { } } } - #[doc = "Reset source status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [reset_status](reset_status) module"] + #[doc = "Reset source status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [reset_status](reset_status) module"] pub type RESET_STATUS = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -54102,7 +41269,7 @@ pub mod sysctl { } } } - #[doc = "DMA handshake selector\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dma_sel0](dma_sel0) module"] + #[doc = "DMA handshake selector\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_sel0](dma_sel0) module"] pub type DMA_SEL0 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -54127,112 +41294,79 @@ pub mod sysctl { } #[doc = "\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum DMA_SEL0_A { #[doc = "0: `0`"] - SSI0_RX_REQ, + SSI0_RX_REQ = 0, #[doc = "1: `1`"] - SSI0_TX_REQ, + SSI0_TX_REQ = 1, #[doc = "2: `10`"] - SSI1_RX_REQ, + SSI1_RX_REQ = 2, #[doc = "3: `11`"] - SSI1_TX_REQ, + SSI1_TX_REQ = 3, #[doc = "4: `100`"] - SSI2_RX_REQ, + SSI2_RX_REQ = 4, #[doc = "5: `101`"] - SSI2_TX_REQ, + SSI2_TX_REQ = 5, #[doc = "6: `110`"] - SSI3_RX_REQ, + SSI3_RX_REQ = 6, #[doc = "7: `111`"] - SSI3_TX_REQ, + SSI3_TX_REQ = 7, #[doc = "8: `1000`"] - I2C0_RX_REQ, + I2C0_RX_REQ = 8, #[doc = "9: `1001`"] - I2C0_TX_REQ, + I2C0_TX_REQ = 9, #[doc = "10: `1010`"] - I2C1_RX_REQ, + I2C1_RX_REQ = 10, #[doc = "11: `1011`"] - I2C1_TX_REQ, + I2C1_TX_REQ = 11, #[doc = "12: `1100`"] - I2C2_RX_REQ, + I2C2_RX_REQ = 12, #[doc = "13: `1101`"] - I2C2_TX_REQ, + I2C2_TX_REQ = 13, #[doc = "14: `1110`"] - UART1_RX_REQ, + UART1_RX_REQ = 14, #[doc = "15: `1111`"] - UART1_TX_REQ, + UART1_TX_REQ = 15, #[doc = "16: `10000`"] - UART2_RX_REQ, + UART2_RX_REQ = 16, #[doc = "17: `10001`"] - UART2_TX_REQ, + UART2_TX_REQ = 17, #[doc = "18: `10010`"] - UART3_RX_REQ, + UART3_RX_REQ = 18, #[doc = "19: `10011`"] - UART3_TX_REQ, + UART3_TX_REQ = 19, #[doc = "20: `10100`"] - AES_REQ, + AES_REQ = 20, #[doc = "21: `10101`"] - SHA_RX_REQ, + SHA_RX_REQ = 21, #[doc = "22: `10110`"] - AI_RX_REQ, + AI_RX_REQ = 22, #[doc = "23: `10111`"] - FFT_RX_REQ, + FFT_RX_REQ = 23, #[doc = "24: `11000`"] - FFT_TX_REQ, + FFT_TX_REQ = 24, #[doc = "25: `11001`"] - I2S0_TX_REQ, + I2S0_TX_REQ = 25, #[doc = "26: `11010`"] - I2S0_RX_REQ, + I2S0_RX_REQ = 26, #[doc = "27: `11011`"] - I2S1_TX_REQ, + I2S1_TX_REQ = 27, #[doc = "28: `11100`"] - I2S1_RX_REQ, + I2S1_RX_REQ = 28, #[doc = "29: `11101`"] - I2S2_TX_REQ, + I2S2_TX_REQ = 29, #[doc = "30: `11110`"] - I2S2_RX_REQ, + I2S2_RX_REQ = 30, #[doc = "31: `11111`"] - I2S0_BF_DIR_REQ, + I2S0_BF_DIR_REQ = 31, #[doc = "32: `100000`"] - I2S0_BF_VOICE_REQ, + I2S0_BF_VOICE_REQ = 32, } impl From for u8 { #[inline(always)] fn from(variant: DMA_SEL0_A) -> Self { - match variant { - DMA_SEL0_A::SSI0_RX_REQ => 0, - DMA_SEL0_A::SSI0_TX_REQ => 1, - DMA_SEL0_A::SSI1_RX_REQ => 2, - DMA_SEL0_A::SSI1_TX_REQ => 3, - DMA_SEL0_A::SSI2_RX_REQ => 4, - DMA_SEL0_A::SSI2_TX_REQ => 5, - DMA_SEL0_A::SSI3_RX_REQ => 6, - DMA_SEL0_A::SSI3_TX_REQ => 7, - DMA_SEL0_A::I2C0_RX_REQ => 8, - DMA_SEL0_A::I2C0_TX_REQ => 9, - DMA_SEL0_A::I2C1_RX_REQ => 10, - DMA_SEL0_A::I2C1_TX_REQ => 11, - DMA_SEL0_A::I2C2_RX_REQ => 12, - DMA_SEL0_A::I2C2_TX_REQ => 13, - DMA_SEL0_A::UART1_RX_REQ => 14, - DMA_SEL0_A::UART1_TX_REQ => 15, - DMA_SEL0_A::UART2_RX_REQ => 16, - DMA_SEL0_A::UART2_TX_REQ => 17, - DMA_SEL0_A::UART3_RX_REQ => 18, - DMA_SEL0_A::UART3_TX_REQ => 19, - DMA_SEL0_A::AES_REQ => 20, - DMA_SEL0_A::SHA_RX_REQ => 21, - DMA_SEL0_A::AI_RX_REQ => 22, - DMA_SEL0_A::FFT_RX_REQ => 23, - DMA_SEL0_A::FFT_TX_REQ => 24, - DMA_SEL0_A::I2S0_TX_REQ => 25, - DMA_SEL0_A::I2S0_RX_REQ => 26, - DMA_SEL0_A::I2S1_TX_REQ => 27, - DMA_SEL0_A::I2S1_RX_REQ => 28, - DMA_SEL0_A::I2S2_TX_REQ => 29, - DMA_SEL0_A::I2S2_RX_REQ => 30, - DMA_SEL0_A::I2S0_BF_DIR_REQ => 31, - DMA_SEL0_A::I2S0_BF_VOICE_REQ => 32, - } + variant as _ } } #[doc = "Reader of field `dma_sel0`"] @@ -54623,192 +41757,192 @@ pub mod sysctl { #[doc = r"Writes raw bits to the field"] #[inline(always)] pub unsafe fn bits(self, value: u8) -> &'a mut W { - self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f); - self.w - } - } - #[doc = ""] - pub type DMA_SEL1_A = DMA_SEL0_A; - #[doc = "Reader of field `dma_sel1`"] - pub type DMA_SEL1_R = crate::R; - #[doc = "Write proxy for field `dma_sel1`"] - pub struct DMA_SEL1_W<'a> { - w: &'a mut W, - } - impl<'a> DMA_SEL1_W<'a> { - #[doc = r"Writes `variant` to the field"] - #[inline(always)] - pub fn variant(self, variant: DMA_SEL1_A) -> &'a mut W { - unsafe { self.bits(variant.into()) } - } - #[doc = "`0`"] - #[inline(always)] - pub fn ssi0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI0_RX_REQ) - } - #[doc = "`1`"] - #[inline(always)] - pub fn ssi0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI0_TX_REQ) - } - #[doc = "`10`"] - #[inline(always)] - pub fn ssi1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI1_RX_REQ) - } - #[doc = "`11`"] - #[inline(always)] - pub fn ssi1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI1_TX_REQ) - } - #[doc = "`100`"] - #[inline(always)] - pub fn ssi2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI2_RX_REQ) - } - #[doc = "`101`"] - #[inline(always)] - pub fn ssi2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI2_TX_REQ) - } - #[doc = "`110`"] - #[inline(always)] - pub fn ssi3_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI3_RX_REQ) - } - #[doc = "`111`"] - #[inline(always)] - pub fn ssi3_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI3_TX_REQ) - } - #[doc = "`1000`"] - #[inline(always)] - pub fn i2c0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C0_RX_REQ) - } - #[doc = "`1001`"] - #[inline(always)] - pub fn i2c0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C0_TX_REQ) - } - #[doc = "`1010`"] - #[inline(always)] - pub fn i2c1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C1_RX_REQ) - } - #[doc = "`1011`"] - #[inline(always)] - pub fn i2c1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C1_TX_REQ) - } - #[doc = "`1100`"] - #[inline(always)] - pub fn i2c2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C2_RX_REQ) - } - #[doc = "`1101`"] - #[inline(always)] - pub fn i2c2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C2_TX_REQ) - } - #[doc = "`1110`"] - #[inline(always)] - pub fn uart1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART1_RX_REQ) - } - #[doc = "`1111`"] - #[inline(always)] - pub fn uart1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART1_TX_REQ) - } - #[doc = "`10000`"] - #[inline(always)] - pub fn uart2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART2_RX_REQ) - } - #[doc = "`10001`"] - #[inline(always)] - pub fn uart2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART2_TX_REQ) - } - #[doc = "`10010`"] - #[inline(always)] - pub fn uart3_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART3_RX_REQ) - } - #[doc = "`10011`"] - #[inline(always)] - pub fn uart3_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART3_TX_REQ) - } - #[doc = "`10100`"] - #[inline(always)] - pub fn aes_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::AES_REQ) - } - #[doc = "`10101`"] - #[inline(always)] - pub fn sha_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SHA_RX_REQ) - } - #[doc = "`10110`"] - #[inline(always)] - pub fn ai_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::AI_RX_REQ) - } - #[doc = "`10111`"] - #[inline(always)] - pub fn fft_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::FFT_RX_REQ) - } - #[doc = "`11000`"] - #[inline(always)] - pub fn fft_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::FFT_TX_REQ) - } - #[doc = "`11001`"] - #[inline(always)] - pub fn i2s0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_TX_REQ) - } - #[doc = "`11010`"] - #[inline(always)] - pub fn i2s0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_RX_REQ) - } - #[doc = "`11011`"] - #[inline(always)] - pub fn i2s1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S1_TX_REQ) - } - #[doc = "`11100`"] - #[inline(always)] - pub fn i2s1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S1_RX_REQ) - } - #[doc = "`11101`"] - #[inline(always)] - pub fn i2s2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S2_TX_REQ) - } - #[doc = "`11110`"] - #[inline(always)] - pub fn i2s2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S2_RX_REQ) - } - #[doc = "`11111`"] - #[inline(always)] - pub fn i2s0_bf_dir_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_BF_DIR_REQ) - } - #[doc = "`100000`"] - #[inline(always)] - pub fn i2s0_bf_voice_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_BF_VOICE_REQ) - } - #[doc = r"Writes raw bits to the field"] - #[inline(always)] - pub unsafe fn bits(self, value: u8) -> &'a mut W { + self.w.bits = (self.w.bits & !0x3f) | ((value as u32) & 0x3f); + self.w + } + } + #[doc = ""] + pub type DMA_SEL1_A = DMA_SEL0_A; + #[doc = "Reader of field `dma_sel1`"] + pub type DMA_SEL1_R = crate::R; + #[doc = "Write proxy for field `dma_sel1`"] + pub struct DMA_SEL1_W<'a> { + w: &'a mut W, + } + impl<'a> DMA_SEL1_W<'a> { + #[doc = r"Writes `variant` to the field"] + #[inline(always)] + pub fn variant(self, variant: DMA_SEL1_A) -> &'a mut W { + unsafe { self.bits(variant.into()) } + } + #[doc = "`0`"] + #[inline(always)] + pub fn ssi0_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SSI0_RX_REQ) + } + #[doc = "`1`"] + #[inline(always)] + pub fn ssi0_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SSI0_TX_REQ) + } + #[doc = "`10`"] + #[inline(always)] + pub fn ssi1_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SSI1_RX_REQ) + } + #[doc = "`11`"] + #[inline(always)] + pub fn ssi1_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SSI1_TX_REQ) + } + #[doc = "`100`"] + #[inline(always)] + pub fn ssi2_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SSI2_RX_REQ) + } + #[doc = "`101`"] + #[inline(always)] + pub fn ssi2_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SSI2_TX_REQ) + } + #[doc = "`110`"] + #[inline(always)] + pub fn ssi3_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SSI3_RX_REQ) + } + #[doc = "`111`"] + #[inline(always)] + pub fn ssi3_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SSI3_TX_REQ) + } + #[doc = "`1000`"] + #[inline(always)] + pub fn i2c0_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2C0_RX_REQ) + } + #[doc = "`1001`"] + #[inline(always)] + pub fn i2c0_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2C0_TX_REQ) + } + #[doc = "`1010`"] + #[inline(always)] + pub fn i2c1_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2C1_RX_REQ) + } + #[doc = "`1011`"] + #[inline(always)] + pub fn i2c1_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2C1_TX_REQ) + } + #[doc = "`1100`"] + #[inline(always)] + pub fn i2c2_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2C2_RX_REQ) + } + #[doc = "`1101`"] + #[inline(always)] + pub fn i2c2_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2C2_TX_REQ) + } + #[doc = "`1110`"] + #[inline(always)] + pub fn uart1_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::UART1_RX_REQ) + } + #[doc = "`1111`"] + #[inline(always)] + pub fn uart1_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::UART1_TX_REQ) + } + #[doc = "`10000`"] + #[inline(always)] + pub fn uart2_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::UART2_RX_REQ) + } + #[doc = "`10001`"] + #[inline(always)] + pub fn uart2_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::UART2_TX_REQ) + } + #[doc = "`10010`"] + #[inline(always)] + pub fn uart3_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::UART3_RX_REQ) + } + #[doc = "`10011`"] + #[inline(always)] + pub fn uart3_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::UART3_TX_REQ) + } + #[doc = "`10100`"] + #[inline(always)] + pub fn aes_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::AES_REQ) + } + #[doc = "`10101`"] + #[inline(always)] + pub fn sha_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::SHA_RX_REQ) + } + #[doc = "`10110`"] + #[inline(always)] + pub fn ai_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::AI_RX_REQ) + } + #[doc = "`10111`"] + #[inline(always)] + pub fn fft_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::FFT_RX_REQ) + } + #[doc = "`11000`"] + #[inline(always)] + pub fn fft_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::FFT_TX_REQ) + } + #[doc = "`11001`"] + #[inline(always)] + pub fn i2s0_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2S0_TX_REQ) + } + #[doc = "`11010`"] + #[inline(always)] + pub fn i2s0_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2S0_RX_REQ) + } + #[doc = "`11011`"] + #[inline(always)] + pub fn i2s1_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2S1_TX_REQ) + } + #[doc = "`11100`"] + #[inline(always)] + pub fn i2s1_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2S1_RX_REQ) + } + #[doc = "`11101`"] + #[inline(always)] + pub fn i2s2_tx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2S2_TX_REQ) + } + #[doc = "`11110`"] + #[inline(always)] + pub fn i2s2_rx_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2S2_RX_REQ) + } + #[doc = "`11111`"] + #[inline(always)] + pub fn i2s0_bf_dir_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2S0_BF_DIR_REQ) + } + #[doc = "`100000`"] + #[inline(always)] + pub fn i2s0_bf_voice_req(self) -> &'a mut W { + self.variant(DMA_SEL1_A::I2S0_BF_VOICE_REQ) + } + #[doc = r"Writes raw bits to the field"] + #[inline(always)] + pub unsafe fn bits(self, value: u8) -> &'a mut W { self.w.bits = (self.w.bits & !(0x3f << 6)) | (((value as u32) & 0x3f) << 6); self.w } @@ -54816,7 +41950,7 @@ pub mod sysctl { #[doc = ""] pub type DMA_SEL2_A = DMA_SEL0_A; #[doc = "Reader of field `dma_sel2`"] - pub type DMA_SEL2_R = crate::R; + pub type DMA_SEL2_R = crate::R; #[doc = "Write proxy for field `dma_sel2`"] pub struct DMA_SEL2_W<'a> { w: &'a mut W, @@ -54830,167 +41964,167 @@ pub mod sysctl { #[doc = "`0`"] #[inline(always)] pub fn ssi0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI0_RX_REQ) + self.variant(DMA_SEL2_A::SSI0_RX_REQ) } #[doc = "`1`"] #[inline(always)] pub fn ssi0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI0_TX_REQ) + self.variant(DMA_SEL2_A::SSI0_TX_REQ) } #[doc = "`10`"] #[inline(always)] pub fn ssi1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI1_RX_REQ) + self.variant(DMA_SEL2_A::SSI1_RX_REQ) } #[doc = "`11`"] #[inline(always)] pub fn ssi1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI1_TX_REQ) + self.variant(DMA_SEL2_A::SSI1_TX_REQ) } #[doc = "`100`"] #[inline(always)] pub fn ssi2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI2_RX_REQ) + self.variant(DMA_SEL2_A::SSI2_RX_REQ) } #[doc = "`101`"] #[inline(always)] pub fn ssi2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI2_TX_REQ) + self.variant(DMA_SEL2_A::SSI2_TX_REQ) } #[doc = "`110`"] #[inline(always)] pub fn ssi3_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI3_RX_REQ) + self.variant(DMA_SEL2_A::SSI3_RX_REQ) } #[doc = "`111`"] #[inline(always)] pub fn ssi3_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI3_TX_REQ) + self.variant(DMA_SEL2_A::SSI3_TX_REQ) } #[doc = "`1000`"] #[inline(always)] pub fn i2c0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C0_RX_REQ) + self.variant(DMA_SEL2_A::I2C0_RX_REQ) } #[doc = "`1001`"] #[inline(always)] pub fn i2c0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C0_TX_REQ) + self.variant(DMA_SEL2_A::I2C0_TX_REQ) } #[doc = "`1010`"] #[inline(always)] pub fn i2c1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C1_RX_REQ) + self.variant(DMA_SEL2_A::I2C1_RX_REQ) } #[doc = "`1011`"] #[inline(always)] pub fn i2c1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C1_TX_REQ) + self.variant(DMA_SEL2_A::I2C1_TX_REQ) } #[doc = "`1100`"] #[inline(always)] pub fn i2c2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C2_RX_REQ) + self.variant(DMA_SEL2_A::I2C2_RX_REQ) } #[doc = "`1101`"] #[inline(always)] pub fn i2c2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C2_TX_REQ) + self.variant(DMA_SEL2_A::I2C2_TX_REQ) } #[doc = "`1110`"] #[inline(always)] pub fn uart1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART1_RX_REQ) + self.variant(DMA_SEL2_A::UART1_RX_REQ) } #[doc = "`1111`"] #[inline(always)] pub fn uart1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART1_TX_REQ) + self.variant(DMA_SEL2_A::UART1_TX_REQ) } #[doc = "`10000`"] #[inline(always)] pub fn uart2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART2_RX_REQ) + self.variant(DMA_SEL2_A::UART2_RX_REQ) } #[doc = "`10001`"] #[inline(always)] pub fn uart2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART2_TX_REQ) + self.variant(DMA_SEL2_A::UART2_TX_REQ) } #[doc = "`10010`"] #[inline(always)] pub fn uart3_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART3_RX_REQ) + self.variant(DMA_SEL2_A::UART3_RX_REQ) } #[doc = "`10011`"] #[inline(always)] pub fn uart3_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART3_TX_REQ) + self.variant(DMA_SEL2_A::UART3_TX_REQ) } #[doc = "`10100`"] #[inline(always)] pub fn aes_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::AES_REQ) + self.variant(DMA_SEL2_A::AES_REQ) } #[doc = "`10101`"] #[inline(always)] pub fn sha_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SHA_RX_REQ) + self.variant(DMA_SEL2_A::SHA_RX_REQ) } #[doc = "`10110`"] #[inline(always)] pub fn ai_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::AI_RX_REQ) + self.variant(DMA_SEL2_A::AI_RX_REQ) } #[doc = "`10111`"] #[inline(always)] pub fn fft_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::FFT_RX_REQ) + self.variant(DMA_SEL2_A::FFT_RX_REQ) } #[doc = "`11000`"] #[inline(always)] pub fn fft_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::FFT_TX_REQ) + self.variant(DMA_SEL2_A::FFT_TX_REQ) } #[doc = "`11001`"] #[inline(always)] pub fn i2s0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_TX_REQ) + self.variant(DMA_SEL2_A::I2S0_TX_REQ) } #[doc = "`11010`"] #[inline(always)] pub fn i2s0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_RX_REQ) + self.variant(DMA_SEL2_A::I2S0_RX_REQ) } #[doc = "`11011`"] #[inline(always)] pub fn i2s1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S1_TX_REQ) + self.variant(DMA_SEL2_A::I2S1_TX_REQ) } #[doc = "`11100`"] #[inline(always)] pub fn i2s1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S1_RX_REQ) + self.variant(DMA_SEL2_A::I2S1_RX_REQ) } #[doc = "`11101`"] #[inline(always)] pub fn i2s2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S2_TX_REQ) + self.variant(DMA_SEL2_A::I2S2_TX_REQ) } #[doc = "`11110`"] #[inline(always)] pub fn i2s2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S2_RX_REQ) + self.variant(DMA_SEL2_A::I2S2_RX_REQ) } #[doc = "`11111`"] #[inline(always)] pub fn i2s0_bf_dir_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_BF_DIR_REQ) + self.variant(DMA_SEL2_A::I2S0_BF_DIR_REQ) } #[doc = "`100000`"] #[inline(always)] pub fn i2s0_bf_voice_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_BF_VOICE_REQ) + self.variant(DMA_SEL2_A::I2S0_BF_VOICE_REQ) } #[doc = r"Writes raw bits to the field"] #[inline(always)] @@ -55002,7 +42136,7 @@ pub mod sysctl { #[doc = ""] pub type DMA_SEL3_A = DMA_SEL0_A; #[doc = "Reader of field `dma_sel3`"] - pub type DMA_SEL3_R = crate::R; + pub type DMA_SEL3_R = crate::R; #[doc = "Write proxy for field `dma_sel3`"] pub struct DMA_SEL3_W<'a> { w: &'a mut W, @@ -55016,167 +42150,167 @@ pub mod sysctl { #[doc = "`0`"] #[inline(always)] pub fn ssi0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI0_RX_REQ) + self.variant(DMA_SEL3_A::SSI0_RX_REQ) } #[doc = "`1`"] #[inline(always)] pub fn ssi0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI0_TX_REQ) + self.variant(DMA_SEL3_A::SSI0_TX_REQ) } #[doc = "`10`"] #[inline(always)] pub fn ssi1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI1_RX_REQ) + self.variant(DMA_SEL3_A::SSI1_RX_REQ) } #[doc = "`11`"] #[inline(always)] pub fn ssi1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI1_TX_REQ) + self.variant(DMA_SEL3_A::SSI1_TX_REQ) } #[doc = "`100`"] #[inline(always)] pub fn ssi2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI2_RX_REQ) + self.variant(DMA_SEL3_A::SSI2_RX_REQ) } #[doc = "`101`"] #[inline(always)] pub fn ssi2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI2_TX_REQ) + self.variant(DMA_SEL3_A::SSI2_TX_REQ) } #[doc = "`110`"] #[inline(always)] pub fn ssi3_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI3_RX_REQ) + self.variant(DMA_SEL3_A::SSI3_RX_REQ) } #[doc = "`111`"] #[inline(always)] pub fn ssi3_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI3_TX_REQ) + self.variant(DMA_SEL3_A::SSI3_TX_REQ) } #[doc = "`1000`"] #[inline(always)] pub fn i2c0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C0_RX_REQ) + self.variant(DMA_SEL3_A::I2C0_RX_REQ) } #[doc = "`1001`"] #[inline(always)] pub fn i2c0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C0_TX_REQ) + self.variant(DMA_SEL3_A::I2C0_TX_REQ) } #[doc = "`1010`"] #[inline(always)] pub fn i2c1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C1_RX_REQ) + self.variant(DMA_SEL3_A::I2C1_RX_REQ) } #[doc = "`1011`"] #[inline(always)] pub fn i2c1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C1_TX_REQ) + self.variant(DMA_SEL3_A::I2C1_TX_REQ) } #[doc = "`1100`"] #[inline(always)] pub fn i2c2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C2_RX_REQ) + self.variant(DMA_SEL3_A::I2C2_RX_REQ) } #[doc = "`1101`"] #[inline(always)] pub fn i2c2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C2_TX_REQ) + self.variant(DMA_SEL3_A::I2C2_TX_REQ) } #[doc = "`1110`"] #[inline(always)] pub fn uart1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART1_RX_REQ) + self.variant(DMA_SEL3_A::UART1_RX_REQ) } #[doc = "`1111`"] #[inline(always)] pub fn uart1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART1_TX_REQ) + self.variant(DMA_SEL3_A::UART1_TX_REQ) } #[doc = "`10000`"] #[inline(always)] pub fn uart2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART2_RX_REQ) + self.variant(DMA_SEL3_A::UART2_RX_REQ) } #[doc = "`10001`"] #[inline(always)] pub fn uart2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART2_TX_REQ) + self.variant(DMA_SEL3_A::UART2_TX_REQ) } #[doc = "`10010`"] #[inline(always)] pub fn uart3_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART3_RX_REQ) + self.variant(DMA_SEL3_A::UART3_RX_REQ) } #[doc = "`10011`"] #[inline(always)] pub fn uart3_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART3_TX_REQ) + self.variant(DMA_SEL3_A::UART3_TX_REQ) } #[doc = "`10100`"] #[inline(always)] pub fn aes_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::AES_REQ) + self.variant(DMA_SEL3_A::AES_REQ) } #[doc = "`10101`"] #[inline(always)] pub fn sha_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SHA_RX_REQ) + self.variant(DMA_SEL3_A::SHA_RX_REQ) } #[doc = "`10110`"] #[inline(always)] pub fn ai_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::AI_RX_REQ) + self.variant(DMA_SEL3_A::AI_RX_REQ) } #[doc = "`10111`"] #[inline(always)] pub fn fft_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::FFT_RX_REQ) + self.variant(DMA_SEL3_A::FFT_RX_REQ) } #[doc = "`11000`"] #[inline(always)] pub fn fft_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::FFT_TX_REQ) + self.variant(DMA_SEL3_A::FFT_TX_REQ) } #[doc = "`11001`"] #[inline(always)] pub fn i2s0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_TX_REQ) + self.variant(DMA_SEL3_A::I2S0_TX_REQ) } #[doc = "`11010`"] #[inline(always)] pub fn i2s0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_RX_REQ) + self.variant(DMA_SEL3_A::I2S0_RX_REQ) } #[doc = "`11011`"] #[inline(always)] pub fn i2s1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S1_TX_REQ) + self.variant(DMA_SEL3_A::I2S1_TX_REQ) } #[doc = "`11100`"] #[inline(always)] pub fn i2s1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S1_RX_REQ) + self.variant(DMA_SEL3_A::I2S1_RX_REQ) } #[doc = "`11101`"] #[inline(always)] pub fn i2s2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S2_TX_REQ) + self.variant(DMA_SEL3_A::I2S2_TX_REQ) } #[doc = "`11110`"] #[inline(always)] pub fn i2s2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S2_RX_REQ) + self.variant(DMA_SEL3_A::I2S2_RX_REQ) } #[doc = "`11111`"] #[inline(always)] pub fn i2s0_bf_dir_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_BF_DIR_REQ) + self.variant(DMA_SEL3_A::I2S0_BF_DIR_REQ) } #[doc = "`100000`"] #[inline(always)] pub fn i2s0_bf_voice_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_BF_VOICE_REQ) + self.variant(DMA_SEL3_A::I2S0_BF_VOICE_REQ) } #[doc = r"Writes raw bits to the field"] #[inline(always)] @@ -55188,7 +42322,7 @@ pub mod sysctl { #[doc = ""] pub type DMA_SEL4_A = DMA_SEL0_A; #[doc = "Reader of field `dma_sel4`"] - pub type DMA_SEL4_R = crate::R; + pub type DMA_SEL4_R = crate::R; #[doc = "Write proxy for field `dma_sel4`"] pub struct DMA_SEL4_W<'a> { w: &'a mut W, @@ -55202,167 +42336,167 @@ pub mod sysctl { #[doc = "`0`"] #[inline(always)] pub fn ssi0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI0_RX_REQ) + self.variant(DMA_SEL4_A::SSI0_RX_REQ) } #[doc = "`1`"] #[inline(always)] pub fn ssi0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI0_TX_REQ) + self.variant(DMA_SEL4_A::SSI0_TX_REQ) } #[doc = "`10`"] #[inline(always)] pub fn ssi1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI1_RX_REQ) + self.variant(DMA_SEL4_A::SSI1_RX_REQ) } #[doc = "`11`"] #[inline(always)] pub fn ssi1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI1_TX_REQ) + self.variant(DMA_SEL4_A::SSI1_TX_REQ) } #[doc = "`100`"] #[inline(always)] pub fn ssi2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI2_RX_REQ) + self.variant(DMA_SEL4_A::SSI2_RX_REQ) } #[doc = "`101`"] #[inline(always)] pub fn ssi2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI2_TX_REQ) + self.variant(DMA_SEL4_A::SSI2_TX_REQ) } #[doc = "`110`"] #[inline(always)] pub fn ssi3_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI3_RX_REQ) + self.variant(DMA_SEL4_A::SSI3_RX_REQ) } #[doc = "`111`"] #[inline(always)] pub fn ssi3_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SSI3_TX_REQ) + self.variant(DMA_SEL4_A::SSI3_TX_REQ) } #[doc = "`1000`"] #[inline(always)] pub fn i2c0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C0_RX_REQ) + self.variant(DMA_SEL4_A::I2C0_RX_REQ) } #[doc = "`1001`"] #[inline(always)] pub fn i2c0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C0_TX_REQ) + self.variant(DMA_SEL4_A::I2C0_TX_REQ) } #[doc = "`1010`"] #[inline(always)] pub fn i2c1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C1_RX_REQ) + self.variant(DMA_SEL4_A::I2C1_RX_REQ) } #[doc = "`1011`"] #[inline(always)] pub fn i2c1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C1_TX_REQ) + self.variant(DMA_SEL4_A::I2C1_TX_REQ) } #[doc = "`1100`"] #[inline(always)] pub fn i2c2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C2_RX_REQ) + self.variant(DMA_SEL4_A::I2C2_RX_REQ) } #[doc = "`1101`"] #[inline(always)] pub fn i2c2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2C2_TX_REQ) + self.variant(DMA_SEL4_A::I2C2_TX_REQ) } #[doc = "`1110`"] #[inline(always)] pub fn uart1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART1_RX_REQ) + self.variant(DMA_SEL4_A::UART1_RX_REQ) } #[doc = "`1111`"] #[inline(always)] pub fn uart1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART1_TX_REQ) + self.variant(DMA_SEL4_A::UART1_TX_REQ) } #[doc = "`10000`"] #[inline(always)] pub fn uart2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART2_RX_REQ) + self.variant(DMA_SEL4_A::UART2_RX_REQ) } #[doc = "`10001`"] #[inline(always)] pub fn uart2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART2_TX_REQ) + self.variant(DMA_SEL4_A::UART2_TX_REQ) } #[doc = "`10010`"] #[inline(always)] pub fn uart3_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART3_RX_REQ) + self.variant(DMA_SEL4_A::UART3_RX_REQ) } #[doc = "`10011`"] #[inline(always)] pub fn uart3_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::UART3_TX_REQ) + self.variant(DMA_SEL4_A::UART3_TX_REQ) } #[doc = "`10100`"] #[inline(always)] pub fn aes_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::AES_REQ) + self.variant(DMA_SEL4_A::AES_REQ) } #[doc = "`10101`"] #[inline(always)] pub fn sha_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::SHA_RX_REQ) + self.variant(DMA_SEL4_A::SHA_RX_REQ) } #[doc = "`10110`"] #[inline(always)] pub fn ai_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::AI_RX_REQ) + self.variant(DMA_SEL4_A::AI_RX_REQ) } #[doc = "`10111`"] #[inline(always)] pub fn fft_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::FFT_RX_REQ) + self.variant(DMA_SEL4_A::FFT_RX_REQ) } #[doc = "`11000`"] #[inline(always)] pub fn fft_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::FFT_TX_REQ) + self.variant(DMA_SEL4_A::FFT_TX_REQ) } #[doc = "`11001`"] #[inline(always)] pub fn i2s0_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_TX_REQ) + self.variant(DMA_SEL4_A::I2S0_TX_REQ) } #[doc = "`11010`"] #[inline(always)] pub fn i2s0_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_RX_REQ) + self.variant(DMA_SEL4_A::I2S0_RX_REQ) } #[doc = "`11011`"] #[inline(always)] pub fn i2s1_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S1_TX_REQ) + self.variant(DMA_SEL4_A::I2S1_TX_REQ) } #[doc = "`11100`"] #[inline(always)] pub fn i2s1_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S1_RX_REQ) + self.variant(DMA_SEL4_A::I2S1_RX_REQ) } #[doc = "`11101`"] #[inline(always)] pub fn i2s2_tx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S2_TX_REQ) + self.variant(DMA_SEL4_A::I2S2_TX_REQ) } #[doc = "`11110`"] #[inline(always)] pub fn i2s2_rx_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S2_RX_REQ) + self.variant(DMA_SEL4_A::I2S2_RX_REQ) } #[doc = "`11111`"] #[inline(always)] pub fn i2s0_bf_dir_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_BF_DIR_REQ) + self.variant(DMA_SEL4_A::I2S0_BF_DIR_REQ) } #[doc = "`100000`"] #[inline(always)] pub fn i2s0_bf_voice_req(self) -> &'a mut W { - self.variant(DMA_SEL0_A::I2S0_BF_VOICE_REQ) + self.variant(DMA_SEL4_A::I2S0_BF_VOICE_REQ) } #[doc = r"Writes raw bits to the field"] #[inline(always)] @@ -55426,7 +42560,7 @@ pub mod sysctl { } } } - #[doc = "DMA handshake selector\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dma_sel1](dma_sel1) module"] + #[doc = "DMA handshake selector\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_sel1](dma_sel1) module"] pub type DMA_SEL1 = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -55452,7 +42586,7 @@ pub mod sysctl { #[doc = ""] pub type DMA_SEL5_A = super::dma_sel0::DMA_SEL0_A; #[doc = "Reader of field `dma_sel5`"] - pub type DMA_SEL5_R = crate::R; + pub type DMA_SEL5_R = crate::R; #[doc = "Write proxy for field `dma_sel5`"] pub struct DMA_SEL5_W<'a> { w: &'a mut W, @@ -55466,167 +42600,167 @@ pub mod sysctl { #[doc = "`0`"] #[inline(always)] pub fn ssi0_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SSI0_RX_REQ) + self.variant(DMA_SEL5_A::SSI0_RX_REQ) } #[doc = "`1`"] #[inline(always)] pub fn ssi0_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SSI0_TX_REQ) + self.variant(DMA_SEL5_A::SSI0_TX_REQ) } #[doc = "`10`"] #[inline(always)] pub fn ssi1_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SSI1_RX_REQ) + self.variant(DMA_SEL5_A::SSI1_RX_REQ) } #[doc = "`11`"] #[inline(always)] pub fn ssi1_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SSI1_TX_REQ) + self.variant(DMA_SEL5_A::SSI1_TX_REQ) } #[doc = "`100`"] #[inline(always)] pub fn ssi2_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SSI2_RX_REQ) + self.variant(DMA_SEL5_A::SSI2_RX_REQ) } #[doc = "`101`"] #[inline(always)] pub fn ssi2_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SSI2_TX_REQ) + self.variant(DMA_SEL5_A::SSI2_TX_REQ) } #[doc = "`110`"] #[inline(always)] pub fn ssi3_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SSI3_RX_REQ) + self.variant(DMA_SEL5_A::SSI3_RX_REQ) } #[doc = "`111`"] #[inline(always)] pub fn ssi3_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SSI3_TX_REQ) + self.variant(DMA_SEL5_A::SSI3_TX_REQ) } #[doc = "`1000`"] #[inline(always)] pub fn i2c0_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2C0_RX_REQ) + self.variant(DMA_SEL5_A::I2C0_RX_REQ) } #[doc = "`1001`"] #[inline(always)] pub fn i2c0_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2C0_TX_REQ) + self.variant(DMA_SEL5_A::I2C0_TX_REQ) } #[doc = "`1010`"] #[inline(always)] pub fn i2c1_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2C1_RX_REQ) + self.variant(DMA_SEL5_A::I2C1_RX_REQ) } #[doc = "`1011`"] #[inline(always)] pub fn i2c1_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2C1_TX_REQ) + self.variant(DMA_SEL5_A::I2C1_TX_REQ) } #[doc = "`1100`"] #[inline(always)] pub fn i2c2_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2C2_RX_REQ) + self.variant(DMA_SEL5_A::I2C2_RX_REQ) } #[doc = "`1101`"] #[inline(always)] pub fn i2c2_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2C2_TX_REQ) + self.variant(DMA_SEL5_A::I2C2_TX_REQ) } #[doc = "`1110`"] #[inline(always)] pub fn uart1_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::UART1_RX_REQ) + self.variant(DMA_SEL5_A::UART1_RX_REQ) } #[doc = "`1111`"] #[inline(always)] pub fn uart1_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::UART1_TX_REQ) + self.variant(DMA_SEL5_A::UART1_TX_REQ) } #[doc = "`10000`"] #[inline(always)] pub fn uart2_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::UART2_RX_REQ) + self.variant(DMA_SEL5_A::UART2_RX_REQ) } #[doc = "`10001`"] #[inline(always)] pub fn uart2_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::UART2_TX_REQ) + self.variant(DMA_SEL5_A::UART2_TX_REQ) } #[doc = "`10010`"] #[inline(always)] pub fn uart3_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::UART3_RX_REQ) + self.variant(DMA_SEL5_A::UART3_RX_REQ) } #[doc = "`10011`"] #[inline(always)] pub fn uart3_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::UART3_TX_REQ) + self.variant(DMA_SEL5_A::UART3_TX_REQ) } #[doc = "`10100`"] #[inline(always)] pub fn aes_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::AES_REQ) + self.variant(DMA_SEL5_A::AES_REQ) } #[doc = "`10101`"] #[inline(always)] pub fn sha_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::SHA_RX_REQ) + self.variant(DMA_SEL5_A::SHA_RX_REQ) } #[doc = "`10110`"] #[inline(always)] pub fn ai_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::AI_RX_REQ) + self.variant(DMA_SEL5_A::AI_RX_REQ) } #[doc = "`10111`"] #[inline(always)] pub fn fft_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::FFT_RX_REQ) + self.variant(DMA_SEL5_A::FFT_RX_REQ) } #[doc = "`11000`"] #[inline(always)] pub fn fft_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::FFT_TX_REQ) + self.variant(DMA_SEL5_A::FFT_TX_REQ) } #[doc = "`11001`"] #[inline(always)] pub fn i2s0_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2S0_TX_REQ) + self.variant(DMA_SEL5_A::I2S0_TX_REQ) } #[doc = "`11010`"] #[inline(always)] pub fn i2s0_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2S0_RX_REQ) + self.variant(DMA_SEL5_A::I2S0_RX_REQ) } #[doc = "`11011`"] #[inline(always)] pub fn i2s1_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2S1_TX_REQ) + self.variant(DMA_SEL5_A::I2S1_TX_REQ) } #[doc = "`11100`"] #[inline(always)] pub fn i2s1_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2S1_RX_REQ) + self.variant(DMA_SEL5_A::I2S1_RX_REQ) } #[doc = "`11101`"] #[inline(always)] pub fn i2s2_tx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2S2_TX_REQ) + self.variant(DMA_SEL5_A::I2S2_TX_REQ) } #[doc = "`11110`"] #[inline(always)] pub fn i2s2_rx_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2S2_RX_REQ) + self.variant(DMA_SEL5_A::I2S2_RX_REQ) } #[doc = "`11111`"] #[inline(always)] pub fn i2s0_bf_dir_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2S0_BF_DIR_REQ) + self.variant(DMA_SEL5_A::I2S0_BF_DIR_REQ) } #[doc = "`100000`"] #[inline(always)] pub fn i2s0_bf_voice_req(self) -> &'a mut W { - self.variant(super::dma_sel0::DMA_SEL0_A::I2S0_BF_VOICE_REQ) + self.variant(DMA_SEL5_A::I2S0_BF_VOICE_REQ) } #[doc = r"Writes raw bits to the field"] #[inline(always)] @@ -55650,7 +42784,7 @@ pub mod sysctl { } } } - #[doc = "IO Power Mode Select controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [power_sel](power_sel) module"] + #[doc = "IO Power Mode Select controller\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [power_sel](power_sel) module"] pub type POWER_SEL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -55965,6 +43099,7 @@ impl AES { } impl Deref for AES { type Target = aes::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*AES::ptr() } } @@ -56018,7 +43153,7 @@ pub mod aes { #[doc = "0x84 - 5th-8th word of key"] pub key_ext: [KEY_EXT; 4], } - #[doc = "1st-4th word of key\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [key](key) module"] + #[doc = "1st-4th word of key\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [key](key) module"] pub type KEY = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56033,7 +43168,8 @@ pub mod aes { pub type R = crate::R; #[doc = "Writer for register key[%s]"] pub type W = crate::W; - #[doc = "Register key[%s] `reset()`'s with value 0"] + #[doc = "Register key[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::KEY { type Type = u32; #[inline(always)] @@ -56044,7 +43180,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "Encryption or decryption select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [encrypt_sel](encrypt_sel) module"] + #[doc = "Encryption or decryption select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [encrypt_sel](encrypt_sel) module"] pub type ENCRYPT_SEL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56071,17 +43207,14 @@ pub mod aes { #[derive(Clone, Copy, Debug, PartialEq)] pub enum ENCRYPT_SEL_A { #[doc = "0: Sets encryption mode"] - ENCRYPTION, + ENCRYPTION = 0, #[doc = "1: Sets decryption mode"] - DECRYPTION, + DECRYPTION = 1, } impl From for bool { #[inline(always)] fn from(variant: ENCRYPT_SEL_A) -> Self { - match variant { - ENCRYPT_SEL_A::ENCRYPTION => false, - ENCRYPT_SEL_A::DECRYPTION => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `encrypt_sel`"] @@ -56160,7 +43293,7 @@ pub mod aes { } } } - #[doc = "AES mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [mode_ctl](mode_ctl) module"] + #[doc = "AES mode register\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode_ctl](mode_ctl) module"] pub type MODE_CTL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56185,22 +43318,19 @@ pub mod aes { } #[doc = "Cipher mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum CIPHER_MODE_A { #[doc = "0: Electronic Codebook"] - ECB, + ECB = 0, #[doc = "1: Cipher Block Chaining"] - CBC, + CBC = 1, #[doc = "2: Galois/Counter Mode"] - GCM, + GCM = 2, } impl From for u8 { #[inline(always)] fn from(variant: CIPHER_MODE_A) -> Self { - match variant { - CIPHER_MODE_A::ECB => 0, - CIPHER_MODE_A::CBC => 1, - CIPHER_MODE_A::GCM => 2, - } + variant as _ } } #[doc = "Reader of field `cipher_mode`"] @@ -56267,22 +43397,19 @@ pub mod aes { } #[doc = "Key mode\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum KEY_MODE_A { #[doc = "0: AES-128"] - AES128, + AES128 = 0, #[doc = "1: AES-192"] - AES192, + AES192 = 1, #[doc = "2: AES-256"] - AES256, + AES256 = 2, } impl From for u8 { #[inline(always)] fn from(variant: KEY_MODE_A) -> Self { - match variant { - KEY_MODE_A::AES128 => 0, - KEY_MODE_A::AES192 => 1, - KEY_MODE_A::AES256 => 2, - } + variant as _ } } #[doc = "Reader of field `key_mode`"] @@ -56351,17 +43478,14 @@ pub mod aes { #[derive(Clone, Copy, Debug, PartialEq)] pub enum KEY_ORDER_A { #[doc = "0: Big Endian"] - BE, + BE = 0, #[doc = "1: Little Endian"] - LE, + LE = 1, } impl From for bool { #[inline(always)] fn from(variant: KEY_ORDER_A) -> Self { - match variant { - KEY_ORDER_A::BE => false, - KEY_ORDER_A::LE => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `key_order`"] @@ -56428,7 +43552,7 @@ pub mod aes { #[doc = "Input data order"] pub type INPUT_ORDER_A = KEY_ORDER_A; #[doc = "Reader of field `input_order`"] - pub type INPUT_ORDER_R = crate::R; + pub type INPUT_ORDER_R = crate::R; #[doc = "Write proxy for field `input_order`"] pub struct INPUT_ORDER_W<'a> { w: &'a mut W, @@ -56444,12 +43568,12 @@ pub mod aes { #[doc = "Big Endian"] #[inline(always)] pub fn be(self) -> &'a mut W { - self.variant(KEY_ORDER_A::BE) + self.variant(INPUT_ORDER_A::BE) } #[doc = "Little Endian"] #[inline(always)] pub fn le(self) -> &'a mut W { - self.variant(KEY_ORDER_A::LE) + self.variant(INPUT_ORDER_A::LE) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -56471,7 +43595,7 @@ pub mod aes { #[doc = "Output data order"] pub type OUTPUT_ORDER_A = KEY_ORDER_A; #[doc = "Reader of field `output_order`"] - pub type OUTPUT_ORDER_R = crate::R; + pub type OUTPUT_ORDER_R = crate::R; #[doc = "Write proxy for field `output_order`"] pub struct OUTPUT_ORDER_W<'a> { w: &'a mut W, @@ -56487,12 +43611,12 @@ pub mod aes { #[doc = "Big Endian"] #[inline(always)] pub fn be(self) -> &'a mut W { - self.variant(KEY_ORDER_A::BE) + self.variant(OUTPUT_ORDER_A::BE) } #[doc = "Little Endian"] #[inline(always)] pub fn le(self) -> &'a mut W { - self.variant(KEY_ORDER_A::LE) + self.variant(OUTPUT_ORDER_A::LE) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -56566,7 +43690,7 @@ pub mod aes { } } } - #[doc = "Initialisation Vector (96 bit for GCM, 128 bit for CBC)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [iv](iv) module"] + #[doc = "Initialisation Vector (96 bit for GCM, 128 bit for CBC)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [iv](iv) module"] pub type IV = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56581,7 +43705,8 @@ pub mod aes { pub type R = crate::R; #[doc = "Writer for register iv[%s]"] pub type W = crate::W; - #[doc = "Register iv[%s] `reset()`'s with value 0"] + #[doc = "Register iv[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::IV { type Type = u32; #[inline(always)] @@ -56592,7 +43717,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "Endian control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [endian](endian) module"] + #[doc = "Endian control\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [endian](endian) module"] pub type ENDIAN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56618,7 +43743,7 @@ pub mod aes { #[doc = "Input data endian"] pub type ENDIAN_A = super::mode_ctl::KEY_ORDER_A; #[doc = "Reader of field `endian`"] - pub type ENDIAN_R = crate::R; + pub type ENDIAN_R = crate::R; #[doc = "Write proxy for field `endian`"] pub struct ENDIAN_W<'a> { w: &'a mut W, @@ -56634,12 +43759,12 @@ pub mod aes { #[doc = "Big Endian"] #[inline(always)] pub fn be(self) -> &'a mut W { - self.variant(super::mode_ctl::KEY_ORDER_A::BE) + self.variant(ENDIAN_A::BE) } #[doc = "Little Endian"] #[inline(always)] pub fn le(self) -> &'a mut W { - self.variant(super::mode_ctl::KEY_ORDER_A::LE) + self.variant(ENDIAN_A::LE) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -56673,7 +43798,7 @@ pub mod aes { } } } - #[doc = "Finished status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [finish](finish) module"] + #[doc = "Finished status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [finish](finish) module"] pub type FINISH = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56700,17 +43825,14 @@ pub mod aes { #[derive(Clone, Copy, Debug, PartialEq)] pub enum FINISH_A { #[doc = "0: Operation not finished"] - NOT_FINISHED, + NOT_FINISHED = 0, #[doc = "1: Operation finished"] - FINISHED, + FINISHED = 1, } impl From for bool { #[inline(always)] fn from(variant: FINISH_A) -> Self { - match variant { - FINISH_A::NOT_FINISHED => false, - FINISH_A::FINISHED => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `finish`"] @@ -56789,7 +43911,7 @@ pub mod aes { } } } - #[doc = "DMA select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [dma_sel](dma_sel) module"] + #[doc = "DMA select\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dma_sel](dma_sel) module"] pub type DMA_SEL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56851,7 +43973,7 @@ pub mod aes { } } } - #[doc = "GCM additional authenticated data count in bytes, minus one\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [aad_num](aad_num) module"] + #[doc = "GCM additional authenticated data count in bytes, minus one\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [aad_num](aad_num) module"] pub type AAD_NUM = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56877,7 +43999,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "Plaintext/ciphertext input data count in bytes, minus one\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [pc_num](pc_num) module"] + #[doc = "Plaintext/ciphertext input data count in bytes, minus one\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pc_num](pc_num) module"] pub type PC_NUM = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56903,7 +44025,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "Plaintext/ciphertext input data\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [text_data](text_data) module"] + #[doc = "Plaintext/ciphertext input data\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [text_data](text_data) module"] pub type TEXT_DATA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56929,7 +44051,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "Additional authenticated data\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [aad_data](aad_data) module"] + #[doc = "Additional authenticated data\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [aad_data](aad_data) module"] pub type AAD_DATA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56955,7 +44077,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "Tag check status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tag_chk](tag_chk) module"] + #[doc = "Tag check status\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tag_chk](tag_chk) module"] pub type TAG_CHK = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -56980,22 +44102,19 @@ pub mod aes { } #[doc = "Tag check status\n\nValue on reset: 0"] #[derive(Clone, Copy, Debug, PartialEq)] + #[repr(u8)] pub enum TAG_CHK_A { #[doc = "0: Check not finished"] - BUSY, + BUSY = 0, #[doc = "1: Check failed"] - FAIL, + FAIL = 1, #[doc = "2: Check success"] - SUCCESS, + SUCCESS = 2, } impl From for u8 { #[inline(always)] fn from(variant: TAG_CHK_A) -> Self { - match variant { - TAG_CHK_A::BUSY => 0, - TAG_CHK_A::FAIL => 1, - TAG_CHK_A::SUCCESS => 2, - } + variant as _ } } #[doc = "Reader of field `tag_chk`"] @@ -57075,7 +44194,7 @@ pub mod aes { } } } - #[doc = "Data can input flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [data_in_flag](data_in_flag) module"] + #[doc = "Data can input flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data_in_flag](data_in_flag) module"] pub type DATA_IN_FLAG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57102,17 +44221,14 @@ pub mod aes { #[derive(Clone, Copy, Debug, PartialEq)] pub enum DATA_IN_FLAG_A { #[doc = "0: Cannot input"] - CANNOT_INPUT, + CANNOT_INPUT = 0, #[doc = "1: Can input"] - CAN_INPUT, + CAN_INPUT = 1, } impl From for bool { #[inline(always)] fn from(variant: DATA_IN_FLAG_A) -> Self { - match variant { - DATA_IN_FLAG_A::CANNOT_INPUT => false, - DATA_IN_FLAG_A::CAN_INPUT => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `data_in_flag`"] @@ -57191,7 +44307,7 @@ pub mod aes { } } } - #[doc = "GCM input tag for comparison with the calculated tag\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [gcm_in_tag](gcm_in_tag) module"] + #[doc = "GCM input tag for comparison with the calculated tag\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gcm_in_tag](gcm_in_tag) module"] pub type GCM_IN_TAG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57206,7 +44322,8 @@ pub mod aes { pub type R = crate::R; #[doc = "Writer for register gcm_in_tag[%s]"] pub type W = crate::W; - #[doc = "Register gcm_in_tag[%s] `reset()`'s with value 0"] + #[doc = "Register gcm_in_tag[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::GCM_IN_TAG { type Type = u32; #[inline(always)] @@ -57217,7 +44334,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "Plaintext/ciphertext output data\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [out_data](out_data) module"] + #[doc = "Plaintext/ciphertext output data\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [out_data](out_data) module"] pub type OUT_DATA = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57243,7 +44360,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "AES module enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [en](en) module"] + #[doc = "AES module enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [en](en) module"] pub type EN = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57270,17 +44387,14 @@ pub mod aes { #[derive(Clone, Copy, Debug, PartialEq)] pub enum EN_A { #[doc = "0: Disable module"] - DISABLE, + DISABLE = 0, #[doc = "1: Enable module"] - ENABLE, + ENABLE = 1, } impl From for bool { #[inline(always)] fn from(variant: EN_A) -> Self { - match variant { - EN_A::DISABLE => false, - EN_A::ENABLE => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `en`"] @@ -57359,7 +44473,7 @@ pub mod aes { } } } - #[doc = "Data can output flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [data_out_flag](data_out_flag) module"] + #[doc = "Data can output flag\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [data_out_flag](data_out_flag) module"] pub type DATA_OUT_FLAG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57386,17 +44500,14 @@ pub mod aes { #[derive(Clone, Copy, Debug, PartialEq)] pub enum DATA_OUT_FLAG_A { #[doc = "0: Data cannot output"] - CANNOT_OUTPUT, + CANNOT_OUTPUT = 0, #[doc = "1: Data can output"] - CAN_OUTPUT, + CAN_OUTPUT = 1, } impl From for bool { #[inline(always)] fn from(variant: DATA_OUT_FLAG_A) -> Self { - match variant { - DATA_OUT_FLAG_A::CANNOT_OUTPUT => false, - DATA_OUT_FLAG_A::CAN_OUTPUT => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `data_out_flag`"] @@ -57475,7 +44586,7 @@ pub mod aes { } } } - #[doc = "Can input tag (when using GCM)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tag_in_flag](tag_in_flag) module"] + #[doc = "Can input tag (when using GCM)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tag_in_flag](tag_in_flag) module"] pub type TAG_IN_FLAG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57501,7 +44612,7 @@ pub mod aes { #[doc = "GCM tag can be written to gcm_in_tag when this flag is set"] pub type TAG_IN_FLAG_A = super::data_in_flag::DATA_IN_FLAG_A; #[doc = "Reader of field `tag_in_flag`"] - pub type TAG_IN_FLAG_R = crate::R; + pub type TAG_IN_FLAG_R = crate::R; #[doc = "Write proxy for field `tag_in_flag`"] pub struct TAG_IN_FLAG_W<'a> { w: &'a mut W, @@ -57517,12 +44628,12 @@ pub mod aes { #[doc = "Cannot input"] #[inline(always)] pub fn cannot_input(self) -> &'a mut W { - self.variant(super::data_in_flag::DATA_IN_FLAG_A::CANNOT_INPUT) + self.variant(TAG_IN_FLAG_A::CANNOT_INPUT) } #[doc = "Can input"] #[inline(always)] pub fn can_input(self) -> &'a mut W { - self.variant(super::data_in_flag::DATA_IN_FLAG_A::CAN_INPUT) + self.variant(TAG_IN_FLAG_A::CAN_INPUT) } #[doc = r"Sets the field bit"] #[inline(always)] @@ -57556,7 +44667,7 @@ pub mod aes { } } } - #[doc = "Tag clear (a write to this register clears the tag_chk status)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [tag_clear](tag_clear) module"] + #[doc = "Tag clear (a write to this register clears the tag_chk status)\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tag_clear](tag_clear) module"] pub type TAG_CLEAR = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57582,7 +44693,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "Computed GCM output tag\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [gcm_out_tag](gcm_out_tag) module"] + #[doc = "Computed GCM output tag\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [gcm_out_tag](gcm_out_tag) module"] pub type GCM_OUT_TAG = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57597,7 +44708,8 @@ pub mod aes { pub type R = crate::R; #[doc = "Writer for register gcm_out_tag[%s]"] pub type W = crate::W; - #[doc = "Register gcm_out_tag[%s] `reset()`'s with value 0"] + #[doc = "Register gcm_out_tag[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::GCM_OUT_TAG { type Type = u32; #[inline(always)] @@ -57608,7 +44720,7 @@ pub mod aes { impl R {} impl W {} } - #[doc = "5th-8th word of key\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [key_ext](key_ext) module"] + #[doc = "5th-8th word of key\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [key_ext](key_ext) module"] pub type KEY_EXT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57623,7 +44735,8 @@ pub mod aes { pub type R = crate::R; #[doc = "Writer for register key_ext[%s]"] pub type W = crate::W; - #[doc = "Register key_ext[%s] `reset()`'s with value 0"] + #[doc = "Register key_ext[%s] +`reset()`'s with value 0"] impl crate::ResetValue for super::KEY_EXT { type Type = u32; #[inline(always)] @@ -57649,6 +44762,7 @@ impl RTC { } impl Deref for RTC { type Target = rtc::RegisterBlock; + #[inline(always)] fn deref(&self) -> &Self::Target { unsafe { &*RTC::ptr() } } @@ -57678,7 +44792,7 @@ pub mod rtc { #[doc = "0x28 - Timer extended information"] pub extended: EXTENDED, } - #[doc = "Timer date information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [date](date) module"] + #[doc = "Timer date information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [date](date) module"] pub type DATE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57763,7 +44877,10 @@ pub mod rtc { pub fn week(&self) -> WEEK_R { WEEK_R::new((self.bits & 0x07) as u8) } - #[doc = "Bits 8:12 - Day. Range \\[1,31\\] or \\[1,30\\] or \\[1,29\\] or \\[1,28\\]"] + #[doc = "Bits 8:12 - Day. Range \\[1,31\\] +or \\[1,30\\] +or \\[1,29\\] +or \\[1,28\\]"] #[inline(always)] pub fn day(&self) -> DAY_R { DAY_R::new(((self.bits >> 8) & 0x1f) as u8) @@ -57785,7 +44902,10 @@ pub mod rtc { pub fn week(&mut self) -> WEEK_W { WEEK_W { w: self } } - #[doc = "Bits 8:12 - Day. Range \\[1,31\\] or \\[1,30\\] or \\[1,29\\] or \\[1,28\\]"] + #[doc = "Bits 8:12 - Day. Range \\[1,31\\] +or \\[1,30\\] +or \\[1,29\\] +or \\[1,28\\]"] #[inline(always)] pub fn day(&mut self) -> DAY_W { DAY_W { w: self } @@ -57802,7 +44922,7 @@ pub mod rtc { } } } - #[doc = "Timer time information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [time](time) module"] + #[doc = "Timer time information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [time](time) module"] pub type TIME = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57902,7 +45022,7 @@ pub mod rtc { } } } - #[doc = "Alarm date information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [alarm_date](alarm_date) module"] + #[doc = "Alarm date information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alarm_date](alarm_date) module"] pub type ALARM_DATE = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -57987,7 +45107,10 @@ pub mod rtc { pub fn week(&self) -> WEEK_R { WEEK_R::new((self.bits & 0x07) as u8) } - #[doc = "Bits 8:12 - Day. Range \\[1,31\\] or \\[1,30\\] or \\[1,29\\] or \\[1,28\\]"] + #[doc = "Bits 8:12 - Day. Range \\[1,31\\] +or \\[1,30\\] +or \\[1,29\\] +or \\[1,28\\]"] #[inline(always)] pub fn day(&self) -> DAY_R { DAY_R::new(((self.bits >> 8) & 0x1f) as u8) @@ -58009,7 +45132,10 @@ pub mod rtc { pub fn week(&mut self) -> WEEK_W { WEEK_W { w: self } } - #[doc = "Bits 8:12 - Day. Range \\[1,31\\] or \\[1,30\\] or \\[1,29\\] or \\[1,28\\]"] + #[doc = "Bits 8:12 - Day. Range \\[1,31\\] +or \\[1,30\\] +or \\[1,29\\] +or \\[1,28\\]"] #[inline(always)] pub fn day(&mut self) -> DAY_W { DAY_W { w: self } @@ -58026,7 +45152,7 @@ pub mod rtc { } } } - #[doc = "Alarm time information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [alarm_time](alarm_time) module"] + #[doc = "Alarm time information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [alarm_time](alarm_time) module"] pub type ALARM_TIME = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -58126,7 +45252,7 @@ pub mod rtc { } } } - #[doc = "Timer counter initial value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [initial_count](initial_count) module"] + #[doc = "Timer counter initial value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [initial_count](initial_count) module"] pub type INITIAL_COUNT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -58178,7 +45304,7 @@ pub mod rtc { } } } - #[doc = "Timer counter current value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [current_count](current_count) module"] + #[doc = "Timer counter current value\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [current_count](current_count) module"] pub type CURRENT_COUNT = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -58230,7 +45356,7 @@ pub mod rtc { } } } - #[doc = "RTC interrupt settings\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [interrupt_ctrl](interrupt_ctrl) module"] + #[doc = "RTC interrupt settings\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [interrupt_ctrl](interrupt_ctrl) module"] pub type INTERRUPT_CTRL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -58374,7 +45500,7 @@ pub mod rtc { } } } - #[doc = "RTC register settings\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [register_ctrl](register_ctrl) module"] + #[doc = "RTC register settings\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [register_ctrl](register_ctrl) module"] pub type REGISTER_CTRL = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -58586,7 +45712,7 @@ pub mod rtc { } } } - #[doc = "Timer extended information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about avaliable fields see [extended](extended) module"] + #[doc = "Timer extended information\n\nThis register you can [`read`](crate::generic::Reg::read), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extended](extended) module"] pub type EXTENDED = crate::Reg; #[allow(missing_docs)] #[doc(hidden)] @@ -58627,17 +45753,14 @@ pub mod rtc { #[derive(Clone, Copy, Debug, PartialEq)] pub enum LEAP_YEAR_A { #[doc = "0: 0 is not leap year"] - NOT_LEAP, + NOT_LEAP = 0, #[doc = "1: 1 is leap year"] - LEAP, + LEAP = 1, } impl From for bool { #[inline(always)] fn from(variant: LEAP_YEAR_A) -> Self { - match variant { - LEAP_YEAR_A::NOT_LEAP => false, - LEAP_YEAR_A::LEAP => true, - } + variant as u8 != 0 } } #[doc = "Reader of field `leap_year`"] @@ -58814,6 +45937,7 @@ impl Peripherals { }) } #[doc = r"Unchecked version of `Peripherals::take`"] + #[inline] pub unsafe fn steal() -> Self { DEVICE_PERIPHERALS = true; Peripherals {