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torvaldstorvalds
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Merge tag 'pinctrl-v4.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij: - Driver fixes for Freescale i.MX7D, Intel, Broadcom 2835 - One MAINTAINERS entry * tag 'pinctrl-v4.4-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: MAINTAINERS: pinctrl: Add maintainers for pinctrl-single pinctrl: bcm2835: Fix initial value for direction_output pinctrl: intel: fix offset calculation issue of register PAD_OWN pinctrl: intel: fix bug of register offset calculation pinctrl: freescale: add ZERO_OFFSET_VALID flag for vf610 pinctrl
2 parents d7d3d84 + 13cbd90 commit 38beb96

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7 files changed

+41
-28
lines changed

7 files changed

+41
-28
lines changed

‎MAINTAINERS

+8
Original file line numberDiff line numberDiff line change
@@ -8380,6 +8380,14 @@ L: [email protected] (moderated for non-subscribers)
83808380
S: Maintained
83818381
F: drivers/pinctrl/samsung/
83828382

8383+
PIN CONTROLLER - SINGLE
8384+
M: Tony Lindgren <[email protected]>
8385+
M: Haojian Zhuang <[email protected]>
8386+
L: [email protected] (moderated for non-subscribers)
8387+
L: [email protected]
8388+
S: Maintained
8389+
F: drivers/pinctrl/pinctrl-single.c
8390+
83838391
PIN CONTROLLER - ST SPEAR
83848392
M: Viresh Kumar <[email protected]>
83858393
L: [email protected]

‎drivers/pinctrl/bcm/pinctrl-bcm2835.c

+7-6
Original file line numberDiff line numberDiff line change
@@ -342,19 +342,20 @@ static int bcm2835_gpio_get(struct gpio_chip *chip, unsigned offset)
342342
return bcm2835_gpio_get_bit(pc, GPLEV0, offset);
343343
}
344344

345-
static int bcm2835_gpio_direction_output(struct gpio_chip *chip,
346-
unsigned offset, int value)
347-
{
348-
return pinctrl_gpio_direction_output(chip->base + offset);
349-
}
350-
351345
static void bcm2835_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
352346
{
353347
struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);
354348

355349
bcm2835_gpio_set_bit(pc, value ? GPSET0 : GPCLR0, offset);
356350
}
357351

352+
static int bcm2835_gpio_direction_output(struct gpio_chip *chip,
353+
unsigned offset, int value)
354+
{
355+
bcm2835_gpio_set(chip, offset, value);
356+
return pinctrl_gpio_direction_output(chip->base + offset);
357+
}
358+
358359
static int bcm2835_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
359360
{
360361
struct bcm2835_pinctrl *pc = dev_get_drvdata(chip->dev);

‎drivers/pinctrl/freescale/pinctrl-vf610.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -299,7 +299,7 @@ static const struct pinctrl_pin_desc vf610_pinctrl_pads[] = {
299299
static struct imx_pinctrl_soc_info vf610_pinctrl_info = {
300300
.pins = vf610_pinctrl_pads,
301301
.npins = ARRAY_SIZE(vf610_pinctrl_pads),
302-
.flags = SHARE_MUX_CONF_REG,
302+
.flags = SHARE_MUX_CONF_REG | ZERO_OFFSET_VALID,
303303
};
304304

305305
static const struct of_device_id vf610_pinctrl_of_match[] = {

‎drivers/pinctrl/intel/pinctrl-broxton.c

+1
Original file line numberDiff line numberDiff line change
@@ -28,6 +28,7 @@
2828
.padcfglock_offset = BXT_PADCFGLOCK, \
2929
.hostown_offset = BXT_HOSTSW_OWN, \
3030
.ie_offset = BXT_GPI_IE, \
31+
.gpp_size = 32, \
3132
.pin_base = (s), \
3233
.npins = ((e) - (s) + 1), \
3334
}

‎drivers/pinctrl/intel/pinctrl-intel.c

+20-21
Original file line numberDiff line numberDiff line change
@@ -25,9 +25,6 @@
2525

2626
#include "pinctrl-intel.h"
2727

28-
/* Maximum number of pads in each group */
29-
#define NPADS_IN_GPP 24
30-
3128
/* Offset from regs */
3229
#define PADBAR 0x00c
3330
#define GPI_IS 0x100
@@ -37,6 +34,7 @@
3734
#define PADOWN_BITS 4
3835
#define PADOWN_SHIFT(p) ((p) % 8 * PADOWN_BITS)
3936
#define PADOWN_MASK(p) (0xf << PADOWN_SHIFT(p))
37+
#define PADOWN_GPP(p) ((p) / 8)
4038

4139
/* Offset from pad_regs */
4240
#define PADCFG0 0x000
@@ -142,7 +140,7 @@ static void __iomem *intel_get_padcfg(struct intel_pinctrl *pctrl, unsigned pin,
142140
static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)
143141
{
144142
const struct intel_community *community;
145-
unsigned padno, gpp, gpp_offset, offset;
143+
unsigned padno, gpp, offset, group;
146144
void __iomem *padown;
147145

148146
community = intel_get_community(pctrl, pin);
@@ -152,9 +150,9 @@ static bool intel_pad_owned_by_host(struct intel_pinctrl *pctrl, unsigned pin)
152150
return true;
153151

154152
padno = pin_to_padno(community, pin);
155-
gpp = padno / NPADS_IN_GPP;
156-
gpp_offset = padno % NPADS_IN_GPP;
157-
offset = community->padown_offset + gpp * 16 + (gpp_offset / 8) * 4;
153+
group = padno / community->gpp_size;
154+
gpp = PADOWN_GPP(padno % community->gpp_size);
155+
offset = community->padown_offset + 0x10 * group + gpp * 4;
158156
padown = community->regs + offset;
159157

160158
return !(readl(padown) & PADOWN_MASK(padno));
@@ -173,11 +171,11 @@ static bool intel_pad_acpi_mode(struct intel_pinctrl *pctrl, unsigned pin)
173171
return false;
174172

175173
padno = pin_to_padno(community, pin);
176-
gpp = padno / NPADS_IN_GPP;
174+
gpp = padno / community->gpp_size;
177175
offset = community->hostown_offset + gpp * 4;
178176
hostown = community->regs + offset;
179177

180-
return !(readl(hostown) & BIT(padno % NPADS_IN_GPP));
178+
return !(readl(hostown) & BIT(padno % community->gpp_size));
181179
}
182180

183181
static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin)
@@ -193,7 +191,7 @@ static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin)
193191
return false;
194192

195193
padno = pin_to_padno(community, pin);
196-
gpp = padno / NPADS_IN_GPP;
194+
gpp = padno / community->gpp_size;
197195

198196
/*
199197
* If PADCFGLOCK and PADCFGLOCKTX bits are both clear for this pad,
@@ -202,12 +200,12 @@ static bool intel_pad_locked(struct intel_pinctrl *pctrl, unsigned pin)
202200
*/
203201
offset = community->padcfglock_offset + gpp * 8;
204202
value = readl(community->regs + offset);
205-
if (value & BIT(pin % NPADS_IN_GPP))
203+
if (value & BIT(pin % community->gpp_size))
206204
return true;
207205

208206
offset = community->padcfglock_offset + 4 + gpp * 8;
209207
value = readl(community->regs + offset);
210-
if (value & BIT(pin % NPADS_IN_GPP))
208+
if (value & BIT(pin % community->gpp_size))
211209
return true;
212210

213211
return false;
@@ -663,8 +661,8 @@ static void intel_gpio_irq_ack(struct irq_data *d)
663661
community = intel_get_community(pctrl, pin);
664662
if (community) {
665663
unsigned padno = pin_to_padno(community, pin);
666-
unsigned gpp_offset = padno % NPADS_IN_GPP;
667-
unsigned gpp = padno / NPADS_IN_GPP;
664+
unsigned gpp_offset = padno % community->gpp_size;
665+
unsigned gpp = padno / community->gpp_size;
668666

669667
writel(BIT(gpp_offset), community->regs + GPI_IS + gpp * 4);
670668
}
@@ -685,8 +683,8 @@ static void intel_gpio_irq_mask_unmask(struct irq_data *d, bool mask)
685683
community = intel_get_community(pctrl, pin);
686684
if (community) {
687685
unsigned padno = pin_to_padno(community, pin);
688-
unsigned gpp_offset = padno % NPADS_IN_GPP;
689-
unsigned gpp = padno / NPADS_IN_GPP;
686+
unsigned gpp_offset = padno % community->gpp_size;
687+
unsigned gpp = padno / community->gpp_size;
690688
void __iomem *reg;
691689
u32 value;
692690

@@ -780,8 +778,8 @@ static int intel_gpio_irq_wake(struct irq_data *d, unsigned int on)
780778
return -EINVAL;
781779

782780
padno = pin_to_padno(community, pin);
783-
gpp = padno / NPADS_IN_GPP;
784-
gpp_offset = padno % NPADS_IN_GPP;
781+
gpp = padno / community->gpp_size;
782+
gpp_offset = padno % community->gpp_size;
785783

786784
/* Clear the existing wake status */
787785
writel(BIT(gpp_offset), community->regs + GPI_GPE_STS + gpp * 4);
@@ -819,14 +817,14 @@ static irqreturn_t intel_gpio_community_irq_handler(struct intel_pinctrl *pctrl,
819817
/* Only interrupts that are enabled */
820818
pending &= enabled;
821819

822-
for_each_set_bit(gpp_offset, &pending, NPADS_IN_GPP) {
820+
for_each_set_bit(gpp_offset, &pending, community->gpp_size) {
823821
unsigned padno, irq;
824822

825823
/*
826824
* The last group in community can have less pins
827825
* than NPADS_IN_GPP.
828826
*/
829-
padno = gpp_offset + gpp * NPADS_IN_GPP;
827+
padno = gpp_offset + gpp * community->gpp_size;
830828
if (padno >= community->npins)
831829
break;
832830

@@ -1002,7 +1000,8 @@ int intel_pinctrl_probe(struct platform_device *pdev,
10021000

10031001
community->regs = regs;
10041002
community->pad_regs = regs + padbar;
1005-
community->ngpps = DIV_ROUND_UP(community->npins, NPADS_IN_GPP);
1003+
community->ngpps = DIV_ROUND_UP(community->npins,
1004+
community->gpp_size);
10061005
}
10071006

10081007
irq = platform_get_irq(pdev, 0);

‎drivers/pinctrl/intel/pinctrl-intel.h

+3
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,8 @@ struct intel_function {
5555
* ACPI).
5656
* @ie_offset: Register offset of GPI_IE from @regs.
5757
* @pin_base: Starting pin of pins in this community
58+
* @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK,
59+
* HOSTSW_OWN, GPI_IS, GPI_IE, etc.
5860
* @npins: Number of pins in this community
5961
* @regs: Community specific common registers (reserved for core driver)
6062
* @pad_regs: Community specific pad registers (reserved for core driver)
@@ -68,6 +70,7 @@ struct intel_community {
6870
unsigned hostown_offset;
6971
unsigned ie_offset;
7072
unsigned pin_base;
73+
unsigned gpp_size;
7174
size_t npins;
7275
void __iomem *regs;
7376
void __iomem *pad_regs;

‎drivers/pinctrl/intel/pinctrl-sunrisepoint.c

+1
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@
3030
.padcfglock_offset = SPT_PADCFGLOCK, \
3131
.hostown_offset = SPT_HOSTSW_OWN, \
3232
.ie_offset = SPT_GPI_IE, \
33+
.gpp_size = 24, \
3334
.pin_base = (s), \
3435
.npins = ((e) - (s) + 1), \
3536
}

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