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drm/vc4: Add support for non-standard modes in VEC #4406
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I've rebased new code now that #4241 is merged. |
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There are some niggly whitespace complaints from checkpatch about the first commit:
It wants the indentation to consist of as many TABs as possible, with spaces only at the end to pad out the remainder. |
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2nd and third patches have checkpatch complaints too
CHECK: Lines should not end with a '('
#128: FILE: drivers/gpu/drm/vc4/vc4_vec.c:425:
+ interlaced_mode = drm_mode_duplicate(
CHECK: Lines should not end with a '('
#131: FILE: drivers/gpu/drm/vc4/vc4_vec.c:428:
+ progressive_mode = drm_mode_duplicate(
total: 0 errors, 0 warnings, 2 checks, 146 lines checked
break the line after the =, and then align the parameters to drm_mode_duplicate
CHECK: No space is necessary after a cast
#148: FILE: drivers/gpu/drm/vc4/vc4_vec.c:687:
+ chroma_freq += (125ull * (u64) eff_clk_rate) >> 1; /* proper rounding */
That one the space isn't needed between (u64) and eff_clk_rate, and doesn't aid readability.
As long as the standard modes come out to the same numbers as before then I'm happy with the patches.
The kernel submission guidelines do not specify |
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You're slightly outside my comfort zone with this PR, but it makes sense to me. I assume the change in |
The VEC actually misbehaves if Taking the above into account, attempting to set anything else as Conversely, VEC actually responds to changes in the vertical timing settings quite reasonably, at least in the interlaced mode. Manipulating this is bound to result in modes that are non-standard, but they might be useful in one way or another. But we need to ensure that |
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Note: In this newest revision, aside from rebasing onto current Both approaches seem to yield equivalent results from the userland perspective. |
@kFYatek can you test this firmware and this PR and check behaviour of VEC clock? I believe previously you'd get 107.143MHz if |
@popcornmix Yes, this indeed yields clean 108 MHz VEC clock on both Pi3 and Pi4, both with and without Attempting to set the clock to something else than 108 MHz still does... something, but it looks like only some very simple fractions of that clock are supported - I could get what looked like 2/3, 3/4 and 6/7 of 108 MHz (i.e., 72 MHz, 81 MHz, 92.571... MHz), but nothing in between, so attempting that is pretty much useless. So if you intend to merge that, I'll remove that one commit that adds custom clock support. |
Yes, that is expected. PLLC is set to 108 * 24, and PLLC_CHAN_CPER is a divide by 4. I'll get the firmware and kernel patches pushed. |
…port Make vc4_vec_encoder_atomic_check() accept arbitrary modelines, as long as they result in somewhat sane output from the VEC. The bounds have been determined empirically. Additionally, add support for the progressive 262-line and 312-line modes. Signed-off-by: Mateusz Kwiatkowski <[email protected]>
Add predefined modelines for the 240p (NTSC) and 288p (PAL) progressive modes, and report them through vc4_vec_connector_get_modes(). Signed-off-by: Mateusz Kwiatkowski <[email protected]>
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This newest force-push includes the following changes:
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Tested and it appears to work. The following modes gave plausible output: |
See: raspberrypi/linux#4406 kernel: media: i2c: imx477: Add vsync trigger_mode parameter See: raspberrypi/linux#4656 kernel: bcm2835-v4l2-codec: Remove advertised support of VP8 See: raspberrypi/linux#4661 firmware: platform: Remove licence on VP6, VP8, Theora, and FLAC See: raspberrypi/linux#4661
See: raspberrypi/linux#4406 kernel: media: i2c: imx477: Add vsync trigger_mode parameter See: raspberrypi/linux#4656 kernel: bcm2835-v4l2-codec: Remove advertised support of VP8 See: raspberrypi/linux#4661 firmware: platform: Remove licence on VP6, VP8, Theora, and FLAC See: raspberrypi/linux#4661
This PR adds support for non-standard composite output modelines, specifically:
sdtv_mode=16
/sdtv_mode=18
in terms of the resulting signal's timing, although the firmware modes employ implicit scaling (480/576 active lines from software scaled down to 240/288 lines on actual output). I added the720x240
and720x288
modes that are reported viavc4_vec_connector_get_modes()
."720x486i" 13.5 720 734 798 858 486 491 497 525 Interlace
- NTSC with all the active lines from the original spec, before the convention of cropping the outermost 6"720x506i" 13.5 720 734 798 858 506 509 515 525 Interlace
- NTSC mode with basically the entire VBI accessible"720x610i" 13.5 720 740 804 864 610 612 618 625 Interlace
- the same but for PAL; you can e.g. emit teletext by drawing in the uppermost lines"720x480i" 13.5 720 740 804 864 480 486 492 525 Interlace
- an approximation of the "NTSC" mode while VEC is put in the 625-line mode; allows e.g. putting SECAM color on top of that, which is a really dumb idea but it works ;)"640x200" 13.5 640 694 758 858 200 223 226 262
is an example CGA-like mode with black borders.Support for clocking the VEC at different frequencies than 108 MHz. This also includes recalculating the color subcarrier frequencies, so that they stay within spec even in that case. I guess that this point will be the most controversial of it all, but it has some uses:For fun, you can try modes such as"720x378i 8.68725 720 734 798 858 378 381 387 405 Interlace
- that in theory closely approximates the early British 405-line TV system and may be able to drive such a set. Obviously I don't have hardware to check that ;)More importantly though, this makes the composite output somewhat usable even withoutCustom clock rate support has been removed, as it is nearly useless now that clk: Move vec clock to clk-raspberrypi #4639 is merged.enable_tvout=1
on Pi4. Due to the clock being 0.8% slower than the spec, the ratio relationship between the line frequeny and subcarrier frequency is broken, which makes this mode cause a lot more cross-color artifacts, but the picture is still usable.enable_tvout=1
(although I don't know, maybe the HDMI timings aren't quite standard then?). So maybe having an option for this type of setup invc4-kms-v3d-pi4.dtbo
would make sense.