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#endif
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#include "spidrv.h"
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+ #include "btl_interface.h"
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#include "gpiointerrupt.h"
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#include "sl_device_init_clocks.h"
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+ #include "sl_memlcd.h"
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#include "sl_status.h"
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#include "FreeRTOS.h"
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#include "sl_power_manager.h"
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#endif
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+ #define CONCAT (A , B ) (A##B)
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+ #define SPI_CLOCK (N ) CONCAT(cmuClock_USART, N)
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+
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+ StaticSemaphore_t spi_sem_peripheral ;
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+ SemaphoreHandle_t spi_sem_sync_hdl ;
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+
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StaticSemaphore_t xEfxSpiIntfSemaBuffer ;
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static SemaphoreHandle_t spiTransferLock ;
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static TaskHandle_t spiInitiatorTaskHandle = NULL ;
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#if defined(EFR32MG12 )
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#include "sl_spidrv_exp_config.h"
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extern SPIDRV_Handle_t sl_spidrv_exp_handle ;
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- #define SPI_HANDLE sl_spidrv_exp_handle
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+ #define SL_SPIDRV_HANDLE sl_spidrv_exp_handle
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#elif defined(EFR32MG24 )
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- #include "sl_spidrv_eusart_exp_config.h"
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#include "spi_multiplex.h"
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- StaticSemaphore_t spi_sem_peripharal ;
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- SemaphoreHandle_t spi_sem_sync_hdl ;
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- peripheraltype_t pr_type = EXP_HDR ;
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- extern SPIDRV_Handle_t sl_spidrv_eusart_exp_handle ;
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- #define SPI_HANDLE sl_spidrv_eusart_exp_handle
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#else
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#error "Unknown platform"
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#endif
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- static unsigned int tx_dma_channel ;
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- static unsigned int rx_dma_channel ;
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-
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extern void rsi_gpio_irq_cb (uint8_t irqnum );
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// #define RS911X_USE_LDMA
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@@ -152,9 +151,9 @@ void rsi_hal_board_init(void)
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xSemaphoreGive (spiTransferLock );
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#if defined(EFR32MG24 )
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- spi_sem_sync_hdl = xSemaphoreCreateBinaryStatic (& spi_sem_peripharal );
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+ spi_sem_sync_hdl = xSemaphoreCreateBinaryStatic (& spi_sem_peripheral );
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xSemaphoreGive (spi_sem_sync_hdl );
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- #endif
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+ #endif /* EFR32MG24 */
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/* GPIO INIT of MG12 & MG24 : Reset, Wakeup, Interrupt */
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SILABS_LOG ("RSI_HAL: init GPIO" );
@@ -167,32 +166,75 @@ void rsi_hal_board_init(void)
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}
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#if defined(EFR32MG24 )
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- /****************************************************************************
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- * @fn sl_status_t sl_wfx_host_spi_cs_assert()
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- * @brief
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- * Assert chip select.
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- * @param[in] None
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- * @return returns SL_STATUS_OK
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- *****************************************************************************/
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sl_status_t sl_wfx_host_spi_cs_assert ()
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{
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+ configASSERT (spi_sem_sync_hdl );
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+ if (xSemaphoreTake (spi_sem_sync_hdl , portMAX_DELAY ) != pdTRUE )
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+ {
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+ return SL_STATUS_TIMEOUT ;
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+ }
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+ SPIDRV_DeInit (SL_SPIDRV_HANDLE );
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+ SPIDRV_Init (SL_SPIDRV_HANDLE , & sl_spidrv_eusart_init_exp );
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GPIO_PinOutClear (SL_SPIDRV_EUSART_EXP_CS_PORT , SL_SPIDRV_EUSART_EXP_CS_PIN );
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return SL_STATUS_OK ;
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}
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- /****************************************************************************
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- * @fn sl_status_t sl_wfx_host_spi_cs_deassert()
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- * @brief
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- * De-Assert chip select.
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- * @param[in] None
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- * @return returns SL_STATUS_OK
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- *****************************************************************************/
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sl_status_t sl_wfx_host_spi_cs_deassert ()
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{
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GPIO_PinOutSet (SL_SPIDRV_EUSART_EXP_CS_PORT , SL_SPIDRV_EUSART_EXP_CS_PIN );
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+ SPIDRV_DeInit (SL_SPIDRV_HANDLE );
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+ GPIO -> EUSARTROUTE [SL_SPIDRV_EUSART_EXP_PERIPHERAL_NO ].ROUTEEN = 0 ;
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+ xSemaphoreGive (spi_sem_sync_hdl );
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return SL_STATUS_OK ;
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}
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- #endif
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+
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+ void sl_wfx_host_spiflash_cs_assert (void )
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+ {
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+ GPIO_PinOutClear (SL_MX25_FLASH_SHUTDOWN_CS_PORT , SL_MX25_FLASH_SHUTDOWN_CS_PIN );
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+ }
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+
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+ void sl_wfx_host_spiflash_cs_deassert (void )
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+ {
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+ GPIO_PinOutSet (SL_MX25_FLASH_SHUTDOWN_CS_PORT , SL_MX25_FLASH_SHUTDOWN_CS_PIN );
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+ }
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+
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+ void sl_wfx_host_pre_bootloader_spi_transfer (void )
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+ {
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+ if (xSemaphoreTake (spi_sem_sync_hdl , portMAX_DELAY ) != pdTRUE )
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+ {
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+ return ;
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+ }
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+ bootloader_init ();
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+ sl_wfx_host_spiflash_cs_assert ();
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+ }
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+
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+ void sl_wfx_host_post_bootloader_spi_transfer (void )
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+ {
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+ bootloader_deinit ();
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+ GPIO -> USARTROUTE [0 ].ROUTEEN = 0 ;
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+ sl_wfx_host_spiflash_cs_deassert ();
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+ xSemaphoreGive (spi_sem_sync_hdl );
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+ }
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+
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+ void sl_wfx_host_pre_lcd_spi_transfer (void )
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+ {
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+ if (xSemaphoreTake (spi_sem_sync_hdl , portMAX_DELAY ) != pdTRUE )
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+ {
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+ return ;
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+ }
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+ SPIDRV_ReInit (SL_BIT_RATE_LCD );
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+ sl_memlcd_refresh (sl_memlcd_get ());
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+ }
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+
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+ void sl_wfx_host_post_lcd_spi_transfer (void )
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+ {
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+ USART_Enable (SL_MEMLCD_SPI_PERIPHERAL , usartDisable );
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+ CMU_ClockEnable (SPI_CLOCK (SL_MEMLCD_SPI_PERIPHERAL_NO ), false);
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+ GPIO -> USARTROUTE [SL_MEMLCD_SPI_PERIPHERAL_NO ].ROUTEEN = 0 ;
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+ xSemaphoreGive (spi_sem_sync_hdl );
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+ }
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+
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+ #endif /* EFR32MG24 */
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/*****************************************************************************
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*@brief
@@ -215,16 +257,6 @@ static void spi_dmaTransfertComplete(SPIDRV_HandleData_t * pxHandle, Ecode_t tra
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portYIELD_FROM_ISR (xHigherPriorityTaskWoken );
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}
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- #if defined(EFR32MG24 )
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- void rsi_update_spi (void )
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- {
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- spi_switch (EXP_HDR );
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- // GPIO_PinModeSet(SL_SPIDRV_EUSART_EXP_CS_PORT, SL_SPIDRV_EUSART_EXP_CS_PIN, gpioModePushPull, PINOUT_SET);
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- /* MG24 + rs9116 combination uses EUSART driver */
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- tx_dma_channel = sl_spidrv_eusart_exp_handle -> txDMACh ;
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- rx_dma_channel = sl_spidrv_eusart_exp_handle -> rxDMACh ;
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- }
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- #endif
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/*********************************************************************
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* @fn int16_t rsi_spi_transfer(uint8_t *tx_buf, uint8_t *rx_buf, uint16_t xlen, uint8_t mode)
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* @brief
@@ -239,19 +271,10 @@ void rsi_update_spi(void)
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int16_t rsi_spi_transfer (uint8_t * tx_buf , uint8_t * rx_buf , uint16_t xlen , uint8_t mode )
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{
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#if defined(EFR32MG24 )
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- /* In case of MG24, take multiplex synchronization semaphore to ensure SPI is
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- * available and then set CS of Exp Hdr SPI to low/enable */
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- if (xSemaphoreTake (spi_sem_sync_hdl , portMAX_DELAY ) != pdTRUE )
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- {
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- return SL_STATUS_TIMEOUT ;
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- }
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- if (pr_type != EXP_HDR )
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- {
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- rsi_update_spi ();
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- }
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- GPIO_PinOutClear (SL_SPIDRV_EUSART_EXP_CS_PORT , SL_SPIDRV_EUSART_EXP_CS_PIN );
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- #endif
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- if (xlen <= MIN_XLEN || (tx_buf == NULL && rx_buf == NULL )) // at least one buffer needs to be provided
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+ sl_wfx_host_spi_cs_assert ();
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+ #endif /* EFR32MG24 */
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+ // at least one buffer needs to be provided
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+ if (xlen <= MIN_XLEN || (tx_buf == NULL && rx_buf == NULL ))
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{
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return RSI_ERROR_INVALID_PARAM ;
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}
@@ -264,21 +287,22 @@ int16_t rsi_spi_transfer(uint8_t * tx_buf, uint8_t * rx_buf, uint16_t xlen, uint
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return RSI_ERROR_SPI_BUSY ;
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}
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- configASSERT (spiInitiatorTaskHandle == NULL ); // No other task should currently be waiting for the dma completion
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+ // No other task should currently be waiting for the dma completion
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+ configASSERT (spiInitiatorTaskHandle == NULL );
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spiInitiatorTaskHandle = xTaskGetCurrentTaskHandle ();
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Ecode_t spiError ;
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if (tx_buf == NULL ) // Rx operation only
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{
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- spiError = SPIDRV_MReceive (SPI_HANDLE , rx_buf , xlen , spi_dmaTransfertComplete );
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+ spiError = SPIDRV_MReceive (SL_SPIDRV_HANDLE , rx_buf , xlen , spi_dmaTransfertComplete );
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}
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else if (rx_buf == NULL ) // Tx operation only
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{
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- spiError = SPIDRV_MTransmit (SPI_HANDLE , tx_buf , xlen , spi_dmaTransfertComplete );
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+ spiError = SPIDRV_MTransmit (SL_SPIDRV_HANDLE , tx_buf , xlen , spi_dmaTransfertComplete );
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}
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else // Tx and Rx operation
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{
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- spiError = SPIDRV_MTransfer (SPI_HANDLE , tx_buf , rx_buf , xlen , spi_dmaTransfertComplete );
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+ spiError = SPIDRV_MTransfer (SL_SPIDRV_HANDLE , tx_buf , rx_buf , xlen , spi_dmaTransfertComplete );
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}
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if (spiError == ECODE_EMDRV_SPIDRV_OK )
@@ -290,11 +314,11 @@ int16_t rsi_spi_transfer(uint8_t * tx_buf, uint8_t * rx_buf, uint16_t xlen, uint
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{
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int itemsTransferred = 0 ;
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int itemsRemaining = 0 ;
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- SPIDRV_GetTransferStatus (SPI_HANDLE , & itemsTransferred , & itemsRemaining );
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+ SPIDRV_GetTransferStatus (SL_SPIDRV_HANDLE , & itemsTransferred , & itemsRemaining );
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SILABS_LOG ("SPI transfert timed out %d/%d (rx%x rx%x)" , itemsTransferred , itemsRemaining , (uint32_t ) tx_buf ,
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(uint32_t ) rx_buf );
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- SPIDRV_AbortTransfer (SPI_HANDLE );
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+ SPIDRV_AbortTransfer (SL_SPIDRV_HANDLE );
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rsiError = RSI_ERROR_SPI_TIMEOUT ;
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}
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}
@@ -307,9 +331,7 @@ int16_t rsi_spi_transfer(uint8_t * tx_buf, uint8_t * rx_buf, uint16_t xlen, uint
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xSemaphoreGive (spiTransferLock );
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#if defined(EFR32MG24 )
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- /* In case of MG24, set CS of Exp Hdr SPI to high and release multiplex synchronization semaphore*/
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- GPIO_PinOutSet (SL_SPIDRV_EUSART_EXP_CS_PORT , SL_SPIDRV_EUSART_EXP_CS_PIN );
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- xSemaphoreGive (spi_sem_sync_hdl );
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- #endif
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+ sl_wfx_host_spi_cs_deassert ();
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+ #endif /* EFR32MG24 */
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return rsiError ;
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}
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