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Adds intermediate changes with cleanup
1 parent da1eff3 commit 3a1fc92

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8 files changed

+289
-457
lines changed

8 files changed

+289
-457
lines changed

examples/platform/silabs/display/demo-ui.c

+6-6
Original file line numberDiff line numberDiff line change
@@ -109,11 +109,11 @@ void demoUIDisplayHeader(char * name)
109109
GLIB_drawStringOnLine(&glibContext, name, 5, GLIB_ALIGN_CENTER, 0, 0, true);
110110
}
111111
#if (defined(EFR32MG24) && defined(SL_WIFI))
112-
pre_lcd_spi_transfer();
112+
sl_wfx_host_pre_lcd_spi_transfer();
113113
#endif
114114
DMD_updateDisplay();
115115
#if (defined(EFR32MG24) && defined(SL_WIFI))
116-
post_lcd_spi_transfer();
116+
sl_wfx_host_post_lcd_spi_transfer();
117117
#endif
118118
}
119119

@@ -122,11 +122,11 @@ void demoUIDisplayApp(bool on)
122122
GLIB_drawBitmap(&glibContext, APP_X_POSITION, APP_Y_POSITION, APP_BITMAP_WIDTH, APP_BITMAP_HEIGHT,
123123
(on ? OnStateBitMap : OffStateBitMap));
124124
#if (defined(EFR32MG24) && defined(SL_WIFI))
125-
pre_lcd_spi_transfer();
125+
sl_wfx_host_pre_lcd_spi_transfer();
126126
#endif
127127
DMD_updateDisplay();
128128
#if (defined(EFR32MG24) && defined(SL_WIFI))
129-
post_lcd_spi_transfer();
129+
sl_wfx_host_post_lcd_spi_transfer();
130130
#endif
131131
}
132132

@@ -139,11 +139,11 @@ void demoUIDisplayProtocol(demoUIProtocol protocol, bool isConnected)
139139
(protocol == DEMO_UI_PROTOCOL1 ? (isConnected ? PROT1_BITMAP_CONN : PROT1_BITMAP)
140140
: (isConnected ? PROT2_BITMAP_CONN : PROT2_BITMAP)));
141141
#if (defined(EFR32MG24) && defined(SL_WIFI))
142-
pre_lcd_spi_transfer();
142+
sl_wfx_host_pre_lcd_spi_transfer();
143143
#endif
144144
DMD_updateDisplay();
145145
#if (defined(EFR32MG24) && defined(SL_WIFI))
146-
post_lcd_spi_transfer();
146+
sl_wfx_host_post_lcd_spi_transfer();
147147
#endif
148148
}
149149

examples/platform/silabs/display/lcd.cpp

+4-10
Original file line numberDiff line numberDiff line change
@@ -71,12 +71,6 @@ CHIP_ERROR SilabsLCD::Init(uint8_t * name, bool initialState)
7171
err = CHIP_ERROR_INTERNAL;
7272
}
7373

74-
#if (defined(EFR32MG24) && defined(RS911X_WIFI))
75-
if (pr_type != LCD)
76-
{
77-
pr_type = LCD;
78-
}
79-
#endif
8074
/* Initialize the DMD module for the DISPLAY device driver. */
8175
status = DMD_init(0);
8276
if (DMD_OK != status)
@@ -128,11 +122,11 @@ int SilabsLCD::Update(void)
128122
{
129123
int status;
130124
#if (defined(EFR32MG24) && defined(SL_WIFI))
131-
pre_lcd_spi_transfer();
125+
sl_wfx_host_pre_lcd_spi_transfer();
132126
#endif
133127
status = DMD_updateDisplay();
134128
#if (defined(EFR32MG24) && defined(SL_WIFI))
135-
post_lcd_spi_transfer();
129+
sl_wfx_host_post_lcd_spi_transfer();
136130
#endif
137131
/*
138132
* TO-DO; Above logic can be optimised by writing a common API
@@ -201,12 +195,12 @@ void SilabsLCD::WriteQRCode()
201195
}
202196
}
203197
#if (defined(EFR32MG24) && defined(SL_WIFI))
204-
pre_lcd_spi_transfer();
198+
sl_wfx_host_pre_lcd_spi_transfer();
205199
#endif
206200

207201
DMD_updateDisplay();
208202
#if (defined(EFR32MG24) && defined(SL_WIFI))
209-
post_lcd_spi_transfer();
203+
sl_wfx_host_post_lcd_spi_transfer();
210204
#endif
211205
}
212206

examples/platform/silabs/efr32/rs911x/hal/efx_spi.c

+82-60
Original file line numberDiff line numberDiff line change
@@ -36,8 +36,10 @@
3636
#endif
3737
#include "spidrv.h"
3838

39+
#include "btl_interface.h"
3940
#include "gpiointerrupt.h"
4041
#include "sl_device_init_clocks.h"
42+
#include "sl_memlcd.h"
4143
#include "sl_status.h"
4244

4345
#include "FreeRTOS.h"
@@ -56,29 +58,26 @@
5658
#include "sl_power_manager.h"
5759
#endif
5860

61+
#define CONCAT(A, B) (A##B)
62+
#define SPI_CLOCK(N) CONCAT(cmuClock_USART, N)
63+
64+
StaticSemaphore_t spi_sem_peripheral;
65+
SemaphoreHandle_t spi_sem_sync_hdl;
66+
5967
StaticSemaphore_t xEfxSpiIntfSemaBuffer;
6068
static SemaphoreHandle_t spiTransferLock;
6169
static TaskHandle_t spiInitiatorTaskHandle = NULL;
6270

6371
#if defined(EFR32MG12)
6472
#include "sl_spidrv_exp_config.h"
6573
extern SPIDRV_Handle_t sl_spidrv_exp_handle;
66-
#define SPI_HANDLE sl_spidrv_exp_handle
74+
#define SL_SPIDRV_HANDLE sl_spidrv_exp_handle
6775
#elif defined(EFR32MG24)
68-
#include "sl_spidrv_eusart_exp_config.h"
6976
#include "spi_multiplex.h"
70-
StaticSemaphore_t spi_sem_peripharal;
71-
SemaphoreHandle_t spi_sem_sync_hdl;
72-
peripheraltype_t pr_type = EXP_HDR;
73-
extern SPIDRV_Handle_t sl_spidrv_eusart_exp_handle;
74-
#define SPI_HANDLE sl_spidrv_eusart_exp_handle
7577
#else
7678
#error "Unknown platform"
7779
#endif
7880

79-
static unsigned int tx_dma_channel;
80-
static unsigned int rx_dma_channel;
81-
8281
extern void rsi_gpio_irq_cb(uint8_t irqnum);
8382
// #define RS911X_USE_LDMA
8483

@@ -152,9 +151,9 @@ void rsi_hal_board_init(void)
152151
xSemaphoreGive(spiTransferLock);
153152

154153
#if defined(EFR32MG24)
155-
spi_sem_sync_hdl = xSemaphoreCreateBinaryStatic(&spi_sem_peripharal);
154+
spi_sem_sync_hdl = xSemaphoreCreateBinaryStatic(&spi_sem_peripheral);
156155
xSemaphoreGive(spi_sem_sync_hdl);
157-
#endif
156+
#endif /* EFR32MG24 */
158157

159158
/* GPIO INIT of MG12 & MG24 : Reset, Wakeup, Interrupt */
160159
SILABS_LOG("RSI_HAL: init GPIO");
@@ -167,32 +166,75 @@ void rsi_hal_board_init(void)
167166
}
168167

169168
#if defined(EFR32MG24)
170-
/****************************************************************************
171-
* @fn sl_status_t sl_wfx_host_spi_cs_assert()
172-
* @brief
173-
* Assert chip select.
174-
* @param[in] None
175-
* @return returns SL_STATUS_OK
176-
*****************************************************************************/
177169
sl_status_t sl_wfx_host_spi_cs_assert()
178170
{
171+
configASSERT(spi_sem_sync_hdl);
172+
if (xSemaphoreTake(spi_sem_sync_hdl, portMAX_DELAY) != pdTRUE)
173+
{
174+
return SL_STATUS_TIMEOUT;
175+
}
176+
SPIDRV_DeInit(SL_SPIDRV_HANDLE);
177+
SPIDRV_Init(SL_SPIDRV_HANDLE, &sl_spidrv_eusart_init_exp);
179178
GPIO_PinOutClear(SL_SPIDRV_EUSART_EXP_CS_PORT, SL_SPIDRV_EUSART_EXP_CS_PIN);
180179
return SL_STATUS_OK;
181180
}
182181

183-
/****************************************************************************
184-
* @fn sl_status_t sl_wfx_host_spi_cs_deassert()
185-
* @brief
186-
* De-Assert chip select.
187-
* @param[in] None
188-
* @return returns SL_STATUS_OK
189-
*****************************************************************************/
190182
sl_status_t sl_wfx_host_spi_cs_deassert()
191183
{
192184
GPIO_PinOutSet(SL_SPIDRV_EUSART_EXP_CS_PORT, SL_SPIDRV_EUSART_EXP_CS_PIN);
185+
SPIDRV_DeInit(SL_SPIDRV_HANDLE);
186+
GPIO->EUSARTROUTE[SL_SPIDRV_EUSART_EXP_PERIPHERAL_NO].ROUTEEN = 0;
187+
xSemaphoreGive(spi_sem_sync_hdl);
193188
return SL_STATUS_OK;
194189
}
195-
#endif
190+
191+
void sl_wfx_host_spiflash_cs_assert(void)
192+
{
193+
GPIO_PinOutClear(SL_MX25_FLASH_SHUTDOWN_CS_PORT, SL_MX25_FLASH_SHUTDOWN_CS_PIN);
194+
}
195+
196+
void sl_wfx_host_spiflash_cs_deassert(void)
197+
{
198+
GPIO_PinOutSet(SL_MX25_FLASH_SHUTDOWN_CS_PORT, SL_MX25_FLASH_SHUTDOWN_CS_PIN);
199+
}
200+
201+
void sl_wfx_host_pre_bootloader_spi_transfer(void)
202+
{
203+
if (xSemaphoreTake(spi_sem_sync_hdl, portMAX_DELAY) != pdTRUE)
204+
{
205+
return;
206+
}
207+
bootloader_init();
208+
sl_wfx_host_spiflash_cs_assert();
209+
}
210+
211+
void sl_wfx_host_post_bootloader_spi_transfer(void)
212+
{
213+
bootloader_deinit();
214+
GPIO->USARTROUTE[0].ROUTEEN = 0;
215+
sl_wfx_host_spiflash_cs_deassert();
216+
xSemaphoreGive(spi_sem_sync_hdl);
217+
}
218+
219+
void sl_wfx_host_pre_lcd_spi_transfer(void)
220+
{
221+
if (xSemaphoreTake(spi_sem_sync_hdl, portMAX_DELAY) != pdTRUE)
222+
{
223+
return;
224+
}
225+
SPIDRV_ReInit(SL_BIT_RATE_LCD);
226+
sl_memlcd_refresh(sl_memlcd_get());
227+
}
228+
229+
void sl_wfx_host_post_lcd_spi_transfer(void)
230+
{
231+
USART_Enable(SL_MEMLCD_SPI_PERIPHERAL, usartDisable);
232+
CMU_ClockEnable(SPI_CLOCK(SL_MEMLCD_SPI_PERIPHERAL_NO), false);
233+
GPIO->USARTROUTE[SL_MEMLCD_SPI_PERIPHERAL_NO].ROUTEEN = 0;
234+
xSemaphoreGive(spi_sem_sync_hdl);
235+
}
236+
237+
#endif /* EFR32MG24 */
196238

197239
/*****************************************************************************
198240
*@brief
@@ -215,16 +257,6 @@ static void spi_dmaTransfertComplete(SPIDRV_HandleData_t * pxHandle, Ecode_t tra
215257
portYIELD_FROM_ISR(xHigherPriorityTaskWoken);
216258
}
217259

218-
#if defined(EFR32MG24)
219-
void rsi_update_spi(void)
220-
{
221-
spi_switch(EXP_HDR);
222-
// GPIO_PinModeSet(SL_SPIDRV_EUSART_EXP_CS_PORT, SL_SPIDRV_EUSART_EXP_CS_PIN, gpioModePushPull, PINOUT_SET);
223-
/* MG24 + rs9116 combination uses EUSART driver */
224-
tx_dma_channel = sl_spidrv_eusart_exp_handle->txDMACh;
225-
rx_dma_channel = sl_spidrv_eusart_exp_handle->rxDMACh;
226-
}
227-
#endif
228260
/*********************************************************************
229261
* @fn int16_t rsi_spi_transfer(uint8_t *tx_buf, uint8_t *rx_buf, uint16_t xlen, uint8_t mode)
230262
* @brief
@@ -239,19 +271,10 @@ void rsi_update_spi(void)
239271
int16_t rsi_spi_transfer(uint8_t * tx_buf, uint8_t * rx_buf, uint16_t xlen, uint8_t mode)
240272
{
241273
#if defined(EFR32MG24)
242-
/* In case of MG24, take multiplex synchronization semaphore to ensure SPI is
243-
* available and then set CS of Exp Hdr SPI to low/enable */
244-
if (xSemaphoreTake(spi_sem_sync_hdl, portMAX_DELAY) != pdTRUE)
245-
{
246-
return SL_STATUS_TIMEOUT;
247-
}
248-
if (pr_type != EXP_HDR)
249-
{
250-
rsi_update_spi();
251-
}
252-
GPIO_PinOutClear(SL_SPIDRV_EUSART_EXP_CS_PORT, SL_SPIDRV_EUSART_EXP_CS_PIN);
253-
#endif
254-
if (xlen <= MIN_XLEN || (tx_buf == NULL && rx_buf == NULL)) // at least one buffer needs to be provided
274+
sl_wfx_host_spi_cs_assert();
275+
#endif /* EFR32MG24 */
276+
// at least one buffer needs to be provided
277+
if (xlen <= MIN_XLEN || (tx_buf == NULL && rx_buf == NULL))
255278
{
256279
return RSI_ERROR_INVALID_PARAM;
257280
}
@@ -264,21 +287,22 @@ int16_t rsi_spi_transfer(uint8_t * tx_buf, uint8_t * rx_buf, uint16_t xlen, uint
264287
return RSI_ERROR_SPI_BUSY;
265288
}
266289

267-
configASSERT(spiInitiatorTaskHandle == NULL); // No other task should currently be waiting for the dma completion
290+
// No other task should currently be waiting for the dma completion
291+
configASSERT(spiInitiatorTaskHandle == NULL);
268292
spiInitiatorTaskHandle = xTaskGetCurrentTaskHandle();
269293

270294
Ecode_t spiError;
271295
if (tx_buf == NULL) // Rx operation only
272296
{
273-
spiError = SPIDRV_MReceive(SPI_HANDLE, rx_buf, xlen, spi_dmaTransfertComplete);
297+
spiError = SPIDRV_MReceive(SL_SPIDRV_HANDLE, rx_buf, xlen, spi_dmaTransfertComplete);
274298
}
275299
else if (rx_buf == NULL) // Tx operation only
276300
{
277-
spiError = SPIDRV_MTransmit(SPI_HANDLE, tx_buf, xlen, spi_dmaTransfertComplete);
301+
spiError = SPIDRV_MTransmit(SL_SPIDRV_HANDLE, tx_buf, xlen, spi_dmaTransfertComplete);
278302
}
279303
else // Tx and Rx operation
280304
{
281-
spiError = SPIDRV_MTransfer(SPI_HANDLE, tx_buf, rx_buf, xlen, spi_dmaTransfertComplete);
305+
spiError = SPIDRV_MTransfer(SL_SPIDRV_HANDLE, tx_buf, rx_buf, xlen, spi_dmaTransfertComplete);
282306
}
283307

284308
if (spiError == ECODE_EMDRV_SPIDRV_OK)
@@ -290,11 +314,11 @@ int16_t rsi_spi_transfer(uint8_t * tx_buf, uint8_t * rx_buf, uint16_t xlen, uint
290314
{
291315
int itemsTransferred = 0;
292316
int itemsRemaining = 0;
293-
SPIDRV_GetTransferStatus(SPI_HANDLE, &itemsTransferred, &itemsRemaining);
317+
SPIDRV_GetTransferStatus(SL_SPIDRV_HANDLE, &itemsTransferred, &itemsRemaining);
294318
SILABS_LOG("SPI transfert timed out %d/%d (rx%x rx%x)", itemsTransferred, itemsRemaining, (uint32_t) tx_buf,
295319
(uint32_t) rx_buf);
296320

297-
SPIDRV_AbortTransfer(SPI_HANDLE);
321+
SPIDRV_AbortTransfer(SL_SPIDRV_HANDLE);
298322
rsiError = RSI_ERROR_SPI_TIMEOUT;
299323
}
300324
}
@@ -307,9 +331,7 @@ int16_t rsi_spi_transfer(uint8_t * tx_buf, uint8_t * rx_buf, uint16_t xlen, uint
307331

308332
xSemaphoreGive(spiTransferLock);
309333
#if defined(EFR32MG24)
310-
/* In case of MG24, set CS of Exp Hdr SPI to high and release multiplex synchronization semaphore*/
311-
GPIO_PinOutSet(SL_SPIDRV_EUSART_EXP_CS_PORT, SL_SPIDRV_EUSART_EXP_CS_PIN);
312-
xSemaphoreGive(spi_sem_sync_hdl);
313-
#endif
334+
sl_wfx_host_spi_cs_deassert();
335+
#endif /* EFR32MG24 */
314336
return rsiError;
315337
}

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