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[RFC] SPI #118

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[RFC] SPI #118
DM777-ms wants to merge 10 commits into
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davmark/spi

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@DM777-ms DM777-ms commented Oct 16, 2024

RFC on SPI gpio implementation. Note two SPI gpio characteristics for the RT6x:

  1. SPI signals have multiple options for gpio pin mapping.
  2. Up to four chip selects per spi channel

Please take a look at the following lines in src/spi.rs and comment on viability:

  • lines 52 - 80, impl<'d, FC: Instance, M: Mode> Spi<'d, FC, M>
  • Pin implementations beginning at line 234

Two additional features that may need to be added are:

  1. SPI sometimes is implemented with a programmed chip select output, not driven by the hardware peripheral, but requiring software enablement. I expect the SselPin implementations would need to change to account for that.
  2. SPI -may- have any number of chip selects, 0 to n. To account for that, the new() apis would have to allow sseln: args to be "optional".

Comment thread src/spi.rs
};
}

/// Flexcomm0 SPI GPIO options -
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note how signals and pins may be optionally mapped to multiple locations ...

Comment thread src/spi.rs
impl<'d, FC: Instance, M: Mode> Spi<'d, FC, M> {
fn new_inner(
inner: impl Peripheral<P = FC> + 'd,
sclk: impl SckPin<FC> + 'd,
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This will need additional changes to account for 0 - 4 ssels enabled for an actual instantiation and usage in a firmware build.

@jerrysxie jerrysxie linked an issue Oct 17, 2024 that may be closed by this pull request
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@DM777-ms DM777-ms self-assigned this Oct 17, 2024
@DM777-ms DM777-ms mentioned this pull request Oct 22, 2024
@DM777-ms DM777-ms closed this Oct 22, 2024
@felipebalbi felipebalbi deleted the davmark/spi branch October 22, 2024 18:57
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RT685 - SPI (Master)

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