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ffbuild: Refine MIPS handling
To enable runtime detection for MIPS, we need to refine ffbuild part to support buildding these feature together. Firstly, we fixed configure, let it probe native ability of toolchain to decide wether a feature can to be enabled, also clearly marked the conflictions between loongson2 & loongson3 and Release 6 & rest. Secondly, we compile MMI and MSA C sources with their own flags to ensure their flags won't pollute the whole program and generate illegal code. Signed-off-by: Jiaxun Yang <[email protected]> Reviewed-by: Shiyou Yin <[email protected]> Signed-off-by: Michael Niedermayer <[email protected]>
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-76
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3 files changed

+109
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‎configure

+98-74
Original file line numberDiff line numberDiff line change
@@ -2554,7 +2554,7 @@ mips64r6_deps="mips"
25542554
mipsfpu_deps="mips"
25552555
mipsdsp_deps="mips"
25562556
mipsdspr2_deps="mips"
2557-
mmi_deps="mips"
2557+
mmi_deps_any="loongson2 loongson3"
25582558
msa_deps="mipsfpu"
25592559
msa2_deps="msa"
25602560

@@ -5005,8 +5005,6 @@ elif enabled bfin; then
50055005

50065006
elif enabled mips; then
50075007

5008-
cpuflags="-march=$cpu"
5009-
50105008
if [ "$cpu" != "generic" ]; then
50115009
disable mips32r2
50125010
disable mips32r5
@@ -5015,95 +5013,105 @@ elif enabled mips; then
50155013
disable mips64r6
50165014
disable loongson2
50175015
disable loongson3
5016+
disable mipsdsp
5017+
disable mipsdspr2
5018+
disable msa
5019+
disable mmi
5020+
5021+
cpuflags="-march=$cpu"
50185022

50195023
case $cpu in
5020-
24kc|24kf*|24kec|34kc|1004kc|24kef*|34kf*|1004kf*|74kc|74kf)
5024+
# General ISA levels
5025+
mips1|mips3)
5026+
;;
5027+
mips32r2)
5028+
enable msa
50215029
enable mips32r2
5022-
disable msa
50235030
;;
5024-
p5600|i6400|p6600)
5025-
disable mipsdsp
5026-
disable mipsdspr2
5031+
mips32r5)
5032+
enable msa
5033+
enable mips32r2
5034+
enable mips32r5
50275035
;;
5028-
loongson*)
5029-
enable loongson2
5036+
mips64r2|mips64r5)
5037+
enable msa
5038+
enable mmi
5039+
enable mips64r2
50305040
enable loongson3
5041+
;;
5042+
# Cores from MIPS(MTI)
5043+
24kc)
5044+
disable mipsfpu
5045+
enable mips32r2
5046+
;;
5047+
24kf*|24kec|34kc|74Kc|1004kc)
5048+
enable mips32r2
5049+
;;
5050+
24kef*|34kf*|1004kf*)
5051+
enable mipsdsp
5052+
enable mips32r2
5053+
;;
5054+
p5600)
5055+
enable msa
5056+
enable mips32r2
5057+
enable mips32r5
5058+
check_cflags "-mtune=p5600" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops"
5059+
;;
5060+
i6400)
5061+
enable mips64r6
5062+
check_cflags "-mtune=i6400 -mabi=64" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
5063+
;;
5064+
p6600)
5065+
enable mips64r6
5066+
check_cflags "-mtune=p6600 -mabi=64" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
5067+
;;
5068+
# Cores from Loongson
5069+
loongson2e|loongson2f|loongson3*)
5070+
enable mmi
50315071
enable local_aligned
50325072
enable simd_align_16
50335073
enable fast_64bit
50345074
enable fast_clz
50355075
enable fast_cmov
50365076
enable fast_unaligned
50375077
disable aligned_stack
5038-
disable mipsdsp
5039-
disable mipsdspr2
50405078
# When gcc version less than 5.3.0, add -fno-expensive-optimizations flag.
5041-
if [ $cc == gcc ]; then
5042-
gcc_version=$(gcc -dumpversion)
5043-
if [ "$(echo "$gcc_version 5.3.0" | tr " " "\n" | sort -rV | head -n 1)" == "$gcc_version" ]; then
5044-
expensive_optimization_flag=""
5045-
else
5079+
if test "$cc_type" = "gcc"; then
5080+
case $gcc_basever in
5081+
2|2.*|3.*|4.*|5.0|5.1|5.2)
50465082
expensive_optimization_flag="-fno-expensive-optimizations"
5047-
fi
5083+
;;
5084+
*)
5085+
expensive_optimization_flag=""
5086+
;;
5087+
esac
50485088
fi
5089+
50495090
case $cpu in
50505091
loongson3*)
5092+
enable loongson3
5093+
enable msa
50515094
cpuflags="-march=loongson3a -mhard-float $expensive_optimization_flag"
50525095
;;
50535096
loongson2e)
5097+
enable loongson2
50545098
cpuflags="-march=loongson2e -mhard-float $expensive_optimization_flag"
50555099
;;
50565100
loongson2f)
5101+
enable loongson2
50575102
cpuflags="-march=loongson2f -mhard-float $expensive_optimization_flag"
50585103
;;
50595104
esac
50605105
;;
50615106
*)
5062-
# Unknown CPU. Disable everything.
5063-
warn "unknown CPU. Disabling all MIPS optimizations."
5064-
disable mipsfpu
5065-
disable mipsdsp
5066-
disable mipsdspr2
5067-
disable msa
5068-
disable mmi
5107+
warn "unknown MIPS CPU"
50695108
;;
50705109
esac
50715110

5072-
case $cpu in
5073-
24kc)
5074-
disable mipsfpu
5075-
disable mipsdsp
5076-
disable mipsdspr2
5077-
;;
5078-
24kf*)
5079-
disable mipsdsp
5080-
disable mipsdspr2
5081-
;;
5082-
24kec|34kc|1004kc)
5083-
disable mipsfpu
5084-
disable mipsdspr2
5085-
;;
5086-
24kef*|34kf*|1004kf*)
5087-
disable mipsdspr2
5088-
;;
5089-
74kc)
5090-
disable mipsfpu
5091-
;;
5092-
p5600)
5093-
enable mips32r5
5094-
check_cflags "-mtune=p5600" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops"
5095-
;;
5096-
i6400)
5097-
enable mips64r6
5098-
check_cflags "-mtune=i6400 -mabi=64" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
5099-
;;
5100-
p6600)
5101-
enable mips64r6
5102-
check_cflags "-mtune=p6600 -mabi=64" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64"
5103-
;;
5104-
esac
51055111
else
5106-
# We do not disable anything. Is up to the user to disable the unwanted features.
5112+
disable mipsdsp
5113+
disable mipsdspr2
5114+
# Disable DSP stuff for generic CPU, it can't be detected at runtime.
51075115
warn 'generic cpu selected'
51085116
fi
51095117

@@ -5850,28 +5858,42 @@ EOF
58505858

58515859
elif enabled mips; then
58525860

5853-
enabled loongson2 && check_inline_asm loongson2 '"dmult.g $8, $9, $10"'
5854-
enabled loongson3 && check_inline_asm loongson3 '"gsldxc1 $f0, 0($2, $3)"'
5855-
enabled mmi && check_inline_asm mmi '"punpcklhw $f0, $f0, $f0"'
5856-
5857-
# Enable minimum ISA based on selected options
5861+
# Check toolchain ISA level
58585862
if enabled mips64; then
5859-
enabled mips64r6 && check_inline_asm_flags mips64r6 '"dlsa $0, $0, $0, 1"' '-mips64r6'
5860-
enabled mips64r2 && check_inline_asm_flags mips64r2 '"dext $0, $0, 0, 1"' '-mips64r2'
5861-
disabled mips64r6 && disabled mips64r2 && check_inline_asm_flags mips64r1 '"daddi $0, $0, 0"' '-mips64'
5863+
enabled mips64r6 && check_inline_asm mips64r6 '"dlsa $0, $0, $0, 1"' &&
5864+
disable mips64r2
5865+
5866+
enabled mips64r2 && check_inline_asm mips64r2 '"dext $0, $0, 0, 1"'
5867+
5868+
disable mips32r6 && disable mips32r5 && disable mips32r2
58625869
else
5863-
enabled mips32r6 && check_inline_asm_flags mips32r6 '"aui $0, $0, 0"' '-mips32r6'
5864-
enabled mips32r5 && check_inline_asm_flags mips32r5 '"eretnc"' '-mips32r5'
5865-
enabled mips32r2 && check_inline_asm_flags mips32r2 '"ext $0, $0, 0, 1"' '-mips32r2'
5866-
disabled mips32r6 && disabled mips32r5 && disabled mips32r2 && check_inline_asm_flags mips32r1 '"addi $0, $0, 0"' '-mips32'
5870+
enabled mips32r6 && check_inline_asm mips32r6 '"aui $0, $0, 0"' &&
5871+
disable mips32r5 && disable mips32r2
5872+
5873+
enabled mips32r5 && check_inline_asm mips32r5 '"eretnc"'
5874+
enabled mips32r2 && check_inline_asm mips32r2 '"ext $0, $0, 0, 1"'
5875+
5876+
disable mips64r6 && disable mips64r5 && disable mips64r2
58675877
fi
58685878

5869-
enabled mipsfpu && check_inline_asm_flags mipsfpu '"cvt.d.l $f0, $f2"' '-mhard-float'
5879+
enabled mipsfpu && check_inline_asm mipsfpu '"cvt.d.l $f0, $f2"'
58705880
enabled mipsfpu && (enabled mips32r5 || enabled mips32r6 || enabled mips64r6) && check_inline_asm_flags mipsfpu '"cvt.d.l $f0, $f1"' '-mfp64'
5871-
enabled mipsfpu && enabled msa && check_inline_asm_flags msa '"addvi.b $w0, $w1, 1"' '-mmsa' && check_headers msa.h || disable msa
5881+
58725882
enabled mipsdsp && check_inline_asm_flags mipsdsp '"addu.qb $t0, $t1, $t2"' '-mdsp'
58735883
enabled mipsdspr2 && check_inline_asm_flags mipsdspr2 '"absq_s.qb $t0, $t1"' '-mdspr2'
5874-
enabled msa && enabled msa2 && check_inline_asm_flags msa2 '"nxbits.any.b $w0, $w0"' '-mmsa2' && check_headers msa2.h || disable msa2
5884+
5885+
# MSA and MSA2 can be detected at runtime so we supply extra flags here
5886+
enabled mipsfpu && enabled msa && check_inline_asm msa '"addvi.b $w0, $w1, 1"' '-mmsa' && append MSAFLAGS '-mmsa'
5887+
enabled msa && enabled msa2 && check_inline_asm msa2 '"nxbits.any.b $w0, $w0"' '-mmsa2' && append MSAFLAGS '-mmsa2'
5888+
5889+
# loongson2 have no switch cflag so we can only probe toolchain ability
5890+
enabled loongson2 && check_inline_asm loongson2 '"dmult.g $8, $9, $10"' && disable loongson3
5891+
5892+
# loongson3 is paired with MMI
5893+
enabled loongson3 && check_inline_asm loongson3 '"gsldxc1 $f0, 0($2, $3)"' '-mloongson-ext' && append MMIFLAGS '-mloongson-ext'
5894+
5895+
# MMI can be detected at runtime too
5896+
enabled mmi && check_inline_asm mmi '"punpcklhw $f0, $f0, $f0"' '-mloongson-mmi' && append MMIFLAGS '-mloongson-mmi'
58755897

58765898
if enabled bigendian && enabled msa; then
58775899
disable msa
@@ -7447,6 +7469,8 @@ LDSOFLAGS=$LDSOFLAGS
74477469
SHFLAGS=$(echo $($ldflags_filter $SHFLAGS))
74487470
ASMSTRIPFLAGS=$ASMSTRIPFLAGS
74497471
X86ASMFLAGS=$X86ASMFLAGS
7472+
MSAFLAGS=$MSAFLAGS
7473+
MMIFLAGS=$MMIFLAGS
74507474
BUILDSUF=$build_suffix
74517475
PROGSSUF=$progs_suffix
74527476
FULLNAME=$FULLNAME

‎ffbuild/common.mak

+9-1
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ LDFLAGS := $(ALLFFLIBS:%=$(LD_PATH)lib%) $(LDFLAGS)
4444

4545
define COMPILE
4646
$(call $(1)DEP,$(1))
47-
$($(1)) $($(1)FLAGS) $($(1)_DEPFLAGS) $($(1)_C) $($(1)_O) $(patsubst $(SRC_PATH)/%,$(SRC_LINK)/%,$<)
47+
$($(1)) $($(1)FLAGS) $($(2)) $($(1)_DEPFLAGS) $($(1)_C) $($(1)_O) $(patsubst $(SRC_PATH)/%,$(SRC_LINK)/%,$<)
4848
endef
4949

5050
COMPILE_C = $(call COMPILE,CC)
@@ -54,6 +54,14 @@ COMPILE_M = $(call COMPILE,OBJCC)
5454
COMPILE_X86ASM = $(call COMPILE,X86ASM)
5555
COMPILE_HOSTC = $(call COMPILE,HOSTCC)
5656
COMPILE_NVCC = $(call COMPILE,NVCC)
57+
COMPILE_MMI = $(call COMPILE,CC,MMIFLAGS)
58+
COMPILE_MSA = $(call COMPILE,CC,MSAFLAGS)
59+
60+
%_mmi.o: %_mmi.c
61+
$(COMPILE_MMI)
62+
63+
%_msa.o: %_msa.c
64+
$(COMPILE_MSA)
5765

5866
%.o: %.c
5967
$(COMPILE_C)

‎libavcodec/mips/Makefile

+2-1
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,8 @@ MSA-OBJS-$(CONFIG_IDCTDSP) += mips/idctdsp_msa.o \
7171
MSA-OBJS-$(CONFIG_MPEGVIDEO) += mips/mpegvideo_msa.o
7272
MSA-OBJS-$(CONFIG_MPEGVIDEOENC) += mips/mpegvideoencdsp_msa.o
7373
MSA-OBJS-$(CONFIG_ME_CMP) += mips/me_cmp_msa.o
74+
MSA-OBJS-$(CONFIG_VC1_DECODER) += mips/vc1dsp_msa.o
75+
7476
MMI-OBJS += mips/constants.o
7577
MMI-OBJS-$(CONFIG_H264DSP) += mips/h264dsp_mmi.o
7678
MMI-OBJS-$(CONFIG_H264CHROMA) += mips/h264chroma_mmi.o
@@ -89,4 +91,3 @@ MMI-OBJS-$(CONFIG_WMV2DSP) += mips/wmv2dsp_mmi.o
8991
MMI-OBJS-$(CONFIG_HEVC_DECODER) += mips/hevcdsp_mmi.o
9092
MMI-OBJS-$(CONFIG_VP3DSP) += mips/vp3dsp_idct_mmi.o
9193
MMI-OBJS-$(CONFIG_VP9_DECODER) += mips/vp9_mc_mmi.o
92-
MSA-OBJS-$(CONFIG_VC1_DECODER) += mips/vc1dsp_msa.o

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