From 8d2fb7ee044d4454a81940af54c8bc63344d1dcb Mon Sep 17 00:00:00 2001 From: Usha Gupta Date: Wed, 1 Jun 2022 13:51:11 +0000 Subject: [PATCH 1/3] Enable header stack dynamic index elimination --- backends/dpdk/midend.cpp | 2 + backends/p4test/CMakeLists.txt | 3 + .../p4_16_samples/pna-example-varIndex-1.p4 | 140 ++++++++++++ .../p4_16_samples/pna-example-varIndex-2.p4 | 155 +++++++++++++ .../p4_16_samples/pna-example-varIndex.p4 | 145 ++++++++++++ testdata/p4_16_samples/psa-variable-index.p4 | 157 +++++++++++++ .../pna-example-varIndex-1-first.p4 | 89 ++++++++ .../pna-example-varIndex-1-frontend.p4 | 86 +++++++ .../pna-example-varIndex-1-midend.p4 | 159 +++++++++++++ .../pna-example-varIndex-1.p4 | 89 ++++++++ .../pna-example-varIndex-1.p4-error | 0 .../pna-example-varIndex-1.p4-stderr | 0 .../pna-example-varIndex-1.p4.bfrt.json | 41 ++++ .../pna-example-varIndex-1.p4.spec | 175 ++++++++++++++ .../pna-example-varIndex-2.p4-error | 0 .../pna-example-varIndex-2.p4.bfrt.json | 76 +++++++ .../pna-example-varIndex-2.p4.spec | 151 +++++++++++++ .../pna-example-varIndex-first.p4 | 94 ++++++++ .../pna-example-varIndex-frontend.p4 | 91 ++++++++ .../pna-example-varIndex-midend.p4 | 153 +++++++++++++ .../pna-example-varIndex.p4 | 94 ++++++++ .../pna-example-varIndex.p4-error | 0 .../pna-example-varIndex.p4-stderr | 0 .../pna-example-varIndex.p4.bfrt.json | 41 ++++ .../pna-example-varIndex.p4.spec | 191 ++++++++++++++++ .../psa-variable-index-first.p4 | 127 +++++++++++ .../psa-variable-index-frontend.p4 | 129 +++++++++++ .../psa-variable-index-midend.p4 | 213 ++++++++++++++++++ .../psa-variable-index.p4 | 124 ++++++++++ .../psa-variable-index.p4-error | 0 .../psa-variable-index.p4-stderr | 0 .../psa-variable-index.p4.bfrt.json | 41 ++++ .../psa-variable-index.p4.entries.txt | 0 .../psa-variable-index.p4.p4info.txt | 30 +++ .../psa-variable-index.p4.spec | 129 +++++++++++ 35 files changed, 2925 insertions(+) create mode 100644 testdata/p4_16_samples/pna-example-varIndex-1.p4 create mode 100644 testdata/p4_16_samples/pna-example-varIndex-2.p4 create mode 100644 testdata/p4_16_samples/pna-example-varIndex.p4 create mode 100644 testdata/p4_16_samples/psa-variable-index.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-1-first.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-1-frontend.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-1-midend.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4-error create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4-stderr create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.bfrt.json create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.spec create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4-error create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4.bfrt.json create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4.spec create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-first.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-frontend.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-midend.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex.p4-error create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex.p4-stderr create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex.p4.bfrt.json create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex.p4.spec create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index-first.p4 create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index-frontend.p4 create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index-midend.p4 create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index.p4 create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index.p4-error create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index.p4-stderr create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index.p4.bfrt.json create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index.p4.entries.txt create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index.p4.p4info.txt create mode 100644 testdata/p4_16_samples_outputs/psa-variable-index.p4.spec diff --git a/backends/dpdk/midend.cpp b/backends/dpdk/midend.cpp index 11d23c16ef..017616104e 100644 --- a/backends/dpdk/midend.cpp +++ b/backends/dpdk/midend.cpp @@ -44,6 +44,7 @@ limitations under the License. #include "midend/fillEnumMap.h" #include "midend/flattenHeaders.h" #include "midend/flattenInterfaceStructs.h" +#include "midend/hsIndexSimplify.h" #include "midend/local_copyprop.h" #include "midend/midEndLast.h" #include "midend/nestedStructs.h" @@ -205,6 +206,7 @@ DpdkMidEnd::DpdkMidEnd(CompilerOptions &options, new P4::FlattenHeaders(&refMap, &typeMap), new P4::FlattenInterfaceStructs(&refMap, &typeMap), new P4::SimplifyControlFlow(&refMap, &typeMap), + new P4::HSIndexSimplifier(&refMap, &typeMap), new P4::ParsersUnroll(true, &refMap, &typeMap), new P4::ReplaceSelectRange(&refMap, &typeMap), // DPDK architecture does not currently support predicated instructions diff --git a/backends/p4test/CMakeLists.txt b/backends/p4test/CMakeLists.txt index 41d2a0f1b1..dc64df2202 100644 --- a/backends/p4test/CMakeLists.txt +++ b/backends/p4test/CMakeLists.txt @@ -110,6 +110,9 @@ set (P4_XFAIL_TESTS # arguments and with incorrect number of arguments testdata/p4_16_samples/pna-example-mirror-packet-error2.p4 testdata/p4_16_samples/pna-example-mirror-packet-error3.p4 + # This test fails with type error but is a valid switch expression having + # dynamic index for accessing header stack element + testdata/p4_16_samples/pna-example-varIndex-2.p4 ) # we invoke p4c with --p4runtime-files even for programs in p4_16_errors. This # enables us to use p4_16_errors even for programs which pass compilation but diff --git a/testdata/p4_16_samples/pna-example-varIndex-1.p4 b/testdata/p4_16_samples/pna-example-varIndex-1.p4 new file mode 100644 index 0000000000..a653b14a23 --- /dev/null +++ b/testdata/p4_16_samples/pna-example-varIndex-1.p4 @@ -0,0 +1,140 @@ +/* +Copyright 2022 Intel Corporation + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +*/ + +#include +#include "pna.p4" + +#define MAX_LAYERS 2 +typedef bit<48> EthernetAddress; + +enum bit<16> ether_type_t { + TPID = 0x8100, + IPV4 = 0x0800, + IPV6 = 0x86DD +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[MAX_LAYERS] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl( + in headers_t hdrs, + inout main_metadata_t meta, + in pna_pre_input_metadata_t istd, + inout pna_pre_output_metadata_t ostd) +{ + apply { + } +} + +parser MainParserImpl( + packet_in pkt, + out headers_t hdrs, + inout main_metadata_t meta, + in pna_main_parser_input_metadata_t istd) +{ + state start { + meta.depth = MAX_LAYERS - 1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID : parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth - 1; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID : parse_vlan_tag; + default: accept; + } + } + +} + +control MainControlImpl( + inout headers_t hdrs, // from main parser + inout main_metadata_t meta, // from main parser, to "next block" + in pna_main_input_metadata_t istd, + inout pna_main_output_metadata_t ostd) +{ + action execute() { + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[meta.depth-1].vid; + } + action execute_1() { + drop_packet(); + } + + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid : exact; + } + + actions = { + execute; + } + const default_action = execute; + size=1000000; + } + + apply { + stub.apply(); + } +} + +control MainDeparserImpl( + packet_out pkt, + in headers_t hdr, // from main control + in main_metadata_t user_meta, // from main control + in pna_main_output_metadata_t ostd) +{ + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +// BEGIN:Package_Instantiation_Example +PNA_NIC( + MainParserImpl(), + PreControlImpl(), + MainControlImpl(), + MainDeparserImpl() + // Hoping to make this optional parameter later, but not supported + // by p4c yet. + //, PreParserImpl() + ) main; +// END:Package_Instantiation_Example diff --git a/testdata/p4_16_samples/pna-example-varIndex-2.p4 b/testdata/p4_16_samples/pna-example-varIndex-2.p4 new file mode 100644 index 0000000000..181355da57 --- /dev/null +++ b/testdata/p4_16_samples/pna-example-varIndex-2.p4 @@ -0,0 +1,155 @@ +/* +Copyright 2022 Intel Corporation + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +*/ + +#include +#include "pna.p4" + +#define MAX_LAYERS 2 +typedef bit<48> EthernetAddress; + +enum bit<16> ether_type_t { + TPID = 0x8100, + IPV4 = 0x0800, + IPV6 = 0x86DD +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[MAX_LAYERS] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl( + in headers_t hdrs, + inout main_metadata_t meta, + in pna_pre_input_metadata_t istd, + inout pna_pre_output_metadata_t ostd) +{ + apply { + } +} + +parser MainParserImpl( + packet_in pkt, + out headers_t hdrs, + inout main_metadata_t meta, + in pna_main_parser_input_metadata_t istd) +{ + state start { + meta.depth = MAX_LAYERS - 1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID : parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth - 1; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID : parse_vlan_tag; + default: accept; + } + } + +} + +control MainControlImpl( + inout headers_t hdrs, // from main parser + inout main_metadata_t meta, // from main parser, to "next block" + in pna_main_input_metadata_t istd, + inout pna_main_output_metadata_t ostd) +{ + action execute() { + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[0].vid; + } + action execute_1() { + drop_packet(); + } + + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid : exact; + } + + actions = { + execute; + } + const default_action = execute; + size=1000000; + } + + table stub1 { + key = { + hdrs.ethernet.etherType : exact; + } + + actions = { + execute_1; + } + const default_action = execute_1; + size=1000000; + } + + apply { + switch (hdrs.vlan_tag[meta.depth].vid) { + 12w1: { stub.apply();} + 12w2: { stub1.apply();} + } + } +} + +control MainDeparserImpl( + packet_out pkt, + in headers_t hdr, // from main control + in main_metadata_t user_meta, // from main control + in pna_main_output_metadata_t ostd) +{ + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +// BEGIN:Package_Instantiation_Example +PNA_NIC( + MainParserImpl(), + PreControlImpl(), + MainControlImpl(), + MainDeparserImpl() + // Hoping to make this optional parameter later, but not supported + // by p4c yet. + //, PreParserImpl() + ) main; +// END:Package_Instantiation_Example diff --git a/testdata/p4_16_samples/pna-example-varIndex.p4 b/testdata/p4_16_samples/pna-example-varIndex.p4 new file mode 100644 index 0000000000..a45fb544a6 --- /dev/null +++ b/testdata/p4_16_samples/pna-example-varIndex.p4 @@ -0,0 +1,145 @@ +/* +Copyright 2022 Intel Corporation + +Licensed under the Apache License, Version 2.0 (the "License"); +you may not use this file except in compliance with the License. +You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + +Unless required by applicable law or agreed to in writing, software +distributed under the License is distributed on an "AS IS" BASIS, +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +See the License for the specific language governing permissions and +limitations under the License. +*/ + +#include +#include "pna.p4" + +#define MAX_LAYERS 2 +typedef bit<48> EthernetAddress; + +enum bit<16> ether_type_t { + TPID = 0x8100, + IPV4 = 0x0800, + IPV6 = 0x86DD +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[MAX_LAYERS] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl( + in headers_t hdrs, + inout main_metadata_t meta, + in pna_pre_input_metadata_t istd, + inout pna_pre_output_metadata_t ostd) +{ + apply { + } +} + +parser MainParserImpl( + packet_in pkt, + out headers_t hdrs, + inout main_metadata_t meta, + in pna_main_parser_input_metadata_t istd) +{ + state start { + meta.depth = MAX_LAYERS - 1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID : parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth - 1; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID : parse_vlan_tag; + default: accept; + } + } + +} + +control MainControlImpl( + inout headers_t hdrs, // from main parser + inout main_metadata_t meta, // from main parser, to "next block" + in pna_main_input_metadata_t istd, + inout pna_main_output_metadata_t ostd) +{ + action execute() { + meta.ethType = hdrs.vlan_tag[meta.depth - 1].ether_type; + hdrs.vlan_tag[meta.depth - 1].ether_type = (ether_type_t)16w2; + hdrs.vlan_tag[meta.depth].vid = (bit<12>)hdrs.vlan_tag[meta.depth].cfi; + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[1].vid; + } + + action execute_1() { + drop_packet(); + } + + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid : exact; + } + + actions = { + execute; + } + const default_action = execute; + size=10000; + } + + apply { + if (hdrs.vlan_tag[meta.depth].ether_type == hdrs.ethernet.etherType) + stub.apply(); + } +} + +control MainDeparserImpl( + packet_out pkt, + in headers_t hdr, // from main control + in main_metadata_t user_meta, // from main control + in pna_main_output_metadata_t ostd) +{ + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +// BEGIN:Package_Instantiation_Example +PNA_NIC( + MainParserImpl(), + PreControlImpl(), + MainControlImpl(), + MainDeparserImpl() + // Hoping to make this optional parameter later, but not supported + // by p4c yet. + //, PreParserImpl() + ) main; +// END:Package_Instantiation_Example diff --git a/testdata/p4_16_samples/psa-variable-index.p4 b/testdata/p4_16_samples/psa-variable-index.p4 new file mode 100644 index 0000000000..0316f27b8a --- /dev/null +++ b/testdata/p4_16_samples/psa-variable-index.p4 @@ -0,0 +1,157 @@ + +#include +#include + +#define MAX_LAYERS 2 + +header EMPTY_H {}; +struct EMPTY_M { + bit<2> depth; + bit<16> ret; +}; +struct EMPTY_RESUB {}; +struct EMPTY_CLONE {}; +struct EMPTY_BRIDGE {}; +struct EMPTY_RECIRC {}; + +typedef bit<48> EthernetAddress; + +enum bit<16> ether_type_t { + TPID = 0x8100, + IPV4 = 0x0800, + IPV6 = 0x86DD +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct header_t { + ethernet_t ethernet; + vlan_tag_h[MAX_LAYERS] vlan_tag; +} + +parser MyIP( + packet_in buffer, + out header_t h, + inout EMPTY_M b, + in psa_ingress_parser_input_metadata_t c, + in EMPTY_RESUB d, + in EMPTY_RECIRC e) { + + state start { + b.depth = MAX_LAYERS - 1; + buffer.extract(h.ethernet); + transition select(h.ethernet.etherType) { + ether_type_t.TPID : parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + buffer.extract(h.vlan_tag.next); + b.depth = b.depth - 1; + transition select(h.vlan_tag.last.ether_type) { + ether_type_t.TPID : parse_vlan_tag; + default: accept; + } + } + +} + +parser MyEP( + packet_in buffer, + out EMPTY_H a, + inout EMPTY_M b, + in psa_egress_parser_input_metadata_t c, + in EMPTY_BRIDGE d, + in EMPTY_CLONE e, + in EMPTY_CLONE f) { + state start { + transition accept; + } +} + +bit<16> func(in bit<12> vid) { + return (bit<16>)vid + 16w5; +} + +control MyIC( + inout header_t a, + inout EMPTY_M b, + in psa_ingress_input_metadata_t c, + inout psa_ingress_output_metadata_t d) { + action forward() { + b.ret = (bit<16>) a.vlan_tag[b.depth].ether_type[11:8]; + if (b.ret == 16w2) + d.egress_port = (PortId_t)2; + } + + table tbl { + key = { + a.ethernet.srcAddr : exact; + } + actions = { + NoAction; + } + } + + apply { + b.ret = (bit <16>)a.vlan_tag[b.depth].vid; + if (!a.ethernet.isValid()) { + b.ret = func(a.vlan_tag[b.depth].vid); + tbl.apply(); + } + } +} + +control MyEC( + inout EMPTY_H a, + inout EMPTY_M b, + in psa_egress_input_metadata_t c, + inout psa_egress_output_metadata_t d) { + apply { } +} + +control MyID( + packet_out buffer, + out EMPTY_CLONE a, + out EMPTY_RESUB b, + out EMPTY_BRIDGE c, + inout header_t d, + in EMPTY_M e, + in psa_ingress_output_metadata_t f) { + apply { + buffer.emit(d.ethernet); + buffer.emit(d.vlan_tag[0]); + buffer.emit(d.vlan_tag[1]); + } +} + +control MyED( + packet_out buffer, + out EMPTY_CLONE a, + out EMPTY_RECIRC b, + inout EMPTY_H c, + in EMPTY_M d, + in psa_egress_output_metadata_t e, + in psa_egress_deparser_input_metadata_t f) { + apply { } +} + +IngressPipeline(MyIP(), MyIC(), MyID()) ip; +EgressPipeline(MyEP(), MyEC(), MyED()) ep; + +PSA_Switch( + ip, + PacketReplicationEngine(), + ep, + BufferingQueueingEngine()) main; diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1-first.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-1-first.p4 new file mode 100644 index 0000000000..2d0a064b4a --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-1-first.p4 @@ -0,0 +1,89 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 16w0x8100, + IPV4 = 16w0x800, + IPV6 = 16w0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + action execute() { + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[meta.depth + 2w3].vid; + } + action execute_1() { + drop_packet(); + } + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute(); + } + const default_action = execute(); + size = 1000000; + } + apply { + stub.apply(); + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1-frontend.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-1-frontend.p4 new file mode 100644 index 0000000000..2755b1df35 --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-1-frontend.p4 @@ -0,0 +1,86 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 16w0x8100, + IPV4 = 16w0x800, + IPV6 = 16w0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + @name("MainControlImpl.execute") action execute_1() { + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[meta.depth + 2w3].vid; + } + @name("MainControlImpl.stub") table stub_0 { + key = { + hdrs.vlan_tag[meta.depth].vid: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute_1(); + } + const default_action = execute_1(); + size = 1000000; + } + apply { + stub_0.apply(); + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1-midend.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-1-midend.p4 new file mode 100644 index 0000000000..9dee1f765e --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-1-midend.p4 @@ -0,0 +1,159 @@ +#include +#include + +typedef bit<48> EthernetAddress; +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + bit<16> ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + 16w0x8100: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + 16w0x8100: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + bit<2> hsiVar; + bit<2> hsiVar_0; + bit<12> hsVar; + bit<2> hsiVar_1; + bit<2> hsiVar_2; + bit<12> hsVar_0; + @name("MainControlImpl.execute") action execute_1() { + hsiVar_1 = meta.depth; + if (hsiVar_1 == 2w0) { + hsiVar_2 = meta.depth + 2w3; + if (hsiVar_2 == 2w0) { + hdrs.vlan_tag[2w0].vid = hdrs.vlan_tag[2w0].vid; + } else if (hsiVar_2 == 2w1) { + hdrs.vlan_tag[2w0].vid = hdrs.vlan_tag[2w1].vid; + } else if (hsiVar_2 >= 2w1) { + hdrs.vlan_tag[2w0].vid = hsVar_0; + } + } else if (hsiVar_1 == 2w1) { + hsiVar_2 = meta.depth + 2w3; + if (hsiVar_2 == 2w0) { + hdrs.vlan_tag[2w1].vid = hdrs.vlan_tag[2w0].vid; + } else if (hsiVar_2 == 2w1) { + hdrs.vlan_tag[2w1].vid = hdrs.vlan_tag[2w1].vid; + } else if (hsiVar_2 >= 2w1) { + hdrs.vlan_tag[2w1].vid = hsVar_0; + } + } + } + bit<12> key_0; + @name("MainControlImpl.stub") table stub_0 { + key = { + key_0: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute_1(); + } + const default_action = execute_1(); + size = 1000000; + } + @hidden action pnaexamplevarIndex1l102() { + key_0 = hdrs.vlan_tag[2w0].vid; + } + @hidden action pnaexamplevarIndex1l102_0() { + key_0 = hdrs.vlan_tag[2w1].vid; + } + @hidden action pnaexamplevarIndex1l102_1() { + key_0 = hsVar; + } + @hidden action pnaexamplevarIndex1l102_2() { + hsiVar_0 = meta.depth; + } + @hidden table tbl_pnaexamplevarIndex1l102 { + actions = { + pnaexamplevarIndex1l102_2(); + } + const default_action = pnaexamplevarIndex1l102_2(); + } + @hidden table tbl_pnaexamplevarIndex1l102_0 { + actions = { + pnaexamplevarIndex1l102(); + } + const default_action = pnaexamplevarIndex1l102(); + } + @hidden table tbl_pnaexamplevarIndex1l102_1 { + actions = { + pnaexamplevarIndex1l102_0(); + } + const default_action = pnaexamplevarIndex1l102_0(); + } + @hidden table tbl_pnaexamplevarIndex1l102_2 { + actions = { + pnaexamplevarIndex1l102_1(); + } + const default_action = pnaexamplevarIndex1l102_1(); + } + apply { + tbl_pnaexamplevarIndex1l102.apply(); + if (hsiVar_0 == 2w0) { + tbl_pnaexamplevarIndex1l102_0.apply(); + } else if (hsiVar_0 == 2w1) { + tbl_pnaexamplevarIndex1l102_1.apply(); + } else if (hsiVar_0 >= 2w1) { + tbl_pnaexamplevarIndex1l102_2.apply(); + } + stub_0.apply(); + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + @hidden action pnaexamplevarIndex1l124() { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } + @hidden table tbl_pnaexamplevarIndex1l124 { + actions = { + pnaexamplevarIndex1l124(); + } + const default_action = pnaexamplevarIndex1l124(); + } + apply { + tbl_pnaexamplevarIndex1l124.apply(); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4 new file mode 100644 index 0000000000..4f3550d591 --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4 @@ -0,0 +1,89 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 0x8100, + IPV4 = 0x800, + IPV6 = 0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2 - 1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth - 1; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + action execute() { + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[meta.depth - 1].vid; + } + action execute_1() { + drop_packet(); + } + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid: exact; + } + actions = { + execute; + } + const default_action = execute; + size = 1000000; + } + apply { + stub.apply(); + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4-error b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4-error new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4-stderr b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4-stderr new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.bfrt.json b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.bfrt.json new file mode 100644 index 0000000000..79d3e800ec --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.bfrt.json @@ -0,0 +1,41 @@ +{ + "schema_version" : "1.0.0", + "tables" : [ + { + "name" : "pipe.MainControlImpl.stub", + "id" : 48042732, + "table_type" : "MatchAction_Direct", + "size" : 1000000, + "annotations" : [], + "depends_on" : [], + "has_const_default_action" : true, + "key" : [ + { + "id" : 1, + "name" : "hdrs.vlan_tag[meta.depth].vid", + "repeated" : false, + "annotations" : [], + "mandatory" : false, + "match_type" : "Exact", + "type" : { + "type" : "bytes", + "width" : 12 + } + } + ], + "action_specs" : [ + { + "id" : 28198379, + "name" : "MainControlImpl.execute", + "action_scope" : "TableAndDefault", + "annotations" : [], + "data" : [] + } + ], + "data" : [], + "supported_operations" : [], + "attributes" : ["EntryScope"] + } + ], + "learn_filters" : [] +} \ No newline at end of file diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.spec b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.spec new file mode 100644 index 0000000000..779cfdce2e --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.spec @@ -0,0 +1,175 @@ + +struct ethernet_t { + bit<48> dstAddr + bit<48> srcAddr + bit<16> etherType +} + +struct vlan_tag_h { + bit<16> pcp_cfi_vid + bit<16> ether_type +} + +header ethernet instanceof ethernet_t +header vlan_tag_0 instanceof vlan_tag_h +header vlan_tag_1 instanceof vlan_tag_h + + +struct main_metadata_t { + bit<32> pna_main_input_metadata_input_port + bit<32> local_metadata_depth + bit<32> pna_main_output_metadata_output_port + bit<32> MainControlT_tmp + bit<32> MainControlT_tmp_0 + bit<32> MainControlT_tmp_1 + bit<32> MainControlT_tmp_2 + bit<32> MainControlT_tmp_3 + bit<32> MainControlT_tmp_4 + bit<16> MainControlT_tmp_5 + bit<16> MainControlT_tmp_6 + bit<32> MainControlT_tmp_7 + bit<16> MainControlT_tmp_8 + bit<16> MainControlT_tmp_9 + bit<16> MainControlT_tmp_10 + bit<16> MainControlT_tmp_11 + bit<16> MainControlT_tmp_12 + bit<16> MainControlT_tmp_13 + bit<16> MainControlT_tmp_14 + bit<16> MainControlT_tmp_15 + bit<16> MainControlT_tmp_16 + bit<32> MainControlT_tmp_17 + bit<16> MainControlT_tmp_18 + bit<16> MainControlT_tmp_19 + bit<16> MainControlT_tmp_20 + bit<16> MainControlT_tmp_21 + bit<16> MainControlT_tmp_22 + bit<16> MainControlT_tmp_23 + bit<16> MainControlT_tmp_24 + bit<16> MainControlT_tmp_25 + bit<16> MainControlT_tmp_26 + bit<32> MainControlT_hsVar + bit<32> MainControlT_hsVar_0 + bit<32> MainControlT_key +} +metadata instanceof main_metadata_t + +regarray direction size 0x100 initval 0 + +action execute_1 args none { + jmpneq LABEL_FALSE_2 m.local_metadata_depth 0x0 + mov m.MainControlT_tmp_1 m.local_metadata_depth + add m.MainControlT_tmp_1 0x3 + jmpneq LABEL_FALSE_3 m.MainControlT_tmp_1 0x0 + jmp LABEL_END_3 + LABEL_FALSE_3 : mov m.MainControlT_tmp_0 m.local_metadata_depth + add m.MainControlT_tmp_0 0x3 + jmpneq LABEL_FALSE_4 m.MainControlT_tmp_0 0x1 + mov m.MainControlT_tmp_5 h.vlan_tag_0.pcp_cfi_vid + and m.MainControlT_tmp_5 0xf + mov m.MainControlT_tmp_6 h.vlan_tag_1.pcp_cfi_vid + shr m.MainControlT_tmp_6 0x4 + mov m.MainControlT_tmp_7 m.MainControlT_tmp_6 + mov m.MainControlT_tmp_8 m.MainControlT_tmp_7 + mov m.MainControlT_tmp_9 m.MainControlT_tmp_8 + shl m.MainControlT_tmp_9 0x4 + mov m.MainControlT_tmp_10 m.MainControlT_tmp_9 + and m.MainControlT_tmp_10 0xfff0 + mov h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_5 + or h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_10 + jmp LABEL_END_3 + LABEL_FALSE_4 : mov m.MainControlT_tmp m.local_metadata_depth + add m.MainControlT_tmp 0x3 + jmplt LABEL_END_3 m.MainControlT_tmp 0x1 + mov m.MainControlT_tmp_11 h.vlan_tag_0.pcp_cfi_vid + and m.MainControlT_tmp_11 0xf + mov m.MainControlT_tmp_12 m.MainControlT_hsVar_0 + mov m.MainControlT_tmp_13 m.MainControlT_tmp_12 + shl m.MainControlT_tmp_13 0x4 + mov m.MainControlT_tmp_14 m.MainControlT_tmp_13 + and m.MainControlT_tmp_14 0xfff0 + mov h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_11 + or h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_14 + jmp LABEL_END_3 + LABEL_FALSE_2 : jmpneq LABEL_END_3 m.local_metadata_depth 0x1 + mov m.MainControlT_tmp_4 m.local_metadata_depth + add m.MainControlT_tmp_4 0x3 + jmpneq LABEL_FALSE_7 m.MainControlT_tmp_4 0x0 + mov m.MainControlT_tmp_15 h.vlan_tag_1.pcp_cfi_vid + and m.MainControlT_tmp_15 0xf + mov m.MainControlT_tmp_16 h.vlan_tag_0.pcp_cfi_vid + shr m.MainControlT_tmp_16 0x4 + mov m.MainControlT_tmp_17 m.MainControlT_tmp_16 + mov m.MainControlT_tmp_18 m.MainControlT_tmp_17 + mov m.MainControlT_tmp_19 m.MainControlT_tmp_18 + shl m.MainControlT_tmp_19 0x4 + mov m.MainControlT_tmp_20 m.MainControlT_tmp_19 + and m.MainControlT_tmp_20 0xfff0 + mov h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_15 + or h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_20 + jmp LABEL_END_3 + LABEL_FALSE_7 : mov m.MainControlT_tmp_3 m.local_metadata_depth + add m.MainControlT_tmp_3 0x3 + jmpneq LABEL_FALSE_8 m.MainControlT_tmp_3 0x1 + jmp LABEL_END_3 + LABEL_FALSE_8 : mov m.MainControlT_tmp_2 m.local_metadata_depth + add m.MainControlT_tmp_2 0x3 + jmplt LABEL_END_3 m.MainControlT_tmp_2 0x1 + mov m.MainControlT_tmp_21 h.vlan_tag_1.pcp_cfi_vid + and m.MainControlT_tmp_21 0xf + mov m.MainControlT_tmp_22 m.MainControlT_hsVar_0 + mov m.MainControlT_tmp_23 m.MainControlT_tmp_22 + shl m.MainControlT_tmp_23 0x4 + mov m.MainControlT_tmp_24 m.MainControlT_tmp_23 + and m.MainControlT_tmp_24 0xfff0 + mov h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_21 + or h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_24 + LABEL_END_3 : return +} + +table stub { + key { + m.MainControlT_key exact + } + actions { + execute_1 + } + default_action execute_1 args none const + size 0xf4240 +} + + +apply { + rx m.pna_main_input_metadata_input_port + mov m.local_metadata_depth 0x1 + extract h.ethernet + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG h.ethernet.etherType 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG : extract h.vlan_tag_0 + add m.local_metadata_depth 0x3 + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG1 h.vlan_tag_0.ether_type 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG1 : extract h.vlan_tag_1 + add m.local_metadata_depth 0x3 + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG2 h.vlan_tag_1.ether_type 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG2 : mov m.pna_pre_input_metadata_parser_error 0x3 + MAINPARSERIMPL_ACCEPT : jmpneq LABEL_FALSE m.local_metadata_depth 0x0 + mov m.MainControlT_tmp_25 h.vlan_tag_0.pcp_cfi_vid + shr m.MainControlT_tmp_25 0x4 + mov m.MainControlT_key m.MainControlT_tmp_25 + jmp LABEL_END_0 + LABEL_FALSE : jmpneq LABEL_FALSE_0 m.local_metadata_depth 0x1 + mov m.MainControlT_tmp_26 h.vlan_tag_1.pcp_cfi_vid + shr m.MainControlT_tmp_26 0x4 + mov m.MainControlT_key m.MainControlT_tmp_26 + jmp LABEL_END_0 + LABEL_FALSE_0 : jmplt LABEL_END_0 m.local_metadata_depth 0x1 + mov m.MainControlT_key m.MainControlT_hsVar + LABEL_END_0 : table stub + emit h.ethernet + emit h.vlan_tag_0 + emit h.vlan_tag_1 + tx m.pna_main_output_metadata_output_port +} + + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4-error b/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4-error new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4.bfrt.json b/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4.bfrt.json new file mode 100644 index 0000000000..436d37a351 --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4.bfrt.json @@ -0,0 +1,76 @@ +{ + "schema_version" : "1.0.0", + "tables" : [ + { + "name" : "pipe.MainControlImpl.stub", + "id" : 48042732, + "table_type" : "MatchAction_Direct", + "size" : 1000000, + "annotations" : [], + "depends_on" : [], + "has_const_default_action" : true, + "key" : [ + { + "id" : 1, + "name" : "hdrs.vlan_tag[meta.depth].vid", + "repeated" : false, + "annotations" : [], + "mandatory" : false, + "match_type" : "Exact", + "type" : { + "type" : "bytes", + "width" : 12 + } + } + ], + "action_specs" : [ + { + "id" : 28198379, + "name" : "MainControlImpl.execute", + "action_scope" : "TableAndDefault", + "annotations" : [], + "data" : [] + } + ], + "data" : [], + "supported_operations" : [], + "attributes" : ["EntryScope"] + }, + { + "name" : "pipe.MainControlImpl.stub1", + "id" : 38407841, + "table_type" : "MatchAction_Direct", + "size" : 1000000, + "annotations" : [], + "depends_on" : [], + "has_const_default_action" : true, + "key" : [ + { + "id" : 1, + "name" : "hdrs.ethernet.etherType", + "repeated" : false, + "annotations" : [], + "mandatory" : false, + "match_type" : "Exact", + "type" : { + "type" : "bytes", + "width" : 16 + } + } + ], + "action_specs" : [ + { + "id" : 29283998, + "name" : "MainControlImpl.execute_1", + "action_scope" : "TableAndDefault", + "annotations" : [], + "data" : [] + } + ], + "data" : [], + "supported_operations" : [], + "attributes" : ["EntryScope"] + } + ], + "learn_filters" : [] +} \ No newline at end of file diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4.spec b/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4.spec new file mode 100644 index 0000000000..43b4be462b --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4.spec @@ -0,0 +1,151 @@ + +struct ethernet_t { + bit<48> dstAddr + bit<48> srcAddr + bit<16> etherType +} + +struct vlan_tag_h { + bit<16> pcp_cfi_vid + bit<16> ether_type +} + +header ethernet instanceof ethernet_t +header vlan_tag_0 instanceof vlan_tag_h +header vlan_tag_1 instanceof vlan_tag_h + + +struct main_metadata_t { + bit<32> pna_main_input_metadata_input_port + bit<32> local_metadata_depth + bit<32> pna_main_output_metadata_output_port + bit<16> MainControlT_tmp + bit<32> MainControlT_tmp_0 + bit<16> MainControlT_tmp_1 + bit<32> MainControlT_tmp_2 + bit<16> MainControlT_tmp_3 + bit<16> MainControlT_tmp_4 + bit<32> MainControlT_tmp_5 + bit<16> MainControlT_tmp_6 + bit<16> MainControlT_tmp_7 + bit<16> MainControlT_tmp_8 + bit<16> MainControlT_tmp_9 + bit<16> MainControlT_tmp_10 + bit<32> MainControlT_tmp_11 + bit<16> MainControlT_tmp_12 + bit<16> MainControlT_tmp_13 + bit<16> MainControlT_tmp_14 + bit<16> MainControlT_tmp_15 + bit<16> MainControlT_tmp_16 + bit<32> MainControlT_key +} +metadata instanceof main_metadata_t + +regarray direction size 0x100 initval 0 + +action execute_1 args none { + jmpneq LABEL_FALSE_1 m.local_metadata_depth 0x0 + mov m.MainControlT_tmp_3 h.vlan_tag_0.pcp_cfi_vid + and m.MainControlT_tmp_3 0xf + mov m.MainControlT_tmp_4 h.vlan_tag_0.pcp_cfi_vid + shr m.MainControlT_tmp_4 0x4 + mov m.MainControlT_tmp_5 m.MainControlT_tmp_4 + mov m.MainControlT_tmp_6 m.MainControlT_tmp_5 + mov m.MainControlT_tmp_7 m.MainControlT_tmp_6 + shl m.MainControlT_tmp_7 0x4 + mov m.MainControlT_tmp_8 m.MainControlT_tmp_7 + and m.MainControlT_tmp_8 0xfff0 + mov h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_3 + or h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_8 + jmp LABEL_END_2 + LABEL_FALSE_1 : jmpneq LABEL_END_2 m.local_metadata_depth 0x1 + mov m.MainControlT_tmp_9 h.vlan_tag_1.pcp_cfi_vid + and m.MainControlT_tmp_9 0xf + mov m.MainControlT_tmp_10 h.vlan_tag_0.pcp_cfi_vid + shr m.MainControlT_tmp_10 0x4 + mov m.MainControlT_tmp_11 m.MainControlT_tmp_10 + mov m.MainControlT_tmp_12 m.MainControlT_tmp_11 + mov m.MainControlT_tmp_13 m.MainControlT_tmp_12 + shl m.MainControlT_tmp_13 0x4 + mov m.MainControlT_tmp_14 m.MainControlT_tmp_13 + and m.MainControlT_tmp_14 0xfff0 + mov h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_9 + or h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_14 + LABEL_END_2 : return +} + +action execute_3 args none { + drop + return +} + +table stub { + key { + m.MainControlT_key exact + } + actions { + execute_1 + } + default_action execute_1 args none const + size 0xf4240 +} + + +table stub1 { + key { + h.ethernet.etherType exact + } + actions { + execute_3 + } + default_action execute_3 args none const + size 0xf4240 +} + + +apply { + rx m.pna_main_input_metadata_input_port + mov m.local_metadata_depth 0x1 + extract h.ethernet + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG h.ethernet.etherType 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG : extract h.vlan_tag_0 + add m.local_metadata_depth 0x3 + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG1 h.vlan_tag_0.ether_type 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG1 : extract h.vlan_tag_1 + add m.local_metadata_depth 0x3 + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG2 h.vlan_tag_1.ether_type 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG2 : mov m.pna_pre_input_metadata_parser_error 0x3 + MAINPARSERIMPL_ACCEPT : jmpneq LABEL_FALSE m.local_metadata_depth 0x0 + mov m.MainControlT_tmp h.vlan_tag_0.pcp_cfi_vid + shr m.MainControlT_tmp 0x4 + mov m.MainControlT_tmp_0 m.MainControlT_tmp + jmpeq LABEL_SWITCH m.MainControlT_tmp_0 0x1 + jmpeq LABEL_SWITCH_0 m.MainControlT_tmp_0 0x2 + jmp LABEL_END_0 + LABEL_SWITCH : mov m.MainControlT_tmp_15 h.vlan_tag_0.pcp_cfi_vid + shr m.MainControlT_tmp_15 0x4 + mov m.MainControlT_key m.MainControlT_tmp_15 + table stub + jmp LABEL_END_0 + LABEL_SWITCH_0 : table stub1 + jmp LABEL_END_0 + LABEL_FALSE : jmpneq LABEL_END_0 m.local_metadata_depth 0x1 + mov m.MainControlT_tmp_1 h.vlan_tag_1.pcp_cfi_vid + shr m.MainControlT_tmp_1 0x4 + mov m.MainControlT_tmp_2 m.MainControlT_tmp_1 + jmpeq LABEL_SWITCH_1 m.MainControlT_tmp_2 0x1 + jmpeq LABEL_END_0 m.MainControlT_tmp_2 0x2 + jmp LABEL_END_0 + LABEL_SWITCH_1 : mov m.MainControlT_tmp_16 h.vlan_tag_1.pcp_cfi_vid + shr m.MainControlT_tmp_16 0x4 + mov m.MainControlT_key m.MainControlT_tmp_16 + LABEL_END_0 : emit h.ethernet + emit h.vlan_tag_0 + emit h.vlan_tag_1 + tx m.pna_main_output_metadata_output_port +} + + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-first.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-first.p4 new file mode 100644 index 0000000000..15ddf549be --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-first.p4 @@ -0,0 +1,94 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 16w0x8100, + IPV4 = 16w0x800, + IPV6 = 16w0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + action execute() { + meta.ethType = hdrs.vlan_tag[meta.depth + 2w3].ether_type; + hdrs.vlan_tag[meta.depth + 2w3].ether_type = (ether_type_t)16w2; + hdrs.vlan_tag[meta.depth].vid = (bit<12>)hdrs.vlan_tag[meta.depth].cfi; + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[1].vid; + } + action execute_1() { + drop_packet(); + } + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute(); + } + const default_action = execute(); + size = 10000; + } + apply { + if (hdrs.vlan_tag[meta.depth].ether_type == hdrs.ethernet.etherType) { + stub.apply(); + } + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-frontend.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-frontend.p4 new file mode 100644 index 0000000000..a196bf1e4d --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-frontend.p4 @@ -0,0 +1,91 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 16w0x8100, + IPV4 = 16w0x800, + IPV6 = 16w0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + @name("MainControlImpl.execute") action execute_1() { + meta.ethType = hdrs.vlan_tag[meta.depth + 2w3].ether_type; + hdrs.vlan_tag[meta.depth + 2w3].ether_type = (ether_type_t)16w2; + hdrs.vlan_tag[meta.depth].vid = (bit<12>)hdrs.vlan_tag[meta.depth].cfi; + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[1].vid; + } + @name("MainControlImpl.stub") table stub_0 { + key = { + hdrs.vlan_tag[meta.depth].vid: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute_1(); + } + const default_action = execute_1(); + size = 10000; + } + apply { + if (hdrs.vlan_tag[meta.depth].ether_type == hdrs.ethernet.etherType) { + stub_0.apply(); + } + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-midend.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-midend.p4 new file mode 100644 index 0000000000..dc5208c7ca --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-midend.p4 @@ -0,0 +1,153 @@ +#include +#include + +typedef bit<48> EthernetAddress; +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + bit<16> ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + 16w0x8100: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + 16w0x8100: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + bit<2> hsiVar; + bit<2> hsiVar_0; + bit<16> hsVar; + bit<2> hsiVar_1; + @name("MainControlImpl.execute") action execute_1() { + hsiVar_0 = meta.depth + 2w3; + if (hsiVar_0 == 2w0) { + meta.ethType = hdrs.vlan_tag[2w0].ether_type; + } else if (hsiVar_0 == 2w1) { + meta.ethType = hdrs.vlan_tag[2w1].ether_type; + } else if (hsiVar_0 >= 2w1) { + meta.ethType = hsVar; + } + hsiVar_0 = meta.depth + 2w3; + if (hsiVar_0 == 2w0) { + hdrs.vlan_tag[2w0].ether_type = 16w2; + } else if (hsiVar_0 == 2w1) { + hdrs.vlan_tag[2w1].ether_type = 16w2; + } + hsiVar_1 = meta.depth; + if (hsiVar_1 == 2w0) { + hdrs.vlan_tag[2w0].vid = (bit<12>)hdrs.vlan_tag[2w0].cfi; + } else if (hsiVar_1 == 2w1) { + hdrs.vlan_tag[2w1].vid = (bit<12>)hdrs.vlan_tag[2w1].cfi; + } + hsiVar_1 = meta.depth; + if (hsiVar_1 == 2w0) { + hdrs.vlan_tag[2w0].vid = hdrs.vlan_tag[1].vid; + } else if (hsiVar_1 == 2w1) { + hdrs.vlan_tag[2w1].vid = hdrs.vlan_tag[1].vid; + } + } + bit<12> key_0; + @name("MainControlImpl.stub") table stub_0 { + key = { + key_0: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute_1(); + } + const default_action = execute_1(); + size = 10000; + } + @hidden action pnaexamplevarIndex106() { + key_0 = hdrs.vlan_tag[2w0].vid; + } + @hidden action pnaexamplevarIndex106_0() { + key_0 = hdrs.vlan_tag[2w1].vid; + } + @hidden action pnaexamplevarIndex117() { + hsiVar = meta.depth; + } + @hidden table tbl_pnaexamplevarIndex117 { + actions = { + pnaexamplevarIndex117(); + } + const default_action = pnaexamplevarIndex117(); + } + @hidden table tbl_pnaexamplevarIndex106 { + actions = { + pnaexamplevarIndex106(); + } + const default_action = pnaexamplevarIndex106(); + } + @hidden table tbl_pnaexamplevarIndex106_0 { + actions = { + pnaexamplevarIndex106_0(); + } + const default_action = pnaexamplevarIndex106_0(); + } + apply { + tbl_pnaexamplevarIndex117.apply(); + if (hsiVar == 2w0 && hdrs.vlan_tag[2w0].ether_type == hdrs.ethernet.etherType) { + tbl_pnaexamplevarIndex106.apply(); + stub_0.apply(); + } else if (hsiVar == 2w1 && hdrs.vlan_tag[2w1].ether_type == hdrs.ethernet.etherType) { + tbl_pnaexamplevarIndex106_0.apply(); + stub_0.apply(); + } + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + @hidden action pnaexamplevarIndex129() { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } + @hidden table tbl_pnaexamplevarIndex129 { + actions = { + pnaexamplevarIndex129(); + } + const default_action = pnaexamplevarIndex129(); + } + apply { + tbl_pnaexamplevarIndex129.apply(); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex.p4 new file mode 100644 index 0000000000..e39a97e9e7 --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex.p4 @@ -0,0 +1,94 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 0x8100, + IPV4 = 0x800, + IPV6 = 0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2 - 1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth - 1; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + action execute() { + meta.ethType = hdrs.vlan_tag[meta.depth - 1].ether_type; + hdrs.vlan_tag[meta.depth - 1].ether_type = (ether_type_t)16w2; + hdrs.vlan_tag[meta.depth].vid = (bit<12>)hdrs.vlan_tag[meta.depth].cfi; + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[1].vid; + } + action execute_1() { + drop_packet(); + } + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid: exact; + } + actions = { + execute; + } + const default_action = execute; + size = 10000; + } + apply { + if (hdrs.vlan_tag[meta.depth].ether_type == hdrs.ethernet.etherType) { + stub.apply(); + } + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex.p4-error b/testdata/p4_16_samples_outputs/pna-example-varIndex.p4-error new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex.p4-stderr b/testdata/p4_16_samples_outputs/pna-example-varIndex.p4-stderr new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex.p4.bfrt.json b/testdata/p4_16_samples_outputs/pna-example-varIndex.p4.bfrt.json new file mode 100644 index 0000000000..c2a3968797 --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex.p4.bfrt.json @@ -0,0 +1,41 @@ +{ + "schema_version" : "1.0.0", + "tables" : [ + { + "name" : "pipe.MainControlImpl.stub", + "id" : 48042732, + "table_type" : "MatchAction_Direct", + "size" : 10000, + "annotations" : [], + "depends_on" : [], + "has_const_default_action" : true, + "key" : [ + { + "id" : 1, + "name" : "hdrs.vlan_tag[meta.depth].vid", + "repeated" : false, + "annotations" : [], + "mandatory" : false, + "match_type" : "Exact", + "type" : { + "type" : "bytes", + "width" : 12 + } + } + ], + "action_specs" : [ + { + "id" : 28198379, + "name" : "MainControlImpl.execute", + "action_scope" : "TableAndDefault", + "annotations" : [], + "data" : [] + } + ], + "data" : [], + "supported_operations" : [], + "attributes" : ["EntryScope"] + } + ], + "learn_filters" : [] +} \ No newline at end of file diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex.p4.spec b/testdata/p4_16_samples_outputs/pna-example-varIndex.p4.spec new file mode 100644 index 0000000000..eda8d0457a --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex.p4.spec @@ -0,0 +1,191 @@ + +struct ethernet_t { + bit<48> dstAddr + bit<48> srcAddr + bit<16> etherType +} + +struct vlan_tag_h { + bit<16> pcp_cfi_vid + bit<16> ether_type +} + +header ethernet instanceof ethernet_t +header vlan_tag_0 instanceof vlan_tag_h +header vlan_tag_1 instanceof vlan_tag_h + + +struct main_metadata_t { + bit<32> pna_main_input_metadata_input_port + bit<32> local_metadata_depth + bit<16> local_metadata_ethType + bit<32> pna_main_output_metadata_output_port + bit<32> MainControlT_tmp + bit<32> MainControlT_tmp_0 + bit<32> MainControlT_tmp_1 + bit<32> MainControlT_tmp_2 + bit<32> MainControlT_tmp_3 + bit<16> MainControlT_tmp_4 + bit<16> MainControlT_tmp_5 + bit<32> MainControlT_tmp_6 + bit<32> MainControlT_tmp_7 + bit<16> MainControlT_tmp_8 + bit<16> MainControlT_tmp_9 + bit<16> MainControlT_tmp_10 + bit<16> MainControlT_tmp_11 + bit<16> MainControlT_tmp_12 + bit<32> MainControlT_tmp_13 + bit<32> MainControlT_tmp_14 + bit<16> MainControlT_tmp_15 + bit<16> MainControlT_tmp_16 + bit<16> MainControlT_tmp_17 + bit<16> MainControlT_tmp_18 + bit<16> MainControlT_tmp_19 + bit<32> MainControlT_tmp_20 + bit<16> MainControlT_tmp_21 + bit<16> MainControlT_tmp_22 + bit<16> MainControlT_tmp_23 + bit<16> MainControlT_tmp_24 + bit<16> MainControlT_tmp_25 + bit<32> MainControlT_tmp_26 + bit<16> MainControlT_tmp_27 + bit<16> MainControlT_tmp_28 + bit<16> MainControlT_tmp_29 + bit<16> MainControlT_tmp_30 + bit<16> MainControlT_tmp_31 + bit<16> MainControlT_hsVar + bit<32> MainControlT_key +} +metadata instanceof main_metadata_t + +regarray direction size 0x100 initval 0 + +action execute_1 args none { + mov m.MainControlT_tmp_1 m.local_metadata_depth + add m.MainControlT_tmp_1 0x3 + jmpneq LABEL_FALSE_1 m.MainControlT_tmp_1 0x0 + mov m.local_metadata_ethType h.vlan_tag_0.ether_type + jmp LABEL_END_2 + LABEL_FALSE_1 : mov m.MainControlT_tmp_0 m.local_metadata_depth + add m.MainControlT_tmp_0 0x3 + jmpneq LABEL_FALSE_2 m.MainControlT_tmp_0 0x1 + mov m.local_metadata_ethType h.vlan_tag_1.ether_type + jmp LABEL_END_2 + LABEL_FALSE_2 : mov m.MainControlT_tmp m.local_metadata_depth + add m.MainControlT_tmp 0x3 + jmplt LABEL_END_2 m.MainControlT_tmp 0x1 + mov m.local_metadata_ethType m.MainControlT_hsVar + LABEL_END_2 : mov m.MainControlT_tmp_3 m.local_metadata_depth + add m.MainControlT_tmp_3 0x3 + jmpneq LABEL_FALSE_4 m.MainControlT_tmp_3 0x0 + mov h.vlan_tag_0.ether_type 0x2 + jmp LABEL_END_5 + LABEL_FALSE_4 : mov m.MainControlT_tmp_2 m.local_metadata_depth + add m.MainControlT_tmp_2 0x3 + jmpneq LABEL_END_5 m.MainControlT_tmp_2 0x1 + mov h.vlan_tag_1.ether_type 0x2 + LABEL_END_5 : jmpneq LABEL_FALSE_6 m.local_metadata_depth 0x0 + mov m.MainControlT_tmp_4 h.vlan_tag_0.pcp_cfi_vid + and m.MainControlT_tmp_4 0xf + mov m.MainControlT_tmp_5 h.vlan_tag_0.pcp_cfi_vid + shr m.MainControlT_tmp_5 0x3 + mov m.MainControlT_tmp_6 m.MainControlT_tmp_5 + mov m.MainControlT_tmp_7 m.MainControlT_tmp_6 + mov m.MainControlT_tmp_8 m.MainControlT_tmp_7 + mov m.MainControlT_tmp_9 m.MainControlT_tmp_8 + shl m.MainControlT_tmp_9 0x4 + mov m.MainControlT_tmp_10 m.MainControlT_tmp_9 + and m.MainControlT_tmp_10 0xfff0 + mov h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_4 + or h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_10 + jmp LABEL_END_7 + LABEL_FALSE_6 : jmpneq LABEL_END_7 m.local_metadata_depth 0x1 + mov m.MainControlT_tmp_11 h.vlan_tag_1.pcp_cfi_vid + and m.MainControlT_tmp_11 0xf + mov m.MainControlT_tmp_12 h.vlan_tag_1.pcp_cfi_vid + shr m.MainControlT_tmp_12 0x3 + mov m.MainControlT_tmp_13 m.MainControlT_tmp_12 + mov m.MainControlT_tmp_14 m.MainControlT_tmp_13 + mov m.MainControlT_tmp_15 m.MainControlT_tmp_14 + mov m.MainControlT_tmp_16 m.MainControlT_tmp_15 + shl m.MainControlT_tmp_16 0x4 + mov m.MainControlT_tmp_17 m.MainControlT_tmp_16 + and m.MainControlT_tmp_17 0xfff0 + mov h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_11 + or h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_17 + LABEL_END_7 : jmpneq LABEL_FALSE_8 m.local_metadata_depth 0x0 + mov m.MainControlT_tmp_18 h.vlan_tag_0.pcp_cfi_vid + and m.MainControlT_tmp_18 0xf + mov m.MainControlT_tmp_19 h.vlan_tag_1.pcp_cfi_vid + shr m.MainControlT_tmp_19 0x4 + mov m.MainControlT_tmp_20 m.MainControlT_tmp_19 + mov m.MainControlT_tmp_21 m.MainControlT_tmp_20 + mov m.MainControlT_tmp_22 m.MainControlT_tmp_21 + shl m.MainControlT_tmp_22 0x4 + mov m.MainControlT_tmp_23 m.MainControlT_tmp_22 + and m.MainControlT_tmp_23 0xfff0 + mov h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_18 + or h.vlan_tag_0.pcp_cfi_vid m.MainControlT_tmp_23 + jmp LABEL_END_9 + LABEL_FALSE_8 : jmpneq LABEL_END_9 m.local_metadata_depth 0x1 + mov m.MainControlT_tmp_24 h.vlan_tag_1.pcp_cfi_vid + and m.MainControlT_tmp_24 0xf + mov m.MainControlT_tmp_25 h.vlan_tag_1.pcp_cfi_vid + shr m.MainControlT_tmp_25 0x4 + mov m.MainControlT_tmp_26 m.MainControlT_tmp_25 + mov m.MainControlT_tmp_27 m.MainControlT_tmp_26 + mov m.MainControlT_tmp_28 m.MainControlT_tmp_27 + shl m.MainControlT_tmp_28 0x4 + mov m.MainControlT_tmp_29 m.MainControlT_tmp_28 + and m.MainControlT_tmp_29 0xfff0 + mov h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_24 + or h.vlan_tag_1.pcp_cfi_vid m.MainControlT_tmp_29 + LABEL_END_9 : return +} + +table stub { + key { + m.MainControlT_key exact + } + actions { + execute_1 + } + default_action execute_1 args none const + size 0x2710 +} + + +apply { + rx m.pna_main_input_metadata_input_port + mov m.local_metadata_depth 0x1 + extract h.ethernet + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG h.ethernet.etherType 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG : extract h.vlan_tag_0 + add m.local_metadata_depth 0x3 + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG1 h.vlan_tag_0.ether_type 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG1 : extract h.vlan_tag_1 + add m.local_metadata_depth 0x3 + jmpeq MAINPARSERIMPL_PARSE_VLAN_TAG2 h.vlan_tag_1.ether_type 0x8100 + jmp MAINPARSERIMPL_ACCEPT + MAINPARSERIMPL_PARSE_VLAN_TAG2 : mov m.pna_pre_input_metadata_parser_error 0x3 + MAINPARSERIMPL_ACCEPT : jmpneq LABEL_FALSE m.local_metadata_depth 0x0 + jmpneq LABEL_FALSE h.vlan_tag_0.ether_type h.ethernet.etherType + mov m.MainControlT_tmp_30 h.vlan_tag_0.pcp_cfi_vid + shr m.MainControlT_tmp_30 0x4 + mov m.MainControlT_key m.MainControlT_tmp_30 + table stub + jmp LABEL_END_0 + LABEL_FALSE : jmpneq LABEL_END_0 m.local_metadata_depth 0x1 + jmpneq LABEL_END_0 h.vlan_tag_1.ether_type h.ethernet.etherType + mov m.MainControlT_tmp_31 h.vlan_tag_1.pcp_cfi_vid + shr m.MainControlT_tmp_31 0x4 + mov m.MainControlT_key m.MainControlT_tmp_31 + LABEL_END_0 : emit h.ethernet + emit h.vlan_tag_0 + emit h.vlan_tag_1 + tx m.pna_main_output_metadata_output_port +} + + diff --git a/testdata/p4_16_samples_outputs/psa-variable-index-first.p4 b/testdata/p4_16_samples_outputs/psa-variable-index-first.p4 new file mode 100644 index 0000000000..77eabe604e --- /dev/null +++ b/testdata/p4_16_samples_outputs/psa-variable-index-first.p4 @@ -0,0 +1,127 @@ +#include +#include + +header EMPTY_H { +} + +struct EMPTY_M { + bit<2> depth; + bit<16> ret; +} + +struct EMPTY_RESUB { +} + +struct EMPTY_CLONE { +} + +struct EMPTY_BRIDGE { +} + +struct EMPTY_RECIRC { +} + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 16w0x8100, + IPV4 = 16w0x800, + IPV6 = 16w0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct header_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +parser MyIP(packet_in buffer, out header_t h, inout EMPTY_M b, in psa_ingress_parser_input_metadata_t c, in EMPTY_RESUB d, in EMPTY_RECIRC e) { + state start { + b.depth = 2w1; + buffer.extract(h.ethernet); + transition select(h.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + buffer.extract(h.vlan_tag.next); + b.depth = b.depth + 2w3; + transition select(h.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +parser MyEP(packet_in buffer, out EMPTY_H a, inout EMPTY_M b, in psa_egress_parser_input_metadata_t c, in EMPTY_BRIDGE d, in EMPTY_CLONE e, in EMPTY_CLONE f) { + state start { + transition accept; + } +} + +bit<16> func(in bit<12> vid) { + return (bit<16>)vid + 16w5; +} +control MyIC(inout header_t a, inout EMPTY_M b, in psa_ingress_input_metadata_t c, inout psa_ingress_output_metadata_t d) { + action forward() { + b.ret = (bit<16>)a.vlan_tag[b.depth].ether_type[11:8]; + if (b.ret == 16w2) { + d.egress_port = (PortId_t)32w2; + } + } + table tbl { + key = { + a.ethernet.srcAddr: exact @name("a.ethernet.srcAddr") ; + } + actions = { + NoAction(); + } + default_action = NoAction(); + } + apply { + b.ret = (bit<16>)a.vlan_tag[b.depth].vid; + if (a.ethernet.isValid()) { + ; + } else { + b.ret = func(a.vlan_tag[b.depth].vid); + tbl.apply(); + } + } +} + +control MyEC(inout EMPTY_H a, inout EMPTY_M b, in psa_egress_input_metadata_t c, inout psa_egress_output_metadata_t d) { + apply { + } +} + +control MyID(packet_out buffer, out EMPTY_CLONE a, out EMPTY_RESUB b, out EMPTY_BRIDGE c, inout header_t d, in EMPTY_M e, in psa_ingress_output_metadata_t f) { + apply { + buffer.emit(d.ethernet); + buffer.emit(d.vlan_tag[0]); + buffer.emit(d.vlan_tag[1]); + } +} + +control MyED(packet_out buffer, out EMPTY_CLONE a, out EMPTY_RECIRC b, inout EMPTY_H c, in EMPTY_M d, in psa_egress_output_metadata_t e, in psa_egress_deparser_input_metadata_t f) { + apply { + } +} + +IngressPipeline(MyIP(), MyIC(), MyID()) ip; + +EgressPipeline(MyEP(), MyEC(), MyED()) ep; + +PSA_Switch(ip, PacketReplicationEngine(), ep, BufferingQueueingEngine()) main; + diff --git a/testdata/p4_16_samples_outputs/psa-variable-index-frontend.p4 b/testdata/p4_16_samples_outputs/psa-variable-index-frontend.p4 new file mode 100644 index 0000000000..7babcabaee --- /dev/null +++ b/testdata/p4_16_samples_outputs/psa-variable-index-frontend.p4 @@ -0,0 +1,129 @@ +#include +#include + +header EMPTY_H { +} + +struct EMPTY_M { + bit<2> depth; + bit<16> ret; +} + +struct EMPTY_RESUB { +} + +struct EMPTY_CLONE { +} + +struct EMPTY_BRIDGE { +} + +struct EMPTY_RECIRC { +} + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 16w0x8100, + IPV4 = 16w0x800, + IPV6 = 16w0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct header_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +parser MyIP(packet_in buffer, out header_t h, inout EMPTY_M b, in psa_ingress_parser_input_metadata_t c, in EMPTY_RESUB d, in EMPTY_RECIRC e) { + state start { + b.depth = 2w1; + buffer.extract(h.ethernet); + transition select(h.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + buffer.extract(h.vlan_tag.next); + b.depth = b.depth + 2w3; + transition select(h.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +parser MyEP(packet_in buffer, out EMPTY_H a, inout EMPTY_M b, in psa_egress_parser_input_metadata_t c, in EMPTY_BRIDGE d, in EMPTY_CLONE e, in EMPTY_CLONE f) { + state start { + transition accept; + } +} + +control MyIC(inout header_t a, inout EMPTY_M b, in psa_ingress_input_metadata_t c, inout psa_ingress_output_metadata_t d) { + @name("MyIC.tmp") bit<2> tmp; + @name("MyIC.vid_0") bit<12> vid_1; + @name("MyIC.hasReturned") bool hasReturned; + @name("MyIC.retval") bit<16> retval; + @noWarn("unused") @name(".NoAction") action NoAction_1() { + } + @name("MyIC.tbl") table tbl_0 { + key = { + a.ethernet.srcAddr: exact @name("a.ethernet.srcAddr") ; + } + actions = { + NoAction_1(); + } + default_action = NoAction_1(); + } + apply { + b.ret = (bit<16>)a.vlan_tag[b.depth].vid; + if (a.ethernet.isValid()) { + ; + } else { + tmp = b.depth; + vid_1 = a.vlan_tag[tmp].vid; + hasReturned = false; + hasReturned = true; + retval = (bit<16>)vid_1 + 16w5; + b.ret = retval; + tbl_0.apply(); + } + } +} + +control MyEC(inout EMPTY_H a, inout EMPTY_M b, in psa_egress_input_metadata_t c, inout psa_egress_output_metadata_t d) { + apply { + } +} + +control MyID(packet_out buffer, out EMPTY_CLONE a, out EMPTY_RESUB b, out EMPTY_BRIDGE c, inout header_t d, in EMPTY_M e, in psa_ingress_output_metadata_t f) { + apply { + buffer.emit(d.ethernet); + buffer.emit(d.vlan_tag[0]); + buffer.emit(d.vlan_tag[1]); + } +} + +control MyED(packet_out buffer, out EMPTY_CLONE a, out EMPTY_RECIRC b, inout EMPTY_H c, in EMPTY_M d, in psa_egress_output_metadata_t e, in psa_egress_deparser_input_metadata_t f) { + apply { + } +} + +IngressPipeline(MyIP(), MyIC(), MyID()) ip; + +EgressPipeline(MyEP(), MyEC(), MyED()) ep; + +PSA_Switch(ip, PacketReplicationEngine(), ep, BufferingQueueingEngine()) main; + diff --git a/testdata/p4_16_samples_outputs/psa-variable-index-midend.p4 b/testdata/p4_16_samples_outputs/psa-variable-index-midend.p4 new file mode 100644 index 0000000000..9a9949473b --- /dev/null +++ b/testdata/p4_16_samples_outputs/psa-variable-index-midend.p4 @@ -0,0 +1,213 @@ +#include +#include + +header EMPTY_H { +} + +struct EMPTY_M { + bit<2> depth; + bit<16> ret; +} + +struct EMPTY_RESUB { +} + +struct EMPTY_CLONE { +} + +struct EMPTY_BRIDGE { +} + +struct EMPTY_RECIRC { +} + +typedef bit<48> EthernetAddress; +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + bit<16> ether_type; +} + +struct header_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +parser MyIP(packet_in buffer, out header_t h, inout EMPTY_M b, in psa_ingress_parser_input_metadata_t c, in EMPTY_RESUB d, in EMPTY_RECIRC e) { + state start { + b.depth = 2w1; + buffer.extract(h.ethernet); + transition select(h.ethernet.etherType) { + 16w0x8100: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + buffer.extract(h.vlan_tag.next); + b.depth = b.depth + 2w3; + transition select(h.vlan_tag.last.ether_type) { + 16w0x8100: parse_vlan_tag; + default: accept; + } + } +} + +parser MyEP(packet_in buffer, out EMPTY_H a, inout EMPTY_M b, in psa_egress_parser_input_metadata_t c, in EMPTY_BRIDGE d, in EMPTY_CLONE e, in EMPTY_CLONE f) { + state start { + transition accept; + } +} + +control MyIC(inout header_t a, inout EMPTY_M b, in psa_ingress_input_metadata_t c, inout psa_ingress_output_metadata_t d) { + bit<2> hsiVar; + bit<16> hsVar; + bit<2> hsiVar_0; + bit<16> hsVar_0; + @noWarn("unused") @name(".NoAction") action NoAction_1() { + } + @name("MyIC.tbl") table tbl_0 { + key = { + a.ethernet.srcAddr: exact @name("a.ethernet.srcAddr") ; + } + actions = { + NoAction_1(); + } + default_action = NoAction_1(); + } + @hidden action psavariableindex108() { + b.ret = (bit<16>)a.vlan_tag[2w0].vid; + } + @hidden action psavariableindex108_0() { + b.ret = (bit<16>)a.vlan_tag[2w1].vid; + } + @hidden action psavariableindex108_1() { + b.ret = hsVar; + } + @hidden action psavariableindex108_2() { + hsiVar = b.depth; + } + @hidden action psavariableindex110() { + b.ret = (bit<16>)a.vlan_tag[2w0].vid + 16w5; + } + @hidden action psavariableindex110_0() { + b.ret = (bit<16>)a.vlan_tag[2w1].vid + 16w5; + } + @hidden action psavariableindex110_1() { + b.ret = hsVar_0; + } + @hidden action psavariableindex110_2() { + hsiVar_0 = b.depth; + } + @hidden table tbl_psavariableindex108 { + actions = { + psavariableindex108_2(); + } + const default_action = psavariableindex108_2(); + } + @hidden table tbl_psavariableindex108_0 { + actions = { + psavariableindex108(); + } + const default_action = psavariableindex108(); + } + @hidden table tbl_psavariableindex108_1 { + actions = { + psavariableindex108_0(); + } + const default_action = psavariableindex108_0(); + } + @hidden table tbl_psavariableindex108_2 { + actions = { + psavariableindex108_1(); + } + const default_action = psavariableindex108_1(); + } + @hidden table tbl_psavariableindex110 { + actions = { + psavariableindex110_2(); + } + const default_action = psavariableindex110_2(); + } + @hidden table tbl_psavariableindex110_0 { + actions = { + psavariableindex110(); + } + const default_action = psavariableindex110(); + } + @hidden table tbl_psavariableindex110_1 { + actions = { + psavariableindex110_0(); + } + const default_action = psavariableindex110_0(); + } + @hidden table tbl_psavariableindex110_2 { + actions = { + psavariableindex110_1(); + } + const default_action = psavariableindex110_1(); + } + apply { + tbl_psavariableindex108.apply(); + if (hsiVar == 2w0) { + tbl_psavariableindex108_0.apply(); + } else if (hsiVar == 2w1) { + tbl_psavariableindex108_1.apply(); + } else if (hsiVar >= 2w1) { + tbl_psavariableindex108_2.apply(); + } + if (a.ethernet.isValid()) { + ; + } else { + tbl_psavariableindex110.apply(); + if (hsiVar_0 == 2w0) { + tbl_psavariableindex110_0.apply(); + } else if (hsiVar_0 == 2w1) { + tbl_psavariableindex110_1.apply(); + } else if (hsiVar_0 >= 2w1) { + tbl_psavariableindex110_2.apply(); + } + tbl_0.apply(); + } + } +} + +control MyEC(inout EMPTY_H a, inout EMPTY_M b, in psa_egress_input_metadata_t c, inout psa_egress_output_metadata_t d) { + apply { + } +} + +control MyID(packet_out buffer, out EMPTY_CLONE a, out EMPTY_RESUB b, out EMPTY_BRIDGE c, inout header_t d, in EMPTY_M e, in psa_ingress_output_metadata_t f) { + @hidden action psavariableindex133() { + buffer.emit(d.ethernet); + buffer.emit(d.vlan_tag[0]); + buffer.emit(d.vlan_tag[1]); + } + @hidden table tbl_psavariableindex133 { + actions = { + psavariableindex133(); + } + const default_action = psavariableindex133(); + } + apply { + tbl_psavariableindex133.apply(); + } +} + +control MyED(packet_out buffer, out EMPTY_CLONE a, out EMPTY_RECIRC b, inout EMPTY_H c, in EMPTY_M d, in psa_egress_output_metadata_t e, in psa_egress_deparser_input_metadata_t f) { + apply { + } +} + +IngressPipeline(MyIP(), MyIC(), MyID()) ip; + +EgressPipeline(MyEP(), MyEC(), MyED()) ep; + +PSA_Switch(ip, PacketReplicationEngine(), ep, BufferingQueueingEngine()) main; + diff --git a/testdata/p4_16_samples_outputs/psa-variable-index.p4 b/testdata/p4_16_samples_outputs/psa-variable-index.p4 new file mode 100644 index 0000000000..49fe6db036 --- /dev/null +++ b/testdata/p4_16_samples_outputs/psa-variable-index.p4 @@ -0,0 +1,124 @@ +#include +#include + +header EMPTY_H { +} + +struct EMPTY_M { + bit<2> depth; + bit<16> ret; +} + +struct EMPTY_RESUB { +} + +struct EMPTY_CLONE { +} + +struct EMPTY_BRIDGE { +} + +struct EMPTY_RECIRC { +} + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 0x8100, + IPV4 = 0x800, + IPV6 = 0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct header_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +parser MyIP(packet_in buffer, out header_t h, inout EMPTY_M b, in psa_ingress_parser_input_metadata_t c, in EMPTY_RESUB d, in EMPTY_RECIRC e) { + state start { + b.depth = 2 - 1; + buffer.extract(h.ethernet); + transition select(h.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + buffer.extract(h.vlan_tag.next); + b.depth = b.depth - 1; + transition select(h.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +parser MyEP(packet_in buffer, out EMPTY_H a, inout EMPTY_M b, in psa_egress_parser_input_metadata_t c, in EMPTY_BRIDGE d, in EMPTY_CLONE e, in EMPTY_CLONE f) { + state start { + transition accept; + } +} + +bit<16> func(in bit<12> vid) { + return (bit<16>)vid + 16w5; +} +control MyIC(inout header_t a, inout EMPTY_M b, in psa_ingress_input_metadata_t c, inout psa_ingress_output_metadata_t d) { + action forward() { + b.ret = (bit<16>)a.vlan_tag[b.depth].ether_type[11:8]; + if (b.ret == 16w2) { + d.egress_port = (PortId_t)2; + } + } + table tbl { + key = { + a.ethernet.srcAddr: exact; + } + actions = { + NoAction; + } + } + apply { + b.ret = (bit<16>)a.vlan_tag[b.depth].vid; + if (!a.ethernet.isValid()) { + b.ret = func(a.vlan_tag[b.depth].vid); + tbl.apply(); + } + } +} + +control MyEC(inout EMPTY_H a, inout EMPTY_M b, in psa_egress_input_metadata_t c, inout psa_egress_output_metadata_t d) { + apply { + } +} + +control MyID(packet_out buffer, out EMPTY_CLONE a, out EMPTY_RESUB b, out EMPTY_BRIDGE c, inout header_t d, in EMPTY_M e, in psa_ingress_output_metadata_t f) { + apply { + buffer.emit(d.ethernet); + buffer.emit(d.vlan_tag[0]); + buffer.emit(d.vlan_tag[1]); + } +} + +control MyED(packet_out buffer, out EMPTY_CLONE a, out EMPTY_RECIRC b, inout EMPTY_H c, in EMPTY_M d, in psa_egress_output_metadata_t e, in psa_egress_deparser_input_metadata_t f) { + apply { + } +} + +IngressPipeline(MyIP(), MyIC(), MyID()) ip; + +EgressPipeline(MyEP(), MyEC(), MyED()) ep; + +PSA_Switch(ip, PacketReplicationEngine(), ep, BufferingQueueingEngine()) main; + diff --git a/testdata/p4_16_samples_outputs/psa-variable-index.p4-error b/testdata/p4_16_samples_outputs/psa-variable-index.p4-error new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/psa-variable-index.p4-stderr b/testdata/p4_16_samples_outputs/psa-variable-index.p4-stderr new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/psa-variable-index.p4.bfrt.json b/testdata/p4_16_samples_outputs/psa-variable-index.p4.bfrt.json new file mode 100644 index 0000000000..b5246dbf4f --- /dev/null +++ b/testdata/p4_16_samples_outputs/psa-variable-index.p4.bfrt.json @@ -0,0 +1,41 @@ +{ + "schema_version" : "1.0.0", + "tables" : [ + { + "name" : "ip.MyIC.tbl", + "id" : 39967501, + "table_type" : "MatchAction_Direct", + "size" : 1024, + "annotations" : [], + "depends_on" : [], + "has_const_default_action" : false, + "key" : [ + { + "id" : 1, + "name" : "a.ethernet.srcAddr", + "repeated" : false, + "annotations" : [], + "mandatory" : false, + "match_type" : "Exact", + "type" : { + "type" : "bytes", + "width" : 48 + } + } + ], + "action_specs" : [ + { + "id" : 21257015, + "name" : "NoAction", + "action_scope" : "TableAndDefault", + "annotations" : [], + "data" : [] + } + ], + "data" : [], + "supported_operations" : [], + "attributes" : ["EntryScope"] + } + ], + "learn_filters" : [] +} \ No newline at end of file diff --git a/testdata/p4_16_samples_outputs/psa-variable-index.p4.entries.txt b/testdata/p4_16_samples_outputs/psa-variable-index.p4.entries.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/psa-variable-index.p4.p4info.txt b/testdata/p4_16_samples_outputs/psa-variable-index.p4.p4info.txt new file mode 100644 index 0000000000..ac8f5e98f7 --- /dev/null +++ b/testdata/p4_16_samples_outputs/psa-variable-index.p4.p4info.txt @@ -0,0 +1,30 @@ +pkg_info { + arch: "psa" +} +tables { + preamble { + id: 39967501 + name: "MyIC.tbl" + alias: "tbl" + } + match_fields { + id: 1 + name: "a.ethernet.srcAddr" + bitwidth: 48 + match_type: EXACT + } + action_refs { + id: 21257015 + } + size: 1024 +} +actions { + preamble { + id: 21257015 + name: "NoAction" + alias: "NoAction" + annotations: "@noWarn(\"unused\")" + } +} +type_info { +} diff --git a/testdata/p4_16_samples_outputs/psa-variable-index.p4.spec b/testdata/p4_16_samples_outputs/psa-variable-index.p4.spec new file mode 100644 index 0000000000..170cabed63 --- /dev/null +++ b/testdata/p4_16_samples_outputs/psa-variable-index.p4.spec @@ -0,0 +1,129 @@ + +struct ethernet_t { + bit<48> dstAddr + bit<48> srcAddr + bit<16> etherType +} + +struct vlan_tag_h { + bit<16> pcp_cfi_vid + bit<16> ether_type +} + +struct psa_ingress_output_metadata_t { + bit<8> class_of_service + bit<8> clone + bit<16> clone_session_id + bit<8> drop + bit<8> resubmit + bit<32> multicast_group + bit<32> egress_port +} + +struct psa_egress_output_metadata_t { + bit<8> clone + bit<16> clone_session_id + bit<8> drop +} + +struct psa_egress_deparser_input_metadata_t { + bit<32> egress_port +} + +struct EMPTY_M { + bit<32> psa_ingress_input_metadata_ingress_port + bit<8> psa_ingress_output_metadata_drop + bit<32> psa_ingress_output_metadata_egress_port + bit<32> local_metadata_depth + bit<16> local_metadata_ret + bit<16> Ingress_tmp + bit<32> Ingress_tmp_0 + bit<16> Ingress_tmp_1 + bit<32> Ingress_tmp_2 + bit<16> Ingress_tmp_3 + bit<16> Ingress_tmp_4 + bit<16> Ingress_tmp_5 + bit<16> Ingress_hsVar + bit<32> Ingress_hsVar_0 + bit<32> Ingress_vid +} +metadata instanceof EMPTY_M + +header ethernet instanceof ethernet_t +header vlan_tag_0 instanceof vlan_tag_h +header vlan_tag_1 instanceof vlan_tag_h + + +action NoAction args none { + return +} + +table tbl { + key { + h.ethernet.srcAddr exact + } + actions { + NoAction + } + default_action NoAction args none + size 0x10000 +} + + +apply { + rx m.psa_ingress_input_metadata_ingress_port + mov m.psa_ingress_output_metadata_drop 0x0 + mov m.local_metadata_depth 0x1 + extract h.ethernet + jmpeq MYIP_PARSE_VLAN_TAG h.ethernet.etherType 0x8100 + jmp MYIP_ACCEPT + MYIP_PARSE_VLAN_TAG : extract h.vlan_tag_0 + add m.local_metadata_depth 0x3 + jmpeq MYIP_PARSE_VLAN_TAG1 h.vlan_tag_0.ether_type 0x8100 + jmp MYIP_ACCEPT + MYIP_PARSE_VLAN_TAG1 : extract h.vlan_tag_1 + add m.local_metadata_depth 0x3 + jmpeq MYIP_PARSE_VLAN_TAG2 h.vlan_tag_1.ether_type 0x8100 + jmp MYIP_ACCEPT + MYIP_PARSE_VLAN_TAG2 : mov m.psa_ingress_input_metadata_parser_error 0x3 + MYIP_ACCEPT : jmpneq LABEL_FALSE m.local_metadata_depth 0x0 + mov m.Ingress_tmp h.vlan_tag_0.pcp_cfi_vid + shr m.Ingress_tmp 0x4 + mov m.Ingress_tmp_0 m.Ingress_tmp + mov m.local_metadata_ret m.Ingress_tmp_0 + jmp LABEL_END_0 + LABEL_FALSE : jmpneq LABEL_FALSE_0 m.local_metadata_depth 0x1 + mov m.Ingress_tmp_1 h.vlan_tag_1.pcp_cfi_vid + shr m.Ingress_tmp_1 0x4 + mov m.Ingress_tmp_2 m.Ingress_tmp_1 + mov m.local_metadata_ret m.Ingress_tmp_2 + jmp LABEL_END_0 + LABEL_FALSE_0 : jmplt LABEL_END_0 m.local_metadata_depth 0x1 + mov m.local_metadata_ret m.Ingress_hsVar + LABEL_END_0 : jmpnv LABEL_FALSE_2 h.ethernet + jmp LABEL_END_3 + LABEL_FALSE_2 : jmpneq LABEL_FALSE_3 m.local_metadata_depth 0x0 + mov m.Ingress_tmp_3 h.vlan_tag_0.pcp_cfi_vid + shr m.Ingress_tmp_3 0x4 + mov m.Ingress_vid m.Ingress_tmp_3 + jmp LABEL_END_4 + LABEL_FALSE_3 : jmpneq LABEL_FALSE_4 m.local_metadata_depth 0x1 + mov m.Ingress_tmp_4 h.vlan_tag_1.pcp_cfi_vid + shr m.Ingress_tmp_4 0x4 + mov m.Ingress_vid m.Ingress_tmp_4 + jmp LABEL_END_4 + LABEL_FALSE_4 : jmplt LABEL_END_4 m.local_metadata_depth 0x1 + mov m.Ingress_vid m.Ingress_hsVar_0 + LABEL_END_4 : mov m.Ingress_tmp_5 m.Ingress_vid + mov m.local_metadata_ret m.Ingress_tmp_5 + add m.local_metadata_ret 0x5 + table tbl + LABEL_END_3 : jmpneq LABEL_DROP m.psa_ingress_output_metadata_drop 0x0 + emit h.ethernet + emit h.vlan_tag_0 + emit h.vlan_tag_1 + tx m.psa_ingress_output_metadata_egress_port + LABEL_DROP : drop +} + + From da852c217fa19ef9f838b6f580b3bc8d4a22a350 Mon Sep 17 00:00:00 2001 From: Usha Gupta Date: Tue, 7 Jun 2022 03:37:19 +0000 Subject: [PATCH 2/3] Merging the fix for p4test failure --- backends/p4test/CMakeLists.txt | 3 - .../pna-example-varIndex-1-midend.p4 | 39 ++- .../pna-example-varIndex-1.p4.spec | 5 +- .../pna-example-varIndex-2-first.p4 | 106 ++++++++ .../pna-example-varIndex-2-frontend.p4 | 106 ++++++++ .../pna-example-varIndex-2-midend.p4 | 229 ++++++++++++++++++ .../pna-example-varIndex-2.p4 | 106 ++++++++ .../pna-example-varIndex-2.p4-stderr | 0 .../pna-example-varIndex-midend.p4 | 13 +- .../psa-variable-index-midend.p4 | 12 +- 10 files changed, 578 insertions(+), 41 deletions(-) create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-2-first.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-2-frontend.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-2-midend.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4 create mode 100644 testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4-stderr diff --git a/backends/p4test/CMakeLists.txt b/backends/p4test/CMakeLists.txt index dc64df2202..41d2a0f1b1 100644 --- a/backends/p4test/CMakeLists.txt +++ b/backends/p4test/CMakeLists.txt @@ -110,9 +110,6 @@ set (P4_XFAIL_TESTS # arguments and with incorrect number of arguments testdata/p4_16_samples/pna-example-mirror-packet-error2.p4 testdata/p4_16_samples/pna-example-mirror-packet-error3.p4 - # This test fails with type error but is a valid switch expression having - # dynamic index for accessing header stack element - testdata/p4_16_samples/pna-example-varIndex-2.p4 ) # we invoke p4c with --p4runtime-files even for programs in p4_16_errors. This # enables us to use p4_16_errors even for programs which pass compilation but diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1-midend.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-1-midend.p4 index 9dee1f765e..7406550a73 100644 --- a/testdata/p4_16_samples_outputs/pna-example-varIndex-1-midend.p4 +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-1-midend.p4 @@ -51,30 +51,27 @@ parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t m control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { bit<2> hsiVar; - bit<2> hsiVar_0; bit<12> hsVar; - bit<2> hsiVar_1; - bit<2> hsiVar_2; - bit<12> hsVar_0; + bit<2> hsiVar_0; @name("MainControlImpl.execute") action execute_1() { - hsiVar_1 = meta.depth; - if (hsiVar_1 == 2w0) { - hsiVar_2 = meta.depth + 2w3; - if (hsiVar_2 == 2w0) { + hsiVar = meta.depth; + if (hsiVar == 2w0) { + hsiVar_0 = meta.depth + 2w3; + if (hsiVar_0 == 2w0) { hdrs.vlan_tag[2w0].vid = hdrs.vlan_tag[2w0].vid; - } else if (hsiVar_2 == 2w1) { + } else if (hsiVar_0 == 2w1) { hdrs.vlan_tag[2w0].vid = hdrs.vlan_tag[2w1].vid; - } else if (hsiVar_2 >= 2w1) { - hdrs.vlan_tag[2w0].vid = hsVar_0; + } else if (hsiVar_0 >= 2w1) { + hdrs.vlan_tag[2w0].vid = hsVar; } - } else if (hsiVar_1 == 2w1) { - hsiVar_2 = meta.depth + 2w3; - if (hsiVar_2 == 2w0) { + } else if (hsiVar == 2w1) { + hsiVar_0 = meta.depth + 2w3; + if (hsiVar_0 == 2w0) { hdrs.vlan_tag[2w1].vid = hdrs.vlan_tag[2w0].vid; - } else if (hsiVar_2 == 2w1) { + } else if (hsiVar_0 == 2w1) { hdrs.vlan_tag[2w1].vid = hdrs.vlan_tag[2w1].vid; - } else if (hsiVar_2 >= 2w1) { - hdrs.vlan_tag[2w1].vid = hsVar_0; + } else if (hsiVar_0 >= 2w1) { + hdrs.vlan_tag[2w1].vid = hsVar; } } } @@ -99,7 +96,7 @@ control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna key_0 = hsVar; } @hidden action pnaexamplevarIndex1l102_2() { - hsiVar_0 = meta.depth; + hsiVar = meta.depth; } @hidden table tbl_pnaexamplevarIndex1l102 { actions = { @@ -127,11 +124,11 @@ control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna } apply { tbl_pnaexamplevarIndex1l102.apply(); - if (hsiVar_0 == 2w0) { + if (hsiVar == 2w0) { tbl_pnaexamplevarIndex1l102_0.apply(); - } else if (hsiVar_0 == 2w1) { + } else if (hsiVar == 2w1) { tbl_pnaexamplevarIndex1l102_1.apply(); - } else if (hsiVar_0 >= 2w1) { + } else if (hsiVar >= 2w1) { tbl_pnaexamplevarIndex1l102_2.apply(); } stub_0.apply(); diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.spec b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.spec index 779cfdce2e..84543f0d5e 100644 --- a/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.spec +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-1.p4.spec @@ -48,7 +48,6 @@ struct main_metadata_t { bit<16> MainControlT_tmp_25 bit<16> MainControlT_tmp_26 bit<32> MainControlT_hsVar - bit<32> MainControlT_hsVar_0 bit<32> MainControlT_key } metadata instanceof main_metadata_t @@ -82,7 +81,7 @@ action execute_1 args none { jmplt LABEL_END_3 m.MainControlT_tmp 0x1 mov m.MainControlT_tmp_11 h.vlan_tag_0.pcp_cfi_vid and m.MainControlT_tmp_11 0xf - mov m.MainControlT_tmp_12 m.MainControlT_hsVar_0 + mov m.MainControlT_tmp_12 m.MainControlT_hsVar mov m.MainControlT_tmp_13 m.MainControlT_tmp_12 shl m.MainControlT_tmp_13 0x4 mov m.MainControlT_tmp_14 m.MainControlT_tmp_13 @@ -116,7 +115,7 @@ action execute_1 args none { jmplt LABEL_END_3 m.MainControlT_tmp_2 0x1 mov m.MainControlT_tmp_21 h.vlan_tag_1.pcp_cfi_vid and m.MainControlT_tmp_21 0xf - mov m.MainControlT_tmp_22 m.MainControlT_hsVar_0 + mov m.MainControlT_tmp_22 m.MainControlT_hsVar mov m.MainControlT_tmp_23 m.MainControlT_tmp_22 shl m.MainControlT_tmp_23 0x4 mov m.MainControlT_tmp_24 m.MainControlT_tmp_23 diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-2-first.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-2-first.p4 new file mode 100644 index 0000000000..0031b9238f --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-2-first.p4 @@ -0,0 +1,106 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 16w0x8100, + IPV4 = 16w0x800, + IPV6 = 16w0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + action execute() { + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[0].vid; + } + action execute_1() { + drop_packet(); + } + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute(); + } + const default_action = execute(); + size = 1000000; + } + table stub1 { + key = { + hdrs.ethernet.etherType: exact @name("hdrs.ethernet.etherType") ; + } + actions = { + execute_1(); + } + const default_action = execute_1(); + size = 1000000; + } + apply { + switch (hdrs.vlan_tag[meta.depth].vid) { + 12w1: { + stub.apply(); + } + 12w2: { + stub1.apply(); + } + } + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-2-frontend.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-2-frontend.p4 new file mode 100644 index 0000000000..c21fe2c7b8 --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-2-frontend.p4 @@ -0,0 +1,106 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 16w0x8100, + IPV4 = 16w0x800, + IPV6 = 16w0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + @name("MainControlImpl.execute") action execute_1() { + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[0].vid; + } + @name("MainControlImpl.execute_1") action execute_3() { + drop_packet(); + } + @name("MainControlImpl.stub") table stub_0 { + key = { + hdrs.vlan_tag[meta.depth].vid: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute_1(); + } + const default_action = execute_1(); + size = 1000000; + } + @name("MainControlImpl.stub1") table stub1_0 { + key = { + hdrs.ethernet.etherType: exact @name("hdrs.ethernet.etherType") ; + } + actions = { + execute_3(); + } + const default_action = execute_3(); + size = 1000000; + } + apply { + switch (hdrs.vlan_tag[meta.depth].vid) { + 12w1: { + stub_0.apply(); + } + 12w2: { + stub1_0.apply(); + } + } + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-2-midend.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-2-midend.p4 new file mode 100644 index 0000000000..1ac0d5a671 --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-2-midend.p4 @@ -0,0 +1,229 @@ +#include +#include + +typedef bit<48> EthernetAddress; +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + bit<16> ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2w1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + 16w0x8100: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth + 2w3; + transition select(hdrs.vlan_tag.last.ether_type) { + 16w0x8100: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + bit<2> hsiVar; + bit<12> hsVar; + @name("MainControlImpl.execute") action execute_1() { + hsiVar = meta.depth; + if (hsiVar == 2w0) { + hdrs.vlan_tag[2w0].vid = hdrs.vlan_tag[0].vid; + } else if (hsiVar == 2w1) { + hdrs.vlan_tag[2w1].vid = hdrs.vlan_tag[0].vid; + } + } + @name("MainControlImpl.execute_1") action execute_3() { + drop_packet(); + } + bit<12> key_0; + @name("MainControlImpl.stub") table stub_0 { + key = { + key_0: exact @name("hdrs.vlan_tag[meta.depth].vid") ; + } + actions = { + execute_1(); + } + const default_action = execute_1(); + size = 1000000; + } + @name("MainControlImpl.stub1") table stub1_0 { + key = { + hdrs.ethernet.etherType: exact @name("hdrs.ethernet.etherType") ; + } + actions = { + execute_3(); + } + const default_action = execute_3(); + size = 1000000; + } + bit<12> switch_0_key; + @hidden action switch_0_case() { + } + @hidden action switch_0_case_0() { + } + @hidden action switch_0_case_1() { + } + @hidden table switch_0_table { + key = { + switch_0_key: exact; + } + actions = { + switch_0_case(); + switch_0_case_0(); + switch_0_case_1(); + } + const default_action = switch_0_case_1(); + const entries = { + 12w1 : switch_0_case(); + 12w2 : switch_0_case_0(); + } + } + @hidden action pnaexamplevarIndex2l125() { + switch_0_key = hdrs.vlan_tag[2w0].vid; + } + @hidden action pnaexamplevarIndex2l125_0() { + switch_0_key = hdrs.vlan_tag[2w1].vid; + } + @hidden action pnaexamplevarIndex2l125_1() { + switch_0_key = hsVar; + } + @hidden action pnaexamplevarIndex2l125_2() { + hsiVar = meta.depth; + } + @hidden action pnaexamplevarIndex2l102() { + key_0 = hdrs.vlan_tag[2w0].vid; + } + @hidden action pnaexamplevarIndex2l102_0() { + key_0 = hdrs.vlan_tag[2w1].vid; + } + @hidden action pnaexamplevarIndex2l102_1() { + key_0 = hsVar; + } + @hidden action pnaexamplevarIndex2l102_2() { + hsiVar = meta.depth; + } + @hidden table tbl_pnaexamplevarIndex2l125 { + actions = { + pnaexamplevarIndex2l125_2(); + } + const default_action = pnaexamplevarIndex2l125_2(); + } + @hidden table tbl_pnaexamplevarIndex2l125_0 { + actions = { + pnaexamplevarIndex2l125(); + } + const default_action = pnaexamplevarIndex2l125(); + } + @hidden table tbl_pnaexamplevarIndex2l125_1 { + actions = { + pnaexamplevarIndex2l125_0(); + } + const default_action = pnaexamplevarIndex2l125_0(); + } + @hidden table tbl_pnaexamplevarIndex2l125_2 { + actions = { + pnaexamplevarIndex2l125_1(); + } + const default_action = pnaexamplevarIndex2l125_1(); + } + @hidden table tbl_pnaexamplevarIndex2l102 { + actions = { + pnaexamplevarIndex2l102_2(); + } + const default_action = pnaexamplevarIndex2l102_2(); + } + @hidden table tbl_pnaexamplevarIndex2l102_0 { + actions = { + pnaexamplevarIndex2l102(); + } + const default_action = pnaexamplevarIndex2l102(); + } + @hidden table tbl_pnaexamplevarIndex2l102_1 { + actions = { + pnaexamplevarIndex2l102_0(); + } + const default_action = pnaexamplevarIndex2l102_0(); + } + @hidden table tbl_pnaexamplevarIndex2l102_2 { + actions = { + pnaexamplevarIndex2l102_1(); + } + const default_action = pnaexamplevarIndex2l102_1(); + } + apply { + tbl_pnaexamplevarIndex2l125.apply(); + if (hsiVar == 2w0) { + tbl_pnaexamplevarIndex2l125_0.apply(); + } else if (hsiVar == 2w1) { + tbl_pnaexamplevarIndex2l125_1.apply(); + } else if (hsiVar >= 2w1) { + tbl_pnaexamplevarIndex2l125_2.apply(); + } + switch (switch_0_table.apply().action_run) { + switch_0_case: { + tbl_pnaexamplevarIndex2l102.apply(); + if (hsiVar == 2w0) { + tbl_pnaexamplevarIndex2l102_0.apply(); + } else if (hsiVar == 2w1) { + tbl_pnaexamplevarIndex2l102_1.apply(); + } else if (hsiVar >= 2w1) { + tbl_pnaexamplevarIndex2l102_2.apply(); + } + stub_0.apply(); + } + switch_0_case_0: { + stub1_0.apply(); + } + switch_0_case_1: { + } + } + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + @hidden action pnaexamplevarIndex2l139() { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } + @hidden table tbl_pnaexamplevarIndex2l139 { + actions = { + pnaexamplevarIndex2l139(); + } + const default_action = pnaexamplevarIndex2l139(); + } + apply { + tbl_pnaexamplevarIndex2l139.apply(); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4 new file mode 100644 index 0000000000..1c2c4b7f27 --- /dev/null +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4 @@ -0,0 +1,106 @@ +#include +#include + +typedef bit<48> EthernetAddress; +enum bit<16> ether_type_t { + TPID = 0x8100, + IPV4 = 0x800, + IPV6 = 0x86dd +} + +header ethernet_t { + EthernetAddress dstAddr; + EthernetAddress srcAddr; + bit<16> etherType; +} + +header vlan_tag_h { + bit<3> pcp; + bit<1> cfi; + bit<12> vid; + ether_type_t ether_type; +} + +struct headers_t { + ethernet_t ethernet; + vlan_tag_h[2] vlan_tag; +} + +struct main_metadata_t { + bit<2> depth; + bit<16> ethType; +} + +control PreControlImpl(in headers_t hdrs, inout main_metadata_t meta, in pna_pre_input_metadata_t istd, inout pna_pre_output_metadata_t ostd) { + apply { + } +} + +parser MainParserImpl(packet_in pkt, out headers_t hdrs, inout main_metadata_t meta, in pna_main_parser_input_metadata_t istd) { + state start { + meta.depth = 2 - 1; + pkt.extract(hdrs.ethernet); + transition select(hdrs.ethernet.etherType) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } + state parse_vlan_tag { + pkt.extract(hdrs.vlan_tag.next); + meta.depth = meta.depth - 1; + transition select(hdrs.vlan_tag.last.ether_type) { + ether_type_t.TPID: parse_vlan_tag; + default: accept; + } + } +} + +control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna_main_input_metadata_t istd, inout pna_main_output_metadata_t ostd) { + action execute() { + hdrs.vlan_tag[meta.depth].vid = hdrs.vlan_tag[0].vid; + } + action execute_1() { + drop_packet(); + } + table stub { + key = { + hdrs.vlan_tag[meta.depth].vid: exact; + } + actions = { + execute; + } + const default_action = execute; + size = 1000000; + } + table stub1 { + key = { + hdrs.ethernet.etherType: exact; + } + actions = { + execute_1; + } + const default_action = execute_1; + size = 1000000; + } + apply { + switch (hdrs.vlan_tag[meta.depth].vid) { + 12w1: { + stub.apply(); + } + 12w2: { + stub1.apply(); + } + } + } +} + +control MainDeparserImpl(packet_out pkt, in headers_t hdr, in main_metadata_t user_meta, in pna_main_output_metadata_t ostd) { + apply { + pkt.emit(hdr.ethernet); + pkt.emit(hdr.vlan_tag[0]); + pkt.emit(hdr.vlan_tag[1]); + } +} + +PNA_NIC(MainParserImpl(), PreControlImpl(), MainControlImpl(), MainDeparserImpl()) main; + diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4-stderr b/testdata/p4_16_samples_outputs/pna-example-varIndex-2.p4-stderr new file mode 100644 index 0000000000..e69de29bb2 diff --git a/testdata/p4_16_samples_outputs/pna-example-varIndex-midend.p4 b/testdata/p4_16_samples_outputs/pna-example-varIndex-midend.p4 index dc5208c7ca..5d1e47eb66 100644 --- a/testdata/p4_16_samples_outputs/pna-example-varIndex-midend.p4 +++ b/testdata/p4_16_samples_outputs/pna-example-varIndex-midend.p4 @@ -53,7 +53,6 @@ control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna bit<2> hsiVar; bit<2> hsiVar_0; bit<16> hsVar; - bit<2> hsiVar_1; @name("MainControlImpl.execute") action execute_1() { hsiVar_0 = meta.depth + 2w3; if (hsiVar_0 == 2w0) { @@ -69,16 +68,16 @@ control MainControlImpl(inout headers_t hdrs, inout main_metadata_t meta, in pna } else if (hsiVar_0 == 2w1) { hdrs.vlan_tag[2w1].ether_type = 16w2; } - hsiVar_1 = meta.depth; - if (hsiVar_1 == 2w0) { + hsiVar = meta.depth; + if (hsiVar == 2w0) { hdrs.vlan_tag[2w0].vid = (bit<12>)hdrs.vlan_tag[2w0].cfi; - } else if (hsiVar_1 == 2w1) { + } else if (hsiVar == 2w1) { hdrs.vlan_tag[2w1].vid = (bit<12>)hdrs.vlan_tag[2w1].cfi; } - hsiVar_1 = meta.depth; - if (hsiVar_1 == 2w0) { + hsiVar = meta.depth; + if (hsiVar == 2w0) { hdrs.vlan_tag[2w0].vid = hdrs.vlan_tag[1].vid; - } else if (hsiVar_1 == 2w1) { + } else if (hsiVar == 2w1) { hdrs.vlan_tag[2w1].vid = hdrs.vlan_tag[1].vid; } } diff --git a/testdata/p4_16_samples_outputs/psa-variable-index-midend.p4 b/testdata/p4_16_samples_outputs/psa-variable-index-midend.p4 index 9a9949473b..4323890917 100644 --- a/testdata/p4_16_samples_outputs/psa-variable-index-midend.p4 +++ b/testdata/p4_16_samples_outputs/psa-variable-index-midend.p4 @@ -68,8 +68,6 @@ parser MyEP(packet_in buffer, out EMPTY_H a, inout EMPTY_M b, in psa_egress_pars control MyIC(inout header_t a, inout EMPTY_M b, in psa_ingress_input_metadata_t c, inout psa_ingress_output_metadata_t d) { bit<2> hsiVar; bit<16> hsVar; - bit<2> hsiVar_0; - bit<16> hsVar_0; @noWarn("unused") @name(".NoAction") action NoAction_1() { } @name("MyIC.tbl") table tbl_0 { @@ -100,10 +98,10 @@ control MyIC(inout header_t a, inout EMPTY_M b, in psa_ingress_input_metadata_t b.ret = (bit<16>)a.vlan_tag[2w1].vid + 16w5; } @hidden action psavariableindex110_1() { - b.ret = hsVar_0; + b.ret = hsVar; } @hidden action psavariableindex110_2() { - hsiVar_0 = b.depth; + hsiVar = b.depth; } @hidden table tbl_psavariableindex108 { actions = { @@ -166,11 +164,11 @@ control MyIC(inout header_t a, inout EMPTY_M b, in psa_ingress_input_metadata_t ; } else { tbl_psavariableindex110.apply(); - if (hsiVar_0 == 2w0) { + if (hsiVar == 2w0) { tbl_psavariableindex110_0.apply(); - } else if (hsiVar_0 == 2w1) { + } else if (hsiVar == 2w1) { tbl_psavariableindex110_1.apply(); - } else if (hsiVar_0 >= 2w1) { + } else if (hsiVar >= 2w1) { tbl_psavariableindex110_2.apply(); } tbl_0.apply(); From 41722b4da4a2dd10e22343eec7f65c0709196ef1 Mon Sep 17 00:00:00 2001 From: Usha Gupta Date: Tue, 7 Jun 2022 10:47:22 +0000 Subject: [PATCH 3/3] Removed one stale comment for triggering a build as fedora build failed for a transient reason --- backends/dpdk/midend.cpp | 2 -- 1 file changed, 2 deletions(-) diff --git a/backends/dpdk/midend.cpp b/backends/dpdk/midend.cpp index 017616104e..27242316db 100644 --- a/backends/dpdk/midend.cpp +++ b/backends/dpdk/midend.cpp @@ -209,8 +209,6 @@ DpdkMidEnd::DpdkMidEnd(CompilerOptions &options, new P4::HSIndexSimplifier(&refMap, &typeMap), new P4::ParsersUnroll(true, &refMap, &typeMap), new P4::ReplaceSelectRange(&refMap, &typeMap), - // DPDK architecture does not currently support predicated instructions - // new P4::Predication(&refMap), new P4::MoveDeclarations(), // more may have been introduced new P4::ConstantFolding(&refMap, &typeMap), new P4::LocalCopyPropagation(&refMap, &typeMap, nullptr, policy),