*** Pre-CBMEM romstage console overflowed, log truncated! *** REF100_CFG value: 0x7 [DEBUG] Trying CAS 11, tCK 320. [DEBUG] Found compatible clock, CAS pair. [DEBUG] Selected DRAM frequency: 800 MHz [DEBUG] Selected CAS latency : 11T [DEBUG] MPLL busy... done in 50 us [DEBUG] MPLL frequency is set at : 800 MHz [DEBUG] Selected CWL latency : 8T [DEBUG] Selected tRCD : 11T [DEBUG] Selected tRP : 11T [DEBUG] Selected tRAS : 28T [DEBUG] Selected tWR : 12T [DEBUG] Selected tFAW : 24T [DEBUG] Selected tRRD : 5T [DEBUG] Selected tRTP : 6T [DEBUG] Selected tWTR : 6T [DEBUG] Selected tRFC : 208T [DEBUG] Done dimm mapping [DEBUG] Update PCI-E configuration space: [DEBUG] PCI(0, 0, 0)[a0] = 0 [DEBUG] PCI(0, 0, 0)[a4] = 4 [DEBUG] PCI(0, 0, 0)[bc] = 82a00000 [DEBUG] PCI(0, 0, 0)[a8] = 7d600000 [DEBUG] PCI(0, 0, 0)[ac] = 4 [DEBUG] PCI(0, 0, 0)[b8] = 80000000 [DEBUG] PCI(0, 0, 0)[b0] = 80a00000 [DEBUG] PCI(0, 0, 0)[b4] = 80800000 [DEBUG] Done memory map [DEBUG] Done io registers [DEBUG] Done jedec reset [DEBUG] Done MRS commands [WARN ] Logic delay 2 greater than 1: 0 0 [WARN ] Logic delay 2 greater than 1: 0 1 [DEBUG] t123: 1767, 6000, 7620 [NOTE ] ME: Wrong mode : 2 [NOTE ] ME: FWS2: 0x160a0140 [NOTE ] ME: Bist in progress: 0x0 [NOTE ] ME: ICC Status : 0x0 [NOTE ] ME: Invoke MEBx : 0x0 [NOTE ] ME: CPU replaced : 0x0 [NOTE ] ME: MBP ready : 0x0 [NOTE ] ME: MFS failure : 0x1 [NOTE ] ME: Warm reset req : 0x0 [NOTE ] ME: CPU repl valid : 0x1 [NOTE ] ME: (Reserved) : 0x0 [NOTE ] ME: FW update req : 0x0 [NOTE ] ME: (Reserved) : 0x0 [NOTE ] ME: Current state : 0xa [NOTE ] ME: Current PM event: 0x6 [NOTE ] ME: Progress code : 0x1 [NOTE ] PASSED! Tell ME that DRAM is ready [NOTE ] ME: ME is reporting as disabled, so not waiting for a response. [NOTE ] ME: FWS2: 0x160a0140 [NOTE ] ME: Bist in progress: 0x0 [NOTE ] ME: ICC Status : 0x0 [NOTE ] ME: Invoke MEBx : 0x0 [NOTE ] ME: CPU replaced : 0x0 [NOTE ] ME: MBP ready : 0x0 [NOTE ] ME: MFS failure : 0x1 [NOTE ] ME: Warm reset req : 0x0 [NOTE ] ME: CPU repl valid : 0x1 [NOTE ] ME: (Reserved) : 0x0 [NOTE ] ME: FW update req : 0x0 [NOTE ] ME: (Reserved) : 0x0 [NOTE ] ME: Current state : 0xa [NOTE ] ME: Current PM event: 0x6 [NOTE ] ME: Progress code : 0x1 [NOTE ] ME: Requested BIOS Action: No DID Ack received [DEBUG] ME: FW Partition Table : OK [DEBUG] ME: Bringup Loader Failure : NO [DEBUG] ME: Firmware Init Complete : NO [DEBUG] ME: Manufacturing Mode : YES [DEBUG] ME: Boot Options Present : NO [DEBUG] ME: Update In Progress : NO [DEBUG] ME: Current Working State : Initializing [DEBUG] ME: Current Operation State : Bring up [DEBUG] ME: Current Operation Mode : Debug or Disabled by AltDisableBit [DEBUG] ME: Error Code : No Error [DEBUG] ME: Progress Phase : BUP Phase [DEBUG] ME: Power Management Event : Pseudo-global reset [DEBUG] ME: Progress Phase State : Check to see if straps say ME DISABLED [DEBUG] memcfg DDR3 ref clock 133 MHz [DEBUG] memcfg DDR3 clock 1596 MHz [DEBUG] memcfg channel assignment: A: 0, B 1, C 2 [DEBUG] memcfg channel[0] config (00620020): [DEBUG] ECC inactive [DEBUG] enhanced interleave mode on [DEBUG] rank interleave on [DEBUG] DIMMA 8192 MB width x8 dual rank, selected [DEBUG] DIMMB 0 MB width x8 single rank [DEBUG] memcfg channel[1] config (00620020): [DEBUG] ECC inactive [DEBUG] enhanced interleave mode on [DEBUG] rank interleave on [DEBUG] DIMMA 8192 MB width x8 dual rank, selected [DEBUG] DIMMB 0 MB width x8 single rank [DEBUG] CBMEM: [DEBUG] IMD: root @ 0x7fcff000 254 entries. [DEBUG] IMD: root @ 0x7fcfec00 62 entries. [DEBUG] FMAP: area COREBOOT found @ 90200 (11992576 bytes) [DEBUG] External stage cache: [DEBUG] IMD: root @ 0x803ff000 254 entries. [DEBUG] IMD: root @ 0x803fec00 62 entries. [DEBUG] CBMEM entry for DIMM info: 0x7fc78000 [DEBUG] SMM Memory Map [DEBUG] SMRAM : 0x80000000 0x800000 [DEBUG] Subregion 0: 0x80000000 0x300000 [DEBUG] Subregion 1: 0x80300000 0x100000 [DEBUG] Subregion 2: 0x80400000 0x400000 [DEBUG] Normal boot [INFO ] CBFS: Found 'fallback/postcar' @0x23380 size 0x7854 in mcache @0xfeff1808 [INFO ] Found TPM ST33ZP24 by ST Microelectronics [DEBUG] TPM: Extending digest for `CBFS: fallback/postcar` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: fallback/postcar` to PCR 2 measured [DEBUG] Loading module at 0x7fc6a000 with entry 0x7fc6a031. filesize: 0x72e0 memsize: 0xd620 [DEBUG] Processing 333 relocs. Offset value of 0x7dc6a000 [DEBUG] BS: romstage times (exec / console): total (unknown) / 0 ms [NOTE ] coreboot--TIMELESS--LESSTIME--Heads-v0.2.1.bis2-91-g56e7caae Thu Jan 1 00:00:00 UTC 1970 postcar starting (log level: 8)... [DEBUG] Normal boot [DEBUG] FMAP: area COREBOOT found @ 90200 (11992576 bytes) [INFO ] CBFS: Found 'fallback/ramstage' @0x3a300 size 0x1a1bf in mcache @0x7fc7d28c [INFO ] Found TPM ST33ZP24 by ST Microelectronics [DEBUG] TPM: Extending digest for `CBFS: fallback/ramstage` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: fallback/ramstage` to PCR 2 measured [DEBUG] Loading module at 0x7fc15000 with entry 0x7fc15000. filesize: 0x35f48 memsize: 0x53ad0 [DEBUG] Processing 4020 relocs. Offset value of 0x7bc15000 [DEBUG] BS: postcar times (exec / console): total (unknown) / 0 ms [NOTE ] coreboot--TIMELESS--LESSTIME--Heads-v0.2.1.bis2-91-g56e7caae Thu Jan 1 00:00:00 UTC 1970 ramstage starting (log level: 8)... [DEBUG] Normal boot [INFO ] Enumerating buses... [SPEW ] Show all devs... Before device enumeration. [SPEW ] Root Device: enabled 1 [SPEW ] CPU_CLUSTER: 0: enabled 1 [SPEW ] DOMAIN: 0000: enabled 1 [SPEW ] APIC: 00: enabled 1 [SPEW ] APIC: acac: enabled 0 [SPEW ] PCI: 00:00.0: enabled 1 [SPEW ] PCI: 00:01.0: enabled 0 [SPEW ] PCI: 00:02.0: enabled 1 [SPEW ] PCI: 00:14.0: enabled 1 [SPEW ] PCI: 00:16.0: enabled 1 [SPEW ] PCI: 00:16.1: enabled 0 [SPEW ] PCI: 00:16.2: enabled 0 [SPEW ] PCI: 00:16.3: enabled 0 [SPEW ] PCI: 00:19.0: enabled 1 [SPEW ] PCI: 00:1a.0: enabled 1 [SPEW ] PCI: 00:1b.0: enabled 1 [SPEW ] PCI: 00:1c.0: enabled 1 [SPEW ] PCI: 00:1c.1: enabled 1 [SPEW ] PCI: 00:1c.2: enabled 1 [SPEW ] PCI: 00:1c.3: enabled 0 [SPEW ] PCI: 00:1c.4: enabled 0 [SPEW ] PCI: 00:1c.5: enabled 0 [SPEW ] PCI: 00:1c.6: enabled 0 [SPEW ] PCI: 00:1c.7: enabled 0 [SPEW ] PCI: 00:1d.0: enabled 1 [SPEW ] PCI: 00:1e.0: enabled 0 [SPEW ] PCI: 00:1f.0: enabled 1 [SPEW ] PCI: 00:1f.2: enabled 1 [SPEW ] PCI: 00:1f.3: enabled 1 [SPEW ] PCI: 00:1f.5: enabled 0 [SPEW ] PCI: 00:1f.6: enabled 1 [SPEW ] PCI: 00:00.0: enabled 1 [SPEW ] PNP: 00ff.1: enabled 1 [SPEW ] PNP: 0c31.0: enabled 1 [SPEW ] PNP: 00ff.2: enabled 1 [SPEW ] I2C: 00:54: enabled 1 [SPEW ] I2C: 00:55: enabled 1 [SPEW ] I2C: 00:56: enabled 1 [SPEW ] I2C: 00:57: enabled 1 [SPEW ] I2C: 00:5c: enabled 1 [SPEW ] I2C: 00:5d: enabled 1 [SPEW ] I2C: 00:5e: enabled 1 [SPEW ] I2C: 00:5f: enabled 1 [SPEW ] Compare with tree... [SPEW ] Root Device: enabled 1 [SPEW ] CPU_CLUSTER: 0: enabled 1 [SPEW ] APIC: 00: enabled 1 [SPEW ] APIC: acac: enabled 0 [SPEW ] DOMAIN: 0000: enabled 1 [SPEW ] PCI: 00:00.0: enabled 1 [SPEW ] PCI: 00:01.0: enabled 0 [SPEW ] PCI: 00:02.0: enabled 1 [SPEW ] PCI: 00:14.0: enabled 1 [SPEW ] PCI: 00:16.0: enabled 1 [SPEW ] PCI: 00:16.1: enabled 0 [SPEW ] PCI: 00:16.2: enabled 0 [SPEW ] PCI: 00:16.3: enabled 0 [SPEW ] PCI: 00:19.0: enabled 1 [SPEW ] PCI: 00:1a.0: enabled 1 [SPEW ] PCI: 00:1b.0: enabled 1 [SPEW ] PCI: 00:1c.0: enabled 1 [SPEW ] PCI: 00:00.0: enabled 1 [SPEW ] PCI: 00:1c.1: enabled 1 [SPEW ] PCI: 00:1c.2: enabled 1 [SPEW ] PCI: 00:1c.3: enabled 0 [SPEW ] PCI: 00:1c.4: enabled 0 [SPEW ] PCI: 00:1c.5: enabled 0 [SPEW ] PCI: 00:1c.6: enabled 0 [SPEW ] PCI: 00:1c.7: enabled 0 [SPEW ] PCI: 00:1d.0: enabled 1 [SPEW ] PCI: 00:1e.0: enabled 0 [SPEW ] PCI: 00:1f.0: enabled 1 [SPEW ] PNP: 00ff.1: enabled 1 [SPEW ] PNP: 0c31.0: enabled 1 [SPEW ] PNP: 00ff.2: enabled 1 [SPEW ] PCI: 00:1f.2: enabled 1 [SPEW ] PCI: 00:1f.3: enabled 1 [SPEW ] I2C: 00:54: enabled 1 [SPEW ] I2C: 00:55: enabled 1 [SPEW ] I2C: 00:56: enabled 1 [SPEW ] I2C: 00:57: enabled 1 [SPEW ] I2C: 00:5c: enabled 1 [SPEW ] I2C: 00:5d: enabled 1 [SPEW ] I2C: 00:5e: enabled 1 [SPEW ] I2C: 00:5f: enabled 1 [SPEW ] PCI: 00:1f.5: enabled 0 [SPEW ] PCI: 00:1f.6: enabled 1 [DEBUG] Root Device scanning... [SPEW ] scan_static_bus for Root Device [DEBUG] CPU_CLUSTER: 0 enabled [DEBUG] DOMAIN: 0000 enabled [DEBUG] DOMAIN: 0000 scanning... [DEBUG] PCI: pci_scan_bus for bus 00 [SPEW ] PCI: 00:00.0 [8086/0000] ops [DEBUG] PCI: 00:00.0 [8086/0154] enabled [SPEW ] PCI: 00:01.0 [8086/0000] bus ops [DEBUG] PCI: 00:01.0 [8086/0151] disabled [SPEW ] PCI: 00:02.0 [8086/0000] ops [DEBUG] PCI: 00:02.0 [8086/0166] enabled [DEBUG] PCI: 00:04.0 [8086/0153] enabled [SPEW ] PCI: 00:14.0 [8086/0000] ops [DEBUG] PCI: 00:14.0 [8086/1e31] enabled [SPEW ] PCI: 00:16.0 [8086/1e3a] ops [DEBUG] PCI: 00:16.0 [8086/1e3a] enabled [DEBUG] PCI: 00:16.1: Disabling device [DEBUG] PCI: 00:16.2: Disabling device [DEBUG] PCI: 00:16.3: Disabling device [DEBUG] PCI: 00:19.0 [8086/1502] enabled [SPEW ] PCI: 00:1a.0 [8086/0000] ops [DEBUG] PCI: 00:1a.0 [8086/1e2d] enabled [SPEW ] PCI: 00:1b.0 [8086/0000] ops [DEBUG] PCI: 00:1b.0 [8086/1e20] enabled [INFO ] PCH: PCIe Root Port coalescing is enabled [SPEW ] PCI: 00:1c.0 [8086/0000] bus ops [DEBUG] PCI: 00:1c.0 [8086/1e10] enabled [SPEW ] PCI: 00:1c.1 [8086/0000] bus ops [DEBUG] PCI: 00:1c.1 [8086/1e12] enabled [SPEW ] PCI: 00:1c.2 [8086/0000] bus ops [DEBUG] PCI: 00:1c.2 [8086/1e14] enabled [DEBUG] PCI: 00:1c.3: Disabling device [SPEW ] PCI: 00:1c.3 [8086/0000] bus ops [DEBUG] PCI: 00:1c.3 [8086/1e16] disabled [DEBUG] PCI: 00:1c.4: Disabling device [DEBUG] PCI: 00:1c.4: check set enabled [DEBUG] PCI: 00:1c.5: Disabling device [DEBUG] PCI: 00:1c.6: Disabling device [DEBUG] PCI: 00:1c.7: Disabling device [SPEW ] PCH: RPFN 0x76543210 -> 0xfedcb210 [SPEW ] PCI: 00:1d.0 [8086/0000] ops [DEBUG] PCI: 00:1d.0 [8086/1e26] enabled [DEBUG] PCI: 00:1e.0: Disabling device [SPEW ] PCI: 00:1e.0 [8086/0000] bus ops [DEBUG] PCI: 00:1e.0 [8086/2448] disabled [SPEW ] PCI: 00:1f.0 [8086/0000] bus ops [DEBUG] PCI: 00:1f.0 [8086/1e55] enabled [SPEW ] PCI: 00:1f.2 [8086/0000] ops [DEBUG] PCI: 00:1f.2 [8086/1e01] enabled [SPEW ] PCI: 00:1f.3 [8086/0000] bus ops [DEBUG] PCI: 00:1f.3 [8086/1e22] enabled [DEBUG] PCI: 00:1f.5: Disabling device [DEBUG] PCI: 00:1f.5 [8086/1e09] disabled No operations [DEBUG] PCI: 00:1f.6 [8086/1e24] enabled [WARN ] PCI: Leftover static devices: [WARN ] PCI: 00:16.1 [WARN ] PCI: 00:16.2 [WARN ] PCI: 00:16.3 [WARN ] PCI: 00:1c.4 [WARN ] PCI: 00:1c.5 [WARN ] PCI: 00:1c.6 [WARN ] PCI: 00:1c.7 [WARN ] PCI: Check your devicetree.cb. [DEBUG] PCI: 00:1c.0 scanning... [SPEW ] do_pci_scan_bridge for PCI: 00:1c.0 [DEBUG] PCI: 00:1c.0: No LTR support [DEBUG] PCI: pci_scan_bus for bus 01 [SPEW ] PCI: 01:00.0 [1180/0000] ops [DEBUG] PCI: 01:00.0 [1180/e823] enabled [INFO ] Enabling Common Clock Configuration [INFO ] ASPM: Enabled L0s and L1 [INFO ] PCIe: Max_Payload_Size adjusted to 128 [DEBUG] PCI: 01:00.0: No LTR support [DEBUG] scan_bus: bus PCI: 00:1c.0 finished in 0 msecs [DEBUG] PCI: 00:1c.1 scanning... [SPEW ] do_pci_scan_bridge for PCI: 00:1c.1 [DEBUG] PCI: 00:1c.1: No LTR support [DEBUG] PCI: pci_scan_bus for bus 02 [DEBUG] PCI: 02:00.0 [168c/0030] enabled [INFO ] Enabling Common Clock Configuration [INFO ] ASPM: Enabled L0s and L1 [INFO ] PCIe: Max_Payload_Size adjusted to 128 [DEBUG] PCI: 02:00.0: No LTR support [DEBUG] scan_bus: bus PCI: 00:1c.1 finished in 0 msecs [DEBUG] PCI: 00:1c.2 scanning... [SPEW ] do_pci_scan_bridge for PCI: 00:1c.2 [DEBUG] PCI: 00:1c.2: No LTR support [DEBUG] PCI: pci_scan_bus for bus 03 [DEBUG] scan_bus: bus PCI: 00:1c.2 finished in 0 msecs [DEBUG] PCI: 00:1f.0 scanning... [SPEW ] scan_static_bus for PCI: 00:1f.0 [INFO ] PMH7: ID 05 Revision 12 [DEBUG] PNP: 00ff.1 enabled [DEBUG] PNP: 0c31.0 enabled [SPEW ] Clearing EC output queue... [SPEW ] EC output queue has been cleared. [SPEW ] recv_ec_data: 0x47 [SPEW ] recv_ec_data: 0x32 [SPEW ] recv_ec_data: 0x48 [SPEW ] recv_ec_data: 0x54 [SPEW ] recv_ec_data: 0x33 [SPEW ] recv_ec_data: 0x31 [SPEW ] recv_ec_data: 0x57 [SPEW ] recv_ec_data: 0x57 [SPEW ] recv_ec_data: 0x16 [SPEW ] recv_ec_data: 0x03 [SPEW ] recv_ec_data: 0x00 [SPEW ] recv_ec_data: 0x11 [INFO ] H8: EC Firmware ID G2HT31WW-3.22, Version 0.01B [SPEW ] recv_ec_data: 0x00 [SPEW ] recv_ec_data: 0x30 [SPEW ] recv_ec_data: 0x90 [INFO ] H8: BDC detection not implemented. Assuming BDC installed [SPEW ] recv_ec_data: 0x30 [INFO ] H8: WWAN not installed [SPEW ] recv_ec_data: 0x30 [SPEW ] recv_ec_data: 0x00 [SPEW ] recv_ec_data: 0xa6 [SPEW ] recv_ec_data: 0xa6 [SPEW ] recv_ec_data: 0x30 [DEBUG] PNP: 00ff.2 enabled [SPEW ] scan_static_bus for PCI: 00:1f.0 done [DEBUG] scan_bus: bus PCI: 00:1f.0 finished in 4 msecs [DEBUG] PCI: 00:1f.3 scanning... [SPEW ] scan_generic_bus for PCI: 00:1f.3 [DEBUG] I2C: 01:54 enabled [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:55 enabled [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:56 enabled [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:57 enabled [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:5c enabled [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:5d enabled [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:5e enabled [DEBUG] bus: PCI: 00:1f.3[0]->I2C: 01:5f enabled [DEBUG] bus: PCI: 00:1f.3[0]->scan_generic_bus for PCI: 00:1f.3 done [DEBUG] scan_bus: bus PCI: 00:1f.3 finished in 0 msecs [DEBUG] scan_bus: bus DOMAIN: 0000 finished in 5 msecs [SPEW ] scan_static_bus for Root Device done [DEBUG] scan_bus: bus Root Device finished in 5 msecs [INFO ] done [DEBUG] BS: BS_DEV_ENUMERATE run times (exec / console): 5 / 0 ms [DEBUG] FMAP: area RW_MRC_CACHE found @ 80000 (65536 bytes) [DEBUG] FMAP: area RW_MRC_CACHE found @ 80000 (65536 bytes) [DEBUG] MRC: Checking cached data update for 'RW_MRC_CACHE'. [DEBUG] flash size 0xc00000 bytes [INFO ] SF: Detected 00 0000 with sector size 0x100, total 0xc00000 [NOTE ] MRC: no data in 'RW_MRC_CACHE' [DEBUG] MRC: cache data 'RW_MRC_CACHE' needs update. [DEBUG] SF: Successfully written 2 bytes @ 0x80000 [DEBUG] SF: Successfully written 2 bytes @ 0x80002 [DEBUG] SF: Successfully written 16 bytes @ 0x80050 [DEBUG] SF: Successfully written 1588 bytes @ 0x80060 [DEBUG] MRC: updated 'RW_MRC_CACHE'. [INFO ] MRC: Could not find region 'UNIFIED_MRC_CACHE' [DEBUG] FMAP: area RW_MRC_CACHE found @ 80000 (65536 bytes) [INFO ] MRC: NOT enabling PRR for 'RW_MRC_CACHE'. [DEBUG] BS: BS_DEV_ENUMERATE exit times (exec / console): 11 / 0 ms [DEBUG] found VGA at PCI: 00:02.0 [DEBUG] Setting up VGA for PCI: 00:02.0 [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 [DEBUG] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device [INFO ] Allocating resources... [INFO ] Reading resources... [SPEW ] Root Device read_resources bus 0 link: 0 [SPEW ] CPU_CLUSTER: 0 read_resources bus 0 link: 0 [SPEW ] CPU_CLUSTER: 0 read_resources bus 0 link: 0 done [SPEW ] DOMAIN: 0000 read_resources bus 0 link: 0 [DEBUG] Adding PCIe enhanced config space BAR 0xf0000000-0xf4000000. [DEBUG] TOUUD 0x47d600000 TOLUD 0x82a00000 TOM 0x400000000 [DEBUG] MEBASE 0x7ffff00000 [DEBUG] IGD decoded, subtracting 32M UMA and 2M GTT [DEBUG] TSEG base 0x80000000 size 8M [DEBUG] DPR base 0x7fd00000 size 3M [INFO ] Available memory below 4GB: 2045M [INFO ] Available memory above 4GB: 14294M [SPEW ] PCI: 00:1c.0 read_resources bus 1 link: 0 [SPEW ] PCI: 00:1c.0 read_resources bus 1 link: 0 done [SPEW ] PCI: 00:1c.1 read_resources bus 2 link: 0 [SPEW ] PCI: 00:1c.1 read_resources bus 2 link: 0 done [SPEW ] PCI: 00:1c.2 read_resources bus 3 link: 0 [SPEW ] PCI: 00:1c.2 read_resources bus 3 link: 0 done [SPEW ] PCI: 00:1f.0 read_resources bus 0 link: 0 [ERROR] PNP: 00ff.1 missing read_resources [ERROR] PNP: 00ff.2 missing read_resources [SPEW ] PCI: 00:1f.0 read_resources bus 0 link: 0 done [SPEW ] PCI: 00:1f.3 read_resources bus 1 link: 0 [SPEW ] PCI: 00:1f.3 read_resources bus 1 link: 0 done [SPEW ] DOMAIN: 0000 read_resources bus 0 link: 0 done [SPEW ] Root Device read_resources bus 0 link: 0 done [INFO ] Done reading resources. [SPEW ] Show resources in subtree (Root Device)...After reading. [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0 [DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 00 [DEBUG] APIC: 00 [DEBUG] APIC: acac [DEBUG] DOMAIN: 0000 child on link 0 PCI: 00:00.0 [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000100 [DEBUG] PCI: 00:00.0 [SPEW ] PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 [SPEW ] PCI: 00:00.0 resource base 7fd00000 size 300000 align 0 gran 0 limit 0 flags f0004200 index 3 [SPEW ] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 4 [SPEW ] PCI: 00:00.0 resource base 100000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 5 [SPEW ] PCI: 00:00.0 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 6 [SPEW ] PCI: 00:00.0 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 7 [SPEW ] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 8 [SPEW ] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 9 [SPEW ] PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a [SPEW ] PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b [DEBUG] PCI: 00:01.0 [DEBUG] PCI: 00:02.0 [SPEW ] PCI: 00:02.0 resource base 0 size 400000 align 22 gran 22 limit ffffffffffffffff flags 201 index 10 [SPEW ] PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 [SPEW ] PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 [DEBUG] PCI: 00:04.0 [SPEW ] PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 [DEBUG] PCI: 00:14.0 [SPEW ] PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 [DEBUG] PCI: 00:16.0 [SPEW ] PCI: 00:16.0 resource base 0 size 10 align 12 gran 4 limit ffffffffffffffff flags 201 index 10 [DEBUG] PCI: 00:19.0 [SPEW ] PCI: 00:19.0 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 [SPEW ] PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 14 [SPEW ] PCI: 00:19.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 18 [DEBUG] PCI: 00:1a.0 [SPEW ] PCI: 00:1a.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:1b.0 [SPEW ] PCI: 00:1b.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10 [DEBUG] PCI: 00:1c.0 child on link 0 PCI: 01:00.0 [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 [SPEW ] PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 [DEBUG] PCI: 01:00.0 [SPEW ] PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:1c.1 child on link 0 PCI: 02:00.0 [SPEW ] PCI: 00:1c.1 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c [SPEW ] PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 [SPEW ] PCI: 00:1c.1 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 [DEBUG] PCI: 02:00.0 [SPEW ] PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10 [SPEW ] PCI: 02:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30 [DEBUG] PCI: 00:1c.2 [SPEW ] PCI: 00:1c.2 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c [SPEW ] PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 [SPEW ] PCI: 00:1c.2 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 [DEBUG] PCI: 00:1c.3 [DEBUG] PCI: 00:1d.0 [SPEW ] PCI: 00:1d.0 resource base 0 size 400 align 12 gran 10 limit ffffffff flags 200 index 10 [DEBUG] PCI: 00:1e.0 [DEBUG] PCI: 00:1f.0 child on link 0 PNP: 00ff.1 [SPEW ] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 [SPEW ] PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 [SPEW ] PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 [SPEW ] PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 [SPEW ] PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 [DEBUG] PNP: 00ff.1 [SPEW ] PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 [DEBUG] PNP: 0c31.0 [SPEW ] PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 [SPEW ] PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 [DEBUG] PNP: 00ff.2 [SPEW ] PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 [SPEW ] PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 [SPEW ] PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 [SPEW ] PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 [DEBUG] PCI: 00:1f.2 [SPEW ] PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10 [SPEW ] PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14 [SPEW ] PCI: 00:1f.2 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 [SPEW ] PCI: 00:1f.2 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c [SPEW ] PCI: 00:1f.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 [SPEW ] PCI: 00:1f.2 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 [DEBUG] PCI: 00:1f.3 child on link 0 I2C: 01:54 [SPEW ] PCI: 00:1f.3 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 [SPEW ] PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 [DEBUG] I2C: 01:54 [DEBUG] I2C: 01:55 [DEBUG] I2C: 01:56 [DEBUG] I2C: 01:57 [DEBUG] I2C: 01:5c [DEBUG] I2C: 01:5d [DEBUG] I2C: 01:5e [DEBUG] I2C: 01:5f [DEBUG] PCI: 00:1f.5 [DEBUG] PCI: 00:1f.6 [SPEW ] PCI: 00:1f.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [INFO ] === Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) === [DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff [DEBUG] PCI: 00:1c.0 io: size: 0 align: 12 gran: 12 limit: ffff done [DEBUG] PCI: 00:1c.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff [DEBUG] PCI: 01:00.0 10 * [0x0 - 0xff] mem [DEBUG] PCI: 00:1c.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done [DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff [DEBUG] PCI: 00:1c.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff [DEBUG] PCI: 00:1c.1 io: size: 0 align: 12 gran: 12 limit: ffff done [DEBUG] PCI: 00:1c.1 mem: size: 0 align: 20 gran: 20 limit: ffffffff [DEBUG] PCI: 02:00.0 10 * [0x0 - 0x1ffff] mem [DEBUG] PCI: 02:00.0 30 * [0x20000 - 0x2ffff] mem [DEBUG] PCI: 00:1c.1 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done [DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff [DEBUG] PCI: 00:1c.1 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [INFO ] === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) === [DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff [DEBUG] update_constraints: PCI: 00:1f.0 10000000 base 00000000 limit 00000fff io (fixed) [DEBUG] update_constraints: PCI: 00:1f.0 10000200 base 00001600 limit 0000167b io (fixed) [DEBUG] update_constraints: PCI: 00:1f.0 10000300 base 000015e0 limit 000015eb io (fixed) [DEBUG] update_constraints: PNP: 00ff.1 77 base 000015e0 limit 000015ef io (fixed) [DEBUG] update_constraints: PCI: 00:1f.3 20 base 00000400 limit 0000041f io (fixed) [INFO ] DOMAIN: 0000: Resource ranges: [INFO ] * Base: 1000, Size: 5e0, Tag: 100 [INFO ] * Base: 15f0, Size: 10, Tag: 100 [INFO ] * Base: 167c, Size: e984, Tag: 100 [DEBUG] PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io [DEBUG] PCI: 00:19.0 18 * [0x1040 - 0x105f] limit: 105f io [DEBUG] PCI: 00:1f.2 20 * [0x1060 - 0x107f] limit: 107f io [DEBUG] PCI: 00:1f.2 10 * [0x1080 - 0x1087] limit: 1087 io [DEBUG] PCI: 00:1f.2 18 * [0x1088 - 0x108f] limit: 108f io [DEBUG] PCI: 00:1f.2 14 * [0x1090 - 0x1093] limit: 1093 io [DEBUG] PCI: 00:1f.2 1c * [0x1094 - 0x1097] limit: 1097 io [DEBUG] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done [DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff [DEBUG] update_constraints: PCI: 00:00.0 60 base f0000000 limit f3ffffff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 03 base 7fd00000 limit 7fffffff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 04 base 00000000 limit 0009ffff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 05 base 00100000 limit 7fcfffff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 06 base 100000000 limit 47d5fffff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 07 base 80000000 limit 829fffff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 08 base 000a0000 limit 000bffff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 09 base 000c0000 limit 000fffff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 0a base fed90000 limit fed90fff mem (fixed) [DEBUG] update_constraints: PCI: 00:00.0 0b base fed91000 limit fed91fff mem (fixed) [DEBUG] update_constraints: PCI: 00:1f.0 10000100 base ff000000 limit ffffffff mem (fixed) [DEBUG] update_constraints: PCI: 00:1f.0 03 base fec00000 limit fec00fff mem (fixed) [DEBUG] update_constraints: PNP: 0c31.0 00 base fed40000 limit fed44fff mem (fixed) [INFO ] DOMAIN: 0000: Resource ranges: [INFO ] * Base: 82a00000, Size: 6d600000, Tag: 200 [INFO ] * Base: f4000000, Size: ac00000, Tag: 200 [INFO ] * Base: fec01000, Size: 13f000, Tag: 200 [INFO ] * Base: fed45000, Size: 4b000, Tag: 200 [INFO ] * Base: fed92000, Size: 26e000, Tag: 200 [INFO ] * Base: 47d600000, Size: b82a00000, Tag: 100200 [DEBUG] PCI: 00:02.0 18 * [0x90000000 - 0x9fffffff] limit: 9fffffff prefmem [DEBUG] PCI: 00:02.0 10 * [0x82c00000 - 0x82ffffff] limit: 82ffffff mem [DEBUG] PCI: 00:1c.0 20 * [0x82a00000 - 0x82afffff] limit: 82afffff mem [DEBUG] PCI: 00:1c.1 20 * [0x82b00000 - 0x82bfffff] limit: 82bfffff mem [DEBUG] PCI: 00:19.0 10 * [0x83000000 - 0x8301ffff] limit: 8301ffff mem [DEBUG] PCI: 00:14.0 10 * [0x83020000 - 0x8302ffff] limit: 8302ffff mem [DEBUG] PCI: 00:04.0 10 * [0x83030000 - 0x83037fff] limit: 83037fff mem [DEBUG] PCI: 00:1b.0 10 * [0x83038000 - 0x8303bfff] limit: 8303bfff mem [DEBUG] PCI: 00:19.0 14 * [0x8303c000 - 0x8303cfff] limit: 8303cfff mem [DEBUG] PCI: 00:1f.6 10 * [0x8303d000 - 0x8303dfff] limit: 8303dfff mem [DEBUG] PCI: 00:1f.2 24 * [0x8303e000 - 0x8303e7ff] limit: 8303e7ff mem [DEBUG] PCI: 00:1a.0 10 * [0x8303f000 - 0x8303f3ff] limit: 8303f3ff mem [DEBUG] PCI: 00:1d.0 10 * [0x83040000 - 0x830403ff] limit: 830403ff mem [DEBUG] PCI: 00:1f.3 10 * [0x83041000 - 0x830410ff] limit: 830410ff mem [DEBUG] PCI: 00:16.0 10 * [0x83042000 - 0x8304200f] limit: 8304200f mem [DEBUG] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: fffffffff done [DEBUG] PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff [INFO ] PCI: 00:1c.0: Resource ranges: [INFO ] * Base: 82a00000, Size: 100000, Tag: 200 [DEBUG] PCI: 01:00.0 10 * [0x82a00000 - 0x82a000ff] limit: 82a000ff mem [DEBUG] PCI: 00:1c.0 mem: base: 82a00000 size: 100000 align: 20 gran: 20 limit: 82afffff done [DEBUG] PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff [INFO ] PCI: 00:1c.1: Resource ranges: [INFO ] * Base: 82b00000, Size: 100000, Tag: 200 [DEBUG] PCI: 02:00.0 10 * [0x82b00000 - 0x82b1ffff] limit: 82b1ffff mem [DEBUG] PCI: 02:00.0 30 * [0x82b20000 - 0x82b2ffff] limit: 82b2ffff mem [DEBUG] PCI: 00:1c.1 mem: base: 82b00000 size: 100000 align: 20 gran: 20 limit: 82bfffff done [INFO ] === Resource allocator: DOMAIN: 0000 - resource allocation complete === [SPEW ] Root Device assign_resources, bus 0 link: 0 [SPEW ] DOMAIN: 0000 assign_resources, bus 0 link: 0 [DEBUG] PCI: 00:02.0 10 <- [0x0082c00000 - 0x0082ffffff] size 0x00400000 gran 0x16 mem64 [DEBUG] PCI: 00:02.0 18 <- [0x0090000000 - 0x009fffffff] size 0x10000000 gran 0x1c prefmem64 [DEBUG] PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io [DEBUG] PCI: 00:04.0 10 <- [0x0083030000 - 0x0083037fff] size 0x00008000 gran 0x0f mem64 [DEBUG] PCI: 00:14.0 10 <- [0x0083020000 - 0x008302ffff] size 0x00010000 gran 0x10 mem64 [DEBUG] PCI: 00:16.0 10 <- [0x0083042000 - 0x008304200f] size 0x00000010 gran 0x04 mem64 [DEBUG] PCI: 00:19.0 10 <- [0x0083000000 - 0x008301ffff] size 0x00020000 gran 0x11 mem [DEBUG] PCI: 00:19.0 14 <- [0x008303c000 - 0x008303cfff] size 0x00001000 gran 0x0c mem [DEBUG] PCI: 00:19.0 18 <- [0x0000001040 - 0x000000105f] size 0x00000020 gran 0x05 io [DEBUG] PCI: 00:1a.0 10 <- [0x008303f000 - 0x008303f3ff] size 0x00000400 gran 0x0a mem [DEBUG] PCI: 00:1b.0 10 <- [0x0083038000 - 0x008303bfff] size 0x00004000 gran 0x0e mem64 [DEBUG] PCI: 00:1c.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io [DEBUG] PCI: 00:1c.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem [DEBUG] PCI: 00:1c.0 20 <- [0x0082a00000 - 0x0082afffff] size 0x00100000 gran 0x14 bus 01 mem [SPEW ] PCI: 00:1c.0 assign_resources, bus 1 link: 0 [DEBUG] PCI: 01:00.0 10 <- [0x0082a00000 - 0x0082a000ff] size 0x00000100 gran 0x08 mem [SPEW ] PCI: 00:1c.0 assign_resources, bus 1 link: 0 done [DEBUG] PCI: 00:1c.1 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 02 io [DEBUG] PCI: 00:1c.1 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 02 prefmem [DEBUG] PCI: 00:1c.1 20 <- [0x0082b00000 - 0x0082bfffff] size 0x00100000 gran 0x14 bus 02 mem [SPEW ] PCI: 00:1c.1 assign_resources, bus 2 link: 0 [DEBUG] PCI: 02:00.0 10 <- [0x0082b00000 - 0x0082b1ffff] size 0x00020000 gran 0x11 mem64 [DEBUG] PCI: 02:00.0 30 <- [0x0082b20000 - 0x0082b2ffff] size 0x00010000 gran 0x10 romem [SPEW ] PCI: 00:1c.1 assign_resources, bus 2 link: 0 done [DEBUG] PCI: 00:1c.2 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 03 io [DEBUG] PCI: 00:1c.2 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 03 prefmem [DEBUG] PCI: 00:1c.2 20 <- [0x00ffffffff - 0x00fffffffe] size 0x00000000 gran 0x14 bus 03 mem [DEBUG] PCI: 00:1d.0 10 <- [0x0083040000 - 0x00830403ff] size 0x00000400 gran 0x0a mem [SPEW ] PCI: 00:1f.0 assign_resources, bus 0 link: 0 [ERROR] PNP: 00ff.1 missing set_resources [ERROR] PNP: 00ff.2 missing set_resources [SPEW ] PCI: 00:1f.0 assign_resources, bus 0 link: 0 done [DEBUG] PCI: 00:1f.2 10 <- [0x0000001080 - 0x0000001087] size 0x00000008 gran 0x03 io [DEBUG] PCI: 00:1f.2 14 <- [0x0000001090 - 0x0000001093] size 0x00000004 gran 0x02 io [DEBUG] PCI: 00:1f.2 18 <- [0x0000001088 - 0x000000108f] size 0x00000008 gran 0x03 io [DEBUG] PCI: 00:1f.2 1c <- [0x0000001094 - 0x0000001097] size 0x00000004 gran 0x02 io [DEBUG] PCI: 00:1f.2 20 <- [0x0000001060 - 0x000000107f] size 0x00000020 gran 0x05 io [DEBUG] PCI: 00:1f.2 24 <- [0x008303e000 - 0x008303e7ff] size 0x00000800 gran 0x0b mem [DEBUG] PCI: 00:1f.3 10 <- [0x0083041000 - 0x00830410ff] size 0x00000100 gran 0x08 mem64 [SPEW ] PCI: 00:1f.3 assign_resources, bus 1 link: 0 [SPEW ] PCI: 00:1f.3 assign_resources, bus 1 link: 0 done [DEBUG] PCI: 00:1f.6 10 <- [0x008303d000 - 0x008303dfff] size 0x00001000 gran 0x0c mem64 [SPEW ] DOMAIN: 0000 assign_resources, bus 0 link: 0 done [SPEW ] Root Device assign_resources, bus 0 link: 0 done [INFO ] Done setting resources. [SPEW ] Show resources in subtree (Root Device)...After assigning values. [DEBUG] Root Device child on link 0 CPU_CLUSTER: 0 [DEBUG] CPU_CLUSTER: 0 child on link 0 APIC: 00 [DEBUG] APIC: 00 [DEBUG] APIC: acac [DEBUG] DOMAIN: 0000 child on link 0 PCI: 00:00.0 [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 [SPEW ] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit fffffffff flags 40040200 index 10000100 [DEBUG] PCI: 00:00.0 [SPEW ] PCI: 00:00.0 resource base f0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 60 [SPEW ] PCI: 00:00.0 resource base 7fd00000 size 300000 align 0 gran 0 limit 0 flags f0004200 index 3 [SPEW ] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 4 [SPEW ] PCI: 00:00.0 resource base 100000 size 7fc00000 align 0 gran 0 limit 0 flags e0004200 index 5 [SPEW ] PCI: 00:00.0 resource base 100000000 size 37d600000 align 0 gran 0 limit 0 flags e0004200 index 6 [SPEW ] PCI: 00:00.0 resource base 80000000 size 2a00000 align 0 gran 0 limit 0 flags f0000200 index 7 [SPEW ] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 8 [SPEW ] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 9 [SPEW ] PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a [SPEW ] PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b [DEBUG] PCI: 00:01.0 [DEBUG] PCI: 00:02.0 [SPEW ] PCI: 00:02.0 resource base 82c00000 size 400000 align 22 gran 22 limit 82ffffff flags 60000201 index 10 [SPEW ] PCI: 00:02.0 resource base 90000000 size 10000000 align 28 gran 28 limit 9fffffff flags 60001201 index 18 [SPEW ] PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20 [DEBUG] PCI: 00:04.0 [SPEW ] PCI: 00:04.0 resource base 83030000 size 8000 align 15 gran 15 limit 83037fff flags 60000201 index 10 [DEBUG] PCI: 00:14.0 [SPEW ] PCI: 00:14.0 resource base 83020000 size 10000 align 16 gran 16 limit 8302ffff flags 60000201 index 10 [DEBUG] PCI: 00:16.0 [SPEW ] PCI: 00:16.0 resource base 83042000 size 10 align 12 gran 4 limit 8304200f flags 60000201 index 10 [DEBUG] PCI: 00:19.0 [SPEW ] PCI: 00:19.0 resource base 83000000 size 20000 align 17 gran 17 limit 8301ffff flags 60000200 index 10 [SPEW ] PCI: 00:19.0 resource base 8303c000 size 1000 align 12 gran 12 limit 8303cfff flags 60000200 index 14 [SPEW ] PCI: 00:19.0 resource base 1040 size 20 align 5 gran 5 limit 105f flags 60000100 index 18 [DEBUG] PCI: 00:1a.0 [SPEW ] PCI: 00:1a.0 resource base 8303f000 size 400 align 12 gran 10 limit 8303f3ff flags 60000200 index 10 [DEBUG] PCI: 00:1b.0 [SPEW ] PCI: 00:1b.0 resource base 83038000 size 4000 align 14 gran 14 limit 8303bfff flags 60000201 index 10 [DEBUG] PCI: 00:1c.0 child on link 0 PCI: 01:00.0 [SPEW ] PCI: 00:1c.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c [SPEW ] PCI: 00:1c.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 [SPEW ] PCI: 00:1c.0 resource base 82a00000 size 100000 align 20 gran 20 limit 82afffff flags 60080202 index 20 [DEBUG] PCI: 01:00.0 [SPEW ] PCI: 01:00.0 resource base 82a00000 size 100 align 12 gran 8 limit 82a000ff flags 60000200 index 10 [DEBUG] PCI: 00:1c.1 child on link 0 PCI: 02:00.0 [SPEW ] PCI: 00:1c.1 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c [SPEW ] PCI: 00:1c.1 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 [SPEW ] PCI: 00:1c.1 resource base 82b00000 size 100000 align 20 gran 20 limit 82bfffff flags 60080202 index 20 [DEBUG] PCI: 02:00.0 [SPEW ] PCI: 02:00.0 resource base 82b00000 size 20000 align 17 gran 17 limit 82b1ffff flags 60000201 index 10 [SPEW ] PCI: 02:00.0 resource base 82b20000 size 10000 align 16 gran 16 limit 82b2ffff flags 60002200 index 30 [DEBUG] PCI: 00:1c.2 [SPEW ] PCI: 00:1c.2 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c [SPEW ] PCI: 00:1c.2 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24 [SPEW ] PCI: 00:1c.2 resource base ffffffff size 0 align 20 gran 20 limit ffffffff flags 20080202 index 20 [DEBUG] PCI: 00:1c.3 [DEBUG] PCI: 00:1d.0 [SPEW ] PCI: 00:1d.0 resource base 83040000 size 400 align 12 gran 10 limit 830403ff flags 60000200 index 10 [DEBUG] PCI: 00:1e.0 [DEBUG] PCI: 00:1f.0 child on link 0 PNP: 00ff.1 [SPEW ] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0040100 index 10000000 [SPEW ] PCI: 00:1f.0 resource base ff000000 size 1000000 align 0 gran 0 limit 0 flags c0040200 index 10000100 [SPEW ] PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0 limit 0 flags c0000200 index 3 [SPEW ] PCI: 00:1f.0 resource base 1600 size 7c align 0 gran 0 limit 0 flags c0040100 index 10000200 [SPEW ] PCI: 00:1f.0 resource base 15e0 size c align 0 gran 0 limit 0 flags c0040100 index 10000300 [DEBUG] PNP: 00ff.1 [SPEW ] PNP: 00ff.1 resource base 15e0 size 10 align 5 gran 5 limit 0 flags 80000100 index 77 [DEBUG] PNP: 0c31.0 [SPEW ] PNP: 0c31.0 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70 [SPEW ] PNP: 0c31.0 resource base fed40000 size 5000 align 0 gran 0 limit 0 flags f0000200 index 0 [DEBUG] PNP: 00ff.2 [SPEW ] PNP: 00ff.2 resource base 62 size 0 align 0 gran 0 limit 0 flags c0000100 index 60 [SPEW ] PNP: 00ff.2 resource base 66 size 0 align 0 gran 0 limit 0 flags c0000100 index 62 [SPEW ] PNP: 00ff.2 resource base 1600 size 0 align 0 gran 0 limit 0 flags c0000100 index 64 [SPEW ] PNP: 00ff.2 resource base 1604 size 0 align 0 gran 0 limit 0 flags c0000100 index 66 [DEBUG] PCI: 00:1f.2 [SPEW ] PCI: 00:1f.2 resource base 1080 size 8 align 3 gran 3 limit 1087 flags 60000100 index 10 [SPEW ] PCI: 00:1f.2 resource base 1090 size 4 align 2 gran 2 limit 1093 flags 60000100 index 14 [SPEW ] PCI: 00:1f.2 resource base 1088 size 8 align 3 gran 3 limit 108f flags 60000100 index 18 [SPEW ] PCI: 00:1f.2 resource base 1094 size 4 align 2 gran 2 limit 1097 flags 60000100 index 1c [SPEW ] PCI: 00:1f.2 resource base 1060 size 20 align 5 gran 5 limit 107f flags 60000100 index 20 [SPEW ] PCI: 00:1f.2 resource base 8303e000 size 800 align 12 gran 11 limit 8303e7ff flags 60000200 index 24 [DEBUG] PCI: 00:1f.3 child on link 0 I2C: 01:54 [SPEW ] PCI: 00:1f.3 resource base 83041000 size 100 align 12 gran 8 limit 830410ff flags 60000201 index 10 [SPEW ] PCI: 00:1f.3 resource base 400 size 20 align 0 gran 0 limit 41f flags f0000100 index 20 [DEBUG] I2C: 01:54 [DEBUG] I2C: 01:55 [DEBUG] I2C: 01:56 [DEBUG] I2C: 01:57 [DEBUG] I2C: 01:5c [DEBUG] I2C: 01:5d [DEBUG] I2C: 01:5e [DEBUG] I2C: 01:5f [DEBUG] PCI: 00:1f.5 [DEBUG] PCI: 00:1f.6 [SPEW ] PCI: 00:1f.6 resource base 8303d000 size 1000 align 12 gran 12 limit 8303dfff flags 60000201 index 10 [INFO ] Done allocating resources. [DEBUG] BS: BS_DEV_RESOURCES run times (exec / console): 2 / 1 ms [INFO ] Enabling resources... [DEBUG] PCI: 00:00.0 subsystem <- 8086/0154 [DEBUG] PCI: 00:00.0 cmd <- 06 [DEBUG] PCI: 00:02.0 subsystem <- 8086/0166 [DEBUG] PCI: 00:02.0 cmd <- 03 [DEBUG] PCI: 00:04.0 cmd <- 02 [DEBUG] PCI: 00:14.0 subsystem <- 8086/1e31 [DEBUG] PCI: 00:14.0 cmd <- 102 [DEBUG] PCI: 00:16.0 subsystem <- 8086/1e3a [DEBUG] PCI: 00:16.0 cmd <- 02 [DEBUG] PCI: 00:19.0 subsystem <- 17aa/21f3 [DEBUG] PCI: 00:19.0 cmd <- 103 [DEBUG] PCI: 00:1a.0 subsystem <- 8086/1e2d [DEBUG] PCI: 00:1a.0 cmd <- 102 [DEBUG] PCI: 00:1b.0 subsystem <- 8086/1e20 [DEBUG] PCI: 00:1b.0 cmd <- 102 [DEBUG] PCI: 00:1c.0 bridge ctrl <- 0013 [DEBUG] PCI: 00:1c.0 subsystem <- 8086/1e10 [DEBUG] PCI: 00:1c.0 cmd <- 106 [DEBUG] PCI: 00:1c.1 bridge ctrl <- 0013 [DEBUG] PCI: 00:1c.1 subsystem <- 8086/1e12 [DEBUG] PCI: 00:1c.1 cmd <- 106 [DEBUG] PCI: 00:1c.2 bridge ctrl <- 0013 [DEBUG] PCI: 00:1c.2 subsystem <- 8086/1e14 [DEBUG] PCI: 00:1c.2 cmd <- 100 [DEBUG] PCI: 00:1d.0 subsystem <- 8086/1e26 [DEBUG] PCI: 00:1d.0 cmd <- 102 [DEBUG] PCI: 00:1f.0 subsystem <- 8086/1e55 [DEBUG] PCI: 00:1f.0 cmd <- 107 [DEBUG] PCI: 00:1f.2 subsystem <- 8086/1e03 [DEBUG] PCI: 00:1f.2 cmd <- 03 [DEBUG] PCI: 00:1f.3 subsystem <- 8086/1e22 [DEBUG] PCI: 00:1f.3 cmd <- 103 [DEBUG] PCI: 00:1f.6 subsystem <- 8086/1e24 [DEBUG] PCI: 00:1f.6 cmd <- 02 [DEBUG] PCI: 01:00.0 subsystem <- 1180/e823 [DEBUG] PCI: 01:00.0 cmd <- 06 [DEBUG] PCI: 02:00.0 cmd <- 02 [INFO ] done. [INFO ] Initializing devices... [DEBUG] CPU_CLUSTER: 0 init [DEBUG] MTRR: Physical address space: [DEBUG] 0x0000000000000000 - 0x000000000009ffff size 0x000a0000 type 6 [DEBUG] 0x00000000000a0000 - 0x00000000000bffff size 0x00020000 type 0 [DEBUG] 0x00000000000c0000 - 0x000000007fffffff size 0x7ff40000 type 6 [DEBUG] 0x0000000080000000 - 0x000000008fffffff size 0x10000000 type 0 [DEBUG] 0x0000000090000000 - 0x000000009fffffff size 0x10000000 type 1 [DEBUG] 0x00000000a0000000 - 0x00000000ffffffff size 0x60000000 type 0 [DEBUG] 0x0000000100000000 - 0x000000047d5fffff size 0x37d600000 type 6 [DEBUG] MTRR: Fixed MSR 0x250 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x258 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x259 0x0000000000000000 [DEBUG] MTRR: Fixed MSR 0x268 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x269 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x26a 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x26b 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x26c 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x26d 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x26e 0x0606060606060606 [DEBUG] MTRR: Fixed MSR 0x26f 0x0606060606060606 [SPEW ] call enable_fixed_mtrr() [DEBUG] CPU physical address size: 36 bits [DEBUG] MTRR: default type WB/UC MTRR counts: 4/5. [DEBUG] MTRR: WB selected as default type. [DEBUG] MTRR: 0 base 0x0000000080000000 mask 0x0000000ff0000000 type 0 [DEBUG] MTRR: 1 base 0x0000000090000000 mask 0x0000000ff0000000 type 1 [DEBUG] MTRR: 2 base 0x00000000a0000000 mask 0x0000000fe0000000 type 0 [DEBUG] MTRR: 3 base 0x00000000c0000000 mask 0x0000000fc0000000 type 0 [DEBUG] MTRR check [DEBUG] Fixed MTRRs : Enabled [DEBUG] Variable MTRRs: Enabled [DEBUG] CPU has 2 cores, 4 threads enabled. [DEBUG] Setting up SMI for CPU [INFO ] Will perform SMM setup. [DEBUG] FMAP: area COREBOOT found @ 90200 (11992576 bytes) [INFO ] CBFS: Found 'cpu_microcode_blob.bin' @0x16700 size 0x6800 in mcache @0x7fc7d0ac [INFO ] Found TPM ST33ZP24 by ST Microelectronics [DEBUG] TPM: Extending digest for `CBFS: cpu_microcode_blob.bin` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: cpu_microcode_blob.bin` to PCR 2 measured [DEBUG] microcode: sig=0x306a9 pf=0x10 revision=0x21 [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. [INFO ] LAPIC 0x0 in XAPIC mode. [DEBUG] Loading module at 0x00030000 with entry 0x00030000. filesize: 0x178 memsize: 0x178 [DEBUG] Processing 18 relocs. Offset value of 0x00030000 [DEBUG] Attempting to start 3 APs [DEBUG] Waiting for 10ms after sending INIT. [DEBUG] Waiting for SIPI to complete... [DEBUG] done. [DEBUG] Waiting for SIPI to complete... [DEBUG] done. [INFO ] LAPIC 0x1 in XAPIC mode. [INFO ] AP: slot 1 apic_id 1, MCU rev: 0x00000021 [INFO ] LAPIC 0x3 in XAPIC mode. [INFO ] LAPIC 0x2 in XAPIC mode. [INFO ] AP: slot 2 apic_id 3, MCU rev: 0x00000021 [INFO ] AP: slot 3 apic_id 2, MCU rev: 0x00000021 [SPEW ] smm_setup_relocation_handler: enter [SPEW ] smm_setup_relocation_handler: exit [DEBUG] Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1e8 memsize: 0x1e8 [DEBUG] Processing 11 relocs. Offset value of 0x00038000 [DEBUG] smm_module_setup_stub: stack_top = 0x80001000 [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400 [DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x10000 [DEBUG] SMM Module: stub loaded at 38000. Will call 0x7fc2e869 [DEBUG] Installing permanent SMM handler to 0x80000000 [DEBUG] fx_save [0x802ff800-0x80300000[ [DEBUG] smihandler [0x802fe000-0x802ff4a8[ [DEBUG] -------------NEW CODE SEGMENT -------------- [DEBUG] CPU 0x0 [DEBUG] Stub [0x802f6000-0x802f61e8[ [DEBUG] Save state [0x802fdc00-0x802fe000[ [DEBUG] CPU 0x1 [DEBUG] Stub [0x802f5c00-0x802f5de8[ [DEBUG] Save state [0x802fd800-0x802fdc00[ [DEBUG] CPU 0x2 [DEBUG] Stub [0x802f5800-0x802f59e8[ [DEBUG] Save state [0x802fd400-0x802fd800[ [DEBUG] CPU 0x3 [DEBUG] Stub [0x802f5400-0x802f55e8[ [DEBUG] Save state [0x802fd000-0x802fd400[ [DEBUG] cpu stacks [0x80000000-0x80001000[ [DEBUG] Loading module at 0x802fe000 with entry 0x802fe330. filesize: 0x1490 memsize: 0x14a8 [DEBUG] Processing 68 relocs. Offset value of 0x802fe000 [DEBUG] Loading module at 0x802f6000 with entry 0x802f6000. filesize: 0x1e8 memsize: 0x1e8 [DEBUG] Processing 11 relocs. Offset value of 0x802f6000 [DEBUG] smm_module_setup_stub: stack_top = 0x80001000 [DEBUG] smm_module_setup_stub: per cpu stack_size = 0x400 [DEBUG] smm_module_setup_stub: runtime.start32_offset = 0x4c [DEBUG] smm_module_setup_stub: runtime.smm_size = 0x300000 [DEBUG] SMM Module: placing smm entry code at 802f5c00, cpu # 0x1 [DEBUG] smm_place_entry_code: copying from 802f6000 to 802f5c00 0x1e8 bytes [DEBUG] SMM Module: placing smm entry code at 802f5800, cpu # 0x2 [DEBUG] smm_place_entry_code: copying from 802f6000 to 802f5800 0x1e8 bytes [DEBUG] SMM Module: placing smm entry code at 802f5400, cpu # 0x3 [DEBUG] smm_place_entry_code: copying from 802f6000 to 802f5400 0x1e8 bytes [DEBUG] SMM Module: stub loaded at 802f6000. Will call 0x802fe330 [DEBUG] Initializing southbridge SMI... ... pmbase = 0x0500 [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ee000, cpu = 0 [DEBUG] In relocation handler: cpu 0 [DEBUG] New SMBASE=0x802ee000 IEDBASE=0x80400000 [SPEW ] SMM revision: 0x00030101 [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 [DEBUG] Relocation complete. [INFO ] microcode: Update skipped, already up-to-date [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802edc00, cpu = 1 [DEBUG] In relocation handler: cpu 1 [DEBUG] New SMBASE=0x802edc00 IEDBASE=0x80400000 [SPEW ] SMM revision: 0x00030101 [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 [DEBUG] Relocation complete. [INFO ] microcode: Update skipped, already up-to-date [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed400, cpu = 3 [DEBUG] In relocation handler: cpu 3 [DEBUG] New SMBASE=0x802ed400 IEDBASE=0x80400000 [SPEW ] SMM revision: 0x00030101 [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 [DEBUG] Relocation complete. [INFO ] microcode: Update skipped, already up-to-date [INFO ] smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x802ed800, cpu = 2 [DEBUG] In relocation handler: cpu 2 [DEBUG] New SMBASE=0x802ed800 IEDBASE=0x80400000 [SPEW ] SMM revision: 0x00030101 [DEBUG] Writing SMRR. base = 0x80000006, mask=0xff800800 [DEBUG] Relocation complete. [INFO ] microcode: Update skipped, already up-to-date [INFO ] Initializing CPU #0 [DEBUG] CPU: vendor Intel device 306a9 [DEBUG] CPU: family 06, model 3a, stepping 09 [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. [INFO ] CPU: platform id 4 [INFO ] CPU: cpuid(1) 0x306a9 [INFO ] CPU: AES supported [INFO ] CPU: TXT supported [INFO ] CPU: VT supported [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] cpu: energy policy set to 6 [DEBUG] model_x06ax: frequency set to 2900 [INFO ] Turbo is available but hidden [INFO ] Turbo is available and visible [INFO ] CPU #0 initialized [INFO ] Initializing CPU #1 [INFO ] Initializing CPU #3 [INFO ] Initializing CPU #2 [DEBUG] CPU: vendor Intel device 306a9 [DEBUG] CPU: vendor Intel device 306a9 [DEBUG] CPU: family 06, model 3a, stepping 09 [DEBUG] CPU: family 06, model 3a, stepping 09 [DEBUG] CPU: vendor Intel device 306a9 [DEBUG] CPU: family 06, model 3a, stepping 09 [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. [INFO ] CPU: platform id 4 [INFO ] CPU: cpuid(1) 0x306a9 [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. [INFO ] CPU: AES supported [INFO ] CPU: TXT supported [INFO ] CPU: VT supported [INFO ] CPU: platform id 4 [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [INFO ] CPU: cpuid(1) 0x306a9 [DEBUG] IA32_FEATURE_CONTROL already locked [INFO ] CPU: AES supported [INFO ] CPU: TXT supported [INFO ] CPU: VT supported [INFO ] CPU: Intel(R) Core(TM) i7-3520M CPU @ 2.90GHz. [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [INFO ] CPU: platform id 4 [INFO ] CPU: cpuid(1) 0x306a9 [DEBUG] IA32_FEATURE_CONTROL already locked [INFO ] CPU: AES supported [INFO ] CPU: TXT supported [INFO ] CPU: VT supported [DEBUG] cpu: energy policy set to 6 [DEBUG] IA32_FEATURE_CONTROL already locked; VMX status: enabled [DEBUG] model_x06ax: frequency set to 2900 [INFO ] CPU #2 initialized [DEBUG] IA32_FEATURE_CONTROL already locked [DEBUG] cpu: energy policy set to 6 [DEBUG] model_x06ax: frequency set to 2900 [INFO ] CPU #3 initialized [DEBUG] cpu: energy policy set to 6 [DEBUG] model_x06ax: frequency set to 2900 [INFO ] CPU #1 initialized [DEBUG] CPU 1 going down... [INFO ] bsp_do_flight_plan done after 10 msecs. [DEBUG] CPU 3 going down... [DEBUG] CPU 2 going down... [DEBUG] Initializing southbridge SMI... ... pmbase = 0x0500 [DEBUG] SMI_STS: [SPEW ] PM1_STS: [SPEW ] PM1_EN: 0 [DEBUG] GPE0_STS: GPIO15 GPIO14 GPIO11 GPIO9 GPIO7 GPIO5 GPIO4 GPIO3 GPIO0 [DEBUG] ALT_GP_SMI_STS: GPI14 GPI13 GPI11 GPI10 GPI9 GPI7 GPI6 GPI5 GPI4 GPI3 GPI1 GPI0 [DEBUG] TCO_STS: [DEBUG] Locking SMM. [DEBUG] CPU_CLUSTER: 0 init finished in 48 msecs [DEBUG] PCI: 00:00.0 init [DEBUG] Disabling PEG12. [DEBUG] Disabling PEG11. [DEBUG] Disabling PEG10. [DEBUG] Disabling PEG60. [DEBUG] Disabling Device 7. [DEBUG] Disabling PEG IO clock. [DEBUG] Set BIOS_RESET_CPL [DEBUG] CPU TDP: 35 Watts [DEBUG] PCI: 00:00.0 init finished in 1 msecs [DEBUG] PCI: 00:02.0 init [INFO ] CBFS: Found 'vbt.bin' @0x22540 size 0x599 in mcache @0x7fc7d1b0 [DEBUG] TPM: Extending digest for `CBFS: vbt.bin` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: vbt.bin` to PCR 2 measured [INFO ] Found a VBT of 4281 bytes after decompression [INFO ] GMA: Found VBT in CBFS [INFO ] GMA: Found valid VBT in CBFS [DEBUG] GT Power Management Init [DEBUG] IVB GT2 25W-35W Power Meter Weights [DEBUG] GT Power Management Init (post VBIOS) [DEBUG] PCI: 00:02.0 init finished in 8 msecs [DEBUG] PCI: 00:04.0 init [DEBUG] PCI: 00:04.0 init finished in 0 msecs [DEBUG] PCI: 00:14.0 init [DEBUG] XHCI: Setting up controller.. done. [DEBUG] PCI: 00:14.0 init finished in 0 msecs [DEBUG] PCI: 00:16.0 init [DEBUG] ME: FW Partition Table : OK [DEBUG] ME: Bringup Loader Failure : NO [DEBUG] ME: Firmware Init Complete : NO [DEBUG] ME: Manufacturing Mode : YES [DEBUG] ME: Boot Options Present : NO [DEBUG] ME: Update In Progress : NO [DEBUG] ME: Current Working State : Initializing [DEBUG] ME: Current Operation State : Bring up [DEBUG] ME: Current Operation Mode : Debug or Disabled by AltDisableBit [DEBUG] ME: Error Code : No Error [DEBUG] ME: Progress Phase : BUP Phase [DEBUG] ME: Power Management Event : Pseudo-global reset [DEBUG] ME: Progress Phase State : Check to see if straps say ME DISABLED [CRIT ] intel_me_path: mbp is not ready! [NOTE ] ME: BIOS path: Error [DEBUG] ME: me_state=0, me_state_prev=0 [DEBUG] PCI: 00:16.0 init finished in 0 msecs [DEBUG] PCI: 00:19.0 init [DEBUG] PCI: 00:19.0 init finished in 0 msecs [DEBUG] PCI: 00:1a.0 init [DEBUG] EHCI: Setting up controller.. done. [DEBUG] PCI: 00:1a.0 init finished in 0 msecs [DEBUG] PCI: 00:1b.0 init [DEBUG] Azalia: base = 0x83038000 [DEBUG] Azalia: codec_mask = 09 [DEBUG] azalia_audio: Initializing codec #3 [DEBUG] azalia_audio: codec viddid: 80862806 [DEBUG] azalia_audio: verb_size: 16 [DEBUG] azalia_audio: verb loaded. [DEBUG] azalia_audio: Initializing codec #0 [DEBUG] azalia_audio: codec viddid: 10ec0269 [DEBUG] azalia_audio: verb_size: 76 [DEBUG] azalia_audio: verb loaded. [DEBUG] PCI: 00:1b.0 init finished in 5 msecs [DEBUG] PCI: 00:1c.0 init [DEBUG] Initializing PCH PCIe bridge. [DEBUG] PCI: 00:1c.0 init finished in 0 msecs [DEBUG] PCI: 00:1c.1 init [DEBUG] Initializing PCH PCIe bridge. [DEBUG] PCI: 00:1c.1 init finished in 0 msecs [DEBUG] PCI: 00:1c.2 init [DEBUG] Initializing PCH PCIe bridge. [DEBUG] PCI: 00:1c.2 init finished in 0 msecs [DEBUG] PCI: 00:1d.0 init [DEBUG] EHCI: Setting up controller.. done. [DEBUG] PCI: 00:1d.0 init finished in 0 msecs [DEBUG] PCI: 00:1f.0 init [DEBUG] pch: lpc_init [INFO ] PCH: detected QM77, device id: 0x1e55, rev id 0x4 [DEBUG] IOAPIC: Initializing IOAPIC at 0xfec00000 [DEBUG] IOAPIC: ID = 0x02 [SPEW ] IOAPIC: Dumping registers [SPEW ] reg 0x0000: 0x02000000 [SPEW ] reg 0x0001: 0x00170020 [SPEW ] reg 0x0002: 0x00170020 [DEBUG] IOAPIC: 24 interrupts [DEBUG] IOAPIC: Clearing IOAPIC at 0xfec00000 [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x01 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x02 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x03 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x04 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x05 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x06 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x07 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x08 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x09 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0a value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0b value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0c value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0d value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0e value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x0f value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x10 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x11 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x12 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x13 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x14 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x15 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x16 value 0x00000000 0x00010000 [SPEW ] IOAPIC: vector 0x17 value 0x00000000 0x00010000 [DEBUG] IOAPIC: Bootstrap Processor Local APIC = 0x00 [SPEW ] IOAPIC: vector 0x00 value 0x00000000 0x00000700 [INFO ] Set power off after power failure. [INFO ] NMI sources disabled. [DEBUG] PantherPoint PM init [DEBUG] RTC: failed = 0x0 [DEBUG] RTC Init [DEBUG] apm_control: Disabling ACPI. [DEBUG] APMC done. [DEBUG] pch_spi_init [DEBUG] PCI: 00:1f.0 init finished in 0 msecs [DEBUG] PCI: 00:1f.2 init [DEBUG] SATA: Initializing... [DEBUG] SATA: Controller in AHCI mode. [DEBUG] ABAR: 0x8303e000 [DEBUG] PCI: 00:1f.2 init finished in 0 msecs [DEBUG] PCI: 00:1f.3 init [DEBUG] PCI: 00:1f.3 init finished in 0 msecs [DEBUG] PCI: 00:1f.6 init [DEBUG] PCI: 00:1f.6 init finished in 0 msecs [DEBUG] PCI: 01:00.0 init [DEBUG] PCI: 01:00.0 init finished in 0 msecs [DEBUG] PCI: 02:00.0 init [DEBUG] PCI: 02:00.0 init finished in 0 msecs [DEBUG] PNP: 00ff.2 init [DEBUG] Keyboard init... [INFO ] Keyboard controller output buffer result timeout [DEBUG] PS/2 keyboard initialized on primary channel [DEBUG] PNP: 00ff.2 init finished in 511 msecs [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:54 init [DEBUG] I2C: 01:54 init finished in 0 msecs [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:55 init [DEBUG] I2C: 01:55 init finished in 0 msecs [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:56 init [DEBUG] I2C: 01:56 init finished in 0 msecs [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:57 init [DEBUG] I2C: 01:57 init finished in 0 msecs [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:5c init [DEBUG] Locking EEPROM RFID [DEBUG] init EEPROM done [DEBUG] I2C: 01:5c init finished in 23 msecs [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:5d init [DEBUG] I2C: 01:5d init finished in 0 msecs [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:5e init [DEBUG] I2C: 01:5e init finished in 0 msecs [DEBUG] smbus: PCI: 00:1f.3[0]->I2C: 01:5f init [DEBUG] I2C: 01:5f init finished in 0 msecs [INFO ] Devices initialized [SPEW ] Show all devs... After init. [SPEW ] Root Device: enabled 1 [SPEW ] CPU_CLUSTER: 0: enabled 1 [SPEW ] DOMAIN: 0000: enabled 1 [SPEW ] APIC: 00: enabled 1 [SPEW ] APIC: acac: enabled 0 [SPEW ] PCI: 00:00.0: enabled 1 [SPEW ] PCI: 00:01.0: enabled 0 [SPEW ] PCI: 00:02.0: enabled 1 [SPEW ] PCI: 00:14.0: enabled 1 [SPEW ] PCI: 00:16.0: enabled 1 [SPEW ] PCI: 00:16.1: enabled 0 [SPEW ] PCI: 00:16.2: enabled 0 [SPEW ] PCI: 00:16.3: enabled 0 [SPEW ] PCI: 00:19.0: enabled 1 [SPEW ] PCI: 00:1a.0: enabled 1 [SPEW ] PCI: 00:1b.0: enabled 1 [SPEW ] PCI: 00:1c.0: enabled 1 [SPEW ] PCI: 00:1c.1: enabled 1 [SPEW ] PCI: 00:1c.2: enabled 1 [SPEW ] PCI: 00:1c.3: enabled 0 [SPEW ] PCI: 00:1c.4: enabled 0 [SPEW ] PCI: 00:1c.5: enabled 0 [SPEW ] PCI: 00:1c.6: enabled 0 [SPEW ] PCI: 00:1c.7: enabled 0 [SPEW ] PCI: 00:1d.0: enabled 1 [SPEW ] PCI: 00:1e.0: enabled 0 [SPEW ] PCI: 00:1f.0: enabled 1 [SPEW ] PCI: 00:1f.2: enabled 1 [SPEW ] PCI: 00:1f.3: enabled 1 [SPEW ] PCI: 00:1f.5: enabled 0 [SPEW ] PCI: 00:1f.6: enabled 1 [SPEW ] PCI: 01:00.0: enabled 1 [SPEW ] PNP: 00ff.1: enabled 1 [SPEW ] PNP: 0c31.0: enabled 1 [SPEW ] PNP: 00ff.2: enabled 1 [SPEW ] I2C: 01:54: enabled 1 [SPEW ] I2C: 01:55: enabled 1 [SPEW ] I2C: 01:56: enabled 1 [SPEW ] I2C: 01:57: enabled 1 [SPEW ] I2C: 01:5c: enabled 1 [SPEW ] I2C: 01:5d: enabled 1 [SPEW ] I2C: 01:5e: enabled 1 [SPEW ] I2C: 01:5f: enabled 1 [SPEW ] PCI: 00:04.0: enabled 1 [SPEW ] PCI: 02:00.0: enabled 1 [SPEW ] APIC: 01: enabled 1 [SPEW ] APIC: 03: enabled 1 [SPEW ] APIC: 02: enabled 1 [DEBUG] BS: BS_DEV_INIT run times (exec / console): 598 / 1 ms [INFO ] TEE-TXT: Initializing TEE... [INFO ] TXT-STS: ACM verification successful [INFO ] TXT-STS: IBB not measured [INFO ] TXT-STS: TXT is not disabled [INFO ] TXT-STS: BIOS is not trusted [INFO ] TEE-TXT: State of ACM and ucode update: [INFO ] TEE-TXT: Chipset Key Hash 0x82d8c45fef2b9c992d4aef4104243773d1cb65033330d95d1d3d53f6fa1ffdb [INFO ] TEE-TXT: DIDVID 0xb0018086 [INFO ] TEE-TXT: production fused chipset: true [INFO ] TEE-TXT: Validate TEE... [DEBUG] TEE-TXT: CPU supports SMX: true [DEBUG] TEE-TXT: CPU supports VMX: true [DEBUG] TEE-TXT: IA32_FEATURE_CONTROL [DEBUG] VMXON in SMX enable: true [DEBUG] VMXON outside SMX enable: true [DEBUG] register is locked: true [DEBUG] GETSEC (all instructions) is enabled: true [DEBUG] TEE-TXT: GETSEC[CAPABILITIES] returned: [DEBUG] TXT capable chipset: true [DEBUG] ENTERACCS available: true [DEBUG] EXITAC available: true [DEBUG] SENTER available: true [DEBUG] SEXIT available: true [DEBUG] PARAMETERS available: true [DEBUG] SMCTRL available: true [DEBUG] WAKEUP available: true [DEBUG] TEE-TXT: GETSEC[PARAMETERS] returned: [DEBUG] ACM Version comparison mask: ffffffff [DEBUG] ACM Version numbers supported: 00000000 [DEBUG] Max size of authenticated code execution area: 00010000 [DEBUG] External memory types supported during AC mode: 00000303 [DEBUG] Selective SENTER functionality control: 3f [DEBUG] Feature Extensions Flags: 00000040 [DEBUG] S-CRTM Capability rooted in: BIOS [DEBUG] Machine Check Register: preserved [DEBUG] TEE-TXT: Machine Check Register: preserved [INFO ] TEE-TXT: Scheck... [INFO ] CBFS: Found 'txt_bios_acm.bin' @0x2fdc0 size 0xa500 in mcache @0x7fc7d24c [DEBUG] TPM: Extending digest for `CBFS: txt_bios_acm.bin` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: txt_bios_acm.bin` to PCR 2 measured [INFO ] ACM @ 0xff4c0000 [INFO ] ACM: Binary Info [INFO ] Type: Chipset ACM [INFO ] Subtype: undefined [INFO ] Header: v0.0 [INFO ] Chipset: b001 [INFO ] Size: 42240 [INFO ] Flags: PW signed (Production Worthy) [INFO ] Vendor: Intel Corporation [INFO ] Date: 20111108 [INFO ] Size: 0x00002940 [INFO ] TXT SVN: 0 [INFO ] SE SVN: 0 [INFO ] Table info: [INFO ] UUID: AA 3A C0 7F A7 46 DB 18 2E AC 69 8F 8D 41 7F 5A [INFO ] Chipset acm type: 0x0 [INFO ] Capabilities: 0x0 [DEBUG] BS: BS_DEV_INIT exit times (exec / console): 161 / 0 ms [INFO ] Finalize devices... [DEBUG] PCI: 00:1f.0 final [DEBUG] apm_control: Finalizing SMM. [DEBUG] APMC done. [INFO ] Devices finalized [INFO ] TEE-TXT: DPR capable 1 [DEBUG] TEE-TXT: MCH DPR 0x80000037 [DEBUG] TEE-TXT: MCH DPR base @ 0x7fd00000 size 3 MiB [INFO ] TEE-TXT: TXT.DPR 0x80000031 [INFO ] CBFS: Found 'txt_sinit_acm.bin' @0x1cf40 size 0x13c0 in mcache @0x7fc7d0dc [WARN ] CBFS: 'txt_bios_policy.bin' not found. [ERROR] TEE-TXT: Couldn't locate LCP PD Policy in CBFS. [INFO ] CBFS: Found 'txt_sinit_acm.bin' @0x1cf40 size 0x13c0 in mcache @0x7fc7d0dc [DEBUG] TPM: Extending digest for `CBFS: txt_sinit_acm.bin` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: txt_sinit_acm.bin` to PCR 2 measured [INFO ] TEE-TXT: Placing SINIT ACM in memory. [INFO ] ACM @ 0x7ff00000 [INFO ] ACM: Binary Info [INFO ] Type: Chipset ACM [INFO ] Subtype: undefined [INFO ] Header: v0.0 [INFO ] Chipset: b001 [INFO ] Size: 65536 [INFO ] Flags: PW signed (Production Worthy) [INFO ] Vendor: Intel Corporation [INFO ] Date: 20130211 [INFO ] Size: 64KB [INFO ] CBnT: no [INFO ] TXT SVN: 1 [INFO ] SE SVN: 0 [INFO ] Table info: [INFO ] UUID: AA 3A C0 7F A7 46 DB 18 2E AC 69 8F 8D 41 7F 5A [INFO ] Chipset acm type: 0x9 [INFO ] Capabilities: 0x0 [INFO ] CBFS: Found 'txt_bios_acm.bin' @0x2fdc0 size 0xa500 in mcache @0x7fc7d24c [DEBUG] TPM: Extending digest for `CBFS: txt_bios_acm.bin` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: txt_bios_acm.bin` to PCR 2 measured [DEBUG] TEE-TXT: TSEG 0x80000000, size 8 MiB [DEBUG] TEE-TXT: TXT.HEAP.BASE 0x7ff20000 [DEBUG] TEE-TXT: TXT.HEAP.SIZE 0xe0000 [DEBUG] TEE-TXT: TXT.SINIT.BASE 0x7ff00000 [DEBUG] TEE-TXT: TXT.SINIT.SIZE 0x20000 [DEBUG] TEE-TXT: TXT.MSEG.BASE 0x0 [DEBUG] TEE-TXT: TXT.MSEG.SIZE 0x0 [DEBUG] TEE-TXT: BiosDataRegion.bios_sinit_size 0x10000 [DEBUG] TEE-TXT: BiosDataRegion.lcp_pd_size 0x0 [DEBUG] TEE-TXT: BiosDataRegion.lcp_pd_base 0x0 [DEBUG] BS: BS_POST_DEVICE exit times (exec / console): 47 / 0 ms [INFO ] CBFS: Found 'fallback/dsdt.aml' @0x1ec00 size 0x38fa in mcache @0x7fc7d184 [DEBUG] TPM: Extending digest for `CBFS: fallback/dsdt.aml` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: fallback/dsdt.aml` to PCR 2 measured [WARN ] CBFS: 'fallback/slic' not found. [INFO ] ACPI: Writing ACPI tables at 7fbd4000. [DEBUG] ACPI: * FACS [DEBUG] ACPI: * DSDT [DEBUG] ACPI: * FADT [DEBUG] ACPI: added table 1/32, length now 40 [DEBUG] ACPI: * SSDT [DEBUG] Found 1 CPU(s) with 4 core(s) each. [DEBUG] PSS: 2901MHz power 35000 control 0x2400 status 0x2400 [DEBUG] PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00 [DEBUG] PSS: 2400MHz power 27295 control 0x1800 status 0x1800 [DEBUG] PSS: 2000MHz power 21703 control 0x1400 status 0x1400 [DEBUG] PSS: 1600MHz power 16527 control 0x1000 status 0x1000 [DEBUG] PSS: 1200MHz power 11795 control 0xc00 status 0xc00 [DEBUG] PSS: 2901MHz power 35000 control 0x2400 status 0x2400 [DEBUG] PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00 [DEBUG] PSS: 2400MHz power 27295 control 0x1800 status 0x1800 [DEBUG] PSS: 2000MHz power 21703 control 0x1400 status 0x1400 [DEBUG] PSS: 1600MHz power 16527 control 0x1000 status 0x1000 [DEBUG] PSS: 1200MHz power 11795 control 0xc00 status 0xc00 [DEBUG] PSS: 2901MHz power 35000 control 0x2400 status 0x2400 [DEBUG] PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00 [DEBUG] PSS: 2400MHz power 27295 control 0x1800 status 0x1800 [DEBUG] PSS: 2000MHz power 21703 control 0x1400 status 0x1400 [DEBUG] PSS: 1600MHz power 16527 control 0x1000 status 0x1000 [DEBUG] PSS: 1200MHz power 11795 control 0xc00 status 0xc00 [DEBUG] PSS: 2901MHz power 35000 control 0x2400 status 0x2400 [DEBUG] PSS: 2900MHz power 35000 control 0x1d00 status 0x1d00 [DEBUG] PSS: 2400MHz power 27295 control 0x1800 status 0x1800 [DEBUG] PSS: 2000MHz power 21703 control 0x1400 status 0x1400 [DEBUG] PSS: 1600MHz power 16527 control 0x1000 status 0x1000 [DEBUG] PSS: 1200MHz power 11795 control 0xc00 status 0xc00 [DEBUG] PCI space above 4GB MMIO is at 0x47d600001, len = 0xb829fffff [DEBUG] Generating ACPI PIRQ entries [SPEW ] ACPI_PIRQ_GEN: PCI: 00:02.0: pin=0 pirq=0 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:04.0: pin=0 pirq=0 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:14.0: pin=0 pirq=1 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:16.0: pin=0 pirq=0 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:19.0: pin=0 pirq=1 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1a.0: pin=0 pirq=3 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1b.0: pin=0 pirq=3 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1c.0: pin=0 pirq=0 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1c.1: pin=1 pirq=1 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1c.2: pin=2 pirq=2 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1d.0: pin=0 pirq=2 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1f.2: pin=0 pirq=0 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1f.3: pin=1 pirq=0 [SPEW ] ACPI_PIRQ_GEN: PCI: 00:1f.6: pin=3 pirq=1 [INFO ] \_SB_.PCI0.TPM: LPC TPM PNP: 0c31.0 [INFO ] ACPI: * H8 [INFO ] H8: BDC detection not implemented. Assuming BDC installed [INFO ] H8: WWAN not installed [DEBUG] ACPI: added table 2/32, length now 44 [DEBUG] ACPI: * MCFG [DEBUG] ACPI: added table 3/32, length now 48 [DEBUG] ACPI: * TCPA [DEBUG] TCPA log created at 0x7fbc4000 [DEBUG] ACPI: added table 4/32, length now 52 [DEBUG] ACPI: * MADT [DEBUG] ACPI: added table 5/32, length now 56 [DEBUG] current = 7fbd9580 [DEBUG] ACPI: * DMAR [DEBUG] ACPI: added table 6/32, length now 60 [DEBUG] current = 7fbd9640 [DEBUG] ACPI: * HPET [DEBUG] ACPI: added table 7/32, length now 64 [INFO ] ACPI: done. [DEBUG] ACPI tables: 22144 bytes. [DEBUG] smbios_write_tables: 7fbbc000 [SPEW ] recv_ec_data: 0x47 [SPEW ] recv_ec_data: 0x32 [SPEW ] recv_ec_data: 0x48 [SPEW ] recv_ec_data: 0x54 [SPEW ] recv_ec_data: 0x33 [SPEW ] recv_ec_data: 0x31 [SPEW ] recv_ec_data: 0x57 [SPEW ] recv_ec_data: 0x57 [SPEW ] recv_ec_data: 0x16 [SPEW ] recv_ec_data: 0x03 [INFO ] Create SMBIOS type 16 [INFO ] Create SMBIOS type 17 [INFO ] Create SMBIOS type 20 [DEBUG] SMBIOS tables: 1134 bytes. [DEBUG] Writing table forward entry at 0x00000500 [DEBUG] Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 1f [DEBUG] Writing coreboot table at 0x7fbf8000 [DEBUG] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES [DEBUG] 1. 0000000000001000-000000000009ffff: RAM [DEBUG] 2. 00000000000a0000-00000000000fffff: RESERVED [DEBUG] 3. 0000000000100000-000000007fbbbfff: RAM [DEBUG] 4. 000000007fbbc000-000000007fc14fff: CONFIGURATION TABLES [DEBUG] 5. 000000007fc15000-000000007fc68fff: RAMSTAGE [DEBUG] 6. 000000007fc69000-000000007fcfffff: CONFIGURATION TABLES [DEBUG] 7. 000000007fd00000-00000000829fffff: RESERVED [DEBUG] 8. 00000000f0000000-00000000f3ffffff: RESERVED [DEBUG] 9. 00000000fed20000-00000000fed91fff: RESERVED [DEBUG] 10. 00000000ffd00000-0000000100000fff: RESERVED [DEBUG] 11. 0000000100001000-000000047d5fffff: RAM [DEBUG] Wrote coreboot table at: 0x7fbf8000, 0x410 bytes, checksum 8e03 [DEBUG] coreboot table: 1064 bytes. [DEBUG] IMD ROOT 0. 0x7fcff000 0x00001000 [DEBUG] IMD SMALL 1. 0x7fcfe000 0x00001000 [DEBUG] CONSOLE 2. 0x7fc7e000 0x00080000 [DEBUG] RO MCACHE 3. 0x7fc7d000 0x000003f8 [DEBUG] TIME STAMP 4. 0x7fc7c000 0x00000910 [DEBUG] TCPA LOG 5. 0x7fc7a000 0x000019cc [DEBUG] MRC DATA 6. 0x7fc79000 0x00000644 [DEBUG] MEM INFO 7. 0x7fc78000 0x00000768 [DEBUG] AFTER CAR 8. 0x7fc69000 0x0000f000 [DEBUG] RAMSTAGE 9. 0x7fc14000 0x00055000 [DEBUG] SMM BACKUP 10. 0x7fc04000 0x00010000 [DEBUG] IGD OPREGION11. 0x7fc00000 0x000030b8 [DEBUG] COREBOOT 12. 0x7fbf8000 0x00008000 [DEBUG] ACPI 13. 0x7fbd4000 0x00024000 [DEBUG] TCPA TCGLOG14. 0x7fbc4000 0x00010000 [DEBUG] SMBIOS 15. 0x7fbbc000 0x00008000 [DEBUG] IMD small region: [DEBUG] IMD ROOT 0. 0x7fcfec00 0x00000400 [DEBUG] FMAP 1. 0x7fcfeb20 0x000000e0 [DEBUG] ROMSTAGE 2. 0x7fcfeb00 0x00000004 [DEBUG] ROMSTG STCK 3. 0x7fcfea40 0x000000a8 [DEBUG] ACPI GNVS 4. 0x7fcfe940 0x00000100 [DEBUG] BS: BS_WRITE_TABLES run times (exec / console): 41 / 0 ms [INFO ] CBFS: Found 'fallback/payload' @0x54540 size 0x6f6c02 in mcache @0x7fc7d2e0 [DEBUG] TPM: Extending digest for `CBFS: fallback/payload` into PCR 2 [DEBUG] TPM: command 0x14 returned 0x0 [DEBUG] TPM: Digest of `CBFS: fallback/payload` to PCR 2 measured [DEBUG] Checking segment from ROM address 0xff4e476c [DEBUG] Checking segment from ROM address 0xff4e4788 [DEBUG] Checking segment from ROM address 0xff4e47a4 [DEBUG] Checking segment from ROM address 0xff4e47c0 [DEBUG] Checking segment from ROM address 0xff4e47dc [DEBUG] Checking segment from ROM address 0xff4e47f8 [DEBUG] Loading segment from ROM address 0xff4e476c [DEBUG] data (compression=0) [DEBUG] New segment dstaddr 0x00090000 memsize 0x1080 srcaddr 0xff4e4814 filesize 0x1080 [DEBUG] Loading Segment: addr: 0x00090000 memsz: 0x0000000000001080 filesz: 0x0000000000001080 [DEBUG] it's not compressed! [SPEW ] [ 0x00090000, 00091080, 0x00091080) <- ff4e4814 [DEBUG] Loading segment from ROM address 0xff4e4788 [DEBUG] code (compression=0) [DEBUG] New segment dstaddr 0x01000000 memsize 0x2e01d0 srcaddr 0xff4e5894 filesize 0x2e01d0 [DEBUG] Loading Segment: addr: 0x01000000 memsz: 0x00000000002e01d0 filesz: 0x00000000002e01d0 [DEBUG] it's not compressed! [SPEW ] [ 0x01000000, 012e01d0, 0x012e01d0) <- ff4e5894 [DEBUG] Loading segment from ROM address 0xff4e47a4 [DEBUG] code (compression=0) [DEBUG] New segment dstaddr 0x00040000 memsize 0xef srcaddr 0xff7c5a64 filesize 0xef [DEBUG] Loading Segment: addr: 0x00040000 memsz: 0x00000000000000ef filesz: 0x00000000000000ef [DEBUG] it's not compressed! [SPEW ] [ 0x00040000, 000400ef, 0x000400ef) <- ff7c5a64 [DEBUG] Loading segment from ROM address 0xff4e47c0 [DEBUG] data (compression=0) [DEBUG] New segment dstaddr 0x00091000 memsize 0x1b srcaddr 0xff7c5b53 filesize 0x1b [DEBUG] Loading Segment: addr: 0x00091000 memsz: 0x000000000000001b filesz: 0x000000000000001b [DEBUG] it's not compressed! [SPEW ] [ 0x00091000, 0009101b, 0x0009101b) <- ff7c5b53 [DEBUG] Loading segment from ROM address 0xff4e47dc [DEBUG] data (compression=0) [DEBUG] New segment dstaddr 0x04000000 memsize 0x415800 srcaddr 0xff7c5b6e filesize 0x415800 [DEBUG] Loading Segment: addr: 0x04000000 memsz: 0x0000000000415800 filesz: 0x0000000000415800 [DEBUG] it's not compressed! [SPEW ] [ 0x04000000, 04415800, 0x04415800) <- ff7c5b6e [DEBUG] Loading segment from ROM address 0xff4e47f8 [DEBUG] Entry Point 0x00040000 [SPEW ] Loaded segments [DEBUG] BS: BS_PAYLOAD_LOAD run times (exec / console): 6143 / 0 ms [INFO ] coreboot TCPA measurements: [INFO ] PCR-2 b4a59acb58c7513daddc9f56016e93ab41775292 SHA1 [FMAP: FMAP] [INFO ] PCR-2 3e51251769ddfc36b5f297789138be0d510a277d SHA1 [CBFS: bootblock] [INFO ] PCR-2 3f5749f43badbd1f4d5a0e550b9d737c6e3e3fc8 SHA1 [CBFS: fallback/romstage] [INFO ] PCR-2 86e0c73924fa0199f4af59dd79d6233412f5a58a SHA1 [CBFS: fallback/postcar] [INFO ] PCR-2 fb742ffbaa923d07244112d40054dd272262380c SHA1 [CBFS: fallback/ramstage] [INFO ] PCR-2 8efffbbf487c06d4328ce4fbba2314554f2a2925 SHA1 [CBFS: cpu_microcode_blob.bin] [INFO ] PCR-2 c2335cc62820e8acd97f7b94ead60f73575cdf71 SHA1 [CBFS: vbt.bin] [INFO ] PCR-2 62bc16cee95371a070f1c860f8046256b2ca0dd5 SHA1 [CBFS: txt_bios_acm.bin] [INFO ] PCR-2 3d57f1ecbf667d94c7960f5ef57493530028fa8e SHA1 [CBFS: txt_sinit_acm.bin] [INFO ] PCR-2 62bc16cee95371a070f1c860f8046256b2ca0dd5 SHA1 [CBFS: txt_bios_acm.bin] [INFO ] PCR-2 fb96fa545801220cb9f95c367ffbeed05b848c16 SHA1 [CBFS: fallback/dsdt.aml] [INFO ] PCR-2 37fd830343ba2282af4ff061a3b85c40044fb885 SHA1 [CBFS: fallback/payload] [DEBUG] ICH-NM10-PCH: watchdog disabled [DEBUG] Jumping to boot code at 0x00040000(0x7fbf8000) [SPEW ] CPU0: stack: 0x7fc5b000 - 0x7fc5d000, lowest used address 0x7fc5b8e4, stack used: 5916 bytes