From 4a0e087b405f4ebc682cf82c4a5bb96e9b9976d4 Mon Sep 17 00:00:00 2001
From: Tomasz Czeszun <tomasz.czeszun@intel.com>
Date: Thu, 29 Jun 2023 11:51:10 -0700
Subject: [PATCH] cpu: simple_resampling: disable binary post-ops for non-abx
 layouts

---
 src/cpu/simple_resampling.hpp | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/cpu/simple_resampling.hpp b/src/cpu/simple_resampling.hpp
index 4d73a4d67da..331aec4c0a6 100644
--- a/src/cpu/simple_resampling.hpp
+++ b/src/cpu/simple_resampling.hpp
@@ -1,5 +1,5 @@
 /*******************************************************************************
-* Copyright 2019-2022 Intel Corporation
+* Copyright 2019-2023 Intel Corporation
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
@@ -73,6 +73,14 @@ struct simple_resampling_fwd_t : public primitive_t {
                     && attr_.set_default_formats(dst_md(0)) == status::success;
             if (!ok) return status::unimplemented;
 
+            const bool has_binary
+                    = attr()->post_ops_.find(primitive_kind::binary) >= 0;
+            if (has_binary) {
+                if (memory_desc_matches_one_of_tag(*dst_md(0), ncw, nchw, ncdhw)
+                        == format_tag::undef)
+                    return status::unimplemented;
+            }
+
             format_tag_t dat_tag = memory_desc_matches_one_of_tag(*src_md(),
                     nCw8c, nChw8c, nCdhw8c, nCw16c, nChw16c, nCdhw16c, ncw,
                     nchw, ncdhw, nwc, nhwc, ndhwc);