diff --git a/llvmlite/ir/values.py b/llvmlite/ir/values.py
index 7807eef6b..7aaa18c06 100644
--- a/llvmlite/ir/values.py
+++ b/llvmlite/ir/values.py
@@ -744,6 +744,10 @@ def descr(self, buf):
                 strvalue = '"{}"'.format(_escape_string(value))
             elif isinstance(value, int):
                 strvalue = str(value)
+            elif isinstance(value, Constant):
+                # Support for typed constants (e.g., i32 1, i8 2)
+                # This calls Constant._to_string() which formats as "type value"
+                strvalue = str(value)
             elif isinstance(value, NamedValue):
                 strvalue = value.get_reference()
             else:
diff --git a/llvmlite/tests/test_ir.py b/llvmlite/tests/test_ir.py
index d501e7b2c..75fd90126 100644
--- a/llvmlite/tests/test_ir.py
+++ b/llvmlite/tests/test_ir.py
@@ -548,6 +548,49 @@ def test_debug_info_3(self):
                             'name: "i64", size: 64)', strmod)
         self.assert_valid_ir(mod)
 
+    def test_debug_info_4(self):
+        # Typed constant as output value of debug info fields
+        mod = self.module()
+        # Create base types first
+        di_base_i32 = mod.add_debug_info("DIBasicType", {
+            "name": "int32",
+            "size": 32,
+            "encoding": ir.DIToken("DW_ATE_signed")
+        })
+        di_base_i8 = mod.add_debug_info("DIBasicType", {
+            "name": "int8",
+            "size": 8,
+            "encoding": ir.DIToken("DW_ATE_signed")
+        })
+        # Create debug info nodes with typed constants
+        mod.add_debug_info("DIDerivedType", {
+            "tag": ir.DIToken("DW_TAG_member"),
+            "name": "field_i32",
+            "baseType": di_base_i32,
+            "size": 32,
+            "extraData": ir.IntType(32)(1)
+        })
+        mod.add_debug_info("DIDerivedType", {
+            "tag": ir.DIToken("DW_TAG_member"),
+            "name": "field_i8",
+            "baseType": di_base_i8,
+            "size": 8,
+            "extraData": ir.IntType(8)(2)
+        })
+        # Check output
+        strmod = str(mod)
+        self.assert_ir_line('!0 = !DIBasicType(encoding: DW_ATE_signed, '
+                            'name: "int32", size: 32)', strmod)
+        self.assert_ir_line('!1 = !DIBasicType(encoding: DW_ATE_signed, '
+                            'name: "int8", size: 8)', strmod)
+        self.assert_ir_line(
+            '!2 = !DIDerivedType(baseType: !0, extraData: i32 1, '
+            'name: "field_i32", size: 32, tag: DW_TAG_member)', strmod)
+        self.assert_ir_line(
+            '!3 = !DIDerivedType(baseType: !1, extraData: i8 2, '
+            'name: "field_i8", size: 8, tag: DW_TAG_member)', strmod)
+        self.assert_valid_ir(mod)
+
     def test_debug_info_gvar(self):
         # This test defines a module with a global variable named 'gvar'.
         # When the module is compiled and linked with a main function, gdb can