From 468e52bfc0aee4adf1dad2cfd376f70d1106efec Mon Sep 17 00:00:00 2001 From: jewelofchaos9 Date: Fri, 14 Feb 2025 14:30:20 +0000 Subject: [PATCH 1/4] fix --- acvm-repo/brillig_vm/src/arithmetic.rs | 8 +++++- acvm-repo/brillig_vm/src/lib.rs | 37 ++++++++++++++++++++++++++ 2 files changed, 44 insertions(+), 1 deletion(-) diff --git a/acvm-repo/brillig_vm/src/arithmetic.rs b/acvm-repo/brillig_vm/src/arithmetic.rs index a87635bd542..88238519a03 100644 --- a/acvm-repo/brillig_vm/src/arithmetic.rs +++ b/acvm-repo/brillig_vm/src/arithmetic.rs @@ -43,7 +43,13 @@ pub(crate) fn evaluate_binary_field_op( BinaryFieldOp::Add => MemoryValue::new_field(a + b), BinaryFieldOp::Sub => MemoryValue::new_field(a - b), BinaryFieldOp::Mul => MemoryValue::new_field(a * b), - BinaryFieldOp::Div => MemoryValue::new_field(a / b), + BinaryFieldOp::Div => { + if b.is_zero() { + return Err(BrilligArithmeticError::DivisionByZero); + } else { + MemoryValue::new_field(a / b) + } + } BinaryFieldOp::IntegerDiv => { if b.is_zero() { return Err(BrilligArithmeticError::DivisionByZero); diff --git a/acvm-repo/brillig_vm/src/lib.rs b/acvm-repo/brillig_vm/src/lib.rs index f3eb3211e8e..1f74f58b5aa 100644 --- a/acvm-repo/brillig_vm/src/lib.rs +++ b/acvm-repo/brillig_vm/src/lib.rs @@ -2406,4 +2406,41 @@ mod tests { assert_eq!(output_value.to_field(), FieldElement::from(1u128)); } + + #[test] + #[should_panic] + fn zero_division_regression() { + let calldata: Vec = vec![(1u128).into(), (0u128).into()]; + + let opcodes = &[ + Opcode::Const { + destination: MemoryAddress::direct(0), + bit_size: BitSize::Field, + value: FieldElement::from(1u64), + }, + Opcode::Const { + destination: MemoryAddress::direct(1), + bit_size: BitSize::Field, + value: FieldElement::from(0u64), + }, + Opcode::BinaryFieldOp { + destination: MemoryAddress::direct(2), + op: BinaryFieldOp::Div, + lhs: MemoryAddress::direct(0), + rhs: MemoryAddress::direct(1), + }, + ]; + let solver = StubbedBlackBoxSolver::default(); + let mut vm = VM::new(calldata, opcodes, &solver, false); + + let status = vm.process_opcode(); + assert_eq!(status, VMStatus::InProgress); + let status = vm.process_opcode(); + assert_eq!(status, VMStatus::InProgress); + let status = vm.process_opcode(); + assert_eq!(status, VMStatus::Finished { return_data_offset: 0, return_data_size: 0 }); + let VM { memory, .. } = vm; + let output_value = memory.read(MemoryAddress::direct(2)); + assert_eq!(output_value.to_field(), (0u128).into()); + } } From 7cb669c231d241c09a21b964fa052bad76223d55 Mon Sep 17 00:00:00 2001 From: jewelofchaos9 Date: Fri, 14 Feb 2025 14:31:38 +0000 Subject: [PATCH 2/4] renamed test --- acvm-repo/brillig_vm/src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/acvm-repo/brillig_vm/src/lib.rs b/acvm-repo/brillig_vm/src/lib.rs index 1f74f58b5aa..aeef59aa9aa 100644 --- a/acvm-repo/brillig_vm/src/lib.rs +++ b/acvm-repo/brillig_vm/src/lib.rs @@ -2409,7 +2409,7 @@ mod tests { #[test] #[should_panic] - fn zero_division_regression() { + fn field_zero_division_regression() { let calldata: Vec = vec![(1u128).into(), (0u128).into()]; let opcodes = &[ From 26c2b050425b2a84ccc4b7ff6c3307e920d41907 Mon Sep 17 00:00:00 2001 From: defkit Date: Fri, 14 Feb 2025 15:44:33 +0000 Subject: [PATCH 3/4] true --- acvm-repo/brillig_vm/src/lib.rs | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/acvm-repo/brillig_vm/src/lib.rs b/acvm-repo/brillig_vm/src/lib.rs index aeef59aa9aa..b8ede0281fa 100644 --- a/acvm-repo/brillig_vm/src/lib.rs +++ b/acvm-repo/brillig_vm/src/lib.rs @@ -2408,9 +2408,8 @@ mod tests { } #[test] - #[should_panic] fn field_zero_division_regression() { - let calldata: Vec = vec![(1u128).into(), (0u128).into()]; + let calldata: Vec = vec![]; let opcodes = &[ Opcode::Const { @@ -2438,9 +2437,6 @@ mod tests { let status = vm.process_opcode(); assert_eq!(status, VMStatus::InProgress); let status = vm.process_opcode(); - assert_eq!(status, VMStatus::Finished { return_data_offset: 0, return_data_size: 0 }); - let VM { memory, .. } = vm; - let output_value = memory.read(MemoryAddress::direct(2)); - assert_eq!(output_value.to_field(), (0u128).into()); + assert_eq!(status, VMStatus::Failure {reason: FailureReason::RuntimeError { message: "Attempted to divide by zero".into() }, call_stack: vec![2]} ); } } From d34414b5a5607091d7cefe448ff64ca841862cd2 Mon Sep 17 00:00:00 2001 From: defkit Date: Fri, 14 Feb 2025 15:49:06 +0000 Subject: [PATCH 4/4] forgor about formatting --- acvm-repo/brillig_vm/src/lib.rs | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/acvm-repo/brillig_vm/src/lib.rs b/acvm-repo/brillig_vm/src/lib.rs index b8ede0281fa..6af93ff0a02 100644 --- a/acvm-repo/brillig_vm/src/lib.rs +++ b/acvm-repo/brillig_vm/src/lib.rs @@ -2437,6 +2437,14 @@ mod tests { let status = vm.process_opcode(); assert_eq!(status, VMStatus::InProgress); let status = vm.process_opcode(); - assert_eq!(status, VMStatus::Failure {reason: FailureReason::RuntimeError { message: "Attempted to divide by zero".into() }, call_stack: vec![2]} ); + assert_eq!( + status, + VMStatus::Failure { + reason: FailureReason::RuntimeError { + message: "Attempted to divide by zero".into() + }, + call_stack: vec![2] + } + ); } }