diff --git a/targets/FreeRTOS_ESP32/ESP32_WROOM_32/nanoCLR/Windows.Devices.Gpio/cpu_gpio.cpp b/targets/FreeRTOS_ESP32/ESP32_WROOM_32/nanoCLR/Windows.Devices.Gpio/cpu_gpio.cpp
index 132b2bb3ed..2d8be67de7 100644
--- a/targets/FreeRTOS_ESP32/ESP32_WROOM_32/nanoCLR/Windows.Devices.Gpio/cpu_gpio.cpp
+++ b/targets/FreeRTOS_ESP32/ESP32_WROOM_32/nanoCLR/Windows.Devices.Gpio/cpu_gpio.cpp
@@ -130,9 +130,15 @@ bool CPU_GPIO_Initialize()
     // Make sure all pins are not reserved
     memset(pinReserved, 0, sizeof(pinReserved));
 
-    // Reserve Pins 6-11 as used by Spi flash
-    for (int pinNumber = 6; pinNumber <= 11; pinNumber++)
-        CPU_GPIO_ReservePin(pinNumber, true);
+    // check if PSRAM it's available (querying largets free block available with SPIRAM capabilities)
+    if (heap_caps_get_largest_free_block(MALLOC_CAP_8BIT | MALLOC_CAP_32BIT | MALLOC_CAP_SPIRAM))
+    {
+        // Reserve Pins 6-11 as used by Spi flash
+        for (int pinNumber = 6; pinNumber <= 11; pinNumber++)
+        {
+            CPU_GPIO_ReservePin(pinNumber, true);
+        }
+    }
 
     // Install ISR service for GPIO
     esp_err_t ret = gpio_install_isr_service(0);