From 2f59dd22e37a2839d4244ba5b9d9516498176446 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Sim=C3=B5es?= Date: Fri, 17 May 2019 13:42:01 +0100 Subject: [PATCH] Fix alarm wakeup for STM32F4 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: José Simões --- targets/CMSIS-OS/ChibiOS/nanoCLR/targetHAL_Power.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/targets/CMSIS-OS/ChibiOS/nanoCLR/targetHAL_Power.c b/targets/CMSIS-OS/ChibiOS/nanoCLR/targetHAL_Power.c index 41995c7f7e..4f983c74c6 100644 --- a/targets/CMSIS-OS/ChibiOS/nanoCLR/targetHAL_Power.c +++ b/targets/CMSIS-OS/ChibiOS/nanoCLR/targetHAL_Power.c @@ -111,8 +111,14 @@ void CPU_SetPowerMode(PowerLevel_type powerLevel) #endif #if defined(STM32F7XX) - SET_BIT(RTC->CR, RTC_CR_ALRAIE); + + ////////////////////////////////////////////////////////////////////////////////////////////////////// + // workaround recommended in section 2.2.2 at STM32F77xxx errata document (DM00257543 - ES0334 Rev 5) // + PWR->CSR1 |= PWR_CSR1_EIWUP; + ////////////////////////////////////////////////////////////////////////////////////////////////////// + SET_BIT(PWR->CR1, PWR_CR1_PDDS); + #endif #if defined(STM32H7XX)