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The memory traits for the Cortex-M7 DTCM memory are hard-coded to 0x2013 for all devices in the linker script macros. Bit 3 "DMA-capable" is not set, which is not correct for STM32F7 devices.
Those permit DMA access to the DTCM through the AHBS slave interface:
I don't know if this bug has any practical consequences. I found it by accident while looking at an STM32F7 linker script.
The text was updated successfully, but these errors were encountered:
The memory traits for the Cortex-M7 DTCM memory are hard-coded to
0x2013
for all devices in the linker script macros. Bit 3 "DMA-capable" is not set, which is not correct for STM32F7 devices.Those permit DMA access to the DTCM through the AHBS slave interface:
I don't know if this bug has any practical consequences. I found it by accident while looking at an STM32F7 linker script.
The text was updated successfully, but these errors were encountered: