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Merged
jywu-msft merged 8 commits into from
Feb 1, 2025
Merged

remove log spam from cpuinfo #23548

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104b9fb
remove log spam from cpuinfo
jywu-msft Jan 31, 2025
ab4569e
lint
jywu-msft Jan 31, 2025
db3201e
lint
jywu-msft Jan 31, 2025
31492cf
binary ignore whitespaces
jywu-msft Jan 31, 2025
f861bfc
typo
jywu-msft Jan 31, 2025
cf8d829
fix
jywu-msft Jan 31, 2025
fa07fbd
warning
jywu-msft Jan 31, 2025
22d422e
Merge branch 'main' of https://github.com/microsoft/onnxruntime into …
jywu-msft Jan 31, 2025
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4 changes: 2 additions & 2 deletions cmake/external/onnxruntime_external_deps.cmake
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Original file line number Diff line number Diff line change
Expand Up @@ -357,8 +357,8 @@ if (CPUINFO_SUPPORTED)
set(CPUINFO_BUILD_UNIT_TESTS OFF CACHE INTERNAL "")
set(CPUINFO_BUILD_MOCK_TESTS OFF CACHE INTERNAL "")
set(CPUINFO_BUILD_BENCHMARKS OFF CACHE INTERNAL "")
if(onnxruntime_target_platform STREQUAL "ARM64EC")
message(STATUS "Applying a patch for Windows ARM64EC in cpuinfo")
if (onnxruntime_target_platform STREQUAL "ARM64EC" OR onnxruntime_target_platform STREQUAL "ARM64")
message(STATUS "Applying a patch for Windows ARM64/ARM64EC in cpuinfo")
FetchContent_Declare(
pytorch_cpuinfo
URL ${DEP_URL_pytorch_cpuinfo}
Expand Down
15 changes: 14 additions & 1 deletion cmake/patches/cpuinfo/9bb12d342fd9479679d505d93a478a6f9cd50a47.patch
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
diff --git a/include/cpuinfo.h b/include/cpuinfo.h
index 03f2776..eaf6497 100644
index 6eb4b8c..4346a5a 100644
--- a/include/cpuinfo.h
+++ b/include/cpuinfo.h
@@ -18,7 +18,7 @@
Expand All @@ -20,3 +20,16 @@ index 03f2776..eaf6497 100644
#define CPUINFO_ARCH_ARM64 1
#endif

diff --git a/src/arm/windows/init.c b/src/arm/windows/init.c
index de2f6cc..c3a7835 100644
--- a/src/arm/windows/init.c
+++ b/src/arm/windows/init.c
@@ -175,7 +175,7 @@ static struct woa_chip_info* get_system_info_from_registry(void) {
if (chip_info == NULL) {
/* No match was found, so print a warning and assign the unknown
* case. */
- cpuinfo_log_error(
+ cpuinfo_log_debug(
"Unknown chip model name '%ls'.\nPlease add new Windows on Arm SoC/chip support to arm/windows/init.c!",
text_buffer);
} else {
50 changes: 26 additions & 24 deletions onnxruntime/core/common/cpuid_uarch.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -30,9 +30,11 @@ inline static uint32_t midr_get_part(uint32_t midr) {
return (midr & CPUINFO_ARM_MIDR_PART_MASK) >> CPUINFO_ARM_MIDR_PART_OFFSET;
}

#if 0
inline static uint32_t midr_get_variant(uint32_t midr) {
return (midr & CPUINFO_ARM_MIDR_VARIANT_MASK) >> CPUINFO_ARM_MIDR_VARIANT_OFFSET;
}
#endif

void decodeMIDR(
uint32_t midr,
Expand Down Expand Up @@ -137,8 +139,8 @@ void decodeMIDR(
*uarch = cpuinfo_uarch_arm11;
break;
// #endif /* ARM */
default:
std::cerr << "unknown ARM CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown ARM CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
}
break;
Expand All @@ -156,8 +158,8 @@ void decodeMIDR(
*uarch = cpuinfo_uarch_thunderx2;
break;
// #endif
default:
std::cerr << "unknown Broadcom CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown Broadcom CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
break;
// #if (defined(_M_ARM64) || defined(__aarch64__)) && !defined(__ANDROID__)
Expand All @@ -172,8 +174,8 @@ void decodeMIDR(
case 0x0AF: /* ThunderX2 99XX */
*uarch = cpuinfo_uarch_thunderx2;
break;
default:
std::cerr << "unknown Cavium CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown Cavium CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
break;
// #endif
Expand All @@ -187,8 +189,8 @@ void decodeMIDR(
case 0xD40: /* Kirin 980 Big/Medium cores -> Cortex-A76 */
*uarch = cpuinfo_uarch_cortex_a76;
break;
default:
std::cerr << "unknown Huawei CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown Huawei CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
break;
// #if defined(_M_ARM) || defined(__arm__)
Expand All @@ -199,8 +201,8 @@ void decodeMIDR(
case 6: /* PXA 3XX */
*uarch = cpuinfo_uarch_xscale;
break;
default:
std::cerr << "unknown Intel CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown Intel CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
break;
// #endif /* ARM */
Expand All @@ -215,8 +217,8 @@ void decodeMIDR(
case 0x004:
*uarch = cpuinfo_uarch_carmel;
break;
default:
std::cerr << "unknown Nvidia CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown Nvidia CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
break;
#if !defined(__ANDROID__)
Expand All @@ -225,8 +227,8 @@ void decodeMIDR(
case 0x000:
*uarch = cpuinfo_uarch_xgene;
break;
default:
std::cerr << "unknown Applied Micro CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown Applied Micro CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
break;
#endif
Expand Down Expand Up @@ -297,8 +299,8 @@ void decodeMIDR(
*uarch = cpuinfo_uarch_saphira;
break;
// #endif /* ARM64 && !defined(__ANDROID__) */
default:
std::cerr << "unknown Qualcomm CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown Qualcomm CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
break;
case 'S':
Expand Down Expand Up @@ -343,10 +345,10 @@ void decodeMIDR(
*/
*uarch = cpuinfo_uarch_exynos_m5;
break;
default:
std::cerr << "unknown Samsung CPU variant 0x"
<< std::hex << midr_get_variant(midr) << " part 0x" << std::hex << midr_get_part(midr)
<< " ignored\n";
// default:
// std::cerr << "unknown Samsung CPU variant 0x"
//<< std::hex << midr_get_variant(midr) << " part 0x" << std::hex << midr_get_part(midr)
//<< " ignored\n";
}
break;
// #if defined(_M_ARM) || defined(__arm__)
Expand All @@ -356,13 +358,13 @@ void decodeMIDR(
case 0x584: /* PJ4B-MP / PJ4C */
*uarch = cpuinfo_uarch_pj4;
break;
default:
std::cerr << "unknown Marvell CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
// default:
// std::cerr << "unknown Marvell CPU part 0x" << std::hex << midr_get_part(midr) << " ignored\n";
}
break;
// #endif /* ARM */
default:
std::cerr << "unknown CPU uarch from MIDR value: 0x" << std::hex << midr << "\n";
// default:
// std::cerr << "unknown CPU uarch from MIDR value: 0x" << std::hex << midr << "\n";
}
}

Expand Down
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