-
Notifications
You must be signed in to change notification settings - Fork 5
/
add-tv-box.patch
439 lines (424 loc) · 11.5 KB
/
add-tv-box.patch
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
From 53d4a7302318f1d188abbbad59dccaf453087d2c Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <[email protected]>
Date: Mon, 30 Nov 2020 22:30:16 +0100
Subject: [PATCH] t95 wip
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun50i-h616-t95.dts | 189 ++++++++++++++++++++++
arch/arm/dts/sun50i-h616.dtsi | 28 +++-
arch/arm/mach-sunxi/Kconfig | 2 +-
arch/arm/mach-sunxi/board.c | 1 +
arch/arm/mach-sunxi/clock_sun50i_h6.c | 4 +
board/sunxi/board.c | 26 +++
configs/t95_defconfig | 13 ++
drivers/net/sun8i_emac.c | 6 +-
include/configs/sunxi-common.h | 2 +-
include/dt-bindings/clock/sun50i-h6-ccu.h | 2 +
include/dt-bindings/reset/sun50i-h6-ccu.h | 2 +
13 files changed, 273 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/dts/sun50i-h616-t95.dts
create mode 100644 configs/t95_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 68bafa5bd7..60b13655f8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -606,6 +606,7 @@ dtb-$(CONFIG_MACH_SUN50I_H6) += \
sun50i-h6-orangepi-one-plus.dtb \
sun50i-h6-pine-h64.dtb
dtb-$(CONFIG_MACH_SUN50I_H616) += \
+ sun50i-h616-t95.dtb \
sun50i-h616-orangepi-zero2.dtb
dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-amarula-relic.dtb \
diff --git a/arch/arm/dts/sun50i-h616-t95.dts b/arch/arm/dts/sun50i-h616-t95.dts
new file mode 100644
index 0000000000..048d757173
--- /dev/null
+++ b/arch/arm/dts/sun50i-h616-t95.dts
@@ -0,0 +1,189 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2020 Arm Ltd.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h616.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ model = "T95";
+ compatible = "t95", "allwinner,sun50i-h616";
+
+ aliases {
+ ethernet0 = &emac1;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ label = "orangepi:red:power";
+ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+ default-state = "on";
+ };
+
+ status {
+ label = "orangepi:green:status";
+ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
+ };
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the USB-C socket */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+};
+
+&emac1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins>;
+ phy-mode = "rmii";
+ phy-handle = <&rmii_phy>;
+ phy-supply = <®_aldo1>;
+ allwinner,rx-delay-ps = <3100>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+};
+
+&mdio2 {
+ rmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <®_dcdce>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+
+ axp305: pmic@36 {
+ compatible = "x-powers,axp305", "x-powers,axp805",
+ "x-powers,axp806";
+ reg = <0x36>;
+
+ /* dummy interrupt to appease the driver for now */
+ interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ x-powers,self-working-mode;
+ vina-supply = <®_vcc5v>;
+ vinb-supply = <®_vcc5v>;
+ vinc-supply = <®_vcc5v>;
+ vind-supply = <®_vcc5v>;
+ vine-supply = <®_vcc5v>;
+ aldoin-supply = <®_vcc5v>;
+ bldoin-supply = <®_vcc5v>;
+ cldoin-supply = <®_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-sys";
+ };
+
+ reg_aldo2: aldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext";
+ };
+
+ reg_aldo3: aldo3 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc3v3-ext2";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc1v8";
+ };
+
+ bldo2 {
+ /* unused */
+ };
+
+ bldo3 {
+ /* unused */
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ cldo1 {
+ /* reserved */
+ };
+
+ cldo2 {
+ /* unused */
+ };
+
+ cldo3 {
+ /* unused */
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-always-on;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-name = "vdd-gpu-sys";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ regulator-name = "vdd-dram";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-eth-mmc";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
index 3d02a3f7aa..838973bdda 100644
--- a/arch/arm/dts/sun50i-h616.dtsi
+++ b/arch/arm/dts/sun50i-h616.dtsi
@@ -216,6 +216,13 @@
bias-pull-up;
};
+ rmii_pins: rmii-pins {
+ pins = "PA0", "PA1", "PA2", "PA3", "PA4",
+ "PA5", "PA6", "PA7", "PA8", "PA9";
+ function = "emac1";
+ drive-strength = <40>;
+ };
+
spi0_pins: spi0-pins {
pins = "PC0", "PC2", "PC3", "PC4";
function = "spi0";
@@ -385,7 +392,7 @@
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2C3>;
resets = <&ccu RST_BUS_I2C3>;
- status = "disabled";
+ //status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 54d3d81692..56e78f706c 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -771,7 +771,7 @@ config I2C2_ENABLE
---help---
See I2C0_ENABLE help text.
-if MACH_SUN6I || MACH_SUN7I
+if MACH_SUN6I || MACH_SUN7I || MACH_SUN50I_H616
config I2C3_ENABLE
bool "Enable I2C/TWI controller 3"
default n
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index 730faeb82a..d21e9c6ba8 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -326,6 +326,7 @@ void board_init_f(ulong dummy)
#ifdef CONFIG_SPL_I2C_SUPPORT
/* Needed early by sunxi_board_init if PMU is enabled */
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+ i2c_set_bus_num(1);
#endif
sunxi_board_init();
}
diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c b/arch/arm/mach-sunxi/clock_sun50i_h6.c
index 637c48142c..9ed6545169 100644
--- a/arch/arm/mach-sunxi/clock_sun50i_h6.c
+++ b/arch/arm/mach-sunxi/clock_sun50i_h6.c
@@ -27,6 +27,10 @@ void clock_init_safe(void)
* DRAM initialization code.
*/
writel(MBUS_CLK_SRC_PLL6X2 | MBUS_CLK_M(3), &ccm->mbus_cfg);
+
+ writel(0x10001, 0x030017ac);
+ writel(0x50, 0x0300a028);
+ writel(0x20, 0x0300a040);
}
#endif
diff --git a/board/sunxi/board.c b/board/sunxi/board.c
index 727e832031..bb14845a8e 100644
--- a/board/sunxi/board.c
+++ b/board/sunxi/board.c
@@ -14,6 +14,7 @@
#include <dm.h>
#include <env.h>
#include <hang.h>
+#include <i2c.h>
#include <image.h>
#include <init.h>
#include <log.h>
@@ -179,6 +180,13 @@ void i2c_init_board(void)
sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3);
sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3);
clock_twi_onoff(3, 1);
+#elif defined(CONFIG_MACH_SUN50I_H616)
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(10), 2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(11), 2);
+ sunxi_gpio_set_cfgpin(SUNXI_GPA(12), 2);
+ sunxi_gpio_set_pull(SUNXI_GPA(10), SUNXI_GPIO_PULL_UP);
+ sunxi_gpio_set_pull(SUNXI_GPA(11), SUNXI_GPIO_PULL_UP);
+ clock_twi_onoff(3, 1);
#endif
#endif
@@ -632,6 +640,7 @@ static void sunxi_spl_store_dram_size(phys_addr_t dram_size)
void sunxi_board_init(void)
{
int power_failed = 0;
+ u8 data[2];
#ifdef CONFIG_SY8106A_POWER
power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT);
@@ -711,6 +720,23 @@ void sunxi_board_init(void)
clock_set_pll1(CONFIG_SYS_CLK_FREQ);
else
printf("Failed to set core voltage! Can't set CPU frequency\n");
+
+ i2c_set_bus_num(0);
+ data[0] = 0;
+ data[1] = 0;
+ i2c_write(0x10, 0xfe, 1, data, 2);
+ i2c_write(0x10, 2, 1, data, 2);
+ data[1] = 1;
+ i2c_write(0x10, 2, 1, data, 2);
+ data[1] = 0xf;
+ i2c_write(0x10, 0x16, 1, data, 2);
+ data[1] = 3;
+ i2c_write(0x10, 0x14, 1, data, 2);
+ data[1] = 0x60;
+ i2c_write(0x10, 0xfe, 1, data, 2);
+ data[0] = 0x08;
+ data[1] = 0x14;
+ i2c_write(0x10, 0, 1, data, 2);
}
#endif
diff --git a/configs/t95_defconfig b/configs/t95_defconfig
new file mode 100644
index 0000000000..480445d41c
--- /dev/null
+++ b/configs/t95_defconfig
@@ -0,0 +1,13 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_SPL=y
+CONFIG_DRAM_SUN50I_H616_READ_CALIBRATION=y
+CONFIG_DRAM_SUN50I_H616_UNKNOWN_FEATURE=y
+CONFIG_MACH_SUN50I_H616=y
+CONFIG_MMC0_CD_PIN="PF6"
+CONFIG_R_I2C_ENABLE=y
+CONFIG_DEFAULT_DEVICE_TREE="sun50i-h616-t95"
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C_SUPPORT=y
+CONFIG_SUN8I_EMAC=y
+CONFIG_I2C3_ENABLE=y
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 7e57f1d01c..192f07cc34 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -336,7 +336,7 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
return 0;
}
- reg = readl(priv->sysctl_reg + 0x30);
+ reg = readl(priv->sysctl_reg + 0x34);
if (priv->variant == H3_EMAC || priv->variant == H6_EMAC) {
ret = sun8i_emac_set_syscon_ephy(priv, ®);
@@ -378,7 +378,7 @@ static int sun8i_emac_set_syscon(struct sun8i_eth_pdata *pdata,
reg |= ((pdata->rx_delay_ps / 100) << SC_ERXDC_OFFSET)
& SC_ERXDC_MASK;
- writel(reg, priv->sysctl_reg + 0x30);
+ writel(reg, priv->sysctl_reg + 0x34);
return 0;
}
@@ -1006,6 +1006,8 @@ static const struct udevice_id sun8i_emac_eth_ids[] = {
.data = (uintptr_t)R40_GMAC },
{.compatible = "allwinner,sun50i-h6-emac",
.data = (uintptr_t)H6_EMAC },
+ {.compatible = "allwinner,sun50i-h616-emac",
+ .data = (uintptr_t)H6_EMAC },
{ }
};
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 6e8f547214..d70ed43e33 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -212,7 +212,7 @@
#define CONFIG_SYS_I2C_MVTWSI
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_SPEED 400000
+#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0x7f
#endif
#endif
diff --git a/include/dt-bindings/clock/sun50i-h6-ccu.h b/include/dt-bindings/clock/sun50i-h6-ccu.h
index a1545cd60e..230acfd833 100644
--- a/include/dt-bindings/clock/sun50i-h6-ccu.h
+++ b/include/dt-bindings/clock/sun50i-h6-ccu.h
@@ -122,4 +122,6 @@
#define CLK_HDCP 136
#define CLK_BUS_HDCP 137
+#define CLK_BUS_EMAC1 138
+
#endif /* _DT_BINDINGS_CLK_SUN50I_H6_H_ */
diff --git a/include/dt-bindings/reset/sun50i-h6-ccu.h b/include/dt-bindings/reset/sun50i-h6-ccu.h
index 81106f4550..bfafa93ee4 100644
--- a/include/dt-bindings/reset/sun50i-h6-ccu.h
+++ b/include/dt-bindings/reset/sun50i-h6-ccu.h
@@ -70,4 +70,6 @@
#define RST_BUS_CSI 61
#define RST_BUS_HDCP 62
+#define RST_BUS_EMAC1 63
+
#endif /* _DT_BINDINGS_RESET_SUN50I_H6_H_ */