LPC1768 intermittent failures of PWM-ADC test shield test

[multiplemonomials]

About 50% of the time, the test fails with an error like this:

[1725381481.88][CONN][RXD] >>> 'Test reading digital values with the ADC': 1 passed, 0 failed
[1725381481.88][CONN][RXD] <greentea test suite>:0::PASS
[1725381481.89][CONN][RXD] Based on target.default-adc-vref of 3.30V, the digital IO voltage of this target is 3.29V.
[1725381481.89][CONN][RXD] >>> Running case #3: 'Test reading analog values with the ADC'...
[1725381481.90][CONN][INF] found KV pair in stream: {{__testcase_start;Test reading analog values with the ADC}}, queued...
[1725381481.94][CONN][RXD] PWM duty cycle of 0.0% produced an ADC reading of 0.0% (expected 0.0%)
[1725381481.98][CONN][RXD] PWM duty cycle of 10.0% produced an ADC reading of 9.8% (expected 10.0%)
[1725381482.03][CONN][RXD] PWM duty cycle of 20.0% produced an ADC reading of 50.0% (expected 19.9%)
[1725381482.04][CONN][RXD] <greentea test suite>:195::FAIL: Expected 0.199121 Was 0.499878
[1725381482.09][CONN][RXD] PWM duty cycle of 30.0% produced an ADC reading of 30.1% (expected 29.9%)
[1725381482.14][CONN][RXD] PWM duty cycle of 40.0% produced an ADC reading of 40.5% (expected 39.8%)
[1725381482.18][CONN][RXD] PWM duty cycle of 50.0% produced an ADC reading of 50.8% (expected 49.8%)
[1725381482.23][CONN][RXD] PWM duty cycle of 60.0% produced an ADC reading of 60.4% (expected 59.7%)
[1725381482.29][CONN][RXD] PWM duty cycle of 70.0% produced an ADC reading of 70.3% (expected 69.7%)
[1725381482.33][CONN][RXD] PWM duty cycle of 80.0% produced an ADC reading of 80.0% (expected 79.6%)
[1725381482.39][CONN][RXD] PWM duty cycle of 90.0% produced an ADC reading of 89.9% (expected 89.6%)
[1725381482.44][CONN][RXD] PWM duty cycle of 100.0% produced an ADC reading of 99.9% (expected 99.6%)
[1725381482.44][CONN][INF] found KV pair in stream: {{__testcase_finish;Test reading analog values with the ADC;0;1}}, queued...
[1725381482.45][CONN][RXD] >>> 'Test reading analog values with the ADC': 0 passed, 1 failed with reason 'Test Cases Failed'

I'm more suspicious of the ADC because the PWM implementation has been checked out pretty carefully, but I am not sure what's up