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davemgreenmahesh-attarde
davemgreen
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mahesh-attarde
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[ARM] Update and cleanup lrint/llrint tests. NFC
Most of the fp16 cases still do not work properly. See llvm#161088.
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‎llvm/test/CodeGen/ARM/llrint-conv.ll‎

Lines changed: 47 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1,46 +1,71 @@
1-
; RUN: llc < %s -mtriple=arm-eabi -float-abi=soft | FileCheck %s --check-prefix=SOFTFP
2-
; RUN: llc < %s -mtriple=arm-eabi -float-abi=hard | FileCheck %s --check-prefix=HARDFP
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc < %s -mtriple=armv7-none-eabi -float-abi=soft | FileCheck %s --check-prefixes=CHECK,CHECK-SOFT
3+
; RUN: llc < %s -mtriple=armv7-none-eabihf -mattr=+vfp2 -float-abi=hard | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16
4+
; RUN: llc < %s -mtriple=armv7-none-eabihf -mattr=+vfp2,+fullfp16 -float-abi=hard | FileCheck %s --check-prefixes=CHECK,CHECK-FP16
35

4-
; SOFTFP-LABEL: testmsxh_builtin:
5-
; SOFTFP: bl llrintf
6-
; HARDFP-LABEL: testmsxh_builtin:
7-
; HARDFP: bl llrintf
86
define i64 @testmsxh_builtin(half %x) {
7+
; CHECK-SOFT-LABEL: testmsxh_builtin:
8+
; CHECK-SOFT: @ %bb.0: @ %entry
9+
; CHECK-SOFT-NEXT: .save {r11, lr}
10+
; CHECK-SOFT-NEXT: push {r11, lr}
11+
; CHECK-SOFT-NEXT: bl __aeabi_h2f
12+
; CHECK-SOFT-NEXT: bl llrintf
13+
; CHECK-SOFT-NEXT: pop {r11, pc}
14+
;
15+
; CHECK-NOFP16-LABEL: testmsxh_builtin:
16+
; CHECK-NOFP16: @ %bb.0: @ %entry
17+
; CHECK-NOFP16-NEXT: .save {r11, lr}
18+
; CHECK-NOFP16-NEXT: push {r11, lr}
19+
; CHECK-NOFP16-NEXT: vmov r0, s0
20+
; CHECK-NOFP16-NEXT: bl __aeabi_h2f
21+
; CHECK-NOFP16-NEXT: vmov s0, r0
22+
; CHECK-NOFP16-NEXT: bl llrintf
23+
; CHECK-NOFP16-NEXT: pop {r11, pc}
24+
;
25+
; CHECK-FP16-LABEL: testmsxh_builtin:
26+
; CHECK-FP16: @ %bb.0: @ %entry
27+
; CHECK-FP16-NEXT: .save {r11, lr}
28+
; CHECK-FP16-NEXT: push {r11, lr}
29+
; CHECK-FP16-NEXT: vcvtb.f32.f16 s0, s0
30+
; CHECK-FP16-NEXT: bl llrintf
31+
; CHECK-FP16-NEXT: pop {r11, pc}
932
entry:
1033
%0 = tail call i64 @llvm.llrint.i64.f16(half %x)
1134
ret i64 %0
1235
}
1336

14-
; SOFTFP-LABEL: testmsxs_builtin:
15-
; SOFTFP: bl llrintf
16-
; HARDFP-LABEL: testmsxs_builtin:
17-
; HARDFP: bl llrintf
1837
define i64 @testmsxs_builtin(float %x) {
38+
; CHECK-LABEL: testmsxs_builtin:
39+
; CHECK: @ %bb.0: @ %entry
40+
; CHECK-NEXT: .save {r11, lr}
41+
; CHECK-NEXT: push {r11, lr}
42+
; CHECK-NEXT: bl llrintf
43+
; CHECK-NEXT: pop {r11, pc}
1944
entry:
2045
%0 = tail call i64 @llvm.llrint.i64.f32(float %x)
2146
ret i64 %0
2247
}
2348

24-
; SOFTFP-LABEL: testmsxd_builtin:
25-
; SOFTFP: bl llrint
26-
; HARDFP-LABEL: testmsxd_builtin:
27-
; HARDFP: bl llrint
2849
define i64 @testmsxd_builtin(double %x) {
50+
; CHECK-LABEL: testmsxd_builtin:
51+
; CHECK: @ %bb.0: @ %entry
52+
; CHECK-NEXT: .save {r11, lr}
53+
; CHECK-NEXT: push {r11, lr}
54+
; CHECK-NEXT: bl llrint
55+
; CHECK-NEXT: pop {r11, pc}
2956
entry:
3057
%0 = tail call i64 @llvm.llrint.i64.f64(double %x)
3158
ret i64 %0
3259
}
3360

34-
; FIXME(#44744): incorrect libcall
35-
; SOFTFP-LABEL: testmsxq_builtin:
36-
; SOFTFP: bl llrintl
37-
; HARDFP-LABEL: testmsxq_builtin:
38-
; HARDFP: bl llrintl
3961
define i64 @testmsxq_builtin(fp128 %x) {
62+
; CHECK-LABEL: testmsxq_builtin:
63+
; CHECK: @ %bb.0: @ %entry
64+
; CHECK-NEXT: .save {r11, lr}
65+
; CHECK-NEXT: push {r11, lr}
66+
; CHECK-NEXT: bl llrintl
67+
; CHECK-NEXT: pop {r11, pc}
4068
entry:
4169
%0 = tail call i64 @llvm.llrint.i64.f128(fp128 %x)
4270
ret i64 %0
4371
}
44-
45-
declare i64 @llvm.llrint.i64.f32(float) nounwind readnone
46-
declare i64 @llvm.llrint.i64.f64(double) nounwind readnone

‎llvm/test/CodeGen/ARM/lrint-conv.ll‎

Lines changed: 20 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
1-
; RUN: llc < %s -mtriple=arm-eabi -float-abi=soft | FileCheck %s --check-prefix=SOFTFP
2-
; RUN: llc < %s -mtriple=arm-eabi -float-abi=hard | FileCheck %s --check-prefix=HARDFP
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc < %s -mtriple=armv7-none-eabi -float-abi=soft | FileCheck %s --check-prefixes=CHECK,CHECK-SOFT
3+
; RUN: llc < %s -mtriple=armv7-none-eabihf -mattr=+vfp2 -float-abi=hard | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16
4+
; RUN: llc < %s -mtriple=armv7-none-eabihf -mattr=+vfp2,+fullfp16 -float-abi=hard | FileCheck %s --check-prefixes=CHECK,CHECK-FP16
35

46
; FIXME: crash
57
; define i32 @testmswh_builtin(half %x) {
@@ -8,36 +10,37 @@
810
; ret i32 %0
911
; }
1012

11-
; SOFTFP-LABEL: testmsws_builtin:
12-
; SOFTFP: bl lrintf
13-
; HARDFP-LABEL: testmsws_builtin:
14-
; HARDFP: bl lrintf
1513
define i32 @testmsws_builtin(float %x) {
14+
; CHECK-LABEL: testmsws_builtin:
15+
; CHECK: @ %bb.0: @ %entry
16+
; CHECK-NEXT: b lrintf
1617
entry:
1718
%0 = tail call i32 @llvm.lrint.i32.f32(float %x)
1819
ret i32 %0
1920
}
2021

21-
; SOFTFP-LABEL: testmswd_builtin:
22-
; SOFTFP: bl lrint
23-
; HARDFP-LABEL: testmswd_builtin:
24-
; HARDFP: bl lrint
2522
define i32 @testmswd_builtin(double %x) {
23+
; CHECK-LABEL: testmswd_builtin:
24+
; CHECK: @ %bb.0: @ %entry
25+
; CHECK-NEXT: b lrint
2626
entry:
2727
%0 = tail call i32 @llvm.lrint.i32.f64(double %x)
2828
ret i32 %0
2929
}
3030

31-
; FIXME(#44744): incorrect libcall
32-
; SOFTFP-LABEL: testmswq_builtin:
33-
; SOFTFP: bl lrintl
34-
; HARDFP-LABEL: testmswq_builtin:
35-
; HARDFP: bl lrintl
3631
define i32 @testmswq_builtin(fp128 %x) {
32+
; CHECK-LABEL: testmswq_builtin:
33+
; CHECK: @ %bb.0: @ %entry
34+
; CHECK-NEXT: .save {r11, lr}
35+
; CHECK-NEXT: push {r11, lr}
36+
; CHECK-NEXT: bl lrintl
37+
; CHECK-NEXT: pop {r11, pc}
3738
entry:
3839
%0 = tail call i32 @llvm.lrint.i32.f128(fp128 %x)
3940
ret i32 %0
4041
}
4142

42-
declare i32 @llvm.lrint.i32.f32(float) nounwind readnone
43-
declare i32 @llvm.lrint.i32.f64(double) nounwind readnone
43+
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
44+
; CHECK-FP16: {{.*}}
45+
; CHECK-NOFP16: {{.*}}
46+
; CHECK-SOFT: {{.*}}

‎llvm/test/CodeGen/ARM/vector-lrint.ll‎

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -14,31 +14,26 @@
1414
; %a = call <1 x iXLen> @llvm.lrint.v1iXLen.v1f16(<1 x half> %x)
1515
; ret <1 x iXLen> %a
1616
; }
17-
; declare <1 x iXLen> @llvm.lrint.v1iXLen.v1f16(<1 x half>)
1817

1918
; define <2 x iXLen> @lrint_v2f16(<2 x half> %x) {
2019
; %a = call <2 x iXLen> @llvm.lrint.v2iXLen.v2f16(<2 x half> %x)
2120
; ret <2 x iXLen> %a
2221
; }
23-
; declare <2 x iXLen> @llvm.lrint.v2iXLen.v2f16(<2 x half>)
2422

2523
; define <4 x iXLen> @lrint_v4f16(<4 x half> %x) {
2624
; %a = call <4 x iXLen> @llvm.lrint.v4iXLen.v4f16(<4 x half> %x)
2725
; ret <4 x iXLen> %a
2826
; }
29-
; declare <4 x iXLen> @llvm.lrint.v4iXLen.v4f16(<4 x half>)
3027

3128
; define <8 x iXLen> @lrint_v8f16(<8 x half> %x) {
3229
; %a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8f16(<8 x half> %x)
3330
; ret <8 x iXLen> %a
3431
; }
35-
; declare <8 x iXLen> @llvm.lrint.v8iXLen.v8f16(<8 x half>)
3632

3733
; define <16 x iXLen> @lrint_v16f16(<16 x half> %x) {
3834
; %a = call <16 x iXLen> @llvm.lrint.v16iXLen.v16f16(<16 x half> %x)
3935
; ret <16 x iXLen> %a
4036
; }
41-
; declare <16 x iXLen> @llvm.lrint.v16iXLen.v16f16(<16 x half>)
4237

4338
define <1 x iXLen> @lrint_v1f32(<1 x float> %x) {
4439
; LE-I32-LABEL: lrint_v1f32:
@@ -76,7 +71,6 @@ define <1 x iXLen> @lrint_v1f32(<1 x float> %x) {
7671
%a = call <1 x iXLen> @llvm.lrint.v1iXLen.v1f32(<1 x float> %x)
7772
ret <1 x iXLen> %a
7873
}
79-
declare <1 x iXLen> @llvm.lrint.v1iXLen.v1f32(<1 x float>)
8074

8175
define <2 x iXLen> @lrint_v2f32(<2 x float> %x) {
8276
; LE-I32-LABEL: lrint_v2f32:
@@ -160,7 +154,6 @@ define <2 x iXLen> @lrint_v2f32(<2 x float> %x) {
160154
%a = call <2 x iXLen> @llvm.lrint.v2iXLen.v2f32(<2 x float> %x)
161155
ret <2 x iXLen> %a
162156
}
163-
declare <2 x iXLen> @llvm.lrint.v2iXLen.v2f32(<2 x float>)
164157

165158
define <4 x iXLen> @lrint_v4f32(<4 x float> %x) {
166159
; LE-I32-LABEL: lrint_v4f32:
@@ -274,7 +267,6 @@ define <4 x iXLen> @lrint_v4f32(<4 x float> %x) {
274267
%a = call <4 x iXLen> @llvm.lrint.v4iXLen.v4f32(<4 x float> %x)
275268
ret <4 x iXLen> %a
276269
}
277-
declare <4 x iXLen> @llvm.lrint.v4iXLen.v4f32(<4 x float>)
278270

279271
define <8 x iXLen> @lrint_v8f32(<8 x float> %x) {
280272
; LE-I32-LABEL: lrint_v8f32:
@@ -488,7 +480,6 @@ define <8 x iXLen> @lrint_v8f32(<8 x float> %x) {
488480
%a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8f32(<8 x float> %x)
489481
ret <8 x iXLen> %a
490482
}
491-
declare <8 x iXLen> @llvm.lrint.v8iXLen.v8f32(<8 x float>)
492483

493484
define <16 x iXLen> @lrint_v16f32(<16 x float> %x) {
494485
; LE-I32-LABEL: lrint_v16f32:
@@ -1005,7 +996,6 @@ define <16 x iXLen> @lrint_v16f32(<16 x float> %x) {
1005996
%a = call <16 x iXLen> @llvm.lrint.v16iXLen.v16f32(<16 x float> %x)
1006997
ret <16 x iXLen> %a
1007998
}
1008-
declare <16 x iXLen> @llvm.lrint.v16iXLen.v16f32(<16 x float>)
1009999

10101000
define <1 x iXLen> @lrint_v1f64(<1 x double> %x) {
10111001
; LE-I32-LABEL: lrint_v1f64:
@@ -1043,7 +1033,6 @@ define <1 x iXLen> @lrint_v1f64(<1 x double> %x) {
10431033
%a = call <1 x iXLen> @llvm.lrint.v1iXLen.v1f64(<1 x double> %x)
10441034
ret <1 x iXLen> %a
10451035
}
1046-
declare <1 x iXLen> @llvm.lrint.v1iXLen.v1f64(<1 x double>)
10471036

10481037
define <2 x iXLen> @lrint_v2f64(<2 x double> %x) {
10491038
; LE-I32-LABEL: lrint_v2f64:
@@ -1120,7 +1109,6 @@ define <2 x iXLen> @lrint_v2f64(<2 x double> %x) {
11201109
%a = call <2 x iXLen> @llvm.lrint.v2iXLen.v2f64(<2 x double> %x)
11211110
ret <2 x iXLen> %a
11221111
}
1123-
declare <2 x iXLen> @llvm.lrint.v2iXLen.v2f64(<2 x double>)
11241112

11251113
define <4 x iXLen> @lrint_v4f64(<4 x double> %x) {
11261114
; LE-I32-LABEL: lrint_v4f64:
@@ -1237,7 +1225,6 @@ define <4 x iXLen> @lrint_v4f64(<4 x double> %x) {
12371225
%a = call <4 x iXLen> @llvm.lrint.v4iXLen.v4f64(<4 x double> %x)
12381226
ret <4 x iXLen> %a
12391227
}
1240-
declare <4 x iXLen> @llvm.lrint.v4iXLen.v4f64(<4 x double>)
12411228

12421229
define <8 x iXLen> @lrint_v8f64(<8 x double> %x) {
12431230
; LE-I32-LABEL: lrint_v8f64:
@@ -1467,7 +1454,6 @@ define <8 x iXLen> @lrint_v8f64(<8 x double> %x) {
14671454
%a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8f64(<8 x double> %x)
14681455
ret <8 x iXLen> %a
14691456
}
1470-
declare <8 x iXLen> @llvm.lrint.v8iXLen.v8f64(<8 x double>)
14711457

14721458
define <16 x iXLen> @lrint_v16f64(<16 x double> %x) {
14731459
; LE-I32-LABEL: lrint_v16f64:
@@ -2053,7 +2039,6 @@ define <16 x iXLen> @lrint_v16f64(<16 x double> %x) {
20532039
%a = call <16 x iXLen> @llvm.lrint.v16iXLen.v16f64(<16 x double> %x)
20542040
ret <16 x iXLen> %a
20552041
}
2056-
declare <16 x iXLen> @llvm.lrint.v16iXLen.v16f64(<16 x double>)
20572042

20582043
define <1 x iXLen> @lrint_v1fp128(<1 x fp128> %x) {
20592044
; LE-I32-LABEL: lrint_v1fp128:
@@ -2091,7 +2076,6 @@ define <1 x iXLen> @lrint_v1fp128(<1 x fp128> %x) {
20912076
%a = call <1 x iXLen> @llvm.lrint.v1iXLen.v1fp128(<1 x fp128> %x)
20922077
ret <1 x iXLen> %a
20932078
}
2094-
declare <1 x iXLen> @llvm.lrint.v1iXLen.v1fp128(<1 x fp128>)
20952079

20962080
define <2 x iXLen> @lrint_v2fp128(<2 x fp128> %x) {
20972081
; LE-I32-LABEL: lrint_v2fp128:
@@ -2194,7 +2178,6 @@ define <2 x iXLen> @lrint_v2fp128(<2 x fp128> %x) {
21942178
%a = call <2 x iXLen> @llvm.lrint.v2iXLen.v2fp128(<2 x fp128> %x)
21952179
ret <2 x iXLen> %a
21962180
}
2197-
declare <2 x iXLen> @llvm.lrint.v2iXLen.v2fp128(<2 x fp128>)
21982181

21992182
define <4 x iXLen> @lrint_v4fp128(<4 x fp128> %x) {
22002183
; LE-I32-LABEL: lrint_v4fp128:
@@ -2347,7 +2330,6 @@ define <4 x iXLen> @lrint_v4fp128(<4 x fp128> %x) {
23472330
%a = call <4 x iXLen> @llvm.lrint.v4iXLen.v4fp128(<4 x fp128> %x)
23482331
ret <4 x iXLen> %a
23492332
}
2350-
declare <4 x iXLen> @llvm.lrint.v4iXLen.v4fp128(<4 x fp128>)
23512333

23522334
define <8 x iXLen> @lrint_v8fp128(<8 x fp128> %x) {
23532335
; LE-I32-LABEL: lrint_v8fp128:
@@ -2664,7 +2646,6 @@ define <8 x iXLen> @lrint_v8fp128(<8 x fp128> %x) {
26642646
%a = call <8 x iXLen> @llvm.lrint.v8iXLen.v8fp128(<8 x fp128> %x)
26652647
ret <8 x iXLen> %a
26662648
}
2667-
declare <8 x iXLen> @llvm.lrint.v8iXLen.v8fp128(<8 x fp128>)
26682649

26692650
define <16 x iXLen> @lrint_v16fp128(<16 x fp128> %x) {
26702651
; LE-I32-LABEL: lrint_v16fp128:
@@ -3262,4 +3243,3 @@ define <16 x iXLen> @lrint_v16fp128(<16 x fp128> %x) {
32623243
%a = call <16 x iXLen> @llvm.lrint.v16iXLen.v16fp128(<16 x fp128> %x)
32633244
ret <16 x iXLen> %a
32643245
}
3265-
declare <16 x iXLen> @llvm.lrint.v16iXLen.v16fp128(<16 x fp128>)

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