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‎LICENSE.md

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Copyright (c) 2022 Lone Dynamics Corporation. All rights reserved.
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Redistribution and use in source, binary or physical forms, with or without
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modification, is permitted provided that the following condition is met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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THIS HARDWARE, SOFTWARE, DATA AND/OR DOCUMENTATION ("THE ASSETS") IS PROVIDED
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"AS IS" WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT
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LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE ASSETS OR THE USE OR OTHER DEALINGS IN THE ASSETS. USE AT
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YOUR OWN RISK.

‎Makefile

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blinky_minze:
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mkdir -p output
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yosys -q -p "synth_ecp5 -top blinky -json output/blinky_minze.json" rtl/blinky_minze.v
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nextpnr-ecp5 --12k --package CABGA256 --lpf minze_v1.lpf --json output/blinky_minze.json --textcfg output/minze_blinky_out.config
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ecppack -v --compress --freq 2.4 output/minze_blinky_out.config --bit output/minze.bit
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prog:
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openFPGALoader -c dirtyJtag output/minze.bit

‎README.md

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# Minze Computer
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Minze is an FPGA computer designed by Lone Dynamics Corporation.
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This repo contains schematics, PCB layouts, pinouts, a 3D-printable case (soon), example gateware and documentation.
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Find more information on the [Minze product page](https://machdyne.com/product/minze-computer/).
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## Programming Minze
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Minze has a JTAG interface and ships with a [DFU bootloader](https://github.com/machdyne/tinydfu-bootloader) that allows the included flash [MMOD](https://machdyne.com/product/mmod) to be programmed over the USB-C port.
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### DFU
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The DFU bootloader is available for 5 seconds after power-on, issuing a DFU command during this period will stop the boot process until the DFU device is detached. If no command is received the boot process will continue and the user gateware will be loaded.
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Install [dfu-util](http://dfu-util.sourceforge.net) (Debian/Ubuntu):
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```
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$ sudo apt install dfu-util
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```
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Update the user gateware on the flash MMOD:
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```
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$ sudo dfu-util -a 0 -D image.bit
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```
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Detach the DFU device and continue the boot process:
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```
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$ sudo dfu-util -a 0 -e
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```
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It is possible to update the bootloader itself using DFU but you shouldn't attempt this unless you have a JTAG programmer (or another method to program the MMOD) available, in case you need to restore the bootloader.
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### JTAG
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These examples assume you're using a "USB Blaster" JTAG cable, see the header pinout below. You will need to have [openFPGALoader](https://github.com/trabucayre/openFPGALoader) installed.
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Program the configuration SRAM:
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```
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openFPGALoader -c usb-blaster image.bit
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```
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Program the flash MMOD:
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```
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openFPGALoader -f -c usb-blaster images/bootloader/tinydfu_minze.bit
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```
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## Blinky
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Building the blinky example requires [Yosys](https://github.com/YosysHQ/yosys), [nextpnr-ecp5](https://github.com/YosysHQ/nextpnr) and [Project Trellis](https://github.com/YosysHQ/prjtrellis).
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Assuming they are installed, you can simply type `make` to build the gateware, which will be written to output/blinky.bin. You can then use [openFPGALoader](https://github.com/trabucayre/openFPGALoader) or dfu-util to write the gateware to the device.
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## Linux
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See the [Kakao Linux](https://github.com/machdyne/kakao) repo for the latest instructions.
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### Prebuilt Images
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Prebuilt gateware capable of running Linux is available in the `images/v1` directory.
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### Building Linux-capable Gateware
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Please follow the setup instructions in the [linux-on-litex-vexriscv](https://github.com/litex-hub/linux-on-litex-vexriscv) repo and then:
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1. Build the Linux-capable gateware:
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```
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$ cd linux-on-litex-vexriscv
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$ ./make.py --board=minze --dcache-size=64 --icache-size=64 --uart-baudrate=115200 --build
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$ ls build/minze
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```
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2. Write the gateware to the MMOD using USB DFU:
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```
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$ sudo dfu-util -a 0 -D build/minze/gateware/minze.bit
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```
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3. Copy the device tree binary `build/minze/minze.dtb` to a FAT-formatted MicroSD card.
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## JTAG Header
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The 3.3V JTAG header can be used to program the FPGA SRAM as well as the MMOD flash memory. It can also be used to provide power (5V) to the board.
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```
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1 2
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3 4
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5 6
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```
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| Pin | Signal |
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| --- | ------ |
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| 1 | TCK |
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| 2 | TDI |
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| 3 | TDO |
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| 4 | TMS |
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| 5 | 5V0 |
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| 6 | GND |
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## Board Revisions
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| Revision | Notes |
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| -------- | ----- |
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| V1 | Initial production version |
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## License
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The contents of this repo are released under the [Lone Dynamics Open License](LICENSE.md) with the following exceptions:
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- The KiCad design files contain parts of the [kicad-pmod](https://github.com/mithro/kicad-pmod) library which is released under the [Apache License, Version 2.0](https://www.apache.org/licenses/LICENSE-2.0.html).
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- The KiCad design files may contain symbols and footprints released under other licenses; please contact us if we've failed to give proper attribution.
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Note: You can use these designs for commercial purposes but we ask that instead of producing exact clones, that you either replace our trademarks and logos with your own or add your own next to ours.

‎minze_v1.lpf

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BLOCK RESETPATHS;
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BLOCK ASYNCPATHS;
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LOCATE COMP "CLK_48" SITE "A7";
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IOBUF PORT "CLK_48" IO_TYPE=LVCMOS33;
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FREQUENCY PORT "CLK_48" 48.0 MHz;
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LOCATE COMP "LED_A" SITE "A2";
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IOBUF PORT "LED_A" IO_TYPE=LVCMOS33;
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LOCATE COMP "UART0_RX" SITE "B1";
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IOBUF PORT "UART0_RX" IO_TYPE=LVCMOS33;
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LOCATE COMP "UART0_TX" SITE "B2";
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IOBUF PORT "UART0_TX" IO_TYPE=LVCMOS33;
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LOCATE COMP "sdram_clock" SITE "F16";
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IOBUF PORT "sdram_clock" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[0]" SITE "M13";
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IOBUF PORT "sdram_a[0]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[1]" SITE "M14";
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IOBUF PORT "sdram_a[1]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[2]" SITE "L14";
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IOBUF PORT "sdram_a[2]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[3]" SITE "L13";
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IOBUF PORT "sdram_a[3]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[4]" SITE "G12";
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IOBUF PORT "sdram_a[4]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[5]" SITE "G13";
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IOBUF PORT "sdram_a[5]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[6]" SITE "G14";
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IOBUF PORT "sdram_a[6]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[7]" SITE "G15";
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IOBUF PORT "sdram_a[7]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[8]" SITE "F12";
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IOBUF PORT "sdram_a[8]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[9]" SITE "F13";
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IOBUF PORT "sdram_a[9]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[10]" SITE "T15";
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IOBUF PORT "sdram_a[10]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[11]" SITE "F14";
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IOBUF PORT "sdram_a[11]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_a[12]" SITE "E14";
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IOBUF PORT "sdram_a[12]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_ba[0]" SITE "P14";
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IOBUF PORT "sdram_ba[0]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_ba[1]" SITE "N13";
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IOBUF PORT "sdram_ba[1]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_cs_n" SITE "G16";
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IOBUF PORT "sdram_cs_n" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_cke" SITE "F15";
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IOBUF PORT "sdram_cke" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_ras_n" SITE "J16";
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IOBUF PORT "sdram_ras_n" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_cas_n" SITE "K16";
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IOBUF PORT "sdram_cas_n" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_we_n" SITE "L15";
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IOBUF PORT "sdram_we_n" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[0]" SITE "R15";
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IOBUF PORT "sdram_dq[0]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[1]" SITE "R16";
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IOBUF PORT "sdram_dq[1]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[2]" SITE "P15";
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IOBUF PORT "sdram_dq[2]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[3]" SITE "P16";
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IOBUF PORT "sdram_dq[3]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[4]" SITE "N16";
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IOBUF PORT "sdram_dq[4]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[5]" SITE "N14";
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IOBUF PORT "sdram_dq[5]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[6]" SITE "M16";
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IOBUF PORT "sdram_dq[6]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[7]" SITE "M15";
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IOBUF PORT "sdram_dq[7]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[8]" SITE "E16";
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IOBUF PORT "sdram_dq[8]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[9]" SITE "D14";
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IOBUF PORT "sdram_dq[9]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[10]" SITE "D16";
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IOBUF PORT "sdram_dq[10]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[11]" SITE "C15";
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IOBUF PORT "sdram_dq[11]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[12]" SITE "C16";
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IOBUF PORT "sdram_dq[12]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[13]" SITE "C14";
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IOBUF PORT "sdram_dq[13]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[14]" SITE "B16";
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IOBUF PORT "sdram_dq[14]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dq[15]" SITE "B15";
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IOBUF PORT "sdram_dq[15]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dm[0]" SITE "L16";
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IOBUF PORT "sdram_dm[0]" IO_TYPE=LVTTL33;
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LOCATE COMP "sdram_dm[1]" SITE "E15";
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IOBUF PORT "sdram_dm[1]" IO_TYPE=LVTTL33;
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LOCATE COMP "VGA_R" SITE "T2";
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IOBUF PORT "VGA_R" IO_TYPE=LVCMOS33;
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LOCATE COMP "VGA_G" SITE "N1";
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IOBUF PORT "VGA_G" IO_TYPE=LVCMOS33;
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LOCATE COMP "VGA_B" SITE "R4";
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IOBUF PORT "VGA_B" IO_TYPE=LVCMOS33;
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LOCATE COMP "VGA_HS" SITE "P3";
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IOBUF PORT "VGA_HS" IO_TYPE=LVCMOS33;
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LOCATE COMP "VGA_VS" SITE "R3";
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IOBUF PORT "VGA_VS" IO_TYPE=LVCMOS33;
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LOCATE COMP "SPI_MOSI" SITE "T8";
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IOBUF PORT "SPI_MOSI" SLEWRATE=FAST;
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IOBUF PORT "SPI_MOSI" IO_TYPE=LVCMOS33;
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LOCATE COMP "SPI_SS_FLASH" SITE "N8";
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IOBUF PORT "SPI_SS_FLASH" SLEWRATE=FAST;
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IOBUF PORT "SPI_SS_FLASH" IO_TYPE=LVCMOS33;
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LOCATE COMP "SPI_MISO" SITE "T7";
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IOBUF PORT "SPI_MISO" SLEWRATE=FAST;
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IOBUF PORT "SPI_MISO" IO_TYPE=LVCMOS33;
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LOCATE COMP "SD_SCK" SITE "F2";
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IOBUF PORT "SD_SCK" SLEWRATE=FAST;
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IOBUF PORT "SD_SCK" IO_TYPE=LVCMOS33;
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LOCATE COMP "SD_MOSI" SITE "K1";
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IOBUF PORT "SD_MOSI" SLEWRATE=FAST;
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IOBUF PORT "SD_MOSI" IO_TYPE=LVCMOS33;
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LOCATE COMP "SD_SS" SITE "K2";
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IOBUF PORT "SD_SS" SLEWRATE=FAST;
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IOBUF PORT "SD_SS" IO_TYPE=LVCMOS33;
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LOCATE COMP "SD_MISO" SITE "F3";
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IOBUF PORT "SD_MISO" SLEWRATE=FAST;
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IOBUF PORT "SD_MISO" IO_TYPE=LVCMOS33;
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LOCATE COMP "PMOD_A1" SITE "B11";
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IOBUF PORT "PMOD_A1" IO_TYPE=LVCMOS33;
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LOCATE COMP "PMOD_A2" SITE "B12";
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IOBUF PORT "PMOD_A2" IO_TYPE=LVCMOS33;
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LOCATE COMP "PMOD_A3" SITE "B13";
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IOBUF PORT "PMOD_A3" IO_TYPE=LVCMOS33;
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LOCATE COMP "PMOD_A4" SITE "B14";
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IOBUF PORT "PMOD_A4" IO_TYPE=LVCMOS33;
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LOCATE COMP "PMOD_A7" SITE "A11";
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IOBUF PORT "PMOD_A7" IO_TYPE=LVCMOS33;
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LOCATE COMP "PMOD_A8" SITE "A12";
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IOBUF PORT "PMOD_A8" IO_TYPE=LVCMOS33;
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LOCATE COMP "PMOD_A9" SITE "A13";
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IOBUF PORT "PMOD_A9" IO_TYPE=LVCMOS33;
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LOCATE COMP "PMOD_A10" SITE "A14";
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IOBUF PORT "PMOD_A10" IO_TYPE=LVCMOS33;

‎pcb/minze_v1.pdf

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