diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index fd762f35124b5..006d364834524 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -1380,6 +1380,14 @@ RISCVTTIImpl::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const { auto *RetTy = ICA.getReturnType(); switch (ICA.getID()) { + case Intrinsic::vp_load: + case Intrinsic::vp_store: { + Type *DataTy = ICA.getID() == Intrinsic::vp_store ? ICA.getArgTypes()[0] + : ICA.getReturnType(); + if (DataTy && DataTy->isIntOrIntVectorTy(1)) + return InstructionCost::getInvalid(); + break; + } case Intrinsic::lrint: case Intrinsic::llrint: case Intrinsic::lround: diff --git a/llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll b/llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll index 9e8f727978001..6ec81b2cefc73 100644 --- a/llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll +++ b/llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll @@ -978,6 +978,17 @@ define void @store() { ret void } +define void @i1_vp_memory() { +; CHECK-LABEL: 'i1_vp_memory' +; CHECK-NEXT: Cost Model: Invalid cost for instruction: %l = call @llvm.vp.load.nxv16i1.p0(ptr undef, undef, i32 undef) +; CHECK-NEXT: Cost Model: Invalid cost for instruction: call void @llvm.vp.store.nxv16i1.p0( undef, ptr undef, undef, i32 undef) +; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void +; + %l = call @llvm.vp.load.nxv16i1.p0(ptr undef, undef, i32 undef) + call void @llvm.vp.store.nxv16i1.p0( undef, ptr undef, undef, i32 undef) + ret void +} + define void @gather() { ; ARGBASED-LABEL: 'gather' ; ARGBASED-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %1 = call <2 x i8> @llvm.vp.gather.v2i8.v2p0(<2 x ptr> poison, <2 x i1> poison, i32 poison)