From b8d508d72cafdafccdb8ab4948891fdbf494519e Mon Sep 17 00:00:00 2001 From: Iris Shi <0.0@owo.li> Date: Sun, 10 May 2026 14:41:35 +0800 Subject: [PATCH 1/2] test --- llvm/test/CodeGen/X86/abds.ll | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/llvm/test/CodeGen/X86/abds.ll b/llvm/test/CodeGen/X86/abds.ll index 5948af563d152..81683db82e9a5 100644 --- a/llvm/test/CodeGen/X86/abds.ll +++ b/llvm/test/CodeGen/X86/abds.ll @@ -1389,6 +1389,32 @@ define i32 @PR185467(i32 range(i32 0, 2147483647) %v) { ret i32 %absx } +define i32 @abs_add_known_positive(i32 %a) { +; X86-LABEL: abs_add_known_positive: +; X86: # %bb.0: +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF +; X86-NEXT: leal 1(%ecx), %edx +; X86-NEXT: movl $-1, %eax +; X86-NEXT: subl %ecx, %eax +; X86-NEXT: cmovbl %edx, %eax +; X86-NEXT: retl +; +; X64-LABEL: abs_add_known_positive: +; X64: # %bb.0: +; X64-NEXT: # kill: def $edi killed $edi def $rdi +; X64-NEXT: andl $2147483647, %edi # imm = 0x7FFFFFFF +; X64-NEXT: leal 1(%rdi), %ecx +; X64-NEXT: movl $-1, %eax +; X64-NEXT: subl %edi, %eax +; X64-NEXT: cmovbl %ecx, %eax +; X64-NEXT: retq + %x = and i32 %a, 2147483647 + %add = add i32 %x, 1 + %abs = call i32 @llvm.abs.i32(i32 %add, i1 false) + ret i32 %abs +} + declare i8 @llvm.abs.i8(i8, i1) declare i16 @llvm.abs.i16(i16, i1) declare i32 @llvm.abs.i32(i32, i1) From 74028a21d42bc07f50d56ed2f8d4ee69623648c2 Mon Sep 17 00:00:00 2001 From: Iris Shi <0.0@owo.li> Date: Sun, 10 May 2026 14:41:50 +0800 Subject: [PATCH 2/2] [DAGCombiner] Fix abs(add) to abdu miscompile in foldABSToABD --- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 4 +--- llvm/test/CodeGen/X86/abds.ll | 18 +++++++++--------- 2 files changed, 10 insertions(+), 12 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index bf4d4cc261e42..3d65c82f051a8 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -12025,10 +12025,8 @@ SDValue DAGCombiner::foldABSToABD(SDNode *N, const SDLoc &DL) { return CreateZextedAbd(ISD::ABDS); // fold (abs (sub x, y)) -> abdu(x, y) - // fold (abs (add x, -y)) -> abdu(x, y) bool Op1SignBitIsOne = DAG.computeKnownBits(Op1).isNegative(); - bool AbsOpWillNUW = DAG.SignBitIsZero(Op0) && - (IsAdd ? DAG.SignBitIsZero(Op1) : Op1SignBitIsOne); + bool AbsOpWillNUW = !IsAdd && DAG.SignBitIsZero(Op0) && Op1SignBitIsOne; if (hasOperation(ISD::ABDU, VT) && AbsOpWillNUW) return CreateZextedAbd(ISD::ABDU); diff --git a/llvm/test/CodeGen/X86/abds.ll b/llvm/test/CodeGen/X86/abds.ll index 81683db82e9a5..a3056e9426643 100644 --- a/llvm/test/CodeGen/X86/abds.ll +++ b/llvm/test/CodeGen/X86/abds.ll @@ -1392,12 +1392,12 @@ define i32 @PR185467(i32 range(i32 0, 2147483647) %v) { define i32 @abs_add_known_positive(i32 %a) { ; X86-LABEL: abs_add_known_positive: ; X86: # %bb.0: -; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X86-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF -; X86-NEXT: leal 1(%ecx), %edx -; X86-NEXT: movl $-1, %eax -; X86-NEXT: subl %ecx, %eax -; X86-NEXT: cmovbl %edx, %eax +; X86-NEXT: movl $2147483647, %ecx # imm = 0x7FFFFFFF +; X86-NEXT: andl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: incl %ecx +; X86-NEXT: movl %ecx, %eax +; X86-NEXT: negl %eax +; X86-NEXT: cmovsl %ecx, %eax ; X86-NEXT: retl ; ; X64-LABEL: abs_add_known_positive: @@ -1405,9 +1405,9 @@ define i32 @abs_add_known_positive(i32 %a) { ; X64-NEXT: # kill: def $edi killed $edi def $rdi ; X64-NEXT: andl $2147483647, %edi # imm = 0x7FFFFFFF ; X64-NEXT: leal 1(%rdi), %ecx -; X64-NEXT: movl $-1, %eax -; X64-NEXT: subl %edi, %eax -; X64-NEXT: cmovbl %ecx, %eax +; X64-NEXT: movl %ecx, %eax +; X64-NEXT: negl %eax +; X64-NEXT: cmovsl %ecx, %eax ; X64-NEXT: retq %x = and i32 %a, 2147483647 %add = add i32 %x, 1