diff --git a/llvm/lib/Target/PowerPC/PPCInstrP10.td b/llvm/lib/Target/PowerPC/PPCInstrP10.td
index 6799a9838ec63..c8c85eb84ad54 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrP10.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrP10.td
@@ -2988,3 +2988,19 @@ let Predicates = [IsISA3_1, PrefixInstrs], isAsmParserOnly = 1, hasNoSchedulingI
                                  (ins s34imm64_pcrel:$SI),
                                  "pla $RT, $SI", IIC_IntSimple, []>, isPCRel;
 }
+
+// pnop - Prefixed No-Op (Power ISA v3.1, Section 3.3.1.2)
+// Prefix word 0x07000000: primary opcode 1, prefix type 3, remaining bits 0.
+// Suffix word 0x00000000. Like all prefixed instructions it must not cross a
+// 64-byte boundary.
+let Predicates = [PrefixInstrs],
+    hasNoSchedulingInfo = 1, hasSideEffects = 0,
+    mayLoad = 0, mayStore = 0 in {
+  def PNOP : PI<1, 0, (outs), (ins), "pnop", IIC_IntSimple> {
+    // Prefix: type 3, remaining prefix bits all zero.
+    let Inst{6...7} = 3;
+    let Inst{8...31} = 0;
+    // Suffix: bits 38-63 all zero (bits 32-37 already = 0 from opcode)
+    let Inst{38...63} = 0;
+  }
+}
diff --git a/llvm/test/MC/Disassembler/PowerPC/ppc-pnop.txt b/llvm/test/MC/Disassembler/PowerPC/ppc-pnop.txt
new file mode 100644
index 0000000000000..eaaef6f0c7e89
--- /dev/null
+++ b/llvm/test/MC/Disassembler/PowerPC/ppc-pnop.txt
@@ -0,0 +1,6 @@
+# RUN: llvm-mc --disassemble %s -triple powerpc64-unknown-linux-gnu \
+# RUN:   -mcpu=pwr10 | FileCheck %s
+
+# Prefixed no-op (Power ISA v3.1). Instruction bytes are big-endian.
+# CHECK: pnop
+0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x00
diff --git a/llvm/test/MC/PowerPC/ppc-pnop.s b/llvm/test/MC/PowerPC/ppc-pnop.s
new file mode 100644
index 0000000000000..39452bd0e9af4
--- /dev/null
+++ b/llvm/test/MC/PowerPC/ppc-pnop.s
@@ -0,0 +1,10 @@
+# RUN: llvm-mc -triple powerpc64-unknown-linux-gnu -show-encoding %s | \
+# RUN:   FileCheck %s --check-prefix=CHECK-BE
+# RUN: llvm-mc -triple powerpc64le-unknown-linux-gnu -show-encoding %s | \
+# RUN:   FileCheck %s --check-prefix=CHECK-LE
+
+# Prefixed no-op (Power ISA v3.1, Section 3.3.1.2)
+# Encoding: prefix 0x0700_0000 + suffix 0x0000_0000
+pnop
+# CHECK-BE: pnop  # encoding: [0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00]
+# CHECK-LE: pnop  # encoding: [0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x00]