[M68k] allow 16-bit registers for MOVE to/from CCR

[TechnoElf]

Fixes #106210.

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[llvmbot]

@llvm/pr-subscribers-backend-m68k

Author: Janis Heims (TechnoElf)

Changes

Fixes #106210.

---

Full diff: https://github.com/llvm/llvm-project/pull/107591.diff

1 Files Affected:

• (modified) llvm/lib/Target/M68k/M68kInstrInfo.cpp (+12-6)

diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.cpp b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
index 23c5c76a47479b..8704d64ca17a36 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.cpp
@@ -709,13 +709,19 @@ void M68kInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
   bool ToSR = DstReg == M68k::SR;
 
   if (FromCCR) {
-    assert(M68k::DR8RegClass.contains(DstReg) &&
-           "Need DR8 register to copy CCR");
-    Opc = M68k::MOV8dc;
+    if (M68k::DR8RegClass.contains(DstReg))
+      Opc = M68k::MOV8dc;
+    else if (M68k::DR16RegClass.contains(DstReg))
+      Opc = M68k::MOV16dc;
+    else
+      llvm_unreachable("Invalid register for MOVE from CCR");
   } else if (ToCCR) {
-    assert(M68k::DR8RegClass.contains(SrcReg) &&
-           "Need DR8 register to copy CCR");
-    Opc = M68k::MOV8cd;
+    if (M68k::DR8RegClass.contains(SrcReg))
+      Opc = M68k::MOV8cd;
+    else if (M68k::DR16RegClass.contains(SrcReg))
+      Opc = M68k::MOV16cd;
+    else
+      llvm_unreachable("Invalid register for MOVE to CCR");
   } else if (FromSR || ToSR)
     llvm_unreachable("Cannot emit SR copy instruction");
 

[TechnoElf]

Ping @0x59616e

[mshockwave]

Thanks for the patch! Could you add some tests?

[mshockwave]

please add braces when one of the else/else if arms is using braces: https://llvm.org/docs/CodingStandards.html#don-t-use-braces-on-simple-single-statement-bodies-of-if-else-loop-statements

[TechnoElf]

Should I close this PR as #114714 already implements the requested changes?

[mshockwave]

Should I close this PR as #114714 already implements the requested changes?

Feel free to do that!