diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp index 2b301130ef7b70..a00adc0bb035c6 100644 --- a/clang/lib/CodeGen/CGCall.cpp +++ b/clang/lib/CodeGen/CGCall.cpp @@ -2025,6 +2025,9 @@ static void getTrivialDefaultFunctionAttributes( FuncAttrs.addAttribute(llvm::Attribute::NoUnwind); } + if (CodeGenOpts.SaveRegParams && !AttrOnCallSite) + FuncAttrs.addAttribute("save-reg-params"); + for (StringRef Attr : CodeGenOpts.DefaultFunctionAttrs) { StringRef Var, Value; std::tie(Var, Value) = Attr.split('='); diff --git a/clang/lib/CodeGen/Targets/PPC.cpp b/clang/lib/CodeGen/Targets/PPC.cpp index 185f4802b11499..e4155810963eb8 100644 --- a/clang/lib/CodeGen/Targets/PPC.cpp +++ b/clang/lib/CodeGen/Targets/PPC.cpp @@ -146,10 +146,6 @@ class AIXTargetCodeGenInfo : public TargetCodeGenInfo { void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const override; - - void emitTargetMetadata(CodeGen::CodeGenModule &CGM, - const llvm::MapVector - &MangledDeclNames) const override; }; } // namespace @@ -325,13 +321,6 @@ void AIXTargetCodeGenInfo::setTargetAttributes( } } -void AIXTargetCodeGenInfo::emitTargetMetadata( - CodeGen::CodeGenModule &CGM, - const llvm::MapVector &MangledDeclNames) const { - if (CGM.getCodeGenOpts().SaveRegParams) - CGM.getModule().addModuleFlag(llvm::Module::Error, "save-reg-params", 1); -} - // PowerPC-32 namespace { /// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information. diff --git a/clang/test/CodeGen/PowerPC/save-reg-params.c b/clang/test/CodeGen/PowerPC/save-reg-params.c index 7e98de22d3a519..d34c97a8fc45ff 100644 --- a/clang/test/CodeGen/PowerPC/save-reg-params.c +++ b/clang/test/CodeGen/PowerPC/save-reg-params.c @@ -6,5 +6,5 @@ void bar(int); void foo(int x) { bar(x); } -// SAVE: !{i32 1, !"save-reg-params", i32 1} -// NOSAVE-NOT: !{i32 1, !"save-reg-params", i32 1} \ No newline at end of file +// SAVE: attributes #{{[0-9]+}} = { {{.+}} "save-reg-params" {{.+}} } +// NOSAVE-NOT: "save-reg-params" diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index 2fa504218e3157..16a4cfe460326b 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -2496,9 +2496,8 @@ void PPCAIXAsmPrinter::emitTracebackTable() { uint32_t GPRSaved = 0; - bool SaveParams = - MF->getFunction().getParent()->getModuleFlag("save-reg-params"); - if (SaveParams) { + bool SaveParams = MF->getFunction().hasFnAttribute("save-reg-params"); + if (SaveParams && MF->getFunction().isVarArg()) { // Assuming eight GPRs matches XL behavior for varargs. GPRSaved = 8; } else { diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index e519551934b1e6..afe5bad1994f3d 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -7225,8 +7225,7 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX( const unsigned LinkageSize = Subtarget.getFrameLowering()->getLinkageSize(); CCInfo.AllocateStack(LinkageSize, Align(PtrByteSize)); uint64_t SaveStackPos = CCInfo.getStackSize(); - bool SaveParams = - MF.getFunction().getParent()->getModuleFlag("save-reg-params"); + bool SaveParams = MF.getFunction().hasFnAttribute("save-reg-params"); CCInfo.AnalyzeFormalArguments(Ins, CC_AIX); SmallVector MemOps; diff --git a/llvm/test/CodeGen/PowerPC/save-reg-params.ll b/llvm/test/CodeGen/PowerPC/save-reg-params.ll index 3b6cf694254096..7640329f606862 100644 --- a/llvm/test/CodeGen/PowerPC/save-reg-params.ll +++ b/llvm/test/CodeGen/PowerPC/save-reg-params.ll @@ -2,7 +2,7 @@ ; RUN: llc -verify-machineinstrs -mtriple=powerpc-ibm-aix -mcpu=pwr7 < %s | FileCheck %s -check-prefix=32BIT ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix -mcpu=pwr7 < %s | FileCheck %s -check-prefix=64BIT -define void @i64_join(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h, i64 %i, i64 %j) { +define void @i64_join(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h, i64 %i, i64 %j) #0 { ; 32BIT-LABEL: i64_join: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -56,7 +56,7 @@ entry: ret void } -define void @i64_join_missing(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h, i64 %i, i64 %j) { +define void @i64_join_missing(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h, i64 %i, i64 %j) #0 { ; 32BIT-LABEL: i64_join_missing: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -109,7 +109,7 @@ entry: ret void } -define void @i32_join(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, i32 signext %i, i32 signext %j) { +define void @i32_join(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, i32 signext %i, i32 signext %j) #0 { ; 32BIT-LABEL: i32_join: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -163,7 +163,7 @@ entry: ret void } -define void @i32_join_missing(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, i32 signext %i, i32 signext %j) { +define void @i32_join_missing(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d, i32 signext %e, i32 signext %f, i32 signext %g, i32 signext %h, i32 signext %i, i32 signext %j) #0 { ; 32BIT-LABEL: i32_join_missing: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -216,7 +216,7 @@ entry: ret void } -define void @f32_join(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j) { +define void @f32_join(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j) #0 { ; 32BIT-LABEL: f32_join: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -274,7 +274,7 @@ entry: ret void } -define void @f32_join_missing(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j) { +define void @f32_join_missing(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j) #0 { ; 32BIT-LABEL: f32_join_missing: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -332,7 +332,7 @@ entry: ret void } -define void @f64_join(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j) { +define void @f64_join(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j) #0 { ; 32BIT-LABEL: f64_join: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -390,7 +390,7 @@ entry: ret void } -define void @f64_missing(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j) { +define void @f64_missing(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j) #0 { ; 32BIT-LABEL: f64_missing: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -448,7 +448,7 @@ entry: ret void } -define void @mixed_1(double %a, i64 %b, i64 %c, i32 signext %d, i64 %e, float %f, float %g, double %h, i32 signext %i, double %j) { +define void @mixed_1(double %a, i64 %b, i64 %c, i32 signext %d, i64 %e, float %f, float %g, double %h, i32 signext %i, double %j) #0 { ; 32BIT-LABEL: mixed_1: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -587,7 +587,7 @@ entry: ret void } -define void @mixed_2(<2 x double> %a, <4 x i32> %b, i64 %c) { +define void @mixed_2(<2 x double> %a, <4 x i32> %b, i64 %c) #0 { ; 32BIT-LABEL: mixed_2: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -658,7 +658,7 @@ entry: %struct.foo = type <{ [3 x i32], double, [12 x i8], <4 x i32> }> -define void @mixed_3(<2 x double> %a, i64 %b, double %c, float %d, i32 signext %e, double %f, ...) { +define void @mixed_3(<2 x double> %a, i64 %b, double %c, float %d, i32 signext %e, double %f, ...) #0 { ; 32BIT-LABEL: mixed_3: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -757,7 +757,7 @@ entry: ret void } -define signext i32 @mixed_4(ptr byval(%struct.foo) align 16 %foo, i32 %sec) { +define signext i32 @mixed_4(ptr byval(%struct.foo) align 16 %foo, i32 %sec) #0 { ; 32BIT-LABEL: mixed_4: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: stw 9, 48(1) @@ -809,7 +809,7 @@ entry: %struct.bar = type { i8, i32, <4 x i32>, ptr, i8 } -define void @mixed_5(ptr byref(%struct.bar) align 16 %r, ptr byval(%struct.bar) align 16 %x, i32 signext %y, ptr byval(%struct.foo) align 16 %f) { +define void @mixed_5(ptr byref(%struct.bar) align 16 %r, ptr byval(%struct.bar) align 16 %x, i32 signext %y, ptr byval(%struct.foo) align 16 %f) #0 { ; 32BIT-LABEL: mixed_5: ; 32BIT: # %bb.0: # %entry ; 32BIT-NEXT: mflr 0 @@ -871,6 +871,4 @@ declare void @consume_f32(float) declare void @consume_i64(i64) declare void @consume_i32(i32 signext) -!llvm.module.flags = !{!0} - -!0 = !{i32 1, !"save-reg-params", i32 1} +attributes #0 = { nofree noinline nounwind "save-reg-params" }