Add a bitwidth and fixup test

Author: davemgreen

llvm/include/llvm/CodeGen/GlobalISel/GISelValueTracking.h

@@ -106,13 +106,14 @@ class GISelValueTracking : public GISelChangeObserver {
   /// that are all less than the element bit-width of the shift node, return the
   /// valid constant range.
   std::optional<ConstantRange>
-  getValidShiftAmountRange(Register R, const APInt &DemandedElts,
-                           unsigned Depth);
+  getValidShiftAmountRange(Register R, unsigned BitWidth,
+                           const APInt &DemandedElts, unsigned Depth);
 
   /// If a G_SHL/G_ASHR/G_LSHR node with shift operand \p R has shift amounts
   /// that are all less than the element bit-width of the shift node, return the
   /// minimum possible value.
   std::optional<uint64_t> getValidMinimumShiftAmount(Register R,
+                                                     unsigned BitWidth,
                                                      const APInt &DemandedElts,
                                                      unsigned Depth = 0);
 

llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp

@@ -1861,7 +1861,8 @@ unsigned GISelValueTracking::computeNumSignBits(Register R,
     Register Src1 = MI.getOperand(1).getReg();
     Register Src2 = MI.getOperand(2).getReg();
     FirstAnswer = computeNumSignBits(Src1, DemandedElts, Depth + 1);
-    if (auto C = getValidMinimumShiftAmount(Src2, DemandedElts, Depth + 1))
+    if (auto C =
+            getValidMinimumShiftAmount(Src2, TyBits, DemandedElts, Depth + 1))
       FirstAnswer = std::min<uint64_t>(FirstAnswer + *C, TyBits);
     break;
   }
@@ -2012,13 +2013,12 @@ unsigned GISelValueTracking::computeNumSignBits(Register R, unsigned Depth) {
 }
 
 std::optional<ConstantRange> GISelValueTracking::getValidShiftAmountRange(
-    Register R, const APInt &DemandedElts, unsigned Depth) {
+    Register R, unsigned BitWidth, const APInt &DemandedElts, unsigned Depth) {
   // Shifting more than the bitwidth is not valid.
   MachineInstr &MI = *MRI.getVRegDef(R);
   unsigned Opcode = MI.getOpcode();
 
   LLT Ty = MRI.getType(R);
-  unsigned BitWidth = Ty.getScalarSizeInBits();
 
   if (Opcode == TargetOpcode::G_CONSTANT) {
     const APInt &ShAmt = MI.getOperand(1).getCImm()->getValue();
@@ -2062,9 +2062,9 @@ std::optional<ConstantRange> GISelValueTracking::getValidShiftAmountRange(
 }
 
 std::optional<uint64_t> GISelValueTracking::getValidMinimumShiftAmount(
-    Register R, const APInt &DemandedElts, unsigned Depth) {
+    Register R, unsigned BitWidth, const APInt &DemandedElts, unsigned Depth) {
   if (std::optional<ConstantRange> AmtRange =
-          getValidShiftAmountRange(R, DemandedElts, Depth))
+          getValidShiftAmountRange(R, BitWidth, DemandedElts, Depth))
     return AmtRange->getUnsignedMin().getZExtValue();
   return std::nullopt;
 }

llvm/test/CodeGen/AArch64/GlobalISel/knownbits-ashr.mir

@@ -1,5 +1,5 @@
 # NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking>" %s -o - 2>&1 | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes="print<gisel-value-tracking>" %s -filetype=null 2>&1 | FileCheck %s
 
 ---
 name:            Cst
@@ -50,6 +50,20 @@ body:             |
     %2:_(s8) = G_ASHR %0, %1
 ...
 ---
+name:            ScalarDifferentSizes
+body:             |
+  bb.1:
+  ; CHECK-LABEL: name: @ScalarDifferentSizes
+  ; CHECK-NEXT: %0:_ KnownBits:???????????????? SignBits:1
+  ; CHECK-NEXT: %1:_ KnownBits:00001001 SignBits:4
+  ; CHECK-NEXT: %2:_ KnownBits:???????????????? SignBits:10
+  ; CHECK-NEXT: %3:_ KnownBits:???????????????? SignBits:16
+    %0:_(s16) = COPY $h0
+    %1:_(s8) = G_CONSTANT i8 9
+    %2:_(s16) = G_ASHR %0, %1
+    %3:_(s16) = G_ASHR %2, %1
+...
+---
 name:            VectorVar
 body:             |
   bb.1: