From 7a969ec1e114b6674c08e82ca048a3c4576bf0dd Mon Sep 17 00:00:00 2001 From: AtariDreams Date: Thu, 27 Jun 2024 04:14:45 -0400 Subject: [PATCH] [PatternMatch] Use m_Not instead of m_c_Xor with m_AllOnes() (#96837) --- llvm/include/llvm/IR/PatternMatch.h | 38 +++++++++---------- llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +- .../InstCombine/InstCombineShifts.cpp | 2 +- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/llvm/include/llvm/IR/PatternMatch.h b/llvm/include/llvm/IR/PatternMatch.h index 526b7258b8ab78..d4e355431a27a2 100644 --- a/llvm/include/llvm/IR/PatternMatch.h +++ b/llvm/include/llvm/IR/PatternMatch.h @@ -2309,6 +2309,22 @@ m_UnordFMin(const LHS &L, const RHS &R) { return MaxMin_match(L, R); } +/// Matches a 'Not' as 'xor V, -1' or 'xor -1, V'. +/// NOTE: we first match the 'Not' (by matching '-1'), +/// and only then match the inner matcher! +template +inline BinaryOp_match, ValTy, Instruction::Xor, true> +m_Not(const ValTy &V) { + return m_c_Xor(m_AllOnes(), V); +} + +template +inline BinaryOp_match, ValTy, Instruction::Xor, + true> +m_NotForbidPoison(const ValTy &V) { + return m_c_Xor(m_AllOnesForbidPoison(), V); +} + //===----------------------------------------------------------------------===// // Matchers for overflow check patterns: e.g. (a + b) u< a, (a ^ -1) u (a ^ -1) + // b > u (~a) if (Pred == ICmpInst::ICMP_UGT) { if (XorExpr.match(ICmpRHS)) return L.match(Op1) && R.match(ICmpLHS) && S.match(ICmpRHS); @@ -2659,22 +2675,6 @@ m_NSWNeg(const ValTy &V) { return m_NSWSub(m_ZeroInt(), V); } -/// Matches a 'Not' as 'xor V, -1' or 'xor -1, V'. -/// NOTE: we first match the 'Not' (by matching '-1'), -/// and only then match the inner matcher! -template -inline BinaryOp_match, ValTy, Instruction::Xor, true> -m_Not(const ValTy &V) { - return m_c_Xor(m_AllOnes(), V); -} - -template -inline BinaryOp_match, ValTy, Instruction::Xor, - true> -m_NotForbidPoison(const ValTy &V) { - return m_c_Xor(m_AllOnesForbidPoison(), V); -} - /// Matches an SMin with LHS and RHS in either order. template inline MaxMin_match diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b9148999ff3951..f917e934939500 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -30557,7 +30557,7 @@ static std::pair FindSingleBitChange(Value *V) { bool Not = false; // Check if we have a NOT Value *PeekI; - if (match(I, m_c_Xor(m_Value(PeekI), m_AllOnes())) || + if (match(I, m_Not(m_Value(PeekI))) || match(I, m_Sub(m_AllOnes(), m_Value(PeekI)))) { Not = true; I = dyn_cast(PeekI); diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp index 06b434857c657a..38f8a41214b682 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp @@ -216,7 +216,7 @@ dropRedundantMaskingOfLeftShiftInput(BinaryOperator *OuterShift, // ((1 << MaskShAmt) - 1) auto MaskA = m_Add(m_Shl(m_One(), m_Value(MaskShAmt)), m_AllOnes()); // (~(-1 << maskNbits)) - auto MaskB = m_Xor(m_Shl(m_AllOnes(), m_Value(MaskShAmt)), m_AllOnes()); + auto MaskB = m_Not(m_Shl(m_AllOnes(), m_Value(MaskShAmt))); // (-1 l>> MaskShAmt) auto MaskC = m_LShr(m_AllOnes(), m_Value(MaskShAmt)); // ((-1 << MaskShAmt) l>> MaskShAmt)