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fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 CVT operations
CR suggestions: - improve comments - combine positive and negative testcases into 2 files - add tests for fcvtzsn if Zd is a multiple of 2
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8 files changed

+366
-373
lines changed

8 files changed

+366
-373
lines changed

‎llvm/lib/Target/AArch64/SVEInstrFormats.td‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11302,7 +11302,7 @@ class sve_int_mla_cpa<string asm>
1130211302
}
1130311303

1130411304
//===----------------------------------------------------------------------===//
11305-
// FCVTZSN
11305+
// FP to Int down-converts
1130611306
//===----------------------------------------------------------------------===//
1130711307
class sve2_fp_to_int_downcvt<string asm, ZPRRegOp ZdRC, RegisterOperand ZSrcOp, bits<2> size, bit U>
1130811308
: I<(outs ZdRC:$Zd), (ins ZSrcOp:$Zn),
@@ -11325,7 +11325,7 @@ multiclass sve2_fp_to_int_downcvt<string asm, bit U> {
1132511325
}
1132611326

1132711327
//===----------------------------------------------------------------------===//
11328-
// SCVTF
11328+
// Int to FP up-converts
1132911329
//===----------------------------------------------------------------------===//
1133011330
class sve2_int_to_fp_upcvt<string asm, ZPRRegOp ZdRC, ZPRRegOp ZnRC,
1133111331
bits<2> size, bits<2> U>

‎llvm/test/MC/AArch64/SVE2p3/cvt-diagnostics.s‎

Lines changed: 193 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,193 @@
1+
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p3 2>&1 < %s| FileCheck %s
2+
3+
// --------------------------------------------------------------------------//
4+
// Invalid operand for instruction
5+
6+
fcvtzsn z0.b, { z0.b, z1.b }
7+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
8+
// CHECK-NEXT: fcvtzsn z0.b, { z0.b, z1.b }
9+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
10+
11+
fcvtzsn z0.h, { z0.h, z1.h }
12+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
13+
// CHECK-NEXT: fcvtzsn z0.h, { z0.h, z1.h }
14+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
15+
16+
fcvtzsn z0.s, { z0.s, z1.s }
17+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
18+
// CHECK-NEXT: fcvtzsn z0.s, { z0.s, z1.s }
19+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
20+
21+
fcvtzsn z0.b, { z1.h, z2.h }
22+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
23+
// CHECK-NEXT: fcvtzsn z0.b, { z1.h, z2.h }
24+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
25+
26+
// --------------------------------------------------------------------------//
27+
// Negative tests for instructions that are incompatible with movprfx
28+
29+
movprfx z0, z7
30+
fcvtzsn z0.b, { z0.h, z1.h }
31+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
32+
// CHECK-NEXT: fcvtzsn z0.b, { z0.h, z1.h }
33+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
34+
35+
// --------------------------------------------------------------------------//
36+
// Invalid operand for instruction
37+
38+
fcvtzun z0.b, { z0.b, z1.b }
39+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
40+
// CHECK-NEXT: fcvtzun z0.b, { z0.b, z1.b }
41+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
42+
43+
fcvtzun z0.h, { z0.h, z1.h }
44+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
45+
// CHECK-NEXT: fcvtzun z0.h, { z0.h, z1.h }
46+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
47+
48+
fcvtzun z0.s, { z0.s, z1.s }
49+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
50+
// CHECK-NEXT: fcvtzun z0.s, { z0.s, z1.s }
51+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
52+
53+
fcvtzun z0.b, { z1.h, z2.h }
54+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid vector list, expected list with 2 consecutive SVE vectors, where the first vector is a multiple of 2 and with matching element types
55+
// CHECK-NEXT: fcvtzun z0.b, { z1.h, z2.h }
56+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
57+
58+
// --------------------------------------------------------------------------//
59+
// Negative tests for instructions that are incompatible with movprfx
60+
61+
movprfx z0, z7
62+
fcvtzun z0.b, { z0.h, z1.h }
63+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
64+
// CHECK-NEXT: fcvtzun z0.b, { z0.h, z1.h }
65+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
66+
67+
// --------------------------------------------------------------------------//
68+
// Invalid element width
69+
70+
scvtf z0.b, z0.b
71+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
72+
// CHECK-NEXT: scvtf z0.b, z0.b
73+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
74+
75+
scvtf z0.h, z0.h
76+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
77+
// CHECK-NEXT: scvtf z0.h, z0.h
78+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
79+
80+
scvtf z0.s, z0.s
81+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
82+
// CHECK-NEXT: scvtf z0.s, z0.s
83+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
84+
85+
scvtf z0.d, z0.d
86+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
87+
// CHECK-NEXT: scvtf z0.d, z0.d
88+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
89+
90+
// --------------------------------------------------------------------------//
91+
// Negative tests for instructions that are incompatible with movprfx
92+
93+
movprfx z0, z7
94+
scvtf z0.h, z0.b
95+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
96+
// CHECK-NEXT: scvtf z0.h, z0.b
97+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
98+
99+
// --------------------------------------------------------------------------//
100+
// Invalid element width
101+
102+
scvtflt z0.b, z0.b
103+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
104+
// CHECK-NEXT: scvtflt z0.b, z0.b
105+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
106+
107+
scvtflt z0.h, z0.h
108+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
109+
// CHECK-NEXT: scvtflt z0.h, z0.h
110+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
111+
112+
scvtflt z0.s, z0.s
113+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
114+
// CHECK-NEXT: scvtflt z0.s, z0.s
115+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
116+
117+
scvtflt z0.d, z0.d
118+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
119+
// CHECK-NEXT: scvtflt z0.d, z0.d
120+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
121+
122+
// --------------------------------------------------------------------------//
123+
// Negative tests for instructions that are incompatible with movprfx
124+
125+
movprfx z0, z7
126+
scvtflt z0.h, z0.b
127+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
128+
// CHECK-NEXT: scvtflt z0.h, z0.b
129+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
130+
131+
// --------------------------------------------------------------------------//
132+
// Invalid element width
133+
134+
ucvtf z0.b, z0.b
135+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
136+
// CHECK-NEXT: ucvtf z0.b, z0.b
137+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
138+
139+
ucvtf z0.h, z0.h
140+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
141+
// CHECK-NEXT: ucvtf z0.h, z0.h
142+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
143+
144+
ucvtf z0.s, z0.s
145+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
146+
// CHECK-NEXT: ucvtf z0.s, z0.s
147+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
148+
149+
ucvtf z0.d, z0.d
150+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
151+
// CHECK-NEXT: ucvtf z0.d, z0.d
152+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
153+
154+
// --------------------------------------------------------------------------//
155+
// Negative tests for instructions that are incompatible with movprfx
156+
157+
movprfx z0, z7
158+
ucvtf z0.h, z0.b
159+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
160+
// CHECK-NEXT: ucvtf z0.h, z0.b
161+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
162+
163+
// --------------------------------------------------------------------------//
164+
// Invalid element width
165+
166+
ucvtflt z0.b, z0.b
167+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
168+
// CHECK-NEXT: ucvtflt z0.b, z0.b
169+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
170+
171+
ucvtflt z0.h, z0.h
172+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
173+
// CHECK-NEXT: ucvtflt z0.h, z0.h
174+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
175+
176+
ucvtflt z0.s, z0.s
177+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
178+
// CHECK-NEXT: ucvtflt z0.s, z0.s
179+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
180+
181+
ucvtflt z0.d, z0.d
182+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
183+
// CHECK-NEXT: ucvtflt z0.d, z0.d
184+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
185+
186+
// --------------------------------------------------------------------------//
187+
// Negative tests for instructions that are incompatible with movprfx
188+
189+
movprfx z0, z7
190+
ucvtflt z0.h, z0.b
191+
// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
192+
// CHECK-NEXT: ucvtflt z0.h, z0.b
193+
// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

‎llvm/test/MC/AArch64/SVE2p3/fcvtz.s‎ renamed to ‎llvm/test/MC/AArch64/SVE2p3/cvt.s‎

Lines changed: 171 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -163,3 +163,174 @@ fcvtzun z31.s, { z30.d, z31.d }
163163
// CHECK-ENCODING: encoding: [0xdf,0x37,0xcd,0x65]
164164
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
165165
// CHECK-UNKNOWN: 65cd37df <unknown>
166+
167+
// -----------------------------------------------------------------------
168+
// Signed integer convert to floating-point (bottom, unpredicated)
169+
170+
scvtf z0.h, z0.b
171+
// CHECK-INST: scvtf z0.h, z0.b
172+
// CHECK-ENCODING: encoding: [0x00,0x30,0x4c,0x65]
173+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
174+
// CHECK-UNKNOWN: 654c3000 <unknown>
175+
176+
scvtf z31.h, z31.b
177+
// CHECK-INST: scvtf z31.h, z31.b
178+
// CHECK-ENCODING: encoding: [0xff,0x33,0x4c,0x65]
179+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
180+
// CHECK-UNKNOWN: 654c33ff <unknown>
181+
182+
scvtf z0.s, z0.h
183+
// CHECK-INST: scvtf z0.s, z0.h
184+
// CHECK-ENCODING: encoding: [0x00,0x30,0x8c,0x65]
185+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
186+
// CHECK-UNKNOWN: 658c3000 <unknown>
187+
188+
scvtf z31.s, z31.h
189+
// CHECK-INST: scvtf z31.s, z31.h
190+
// CHECK-ENCODING: encoding: [0xff,0x33,0x8c,0x65]
191+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
192+
// CHECK-UNKNOWN: 658c33ff <unknown>
193+
194+
scvtf z0.d, z0.s
195+
// CHECK-INST: scvtf z0.d, z0.s
196+
// CHECK-ENCODING: encoding: [0x00,0x30,0xcc,0x65]
197+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
198+
// CHECK-UNKNOWN: 65cc3000 <unknown>
199+
200+
scvtf z31.d, z31.s
201+
// CHECK-INST: scvtf z31.d, z31.s
202+
// CHECK-ENCODING: encoding: [0xff,0x33,0xcc,0x65]
203+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
204+
// CHECK-UNKNOWN: 65cc33ff <unknown>
205+
206+
// -----------------------------------------------------------------------
207+
// Signed integer convert to floating-point (top, unpredicated)
208+
209+
scvtflt z0.h, z0.b
210+
// CHECK-INST: scvtflt z0.h, z0.b
211+
// CHECK-ENCODING: encoding: [0x00,0x38,0x4c,0x65]
212+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
213+
// CHECK-UNKNOWN: 654c3800 <unknown>
214+
215+
scvtflt z31.h, z31.b
216+
// CHECK-INST: scvtflt z31.h, z31.b
217+
// CHECK-ENCODING: encoding: [0xff,0x3b,0x4c,0x65]
218+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
219+
// CHECK-UNKNOWN: 654c3bff <unknown>
220+
221+
scvtflt z0.s, z0.h
222+
// CHECK-INST: scvtflt z0.s, z0.h
223+
// CHECK-ENCODING: encoding: [0x00,0x38,0x8c,0x65]
224+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
225+
// CHECK-UNKNOWN: 658c3800 <unknown>
226+
227+
scvtflt z31.s, z31.h
228+
// CHECK-INST: scvtflt z31.s, z31.h
229+
// CHECK-ENCODING: encoding: [0xff,0x3b,0x8c,0x65]
230+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
231+
// CHECK-UNKNOWN: 658c3bff <unknown>
232+
233+
scvtflt z0.d, z0.s
234+
// CHECK-INST: scvtflt z0.d, z0.s
235+
// CHECK-ENCODING: encoding: [0x00,0x38,0xcc,0x65]
236+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
237+
// CHECK-UNKNOWN: 65cc3800 <unknown>
238+
239+
scvtflt z31.d, z31.s
240+
// CHECK-INST: scvtflt z31.d, z31.s
241+
// CHECK-ENCODING: encoding: [0xff,0x3b,0xcc,0x65]
242+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
243+
// CHECK-UNKNOWN: 65cc3bff <unknown>
244+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p3 < %s \
245+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
246+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p3 < %s \
247+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
248+
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
249+
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
250+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2p3 < %s \
251+
// RUN: | llvm-objdump -d --mattr=+sve2p3 --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-INST
252+
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2p3 < %s \
253+
// RUN: | llvm-objdump -d --mattr=-sve2p3 --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-UNKNOWN
254+
// Disassemble encoding and check the re-encoding (-show-encoding) matches.
255+
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p3 < %s \
256+
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
257+
// RUN: | llvm-mc -triple=aarch64 -mattr=+sve2p3 -disassemble -show-encoding \
258+
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
259+
260+
// -----------------------------------------------------------------------
261+
// Unsigned integer convert to floating-point (bottom, unpredicated)
262+
263+
ucvtf z0.h, z0.b
264+
// CHECK-INST: ucvtf z0.h, z0.b
265+
// CHECK-ENCODING: encoding: [0x00,0x34,0x4c,0x65]
266+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
267+
// CHECK-UNKNOWN: 654c3400 <unknown>
268+
269+
ucvtf z31.h, z31.b
270+
// CHECK-INST: ucvtf z31.h, z31.b
271+
// CHECK-ENCODING: encoding: [0xff,0x37,0x4c,0x65]
272+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
273+
// CHECK-UNKNOWN: 654c37ff <unknown>
274+
275+
ucvtf z0.s, z0.h
276+
// CHECK-INST: ucvtf z0.s, z0.h
277+
// CHECK-ENCODING: encoding: [0x00,0x34,0x8c,0x65]
278+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
279+
// CHECK-UNKNOWN: 658c3400 <unknown>
280+
281+
ucvtf z31.s, z31.h
282+
// CHECK-INST: ucvtf z31.s, z31.h
283+
// CHECK-ENCODING: encoding: [0xff,0x37,0x8c,0x65]
284+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
285+
// CHECK-UNKNOWN: 658c37ff <unknown>
286+
287+
ucvtf z0.d, z0.s
288+
// CHECK-INST: ucvtf z0.d, z0.s
289+
// CHECK-ENCODING: encoding: [0x00,0x34,0xcc,0x65]
290+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
291+
// CHECK-UNKNOWN: 65cc3400 <unknown>
292+
293+
ucvtf z31.d, z31.s
294+
// CHECK-INST: ucvtf z31.d, z31.s
295+
// CHECK-ENCODING: encoding: [0xff,0x37,0xcc,0x65]
296+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
297+
// CHECK-UNKNOWN: 65cc37ff <unknown>
298+
299+
// -----------------------------------------------------------------------
300+
// Unsigned integer convert to floating-point (top, unpredicated)
301+
302+
ucvtflt z0.h, z0.b
303+
// CHECK-INST: ucvtflt z0.h, z0.b
304+
// CHECK-ENCODING: encoding: [0x00,0x3c,0x4c,0x65]
305+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
306+
// CHECK-UNKNOWN: 654c3c00 <unknown>
307+
308+
ucvtflt z31.h, z31.b
309+
// CHECK-INST: ucvtflt z31.h, z31.b
310+
// CHECK-ENCODING: encoding: [0xff,0x3f,0x4c,0x65]
311+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
312+
// CHECK-UNKNOWN: 654c3fff <unknown>
313+
314+
ucvtflt z0.s, z0.h
315+
// CHECK-INST: ucvtflt z0.s, z0.h
316+
// CHECK-ENCODING: encoding: [0x00,0x3c,0x8c,0x65]
317+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
318+
// CHECK-UNKNOWN: 658c3c00 <unknown>
319+
320+
ucvtflt z31.s, z31.h
321+
// CHECK-INST: ucvtflt z31.s, z31.h
322+
// CHECK-ENCODING: encoding: [0xff,0x3f,0x8c,0x65]
323+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
324+
// CHECK-UNKNOWN: 658c3fff <unknown>
325+
326+
ucvtflt z0.d, z0.s
327+
// CHECK-INST: ucvtflt z0.d, z0.s
328+
// CHECK-ENCODING: encoding: [0x00,0x3c,0xcc,0x65]
329+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
330+
// CHECK-UNKNOWN: 65cc3c00 <unknown>
331+
332+
ucvtflt z31.d, z31.s
333+
// CHECK-INST: ucvtflt z31.d, z31.s
334+
// CHECK-ENCODING: encoding: [0xff,0x3f,0xcc,0x65]
335+
// CHECK-ERROR: instruction requires: sme2p3 or sve2p3
336+
// CHECK-UNKNOWN: 65cc3fff <unknown>

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