Skip to content

Commit 3af4597

Browse files
mtrofinmtrofin
authored
[NFC][SimplifyCFG] Simplify operators for the combined predicate in mergeConditionalStoreToAddress (#155058)
This is about code readability. The operands in the disjunction forming the combined predicate in `mergeConditionalStoreToAddress` could sometimes be negated twice. This patch addresses that. 2 tests needed updating because they exposed the double negation and now they don’t.
1 parent 343e944 commit 3af4597

File tree

4 files changed

+57
-89
lines changed

4 files changed

+57
-89
lines changed

‎llvm/lib/Transforms/Utils/SimplifyCFG.cpp‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -4404,10 +4404,12 @@ static bool mergeConditionalStoreToAddress(
44044404

44054405
// OK, we're going to sink the stores to PostBB. The store has to be
44064406
// conditional though, so first create the predicate.
4407-
Value *PCond = cast<BranchInst>(PFB->getSinglePredecessor()->getTerminator())
4408-
->getCondition();
4409-
Value *QCond = cast<BranchInst>(QFB->getSinglePredecessor()->getTerminator())
4410-
->getCondition();
4407+
BranchInst *PBranch =
4408+
cast<BranchInst>(PFB->getSinglePredecessor()->getTerminator());
4409+
BranchInst *QBranch =
4410+
cast<BranchInst>(QFB->getSinglePredecessor()->getTerminator());
4411+
Value *PCond = PBranch->getCondition();
4412+
Value *QCond = QBranch->getCondition();
44114413

44124414
Value *PPHI = ensureValueAvailableInSuccessor(PStore->getValueOperand(),
44134415
PStore->getParent());
@@ -4418,13 +4420,11 @@ static bool mergeConditionalStoreToAddress(
44184420
IRBuilder<> QB(PostBB, PostBBFirst);
44194421
QB.SetCurrentDebugLocation(PostBBFirst->getStableDebugLoc());
44204422

4421-
Value *PPred = PStore->getParent() == PTB ? PCond : QB.CreateNot(PCond);
4422-
Value *QPred = QStore->getParent() == QTB ? QCond : QB.CreateNot(QCond);
4423+
InvertPCond ^= (PStore->getParent() != PTB);
4424+
InvertQCond ^= (QStore->getParent() != QTB);
4425+
Value *PPred = InvertPCond ? QB.CreateNot(PCond) : PCond;
4426+
Value *QPred = InvertQCond ? QB.CreateNot(QCond) : QCond;
44234427

4424-
if (InvertPCond)
4425-
PPred = QB.CreateNot(PPred);
4426-
if (InvertQCond)
4427-
QPred = QB.CreateNot(QPred);
44284428
Value *CombinedPred = QB.CreateOr(PPred, QPred);
44294429

44304430
BasicBlock::iterator InsertPt = QB.GetInsertPoint();

‎llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll‎

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -973,9 +973,9 @@ define void @test_widen_exp_v2(ptr noalias %p2, ptr noalias %p, i64 %n) #5 {
973973
; TFA_INTERLEAVE-NEXT: [[ACTIVE_LANE_MASK_ENTRY1:%.*]] = icmp ult i64 1, [[TMP0]]
974974
; TFA_INTERLEAVE-NEXT: br label %[[VECTOR_BODY:.*]]
975975
; TFA_INTERLEAVE: [[VECTOR_BODY]]:
976-
; TFA_INTERLEAVE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[TMP18:.*]] ]
977-
; TFA_INTERLEAVE-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi i1 [ [[ACTIVE_LANE_MASK_ENTRY]], %[[ENTRY]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], %[[TMP18]] ]
978-
; TFA_INTERLEAVE-NEXT: [[ACTIVE_LANE_MASK2:%.*]] = phi i1 [ [[ACTIVE_LANE_MASK_ENTRY1]], %[[ENTRY]] ], [ [[ACTIVE_LANE_MASK_NEXT6:%.*]], %[[TMP18]] ]
976+
; TFA_INTERLEAVE-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[TMP13:.*]] ]
977+
; TFA_INTERLEAVE-NEXT: [[ACTIVE_LANE_MASK:%.*]] = phi i1 [ [[ACTIVE_LANE_MASK_ENTRY]], %[[ENTRY]] ], [ [[ACTIVE_LANE_MASK_NEXT:%.*]], %[[TMP13]] ]
978+
; TFA_INTERLEAVE-NEXT: [[ACTIVE_LANE_MASK2:%.*]] = phi i1 [ [[ACTIVE_LANE_MASK_ENTRY1]], %[[ENTRY]] ], [ [[ACTIVE_LANE_MASK_NEXT6:%.*]], %[[TMP13]] ]
979979
; TFA_INTERLEAVE-NEXT: [[TMP4:%.*]] = load double, ptr [[P2]], align 8
980980
; TFA_INTERLEAVE-NEXT: [[TMP5:%.*]] = tail call double @llvm.exp.f64(double [[TMP4]]) #[[ATTR7:[0-9]+]]
981981
; TFA_INTERLEAVE-NEXT: [[TMP6:%.*]] = tail call double @llvm.exp.f64(double [[TMP4]]) #[[ATTR7]]
@@ -986,16 +986,12 @@ define void @test_widen_exp_v2(ptr noalias %p2, ptr noalias %p, i64 %n) #5 {
986986
; TFA_INTERLEAVE-NEXT: [[PREDPHI:%.*]] = select i1 [[TMP11]], double 1.000000e+00, double 0.000000e+00
987987
; TFA_INTERLEAVE-NEXT: [[PREDPHI3:%.*]] = select i1 [[TMP12]], double 1.000000e+00, double 0.000000e+00
988988
; TFA_INTERLEAVE-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[ACTIVE_LANE_MASK2]], double [[PREDPHI3]], double [[PREDPHI]]
989-
; TFA_INTERLEAVE-NEXT: [[TMP13:%.*]] = xor i1 [[ACTIVE_LANE_MASK]], true
990-
; TFA_INTERLEAVE-NEXT: [[TMP14:%.*]] = xor i1 [[ACTIVE_LANE_MASK2]], true
991-
; TFA_INTERLEAVE-NEXT: [[TMP15:%.*]] = xor i1 [[TMP13]], true
992-
; TFA_INTERLEAVE-NEXT: [[TMP16:%.*]] = xor i1 [[TMP14]], true
993-
; TFA_INTERLEAVE-NEXT: [[TMP17:%.*]] = or i1 [[TMP15]], [[TMP16]]
994-
; TFA_INTERLEAVE-NEXT: br i1 [[TMP17]], label %[[BB16:.*]], label %[[TMP18]]
995-
; TFA_INTERLEAVE: [[BB16]]:
989+
; TFA_INTERLEAVE-NEXT: [[TMP14:%.*]] = or i1 [[ACTIVE_LANE_MASK]], [[ACTIVE_LANE_MASK2]]
990+
; TFA_INTERLEAVE-NEXT: br i1 [[TMP14]], label %[[BB12:.*]], label %[[TMP13]]
991+
; TFA_INTERLEAVE: [[BB12]]:
996992
; TFA_INTERLEAVE-NEXT: store double [[SPEC_SELECT]], ptr [[P]], align 8
997-
; TFA_INTERLEAVE-NEXT: br label %[[TMP18]]
998-
; TFA_INTERLEAVE: [[TMP18]]:
993+
; TFA_INTERLEAVE-NEXT: br label %[[TMP13]]
994+
; TFA_INTERLEAVE: [[TMP13]]:
999995
; TFA_INTERLEAVE-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 2
1000996
; TFA_INTERLEAVE-NEXT: [[TMP20:%.*]] = add i64 [[INDEX]], 1
1001997
; TFA_INTERLEAVE-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = icmp ult i64 [[INDEX]], [[TMP3]]

‎llvm/test/Transforms/SimplifyCFG/merge-cond-stores-2.ll‎

Lines changed: 16 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -27,119 +27,91 @@ define i32 @f(ptr %b) {
2727
; CHECK-NEXT: [[TOBOOL7:%.*]] = icmp eq i32 [[AND6]], 0
2828
; CHECK-NEXT: [[OR9:%.*]] = or i32 [[TMP2]], 536870912
2929
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[TOBOOL7]], i32 [[TMP2]], i32 [[OR9]]
30-
; CHECK-NEXT: [[TMP6:%.*]] = xor i1 [[TMP5]], true
3130
; CHECK-NEXT: [[TMP7:%.*]] = xor i1 [[TOBOOL7]], true
32-
; CHECK-NEXT: [[TMP8:%.*]] = xor i1 [[TMP6]], true
33-
; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[TMP7]]
31+
; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP5]], [[TMP7]]
3432
; CHECK-NEXT: [[AND11:%.*]] = and i32 [[SPEC_SELECT]], 8
3533
; CHECK-NEXT: [[TOBOOL12:%.*]] = icmp eq i32 [[AND11]], 0
3634
; CHECK-NEXT: [[OR14:%.*]] = or i32 [[SPEC_SELECT]], 268435456
3735
; CHECK-NEXT: [[SPEC_SELECT1:%.*]] = select i1 [[TOBOOL12]], i32 [[SPEC_SELECT]], i32 [[OR14]]
38-
; CHECK-NEXT: [[TMP10:%.*]] = xor i1 [[TMP9]], true
3936
; CHECK-NEXT: [[TMP11:%.*]] = xor i1 [[TOBOOL12]], true
40-
; CHECK-NEXT: [[TMP12:%.*]] = xor i1 [[TMP10]], true
41-
; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP12]], [[TMP11]]
37+
; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[TMP11]]
4238
; CHECK-NEXT: [[AND16:%.*]] = and i32 [[SPEC_SELECT1]], 16
4339
; CHECK-NEXT: [[TOBOOL17:%.*]] = icmp eq i32 [[AND16]], 0
4440
; CHECK-NEXT: [[OR19:%.*]] = or i32 [[SPEC_SELECT1]], 134217728
4541
; CHECK-NEXT: [[SPEC_SELECT2:%.*]] = select i1 [[TOBOOL17]], i32 [[SPEC_SELECT1]], i32 [[OR19]]
46-
; CHECK-NEXT: [[TMP14:%.*]] = xor i1 [[TMP13]], true
4742
; CHECK-NEXT: [[TMP15:%.*]] = xor i1 [[TOBOOL17]], true
48-
; CHECK-NEXT: [[TMP16:%.*]] = xor i1 [[TMP14]], true
49-
; CHECK-NEXT: [[TMP17:%.*]] = or i1 [[TMP16]], [[TMP15]]
43+
; CHECK-NEXT: [[TMP12:%.*]] = or i1 [[TMP9]], [[TMP15]]
5044
; CHECK-NEXT: [[AND21:%.*]] = and i32 [[SPEC_SELECT2]], 32
5145
; CHECK-NEXT: [[TOBOOL22:%.*]] = icmp eq i32 [[AND21]], 0
5246
; CHECK-NEXT: [[OR24:%.*]] = or i32 [[SPEC_SELECT2]], 67108864
5347
; CHECK-NEXT: [[SPEC_SELECT3:%.*]] = select i1 [[TOBOOL22]], i32 [[SPEC_SELECT2]], i32 [[OR24]]
54-
; CHECK-NEXT: [[TMP18:%.*]] = xor i1 [[TMP17]], true
5548
; CHECK-NEXT: [[TMP19:%.*]] = xor i1 [[TOBOOL22]], true
56-
; CHECK-NEXT: [[TMP20:%.*]] = xor i1 [[TMP18]], true
57-
; CHECK-NEXT: [[TMP21:%.*]] = or i1 [[TMP20]], [[TMP19]]
49+
; CHECK-NEXT: [[TMP13:%.*]] = or i1 [[TMP12]], [[TMP19]]
5850
; CHECK-NEXT: [[AND26:%.*]] = and i32 [[SPEC_SELECT3]], 64
5951
; CHECK-NEXT: [[TOBOOL27:%.*]] = icmp eq i32 [[AND26]], 0
6052
; CHECK-NEXT: [[OR29:%.*]] = or i32 [[SPEC_SELECT3]], 33554432
6153
; CHECK-NEXT: [[SPEC_SELECT4:%.*]] = select i1 [[TOBOOL27]], i32 [[SPEC_SELECT3]], i32 [[OR29]]
62-
; CHECK-NEXT: [[TMP22:%.*]] = xor i1 [[TMP21]], true
6354
; CHECK-NEXT: [[TMP23:%.*]] = xor i1 [[TOBOOL27]], true
64-
; CHECK-NEXT: [[TMP24:%.*]] = xor i1 [[TMP22]], true
65-
; CHECK-NEXT: [[TMP25:%.*]] = or i1 [[TMP24]], [[TMP23]]
55+
; CHECK-NEXT: [[TMP16:%.*]] = or i1 [[TMP13]], [[TMP23]]
6656
; CHECK-NEXT: [[AND31:%.*]] = and i32 [[SPEC_SELECT4]], 256
6757
; CHECK-NEXT: [[TOBOOL32:%.*]] = icmp eq i32 [[AND31]], 0
6858
; CHECK-NEXT: [[OR34:%.*]] = or i32 [[SPEC_SELECT4]], 8388608
6959
; CHECK-NEXT: [[SPEC_SELECT5:%.*]] = select i1 [[TOBOOL32]], i32 [[SPEC_SELECT4]], i32 [[OR34]]
70-
; CHECK-NEXT: [[TMP26:%.*]] = xor i1 [[TMP25]], true
7160
; CHECK-NEXT: [[TMP27:%.*]] = xor i1 [[TOBOOL32]], true
72-
; CHECK-NEXT: [[TMP28:%.*]] = xor i1 [[TMP26]], true
73-
; CHECK-NEXT: [[TMP29:%.*]] = or i1 [[TMP28]], [[TMP27]]
61+
; CHECK-NEXT: [[TMP17:%.*]] = or i1 [[TMP16]], [[TMP27]]
7462
; CHECK-NEXT: [[AND36:%.*]] = and i32 [[SPEC_SELECT5]], 512
7563
; CHECK-NEXT: [[TOBOOL37:%.*]] = icmp eq i32 [[AND36]], 0
7664
; CHECK-NEXT: [[OR39:%.*]] = or i32 [[SPEC_SELECT5]], 4194304
7765
; CHECK-NEXT: [[SPEC_SELECT6:%.*]] = select i1 [[TOBOOL37]], i32 [[SPEC_SELECT5]], i32 [[OR39]]
78-
; CHECK-NEXT: [[TMP30:%.*]] = xor i1 [[TMP29]], true
7966
; CHECK-NEXT: [[TMP31:%.*]] = xor i1 [[TOBOOL37]], true
80-
; CHECK-NEXT: [[TMP32:%.*]] = xor i1 [[TMP30]], true
81-
; CHECK-NEXT: [[TMP33:%.*]] = or i1 [[TMP32]], [[TMP31]]
67+
; CHECK-NEXT: [[TMP20:%.*]] = or i1 [[TMP17]], [[TMP31]]
8268
; CHECK-NEXT: [[AND41:%.*]] = and i32 [[SPEC_SELECT6]], 1024
8369
; CHECK-NEXT: [[TOBOOL42:%.*]] = icmp eq i32 [[AND41]], 0
8470
; CHECK-NEXT: [[OR44:%.*]] = or i32 [[SPEC_SELECT6]], 2097152
8571
; CHECK-NEXT: [[SPEC_SELECT7:%.*]] = select i1 [[TOBOOL42]], i32 [[SPEC_SELECT6]], i32 [[OR44]]
86-
; CHECK-NEXT: [[TMP34:%.*]] = xor i1 [[TMP33]], true
8772
; CHECK-NEXT: [[TMP35:%.*]] = xor i1 [[TOBOOL42]], true
88-
; CHECK-NEXT: [[TMP36:%.*]] = xor i1 [[TMP34]], true
89-
; CHECK-NEXT: [[TMP37:%.*]] = or i1 [[TMP36]], [[TMP35]]
73+
; CHECK-NEXT: [[TMP21:%.*]] = or i1 [[TMP20]], [[TMP35]]
9074
; CHECK-NEXT: [[AND46:%.*]] = and i32 [[SPEC_SELECT7]], 2048
9175
; CHECK-NEXT: [[TOBOOL47:%.*]] = icmp eq i32 [[AND46]], 0
9276
; CHECK-NEXT: [[OR49:%.*]] = or i32 [[SPEC_SELECT7]], 1048576
9377
; CHECK-NEXT: [[SPEC_SELECT8:%.*]] = select i1 [[TOBOOL47]], i32 [[SPEC_SELECT7]], i32 [[OR49]]
94-
; CHECK-NEXT: [[TMP38:%.*]] = xor i1 [[TMP37]], true
9578
; CHECK-NEXT: [[TMP39:%.*]] = xor i1 [[TOBOOL47]], true
96-
; CHECK-NEXT: [[TMP40:%.*]] = xor i1 [[TMP38]], true
97-
; CHECK-NEXT: [[TMP41:%.*]] = or i1 [[TMP40]], [[TMP39]]
79+
; CHECK-NEXT: [[TMP24:%.*]] = or i1 [[TMP21]], [[TMP39]]
9880
; CHECK-NEXT: [[AND51:%.*]] = and i32 [[SPEC_SELECT8]], 4096
9981
; CHECK-NEXT: [[TOBOOL52:%.*]] = icmp eq i32 [[AND51]], 0
10082
; CHECK-NEXT: [[OR54:%.*]] = or i32 [[SPEC_SELECT8]], 524288
10183
; CHECK-NEXT: [[SPEC_SELECT9:%.*]] = select i1 [[TOBOOL52]], i32 [[SPEC_SELECT8]], i32 [[OR54]]
102-
; CHECK-NEXT: [[TMP42:%.*]] = xor i1 [[TMP41]], true
10384
; CHECK-NEXT: [[TMP43:%.*]] = xor i1 [[TOBOOL52]], true
104-
; CHECK-NEXT: [[TMP44:%.*]] = xor i1 [[TMP42]], true
105-
; CHECK-NEXT: [[TMP45:%.*]] = or i1 [[TMP44]], [[TMP43]]
85+
; CHECK-NEXT: [[TMP25:%.*]] = or i1 [[TMP24]], [[TMP43]]
10686
; CHECK-NEXT: [[AND56:%.*]] = and i32 [[SPEC_SELECT9]], 8192
10787
; CHECK-NEXT: [[TOBOOL57:%.*]] = icmp eq i32 [[AND56]], 0
10888
; CHECK-NEXT: [[OR59:%.*]] = or i32 [[SPEC_SELECT9]], 262144
10989
; CHECK-NEXT: [[SPEC_SELECT10:%.*]] = select i1 [[TOBOOL57]], i32 [[SPEC_SELECT9]], i32 [[OR59]]
110-
; CHECK-NEXT: [[TMP46:%.*]] = xor i1 [[TMP45]], true
11190
; CHECK-NEXT: [[TMP47:%.*]] = xor i1 [[TOBOOL57]], true
112-
; CHECK-NEXT: [[TMP48:%.*]] = xor i1 [[TMP46]], true
113-
; CHECK-NEXT: [[TMP49:%.*]] = or i1 [[TMP48]], [[TMP47]]
91+
; CHECK-NEXT: [[TMP28:%.*]] = or i1 [[TMP25]], [[TMP47]]
11492
; CHECK-NEXT: [[AND61:%.*]] = and i32 [[SPEC_SELECT10]], 16384
11593
; CHECK-NEXT: [[TOBOOL62:%.*]] = icmp eq i32 [[AND61]], 0
11694
; CHECK-NEXT: [[OR64:%.*]] = or i32 [[SPEC_SELECT10]], 131072
11795
; CHECK-NEXT: [[SPEC_SELECT11:%.*]] = select i1 [[TOBOOL62]], i32 [[SPEC_SELECT10]], i32 [[OR64]]
118-
; CHECK-NEXT: [[TMP50:%.*]] = xor i1 [[TMP49]], true
11996
; CHECK-NEXT: [[TMP51:%.*]] = xor i1 [[TOBOOL62]], true
120-
; CHECK-NEXT: [[TMP52:%.*]] = xor i1 [[TMP50]], true
121-
; CHECK-NEXT: [[TMP53:%.*]] = or i1 [[TMP52]], [[TMP51]]
97+
; CHECK-NEXT: [[TMP29:%.*]] = or i1 [[TMP28]], [[TMP51]]
12298
; CHECK-NEXT: [[AND66:%.*]] = and i32 [[SPEC_SELECT11]], 32768
12399
; CHECK-NEXT: [[TOBOOL67:%.*]] = icmp eq i32 [[AND66]], 0
124100
; CHECK-NEXT: [[OR69:%.*]] = or i32 [[SPEC_SELECT11]], 65536
125101
; CHECK-NEXT: [[SPEC_SELECT12:%.*]] = select i1 [[TOBOOL67]], i32 [[SPEC_SELECT11]], i32 [[OR69]]
126-
; CHECK-NEXT: [[TMP54:%.*]] = xor i1 [[TMP53]], true
127102
; CHECK-NEXT: [[TMP55:%.*]] = xor i1 [[TOBOOL67]], true
128-
; CHECK-NEXT: [[TMP56:%.*]] = xor i1 [[TMP54]], true
129-
; CHECK-NEXT: [[TMP57:%.*]] = or i1 [[TMP56]], [[TMP55]]
103+
; CHECK-NEXT: [[TMP32:%.*]] = or i1 [[TMP29]], [[TMP55]]
130104
; CHECK-NEXT: [[AND71:%.*]] = and i32 [[SPEC_SELECT12]], 128
131105
; CHECK-NEXT: [[TOBOOL72:%.*]] = icmp eq i32 [[AND71]], 0
132106
; CHECK-NEXT: [[OR74:%.*]] = or i32 [[SPEC_SELECT12]], 16777216
133107
; CHECK-NEXT: [[SPEC_SELECT13:%.*]] = select i1 [[TOBOOL72]], i32 [[SPEC_SELECT12]], i32 [[OR74]]
134-
; CHECK-NEXT: [[TMP58:%.*]] = xor i1 [[TMP57]], true
135108
; CHECK-NEXT: [[TMP59:%.*]] = xor i1 [[TOBOOL72]], true
136-
; CHECK-NEXT: [[TMP60:%.*]] = xor i1 [[TMP58]], true
137-
; CHECK-NEXT: [[TMP61:%.*]] = or i1 [[TMP60]], [[TMP59]]
109+
; CHECK-NEXT: [[TMP61:%.*]] = or i1 [[TMP32]], [[TMP59]]
138110
; CHECK-NEXT: br i1 [[TMP61]], label [[TMP62:%.*]], label [[TMP63:%.*]]
139-
; CHECK: 62:
111+
; CHECK: 34:
140112
; CHECK-NEXT: store i32 [[SPEC_SELECT13]], ptr [[B]], align 4
141113
; CHECK-NEXT: br label [[TMP63]]
142-
; CHECK: 63:
114+
; CHECK: 35:
143115
; CHECK-NEXT: ret i32 0
144116
;
145117
entry:

‎llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll‎

Lines changed: 23 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -5,11 +5,11 @@
55
define void @test_simple(ptr %p, i32 %a, i32 %b) {
66
; CHECK-LABEL: @test_simple(
77
; CHECK-NEXT: entry:
8-
; CHECK-NEXT: [[TMP0:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
9-
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP0]], 0
10-
; CHECK-NEXT: br i1 [[DOTNOT]], label [[TMP2:%.*]], label [[TMP1:%.*]]
8+
; CHECK-NEXT: [[B:%.*]] = or i32 [[A:%.*]], [[B1:%.*]]
9+
; CHECK-NEXT: [[X3:%.*]] = icmp eq i32 [[B]], 0
10+
; CHECK-NEXT: br i1 [[X3]], label [[TMP2:%.*]], label [[TMP1:%.*]]
1111
; CHECK: 1:
12-
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B]], 0
12+
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B1]], 0
1313
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X2]] to i32
1414
; CHECK-NEXT: store i32 [[SPEC_SELECT]], ptr [[P:%.*]], align 4
1515
; CHECK-NEXT: br label [[TMP2]]
@@ -40,12 +40,12 @@ end:
4040
define void @test_simple_commuted(ptr %p, i32 %a, i32 %b) {
4141
; CHECK-LABEL: @test_simple_commuted(
4242
; CHECK-NEXT: entry:
43-
; CHECK-NEXT: [[X1_NOT:%.*]] = icmp eq i32 [[A:%.*]], 0
4443
; CHECK-NEXT: [[X2:%.*]] = icmp eq i32 [[B:%.*]], 0
45-
; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[X1_NOT]], [[X2]]
44+
; CHECK-NEXT: [[X3:%.*]] = icmp eq i32 [[B1:%.*]], 0
45+
; CHECK-NEXT: [[TMP0:%.*]] = or i1 [[X2]], [[X3]]
4646
; CHECK-NEXT: br i1 [[TMP0]], label [[TMP1:%.*]], label [[TMP2:%.*]]
4747
; CHECK: 1:
48-
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X2]] to i32
48+
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X3]] to i32
4949
; CHECK-NEXT: store i32 [[SPEC_SELECT]], ptr [[P:%.*]], align 4
5050
; CHECK-NEXT: br label [[TMP2]]
5151
; CHECK: 2:
@@ -76,16 +76,16 @@ define void @test_recursive(ptr %p, i32 %a, i32 %b, i32 %c, i32 %d) {
7676
; CHECK-LABEL: @test_recursive(
7777
; CHECK-NEXT: entry:
7878
; CHECK-NEXT: [[TMP0:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
79-
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[TMP0]], [[C:%.*]]
80-
; CHECK-NEXT: [[TMP2:%.*]] = or i32 [[TMP1]], [[D:%.*]]
81-
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], 0
82-
; CHECK-NEXT: br i1 [[DOTNOT]], label [[TMP4:%.*]], label [[TMP3:%.*]]
79+
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[TMP0]], [[C1:%.*]]
80+
; CHECK-NEXT: [[C:%.*]] = or i32 [[TMP1]], [[D:%.*]]
81+
; CHECK-NEXT: [[X3_NOT:%.*]] = icmp eq i32 [[C]], 0
82+
; CHECK-NEXT: br i1 [[X3_NOT]], label [[TMP4:%.*]], label [[TMP3:%.*]]
8383
; CHECK: 3:
8484
; CHECK-NEXT: [[X4_NOT:%.*]] = icmp eq i32 [[D]], 0
85-
; CHECK-NEXT: [[X3_NOT:%.*]] = icmp eq i32 [[C]], 0
86-
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B]], 0
87-
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X2]] to i32
88-
; CHECK-NEXT: [[SPEC_SELECT1:%.*]] = select i1 [[X3_NOT]], i32 [[SPEC_SELECT]], i32 2
85+
; CHECK-NEXT: [[X3_NOT1:%.*]] = icmp eq i32 [[C1]], 0
86+
; CHECK-NEXT: [[X3:%.*]] = icmp ne i32 [[B]], 0
87+
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X3]] to i32
88+
; CHECK-NEXT: [[SPEC_SELECT1:%.*]] = select i1 [[X3_NOT1]], i32 [[SPEC_SELECT]], i32 2
8989
; CHECK-NEXT: [[SPEC_SELECT2:%.*]] = select i1 [[X4_NOT]], i32 [[SPEC_SELECT1]], i32 3
9090
; CHECK-NEXT: store i32 [[SPEC_SELECT2]], ptr [[P:%.*]], align 4
9191
; CHECK-NEXT: br label [[TMP4]]
@@ -267,10 +267,10 @@ declare void @f()
267267
define i32 @test_diamond_simple(ptr %p, ptr %q, i32 %a, i32 %b) {
268268
; CHECK-LABEL: @test_diamond_simple(
269269
; CHECK-NEXT: entry:
270-
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B:%.*]], 0
271-
; CHECK-NEXT: [[TMP0:%.*]] = or i32 [[A:%.*]], [[B]]
272-
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP0]], 0
273-
; CHECK-NEXT: br i1 [[DOTNOT]], label [[TMP2:%.*]], label [[TMP1:%.*]]
270+
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B1:%.*]], 0
271+
; CHECK-NEXT: [[B:%.*]] = or i32 [[A:%.*]], [[B1]]
272+
; CHECK-NEXT: [[X3:%.*]] = icmp eq i32 [[B]], 0
273+
; CHECK-NEXT: br i1 [[X3]], label [[TMP2:%.*]], label [[TMP1:%.*]]
274274
; CHECK: 1:
275275
; CHECK-NEXT: [[SIMPLIFYCFG_MERGE:%.*]] = zext i1 [[X2]] to i32
276276
; CHECK-NEXT: store i32 [[SIMPLIFYCFG_MERGE]], ptr [[P:%.*]], align 4
@@ -377,11 +377,11 @@ define void @test_outer_if(ptr %p, i32 %a, i32 %b, i32 %c) {
377377
; CHECK-NEXT: [[X3:%.*]] = icmp eq i32 [[C:%.*]], 0
378378
; CHECK-NEXT: br i1 [[X3]], label [[END:%.*]], label [[CONTINUE:%.*]]
379379
; CHECK: continue:
380-
; CHECK-NEXT: [[TMP0:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
381-
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP0]], 0
382-
; CHECK-NEXT: br i1 [[DOTNOT]], label [[END]], label [[TMP1:%.*]]
380+
; CHECK-NEXT: [[B:%.*]] = or i32 [[A:%.*]], [[B1:%.*]]
381+
; CHECK-NEXT: [[X4:%.*]] = icmp eq i32 [[B]], 0
382+
; CHECK-NEXT: br i1 [[X4]], label [[END]], label [[TMP1:%.*]]
383383
; CHECK: 1:
384-
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B]], 0
384+
; CHECK-NEXT: [[X2:%.*]] = icmp ne i32 [[B1]], 0
385385
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = zext i1 [[X2]] to i32
386386
; CHECK-NEXT: store i32 [[SPEC_SELECT]], ptr [[P:%.*]], align 4
387387
; CHECK-NEXT: br label [[END]]

0 commit comments

Comments
 (0)